Fixed potential issues to release resources when error occurs.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / EhciDxe / Ehci.h

/** @file\r
\r
Copyright (c) 2006 - 2007, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
Module Name:\r
\r
    Ehci.h\r
\r
Abstract:\r
\r
\r
Revision History\r
\r
**/\r
\r
#ifndef _EFI_EHCI_H_\r
#define _EFI_EHCI_H_\r
\r
\r
#include <PiDxe.h>\r
\r
#include <Protocol/Usb2HostController.h>\r
#include <Protocol/PciIo.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/UefiDriverEntryPoint.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/UefiLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
\r
\r
#include <IndustryStandard/Pci22.h>\r
\r
typedef struct _USB2_HC_DEV  USB2_HC_DEV;\r
\r
#include "UsbHcMem.h"\r
#include "EhciReg.h"\r
#include "EhciUrb.h"\r
#include "EhciSched.h"\r
#include "EhciDebug.h"\r
\r
enum {\r
  EHC_1_MICROSECOND            = 1,\r
  EHC_1_MILLISECOND            = 1000 * EHC_1_MICROSECOND,\r
  EHC_1_SECOND                 = 1000 * EHC_1_MILLISECOND,\r
\r
  //\r
  // EHCI register operation timeout, set by experience\r
  //\r
  EHC_RESET_TIMEOUT            = 1 * EHC_1_SECOND,\r
  EHC_GENERIC_TIMEOUT          = 10 * EHC_1_MILLISECOND,\r
\r
  //\r
  // Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]\r
  //\r
  EHC_ROOT_PORT_RECOVERY_STALL = 20 * EHC_1_MILLISECOND,\r
\r
  //\r
  // Sync and Async transfer polling interval, set by experience,\r
  // and the unit of Async is 100us, means 50ms as interval.\r
  //\r
  EHC_SYNC_POLL_INTERVAL       = 20 * EHC_1_MICROSECOND,\r
  EHC_ASYNC_POLL_INTERVAL      = 50 * 10000U,\r
\r
  //\r
  // EHC raises TPL to TPL_NOTIFY to serialize all its operations\r
  // to protect shared data structures.\r
  //\r
  EHC_TPL                      = TPL_NOTIFY,\r
\r
  USB2_HC_DEV_SIGNATURE        = EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')\r
};\r
\r
//\r
//Iterate through the doule linked list. NOT delete safe\r
//\r
#define EFI_LIST_FOR_EACH(Entry, ListHead)    \\r
  for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)\r
\r
//\r
//Iterate through the doule linked list. This is delete-safe.\r
//Don't touch NextEntry\r
//\r
#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead)            \\r
  for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\\r
      Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)\r
\r
#define EFI_LIST_CONTAINER(Entry, Type, Field) _CR(Entry, Type, Field)\r
\r
\r
#define EHC_LOW_32BIT(Addr64)     ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))\r
#define EHC_HIGH_32BIT(Addr64)    ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r
#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r
\r
#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \\r
          (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))\r
\r
#define EHC_FROM_THIS(a)   CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r
\r
struct _USB2_HC_DEV {\r
  UINTN                     Signature;\r
  EFI_USB2_HC_PROTOCOL      Usb2Hc;\r
\r
  EFI_PCI_IO_PROTOCOL       *PciIo;\r
  UINT64                    OriginalPciAttributes;\r
  USBHC_MEM_POOL            *MemPool;\r
\r
  //\r
  // Schedule data shared between asynchronous and periodic\r
  // transfers:\r
  // ShortReadStop, as its name indicates, is used to terminate\r
  // the short read except the control transfer. EHCI follows\r
  // the alternative next QTD point when a short read happens.\r
  // For control transfer, even the short read happens, try the\r
  // status stage.\r
  //\r
  EHC_QTD                  *ShortReadStop;\r
  EFI_EVENT                 PollTimer;\r
\r
  //\r
  // Asynchronous(bulk and control) transfer schedule data:\r
  // ReclaimHead is used as the head of the asynchronous transfer\r
  // list. It acts as the reclamation header.\r
  //\r
  EHC_QH                   *ReclaimHead;\r
\r
  //\r
  // Peroidic (interrupt) transfer schedule data:\r
  //\r
  VOID                      *PeriodFrame;     // Mapped as common buffer\r
  VOID                      *PeriodFrameHost;\r
  VOID                      *PeriodFrameMap;\r
\r
  EHC_QH                    *PeriodOne;\r
  LIST_ENTRY                AsyncIntTransfers;\r
\r
  //\r
  // EHCI configuration data\r
  //\r
  UINT32                    HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET\r
  UINT32                    HcCapParams;    // Cache of HC capability parameter, HCCPARAMS\r
  UINT32                    CapLen;         // Capability length\r
  UINT32                    High32bitAddr;\r
\r
  //\r
  // Misc\r
  //\r
  EFI_UNICODE_STRING_TABLE  *ControllerNameTable;\r
};\r
\r
\r
extern EFI_DRIVER_BINDING_PROTOCOL      gEhciDriverBinding;\r
extern EFI_COMPONENT_NAME_PROTOCOL      gEhciComponentName;\r
extern EFI_COMPONENT_NAME2_PROTOCOL     gEhciComponentName2;\r
\r
#endif\r