Update to support to produce Component Name and & Component Name 2 protocol based...
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / EhciDxe / Ehci.h
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913cb9dc 1/** @file\r
2\r
3Copyright (c) 2006 - 2007, Intel Corporation\r
4All rights reserved. This program and the accompanying materials\r
5are licensed and made available under the terms and conditions of the BSD License\r
6which accompanies this distribution. The full text of the license may be found at\r
7http://opensource.org/licenses/bsd-license.php\r
8\r
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11\r
12Module Name:\r
13\r
14 Ehci.h\r
15\r
16Abstract:\r
17\r
18\r
19Revision History\r
20\r
21**/\r
22\r
23#ifndef _EFI_EHCI_H_\r
24#define _EFI_EHCI_H_\r
25\r
ed7748fe 26\r
913cb9dc 27#include <PiDxe.h>\r
ed7748fe 28\r
913cb9dc 29#include <Protocol/Usb2HostController.h>\r
30#include <Protocol/PciIo.h>\r
ed7748fe 31\r
913cb9dc 32#include <Library/DebugLib.h>\r
33#include <Library/BaseMemoryLib.h>\r
34#include <Library/UefiDriverEntryPoint.h>\r
35#include <Library/UefiBootServicesTableLib.h>\r
36#include <Library/UefiLib.h>\r
37#include <Library/BaseLib.h>\r
38#include <Library/MemoryAllocationLib.h>\r
39\r
40\r
41#include <IndustryStandard/Pci22.h>\r
42\r
43typedef struct _USB2_HC_DEV USB2_HC_DEV;\r
44\r
45#include "UsbHcMem.h"\r
46#include "EhciReg.h"\r
47#include "EhciUrb.h"\r
48#include "EhciSched.h"\r
49#include "EhciDebug.h"\r
50\r
51enum {\r
52 USB2_HC_DEV_SIGNATURE = EFI_SIGNATURE_32 ('e', 'h', 'c', 'i'),\r
53 EHC_STALL_1_MICROSECOND = 1,\r
54 EHC_STALL_1_MILLISECOND = 1000 * EHC_STALL_1_MICROSECOND,\r
55 EHC_STALL_1_SECOND = 1000 * EHC_STALL_1_MILLISECOND,\r
56\r
57 EHC_SET_PORT_RESET_TIME = 50 * EHC_STALL_1_MILLISECOND,\r
58 EHC_CLEAR_PORT_RESET_TIME = EHC_STALL_1_MILLISECOND,\r
59 EHC_GENERIC_TIME = 10 * EHC_STALL_1_MILLISECOND,\r
60 EHC_SYNC_POLL_TIME = 20 * EHC_STALL_1_MICROSECOND,\r
61 EHC_ASYNC_POLL_TIME = 50 * 10000UL, // The unit of time is 100us\r
62\r
c52fa98c 63 EHC_TPL = TPL_NOTIFY\r
913cb9dc 64};\r
65\r
66//\r
67//Iterate through the doule linked list. NOT delete safe\r
68//\r
69#define EFI_LIST_FOR_EACH(Entry, ListHead) \\r
70 for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)\r
71\r
72//\r
73//Iterate through the doule linked list. This is delete-safe.\r
74//Don't touch NextEntry\r
75//\r
76#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \\r
77 for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\\r
78 Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)\r
79\r
80#define EFI_LIST_CONTAINER(Entry, Type, Field) _CR(Entry, Type, Field)\r
81\r
82\r
83#define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))\r
84#define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r
85#define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r
86\r
87#define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \\r
88 (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))\r
89\r
90#define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)\r
91\r
c52fa98c 92struct _USB2_HC_DEV {\r
913cb9dc 93 UINTN Signature;\r
94 EFI_USB2_HC_PROTOCOL Usb2Hc;\r
95\r
96 EFI_PCI_IO_PROTOCOL *PciIo;\r
97 USBHC_MEM_POOL *MemPool;\r
98\r
99 //\r
100 // Schedule data shared between asynchronous and periodic\r
101 // transfers:\r
102 // ShortReadStop, as its name indicates, is used to terminate\r
103 // the short read except the control transfer. EHCI follows\r
104 // the alternative next QTD point when a short read happens.\r
105 // For control transfer, even the short read happens, try the\r
106 // status stage.\r
107 //\r
108 EHC_QTD *ShortReadStop;\r
109 EFI_EVENT PollTimer;\r
110\r
111 //\r
112 // Asynchronous(bulk and control) transfer schedule data:\r
113 // ReclaimHead is used as the head of the asynchronous transfer\r
114 // list. It acts as the reclamation header.\r
115 //\r
116 EHC_QH *ReclaimHead;\r
117\r
118 //\r
119 // Peroidic (interrupt) transfer schedule data:\r
120 //\r
121 VOID *PeriodFrame; // Mapped as common buffer\r
122 VOID *PeriodFrameHost;\r
123 VOID *PeriodFrameMap;\r
124\r
125 EHC_QH *PeriodOne;\r
126 LIST_ENTRY AsyncIntTransfers;\r
127\r
128 //\r
129 // EHCI configuration data\r
130 //\r
131 UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET\r
132 UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS\r
133 UINT32 CapLen; // Capability length\r
134 UINT32 High32bitAddr;\r
135\r
136 //\r
137 // Misc\r
138 //\r
139 EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
c52fa98c 140};\r
913cb9dc 141\r
142\r
f527bce3 143extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;\r
144extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;\r
145extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;\r
913cb9dc 146\r
147#endif\r