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913cb9dc 1/** @file\r
2\r
78c2ffb5 3 This file contains the definination for host controller memory management routines.\r
4\r
cd5ebaa0 5Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
9d510e61 6SPDX-License-Identifier: BSD-2-Clause-Patent\r
913cb9dc 7\r
913cb9dc 8**/\r
9\r
10#ifndef _EFI_EHCI_MEM_H_\r
11#define _EFI_EHCI_MEM_H_\r
12\r
913cb9dc 13#define USB_HC_BIT(a) ((UINTN)(1 << (a)))\r
14\r
15#define USB_HC_BIT_IS_SET(Data, Bit) \\r
16 ((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))\r
17\r
18#define USB_HC_HIGH_32BIT(Addr64) \\r
19 ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r
20\r
1ccdbf2a 21typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;\r
22struct _USBHC_MEM_BLOCK {\r
913cb9dc 23 UINT8 *Bits; // Bit array to record which unit is allocated\r
24 UINTN BitsLen;\r
25 UINT8 *Buf;\r
26 UINT8 *BufHost;\r
27 UINTN BufLen; // Memory size in bytes\r
28 VOID *Mapping;\r
1ccdbf2a 29 USBHC_MEM_BLOCK *Next;\r
30};\r
913cb9dc 31\r
32//\r
33// USBHC_MEM_POOL is used to manage the memory used by USB\r
34// host controller. EHCI requires the control memory and transfer\r
35// data to be on the same 4G memory.\r
36//\r
37typedef struct _USBHC_MEM_POOL {\r
38 EFI_PCI_IO_PROTOCOL *PciIo;\r
39 BOOLEAN Check4G;\r
40 UINT32 Which4G;\r
41 USBHC_MEM_BLOCK *Head;\r
42} USBHC_MEM_POOL;\r
43\r
1ccdbf2a 44//\r
45// Memory allocation unit, must be 2^n, n>4\r
46//\r
47#define USBHC_MEM_UNIT 64\r
913cb9dc 48\r
1ccdbf2a 49#define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)\r
50#define USBHC_MEM_DEFAULT_PAGES 16\r
913cb9dc 51\r
52#define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))\r
53\r
54//\r
55// Advance the byte and bit to the next bit, adjust byte accordingly.\r
56//\r
57#define NEXT_BIT(Byte, Bit) \\r
58 do { \\r
59 (Bit)++; \\r
60 if ((Bit) > 7) { \\r
61 (Byte)++; \\r
62 (Bit) = 0; \\r
63 } \\r
64 } while (0)\r
65\r
66\r
67\r
78c2ffb5 68/**\r
69 Initialize the memory management pool for the host controller.\r
70\r
71 @param PciIo The PciIo that can be used to access the host controller.\r
72 @param Check4G Whether the host controller requires allocated memory\r
73 from one 4G address space.\r
74 @param Which4G The 4G memory area each memory allocated should be from.\r
75\r
76 @retval EFI_SUCCESS The memory pool is initialized.\r
77 @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.\r
78\r
79**/\r
913cb9dc 80USBHC_MEM_POOL *\r
81UsbHcInitMemPool (\r
82 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
83 IN BOOLEAN Check4G,\r
84 IN UINT32 Which4G\r
ed66e1bc 85 );\r
913cb9dc 86\r
87\r
913cb9dc 88/**\r
78c2ffb5 89 Release the memory management pool.\r
913cb9dc 90\r
78c2ffb5 91 @param Pool The USB memory pool to free.\r
913cb9dc 92\r
78c2ffb5 93 @retval EFI_SUCCESS The memory pool is freed.\r
94 @retval EFI_DEVICE_ERROR Failed to free the memory pool.\r
913cb9dc 95\r
96**/\r
97EFI_STATUS\r
98UsbHcFreeMemPool (\r
99 IN USBHC_MEM_POOL *Pool\r
ed66e1bc 100 );\r
913cb9dc 101\r
102\r
913cb9dc 103/**\r
104 Allocate some memory from the host controller's memory pool\r
105 which can be used to communicate with host controller.\r
106\r
78c2ffb5 107 @param Pool The host controller's memory pool.\r
108 @param Size Size of the memory to allocate.\r
913cb9dc 109\r
78c2ffb5 110 @return The allocated memory or NULL.\r
913cb9dc 111\r
112**/\r
113VOID *\r
114UsbHcAllocateMem (\r
115 IN USBHC_MEM_POOL *Pool,\r
116 IN UINTN Size\r
ed66e1bc 117 );\r
913cb9dc 118\r
119\r
913cb9dc 120/**\r
78c2ffb5 121 Free the allocated memory back to the memory pool.\r
913cb9dc 122\r
78c2ffb5 123 @param Pool The memory pool of the host controller.\r
124 @param Mem The memory to free.\r
125 @param Size The size of the memory to free.\r
913cb9dc 126\r
913cb9dc 127**/\r
128VOID\r
129UsbHcFreeMem (\r
130 IN USBHC_MEM_POOL *Pool,\r
131 IN VOID *Mem,\r
132 IN UINTN Size\r
ed66e1bc 133 );\r
739802e4 134\r
135/**\r
592b87a4 136 Calculate the corresponding pci bus address according to the Mem parameter.\r
739802e4 137\r
138 @param Pool The memory pool of the host controller.\r
592b87a4 139 @param Mem The pointer to host memory.\r
140 @param Size The size of the memory region.\r
739802e4 141\r
142 @return the pci memory address\r
143**/\r
144EFI_PHYSICAL_ADDRESS\r
145UsbHcGetPciAddressForHostMem (\r
146 IN USBHC_MEM_POOL *Pool,\r
147 IN VOID *Mem,\r
148 IN UINTN Size\r
149 );\r
150\r
913cb9dc 151#endif\r