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1 | /** @file\r |
2 | \r |
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3 | The definition for UHCI register operation routines.\r |
4 | \r |
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5 | Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r |
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6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
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7 | \r |
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8 | **/\r |
9 | \r |
10 | #ifndef _EFI_UHCI_QUEUE_H_\r |
11 | #define _EFI_UHCI_QUEUE_H_\r |
12 | \r |
13 | //\r |
14 | // Macroes used to set various links in UHCI's driver.\r |
15 | // In this UHCI driver, QH's horizontal link always pointers to other QH,\r |
16 | // and its vertical link always pointers to TD. TD's next pointer always\r |
17 | // pointers to other sibling TD. Frame link always pointers to QH because\r |
18 | // ISO transfer isn't supported.\r |
19 | //\r |
20 | // We should use UINT32 to access these pointers to void race conditions\r |
21 | // with hardware.\r |
22 | //\r |
23 | #define QH_HLINK(Pointer, Terminate) \\r |
24 | (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | 0x02 | ((Terminate) ? 0x01 : 0))\r |
25 | \r |
26 | #define QH_VLINK(Pointer, Terminate) \\r |
27 | (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | ((Terminate) ? 0x01 : 0))\r |
28 | \r |
29 | #define TD_LINK(Pointer, VertFirst, Terminate) \\r |
30 | (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | \\r |
31 | ((VertFirst) ? 0x04 : 0) | ((Terminate) ? 0x01 : 0))\r |
32 | \r |
33 | #define LINK_TERMINATED(Link) (((Link) & 0x01) != 0)\r |
34 | \r |
35 | #define UHCI_ADDR(QhOrTd) ((VOID *) (UINTN) ((QhOrTd) & 0xFFFFFFF0))\r |
36 | \r |
37 | #pragma pack(1)\r |
38 | //\r |
39 | // Both links in QH has this internal structure:\r |
40 | // Next pointer: 28, Reserved: 2, NextIsQh: 1, Terminate: 1\r |
41 | // This is the same as frame list entry.\r |
42 | //\r |
43 | typedef struct {\r |
44 | UINT32 HorizonLink;\r |
45 | UINT32 VerticalLink;\r |
46 | } UHCI_QH_HW;\r |
47 | \r |
48 | //\r |
49 | // Next link in TD has this internal structure:\r |
50 | // Next pointer: 28, Reserved: 1, Vertical First: 1, NextIsQh: 1, Terminate: 1\r |
51 | //\r |
52 | typedef struct {\r |
53 | UINT32 NextLink;\r |
54 | UINT32 ActualLen : 11;\r |
55 | UINT32 Reserved1 : 5;\r |
56 | UINT32 Status : 8;\r |
57 | UINT32 IntOnCpl : 1;\r |
58 | UINT32 IsIsoch : 1;\r |
59 | UINT32 LowSpeed : 1;\r |
60 | UINT32 ErrorCount : 2;\r |
61 | UINT32 ShortPacket : 1;\r |
62 | UINT32 Reserved2 : 2;\r |
63 | UINT32 PidCode : 8;\r |
64 | UINT32 DeviceAddr : 7;\r |
65 | UINT32 EndPoint : 4;\r |
66 | UINT32 DataToggle : 1;\r |
67 | UINT32 Reserved3 : 1;\r |
68 | UINT32 MaxPacketLen: 11;\r |
69 | UINT32 DataBuffer;\r |
70 | } UHCI_TD_HW;\r |
71 | #pragma pack()\r |
72 | \r |
73 | typedef struct _UHCI_TD_SW UHCI_TD_SW;\r |
74 | typedef struct _UHCI_QH_SW UHCI_QH_SW;\r |
75 | \r |
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76 | struct _UHCI_QH_SW {\r |
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77 | UHCI_QH_HW QhHw;\r |
78 | UHCI_QH_SW *NextQh;\r |
79 | UHCI_TD_SW *TDs;\r |
80 | UINTN Interval;\r |
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81 | };\r |
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82 | \r |
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83 | struct _UHCI_TD_SW {\r |
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84 | UHCI_TD_HW TdHw;\r |
85 | UHCI_TD_SW *NextTd;\r |
86 | UINT8 *Data;\r |
87 | UINT16 DataLen;\r |
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88 | };\r |
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89 | \r |
90 | \r |
91 | /**\r |
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92 | Link the TD To QH.\r |
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93 | \r |
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94 | @param Uhc The UHCI device.\r |
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95 | @param Qh The queue head for the TD to link to.\r |
96 | @param Td The TD to link.\r |
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97 | \r |
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98 | **/\r |
99 | VOID\r |
100 | UhciLinkTdToQh (\r |
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101 | IN USB_HC_DEV *Uhc,\r |
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102 | IN UHCI_QH_SW *Qh,\r |
103 | IN UHCI_TD_SW *Td\r |
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104 | );\r |
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105 | \r |
106 | \r |
107 | /**\r |
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108 | Unlink TD from the QH.\r |
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109 | \r |
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110 | @param Qh The queue head to unlink from.\r |
111 | @param Td The TD to unlink.\r |
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112 | \r |
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113 | @return None.\r |
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114 | \r |
115 | **/\r |
116 | VOID\r |
117 | UhciUnlinkTdFromQh (\r |
118 | IN UHCI_QH_SW *Qh,\r |
119 | IN UHCI_TD_SW *Td\r |
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120 | );\r |
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121 | \r |
122 | \r |
123 | /**\r |
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124 | Map address of request structure buffer.\r |
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125 | \r |
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126 | @param Uhc The UHCI device.\r |
127 | @param Request The user request buffer.\r |
128 | @param MappedAddr Mapped address of request.\r |
129 | @param Map Identificaion of this mapping to return.\r |
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130 | \r |
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131 | @return EFI_SUCCESS Success.\r |
132 | @return EFI_DEVICE_ERROR Fail to map the user request.\r |
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133 | \r |
134 | **/\r |
135 | EFI_STATUS\r |
136 | UhciMapUserRequest (\r |
137 | IN USB_HC_DEV *Uhc,\r |
138 | IN OUT VOID *Request,\r |
139 | OUT UINT8 **MappedAddr,\r |
140 | OUT VOID **Map\r |
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141 | );\r |
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142 | \r |
143 | \r |
144 | /**\r |
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145 | Map address of user data buffer.\r |
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146 | \r |
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147 | @param Uhc The UHCI device.\r |
148 | @param Direction Direction of the data transfer.\r |
149 | @param Data The user data buffer.\r |
150 | @param Len Length of the user data.\r |
151 | @param PktId Packet identificaion.\r |
152 | @param MappedAddr Mapped address to return.\r |
153 | @param Map Identificaion of this mapping to return.\r |
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154 | \r |
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155 | @return EFI_SUCCESS Success.\r |
156 | @return EFI_DEVICE_ERROR Fail to map the user data.\r |
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157 | \r |
158 | **/\r |
159 | EFI_STATUS\r |
160 | UhciMapUserData (\r |
161 | IN USB_HC_DEV *Uhc,\r |
162 | IN EFI_USB_DATA_DIRECTION Direction,\r |
163 | IN VOID *Data,\r |
164 | IN OUT UINTN *Len,\r |
165 | OUT UINT8 *PktId,\r |
166 | OUT UINT8 **MappedAddr,\r |
167 | OUT VOID **Map\r |
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168 | );\r |
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169 | \r |
170 | \r |
171 | /**\r |
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172 | Delete a list of TDs.\r |
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173 | \r |
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174 | @param Uhc The UHCI device.\r |
175 | @param FirstTd TD link list head.\r |
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176 | \r |
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177 | @return None.\r |
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178 | \r |
179 | **/\r |
180 | VOID\r |
181 | UhciDestoryTds (\r |
182 | IN USB_HC_DEV *Uhc,\r |
183 | IN UHCI_TD_SW *FirstTd\r |
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184 | );\r |
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185 | \r |
186 | \r |
187 | /**\r |
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188 | Create an initialize a new queue head.\r |
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189 | \r |
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190 | @param Uhc The UHCI device.\r |
191 | @param Interval The polling interval for the queue.\r |
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192 | \r |
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193 | @return The newly created queue header.\r |
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194 | \r |
195 | **/\r |
196 | UHCI_QH_SW *\r |
197 | UhciCreateQh (\r |
198 | IN USB_HC_DEV *Uhc,\r |
199 | IN UINTN Interval\r |
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200 | );\r |
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201 | \r |
202 | \r |
203 | /**\r |
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204 | Create Tds list for Control Transfer.\r |
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205 | \r |
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206 | @param Uhc The UHCI device.\r |
207 | @param DeviceAddr The device address.\r |
208 | @param DataPktId Packet Identification of Data Tds.\r |
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209 | @param Request A pointer to cpu memory address of request structure buffer to transfer.\r |
210 | @param RequestPhy A pointer to pci memory address of request structure buffer to transfer.\r |
211 | @param Data A pointer to cpu memory address of user data buffer to transfer.\r |
212 | @param DataPhy A pointer to pci memory address of user data buffer to transfer.\r |
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213 | @param DataLen Length of user data to transfer.\r |
214 | @param MaxPacket Maximum packet size for control transfer.\r |
215 | @param IsLow Full speed or low speed.\r |
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216 | \r |
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217 | @return The Td list head for the control transfer.\r |
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218 | \r |
219 | **/\r |
220 | UHCI_TD_SW *\r |
221 | UhciCreateCtrlTds (\r |
222 | IN USB_HC_DEV *Uhc,\r |
223 | IN UINT8 DeviceAddr,\r |
224 | IN UINT8 DataPktId,\r |
225 | IN UINT8 *Request,\r |
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226 | IN UINT8 *RequestPhy,\r |
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227 | IN UINT8 *Data,\r |
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228 | IN UINT8 *DataPhy,\r |
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229 | IN UINTN DataLen,\r |
230 | IN UINT8 MaxPacket,\r |
231 | IN BOOLEAN IsLow\r |
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232 | );\r |
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233 | \r |
234 | \r |
235 | /**\r |
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236 | Create Tds list for Bulk/Interrupt Transfer.\r |
237 | \r |
238 | @param Uhc USB_HC_DEV.\r |
239 | @param DevAddr Address of Device.\r |
240 | @param EndPoint Endpoint Number.\r |
241 | @param PktId Packet Identification of Data Tds.\r |
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242 | @param Data A pointer to cpu memory address of user data buffer to transfer.\r |
243 | @param DataPhy A pointer to pci memory address of user data buffer to transfer.\r |
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244 | @param DataLen Length of user data to transfer.\r |
245 | @param DataToggle Data Toggle Pointer.\r |
246 | @param MaxPacket Maximum packet size for Bulk/Interrupt transfer.\r |
247 | @param IsLow Is Low Speed Device.\r |
248 | \r |
249 | @return The Tds list head for the bulk transfer.\r |
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250 | \r |
251 | **/\r |
252 | UHCI_TD_SW *\r |
253 | UhciCreateBulkOrIntTds (\r |
254 | IN USB_HC_DEV *Uhc,\r |
255 | IN UINT8 DevAddr,\r |
256 | IN UINT8 EndPoint,\r |
257 | IN UINT8 PktId,\r |
258 | IN UINT8 *Data,\r |
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259 | IN UINT8 *DataPhy,\r |
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260 | IN UINTN DataLen,\r |
261 | IN OUT UINT8 *DataToggle,\r |
262 | IN UINT8 MaxPacket,\r |
263 | IN BOOLEAN IsLow\r |
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264 | );\r |
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265 | \r |
266 | #endif\r |