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23c98c94 1/** @file\r
e94a9ff7 2 Task priority (TPL) functions.\r
504214c4 3\r
d1102dba 4Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
cd5ebaa0 5This program and the accompanying materials\r
23c98c94 6are licensed and made available under the terms and conditions of the BSD License\r
7which accompanies this distribution. The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php\r
28a00297 9\r
23c98c94 10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
28a00297 12\r
504214c4 13**/\r
28a00297 14\r
9c4ac31c 15#include "DxeMain.h"\r
ec90508b 16#include "Event.h"\r
162ed594 17\r
18/**\r
19 Set Interrupt State.\r
20\r
21 @param Enable The state of enable or disable interrupt\r
22\r
23**/\r
28a00297 24VOID\r
25CoreSetInterruptState (\r
26 IN BOOLEAN Enable\r
27 )\r
28a00297 28{\r
0803854b 29 EFI_STATUS Status;\r
30 BOOLEAN InSmm;\r
d1102dba 31\r
0803854b 32 if (gCpu == NULL) {\r
33 return;\r
34 }\r
35 if (!Enable) {\r
36 gCpu->DisableInterrupt (gCpu);\r
37 return;\r
38 }\r
39 if (gSmmBase2 == NULL) {\r
40 gCpu->EnableInterrupt (gCpu);\r
41 return;\r
42 }\r
43 Status = gSmmBase2->InSmm (gSmmBase2, &InSmm);\r
44 if (!EFI_ERROR (Status) && !InSmm) {\r
45 gCpu->EnableInterrupt(gCpu);\r
28a00297 46 }\r
47}\r
48\r
28a00297 49\r
162ed594 50/**\r
28a00297 51 Raise the task priority level to the new level.\r
52 High level is implemented by disabling processor interrupts.\r
53\r
022c6d45 54 @param NewTpl New task priority level\r
28a00297 55\r
162ed594 56 @return The previous task priority level\r
28a00297 57\r
162ed594 58**/\r
59EFI_TPL\r
60EFIAPI\r
61CoreRaiseTpl (\r
62 IN EFI_TPL NewTpl\r
63 )\r
28a00297 64{\r
65 EFI_TPL OldTpl;\r
66\r
67 OldTpl = gEfiCurrentTpl;\r
d4848bb9
SZ
68 if (OldTpl > NewTpl) {\r
69 DEBUG ((EFI_D_ERROR, "FATAL ERROR - RaiseTpl with OldTpl(0x%x) > NewTpl(0x%x)\n", OldTpl, NewTpl));\r
70 ASSERT (FALSE);\r
71 }\r
28a00297 72 ASSERT (VALID_TPL (NewTpl));\r
73\r
74 //\r
75 // If raising to high level, disable interrupts\r
76 //\r
77 if (NewTpl >= TPL_HIGH_LEVEL && OldTpl < TPL_HIGH_LEVEL) {\r
78 CoreSetInterruptState (FALSE);\r
79 }\r
80\r
81 //\r
82 // Set the new value\r
83 //\r
84 gEfiCurrentTpl = NewTpl;\r
85\r
86 return OldTpl;\r
87}\r
88\r
89\r
90\r
162ed594 91\r
92/**\r
93 Lowers the task priority to the previous value. If the new\r
94 priority unmasks events at a higher priority, they are dispatched.\r
95\r
96 @param NewTpl New, lower, task priority\r
97\r
98**/\r
28a00297 99VOID\r
100EFIAPI\r
101CoreRestoreTpl (\r
102 IN EFI_TPL NewTpl\r
103 )\r
28a00297 104{\r
105 EFI_TPL OldTpl;\r
d9be0f66 106 EFI_TPL PendingTpl;\r
28a00297 107\r
108 OldTpl = gEfiCurrentTpl;\r
d4848bb9
SZ
109 if (NewTpl > OldTpl) {\r
110 DEBUG ((EFI_D_ERROR, "FATAL ERROR - RestoreTpl with NewTpl(0x%x) > OldTpl(0x%x)\n", NewTpl, OldTpl));\r
111 ASSERT (FALSE);\r
112 }\r
28a00297 113 ASSERT (VALID_TPL (NewTpl));\r
114\r
115 //\r
116 // If lowering below HIGH_LEVEL, make sure\r
117 // interrupts are enabled\r
118 //\r
119\r
120 if (OldTpl >= TPL_HIGH_LEVEL && NewTpl < TPL_HIGH_LEVEL) {\r
022c6d45 121 gEfiCurrentTpl = TPL_HIGH_LEVEL;\r
28a00297 122 }\r
123\r
124 //\r
125 // Dispatch any pending events\r
126 //\r
d9be0f66
HW
127 while (gEventPending != 0) {\r
128 PendingTpl = (UINTN) HighBitSet64 (gEventPending);\r
129 if (PendingTpl <= NewTpl) {\r
130 break;\r
131 }\r
132\r
133 gEfiCurrentTpl = PendingTpl;\r
28a00297 134 if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r
135 CoreSetInterruptState (TRUE);\r
136 }\r
137 CoreDispatchEventNotifies (gEfiCurrentTpl);\r
138 }\r
139\r
140 //\r
141 // Set the new value\r
142 //\r
143\r
144 gEfiCurrentTpl = NewTpl;\r
145\r
146 //\r
147 // If lowering below HIGH_LEVEL, make sure\r
148 // interrupts are enabled\r
149 //\r
150 if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r
151 CoreSetInterruptState (TRUE);\r
152 }\r
153\r
154}\r