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96226baa | 1 | /** @file\r |
91d92e25 | 2 | x64-specifc functionality for DxeLoad.\r |
95276127 | 3 | \r |
d1102dba | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
95276127 | 6 | \r |
96226baa | 7 | **/\r |
95276127 | 8 | \r |
95276127 | 9 | #include "DxeIpl.h"\r |
f3b33289 | 10 | #include "X64/VirtualMemory.h"\r |
95276127 | 11 | \r |
91d92e25 | 12 | \r |
13 | \r | |
14 | /**\r | |
15 | Transfers control to DxeCore.\r | |
16 | \r | |
17 | This function performs a CPU architecture specific operations to execute\r | |
18 | the entry point of DxeCore with the parameters of HobList.\r | |
48557c65 | 19 | It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r |
91d92e25 | 20 | \r |
48557c65 | 21 | @param DxeCoreEntryPoint The entry point of DxeCore.\r |
91d92e25 | 22 | @param HobList The start of HobList passed to DxeCore.\r |
91d92e25 | 23 | \r |
24 | **/\r | |
95276127 | 25 | VOID\r |
26 | HandOffToDxeCore (\r | |
27 | IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r | |
9b937a73 | 28 | IN EFI_PEI_HOB_POINTERS HobList\r |
95276127 | 29 | )\r |
30 | {\r | |
57f360f2 JF |
31 | VOID *BaseOfStack;\r |
32 | VOID *TopOfStack;\r | |
33 | EFI_STATUS Status;\r | |
34 | UINTN PageTables;\r | |
35 | UINT32 Index;\r | |
36 | EFI_VECTOR_HANDOFF_INFO *VectorInfo;\r | |
37 | EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;\r | |
b098f5e9 TL |
38 | VOID *GhcbBase;\r |
39 | UINTN GhcbSize;\r | |
57f360f2 | 40 | \r |
f9d0e5da JW |
41 | //\r |
42 | // Clear page 0 and mark it as allocated if NULL pointer detection is enabled.\r | |
43 | //\r | |
9189ec20 JW |
44 | if (IsNullDetectionEnabled ()) {\r |
45 | ClearFirst4KPage (HobList.Raw);\r | |
f9d0e5da | 46 | BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData);\r |
9189ec20 JW |
47 | }\r |
48 | \r | |
57f360f2 JF |
49 | //\r |
50 | // Get Vector Hand-off Info PPI and build Guided HOB\r | |
51 | //\r | |
52 | Status = PeiServicesLocatePpi (\r | |
53 | &gEfiVectorHandoffInfoPpiGuid,\r | |
54 | 0,\r | |
55 | NULL,\r | |
56 | (VOID **)&VectorHandoffInfoPpi\r | |
57 | );\r | |
58 | if (Status == EFI_SUCCESS) {\r | |
59 | DEBUG ((EFI_D_INFO, "Vector Hand-off Info PPI is gotten, GUIDed HOB is created!\n"));\r | |
60 | VectorInfo = VectorHandoffInfoPpi->Info;\r | |
61 | Index = 1;\r | |
62 | while (VectorInfo->Attribute != EFI_VECTOR_HANDOFF_LAST_ENTRY) {\r | |
63 | VectorInfo ++;\r | |
64 | Index ++;\r | |
65 | }\r | |
66 | BuildGuidDataHob (\r | |
67 | &gEfiVectorHandoffInfoPpiGuid,\r | |
68 | VectorHandoffInfoPpi->Info,\r | |
69 | sizeof (EFI_VECTOR_HANDOFF_INFO) * Index\r | |
70 | );\r | |
71 | }\r | |
95276127 | 72 | \r |
73 | //\r | |
74 | // Allocate 128KB for the Stack\r | |
75 | //\r | |
76 | BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r | |
77 | ASSERT (BaseOfStack != NULL);\r | |
78 | \r | |
79 | //\r | |
80 | // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r | |
81 | // for safety.\r | |
82 | //\r | |
83 | TopOfStack = (VOID *) ((UINTN) BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r | |
84 | TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r | |
85 | \r | |
b098f5e9 TL |
86 | //\r |
87 | // Get the address and size of the GHCB pages\r | |
88 | //\r | |
89 | GhcbBase = (VOID *) PcdGet64 (PcdGhcbBase);\r | |
90 | GhcbSize = PcdGet64 (PcdGhcbSize);\r | |
91 | \r | |
d042796c | 92 | PageTables = 0;\r |
e47f0da4 | 93 | if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {\r |
94 | //\r | |
95 | // Create page table and save PageMapLevel4 to CR3\r | |
96 | //\r | |
b098f5e9 TL |
97 | PageTables = CreateIdentityMappingPageTables ((EFI_PHYSICAL_ADDRESS) (UINTN) BaseOfStack, STACK_SIZE,\r |
98 | (EFI_PHYSICAL_ADDRESS) (UINTN) GhcbBase, GhcbSize);\r | |
5630cdfe SZ |
99 | } else {\r |
100 | //\r | |
101 | // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE\r | |
102 | // for the DxeIpl and the DxeCore are both X64.\r | |
103 | //\r | |
104 | ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE);\r | |
50255363 | 105 | ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE);\r |
e47f0da4 | 106 | }\r |
d1102dba | 107 | \r |
95276127 | 108 | //\r |
48557c65 | 109 | // End of PEI phase signal\r |
95276127 | 110 | //\r |
9b937a73 | 111 | Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r |
95276127 | 112 | ASSERT_EFI_ERROR (Status);\r |
113 | \r | |
e47f0da4 | 114 | if (FeaturePcdGet (PcdDxeIplBuildPageTables)) {\r |
115 | AsmWriteCr3 (PageTables);\r | |
116 | }\r | |
f3b33289 | 117 | \r |
30c8f861 | 118 | //\r |
119 | // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r | |
d1102dba | 120 | //\r |
189575e8 | 121 | UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);\r |
30c8f861 | 122 | \r |
b98da1b1 | 123 | //\r |
124 | // Transfer the control to the entry point of DxeCore.\r | |
125 | //\r | |
95276127 | 126 | SwitchStack (\r |
127 | (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r | |
128 | HobList.Raw,\r | |
129 | NULL,\r | |
130 | TopOfStack\r | |
131 | );\r | |
132 | }\r |