[mirror_edk2.git] / MdeModulePkg / Core / PiSmmCore / HeapGuard.h

/** @file\r
  Data structure and functions to allocate and free memory space.\r
\r
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef _HEAPGUARD_H_\r
#define _HEAPGUARD_H_\r
\r
#include "PiSmmCore.h"\r
\r
//\r
// Following macros are used to define and access the guarded memory bitmap\r
// table.\r
//\r
// To simplify the access and reduce the memory used for this table, the\r
// table is constructed in the similar way as page table structure but in\r
// reverse direction, i.e. from bottom growing up to top.\r
//\r
//    - 1-bit tracks 1 page (4KB)\r
//    - 1-UINT64 map entry tracks 256KB memory\r
//    - 1K-UINT64 map table tracks 256MB memory\r
//    - Five levels of tables can track any address of memory of 64-bit\r
//      system, like below.\r
//\r
//       512   *   512   *   512   *   512    *    1K   *  64b *     4K\r
//    111111111 111111111 111111111 111111111 1111111111 111111 111111111111\r
//    63        54        45        36        27         17     11         0\r
//       9b        9b        9b        9b         10b      6b       12b\r
//       L0   ->   L1   ->   L2   ->   L3   ->    L4   -> bits  ->  page\r
//      1FF       1FF       1FF       1FF         3FF      3F       FFF\r
//\r
// L4 table has 1K * sizeof(UINT64) = 8K (2-page), which can track 256MB\r
// memory. Each table of L0-L3 will be allocated when its memory address\r
// range is to be tracked. Only 1-page will be allocated each time. This\r
// can save memories used to establish this map table.\r
//\r
// For a normal configuration of system with 4G memory, two levels of tables\r
// can track the whole memory, because two levels (L3+L4) of map tables have\r
// already coverred 37-bit of memory address. And for a normal UEFI BIOS,\r
// less than 128M memory would be consumed during boot. That means we just\r
// need\r
//\r
//          1-page (L3) + 2-page (L4)\r
//\r
// memory (3 pages) to track the memory allocation works. In this case,\r
// there's no need to setup L0-L2 tables.\r
//\r
\r
//\r
// Each entry occupies 8B/64b. 1-page can hold 512 entries, which spans 9\r
// bits in address. (512 = 1 << 9)\r
//\r
#define BYTE_LENGTH_SHIFT                   3             // (8 = 1 << 3)\r
\r
#define GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT  \\r
        (EFI_PAGE_SHIFT - BYTE_LENGTH_SHIFT)\r
\r
#define GUARDED_HEAP_MAP_TABLE_DEPTH        5\r
\r
// Use UINT64_index + bit_index_of_UINT64 to locate the bit in may\r
#define GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT    6             // (64 = 1 << 6)\r
\r
#define GUARDED_HEAP_MAP_ENTRY_BITS         \\r
        (1 << GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)\r
\r
#define GUARDED_HEAP_MAP_ENTRY_BYTES        \\r
        (GUARDED_HEAP_MAP_ENTRY_BITS / 8)\r
\r
// L4 table address width: 64 - 9 * 4 - 6 - 12 = 10b\r
#define GUARDED_HEAP_MAP_ENTRY_SHIFT              \\r
        (GUARDED_HEAP_MAP_ENTRY_BITS              \\r
         - GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 4 \\r
         - GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT       \\r
         - EFI_PAGE_SHIFT)\r
\r
// L4 table address mask: (1 << 10 - 1) = 0x3FF\r
#define GUARDED_HEAP_MAP_ENTRY_MASK               \\r
        ((1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) - 1)\r
\r
// Size of each L4 table: (1 << 10) * 8 = 8KB = 2-page\r
#define GUARDED_HEAP_MAP_SIZE                     \\r
        ((1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) * GUARDED_HEAP_MAP_ENTRY_BYTES)\r
\r
// Memory size tracked by one L4 table: 8KB * 8 * 4KB = 256MB\r
#define GUARDED_HEAP_MAP_UNIT_SIZE                \\r
        (GUARDED_HEAP_MAP_SIZE * 8 * EFI_PAGE_SIZE)\r
\r
// L4 table entry number: 8KB / 8 = 1024\r
#define GUARDED_HEAP_MAP_ENTRIES_PER_UNIT         \\r
        (GUARDED_HEAP_MAP_SIZE / GUARDED_HEAP_MAP_ENTRY_BYTES)\r
\r
// L4 table entry indexing\r
#define GUARDED_HEAP_MAP_ENTRY_INDEX(Address)                       \\r
        (RShiftU64 (Address, EFI_PAGE_SHIFT                         \\r
                             + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)    \\r
         & GUARDED_HEAP_MAP_ENTRY_MASK)\r
\r
// L4 table entry bit indexing\r
#define GUARDED_HEAP_MAP_ENTRY_BIT_INDEX(Address)       \\r
        (RShiftU64 (Address, EFI_PAGE_SHIFT)            \\r
         & ((1 << GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT) - 1))\r
\r
//\r
// Total bits (pages) tracked by one L4 table (65536-bit)\r
//\r
#define GUARDED_HEAP_MAP_BITS                               \\r
        (1 << (GUARDED_HEAP_MAP_ENTRY_SHIFT                 \\r
               + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT))\r
\r
//\r
// Bit indexing inside the whole L4 table (0 - 65535)\r
//\r
#define GUARDED_HEAP_MAP_BIT_INDEX(Address)                     \\r
        (RShiftU64 (Address, EFI_PAGE_SHIFT)                    \\r
         & ((1 << (GUARDED_HEAP_MAP_ENTRY_SHIFT                 \\r
                   + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)) - 1))\r
\r
//\r
// Memory address bit width tracked by L4 table: 10 + 6 + 12 = 28\r
//\r
#define GUARDED_HEAP_MAP_TABLE_SHIFT                                      \\r
        (GUARDED_HEAP_MAP_ENTRY_SHIFT + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT  \\r
         + EFI_PAGE_SHIFT)\r
\r
//\r
// Macro used to initialize the local array variable for map table traversing\r
// {55, 46, 37, 28, 18}\r
//\r
#define GUARDED_HEAP_MAP_TABLE_DEPTH_SHIFTS                                 \\r
  {                                                                         \\r
    GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 3,  \\r
    GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 2,  \\r
    GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT,      \\r
    GUARDED_HEAP_MAP_TABLE_SHIFT,                                           \\r
    EFI_PAGE_SHIFT + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT                       \\r
  }\r
\r
//\r
// Masks used to extract address range of each level of table\r
// {0x1FF, 0x1FF, 0x1FF, 0x1FF, 0x3FF}\r
//\r
#define GUARDED_HEAP_MAP_TABLE_DEPTH_MASKS                                  \\r
  {                                                                         \\r
    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \\r
    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \\r
    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \\r
    (1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1,                          \\r
    (1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) - 1                                 \\r
  }\r
\r
//\r
// Memory type to guard (matching the related PCD definition)\r
//\r
#define GUARD_HEAP_TYPE_PAGE        BIT2\r
#define GUARD_HEAP_TYPE_POOL        BIT3\r
\r
//\r
// Debug message level\r
//\r
#define HEAP_GUARD_DEBUG_LEVEL  (DEBUG_POOL|DEBUG_PAGE)\r
\r
typedef struct {\r
  UINT32                TailMark;\r
  UINT32                HeadMark;\r
  EFI_PHYSICAL_ADDRESS  Address;\r
  LIST_ENTRY            Link;\r
} HEAP_GUARD_NODE;\r
\r
/**\r
  Set head Guard and tail Guard for the given memory range.\r
\r
  @param[in]  Memory          Base address of memory to set guard for.\r
  @param[in]  NumberOfPages   Memory size in pages.\r
\r
  @return VOID.\r
**/\r
VOID\r
SetGuardForMemory (\r
  IN EFI_PHYSICAL_ADDRESS   Memory,\r
  IN UINTN                  NumberOfPages\r
  );\r
\r
/**\r
  Unset head Guard and tail Guard for the given memory range.\r
\r
  @param[in]  Memory          Base address of memory to unset guard for.\r
  @param[in]  NumberOfPages   Memory size in pages.\r
\r
  @return VOID.\r
**/\r
VOID\r
UnsetGuardForMemory (\r
  IN EFI_PHYSICAL_ADDRESS   Memory,\r
  IN UINTN                  NumberOfPages\r
  );\r
\r
/**\r
  Adjust the base and number of pages to really allocate according to Guard.\r
\r
  @param[in,out]  Memory          Base address of free memory.\r
  @param[in,out]  NumberOfPages   Size of memory to allocate.\r
\r
  @return VOID.\r
**/\r
VOID\r
AdjustMemoryA (\r
  IN OUT EFI_PHYSICAL_ADDRESS    *Memory,\r
  IN OUT UINTN                   *NumberOfPages\r
  );\r
\r
/**\r
  Adjust the start address and number of pages to free according to Guard.\r
\r
  The purpose of this function is to keep the shared Guard page with adjacent\r
  memory block if it's still in guard, or free it if no more sharing. Another\r
  is to reserve pages as Guard pages in partial page free situation.\r
\r
  @param[in,out]  Memory          Base address of memory to free.\r
  @param[in,out]  NumberOfPages   Size of memory to free.\r
\r
  @return VOID.\r
**/\r
VOID\r
AdjustMemoryF (\r
  IN OUT EFI_PHYSICAL_ADDRESS    *Memory,\r
  IN OUT UINTN                   *NumberOfPages\r
  );\r
\r
/**\r
  Check to see if the pool at the given address should be guarded or not.\r
\r
  @param[in]  MemoryType      Pool type to check.\r
\r
\r
  @return TRUE  The given type of pool should be guarded.\r
  @return FALSE The given type of pool should not be guarded.\r
**/\r
BOOLEAN\r
IsPoolTypeToGuard (\r
  IN EFI_MEMORY_TYPE        MemoryType\r
  );\r
\r
/**\r
  Check to see if the page at the given address should be guarded or not.\r
\r
  @param[in]  MemoryType      Page type to check.\r
  @param[in]  AllocateType    Allocation type to check.\r
\r
  @return TRUE  The given type of page should be guarded.\r
  @return FALSE The given type of page should not be guarded.\r
**/\r
BOOLEAN\r
IsPageTypeToGuard (\r
  IN EFI_MEMORY_TYPE        MemoryType,\r
  IN EFI_ALLOCATE_TYPE      AllocateType\r
  );\r
\r
/**\r
  Check to see if the page at the given address is guarded or not.\r
\r
  @param[in]  Address     The address to check for.\r
\r
  @return TRUE  The page at Address is guarded.\r
  @return FALSE The page at Address is not guarded.\r
**/\r
BOOLEAN\r
EFIAPI\r
IsMemoryGuarded (\r
  IN EFI_PHYSICAL_ADDRESS    Address\r
  );\r
\r
/**\r
  Check to see if the page at the given address is a Guard page or not.\r
\r
  @param[in]  Address     The address to check for.\r
\r
  @return TRUE  The page at Address is a Guard page.\r
  @return FALSE The page at Address is not a Guard page.\r
**/\r
BOOLEAN\r
EFIAPI\r
IsGuardPage (\r
  IN EFI_PHYSICAL_ADDRESS    Address\r
  );\r
\r
/**\r
  Dump the guarded memory bit map.\r
**/\r
VOID\r
EFIAPI\r
DumpGuardedMemoryBitmap (\r
  VOID\r
  );\r
\r
/**\r
  Adjust the pool head position to make sure the Guard page is adjavent to\r
  pool tail or pool head.\r
\r
  @param[in]  Memory    Base address of memory allocated.\r
  @param[in]  NoPages   Number of pages actually allocated.\r
  @param[in]  Size      Size of memory requested.\r
                        (plus pool head/tail overhead)\r
\r
  @return Address of pool head.\r
**/\r
VOID *\r
AdjustPoolHeadA (\r
  IN EFI_PHYSICAL_ADDRESS    Memory,\r
  IN UINTN                   NoPages,\r
  IN UINTN                   Size\r
  );\r
\r
/**\r
  Get the page base address according to pool head address.\r
\r
  @param[in]  Memory    Head address of pool to free.\r
\r
  @return Address of pool head.\r
**/\r
VOID *\r
AdjustPoolHeadF (\r
  IN EFI_PHYSICAL_ADDRESS    Memory\r
  );\r
\r
/**\r
  Helper function of memory allocation with Guard pages.\r
\r
  @param  FreePageList           The free page node.\r
  @param  NumberOfPages          Number of pages to be allocated.\r
  @param  MaxAddress             Request to allocate memory below this address.\r
  @param  MemoryType             Type of memory requested.\r
\r
  @return Memory address of allocated pages.\r
**/\r
UINTN\r
InternalAllocMaxAddressWithGuard (\r
  IN OUT LIST_ENTRY           *FreePageList,\r
  IN     UINTN                NumberOfPages,\r
  IN     UINTN                MaxAddress,\r
  IN     EFI_MEMORY_TYPE      MemoryType\r
  );\r
\r
/**\r
  Helper function of memory free with Guard pages.\r
\r
  @param[in]  Memory                 Base address of memory being freed.\r
  @param[in]  NumberOfPages          The number of pages to free.\r
  @param[in]  AddRegion              If this memory is new added region.\r
\r
  @retval EFI_NOT_FOUND          Could not find the entry that covers the range.\r
  @retval EFI_INVALID_PARAMETER  Address not aligned, Address is zero or\r
                                 NumberOfPages is zero.\r
  @return EFI_SUCCESS            Pages successfully freed.\r
**/\r
EFI_STATUS\r
SmmInternalFreePagesExWithGuard (\r
  IN EFI_PHYSICAL_ADDRESS  Memory,\r
  IN UINTN                 NumberOfPages,\r
  IN BOOLEAN               AddRegion\r
  );\r
\r
/**\r
  Check to see if the heap guard is enabled for page and/or pool allocation.\r
\r
  @return TRUE/FALSE.\r
**/\r
BOOLEAN\r
IsHeapGuardEnabled (\r
  VOID\r
  );\r
\r
/**\r
  Debug function used to verify if the Guard page is well set or not.\r
\r
  @param[in]  BaseAddress     Address of memory to check.\r
  @param[in]  NumberOfPages   Size of memory in pages.\r
\r
  @return TRUE    The head Guard and tail Guard are both well set.\r
  @return FALSE   The head Guard and/or tail Guard are not well set.\r
**/\r
BOOLEAN\r
VerifyMemoryGuard (\r
  IN  EFI_PHYSICAL_ADDRESS      BaseAddress,\r
  IN  UINTN                     NumberOfPages\r
  );\r
\r
extern BOOLEAN mOnGuarding;\r
\r
#endif\r
Commit	Line	Data
e63da9f0 JW	1	/** @file\r
	2	Data structure and functions to allocate and free memory space.\r
	3	\r
	4	Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
9d510e61	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
e63da9f0 JW	6	\r
	7	**/\r
	8	\r
	9	#ifndef _HEAPGUARD_H_\r
	10	#define _HEAPGUARD_H_\r
	11	\r
	12	#include "PiSmmCore.h"\r
	13	\r
	14	//\r
	15	// Following macros are used to define and access the guarded memory bitmap\r
	16	// table.\r
	17	//\r
	18	// To simplify the access and reduce the memory used for this table, the\r
	19	// table is constructed in the similar way as page table structure but in\r
	20	// reverse direction, i.e. from bottom growing up to top.\r
	21	//\r
	22	// - 1-bit tracks 1 page (4KB)\r
	23	// - 1-UINT64 map entry tracks 256KB memory\r
	24	// - 1K-UINT64 map table tracks 256MB memory\r
	25	// - Five levels of tables can track any address of memory of 64-bit\r
	26	// system, like below.\r
	27	//\r
	28	// 512 * 512 * 512 * 512 * 1K * 64b * 4K\r
	29	// 111111111 111111111 111111111 111111111 1111111111 111111 111111111111\r
	30	// 63 54 45 36 27 17 11 0\r
	31	// 9b 9b 9b 9b 10b 6b 12b\r
	32	// L0 -> L1 -> L2 -> L3 -> L4 -> bits -> page\r
	33	// 1FF 1FF 1FF 1FF 3FF 3F FFF\r
	34	//\r
	35	// L4 table has 1K * sizeof(UINT64) = 8K (2-page), which can track 256MB\r
	36	// memory. Each table of L0-L3 will be allocated when its memory address\r
	37	// range is to be tracked. Only 1-page will be allocated each time. This\r
	38	// can save memories used to establish this map table.\r
	39	//\r
	40	// For a normal configuration of system with 4G memory, two levels of tables\r
	41	// can track the whole memory, because two levels (L3+L4) of map tables have\r
	42	// already coverred 37-bit of memory address. And for a normal UEFI BIOS,\r
	43	// less than 128M memory would be consumed during boot. That means we just\r
	44	// need\r
	45	//\r
	46	// 1-page (L3) + 2-page (L4)\r
	47	//\r
	48	// memory (3 pages) to track the memory allocation works. In this case,\r
	49	// there's no need to setup L0-L2 tables.\r
	50	//\r
	51	\r
	52	//\r
	53	// Each entry occupies 8B/64b. 1-page can hold 512 entries, which spans 9\r
	54	// bits in address. (512 = 1 << 9)\r
	55	//\r
	56	#define BYTE_LENGTH_SHIFT 3 // (8 = 1 << 3)\r
	57	\r
	58	#define GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT \\r
	59	(EFI_PAGE_SHIFT - BYTE_LENGTH_SHIFT)\r
	60	\r
	61	#define GUARDED_HEAP_MAP_TABLE_DEPTH 5\r
	62	\r
	63	// Use UINT64_index + bit_index_of_UINT64 to locate the bit in may\r
	64	#define GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT 6 // (64 = 1 << 6)\r
	65	\r
	66	#define GUARDED_HEAP_MAP_ENTRY_BITS \\r
	67	(1 << GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)\r
	68	\r
	69	#define GUARDED_HEAP_MAP_ENTRY_BYTES \\r
70	(GUARDED_HEAP_MAP_ENTRY_BITS / 8)\r
71	\r
72	// L4 table address width: 64 - 9 * 4 - 6 - 12 = 10b\r
73	#define GUARDED_HEAP_MAP_ENTRY_SHIFT \\r
74	(GUARDED_HEAP_MAP_ENTRY_BITS \\r
75	- GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 4 \\r
76	- GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT \\r
77	- EFI_PAGE_SHIFT)\r
78	\r
79	// L4 table address mask: (1 << 10 - 1) = 0x3FF\r
80	#define GUARDED_HEAP_MAP_ENTRY_MASK \\r
81	((1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) - 1)\r
82	\r
83	// Size of each L4 table: (1 << 10) * 8 = 8KB = 2-page\r
84	#define GUARDED_HEAP_MAP_SIZE \\r
85	((1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) * GUARDED_HEAP_MAP_ENTRY_BYTES)\r
86	\r
87	// Memory size tracked by one L4 table: 8KB * 8 * 4KB = 256MB\r
88	#define GUARDED_HEAP_MAP_UNIT_SIZE \\r
89	(GUARDED_HEAP_MAP_SIZE * 8 * EFI_PAGE_SIZE)\r
90	\r
91	// L4 table entry number: 8KB / 8 = 1024\r
92	#define GUARDED_HEAP_MAP_ENTRIES_PER_UNIT \\r
93	(GUARDED_HEAP_MAP_SIZE / GUARDED_HEAP_MAP_ENTRY_BYTES)\r
94	\r
95	// L4 table entry indexing\r
96	#define GUARDED_HEAP_MAP_ENTRY_INDEX(Address) \\r
97	(RShiftU64 (Address, EFI_PAGE_SHIFT \\r
98	+ GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT) \\r
99	& GUARDED_HEAP_MAP_ENTRY_MASK)\r
100	\r
101	// L4 table entry bit indexing\r
102	#define GUARDED_HEAP_MAP_ENTRY_BIT_INDEX(Address) \\r
103	(RShiftU64 (Address, EFI_PAGE_SHIFT) \\r
104	& ((1 << GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT) - 1))\r
105	\r
106	//\r
107	// Total bits (pages) tracked by one L4 table (65536-bit)\r
108	//\r
109	#define GUARDED_HEAP_MAP_BITS \\r
110	(1 << (GUARDED_HEAP_MAP_ENTRY_SHIFT \\r
111	+ GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT))\r
112	\r
113	//\r
114	// Bit indexing inside the whole L4 table (0 - 65535)\r
115	//\r
116	#define GUARDED_HEAP_MAP_BIT_INDEX(Address) \\r
117	(RShiftU64 (Address, EFI_PAGE_SHIFT) \\r
118	& ((1 << (GUARDED_HEAP_MAP_ENTRY_SHIFT \\r
119	+ GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT)) - 1))\r
120	\r
121	//\r
122	// Memory address bit width tracked by L4 table: 10 + 6 + 12 = 28\r
123	//\r
124	#define GUARDED_HEAP_MAP_TABLE_SHIFT \\r
125	(GUARDED_HEAP_MAP_ENTRY_SHIFT + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT \\r
126	+ EFI_PAGE_SHIFT)\r
127	\r
128	//\r
129	// Macro used to initialize the local array variable for map table traversing\r
130	// {55, 46, 37, 28, 18}\r
131	//\r
132	#define GUARDED_HEAP_MAP_TABLE_DEPTH_SHIFTS \\r
133	{ \\r
134	GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 3, \\r
135	GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT * 2, \\r
136	GUARDED_HEAP_MAP_TABLE_SHIFT + GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT, \\r
137	GUARDED_HEAP_MAP_TABLE_SHIFT, \\r
138	EFI_PAGE_SHIFT + GUARDED_HEAP_MAP_ENTRY_BIT_SHIFT \\r
139	}\r
140	\r
141	//\r
142	// Masks used to extract address range of each level of table\r
143	// {0x1FF, 0x1FF, 0x1FF, 0x1FF, 0x3FF}\r
144	//\r
145	#define GUARDED_HEAP_MAP_TABLE_DEPTH_MASKS \\r
146	{ \\r
147	(1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1, \\r
148	(1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1, \\r
149	(1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1, \\r
150	(1 << GUARDED_HEAP_MAP_TABLE_ENTRY_SHIFT) - 1, \\r
151	(1 << GUARDED_HEAP_MAP_ENTRY_SHIFT) - 1 \\r
152	}\r
153	\r
154	//\r
155	// Memory type to guard (matching the related PCD definition)\r
156	//\r
38d870fc JW	157	#define GUARD_HEAP_TYPE_PAGE BIT2\r
38d870fc JW	158	#define GUARD_HEAP_TYPE_POOL BIT3\r
e63da9f0 JW	159	\r
	160	//\r
	161	// Debug message level\r
	162	//\r
	163	#define HEAP_GUARD_DEBUG_LEVEL (DEBUG_POOL\|DEBUG_PAGE)\r
	164	\r
	165	typedef struct {\r
	166	UINT32 TailMark;\r
	167	UINT32 HeadMark;\r
	168	EFI_PHYSICAL_ADDRESS Address;\r
	169	LIST_ENTRY Link;\r
	170	} HEAP_GUARD_NODE;\r
	171	\r
	172	/**\r
	173	Set head Guard and tail Guard for the given memory range.\r
	174	\r
	175	@param[in] Memory Base address of memory to set guard for.\r
	176	@param[in] NumberOfPages Memory size in pages.\r
	177	\r
	178	@return VOID.\r
	179	**/\r
	180	VOID\r
	181	SetGuardForMemory (\r
	182	IN EFI_PHYSICAL_ADDRESS Memory,\r
	183	IN UINTN NumberOfPages\r
	184	);\r
	185	\r
	186	/**\r
	187	Unset head Guard and tail Guard for the given memory range.\r
	188	\r
	189	@param[in] Memory Base address of memory to unset guard for.\r
	190	@param[in] NumberOfPages Memory size in pages.\r
	191	\r
	192	@return VOID.\r
	193	**/\r
	194	VOID\r
	195	UnsetGuardForMemory (\r
	196	IN EFI_PHYSICAL_ADDRESS Memory,\r
	197	IN UINTN NumberOfPages\r
	198	);\r
	199	\r
	200	/**\r
	201	Adjust the base and number of pages to really allocate according to Guard.\r
	202	\r
	203	@param[in,out] Memory Base address of free memory.\r
	204	@param[in,out] NumberOfPages Size of memory to allocate.\r
	205	\r
	206	@return VOID.\r
	207	**/\r
	208	VOID\r
	209	AdjustMemoryA (\r
	210	IN OUT EFI_PHYSICAL_ADDRESS *Memory,\r
	211	IN OUT UINTN *NumberOfPages\r
	212	);\r
	213	\r
	214	/**\r
	215	Adjust the start address and number of pages to free according to Guard.\r
	216	\r
	217	The purpose of this function is to keep the shared Guard page with adjacent\r
	218	memory block if it's still in guard, or free it if no more sharing. Another\r
	219	is to reserve pages as Guard pages in partial page free situation.\r
	220	\r
	221	@param[in,out] Memory Base address of memory to free.\r
	222	@param[in,out] NumberOfPages Size of memory to free.\r
223	\r
224	@return VOID.\r
225	**/\r
226	VOID\r
227	AdjustMemoryF (\r
228	IN OUT EFI_PHYSICAL_ADDRESS *Memory,\r
229	IN OUT UINTN *NumberOfPages\r
230	);\r
231	\r
232	/**\r
233	Check to see if the pool at the given address should be guarded or not.\r
234	\r
235	@param[in] MemoryType Pool type to check.\r
236	\r
237	\r
238	@return TRUE The given type of pool should be guarded.\r
239	@return FALSE The given type of pool should not be guarded.\r
240	**/\r
241	BOOLEAN\r
242	IsPoolTypeToGuard (\r
243	IN EFI_MEMORY_TYPE MemoryType\r
244	);\r
245	\r
246	/**\r
247	Check to see if the page at the given address should be guarded or not.\r
248	\r
249	@param[in] MemoryType Page type to check.\r
250	@param[in] AllocateType Allocation type to check.\r
251	\r
252	@return TRUE The given type of page should be guarded.\r
253	@return FALSE The given type of page should not be guarded.\r
254	**/\r
255	BOOLEAN\r
256	IsPageTypeToGuard (\r
257	IN EFI_MEMORY_TYPE MemoryType,\r
258	IN EFI_ALLOCATE_TYPE AllocateType\r
259	);\r
260	\r
261	/**\r
262	Check to see if the page at the given address is guarded or not.\r
263	\r
264	@param[in] Address The address to check for.\r
265	\r
266	@return TRUE The page at Address is guarded.\r
267	@return FALSE The page at Address is not guarded.\r
268	**/\r
269	BOOLEAN\r
270	EFIAPI\r
271	IsMemoryGuarded (\r
272	IN EFI_PHYSICAL_ADDRESS Address\r
273	);\r
274	\r
275	/**\r
276	Check to see if the page at the given address is a Guard page or not.\r
277	\r
278	@param[in] Address The address to check for.\r
279	\r
280	@return TRUE The page at Address is a Guard page.\r
281	@return FALSE The page at Address is not a Guard page.\r
282	**/\r
283	BOOLEAN\r
284	EFIAPI\r
285	IsGuardPage (\r
286	IN EFI_PHYSICAL_ADDRESS Address\r
287	);\r
288	\r
289	/**\r
290	Dump the guarded memory bit map.\r
291	**/\r
292	VOID\r
293	EFIAPI\r
294	DumpGuardedMemoryBitmap (\r
295	VOID\r
296	);\r
297	\r
298	/**\r
299	Adjust the pool head position to make sure the Guard page is adjavent to\r
300	pool tail or pool head.\r
301	\r
302	@param[in] Memory Base address of memory allocated.\r
303	@param[in] NoPages Number of pages actually allocated.\r
304	@param[in] Size Size of memory requested.\r
305	(plus pool head/tail overhead)\r
306	\r
307	@return Address of pool head.\r
308	**/\r
309	VOID *\r
310	AdjustPoolHeadA (\r
311	IN EFI_PHYSICAL_ADDRESS Memory,\r
312	IN UINTN NoPages,\r
313	IN UINTN Size\r
314	);\r
315	\r
316	/**\r
317	Get the page base address according to pool head address.\r
318	\r
319	@param[in] Memory Head address of pool to free.\r
320	\r
321	@return Address of pool head.\r
322	**/\r
323	VOID *\r
324	AdjustPoolHeadF (\r
325	IN EFI_PHYSICAL_ADDRESS Memory\r
326	);\r
327	\r
328	/**\r
329	Helper function of memory allocation with Guard pages.\r
330	\r
331	@param FreePageList The free page node.\r
332	@param NumberOfPages Number of pages to be allocated.\r
333	@param MaxAddress Request to allocate memory below this address.\r
334	@param MemoryType Type of memory requested.\r
335	\r
336	@return Memory address of allocated pages.\r
337	**/\r
338	UINTN\r
339	InternalAllocMaxAddressWithGuard (\r
340	IN OUT LIST_ENTRY *FreePageList,\r
341	IN UINTN NumberOfPages,\r
342	IN UINTN MaxAddress,\r
343	IN EFI_MEMORY_TYPE MemoryType\r
344	);\r
345	\r
346	/**\r
347	Helper function of memory free with Guard pages.\r
348	\r
349	@param[in] Memory Base address of memory being freed.\r
350	@param[in] NumberOfPages The number of pages to free.\r
351	@param[in] AddRegion If this memory is new added region.\r
352	\r
353	@retval EFI_NOT_FOUND Could not find the entry that covers the range.\r
354	@retval EFI_INVALID_PARAMETER Address not aligned, Address is zero or\r
355	NumberOfPages is zero.\r
356	@return EFI_SUCCESS Pages successfully freed.\r
357	**/\r
358	EFI_STATUS\r
359	SmmInternalFreePagesExWithGuard (\r
360	IN EFI_PHYSICAL_ADDRESS Memory,\r
361	IN UINTN NumberOfPages,\r
362	IN BOOLEAN AddRegion\r
363	);\r
364	\r
365	/**\r
366	Check to see if the heap guard is enabled for page and/or pool allocation.\r
367	\r
368	@return TRUE/FALSE.\r
369	**/\r
370	BOOLEAN\r
371	IsHeapGuardEnabled (\r
372	VOID\r
373	);\r
374	\r
375	/**\r
376	Debug function used to verify if the Guard page is well set or not.\r
377	\r
378	@param[in] BaseAddress Address of memory to check.\r
379	@param[in] NumberOfPages Size of memory in pages.\r
380	\r
381	@return TRUE The head Guard and tail Guard are both well set.\r
382	@return FALSE The head Guard and/or tail Guard are not well set.\r
383	**/\r
384	BOOLEAN\r
385	VerifyMemoryGuard (\r
386	IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
387	IN UINTN NumberOfPages\r
388	);\r
389	\r
390	extern BOOLEAN mOnGuarding;\r
391	\r
392	#endif\r