]> git.proxmox.com Git - mirror_edk2.git/blame - MdeModulePkg/Include/Ppi/SmmControl.h
MdeModulePkg: Replace BSD License with BSD+Patent License
[mirror_edk2.git] / MdeModulePkg / Include / Ppi / SmmControl.h
CommitLineData
3e4df77f 1/** @file\r
2 EFI SMM Control PPI definition.\r
3\r
4 This PPI is used to initiate SMI/PMI activations. This protocol could be published by either:\r
5 - A processor driver to abstract the SMI/PMI IPI\r
6 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
7 Intel chipset\r
8 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
9 event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based\r
10 systems.\r
11\r
d1102dba 12 Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
3e4df77f 13\r
9d510e61 14 SPDX-License-Identifier: BSD-2-Clause-Patent\r
3e4df77f 15\r
16**/\r
17\r
18\r
19#ifndef _SMM_CONTROL_PPI_H_\r
20#define _SMM_CONTROL_PPI_H_\r
21\r
22#define PEI_SMM_CONTROL_PPI_GUID \\r
23 { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }\r
24\r
25typedef struct _PEI_SMM_CONTROL_PPI PEI_SMM_CONTROL_PPI;\r
26\r
27/**\r
28 Invokes SMI activation from either the preboot or runtime environment.\r
29\r
30 @param PeiServices General purpose services available to every PEIM.\r
31 @param This The PEI_SMM_CONTROL_PPI instance.\r
32 @param ArgumentBuffer The optional sized data to pass into the protocol activation.\r
33 @param ArgumentBufferSize The optional size of the data.\r
34 @param Periodic An optional mechanism to periodically repeat activation.\r
35 @param ActivationInterval An optional parameter to repeat at this period one\r
36 time or, if the Periodic Boolean is set, periodically.\r
37\r
38 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
39 @retval EFI_DEVICE_ERROR The timing is unsupported.\r
40 @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
41 @retval EFI_NOT_STARTED The SMM base service has not been initialized.\r
42\r
43**/\r
44typedef\r
45EFI_STATUS\r
46(EFIAPI *PEI_SMM_ACTIVATE) (\r
47 IN EFI_PEI_SERVICES **PeiServices,\r
48 IN PEI_SMM_CONTROL_PPI * This,\r
49 IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
50 IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
51 IN BOOLEAN Periodic OPTIONAL,\r
52 IN UINTN ActivationInterval OPTIONAL\r
53 );\r
54\r
55/**\r
56 Clears any system state that was created in response to the Active call.\r
57\r
58 @param PeiServices General purpose services available to every PEIM.\r
59 @param This The PEI_SMM_CONTROL_PPI instance.\r
d1102dba 60 @param Periodic Optional parameter to repeat at this period one\r
3e4df77f 61 time or, if the Periodic Boolean is set, periodically.\r
62\r
63 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
64 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
65 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
66\r
67**/\r
68typedef\r
69EFI_STATUS\r
70(EFIAPI *PEI_SMM_DEACTIVATE) (\r
71 IN EFI_PEI_SERVICES **PeiServices,\r
72 IN PEI_SMM_CONTROL_PPI * This,\r
73 IN BOOLEAN Periodic OPTIONAL\r
74 );\r
75\r
76///\r
77/// PEI SMM Control PPI is used to initiate SMI/PMI activations. This protocol could be published by either:\r
78/// - A processor driver to abstract the SMI/PMI IPI\r
79/// - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
80/// Intel chipset\r
d1102dba 81///\r
3e4df77f 82struct _PEI_SMM_CONTROL_PPI {\r
83 PEI_SMM_ACTIVATE Trigger;\r
84 PEI_SMM_DEACTIVATE Clear;\r
85};\r
86\r
87extern EFI_GUID gPeiSmmControlPpiGuid;\r
88\r
89#endif\r