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1/** @file\r
2 EFI IOMMU Protocol.\r
3\r
4Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
5This program and the accompanying materials are licensed and made available under\r
6the terms and conditions of the BSD License that accompanies this distribution.\r
7The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php.\r
9\r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/\r
14\r
15\r
16#ifndef __IOMMU_H__\r
17#define __IOMMU_H__\r
18\r
19//\r
20// IOMMU Protocol GUID value\r
21//\r
22#define EDKII_IOMMU_PROTOCOL_GUID \\r
23 { \\r
24 0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \\r
25 }\r
26\r
27//\r
28// Forward reference for pure ANSI compatability\r
29//\r
30typedef struct _EDKII_IOMMU_PROTOCOL EDKII_IOMMU_PROTOCOL;\r
31\r
32//\r
33// Revision The revision to which the IOMMU interface adheres.\r
34// All future revisions must be backwards compatible.\r
35// If a future version is not back wards compatible it is not the same GUID.\r
36//\r
37#define EDKII_IOMMU_PROTOCOL_REVISION 0x00010000\r
38\r
39//\r
40// IOMMU Access for SetAttribute\r
41//\r
42// These types can be "ORed" together as needed.\r
43// Any undefined bits are reserved and must be zero.\r
44//\r
45#define EDKII_IOMMU_ACCESS_READ 0x1\r
46#define EDKII_IOMMU_ACCESS_WRITE 0x2\r
47\r
48//\r
49// IOMMU Operation for Map\r
50//\r
51typedef enum {\r
52 ///\r
53 /// A read operation from system memory by a bus master that is not capable of producing\r
54 /// PCI dual address cycles.\r
55 ///\r
56 EdkiiIoMmuOperationBusMasterRead,\r
57 ///\r
58 /// A write operation from system memory by a bus master that is not capable of producing\r
59 /// PCI dual address cycles.\r
60 ///\r
61 EdkiiIoMmuOperationBusMasterWrite,\r
62 ///\r
63 /// Provides both read and write access to system memory by both the processor and a bus\r
64 /// master that is not capable of producing PCI dual address cycles.\r
65 ///\r
66 EdkiiIoMmuOperationBusMasterCommonBuffer,\r
67 ///\r
68 /// A read operation from system memory by a bus master that is capable of producing PCI\r
69 /// dual address cycles.\r
70 ///\r
71 EdkiiIoMmuOperationBusMasterRead64,\r
72 ///\r
73 /// A write operation to system memory by a bus master that is capable of producing PCI\r
74 /// dual address cycles.\r
75 ///\r
76 EdkiiIoMmuOperationBusMasterWrite64,\r
77 ///\r
78 /// Provides both read and write access to system memory by both the processor and a bus\r
79 /// master that is capable of producing PCI dual address cycles.\r
80 ///\r
81 EdkiiIoMmuOperationBusMasterCommonBuffer64,\r
82 EdkiiIoMmuOperationMaximum\r
83} EDKII_IOMMU_OPERATION;\r
84\r
85//\r
86// IOMMU attribute for AllocateBuffer\r
87// Any undefined bits are reserved and must be zero.\r
88//\r
89#define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080\r
90#define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED 0x0800\r
91#define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000\r
92\r
93#define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE | EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED | EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
94\r
95#define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
96\r
97/**\r
98 Set IOMMU attribute for a system memory.\r
99\r
100 If the IOMMU protocol exists, the system memory cannot be used\r
101 for DMA by default.\r
102\r
103 When a device requests a DMA access for a system memory,\r
104 the device driver need use SetAttribute() to update the IOMMU\r
105 attribute to request DMA access (read and/or write).\r
106\r
107 The DeviceHandle is used to identify which device submits the request.\r
108 The IOMMU implementation need translate the device path to an IOMMU device ID,\r
109 and set IOMMU hardware register accordingly.\r
110 1) DeviceHandle can be a standard PCI device.\r
111 The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.\r
112 The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.\r
113 The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ|EDKII_IOMMU_ACCESS_WRITE.\r
114 After the memory is used, the memory need set 0 to keep it being protected.\r
115 2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).\r
116 The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.\r
117\r
118 @param[in] This The protocol instance pointer.\r
119 @param[in] DeviceHandle The device who initiates the DMA access request.\r
120 @param[in] Mapping The mapping value returned from Map().\r
121 @param[in] IoMmuAccess The IOMMU access.\r
122\r
123 @retval EFI_SUCCESS The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.\r
124 @retval EFI_INVALID_PARAMETER DeviceHandle is an invalid handle.\r
125 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
126 @retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combination of access.\r
127 @retval EFI_UNSUPPORTED DeviceHandle is unknown by the IOMMU.\r
128 @retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not supported by the IOMMU.\r
129 @retval EFI_UNSUPPORTED The IOMMU does not support the memory range specified by Mapping.\r
130 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to modify the IOMMU access.\r
131 @retval EFI_DEVICE_ERROR The IOMMU device reported an error while attempting the operation.\r
132\r
133**/\r
134typedef\r
135EFI_STATUS\r
136(EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(\r
137 IN EDKII_IOMMU_PROTOCOL *This,\r
138 IN EFI_HANDLE DeviceHandle,\r
139 IN VOID *Mapping,\r
140 IN UINT64 IoMmuAccess\r
141 );\r
142\r
143/**\r
144 Provides the controller-specific addresses required to access system memory from a\r
145 DMA bus master.\r
146\r
147 @param This The protocol instance pointer.\r
148 @param Operation Indicates if the bus master is going to read or write to system memory.\r
149 @param HostAddress The system memory address to map to the PCI controller.\r
150 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
151 that were mapped.\r
152 @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
153 access the hosts HostAddress.\r
154 @param Mapping A resulting value to pass to Unmap().\r
155\r
156 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
157 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
158 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
159 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
160 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
161\r
162**/\r
163typedef\r
164EFI_STATUS\r
165(EFIAPI *EDKII_IOMMU_MAP)(\r
166 IN EDKII_IOMMU_PROTOCOL *This,\r
167 IN EDKII_IOMMU_OPERATION Operation,\r
168 IN VOID *HostAddress,\r
169 IN OUT UINTN *NumberOfBytes,\r
170 OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
171 OUT VOID **Mapping\r
172 );\r
173\r
174/**\r
175 Completes the Map() operation and releases any corresponding resources.\r
176\r
177 @param This The protocol instance pointer.\r
178 @param Mapping The mapping value returned from Map().\r
179\r
180 @retval EFI_SUCCESS The range was unmapped.\r
181 @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
182 @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
183**/\r
184typedef\r
185EFI_STATUS\r
186(EFIAPI *EDKII_IOMMU_UNMAP)(\r
187 IN EDKII_IOMMU_PROTOCOL *This,\r
188 IN VOID *Mapping\r
189 );\r
190\r
191/**\r
192 Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
193 OperationBusMasterCommonBuffer64 mapping.\r
194\r
195 @param This The protocol instance pointer.\r
196 @param Type This parameter is not used and must be ignored.\r
197 @param MemoryType The type of memory to allocate, EfiBootServicesData or\r
198 EfiRuntimeServicesData.\r
199 @param Pages The number of pages to allocate.\r
200 @param HostAddress A pointer to store the base system memory address of the\r
201 allocated range.\r
202 @param Attributes The requested bit mask of attributes for the allocated range.\r
203\r
204 @retval EFI_SUCCESS The requested memory pages were allocated.\r
205 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
b02f14f3 206 MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.\r
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207 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
208 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
209\r
210**/\r
211typedef\r
212EFI_STATUS\r
213(EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(\r
214 IN EDKII_IOMMU_PROTOCOL *This,\r
215 IN EFI_ALLOCATE_TYPE Type,\r
216 IN EFI_MEMORY_TYPE MemoryType,\r
217 IN UINTN Pages,\r
218 IN OUT VOID **HostAddress,\r
219 IN UINT64 Attributes\r
220 );\r
221\r
222/**\r
223 Frees memory that was allocated with AllocateBuffer().\r
224\r
225 @param This The protocol instance pointer.\r
226 @param Pages The number of pages to free.\r
227 @param HostAddress The base system memory address of the allocated range.\r
228\r
229 @retval EFI_SUCCESS The requested memory pages were freed.\r
230 @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
231 was not allocated with AllocateBuffer().\r
232\r
233**/\r
234typedef\r
235EFI_STATUS\r
236(EFIAPI *EDKII_IOMMU_FREE_BUFFER)(\r
237 IN EDKII_IOMMU_PROTOCOL *This,\r
238 IN UINTN Pages,\r
239 IN VOID *HostAddress\r
240 );\r
241\r
242///\r
243/// IOMMU Protocol structure.\r
244///\r
245struct _EDKII_IOMMU_PROTOCOL {\r
246 UINT64 Revision;\r
247 EDKII_IOMMU_SET_ATTRIBUTE SetAttribute;\r
248 EDKII_IOMMU_MAP Map;\r
249 EDKII_IOMMU_UNMAP Unmap;\r
250 EDKII_IOMMU_ALLOCATE_BUFFER AllocateBuffer;\r
251 EDKII_IOMMU_FREE_BUFFER FreeBuffer;\r
252};\r
253\r
254///\r
255/// IOMMU Protocol GUID variable.\r
256///\r
257extern EFI_GUID gEdkiiIoMmuProtocolGuid;\r
258\r
259#endif\r