[mirror_edk2.git] / MdeModulePkg / Include / Protocol / IoMmu.h

/** @file\r
  EFI IOMMU Protocol.\r
\r
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
\r
#ifndef __IOMMU_H__\r
#define __IOMMU_H__\r
\r
//\r
// IOMMU Protocol GUID value\r
//\r
#define EDKII_IOMMU_PROTOCOL_GUID \\r
    { \\r
      0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \\r
    }\r
\r
//\r
// Forward reference for pure ANSI compatability\r
//\r
typedef struct _EDKII_IOMMU_PROTOCOL  EDKII_IOMMU_PROTOCOL;\r
\r
//\r
// Revision The revision to which the IOMMU interface adheres.\r
//          All future revisions must be backwards compatible.\r
//          If a future version is not back wards compatible it is not the same GUID.\r
//\r
#define EDKII_IOMMU_PROTOCOL_REVISION 0x00010000\r
\r
//\r
// IOMMU Access for SetAttribute\r
//\r
// These types can be "ORed" together as needed.\r
// Any undefined bits are reserved and must be zero.\r
//\r
#define EDKII_IOMMU_ACCESS_READ   0x1\r
#define EDKII_IOMMU_ACCESS_WRITE  0x2\r
\r
//\r
// IOMMU Operation for Map\r
//\r
typedef enum {\r
  ///\r
  /// A read operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterRead,\r
  ///\r
  /// A write operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterWrite,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is not capable of producing PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterCommonBuffer,\r
  ///\r
  /// A read operation from system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterRead64,\r
  ///\r
  /// A write operation to system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterWrite64,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is capable of producing PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterCommonBuffer64,\r
  EdkiiIoMmuOperationMaximum\r
} EDKII_IOMMU_OPERATION;\r
\r
//\r
// IOMMU attribute for AllocateBuffer\r
// Any undefined bits are reserved and must be zero.\r
//\r
#define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE        0x0080\r
#define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED               0x0800\r
#define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE          0x8000\r
\r
#define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER   (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE | EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED | EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
\r
#define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
\r
/**\r
  Set IOMMU attribute for a system memory.\r
\r
  If the IOMMU protocol exists, the system memory cannot be used\r
  for DMA by default.\r
\r
  When a device requests a DMA access for a system memory,\r
  the device driver need use SetAttribute() to update the IOMMU\r
  attribute to request DMA access (read and/or write).\r
\r
  The DeviceHandle is used to identify which device submits the request.\r
  The IOMMU implementation need translate the device path to an IOMMU device ID,\r
  and set IOMMU hardware register accordingly.\r
  1) DeviceHandle can be a standard PCI device.\r
     The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.\r
     The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.\r
     The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ|EDKII_IOMMU_ACCESS_WRITE.\r
     After the memory is used, the memory need set 0 to keep it being protected.\r
  2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).\r
     The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.\r
\r
  @param[in]  This              The protocol instance pointer.\r
  @param[in]  DeviceHandle      The device who initiates the DMA access request.\r
  @param[in]  Mapping           The mapping value returned from Map().\r
  @param[in]  IoMmuAccess       The IOMMU access.\r
\r
  @retval EFI_SUCCESS            The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.\r
  @retval EFI_INVALID_PARAMETER  DeviceHandle is an invalid handle.\r
  @retval EFI_INVALID_PARAMETER  Mapping is not a value that was returned by Map().\r
  @retval EFI_INVALID_PARAMETER  IoMmuAccess specified an illegal combination of access.\r
  @retval EFI_UNSUPPORTED        DeviceHandle is unknown by the IOMMU.\r
  @retval EFI_UNSUPPORTED        The bit mask of IoMmuAccess is not supported by the IOMMU.\r
  @retval EFI_UNSUPPORTED        The IOMMU does not support the memory range specified by Mapping.\r
  @retval EFI_OUT_OF_RESOURCES   There are not enough resources available to modify the IOMMU access.\r
  @retval EFI_DEVICE_ERROR       The IOMMU device reported an error while attempting the operation.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(\r
  IN EDKII_IOMMU_PROTOCOL  *This,\r
  IN EFI_HANDLE            DeviceHandle,\r
  IN VOID                  *Mapping,\r
  IN UINT64                IoMmuAccess\r
  );\r
\r
/**\r
  Provides the controller-specific addresses required to access system memory from a\r
  DMA bus master.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Operation             Indicates if the bus master is going to read or write to system memory.\r
  @param  HostAddress           The system memory address to map to the PCI controller.\r
  @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes\r
                                that were mapped.\r
  @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to\r
                                access the hosts HostAddress.\r
  @param  Mapping               A resulting value to pass to Unmap().\r
\r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_MAP)(\r
  IN     EDKII_IOMMU_PROTOCOL                       *This,\r
  IN     EDKII_IOMMU_OPERATION                      Operation,\r
  IN     VOID                                       *HostAddress,\r
  IN OUT UINTN                                      *NumberOfBytes,\r
  OUT    EFI_PHYSICAL_ADDRESS                       *DeviceAddress,\r
  OUT    VOID                                       **Mapping\r
  );\r
\r
/**\r
  Completes the Map() operation and releases any corresponding resources.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Mapping               The mapping value returned from Map().\r
\r
  @retval EFI_SUCCESS           The range was unmapped.\r
  @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
  @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_UNMAP)(\r
  IN  EDKII_IOMMU_PROTOCOL                     *This,\r
  IN  VOID                                     *Mapping\r
  );\r
\r
/**\r
  Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
  OperationBusMasterCommonBuffer64 mapping.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Type                  This parameter is not used and must be ignored.\r
  @param  MemoryType            The type of memory to allocate, EfiBootServicesData or\r
                                EfiRuntimeServicesData.\r
  @param  Pages                 The number of pages to allocate.\r
  @param  HostAddress           A pointer to store the base system memory address of the\r
                                allocated range.\r
  @param  Attributes            The requested bit mask of attributes for the allocated range.\r
\r
  @retval EFI_SUCCESS           The requested memory pages were allocated.\r
  @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are\r
                                MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(\r
  IN     EDKII_IOMMU_PROTOCOL                     *This,\r
  IN     EFI_ALLOCATE_TYPE                        Type,\r
  IN     EFI_MEMORY_TYPE                          MemoryType,\r
  IN     UINTN                                    Pages,\r
  IN OUT VOID                                     **HostAddress,\r
  IN     UINT64                                   Attributes\r
  );\r
\r
/**\r
  Frees memory that was allocated with AllocateBuffer().\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Pages                 The number of pages to free.\r
  @param  HostAddress           The base system memory address of the allocated range.\r
\r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
                                was not allocated with AllocateBuffer().\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_FREE_BUFFER)(\r
  IN  EDKII_IOMMU_PROTOCOL                     *This,\r
  IN  UINTN                                    Pages,\r
  IN  VOID                                     *HostAddress\r
  );\r
\r
///\r
/// IOMMU Protocol structure.\r
///\r
struct _EDKII_IOMMU_PROTOCOL {\r
  UINT64                              Revision;\r
  EDKII_IOMMU_SET_ATTRIBUTE           SetAttribute;\r
  EDKII_IOMMU_MAP                     Map;\r
  EDKII_IOMMU_UNMAP                   Unmap;\r
  EDKII_IOMMU_ALLOCATE_BUFFER         AllocateBuffer;\r
  EDKII_IOMMU_FREE_BUFFER             FreeBuffer;\r
};\r
\r
///\r
/// IOMMU Protocol GUID variable.\r
///\r
extern EFI_GUID gEdkiiIoMmuProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
d1fddc45 JY	1	/** @file\r
	2	EFI IOMMU Protocol.\r
	3	\r
	4	Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
9d510e61	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
d1fddc45 JY	6	\r
	7	**/\r
	8	\r
	9	\r
	10	#ifndef __IOMMU_H__\r
	11	#define __IOMMU_H__\r
	12	\r
	13	//\r
	14	// IOMMU Protocol GUID value\r
	15	//\r
	16	#define EDKII_IOMMU_PROTOCOL_GUID \\r
	17	{ \\r
	18	0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \\r
	19	}\r
	20	\r
	21	//\r
	22	// Forward reference for pure ANSI compatability\r
	23	//\r
	24	typedef struct _EDKII_IOMMU_PROTOCOL EDKII_IOMMU_PROTOCOL;\r
	25	\r
	26	//\r
	27	// Revision The revision to which the IOMMU interface adheres.\r
	28	// All future revisions must be backwards compatible.\r
	29	// If a future version is not back wards compatible it is not the same GUID.\r
	30	//\r
	31	#define EDKII_IOMMU_PROTOCOL_REVISION 0x00010000\r
	32	\r
	33	//\r
	34	// IOMMU Access for SetAttribute\r
	35	//\r
	36	// These types can be "ORed" together as needed.\r
	37	// Any undefined bits are reserved and must be zero.\r
	38	//\r
	39	#define EDKII_IOMMU_ACCESS_READ 0x1\r
	40	#define EDKII_IOMMU_ACCESS_WRITE 0x2\r
	41	\r
	42	//\r
	43	// IOMMU Operation for Map\r
	44	//\r
	45	typedef enum {\r
	46	///\r
	47	/// A read operation from system memory by a bus master that is not capable of producing\r
	48	/// PCI dual address cycles.\r
	49	///\r
	50	EdkiiIoMmuOperationBusMasterRead,\r
	51	///\r
	52	/// A write operation from system memory by a bus master that is not capable of producing\r
	53	/// PCI dual address cycles.\r
	54	///\r
	55	EdkiiIoMmuOperationBusMasterWrite,\r
	56	///\r
	57	/// Provides both read and write access to system memory by both the processor and a bus\r
	58	/// master that is not capable of producing PCI dual address cycles.\r
	59	///\r
	60	EdkiiIoMmuOperationBusMasterCommonBuffer,\r
	61	///\r
	62	/// A read operation from system memory by a bus master that is capable of producing PCI\r
	63	/// dual address cycles.\r
	64	///\r
	65	EdkiiIoMmuOperationBusMasterRead64,\r
	66	///\r
	67	/// A write operation to system memory by a bus master that is capable of producing PCI\r
	68	/// dual address cycles.\r
	69	///\r
70	EdkiiIoMmuOperationBusMasterWrite64,\r
71	///\r
72	/// Provides both read and write access to system memory by both the processor and a bus\r
73	/// master that is capable of producing PCI dual address cycles.\r
74	///\r
75	EdkiiIoMmuOperationBusMasterCommonBuffer64,\r
76	EdkiiIoMmuOperationMaximum\r
77	} EDKII_IOMMU_OPERATION;\r
78	\r
79	//\r
80	// IOMMU attribute for AllocateBuffer\r
81	// Any undefined bits are reserved and must be zero.\r
82	//\r
83	#define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080\r
84	#define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED 0x0800\r
85	#define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000\r
86	\r
87	#define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED \| EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
88	\r
89	#define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
90	\r
91	/**\r
92	Set IOMMU attribute for a system memory.\r
93	\r
94	If the IOMMU protocol exists, the system memory cannot be used\r
95	for DMA by default.\r
96	\r
97	When a device requests a DMA access for a system memory,\r
98	the device driver need use SetAttribute() to update the IOMMU\r
99	attribute to request DMA access (read and/or write).\r
100	\r
101	The DeviceHandle is used to identify which device submits the request.\r
102	The IOMMU implementation need translate the device path to an IOMMU device ID,\r
103	and set IOMMU hardware register accordingly.\r
104	1) DeviceHandle can be a standard PCI device.\r
105	The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.\r
106	The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.\r
107	The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ\|EDKII_IOMMU_ACCESS_WRITE.\r
108	After the memory is used, the memory need set 0 to keep it being protected.\r
109	2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).\r
110	The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.\r
111	\r
112	@param[in] This The protocol instance pointer.\r
113	@param[in] DeviceHandle The device who initiates the DMA access request.\r
114	@param[in] Mapping The mapping value returned from Map().\r
115	@param[in] IoMmuAccess The IOMMU access.\r
116	\r
117	@retval EFI_SUCCESS The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.\r
118	@retval EFI_INVALID_PARAMETER DeviceHandle is an invalid handle.\r
119	@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
120	@retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combination of access.\r
121	@retval EFI_UNSUPPORTED DeviceHandle is unknown by the IOMMU.\r
122	@retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not supported by the IOMMU.\r
123	@retval EFI_UNSUPPORTED The IOMMU does not support the memory range specified by Mapping.\r
124	@retval EFI_OUT_OF_RESOURCES There are not enough resources available to modify the IOMMU access.\r
125	@retval EFI_DEVICE_ERROR The IOMMU device reported an error while attempting the operation.\r
126	\r
127	**/\r
128	typedef\r
129	EFI_STATUS\r
130	(EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(\r
131	IN EDKII_IOMMU_PROTOCOL *This,\r
132	IN EFI_HANDLE DeviceHandle,\r
133	IN VOID *Mapping,\r
134	IN UINT64 IoMmuAccess\r
135	);\r
136	\r
137	/**\r
138	Provides the controller-specific addresses required to access system memory from a\r
139	DMA bus master.\r
140	\r
141	@param This The protocol instance pointer.\r
142	@param Operation Indicates if the bus master is going to read or write to system memory.\r
143	@param HostAddress The system memory address to map to the PCI controller.\r
144	@param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
145	that were mapped.\r
146	@param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
147	access the hosts HostAddress.\r
148	@param Mapping A resulting value to pass to Unmap().\r
149	\r
150	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
151	@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
152	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
153	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
154	@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
155	\r
156	**/\r
157	typedef\r
158	EFI_STATUS\r
159	(EFIAPI *EDKII_IOMMU_MAP)(\r
160	IN EDKII_IOMMU_PROTOCOL *This,\r
161	IN EDKII_IOMMU_OPERATION Operation,\r
162	IN VOID *HostAddress,\r
163	IN OUT UINTN *NumberOfBytes,\r
164	OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
165	OUT VOID **Mapping\r
166	);\r
167	\r
168	/**\r
169	Completes the Map() operation and releases any corresponding resources.\r
170	\r
171	@param This The protocol instance pointer.\r
172	@param Mapping The mapping value returned from Map().\r
173	\r
174	@retval EFI_SUCCESS The range was unmapped.\r
175	@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
176	@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
177	**/\r
178	typedef\r
179	EFI_STATUS\r
180	(EFIAPI *EDKII_IOMMU_UNMAP)(\r
181	IN EDKII_IOMMU_PROTOCOL *This,\r
182	IN VOID *Mapping\r
183	);\r
184	\r
185	/**\r
186	Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
187	OperationBusMasterCommonBuffer64 mapping.\r
188	\r
189	@param This The protocol instance pointer.\r
190	@param Type This parameter is not used and must be ignored.\r
191	@param MemoryType The type of memory to allocate, EfiBootServicesData or\r
192	EfiRuntimeServicesData.\r
193	@param Pages The number of pages to allocate.\r
194	@param HostAddress A pointer to store the base system memory address of the\r
195	allocated range.\r
196	@param Attributes The requested bit mask of attributes for the allocated range.\r
197	\r
198	@retval EFI_SUCCESS The requested memory pages were allocated.\r
199	@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
b02f14f3	200	MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.\r
d1fddc45 JY	201	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	202	@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
	203	\r
	204	**/\r
	205	typedef\r
	206	EFI_STATUS\r
	207	(EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(\r
	208	IN EDKII_IOMMU_PROTOCOL *This,\r
	209	IN EFI_ALLOCATE_TYPE Type,\r
	210	IN EFI_MEMORY_TYPE MemoryType,\r
	211	IN UINTN Pages,\r
	212	IN OUT VOID **HostAddress,\r
	213	IN UINT64 Attributes\r
	214	);\r
	215	\r
	216	/**\r
	217	Frees memory that was allocated with AllocateBuffer().\r
	218	\r
	219	@param This The protocol instance pointer.\r
	220	@param Pages The number of pages to free.\r
	221	@param HostAddress The base system memory address of the allocated range.\r
	222	\r
	223	@retval EFI_SUCCESS The requested memory pages were freed.\r
	224	@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
	225	was not allocated with AllocateBuffer().\r
	226	\r
	227	**/\r
	228	typedef\r
	229	EFI_STATUS\r
	230	(EFIAPI *EDKII_IOMMU_FREE_BUFFER)(\r
	231	IN EDKII_IOMMU_PROTOCOL *This,\r
	232	IN UINTN Pages,\r
	233	IN VOID *HostAddress\r
	234	);\r
	235	\r
	236	///\r
	237	/// IOMMU Protocol structure.\r
	238	///\r
	239	struct _EDKII_IOMMU_PROTOCOL {\r
	240	UINT64 Revision;\r
	241	EDKII_IOMMU_SET_ATTRIBUTE SetAttribute;\r
	242	EDKII_IOMMU_MAP Map;\r
	243	EDKII_IOMMU_UNMAP Unmap;\r
	244	EDKII_IOMMU_ALLOCATE_BUFFER AllocateBuffer;\r
	245	EDKII_IOMMU_FREE_BUFFER FreeBuffer;\r
	246	};\r
	247	\r
	248	///\r
	249	/// IOMMU Protocol GUID variable.\r
	250	///\r
	251	extern EFI_GUID gEdkiiIoMmuProtocolGuid;\r
	252	\r
	253	#endif\r