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79e19664 JJ |
1 | ;; @file\r |
2 | ; This is the assembly code for transferring to control to OS S3 waking vector\r | |
3 | ; for X64 platform\r | |
4 | ;\r | |
5 | ; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r | |
6 | ;\r | |
7 | ; This program and the accompanying materials\r | |
8 | ; are licensed and made available under the terms and conditions of the BSD License\r | |
9 | ; which accompanies this distribution. The full text of the license may be found at\r | |
10 | ; http://opensource.org/licenses/bsd-license.php\r | |
11 | ;\r | |
12 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | ;\r | |
15 | ;;\r | |
16 | \r | |
17 | extern ASM_PFX(mOriginalHandler)\r | |
18 | extern ASM_PFX(PageFaultHandler)\r | |
19 | \r | |
20 | DEFAULT REL\r | |
21 | SECTION .text\r | |
22 | \r | |
23 | global ASM_PFX(AsmFixAddress16)\r | |
24 | global ASM_PFX(AsmJmpAddr32)\r | |
25 | \r | |
26 | global ASM_PFX(AsmTransferControl)\r | |
27 | ASM_PFX(AsmTransferControl):\r | |
28 | ; rcx S3WakingVector :DWORD\r | |
29 | ; rdx AcpiLowMemoryBase :DWORD\r | |
30 | lea eax, [.0]\r | |
31 | mov r8, 0x2800000000\r | |
32 | or rax, r8\r | |
33 | push rax\r | |
34 | shrd ebx, ecx, 20\r | |
35 | and ecx, 0xf\r | |
36 | mov bx, cx\r | |
f4a94a7c | 37 | mov [@jmp_addr + 1], ebx\r |
79e19664 | 38 | retf\r |
f4a94a7c | 39 | BITS 16\r |
79e19664 | 40 | .0:\r |
f4a94a7c LG |
41 | mov ax, 0x30\r |
42 | mov ds, ax\r | |
43 | mov es, ax\r | |
44 | mov fs, ax\r | |
45 | mov gs, ax\r | |
46 | mov ss, ax\r | |
47 | mov eax, cr0\r | |
48 | mov ebx, cr4\r | |
79e19664 JJ |
49 | and eax, ((~ 0x80000001) & 0xffffffff)\r |
50 | and bl, ~ (1 << 5)\r | |
f4a94a7c | 51 | mov cr0, eax\r |
79e19664 JJ |
52 | mov ecx, 0xc0000080\r |
53 | rdmsr\r | |
54 | and ah, ~ 1\r | |
55 | wrmsr\r | |
f4a94a7c LG |
56 | mov cr4, ebx\r |
57 | @jmp_addr:\r | |
58 | jmp 0x0:0x0\r | |
79e19664 JJ |
59 | \r |
60 | global ASM_PFX(AsmTransferControl32)\r | |
61 | ASM_PFX(AsmTransferControl32):\r | |
f4a94a7c | 62 | BITS 32\r |
79e19664 JJ |
63 | ; S3WakingVector :DWORD\r |
64 | ; AcpiLowMemoryBase :DWORD\r | |
f4a94a7c | 65 | push ebp\r |
79e19664 JJ |
66 | mov ebp, esp\r |
67 | DB 0x8d, 0x5 ; lea eax, AsmTransferControl16\r | |
68 | ASM_PFX(AsmFixAddress16): DD 0\r | |
69 | push 0x28 ; CS\r | |
f4a94a7c | 70 | push eax\r |
79e19664 JJ |
71 | retf\r |
72 | \r | |
73 | global ASM_PFX(AsmTransferControl16)\r | |
74 | ASM_PFX(AsmTransferControl16):\r | |
f4a94a7c LG |
75 | BITS 16\r |
76 | mov ax, 0x30\r | |
77 | o32 mov ds, eax\r | |
78 | o32 mov es, eax\r | |
79 | o32 mov fs, eax\r | |
80 | o32 mov gs, eax\r | |
81 | o32 mov ss, eax\r | |
82 | mov eax, cr0 ; Get control register 0\r | |
83 | and eax, 0fffffffeh ; Clear PE bit (bit #0)\r | |
84 | mov cr0, eax ; Activate real mode\r | |
79e19664 JJ |
85 | DB 0xea ; jmp far AsmJmpAddr32\r |
86 | ASM_PFX(AsmJmpAddr32): DD 0\r | |
87 | \r | |
88 | global ASM_PFX(PageFaultHandlerHook)\r | |
89 | ASM_PFX(PageFaultHandlerHook):\r | |
f4a94a7c | 90 | BITS 64\r |
79e19664 JJ |
91 | push rax ; save all volatile registers\r |
92 | push rcx\r | |
93 | push rdx\r | |
94 | push r8\r | |
95 | push r9\r | |
96 | push r10\r | |
97 | push r11\r | |
98 | ; save volatile fp registers\r | |
99 | add rsp, -0x68\r | |
100 | stmxcsr [rsp + 0x60]\r | |
101 | movdqa [rsp + 0x0], xmm0\r | |
102 | movdqa [rsp + 0x10], xmm1\r | |
103 | movdqa [rsp + 0x20], xmm2\r | |
104 | movdqa [rsp + 0x30], xmm3\r | |
105 | movdqa [rsp + 0x40], xmm4\r | |
106 | movdqa [rsp + 0x50], xmm5\r | |
107 | \r | |
108 | add rsp, -0x20\r | |
109 | call ASM_PFX(PageFaultHandler)\r | |
110 | add rsp, 0x20\r | |
111 | \r | |
112 | ; load volatile fp registers\r | |
113 | ldmxcsr [rsp + 0x60]\r | |
114 | movdqa xmm0, [rsp + 0x0]\r | |
115 | movdqa xmm1, [rsp + 0x10]\r | |
116 | movdqa xmm2, [rsp + 0x20]\r | |
117 | movdqa xmm3, [rsp + 0x30]\r | |
118 | movdqa xmm4, [rsp + 0x40]\r | |
119 | movdqa xmm5, [rsp + 0x50]\r | |
120 | add rsp, 0x68\r | |
121 | \r | |
122 | test al, al\r | |
123 | \r | |
124 | pop r11\r | |
125 | pop r10\r | |
126 | pop r9\r | |
127 | pop r8\r | |
128 | pop rdx\r | |
129 | pop rcx\r | |
130 | pop rax ; restore all volatile registers\r | |
131 | jnz .1\r | |
f4a94a7c | 132 | jmp qword [ASM_PFX(mOriginalHandler)]\r |
79e19664 JJ |
133 | .1:\r |
134 | add rsp, 0x8 ; skip error code for PF\r | |
135 | iretq\r | |
136 | \r |