[mirror_edk2.git] / MdeModulePkg / Universal / Acpi / BootScriptExecutorDxe / X64 / SetIdtEntry.c

/** @file\r
  Set a IDT entry for debug purpose\r
\r
  Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform\r
\r
Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
#include "ScriptExecute.h"\r
\r
//\r
// 8 extra pages for PF handler.\r
//\r
#define EXTRA_PAGE_TABLE_PAGES      8\r
\r
#define IA32_PG_P                   BIT0\r
#define IA32_PG_RW                  BIT1\r
#define IA32_PG_PS                  BIT7\r
\r
UINT64                              mPhyMask;\r
VOID                                *mOriginalHandler;\r
UINTN                               mPageFaultBuffer;\r
UINTN                               mPageFaultIndex = 0;\r
//\r
// Store the uplink information for each page being used.\r
//\r
UINT64                              *mPageFaultUplink[EXTRA_PAGE_TABLE_PAGES];\r
\r
/**\r
  Page fault handler.\r
\r
**/\r
VOID\r
EFIAPI\r
PageFaultHandlerHook (\r
  VOID\r
  );\r
\r
/**\r
  Hook IDT with our page fault handler so that the on-demand paging works on page fault.\r
\r
  @param  IdtEntry  a pointer to IDT entry\r
\r
**/\r
VOID\r
HookPageFaultHandler (\r
  IN IA32_IDT_GATE_DESCRIPTOR                   *IdtEntry\r
  )\r
{\r
  UINT32         RegEax;\r
  UINT8          PhysicalAddressBits;\r
  UINTN          PageFaultHandlerHookAddress;\r
\r
  AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
  if (RegEax >= 0x80000008) {\r
    AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
    PhysicalAddressBits = (UINT8) RegEax;\r
  } else {\r
    PhysicalAddressBits = 36;\r
  }\r
  mPhyMask = LShiftU64 (1, PhysicalAddressBits) - 1;\r
  mPhyMask &= (1ull << 48) - SIZE_4KB;\r
\r
  //\r
  // Set Page Fault entry to catch >4G access\r
  //\r
  PageFaultHandlerHookAddress = (UINTN)PageFaultHandlerHook;\r
  mOriginalHandler = (VOID *)(UINTN)(LShiftU64 (IdtEntry->Bits.OffsetUpper, 32) + IdtEntry->Bits.OffsetLow + (IdtEntry->Bits.OffsetHigh << 16));\r
  IdtEntry->Bits.OffsetLow      = (UINT16)PageFaultHandlerHookAddress;\r
  IdtEntry->Bits.Selector       = (UINT16)AsmReadCs ();\r
  IdtEntry->Bits.Reserved_0     = 0;\r
  IdtEntry->Bits.GateType       = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
  IdtEntry->Bits.OffsetHigh     = (UINT16)(PageFaultHandlerHookAddress >> 16);\r
  IdtEntry->Bits.OffsetUpper    = (UINT32)(PageFaultHandlerHookAddress >> 32);\r
  IdtEntry->Bits.Reserved_1     = 0;\r
\r
  if (mPage1GSupport) {\r
    mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(2);\r
  }else {\r
    mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(6);\r
  }\r
  ZeroMem (mPageFaultUplink, sizeof (mPageFaultUplink));\r
}\r
\r
/**\r
  The function will check if current waking vector is long mode.\r
\r
  @param  AcpiS3Context                 a pointer to a structure of ACPI_S3_CONTEXT\r
\r
  @retval TRUE   Current context need long mode waking vector.\r
  @retval FALSE  Current context need not long mode waking vector.\r
**/\r
BOOLEAN\r
IsLongModeWakingVector (\r
  IN ACPI_S3_CONTEXT                *AcpiS3Context\r
  )\r
{\r
  EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE  *Facs;\r
\r
  Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r
  if ((Facs == NULL) ||\r
      (Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) ||\r
      ((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r
    // Something wrong with FACS\r
    return FALSE;\r
  }\r
  if (Facs->XFirmwareWakingVector != 0) {\r
    if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r
        ((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r
        ((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r
      // Both BIOS and OS wants 64bit vector\r
      if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
        return TRUE;\r
      }\r
    }\r
  }\r
  return FALSE;\r
}\r
\r
/**\r
  Set a IDT entry for interrupt vector 3 for debug purpose.\r
\r
  @param  AcpiS3Context  a pointer to a structure of ACPI_S3_CONTEXT\r
\r
**/\r
VOID\r
SetIdtEntry (\r
  IN ACPI_S3_CONTEXT     *AcpiS3Context\r
  )\r
{\r
  IA32_IDT_GATE_DESCRIPTOR                      *IdtEntry;\r
  IA32_DESCRIPTOR                               *IdtDescriptor;\r
  UINTN                                         S3DebugBuffer;\r
  EFI_STATUS                                    Status;\r
\r
  //\r
  // Restore IDT for debug\r
  //\r
  IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);\r
  AsmWriteIdtr (IdtDescriptor);\r
\r
  //\r
  // Setup the default CPU exception handlers\r
  //\r
  Status = InitializeCpuExceptionHandlers (NULL);\r
  ASSERT_EFI_ERROR (Status);\r
\r
  DEBUG_CODE (\r
    //\r
    // Update IDT entry INT3 if the instruction is valid in it\r
    //\r
    S3DebugBuffer = (UINTN) (AcpiS3Context->S3DebugBufferAddress);\r
    if (*(UINTN *)S3DebugBuffer != (UINTN) -1) {\r
      IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (3 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));\r
      IdtEntry->Bits.OffsetLow      = (UINT16)S3DebugBuffer;\r
      IdtEntry->Bits.Selector       = (UINT16)AsmReadCs ();\r
      IdtEntry->Bits.Reserved_0     = 0;\r
      IdtEntry->Bits.GateType       = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
      IdtEntry->Bits.OffsetHigh     = (UINT16)(S3DebugBuffer >> 16);\r
      IdtEntry->Bits.OffsetUpper    = (UINT32)(S3DebugBuffer >> 32);\r
      IdtEntry->Bits.Reserved_1     = 0;\r
    }\r
  );\r
\r
  //\r
  // If both BIOS and OS wants long mode waking vector,\r
  // S3ResumePei should have established 1:1 Virtual to Physical identity mapping page table,\r
  // no need to hook page fault handler.\r
  //\r
  if (!IsLongModeWakingVector (AcpiS3Context)) {\r
    IdtEntry = (IA32_IDT_GATE_DESCRIPTOR *)(IdtDescriptor->Base + (14 * sizeof (IA32_IDT_GATE_DESCRIPTOR)));\r
    HookPageFaultHandler (IdtEntry);\r
  }\r
}\r
\r
/**\r
  Acquire page for page fault.\r
\r
  @param[in, out] Uplink        Pointer to up page table entry.\r
\r
**/\r
VOID\r
AcquirePage (\r
  IN OUT UINT64                 *Uplink\r
  )\r
{\r
  UINTN             Address;\r
\r
  Address = mPageFaultBuffer + EFI_PAGES_TO_SIZE (mPageFaultIndex);\r
  ZeroMem ((VOID *) Address, EFI_PAGES_TO_SIZE (1));\r
\r
  //\r
  // Cut the previous uplink if it exists and wasn't overwritten.\r
  //\r
  if ((mPageFaultUplink[mPageFaultIndex] != NULL) && ((*mPageFaultUplink[mPageFaultIndex] & mPhyMask) == Address)) {\r
    *mPageFaultUplink[mPageFaultIndex] = 0;\r
  }\r
\r
  //\r
  // Link & Record the current uplink.\r
  //\r
  *Uplink = Address | IA32_PG_P | IA32_PG_RW;\r
  mPageFaultUplink[mPageFaultIndex] = Uplink;\r
\r
  mPageFaultIndex = (mPageFaultIndex + 1) % EXTRA_PAGE_TABLE_PAGES;\r
}\r
\r
/**\r
  The page fault handler that on-demand read >4G memory/MMIO.\r
  \r
  @retval TRUE     The page fault is correctly handled.\r
  @retval FALSE    The page fault is not handled and is passed through to original handler.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
PageFaultHandler (\r
  VOID\r
  )\r
{\r
  UINT64         *PageTable;\r
  UINT64         PFAddress;\r
  UINTN          PTIndex;\r
\r
  PFAddress = AsmReadCr2 ();\r
  DEBUG ((EFI_D_ERROR, "BootScript - PageFaultHandler: Cr2 - %lx\n", PFAddress));\r
\r
  if (PFAddress >= mPhyMask + SIZE_4KB) {\r
    return FALSE;\r
  }\r
  PFAddress &= mPhyMask;\r
\r
  PageTable = (UINT64*)(UINTN)(AsmReadCr3 () & mPhyMask);\r
\r
  PTIndex = BitFieldRead64 (PFAddress, 39, 47);\r
  // PML4E\r
  if ((PageTable[PTIndex] & IA32_PG_P) == 0) {\r
    AcquirePage (&PageTable[PTIndex]);\r
  }\r
  PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);\r
  PTIndex = BitFieldRead64 (PFAddress, 30, 38);\r
  // PDPTE\r
  if (mPage1GSupport) {\r
    PageTable[PTIndex] = (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;\r
  } else {\r
    if ((PageTable[PTIndex] & IA32_PG_P) == 0) {\r
      AcquirePage (&PageTable[PTIndex]);\r
    }\r
    PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);\r
    PTIndex = BitFieldRead64 (PFAddress, 21, 29);\r
    // PD\r
    PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P | IA32_PG_RW | IA32_PG_PS;\r
  }\r
\r
  return TRUE;\r
}\r
Commit	Line	Data
be46cd5f	1	/** @file\r
	2	Set a IDT entry for debug purpose\r
	3	\r
	4	Set a IDT entry for interrupt vector 3 for debug purpose for x64 platform\r
	5	\r
c6368abc	6	Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
be46cd5f	7	\r
	8	This program and the accompanying materials\r
	9	are licensed and made available under the terms and conditions of the BSD License\r
	10	which accompanies this distribution. The full text of the license may be found at\r
	11	http://opensource.org/licenses/bsd-license.php\r
	12	\r
	13	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	14	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	15	\r
	16	**/\r
	17	#include "ScriptExecute.h"\r
d0bf5623	18	\r
c6368abc SZ	19	//\r
	20	// 8 extra pages for PF handler.\r
	21	//\r
	22	#define EXTRA_PAGE_TABLE_PAGES 8\r
	23	\r
d0bf5623 JY	24	#define IA32_PG_P BIT0\r
	25	#define IA32_PG_RW BIT1\r
	26	#define IA32_PG_PS BIT7\r
	27	\r
c6368abc SZ	28	UINT64 mPhyMask;\r
	29	VOID *mOriginalHandler;\r
	30	UINTN mPageFaultBuffer;\r
	31	UINTN mPageFaultIndex = 0;\r
	32	//\r
	33	// Store the uplink information for each page being used.\r
	34	//\r
	35	UINT64 *mPageFaultUplink[EXTRA_PAGE_TABLE_PAGES];\r
d0bf5623	36	\r
54e27ada JY	37	/**\r
	38	Page fault handler.\r
	39	\r
	40	**/\r
d0bf5623 JY	41	VOID\r
	42	EFIAPI\r
	43	PageFaultHandlerHook (\r
	44	VOID\r
	45	);\r
	46	\r
54e27ada JY	47	/**\r
	48	Hook IDT with our page fault handler so that the on-demand paging works on page fault.\r
	49	\r
	50	@param IdtEntry a pointer to IDT entry\r
	51	\r
	52	**/\r
d0bf5623 JY	53	VOID\r
d0bf5623 JY	54	HookPageFaultHandler (\r
68cc1ba3	55	IN IA32_IDT_GATE_DESCRIPTOR *IdtEntry\r
d0bf5623 JY	56	)\r
	57	{\r
	58	UINT32 RegEax;\r
59cc677c	59	UINT8 PhysicalAddressBits;\r
73f0127f	60	UINTN PageFaultHandlerHookAddress;\r
d0bf5623	61	\r
59cc677c SZ	62	AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
	63	if (RegEax >= 0x80000008) {\r
	64	AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
	65	PhysicalAddressBits = (UINT8) RegEax;\r
	66	} else {\r
	67	PhysicalAddressBits = 36;\r
d0bf5623	68	}\r
59cc677c SZ	69	mPhyMask = LShiftU64 (1, PhysicalAddressBits) - 1;\r
59cc677c SZ	70	mPhyMask &= (1ull << 48) - SIZE_4KB;\r
d0bf5623 JY	71	\r
	72	//\r
	73	// Set Page Fault entry to catch >4G access\r
	74	//\r
73f0127f	75	PageFaultHandlerHookAddress = (UINTN)PageFaultHandlerHook;\r
68cc1ba3	76	mOriginalHandler = (VOID *)(UINTN)(LShiftU64 (IdtEntry->Bits.OffsetUpper, 32) + IdtEntry->Bits.OffsetLow + (IdtEntry->Bits.OffsetHigh << 16));\r
73f0127f	77	IdtEntry->Bits.OffsetLow = (UINT16)PageFaultHandlerHookAddress;\r
68cc1ba3 SZ	78	IdtEntry->Bits.Selector = (UINT16)AsmReadCs ();\r
	79	IdtEntry->Bits.Reserved_0 = 0;\r
	80	IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
73f0127f SZ	81	IdtEntry->Bits.OffsetHigh = (UINT16)(PageFaultHandlerHookAddress >> 16);\r
73f0127f SZ	82	IdtEntry->Bits.OffsetUpper = (UINT32)(PageFaultHandlerHookAddress >> 32);\r
68cc1ba3	83	IdtEntry->Bits.Reserved_1 = 0;\r
d0bf5623 JY	84	\r
d0bf5623 JY	85	if (mPage1GSupport) {\r
c6368abc	86	mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(2);\r
d0bf5623	87	}else {\r
c6368abc SZ	88	mPageFaultBuffer = (UINTN)(AsmReadCr3 () & mPhyMask) + EFI_PAGES_TO_SIZE(6);\r
	89	}\r
	90	ZeroMem (mPageFaultUplink, sizeof (mPageFaultUplink));\r
	91	}\r
	92	\r
	93	/**\r
	94	The function will check if current waking vector is long mode.\r
	95	\r
	96	@param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
	97	\r
	98	@retval TRUE Current context need long mode waking vector.\r
	99	@retval FALSE Current context need not long mode waking vector.\r
	100	**/\r
	101	BOOLEAN\r
	102	IsLongModeWakingVector (\r
	103	IN ACPI_S3_CONTEXT *AcpiS3Context\r
	104	)\r
	105	{\r
	106	EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *Facs;\r
	107	\r
	108	Facs = (EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE *) ((UINTN) (AcpiS3Context->AcpiFacsTable));\r
	109	if ((Facs == NULL) \|\|\r
	110	(Facs->Signature != EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE) \|\|\r
	111	((Facs->FirmwareWakingVector == 0) && (Facs->XFirmwareWakingVector == 0)) ) {\r
	112	// Something wrong with FACS\r
	113	return FALSE;\r
	114	}\r
	115	if (Facs->XFirmwareWakingVector != 0) {\r
	116	if ((Facs->Version == EFI_ACPI_4_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION) &&\r
	117	((Facs->Flags & EFI_ACPI_4_0_64BIT_WAKE_SUPPORTED_F) != 0) &&\r
	118	((Facs->Flags & EFI_ACPI_4_0_OSPM_64BIT_WAKE__F) != 0)) {\r
	119	// Both BIOS and OS wants 64bit vector\r
	120	if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) {\r
	121	return TRUE;\r
	122	}\r
	123	}\r
d0bf5623	124	}\r
c6368abc	125	return FALSE;\r
d0bf5623 JY	126	}\r
d0bf5623 JY	127	\r
be46cd5f	128	/**\r
	129	Set a IDT entry for interrupt vector 3 for debug purpose.\r
	130	\r
	131	@param AcpiS3Context a pointer to a structure of ACPI_S3_CONTEXT\r
	132	\r
	133	**/\r
	134	VOID\r
	135	SetIdtEntry (\r
	136	IN ACPI_S3_CONTEXT *AcpiS3Context\r
	137	)\r
	138	{\r
68cc1ba3	139	IA32_IDT_GATE_DESCRIPTOR *IdtEntry;\r
be46cd5f	140	IA32_DESCRIPTOR *IdtDescriptor;\r
be46cd5f	141	UINTN S3DebugBuffer;\r
57f360f2	142	EFI_STATUS Status;\r
be46cd5f	143	\r
	144	//\r
	145	// Restore IDT for debug\r
	146	//\r
	147	IdtDescriptor = (IA32_DESCRIPTOR *) (UINTN) (AcpiS3Context->IdtrProfile);\r
1e172d6b	148	AsmWriteIdtr (IdtDescriptor);\r
	149	\r
	150	//\r
	151	// Setup the default CPU exception handlers\r
	152	//\r
57f360f2 JF	153	Status = InitializeCpuExceptionHandlers (NULL);\r
57f360f2 JF	154	ASSERT_EFI_ERROR (Status);\r
1e172d6b	155	\r
f4a25e81	156	DEBUG_CODE (\r
	157	//\r
	158	// Update IDT entry INT3 if the instruction is valid in it\r
	159	//\r
	160	S3DebugBuffer = (UINTN) (AcpiS3Context->S3DebugBufferAddress);\r
	161	if ((UINTN )S3DebugBuffer != (UINTN) -1) {\r
68cc1ba3 SZ	162	IdtEntry = (IA32_IDT_GATE_DESCRIPTOR )(IdtDescriptor->Base + (3 sizeof (IA32_IDT_GATE_DESCRIPTOR)));\r
	163	IdtEntry->Bits.OffsetLow = (UINT16)S3DebugBuffer;\r
	164	IdtEntry->Bits.Selector = (UINT16)AsmReadCs ();\r
	165	IdtEntry->Bits.Reserved_0 = 0;\r
	166	IdtEntry->Bits.GateType = IA32_IDT_GATE_TYPE_INTERRUPT_32;\r
	167	IdtEntry->Bits.OffsetHigh = (UINT16)(S3DebugBuffer >> 16);\r
	168	IdtEntry->Bits.OffsetUpper = (UINT32)(S3DebugBuffer >> 32);\r
	169	IdtEntry->Bits.Reserved_1 = 0;\r
f4a25e81	170	}\r
f4a25e81	171	);\r
be46cd5f	172	\r
c6368abc SZ	173	//\r
	174	// If both BIOS and OS wants long mode waking vector,\r
	175	// S3ResumePei should have established 1:1 Virtual to Physical identity mapping page table,\r
	176	// no need to hook page fault handler.\r
	177	//\r
	178	if (!IsLongModeWakingVector (AcpiS3Context)) {\r
	179	IdtEntry = (IA32_IDT_GATE_DESCRIPTOR )(IdtDescriptor->Base + (14 sizeof (IA32_IDT_GATE_DESCRIPTOR)));\r
	180	HookPageFaultHandler (IdtEntry);\r
	181	}\r
d0bf5623 JY	182	}\r
d0bf5623 JY	183	\r
54e27ada	184	/**\r
c6368abc	185	Acquire page for page fault.\r
54e27ada	186	\r
c6368abc	187	@param[in, out] Uplink Pointer to up page table entry.\r
54e27ada	188	\r
54e27ada	189	**/\r
c6368abc SZ	190	VOID\r
	191	AcquirePage (\r
	192	IN OUT UINT64 *Uplink\r
d0bf5623 JY	193	)\r
d0bf5623 JY	194	{\r
c6368abc SZ	195	UINTN Address;\r
	196	\r
	197	Address = mPageFaultBuffer + EFI_PAGES_TO_SIZE (mPageFaultIndex);\r
	198	ZeroMem ((VOID *) Address, EFI_PAGES_TO_SIZE (1));\r
	199	\r
	200	//\r
	201	// Cut the previous uplink if it exists and wasn't overwritten.\r
	202	//\r
	203	if ((mPageFaultUplink[mPageFaultIndex] != NULL) && ((*mPageFaultUplink[mPageFaultIndex] & mPhyMask) == Address)) {\r
	204	*mPageFaultUplink[mPageFaultIndex] = 0;\r
	205	}\r
	206	\r
	207	//\r
	208	// Link & Record the current uplink.\r
	209	//\r
	210	*Uplink = Address \| IA32_PG_P \| IA32_PG_RW;\r
	211	mPageFaultUplink[mPageFaultIndex] = Uplink;\r
	212	\r
	213	mPageFaultIndex = (mPageFaultIndex + 1) % EXTRA_PAGE_TABLE_PAGES;\r
be46cd5f	214	}\r
be46cd5f	215	\r
54e27ada JY	216	/**\r
	217	The page fault handler that on-demand read >4G memory/MMIO.\r
	218	\r
	219	@retval TRUE The page fault is correctly handled.\r
	220	@retval FALSE The page fault is not handled and is passed through to original handler.\r
	221	\r
	222	**/\r
d0bf5623 JY	223	BOOLEAN\r
	224	EFIAPI\r
	225	PageFaultHandler (\r
	226	VOID\r
	227	)\r
	228	{\r
	229	UINT64 *PageTable;\r
	230	UINT64 PFAddress;\r
	231	UINTN PTIndex;\r
	232	\r
	233	PFAddress = AsmReadCr2 ();\r
	234	DEBUG ((EFI_D_ERROR, "BootScript - PageFaultHandler: Cr2 - %lx\n", PFAddress));\r
	235	\r
	236	if (PFAddress >= mPhyMask + SIZE_4KB) {\r
	237	return FALSE;\r
	238	}\r
	239	PFAddress &= mPhyMask;\r
	240	\r
	241	PageTable = (UINT64*)(UINTN)(AsmReadCr3 () & mPhyMask);\r
	242	\r
	243	PTIndex = BitFieldRead64 (PFAddress, 39, 47);\r
	244	// PML4E\r
	245	if ((PageTable[PTIndex] & IA32_PG_P) == 0) {\r
c6368abc	246	AcquirePage (&PageTable[PTIndex]);\r
d0bf5623 JY	247	}\r
	248	PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);\r
	249	PTIndex = BitFieldRead64 (PFAddress, 30, 38);\r
	250	// PDPTE\r
	251	if (mPage1GSupport) {\r
c6368abc	252	PageTable[PTIndex] = (PFAddress & ~((1ull << 30) - 1)) \| IA32_PG_P \| IA32_PG_RW \| IA32_PG_PS;\r
d0bf5623 JY	253	} else {\r
d0bf5623 JY	254	if ((PageTable[PTIndex] & IA32_PG_P) == 0) {\r
c6368abc	255	AcquirePage (&PageTable[PTIndex]);\r
d0bf5623 JY	256	}\r
	257	PageTable = (UINT64*)(UINTN)(PageTable[PTIndex] & mPhyMask);\r
	258	PTIndex = BitFieldRead64 (PFAddress, 21, 29);\r
	259	// PD\r
c6368abc	260	PageTable[PTIndex] = (PFAddress & ~((1ull << 21) - 1)) \| IA32_PG_P \| IA32_PG_RW \| IA32_PG_PS;\r
d0bf5623 JY	261	}\r
	262	\r
	263	return TRUE;\r
	264	}\r