projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 7b414b4e | 1 | /// @file\r |
| 2 | /// This is set of macros used in calculating offsets in the IVT.\r | |
| 3 | ///\r | |
| e5eed7d3 HT |
4 | /// Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r |
| 5 | /// This program and the accompanying materials\r | |
| 7b414b4e | 6 | /// are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | /// which accompanies this distribution. The full text of the license may be found at\r | |
| 8 | /// http://opensource.org/licenses/bsd-license.php\r | |
| 9 | ///\r | |
| 10 | /// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | /// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | ///\r | |
| 7b414b4e | 13 | ///\r |
| 14 | \r | |
| c1f23d63 | 15 | \r |
| 16 | #define EXCPT_EXTERNAL_INTERRUPT 12\r | |
| 17 | #define MASK_0_4 0x000000000000001F // mask bits 0 through 4\r | |
| 18 | #define SLOT0 0\r | |
| 19 | #define SLOT1 1\r | |
| 20 | #define SLOT2 2\r | |
| 21 | \r | |
| 22 | #define PSR_DT 17\r | |
| 23 | #define PSR_TB 26\r | |
| 24 | #define PSR_RT 27\r | |
| 25 | #define PSR_IS 34\r | |
| 26 | #define PSR_IT 36\r | |
| 27 | #define PSR_IC 13\r | |
| 28 | #define PSR_I 14\r | |
| 29 | #define PSR_SS 40\r | |
| 30 | #define PSR_BN 44\r | |
| 31 | #define PSR_RI_MASK 0x60000000000\r | |
| 32 | \r | |
| 33 | #define EXCPT_EXTERNAL_INTERRUPT 12\r | |
| 34 | \r | |
| 35 | #define SCRATCH_REG0 r23\r | |
| 36 | #define SCRATCH_REG1 r24\r | |
| 37 | #define SCRATCH_REG2 r25\r | |
| 38 | #define SCRATCH_REG3 r26\r | |
| 39 | #define SCRATCH_REG4 r27\r | |
| 40 | #define SCRATCH_REG5 r28\r | |
| 41 | #define SCRATCH_REG6 r29\r | |
| 42 | #define PR_REG r30\r | |
| 43 | #define B0_REG r31\r | |
| 44 | \r | |
| 45 | \r | |
| 46 | // EXT_INT_OFFSET is the offset of the external interrupt entry in the IVT\r | |
| 47 | #define EXT_INT_ENTRY_OFFSET 0x03000\r | |
| 48 | \r | |
| 49 | // PATCH_ENTRY_OFFSET is the offset into the IVT of the entry that is coopted (stolen)\r | |
| 50 | // for use by the handler. The entire entry is restored when the handler is\r | |
| 51 | // unloaded.\r | |
| 52 | #define PATCH_ENTRY_OFFSET 0x03400\r | |
| 53 | \r | |
| f8c9de87 | 54 | // PATCH_CODE_SIZE is the size of patch code\r |
| 55 | #define PATCH_CODE_SIZE (EndPatchCode - PatchCode)\r | |
| c1f23d63 | 56 | \r |
| 57 | // A hard coded branch back into the external interrupt IVT entry's second bundle\r | |
| 58 | // is put here, just in case the original bundle zero did not have a branch\r | |
| 59 | // This is the last bundle in the reserved IVT entry\r | |
| 60 | #define FAILSAFE_BRANCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - 0x10)\r | |
| 61 | \r | |
| 62 | // the original external interrupt IVT entry bundle zero is copied and relocated\r | |
| 63 | // here... also in the reserved IVT entry\r | |
| 64 | // This is the second-to-last bundle in the reserved IVT entry\r | |
| 65 | #define RELOCATED_EXT_INT (PATCH_ENTRY_OFFSET + 0x400 - 0x20)\r | |
| 66 | \r | |
| 67 | // The patch is actually stored at the end of IVT:PATCH_ENTRY. The PATCH_OFFSET\r | |
| 68 | // is the offset into IVT where the patch is actually stored. It is carefully\r | |
| 69 | // located so that when we run out of patch code, the next bundle is the\r | |
| 70 | // relocated bundle 0 from the original external interrupt handler\r | |
| 71 | #define PATCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCode ) - 0x20)\r | |
| 72 | \r | |
| 73 | #define PATCH_RETURN_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCodeRet ) - 0x20)\r | |
| 74 | \r | |
| 75 | // PATCH_BRANCH is used only in the new bundle that is placed at the beginning\r | |
| 76 | // of the external interrupt IVT entry.\r | |
| 77 | #define PATCH_BRANCH (PATCH_OFFSET - EXT_INT_ENTRY_OFFSET)\r | |
| 78 | \r |