[mirror_edk2.git] / MdeModulePkg / Universal / DebugSupportDxe / X64 / AsmFuncs.asm

;/** @file\r
;  Low level x64 routines used by the debug support driver.\r
;\r
;  Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
;  This program and the accompanying materials\r
;  are licensed and made available under the terms and conditions of the BSD License\r
;  which accompanies this distribution.  The full text of the license may be found at\r
;  http://opensource.org/licenses/bsd-license.php\r
;\r
;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
;**/\r
\r
EXCPT64_DIVIDE_ERROR     EQU    0\r
EXCPT64_DEBUG            EQU    1\r
EXCPT64_NMI              EQU    2\r
EXCPT64_BREAKPOINT       EQU    3\r
EXCPT64_OVERFLOW         EQU    4\r
EXCPT64_BOUND            EQU    5\r
EXCPT64_INVALID_OPCODE   EQU    6\r
EXCPT64_DOUBLE_FAULT     EQU    8\r
EXCPT64_INVALID_TSS      EQU   10\r
EXCPT64_SEG_NOT_PRESENT  EQU   11\r
EXCPT64_STACK_FAULT      EQU   12\r
EXCPT64_GP_FAULT         EQU   13\r
EXCPT64_PAGE_FAULT       EQU   14\r
EXCPT64_FP_ERROR         EQU   16\r
EXCPT64_ALIGNMENT_CHECK  EQU   17\r
EXCPT64_MACHINE_CHECK    EQU   18\r
EXCPT64_SIMD             EQU   19\r
\r
FXSTOR_FLAG              EQU   01000000h         ; bit cpuid 24 of feature flags\r
\r
;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,\r
;; MMX, SSE, SSE2, etc registers.  The initialization of the debugsupport driver\r
;; MUST check the CPUID feature flags to see that these instructions are available\r
;; and fail to init if they are not.\r
\r
;; fxstor [rdi]\r
FXSTOR_RDI               MACRO\r
                         db 0fh, 0aeh, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [rdi]\r
ENDM\r
\r
;; fxrstor [rsi]\r
FXRSTOR_RSI              MACRO\r
                         db 0fh, 0aeh, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [rsi]\r
ENDM\r
\r
data SEGMENT\r
\r
public          OrigVector, InterruptEntryStub, StubSize, CommonIdtEntry, FxStorSupport\r
\r
StubSize        dd      InterruptEntryStubEnd - InterruptEntryStub\r
AppRsp          dq      1111111111111111h ; ?\r
DebugRsp        dq      2222222222222222h ; ?\r
ExtraPush       dq      3333333333333333h ; ?\r
ExceptData      dq      4444444444444444h ; ?\r
Rflags          dq      5555555555555555h ; ?\r
OrigVector      dq      6666666666666666h ; ?\r
\r
;; The declarations below define the memory region that will be used for the debug stack.\r
;; The context record will be built by pushing register values onto this stack.\r
;; It is imparitive that alignment be carefully managed, since the FXSTOR and\r
;; FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.\r
;;\r
;; The stub will switch stacks from the application stack to the debuger stack\r
;; and pushes the exception number.\r
;;\r
;; Then we building the context record on the stack. Since the stack grows down,\r
;; we push the fields of the context record from the back to the front.  There\r
;; are 336 bytes of stack used prior allocating the 512 bytes of stack to be\r
;; used as the memory buffer for the fxstor instruction. Therefore address of\r
;; the buffer used for the FXSTOR instruction is &Eax - 336 - 512, which\r
;; must be 16 byte aligned.\r
;;\r
;; We carefully locate the stack to make this happen.\r
;;\r
;; For reference, the context structure looks like this:\r
;;      struct {\r
;;        UINT64            ExceptionData;\r
;;        FX_SAVE_STATE_X64 FxSaveState;    // 512 bytes, must be 16 byte aligned\r
;;        UINT64            Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
;;        UINT64            Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
;;        UINT64            RFlags;\r
;;        UINT64            Ldtr, Tr;\r
;;        UINT64            Gdtr[2], Idtr[2];\r
;;        UINT64            Rip;\r
;;        UINT64            Gs, Fs, Es, Ds, Cs, Ss;\r
;;        UINT64            Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;;        UINT64            R8, R9, R10, R11, R12, R13, R14, R15;\r
;;      } SYSTEM_CONTEXT_X64;  // 64 bit system context record\r
\r
align           16\r
DebugStackEnd   db      "DbgStkEnd >>>>>>"      ;; 16 byte long string - must be 16 bytes to preserve alignment\r
                dd      1ffch dup (000000000h)  ;; 32K should be enough stack\r
                                                ;;   This allocation is coocked to insure\r
                                                ;;   that the the buffer for the FXSTORE instruction\r
                                                ;;   will be 16 byte aligned also.\r
                                                ;;\r
ExceptionNumber dq      ?                       ;; first entry will be the vector number pushed by the stub\r
\r
DebugStackBegin db      "<<<< DbgStkBegin"      ;; initial debug ESP == DebugStackBegin, set in stub\r
\r
data ENDS\r
\r
text SEGMENT\r
\r
externdef InterruptDistrubutionHub:near\r
\r
;------------------------------------------------------------------------------\r
; BOOLEAN\r
; FxStorSupport (\r
;   void\r
;   )\r
;\r
; Abstract: Returns TRUE if FxStor instructions are supported\r
;\r
FxStorSupport   PROC    PUBLIC\r
\r
;\r
; cpuid corrupts rbx which must be preserved per the C calling convention\r
;\r
                push    rbx\r
                mov     rax, 1\r
                cpuid\r
                mov     eax, edx\r
                and     rax, FXSTOR_FLAG\r
                shr     rax, 24\r
                pop     rbx\r
                ret\r
FxStorSupport   ENDP\r
\r
;------------------------------------------------------------------------------\r
; void\r
; Vect2Desc (\r
;   IA32_IDT_GATE_DESCRIPTOR * DestDesc,  // rcx\r
;   void (*Vector) (void)   // rdx\r
;   )\r
;\r
; Abstract: Encodes an IDT descriptor with the given physical address\r
;\r
Vect2Desc       PROC    PUBLIC\r
\r
                mov     rax, rdx\r
                mov     word ptr [rcx], ax                  ; write bits 15..0 of offset\r
                mov     dx, cs\r
                mov     word ptr [rcx+2], dx                ; SYS_CODE_SEL from GDT\r
                mov     word ptr [rcx+4], 0e00h OR 8000h    ; type = 386 interrupt gate, present\r
                shr     rax, 16\r
                mov     word ptr [rcx+6], ax                ; write bits 31..16 of offset\r
                shr     rax, 16\r
                mov     dword ptr [rcx+8], eax              ; write bits 63..32 of offset\r
\r
                ret\r
\r
Vect2Desc       ENDP\r
\r
\r
\r
;------------------------------------------------------------------------------\r
; InterruptEntryStub\r
;\r
; Abstract: This code is not a function, but is a small piece of code that is\r
;               copied and fixed up once for each IDT entry that is hooked.\r
;\r
InterruptEntryStub::\r
                push    0                       ; push vector number - will be modified before installed\r
                db      0e9h                    ; jump rel32\r
                dd      0                       ; fixed up to relative address of CommonIdtEntry\r
InterruptEntryStubEnd:\r
\r
\r
\r
;------------------------------------------------------------------------------\r
; CommonIdtEntry\r
;\r
; Abstract: This code is not a function, but is the common part for all IDT\r
;               vectors.\r
;\r
CommonIdtEntry::\r
;;\r
;; At this point, the stub has saved the current application stack esp into AppRsp\r
;; and switched stacks to the debug stack, where it pushed the vector number\r
;;\r
;; The application stack looks like this:\r
;;\r
;;              ...\r
;;              (last application stack entry)\r
;;              [16 bytes alignment, do not care it]\r
;;              SS from interrupted task\r
;;              RSP from interrupted task\r
;;              rflags from interrupted task\r
;;              CS from interrupted task\r
;;              RIP from interrupted task\r
;;              Error code <-------------------- Only present for some exeption types\r
;;\r
;;              Vector Number <----------------- pushed in our IDT Entry\r
;;\r
\r
\r
;; The stub switched us to the debug stack and pushed the interrupt number.\r
;;\r
;; Next, construct the context record.  It will be build on the debug stack by\r
;; pushing the registers in the correct order so as to create the context structure\r
;; on the debug stack.  The context record must be built from the end back to the\r
;; beginning because the stack grows down...\r
;\r
;; For reference, the context record looks like this:\r
;;\r
;; typedef\r
;; struct {\r
;;   UINT64            ExceptionData;\r
;;   FX_SAVE_STATE_X64 FxSaveState;\r
;;   UINT64            Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
;;   UINT64            Cr0, Cr2, Cr3, Cr4, Cr8;\r
;;   UINT64            RFlags;\r
;;   UINT64            Ldtr, Tr;\r
;;   UINT64            Gdtr[2], Idtr[2];\r
;;   UINT64            Rip;\r
;;   UINT64            Gs, Fs, Es, Ds, Cs, Ss;\r
;;   UINT64            Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;;   UINT64            R8, R9, R10, R11, R12, R13, R14, R15;\r
;; } SYSTEM_CONTEXT_X64;  // 64 bit system context record\r
\r
;; NOTE: we save rsp here to prevent compiler put rip reference cause error AppRsp\r
                push    rax\r
                mov     rax, qword ptr [rsp][8]          ; save vector number\r
                mov     ExceptionNumber, rax             ; save vector number\r
                pop     rax\r
                add     rsp, 8                           ; pop vector number\r
                mov     AppRsp, rsp                      ; save stack top\r
                mov     rsp, offset DebugStackBegin      ; switch to debugger stack\r
                sub     rsp, 8                           ; leave space for vector number\r
\r
;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
                push    r15\r
                push    r14\r
                push    r13\r
                push    r12\r
                push    r11\r
                push    r10\r
                push    r9\r
                push    r8\r
                push    rax\r
                push    rcx\r
                push    rdx\r
                push    rbx\r
                push    rsp\r
                push    rbp\r
                push    rsi\r
                push    rdi\r
\r
;; Save interrupt state rflags register...\r
                pushfq\r
                pop     rax\r
                mov     qword ptr Rflags, rax\r
\r
;; We need to determine if any extra data was pushed by the exception, and if so, save it\r
;; To do this, we check the exception number pushed by the stub, and cache the\r
;; result in a variable since we'll need this again.\r
                cmp     ExceptionNumber, EXCPT64_DOUBLE_FAULT\r
                jz      ExtraPushOne\r
                cmp     ExceptionNumber, EXCPT64_INVALID_TSS\r
                jz      ExtraPushOne\r
                cmp     ExceptionNumber, EXCPT64_SEG_NOT_PRESENT\r
                jz      ExtraPushOne\r
                cmp     ExceptionNumber, EXCPT64_STACK_FAULT\r
                jz      ExtraPushOne\r
                cmp     ExceptionNumber, EXCPT64_GP_FAULT\r
                jz      ExtraPushOne\r
                cmp     ExceptionNumber, EXCPT64_PAGE_FAULT\r
                jz      ExtraPushOne\r
                cmp     ExceptionNumber, EXCPT64_ALIGNMENT_CHECK\r
                jz      ExtraPushOne\r
                mov     ExtraPush, 0\r
                mov     ExceptData, 0\r
                jmp     ExtraPushDone\r
ExtraPushOne:\r
                mov     ExtraPush, 1\r
\r
;; If there's some extra data, save it also, and modify the saved AppRsp to effectively\r
;; pop this value off the application's stack.\r
                mov     rax, AppRsp\r
                mov     rbx, [rax]\r
                mov     ExceptData, rbx\r
                add     rax, 8\r
                mov     AppRsp, rax\r
\r
ExtraPushDone:\r
\r
;; The "push" above pushed the debug stack rsp.  Since what we're actually doing\r
;; is building the context record on the debug stack, we need to save the pushed\r
;; debug RSP, and replace it with the application's last stack entry...\r
                mov     rax, [rsp + 24]\r
                mov     DebugRsp, rax\r
                mov     rax, AppRsp\r
                mov     rax, QWORD PTR [rax + 24]\r
                ; application stack has ss, rsp, rflags, cs, & rip, so\r
                ; last actual application stack entry is saved at offset\r
                ; 24 bytes from stack top.\r
                mov     [rsp + 24], rax\r
\r
;; continue building context record\r
;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;  insure high 16 bits of each is zero\r
                mov     rax, ss\r
                push    rax\r
\r
                ; CS from application is one entry back in application stack\r
                mov     rax, AppRsp\r
                movzx   rax, word ptr [rax + 8]\r
                push    rax\r
\r
                mov     rax, ds\r
                push    rax\r
                mov     rax, es\r
                push    rax\r
                mov     rax, fs\r
                push    rax\r
                mov     rax, gs\r
                push    rax\r
\r
;; UINT64  Rip;\r
                ; Rip from application is on top of application stack\r
                mov     rax, AppRsp\r
                push    qword ptr [rax]\r
\r
;; UINT64  Gdtr[2], Idtr[2];\r
                push    0\r
                push    0\r
                sidt    fword ptr [rsp]\r
                push    0\r
                push    0\r
                sgdt    fword ptr [rsp]\r
\r
;; UINT64  Ldtr, Tr;\r
                xor     rax, rax\r
                str     ax\r
                push    rax\r
                sldt    ax\r
                push    rax\r
\r
;; UINT64  RFlags;\r
;; Rflags from application is two entries back in application stack\r
                mov     rax, AppRsp\r
                push    qword ptr [rax + 16]\r
\r
;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
;; ... while we're at it, make sure DE is also enabled...\r
                mov     rax, cr8\r
                push    rax\r
                mov     rax, cr4\r
                or      rax, 208h\r
                mov     cr4, rax\r
                push    rax\r
                mov     rax, cr3\r
                push    rax\r
                mov     rax, cr2\r
                push    rax\r
                push    0\r
                mov     rax, cr0\r
                push    rax\r
\r
;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
                mov     rax, dr7\r
                push    rax\r
;; clear Dr7 while executing debugger itself\r
                xor     rax, rax\r
                mov     dr7, rax\r
\r
                mov     rax, dr6\r
                push    rax\r
;; insure all status bits in dr6 are clear...\r
                xor     rax, rax\r
                mov     dr6, rax\r
\r
                mov     rax, dr3\r
                push    rax\r
                mov     rax, dr2\r
                push    rax\r
                mov     rax, dr1\r
                push    rax\r
                mov     rax, dr0\r
                push    rax\r
\r
;; FX_SAVE_STATE_X64 FxSaveState;\r
                sub     rsp, 512\r
                mov     rdi, rsp\r
                ; IMPORTANT!! The debug stack has been carefully constructed to\r
                ; insure that rsp and rdi are 16 byte aligned when we get here.\r
                ; They MUST be.  If they are not, a GP fault will occur.\r
                FXSTOR_RDI\r
\r
;; UINT64  ExceptionData;\r
                mov     rax, ExceptData\r
                push    rax\r
\r
; call to C code which will in turn call registered handler\r
; pass in the vector number\r
                mov     rdx, rsp\r
                mov     rcx, ExceptionNumber\r
                sub     rsp, 40\r
                call    InterruptDistrubutionHub\r
                add     rsp, 40\r
\r
; restore context...\r
;; UINT64  ExceptionData;\r
                add     rsp, 8\r
\r
;; FX_SAVE_STATE_X64 FxSaveState;\r
                mov     rsi, rsp\r
                FXRSTOR_RSI\r
                add     rsp, 512\r
\r
;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
                pop     rax\r
                mov     dr0, rax\r
                pop     rax\r
                mov     dr1, rax\r
                pop     rax\r
                mov     dr2, rax\r
                pop     rax\r
                mov     dr3, rax\r
;; skip restore of dr6.  We cleared dr6 during the context save.\r
                add     rsp, 8\r
                pop     rax\r
                mov     dr7, rax\r
\r
;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
                pop     rax\r
                mov     cr0, rax\r
                add     rsp, 8\r
                pop     rax\r
                mov     cr2, rax\r
                pop     rax\r
                mov     cr3, rax\r
                pop     rax\r
                mov     cr4, rax\r
                pop     rax\r
                mov     cr8, rax\r
\r
;; UINT64  RFlags;\r
                mov     rax, AppRsp\r
                pop     qword ptr [rax + 16]\r
\r
;; UINT64  Ldtr, Tr;\r
;; UINT64  Gdtr[2], Idtr[2];\r
;; Best not let anyone mess with these particular registers...\r
                add     rsp, 48\r
\r
;; UINT64  Rip;\r
                pop     qword ptr [rax]\r
\r
;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;\r
;; NOTE - modified segment registers could hang the debugger...  We\r
;;        could attempt to insulate ourselves against this possibility,\r
;;        but that poses risks as well.\r
;;\r
\r
                pop     rax\r
                ; mov     gs, rax\r
                pop     rax\r
                ; mov     fs, rax\r
                pop     rax\r
                mov     es, rax\r
                pop     rax\r
                mov     ds, rax\r
                mov     rax, AppRsp\r
                pop     qword ptr [rax + 8]\r
                pop     rax\r
                mov     ss, rax\r
\r
;; The next stuff to restore is the general purpose registers that were pushed\r
;; using the "push" instruction.\r
;;\r
;; The value of RSP as stored in the context record is the application RSP\r
;; including the 5 entries on the application stack caused by the exception\r
;; itself. It may have been modified by the debug agent, so we need to\r
;; determine if we need to relocate the application stack.\r
\r
                mov     rbx, [rsp + 24]  ; move the potentially modified AppRsp into rbx\r
                mov     rax, AppRsp\r
                mov     rax, QWORD PTR [rax + 24]\r
                cmp     rbx, rax\r
                je      NoAppStackMove\r
\r
                mov     rax, AppRsp\r
                mov     rcx, [rax]       ; RIP\r
                mov     [rbx], rcx\r
\r
                mov     rcx, [rax + 8]   ; CS\r
                mov     [rbx + 8], rcx\r
\r
                mov     rcx, [rax + 16]  ; RFLAGS\r
                mov     [rbx + 16], rcx\r
\r
                mov     rcx, [rax + 24]  ; RSP\r
                mov     [rbx + 24], rcx\r
\r
                mov     rcx, [rax + 32]  ; SS\r
                mov     [rbx + 32], rcx\r
\r
                mov     rax, rbx         ; modify the saved AppRsp to the new AppRsp\r
                mov     AppRsp, rax\r
NoAppStackMove:\r
                mov     rax, DebugRsp    ; restore the DebugRsp on the debug stack\r
                                         ; so our "pop" will not cause a stack switch\r
                mov     [rsp + 24], rax\r
\r
                cmp     ExceptionNumber, 068h\r
                jne     NoChain\r
\r
Chain:\r
\r
;; Restore rflags so when we chain, the flags will be exactly as if we were never here.\r
;; We gin up the stack to do an iretq so we can get ALL the flags.\r
                mov     rax, AppRsp\r
                mov     rbx, [rax + 40]\r
                push    rbx\r
                mov     rax, ss\r
                push    rax\r
                mov     rax, rsp\r
                add     rax, 16\r
                push    rax\r
                mov     rax, AppRsp\r
                mov     rbx, [rax + 16]\r
                and     rbx, NOT 300h ; special handling for IF and TF\r
                push    rbx\r
                mov     rax, cs\r
                push    rax\r
                mov     rax, offset PhonyIretq\r
                push    rax\r
                iretq\r
PhonyIretq:\r
\r
;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
                pop     rdi\r
                pop     rsi\r
                pop     rbp\r
                pop     rsp\r
                pop     rbx\r
                pop     rdx\r
                pop     rcx\r
                pop     rax\r
                pop     r8\r
                pop     r9\r
                pop     r10\r
                pop     r11\r
                pop     r12\r
                pop     r13\r
                pop     r14\r
                pop     r15\r
\r
;; Switch back to application stack\r
                mov     rsp, AppRsp\r
\r
;; Jump to original handler\r
                jmp     OrigVector\r
\r
NoChain:\r
;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
                pop     rdi\r
                pop     rsi\r
                pop     rbp\r
                pop     rsp\r
                pop     rbx\r
                pop     rdx\r
                pop     rcx\r
                pop     rax\r
                pop     r8\r
                pop     r9\r
                pop     r10\r
                pop     r11\r
                pop     r12\r
                pop     r13\r
                pop     r14\r
                pop     r15\r
\r
;; Switch back to application stack\r
                mov     rsp, AppRsp\r
\r
;; We're outa here...\r
                iretq\r
text ENDS\r
\r
END\r
\r
\r
\r
Commit	Line	Data
7b414b4e	1	;/** @file\r
	2	; Low level x64 routines used by the debug support driver.\r
	3	;\r
e5eed7d3 HT	4	; Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
e5eed7d3 HT	5	; This program and the accompanying materials\r
7b414b4e	6	; are licensed and made available under the terms and conditions of the BSD License\r
	7	; which accompanies this distribution. The full text of the license may be found at\r
	8	; http://opensource.org/licenses/bsd-license.php\r
	9	;\r
	10	; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	;\r
	13	;**/\r
c1f23d63	14	\r
	15	EXCPT64_DIVIDE_ERROR EQU 0\r
	16	EXCPT64_DEBUG EQU 1\r
	17	EXCPT64_NMI EQU 2\r
	18	EXCPT64_BREAKPOINT EQU 3\r
	19	EXCPT64_OVERFLOW EQU 4\r
	20	EXCPT64_BOUND EQU 5\r
	21	EXCPT64_INVALID_OPCODE EQU 6\r
	22	EXCPT64_DOUBLE_FAULT EQU 8\r
	23	EXCPT64_INVALID_TSS EQU 10\r
	24	EXCPT64_SEG_NOT_PRESENT EQU 11\r
	25	EXCPT64_STACK_FAULT EQU 12\r
	26	EXCPT64_GP_FAULT EQU 13\r
	27	EXCPT64_PAGE_FAULT EQU 14\r
	28	EXCPT64_FP_ERROR EQU 16\r
	29	EXCPT64_ALIGNMENT_CHECK EQU 17\r
	30	EXCPT64_MACHINE_CHECK EQU 18\r
	31	EXCPT64_SIMD EQU 19\r
	32	\r
	33	FXSTOR_FLAG EQU 01000000h ; bit cpuid 24 of feature flags\r
	34	\r
	35	;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,\r
	36	;; MMX, SSE, SSE2, etc registers. The initialization of the debugsupport driver\r
	37	;; MUST check the CPUID feature flags to see that these instructions are available\r
	38	;; and fail to init if they are not.\r
	39	\r
	40	;; fxstor [rdi]\r
	41	FXSTOR_RDI MACRO\r
	42	db 0fh, 0aeh, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [rdi]\r
	43	ENDM\r
	44	\r
	45	;; fxrstor [rsi]\r
	46	FXRSTOR_RSI MACRO\r
	47	db 0fh, 0aeh, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [rsi]\r
	48	ENDM\r
	49	\r
	50	data SEGMENT\r
	51	\r
	52	public OrigVector, InterruptEntryStub, StubSize, CommonIdtEntry, FxStorSupport\r
	53	\r
	54	StubSize dd InterruptEntryStubEnd - InterruptEntryStub\r
	55	AppRsp dq 1111111111111111h ; ?\r
	56	DebugRsp dq 2222222222222222h ; ?\r
	57	ExtraPush dq 3333333333333333h ; ?\r
	58	ExceptData dq 4444444444444444h ; ?\r
	59	Rflags dq 5555555555555555h ; ?\r
	60	OrigVector dq 6666666666666666h ; ?\r
	61	\r
	62	;; The declarations below define the memory region that will be used for the debug stack.\r
	63	;; The context record will be built by pushing register values onto this stack.\r
	64	;; It is imparitive that alignment be carefully managed, since the FXSTOR and\r
	65	;; FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.\r
	66	;;\r
	67	;; The stub will switch stacks from the application stack to the debuger stack\r
	68	;; and pushes the exception number.\r
	69	;;\r
	70	;; Then we building the context record on the stack. Since the stack grows down,\r
	71	;; we push the fields of the context record from the back to the front. There\r
	72	;; are 336 bytes of stack used prior allocating the 512 bytes of stack to be\r
	73	;; used as the memory buffer for the fxstor instruction. Therefore address of\r
	74	;; the buffer used for the FXSTOR instruction is &Eax - 336 - 512, which\r
	75	;; must be 16 byte aligned.\r
	76	;;\r
	77	;; We carefully locate the stack to make this happen.\r
78	;;\r
79	;; For reference, the context structure looks like this:\r
80	;; struct {\r
81	;; UINT64 ExceptionData;\r
82	;; FX_SAVE_STATE_X64 FxSaveState; // 512 bytes, must be 16 byte aligned\r
83	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
84	;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
85	;; UINT64 RFlags;\r
86	;; UINT64 Ldtr, Tr;\r
87	;; UINT64 Gdtr[2], Idtr[2];\r
88	;; UINT64 Rip;\r
89	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
90	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
91	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
92	;; } SYSTEM_CONTEXT_X64; // 64 bit system context record\r
93	\r
94	align 16\r
95	DebugStackEnd db "DbgStkEnd >>>>>>" ;; 16 byte long string - must be 16 bytes to preserve alignment\r
96	dd 1ffch dup (000000000h) ;; 32K should be enough stack\r
7b414b4e	97	;; This allocation is coocked to insure\r
c1f23d63	98	;; that the the buffer for the FXSTORE instruction\r
	99	;; will be 16 byte aligned also.\r
	100	;;\r
	101	ExceptionNumber dq ? ;; first entry will be the vector number pushed by the stub\r
	102	\r
	103	DebugStackBegin db "<<<< DbgStkBegin" ;; initial debug ESP == DebugStackBegin, set in stub\r
	104	\r
	105	data ENDS\r
	106	\r
	107	text SEGMENT\r
	108	\r
	109	externdef InterruptDistrubutionHub:near\r
	110	\r
c1f23d63	111	;------------------------------------------------------------------------------\r
	112	; BOOLEAN\r
	113	; FxStorSupport (\r
	114	; void\r
	115	; )\r
	116	;\r
	117	; Abstract: Returns TRUE if FxStor instructions are supported\r
	118	;\r
	119	FxStorSupport PROC PUBLIC\r
	120	\r
	121	;\r
	122	; cpuid corrupts rbx which must be preserved per the C calling convention\r
	123	;\r
	124	push rbx\r
	125	mov rax, 1\r
	126	cpuid\r
	127	mov eax, edx\r
	128	and rax, FXSTOR_FLAG\r
	129	shr rax, 24\r
	130	pop rbx\r
	131	ret\r
	132	FxStorSupport ENDP\r
	133	\r
c1f23d63	134	;------------------------------------------------------------------------------\r
	135	; void\r
	136	; Vect2Desc (\r
6e8a984e	137	; IA32_IDT_GATE_DESCRIPTOR * DestDesc, // rcx\r
c1f23d63	138	; void (*Vector) (void) // rdx\r
	139	; )\r
	140	;\r
	141	; Abstract: Encodes an IDT descriptor with the given physical address\r
	142	;\r
	143	Vect2Desc PROC PUBLIC\r
	144	\r
	145	mov rax, rdx\r
	146	mov word ptr [rcx], ax ; write bits 15..0 of offset\r
	147	mov dx, cs\r
	148	mov word ptr [rcx+2], dx ; SYS_CODE_SEL from GDT\r
	149	mov word ptr [rcx+4], 0e00h OR 8000h ; type = 386 interrupt gate, present\r
	150	shr rax, 16\r
	151	mov word ptr [rcx+6], ax ; write bits 31..16 of offset\r
	152	shr rax, 16\r
	153	mov dword ptr [rcx+8], eax ; write bits 63..32 of offset\r
	154	\r
	155	ret\r
	156	\r
	157	Vect2Desc ENDP\r
	158	\r
	159	\r
	160	\r
	161	;------------------------------------------------------------------------------\r
	162	; InterruptEntryStub\r
	163	;\r
	164	; Abstract: This code is not a function, but is a small piece of code that is\r
	165	; copied and fixed up once for each IDT entry that is hooked.\r
	166	;\r
	167	InterruptEntryStub::\r
	168	push 0 ; push vector number - will be modified before installed\r
	169	db 0e9h ; jump rel32\r
	170	dd 0 ; fixed up to relative address of CommonIdtEntry\r
	171	InterruptEntryStubEnd:\r
	172	\r
	173	\r
	174	\r
	175	;------------------------------------------------------------------------------\r
	176	; CommonIdtEntry\r
	177	;\r
	178	; Abstract: This code is not a function, but is the common part for all IDT\r
	179	; vectors.\r
	180	;\r
	181	CommonIdtEntry::\r
	182	;;\r
	183	;; At this point, the stub has saved the current application stack esp into AppRsp\r
	184	;; and switched stacks to the debug stack, where it pushed the vector number\r
	185	;;\r
	186	;; The application stack looks like this:\r
	187	;;\r
	188	;; ...\r
	189	;; (last application stack entry)\r
	190	;; [16 bytes alignment, do not care it]\r
	191	;; SS from interrupted task\r
	192	;; RSP from interrupted task\r
	193	;; rflags from interrupted task\r
	194	;; CS from interrupted task\r
	195	;; RIP from interrupted task\r
	196	;; Error code <-------------------- Only present for some exeption types\r
	197	;;\r
	198	;; Vector Number <----------------- pushed in our IDT Entry\r
	199	;;\r
	200	\r
	201	\r
202	;; The stub switched us to the debug stack and pushed the interrupt number.\r
203	;;\r
204	;; Next, construct the context record. It will be build on the debug stack by\r
205	;; pushing the registers in the correct order so as to create the context structure\r
206	;; on the debug stack. The context record must be built from the end back to the\r
207	;; beginning because the stack grows down...\r
208	;\r
209	;; For reference, the context record looks like this:\r
210	;;\r
211	;; typedef\r
212	;; struct {\r
213	;; UINT64 ExceptionData;\r
214	;; FX_SAVE_STATE_X64 FxSaveState;\r
215	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
216	;; UINT64 Cr0, Cr2, Cr3, Cr4, Cr8;\r
217	;; UINT64 RFlags;\r
218	;; UINT64 Ldtr, Tr;\r
219	;; UINT64 Gdtr[2], Idtr[2];\r
220	;; UINT64 Rip;\r
221	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
222	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
223	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
224	;; } SYSTEM_CONTEXT_X64; // 64 bit system context record\r
225	\r
226	;; NOTE: we save rsp here to prevent compiler put rip reference cause error AppRsp\r
227	push rax\r
228	mov rax, qword ptr [rsp][8] ; save vector number\r
229	mov ExceptionNumber, rax ; save vector number\r
230	pop rax\r
231	add rsp, 8 ; pop vector number\r
232	mov AppRsp, rsp ; save stack top\r
233	mov rsp, offset DebugStackBegin ; switch to debugger stack\r
234	sub rsp, 8 ; leave space for vector number\r
235	\r
236	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
237	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
238	push r15\r
239	push r14\r
240	push r13\r
241	push r12\r
242	push r11\r
243	push r10\r
244	push r9\r
245	push r8\r
246	push rax\r
247	push rcx\r
248	push rdx\r
249	push rbx\r
250	push rsp\r
251	push rbp\r
252	push rsi\r
253	push rdi\r
254	\r
255	;; Save interrupt state rflags register...\r
256	pushfq\r
257	pop rax\r
258	mov qword ptr Rflags, rax\r
259	\r
260	;; We need to determine if any extra data was pushed by the exception, and if so, save it\r
261	;; To do this, we check the exception number pushed by the stub, and cache the\r
262	;; result in a variable since we'll need this again.\r
263	cmp ExceptionNumber, EXCPT64_DOUBLE_FAULT\r
264	jz ExtraPushOne\r
265	cmp ExceptionNumber, EXCPT64_INVALID_TSS\r
266	jz ExtraPushOne\r
267	cmp ExceptionNumber, EXCPT64_SEG_NOT_PRESENT\r
268	jz ExtraPushOne\r
269	cmp ExceptionNumber, EXCPT64_STACK_FAULT\r
270	jz ExtraPushOne\r
271	cmp ExceptionNumber, EXCPT64_GP_FAULT\r
272	jz ExtraPushOne\r
273	cmp ExceptionNumber, EXCPT64_PAGE_FAULT\r
274	jz ExtraPushOne\r
275	cmp ExceptionNumber, EXCPT64_ALIGNMENT_CHECK\r
276	jz ExtraPushOne\r
277	mov ExtraPush, 0\r
278	mov ExceptData, 0\r
279	jmp ExtraPushDone\r
280	ExtraPushOne:\r
281	mov ExtraPush, 1\r
282	\r
283	;; If there's some extra data, save it also, and modify the saved AppRsp to effectively\r
284	;; pop this value off the application's stack.\r
285	mov rax, AppRsp\r
286	mov rbx, [rax]\r
287	mov ExceptData, rbx\r
288	add rax, 8\r
289	mov AppRsp, rax\r
290	\r
291	ExtraPushDone:\r
292	\r
293	;; The "push" above pushed the debug stack rsp. Since what we're actually doing\r
294	;; is building the context record on the debug stack, we need to save the pushed\r
295	;; debug RSP, and replace it with the application's last stack entry...\r
296	mov rax, [rsp + 24]\r
297	mov DebugRsp, rax\r
298	mov rax, AppRsp\r
c7a5da72	299	mov rax, QWORD PTR [rax + 24]\r
c1f23d63	300	; application stack has ss, rsp, rflags, cs, & rip, so\r
c7a5da72	301	; last actual application stack entry is saved at offset\r
c7a5da72	302	; 24 bytes from stack top.\r
c1f23d63	303	mov [rsp + 24], rax\r
	304	\r
	305	;; continue building context record\r
	306	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
	307	mov rax, ss\r
	308	push rax\r
	309	\r
	310	; CS from application is one entry back in application stack\r
	311	mov rax, AppRsp\r
	312	movzx rax, word ptr [rax + 8]\r
	313	push rax\r
	314	\r
	315	mov rax, ds\r
	316	push rax\r
	317	mov rax, es\r
	318	push rax\r
	319	mov rax, fs\r
	320	push rax\r
	321	mov rax, gs\r
	322	push rax\r
	323	\r
	324	;; UINT64 Rip;\r
	325	; Rip from application is on top of application stack\r
	326	mov rax, AppRsp\r
	327	push qword ptr [rax]\r
	328	\r
	329	;; UINT64 Gdtr[2], Idtr[2];\r
	330	push 0\r
	331	push 0\r
	332	sidt fword ptr [rsp]\r
	333	push 0\r
	334	push 0\r
	335	sgdt fword ptr [rsp]\r
	336	\r
	337	;; UINT64 Ldtr, Tr;\r
	338	xor rax, rax\r
	339	str ax\r
	340	push rax\r
	341	sldt ax\r
	342	push rax\r
	343	\r
	344	;; UINT64 RFlags;\r
	345	;; Rflags from application is two entries back in application stack\r
	346	mov rax, AppRsp\r
	347	push qword ptr [rax + 16]\r
	348	\r
	349	;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
	350	;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
	351	;; ... while we're at it, make sure DE is also enabled...\r
	352	mov rax, cr8\r
	353	push rax\r
	354	mov rax, cr4\r
	355	or rax, 208h\r
	356	mov cr4, rax\r
	357	push rax\r
	358	mov rax, cr3\r
	359	push rax\r
	360	mov rax, cr2\r
	361	push rax\r
	362	push 0\r
	363	mov rax, cr0\r
	364	push rax\r
	365	\r
	366	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
367	mov rax, dr7\r
368	push rax\r
369	;; clear Dr7 while executing debugger itself\r
370	xor rax, rax\r
371	mov dr7, rax\r
372	\r
373	mov rax, dr6\r
374	push rax\r
375	;; insure all status bits in dr6 are clear...\r
376	xor rax, rax\r
377	mov dr6, rax\r
378	\r
379	mov rax, dr3\r
380	push rax\r
381	mov rax, dr2\r
382	push rax\r
383	mov rax, dr1\r
384	push rax\r
385	mov rax, dr0\r
386	push rax\r
387	\r
388	;; FX_SAVE_STATE_X64 FxSaveState;\r
389	sub rsp, 512\r
390	mov rdi, rsp\r
391	; IMPORTANT!! The debug stack has been carefully constructed to\r
392	; insure that rsp and rdi are 16 byte aligned when we get here.\r
393	; They MUST be. If they are not, a GP fault will occur.\r
394	FXSTOR_RDI\r
395	\r
396	;; UINT64 ExceptionData;\r
397	mov rax, ExceptData\r
398	push rax\r
399	\r
400	; call to C code which will in turn call registered handler\r
401	; pass in the vector number\r
402	mov rdx, rsp\r
403	mov rcx, ExceptionNumber\r
404	sub rsp, 40\r
405	call InterruptDistrubutionHub\r
406	add rsp, 40\r
407	\r
408	; restore context...\r
409	;; UINT64 ExceptionData;\r
410	add rsp, 8\r
411	\r
412	;; FX_SAVE_STATE_X64 FxSaveState;\r
413	mov rsi, rsp\r
414	FXRSTOR_RSI\r
415	add rsp, 512\r
416	\r
417	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
418	pop rax\r
419	mov dr0, rax\r
420	pop rax\r
421	mov dr1, rax\r
422	pop rax\r
423	mov dr2, rax\r
424	pop rax\r
425	mov dr3, rax\r
426	;; skip restore of dr6. We cleared dr6 during the context save.\r
427	add rsp, 8\r
428	pop rax\r
429	mov dr7, rax\r
430	\r
431	;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
432	pop rax\r
433	mov cr0, rax\r
434	add rsp, 8\r
435	pop rax\r
436	mov cr2, rax\r
437	pop rax\r
438	mov cr3, rax\r
439	pop rax\r
440	mov cr4, rax\r
441	pop rax\r
442	mov cr8, rax\r
443	\r
444	;; UINT64 RFlags;\r
445	mov rax, AppRsp\r
446	pop qword ptr [rax + 16]\r
447	\r
448	;; UINT64 Ldtr, Tr;\r
449	;; UINT64 Gdtr[2], Idtr[2];\r
450	;; Best not let anyone mess with these particular registers...\r
451	add rsp, 48\r
452	\r
453	;; UINT64 Rip;\r
454	pop qword ptr [rax]\r
455	\r
456	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
457	;; NOTE - modified segment registers could hang the debugger... We\r
458	;; could attempt to insulate ourselves against this possibility,\r
459	;; but that poses risks as well.\r
460	;;\r
461	\r
462	pop rax\r
463	; mov gs, rax\r
464	pop rax\r
465	; mov fs, rax\r
466	pop rax\r
467	mov es, rax\r
468	pop rax\r
469	mov ds, rax\r
470	mov rax, AppRsp\r
471	pop qword ptr [rax + 8]\r
472	pop rax\r
473	mov ss, rax\r
474	\r
475	;; The next stuff to restore is the general purpose registers that were pushed\r
476	;; using the "push" instruction.\r
477	;;\r
478	;; The value of RSP as stored in the context record is the application RSP\r
479	;; including the 5 entries on the application stack caused by the exception\r
480	;; itself. It may have been modified by the debug agent, so we need to\r
481	;; determine if we need to relocate the application stack.\r
482	\r
483	mov rbx, [rsp + 24] ; move the potentially modified AppRsp into rbx\r
484	mov rax, AppRsp\r
c7a5da72	485	mov rax, QWORD PTR [rax + 24]\r
c1f23d63	486	cmp rbx, rax\r
	487	je NoAppStackMove\r
	488	\r
	489	mov rax, AppRsp\r
	490	mov rcx, [rax] ; RIP\r
	491	mov [rbx], rcx\r
	492	\r
	493	mov rcx, [rax + 8] ; CS\r
	494	mov [rbx + 8], rcx\r
	495	\r
	496	mov rcx, [rax + 16] ; RFLAGS\r
	497	mov [rbx + 16], rcx\r
	498	\r
	499	mov rcx, [rax + 24] ; RSP\r
	500	mov [rbx + 24], rcx\r
	501	\r
	502	mov rcx, [rax + 32] ; SS\r
	503	mov [rbx + 32], rcx\r
	504	\r
	505	mov rax, rbx ; modify the saved AppRsp to the new AppRsp\r
	506	mov AppRsp, rax\r
	507	NoAppStackMove:\r
	508	mov rax, DebugRsp ; restore the DebugRsp on the debug stack\r
	509	; so our "pop" will not cause a stack switch\r
	510	mov [rsp + 24], rax\r
	511	\r
	512	cmp ExceptionNumber, 068h\r
	513	jne NoChain\r
	514	\r
	515	Chain:\r
	516	\r
	517	;; Restore rflags so when we chain, the flags will be exactly as if we were never here.\r
	518	;; We gin up the stack to do an iretq so we can get ALL the flags.\r
	519	mov rax, AppRsp\r
	520	mov rbx, [rax + 40]\r
	521	push rbx\r
	522	mov rax, ss\r
	523	push rax\r
	524	mov rax, rsp\r
	525	add rax, 16\r
	526	push rax\r
	527	mov rax, AppRsp\r
	528	mov rbx, [rax + 16]\r
	529	and rbx, NOT 300h ; special handling for IF and TF\r
	530	push rbx\r
	531	mov rax, cs\r
	532	push rax\r
	533	mov rax, offset PhonyIretq\r
	534	push rax\r
	535	iretq\r
	536	PhonyIretq:\r
	537	\r
	538	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
	539	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
	540	pop rdi\r
	541	pop rsi\r
	542	pop rbp\r
	543	pop rsp\r
	544	pop rbx\r
	545	pop rdx\r
	546	pop rcx\r
	547	pop rax\r
	548	pop r8\r
	549	pop r9\r
550	pop r10\r
551	pop r11\r
552	pop r12\r
553	pop r13\r
554	pop r14\r
555	pop r15\r
556	\r
557	;; Switch back to application stack\r
558	mov rsp, AppRsp\r
559	\r
560	;; Jump to original handler\r
561	jmp OrigVector\r
562	\r
563	NoChain:\r
564	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
565	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
566	pop rdi\r
567	pop rsi\r
568	pop rbp\r
569	pop rsp\r
570	pop rbx\r
571	pop rdx\r
572	pop rcx\r
573	pop rax\r
574	pop r8\r
575	pop r9\r
576	pop r10\r
577	pop r11\r
578	pop r12\r
579	pop r13\r
580	pop r14\r
581	pop r15\r
582	\r
583	;; Switch back to application stack\r
584	mov rsp, AppRsp\r
585	\r
586	;; We're outa here...\r
587	iretq\r
588	text ENDS\r
589	\r
590	END\r
591	\r
592	\r
593	\r