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1 | //++\r |
2 | // Copyright (c) 2006, Intel Corporation \r |
3 | // All rights reserved. This program and the accompanying materials \r |
4 | // are licensed and made available under the terms and conditions of the BSD License \r |
5 | // which accompanies this distribution. The full text of the license may be found at \r |
6 | // http://opensource.org/licenses/bsd-license.php \r |
7 | // \r |
8 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
9 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
10 | // \r |
11 | // Module Name:\r |
12 | //\r |
13 | // Ds64Macros.i\r |
14 | //\r |
15 | // Abstract:\r |
16 | //\r |
17 | // This is set of macros used in calculating offsets in the IVT\r |
18 | //\r |
19 | // Revision History:\r |
20 | //\r |
21 | //--\r |
22 | \r |
23 | #define EXCPT_EXTERNAL_INTERRUPT 12\r |
24 | #define MASK_0_4 0x000000000000001F // mask bits 0 through 4\r |
25 | #define SLOT0 0\r |
26 | #define SLOT1 1\r |
27 | #define SLOT2 2\r |
28 | \r |
29 | #define PSR_DT 17\r |
30 | #define PSR_TB 26\r |
31 | #define PSR_RT 27\r |
32 | #define PSR_IS 34\r |
33 | #define PSR_IT 36\r |
34 | #define PSR_IC 13\r |
35 | #define PSR_I 14\r |
36 | #define PSR_SS 40\r |
37 | #define PSR_BN 44\r |
38 | #define PSR_RI_MASK 0x60000000000\r |
39 | \r |
40 | #define EXCPT_EXTERNAL_INTERRUPT 12\r |
41 | \r |
42 | #define SCRATCH_REG0 r23\r |
43 | #define SCRATCH_REG1 r24\r |
44 | #define SCRATCH_REG2 r25\r |
45 | #define SCRATCH_REG3 r26\r |
46 | #define SCRATCH_REG4 r27\r |
47 | #define SCRATCH_REG5 r28\r |
48 | #define SCRATCH_REG6 r29\r |
49 | #define PR_REG r30\r |
50 | #define B0_REG r31\r |
51 | \r |
52 | \r |
53 | // EXT_INT_OFFSET is the offset of the external interrupt entry in the IVT\r |
54 | #define EXT_INT_ENTRY_OFFSET 0x03000\r |
55 | \r |
56 | // PATCH_ENTRY_OFFSET is the offset into the IVT of the entry that is coopted (stolen)\r |
57 | // for use by the handler. The entire entry is restored when the handler is\r |
58 | // unloaded.\r |
59 | #define PATCH_ENTRY_OFFSET 0x03400\r |
60 | \r |
61 | // PATCH_BUNDLES is the number of bundles actually in the patch\r |
62 | #define NUM_PATCH_BUNDLES ((EndPatchCode - PatchCode) / 0x10)\r |
63 | \r |
64 | // A hard coded branch back into the external interrupt IVT entry's second bundle\r |
65 | // is put here, just in case the original bundle zero did not have a branch\r |
66 | // This is the last bundle in the reserved IVT entry\r |
67 | #define FAILSAFE_BRANCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - 0x10)\r |
68 | \r |
69 | // the original external interrupt IVT entry bundle zero is copied and relocated\r |
70 | // here... also in the reserved IVT entry\r |
71 | // This is the second-to-last bundle in the reserved IVT entry\r |
72 | #define RELOCATED_EXT_INT (PATCH_ENTRY_OFFSET + 0x400 - 0x20)\r |
73 | \r |
74 | // The patch is actually stored at the end of IVT:PATCH_ENTRY. The PATCH_OFFSET\r |
75 | // is the offset into IVT where the patch is actually stored. It is carefully\r |
76 | // located so that when we run out of patch code, the next bundle is the\r |
77 | // relocated bundle 0 from the original external interrupt handler\r |
78 | #define PATCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCode ) - 0x20)\r |
79 | \r |
80 | #define PATCH_RETURN_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCodeRet ) - 0x20)\r |
81 | \r |
82 | // PATCH_BRANCH is used only in the new bundle that is placed at the beginning\r |
83 | // of the external interrupt IVT entry.\r |
84 | #define PATCH_BRANCH (PATCH_OFFSET - EXT_INT_ENTRY_OFFSET)\r |
85 | \r |