[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi20.h

/** @file\r
  ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
\r
  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
**/\r
\r
#ifndef _ACPI_2_0_H_\r
#define _ACPI_2_0_H_\r
\r
#include <IndustryStandard/Acpi10.h>\r
\r
//\r
// Define for Desriptor\r
//\r
#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME          0x02\r
\r
#define ACPI_GENERIC_REGISTER_DESCRIPTOR          0x82\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
///\r
/// Generic Register Descriptor\r
///\r
typedef PACKED struct {\r
  ACPI_LARGE_RESOURCE_HEADER    Header;\r
  UINT8                         AddressSpaceId;\r
  UINT8                         RegisterBitWidth;\r
  UINT8                         RegisterBitOffset;\r
  UINT8                         AddressSize;\r
  UINT64                        RegisterAddress;\r
} EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;\r
\r
#pragma pack()\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
///\r
/// ACPI 2.0 Generic Address Space definition\r
///\r
typedef struct {\r
  UINT8   AddressSpaceId;\r
  UINT8   RegisterBitWidth;\r
  UINT8   RegisterBitOffset;\r
  UINT8   Reserved;\r
  UINT64  Address;\r
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
\r
//\r
// Generic Address Space Address IDs\r
//\r
#define EFI_ACPI_2_0_SYSTEM_MEMORY              0\r
#define EFI_ACPI_2_0_SYSTEM_IO                  1\r
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3\r
#define EFI_ACPI_2_0_SMBUS                      4\r
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F\r
\r
//\r
// ACPI 2.0 table structures\r
//\r
\r
///\r
/// Root System Description Pointer Structure\r
///\r
typedef struct {\r
  UINT64  Signature;\r
  UINT8   Checksum;\r
  UINT8   OemId[6];\r
  UINT8   Revision;\r
  UINT32  RsdtAddress;\r
  UINT32  Length;\r
  UINT64  XsdtAddress;\r
  UINT8   ExtendedChecksum;\r
  UINT8   Reserved[3];\r
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
\r
///\r
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
\r
///\r
/// Common table header, this prefaces all ACPI tables, including FACS, but\r
/// excluding the RSD PTR structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
} EFI_ACPI_2_0_COMMON_HEADER;\r
\r
//\r
// Root System Description Table\r
// No definition needed as it is a common description table header, the same with\r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
//\r
\r
///\r
/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
//\r
// Extended System Description Table\r
// No definition needed as it is a common description table header, the same with\r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
//\r
\r
///\r
/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Fixed ACPI Description Table Structure (FADT)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  UINT32                                  FirmwareCtrl;\r
  UINT32                                  Dsdt;\r
  UINT8                                   Reserved0;\r
  UINT8                                   PreferredPmProfile;\r
  UINT16                                  SciInt;\r
  UINT32                                  SmiCmd;\r
  UINT8                                   AcpiEnable;\r
  UINT8                                   AcpiDisable;\r
  UINT8                                   S4BiosReq;\r
  UINT8                                   PstateCnt;\r
  UINT32                                  Pm1aEvtBlk;\r
  UINT32                                  Pm1bEvtBlk;\r
  UINT32                                  Pm1aCntBlk;\r
  UINT32                                  Pm1bCntBlk;\r
  UINT32                                  Pm2CntBlk;\r
  UINT32                                  PmTmrBlk;\r
  UINT32                                  Gpe0Blk;\r
  UINT32                                  Gpe1Blk;\r
  UINT8                                   Pm1EvtLen;\r
  UINT8                                   Pm1CntLen;\r
  UINT8                                   Pm2CntLen;\r
  UINT8                                   PmTmrLen;\r
  UINT8                                   Gpe0BlkLen;\r
  UINT8                                   Gpe1BlkLen;\r
  UINT8                                   Gpe1Base;\r
  UINT8                                   CstCnt;\r
  UINT16                                  PLvl2Lat;\r
  UINT16                                  PLvl3Lat;\r
  UINT16                                  FlushSize;\r
  UINT16                                  FlushStride;\r
  UINT8                                   DutyOffset;\r
  UINT8                                   DutyWidth;\r
  UINT8                                   DayAlrm;\r
  UINT8                                   MonAlrm;\r
  UINT8                                   Century;\r
  UINT16                                  IaPcBootArch;\r
  UINT8                                   Reserved1;\r
  UINT32                                  Flags;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;\r
  UINT8                                   ResetValue;\r
  UINT8                                   Reserved2[3];\r
  UINT64                                  XFirmwareCtrl;\r
  UINT64                                  XDsdt;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;\r
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
\r
///\r
/// FADT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03\r
\r
//\r
// Fixed ACPI Description Table Preferred Power Management Profile\r
//\r
#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED         0\r
#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP             1\r
#define EFI_ACPI_2_0_PM_PROFILE_MOBILE              2\r
#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION         3\r
#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER   4\r
#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER         5\r
#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC        6\r
\r
//\r
// Fixed ACPI Description Table Boot Architecture Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_LEGACY_DEVICES          BIT0\r
#define EFI_ACPI_2_0_8042                    BIT1\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_WBINVD                  BIT0\r
#define EFI_ACPI_2_0_WBINVD_FLUSH            BIT1\r
#define EFI_ACPI_2_0_PROC_C1                 BIT2\r
#define EFI_ACPI_2_0_P_LVL2_UP               BIT3\r
#define EFI_ACPI_2_0_PWR_BUTTON              BIT4\r
#define EFI_ACPI_2_0_SLP_BUTTON              BIT5\r
#define EFI_ACPI_2_0_FIX_RTC                 BIT6\r
#define EFI_ACPI_2_0_RTC_S4                  BIT7\r
#define EFI_ACPI_2_0_TMR_VAL_EXT             BIT8\r
#define EFI_ACPI_2_0_DCK_CAP                 BIT9\r
#define EFI_ACPI_2_0_RESET_REG_SUP           BIT10\r
#define EFI_ACPI_2_0_SEALED_CASE             BIT11\r
#define EFI_ACPI_2_0_HEADLESS                BIT12\r
#define EFI_ACPI_2_0_CPU_SW_SLP              BIT13\r
\r
///\r
/// Firmware ACPI Control Structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
  UINT32  HardwareSignature;\r
  UINT32  FirmwareWakingVector;\r
  UINT32  GlobalLock;\r
  UINT32  Flags;\r
  UINT64  XFirmwareWakingVector;\r
  UINT8   Version;\r
  UINT8   Reserved[31];\r
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// FACS Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01\r
\r
///\r
/// Firmware Control Structure Feature Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_S4BIOS_F        BIT0\r
\r
///\r
/// Multiple APIC Description Table header definition.  The rest of the table\r
/// must be defined in a platform specific manner.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      LocalApicAddress;\r
  UINT32                      Flags;\r
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Multiple APIC Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_PCAT_COMPAT          BIT0\r
\r
//\r
// Multiple APIC Description Table APIC structure types\r
// All other values between 0x09 an 0xFF are reserved and\r
// will be ignored by OSPM.\r
//\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00\r
#define EFI_ACPI_2_0_IO_APIC                        0x01\r
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02\r
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03\r
#define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04\r
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05\r
#define EFI_ACPI_2_0_IO_SAPIC                       0x06\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07\r
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08\r
\r
//\r
// APIC Structure Definitions\r
//\r
\r
///\r
/// Processor Local APIC Structure Definition\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   ApicId;\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags.  All other bits are reserved and must be 0.\r
///\r
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED         BIT0\r
\r
///\r
/// IO APIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  IoApicAddress;\r
  UINT32  GlobalSystemInterruptBase;\r
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
\r
///\r
/// Interrupt Source Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   Bus;\r
  UINT8   Source;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT16  Flags;\r
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
\r
///\r
/// Non-Maskable Interrupt Source Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT32  GlobalSystemInterrupt;\r
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
\r
///\r
/// Local APIC NMI Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT16  Flags;\r
  UINT8   LocalApicLint;\r
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
\r
///\r
/// Local APIC Address Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Reserved;\r
  UINT64  LocalApicAddress;\r
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
\r
///\r
/// IO SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  GlobalSystemInterruptBase;\r
  UINT64  IoSapicAddress;\r
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
\r
///\r
/// Local SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   LocalSapicId;\r
  UINT8   LocalSapicEid;\r
  UINT8   Reserved[3];\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
\r
///\r
/// Platform Interrupt Sources Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT8   InterruptType;\r
  UINT8   ProcessorId;\r
  UINT8   ProcessorEid;\r
  UINT8   IoSapicVector;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT32  Reserved;\r
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
\r
///\r
/// Smart Battery Description Table (SBST)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      WarningEnergyLevel;\r
  UINT32                      LowEnergyLevel;\r
  UINT32                      CriticalEnergyLevel;\r
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
\r
///\r
/// SBST Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Embedded Controller Boot Resources Table (ECDT)\r
/// The table is followed by a null terminated ASCII string that contains\r
/// a fully qualified reference to the name space object.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;\r
  UINT32                                  Uid;\r
  UINT8                                   GpeBit;\r
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
\r
///\r
/// ECDT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01\r
\r
//\r
// Known table signatures\r
//\r
\r
///\r
/// "RSD PTR " Root System Description Pointer\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
\r
///\r
/// "SPIC" Multiple SAPIC Description Table\r
///\r
/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')\r
\r
///\r
/// "BOOT" MS Simple Boot Spec\r
///\r
#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE  SIGNATURE_32('B', 'O', 'O', 'T')\r
\r
///\r
/// "DBGP" MS Bebug Port Spec\r
///\r
#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', 'P')\r
\r
///\r
/// "DSDT" Differentiated System Description Table\r
///\r
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('D', 'S', 'D', 'T')\r
\r
///\r
/// "ECDT" Embedded Controller Boot Resources Table\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE  SIGNATURE_32('E', 'C', 'D', 'T')\r
\r
///\r
/// "ETDT" Event Timer Description Table\r
///\r
#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'T', 'D', 'T')\r
\r
///\r
/// "FACS" Firmware ACPI Control Structure\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'S')\r
\r
///\r
/// "FACP" Fixed ACPI Description Table\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'P')\r
\r
///\r
/// "APIC" Multiple APIC Description Table\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')\r
\r
///\r
/// "PSDT" Persistent System Description Table\r
///\r
#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('P', 'S', 'D', 'T')\r
\r
///\r
/// "RSDT" Root System Description Table\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('R', 'S', 'D', 'T')\r
\r
///\r
/// "SBST" Smart Battery Specification Table\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'B', 'S', 'T')\r
\r
///\r
/// "SLIT" System Locality Information Table\r
///\r
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'T')\r
\r
///\r
/// "SPCR" Serial Port Concole Redirection Table\r
///\r
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'C', 'R')\r
\r
///\r
/// "SRAT" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE  SIGNATURE_32('S', 'R', 'A', 'T')\r
\r
///\r
/// "SSDT" Secondary System Description Table\r
///\r
#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'S', 'D', 'T')\r
\r
///\r
/// "SPMI" Server Platform Management Interface Table\r
///\r
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE  SIGNATURE_32('S', 'P', 'M', 'I')\r
\r
///\r
/// "XSDT" Extended System Description Table\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('X', 'S', 'D', 'T')\r
\r
///\r
/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
///\r
#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'F', 'G')\r
\r
#pragma pack()\r
\r
#endif\r
Commit	Line	Data
9095d37b	1	/** @file\r
ee6c452c	2	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
568eb0cb	3	\r
9095d37b LG	4	Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
568eb0cb	9	\r
9095d37b LG	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
9095d37b LG	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
568eb0cb	12	**/\r
	13	\r
	14	#ifndef _ACPI_2_0_H_\r
	15	#define _ACPI_2_0_H_\r
	16	\r
732fb201	17	#include <IndustryStandard/Acpi10.h>\r
568eb0cb	18	\r
4a18b92c JY	19	//\r
	20	// Define for Desriptor\r
	21	//\r
	22	#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02\r
	23	\r
	24	#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82\r
	25	\r
	26	//\r
	27	// Ensure proper structure formats\r
	28	//\r
	29	#pragma pack(1)\r
	30	\r
	31	///\r
	32	/// Generic Register Descriptor\r
	33	///\r
	34	typedef PACKED struct {\r
	35	ACPI_LARGE_RESOURCE_HEADER Header;\r
	36	UINT8 AddressSpaceId;\r
	37	UINT8 RegisterBitWidth;\r
	38	UINT8 RegisterBitOffset;\r
	39	UINT8 AddressSize;\r
	40	UINT64 RegisterAddress;\r
	41	} EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;\r
	42	\r
	43	#pragma pack()\r
	44	\r
568eb0cb	45	//\r
	46	// Ensure proper structure formats\r
	47	//\r
	48	#pragma pack(1)\r
568eb0cb	49	\r
1bc5d021	50	///\r
	51	/// ACPI 2.0 Generic Address Space definition\r
	52	///\r
568eb0cb	53	typedef struct {\r
	54	UINT8 AddressSpaceId;\r
	55	UINT8 RegisterBitWidth;\r
	56	UINT8 RegisterBitOffset;\r
	57	UINT8 Reserved;\r
	58	UINT64 Address;\r
	59	} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
	60	\r
	61	//\r
	62	// Generic Address Space Address IDs\r
	63	//\r
	64	#define EFI_ACPI_2_0_SYSTEM_MEMORY 0\r
	65	#define EFI_ACPI_2_0_SYSTEM_IO 1\r
	66	#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2\r
	67	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3\r
	68	#define EFI_ACPI_2_0_SMBUS 4\r
	69	#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
	70	\r
	71	//\r
	72	// ACPI 2.0 table structures\r
	73	//\r
1bc5d021	74	\r
	75	///\r
	76	/// Root System Description Pointer Structure\r
	77	///\r
568eb0cb	78	typedef struct {\r
	79	UINT64 Signature;\r
	80	UINT8 Checksum;\r
	81	UINT8 OemId[6];\r
	82	UINT8 Revision;\r
	83	UINT32 RsdtAddress;\r
	84	UINT32 Length;\r
	85	UINT64 XsdtAddress;\r
	86	UINT8 ExtendedChecksum;\r
	87	UINT8 Reserved[3];\r
	88	} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
	89	\r
1bc5d021	90	///\r
	91	/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
	92	///\r
568eb0cb	93	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
568eb0cb	94	\r
1bc5d021	95	///\r
	96	/// Common table header, this prefaces all ACPI tables, including FACS, but\r
	97	/// excluding the RSD PTR structure\r
	98	///\r
568eb0cb	99	typedef struct {\r
	100	UINT32 Signature;\r
	101	UINT32 Length;\r
	102	} EFI_ACPI_2_0_COMMON_HEADER;\r
	103	\r
	104	//\r
	105	// Root System Description Table\r
9095d37b	106	// No definition needed as it is a common description table header, the same with\r
2b1cf49a	107	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
568eb0cb	108	//\r
1bc5d021	109	\r
	110	///\r
	111	/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
	112	///\r
568eb0cb	113	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
	114	\r
	115	//\r
	116	// Extended System Description Table\r
9095d37b	117	// No definition needed as it is a common description table header, the same with\r
2b1cf49a	118	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
568eb0cb	119	//\r
1bc5d021	120	\r
	121	///\r
	122	/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
	123	///\r
568eb0cb	124	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	125	\r
1bc5d021	126	///\r
	127	/// Fixed ACPI Description Table Structure (FADT)\r
	128	///\r
568eb0cb	129	typedef struct {\r
	130	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	131	UINT32 FirmwareCtrl;\r
	132	UINT32 Dsdt;\r
	133	UINT8 Reserved0;\r
	134	UINT8 PreferredPmProfile;\r
	135	UINT16 SciInt;\r
	136	UINT32 SmiCmd;\r
	137	UINT8 AcpiEnable;\r
	138	UINT8 AcpiDisable;\r
	139	UINT8 S4BiosReq;\r
	140	UINT8 PstateCnt;\r
	141	UINT32 Pm1aEvtBlk;\r
	142	UINT32 Pm1bEvtBlk;\r
	143	UINT32 Pm1aCntBlk;\r
	144	UINT32 Pm1bCntBlk;\r
	145	UINT32 Pm2CntBlk;\r
	146	UINT32 PmTmrBlk;\r
	147	UINT32 Gpe0Blk;\r
	148	UINT32 Gpe1Blk;\r
	149	UINT8 Pm1EvtLen;\r
	150	UINT8 Pm1CntLen;\r
	151	UINT8 Pm2CntLen;\r
	152	UINT8 PmTmrLen;\r
	153	UINT8 Gpe0BlkLen;\r
	154	UINT8 Gpe1BlkLen;\r
	155	UINT8 Gpe1Base;\r
	156	UINT8 CstCnt;\r
	157	UINT16 PLvl2Lat;\r
	158	UINT16 PLvl3Lat;\r
	159	UINT16 FlushSize;\r
	160	UINT16 FlushStride;\r
	161	UINT8 DutyOffset;\r
	162	UINT8 DutyWidth;\r
	163	UINT8 DayAlrm;\r
	164	UINT8 MonAlrm;\r
	165	UINT8 Century;\r
	166	UINT16 IaPcBootArch;\r
	167	UINT8 Reserved1;\r
	168	UINT32 Flags;\r
	169	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
	170	UINT8 ResetValue;\r
	171	UINT8 Reserved2[3];\r
	172	UINT64 XFirmwareCtrl;\r
	173	UINT64 XDsdt;\r
	174	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
	175	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
	176	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
	177	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
	178	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
	179	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
	180	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
	181	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
	182	} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
	183	\r
1bc5d021	184	///\r
	185	/// FADT Version (as defined in ACPI 2.0 spec.)\r
	186	///\r
568eb0cb	187	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r
568eb0cb	188	\r
4a18b92c JY	189	//\r
	190	// Fixed ACPI Description Table Preferred Power Management Profile\r
	191	//\r
	192	#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0\r
	193	#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1\r
	194	#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2\r
	195	#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3\r
	196	#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
	197	#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5\r
	198	#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6\r
	199	\r
a2461f6b	200	//\r
	201	// Fixed ACPI Description Table Boot Architecture Flags\r
	202	// All other bits are reserved and must be set to 0.\r
	203	//\r
	204	#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0\r
	205	#define EFI_ACPI_2_0_8042 BIT1\r
568eb0cb	206	\r
	207	//\r
	208	// Fixed ACPI Description Table Fixed Feature Flags\r
	209	// All other bits are reserved and must be set to 0.\r
	210	//\r
a2461f6b	211	#define EFI_ACPI_2_0_WBINVD BIT0\r
	212	#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1\r
	213	#define EFI_ACPI_2_0_PROC_C1 BIT2\r
	214	#define EFI_ACPI_2_0_P_LVL2_UP BIT3\r
	215	#define EFI_ACPI_2_0_PWR_BUTTON BIT4\r
	216	#define EFI_ACPI_2_0_SLP_BUTTON BIT5\r
	217	#define EFI_ACPI_2_0_FIX_RTC BIT6\r
	218	#define EFI_ACPI_2_0_RTC_S4 BIT7\r
	219	#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8\r
	220	#define EFI_ACPI_2_0_DCK_CAP BIT9\r
	221	#define EFI_ACPI_2_0_RESET_REG_SUP BIT10\r
	222	#define EFI_ACPI_2_0_SEALED_CASE BIT11\r
	223	#define EFI_ACPI_2_0_HEADLESS BIT12\r
	224	#define EFI_ACPI_2_0_CPU_SW_SLP BIT13\r
568eb0cb	225	\r
1bc5d021	226	///\r
	227	/// Firmware ACPI Control Structure\r
	228	///\r
568eb0cb	229	typedef struct {\r
	230	UINT32 Signature;\r
	231	UINT32 Length;\r
	232	UINT32 HardwareSignature;\r
	233	UINT32 FirmwareWakingVector;\r
	234	UINT32 GlobalLock;\r
	235	UINT32 Flags;\r
	236	UINT64 XFirmwareWakingVector;\r
	237	UINT8 Version;\r
	238	UINT8 Reserved[31];\r
	239	} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
	240	\r
1bc5d021	241	///\r
	242	/// FACS Version (as defined in ACPI 2.0 spec.)\r
	243	///\r
568eb0cb	244	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01\r
568eb0cb	245	\r
1bc5d021	246	///\r
	247	/// Firmware Control Structure Feature Flags\r
	248	/// All other bits are reserved and must be set to 0.\r
	249	///\r
a2461f6b	250	#define EFI_ACPI_2_0_S4BIOS_F BIT0\r
568eb0cb	251	\r
1bc5d021	252	///\r
	253	/// Multiple APIC Description Table header definition. The rest of the table\r
	254	/// must be defined in a platform specific manner.\r
	255	///\r
568eb0cb	256	typedef struct {\r
	257	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	258	UINT32 LocalApicAddress;\r
	259	UINT32 Flags;\r
	260	} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
	261	\r
1bc5d021	262	///\r
	263	/// MADT Revision (as defined in ACPI 2.0 spec.)\r
	264	///\r
568eb0cb	265	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	266	\r
1bc5d021	267	///\r
	268	/// Multiple APIC Flags\r
	269	/// All other bits are reserved and must be set to 0.\r
	270	///\r
a2461f6b	271	#define EFI_ACPI_2_0_PCAT_COMPAT BIT0\r
568eb0cb	272	\r
	273	//\r
	274	// Multiple APIC Description Table APIC structure types\r
	275	// All other values between 0x09 an 0xFF are reserved and\r
	276	// will be ignored by OSPM.\r
	277	//\r
	278	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00\r
	279	#define EFI_ACPI_2_0_IO_APIC 0x01\r
	280	#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
	281	#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
	282	#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04\r
	283	#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
	284	#define EFI_ACPI_2_0_IO_SAPIC 0x06\r
	285	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07\r
	286	#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
	287	\r
	288	//\r
	289	// APIC Structure Definitions\r
	290	//\r
1bc5d021	291	\r
	292	///\r
	293	/// Processor Local APIC Structure Definition\r
	294	///\r
568eb0cb	295	typedef struct {\r
	296	UINT8 Type;\r
	297	UINT8 Length;\r
	298	UINT8 AcpiProcessorId;\r
	299	UINT8 ApicId;\r
	300	UINT32 Flags;\r
	301	} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
	302	\r
1bc5d021	303	///\r
	304	/// Local APIC Flags. All other bits are reserved and must be 0.\r
	305	///\r
a2461f6b	306	#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0\r
568eb0cb	307	\r
1bc5d021	308	///\r
	309	/// IO APIC Structure\r
	310	///\r
568eb0cb	311	typedef struct {\r
	312	UINT8 Type;\r
	313	UINT8 Length;\r
	314	UINT8 IoApicId;\r
	315	UINT8 Reserved;\r
	316	UINT32 IoApicAddress;\r
	317	UINT32 GlobalSystemInterruptBase;\r
	318	} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
	319	\r
1bc5d021	320	///\r
	321	/// Interrupt Source Override Structure\r
	322	///\r
568eb0cb	323	typedef struct {\r
	324	UINT8 Type;\r
	325	UINT8 Length;\r
	326	UINT8 Bus;\r
	327	UINT8 Source;\r
	328	UINT32 GlobalSystemInterrupt;\r
	329	UINT16 Flags;\r
	330	} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
	331	\r
1bc5d021	332	///\r
	333	/// Non-Maskable Interrupt Source Structure\r
	334	///\r
568eb0cb	335	typedef struct {\r
	336	UINT8 Type;\r
	337	UINT8 Length;\r
	338	UINT16 Flags;\r
	339	UINT32 GlobalSystemInterrupt;\r
	340	} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
	341	\r
1bc5d021	342	///\r
	343	/// Local APIC NMI Structure\r
	344	///\r
568eb0cb	345	typedef struct {\r
	346	UINT8 Type;\r
	347	UINT8 Length;\r
	348	UINT8 AcpiProcessorId;\r
	349	UINT16 Flags;\r
	350	UINT8 LocalApicLint;\r
	351	} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
	352	\r
1bc5d021	353	///\r
	354	/// Local APIC Address Override Structure\r
	355	///\r
568eb0cb	356	typedef struct {\r
	357	UINT8 Type;\r
	358	UINT8 Length;\r
	359	UINT16 Reserved;\r
	360	UINT64 LocalApicAddress;\r
	361	} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
	362	\r
1bc5d021	363	///\r
	364	/// IO SAPIC Structure\r
	365	///\r
568eb0cb	366	typedef struct {\r
	367	UINT8 Type;\r
	368	UINT8 Length;\r
	369	UINT8 IoApicId;\r
	370	UINT8 Reserved;\r
	371	UINT32 GlobalSystemInterruptBase;\r
	372	UINT64 IoSapicAddress;\r
	373	} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
	374	\r
1bc5d021	375	///\r
	376	/// Local SAPIC Structure\r
	377	///\r
568eb0cb	378	typedef struct {\r
	379	UINT8 Type;\r
	380	UINT8 Length;\r
	381	UINT8 AcpiProcessorId;\r
	382	UINT8 LocalSapicId;\r
	383	UINT8 LocalSapicEid;\r
	384	UINT8 Reserved[3];\r
	385	UINT32 Flags;\r
	386	} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
	387	\r
1bc5d021	388	///\r
	389	/// Platform Interrupt Sources Structure\r
	390	///\r
568eb0cb	391	typedef struct {\r
	392	UINT8 Type;\r
	393	UINT8 Length;\r
	394	UINT16 Flags;\r
	395	UINT8 InterruptType;\r
	396	UINT8 ProcessorId;\r
	397	UINT8 ProcessorEid;\r
	398	UINT8 IoSapicVector;\r
	399	UINT32 GlobalSystemInterrupt;\r
	400	UINT32 Reserved;\r
	401	} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
	402	\r
1bc5d021	403	///\r
	404	/// Smart Battery Description Table (SBST)\r
	405	///\r
568eb0cb	406	typedef struct {\r
	407	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	408	UINT32 WarningEnergyLevel;\r
	409	UINT32 LowEnergyLevel;\r
	410	UINT32 CriticalEnergyLevel;\r
	411	} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
	412	\r
1bc5d021	413	///\r
	414	/// SBST Version (as defined in ACPI 2.0 spec.)\r
	415	///\r
568eb0cb	416	#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	417	\r
1bc5d021	418	///\r
	419	/// Embedded Controller Boot Resources Table (ECDT)\r
	420	/// The table is followed by a null terminated ASCII string that contains\r
	421	/// a fully qualified reference to the name space object.\r
	422	///\r
568eb0cb	423	typedef struct {\r
	424	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	425	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
	426	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
	427	UINT32 Uid;\r
	428	UINT8 GpeBit;\r
	429	} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
	430	\r
1bc5d021	431	///\r
	432	/// ECDT Version (as defined in ACPI 2.0 spec.)\r
	433	///\r
568eb0cb	434	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
	435	\r
	436	//\r
	437	// Known table signatures\r
	438	//\r
1bc5d021	439	\r
	440	///\r
	441	/// "RSD PTR " Root System Description Pointer\r
	442	///\r
13c31065	443	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
568eb0cb	444	\r
1bc5d021	445	///\r
	446	/// "SPIC" Multiple SAPIC Description Table\r
	447	///\r
	448	/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
	449	/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
	450	///\r
75c123cc	451	#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
568eb0cb	452	\r
1bc5d021	453	///\r
	454	/// "BOOT" MS Simple Boot Spec\r
	455	///\r
13c31065	456	#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
568eb0cb	457	\r
1bc5d021	458	///\r
	459	/// "DBGP" MS Bebug Port Spec\r
	460	///\r
13c31065	461	#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
568eb0cb	462	\r
1bc5d021	463	///\r
	464	/// "DSDT" Differentiated System Description Table\r
	465	///\r
13c31065	466	#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
568eb0cb	467	\r
1bc5d021	468	///\r
	469	/// "ECDT" Embedded Controller Boot Resources Table\r
	470	///\r
13c31065	471	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
568eb0cb	472	\r
1bc5d021	473	///\r
	474	/// "ETDT" Event Timer Description Table\r
	475	///\r
13c31065	476	#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
568eb0cb	477	\r
1bc5d021	478	///\r
	479	/// "FACS" Firmware ACPI Control Structure\r
	480	///\r
13c31065	481	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
568eb0cb	482	\r
1bc5d021	483	///\r
	484	/// "FACP" Fixed ACPI Description Table\r
	485	///\r
13c31065	486	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
568eb0cb	487	\r
1bc5d021	488	///\r
	489	/// "APIC" Multiple APIC Description Table\r
	490	///\r
13c31065	491	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
568eb0cb	492	\r
1bc5d021	493	///\r
	494	/// "PSDT" Persistent System Description Table\r
	495	///\r
13c31065	496	#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
568eb0cb	497	\r
1bc5d021	498	///\r
	499	/// "RSDT" Root System Description Table\r
	500	///\r
13c31065	501	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
568eb0cb	502	\r
1bc5d021	503	///\r
	504	/// "SBST" Smart Battery Specification Table\r
	505	///\r
13c31065	506	#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
568eb0cb	507	\r
1bc5d021	508	///\r
	509	/// "SLIT" System Locality Information Table\r
	510	///\r
13c31065	511	#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
568eb0cb	512	\r
1bc5d021	513	///\r
	514	/// "SPCR" Serial Port Concole Redirection Table\r
	515	///\r
13c31065	516	#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
568eb0cb	517	\r
1bc5d021	518	///\r
	519	/// "SRAT" Static Resource Affinity Table\r
	520	///\r
13c31065	521	#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
568eb0cb	522	\r
1bc5d021	523	///\r
	524	/// "SSDT" Secondary System Description Table\r
	525	///\r
13c31065	526	#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
568eb0cb	527	\r
1bc5d021	528	///\r
	529	/// "SPMI" Server Platform Management Interface Table\r
	530	///\r
13c31065	531	#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
568eb0cb	532	\r
1bc5d021	533	///\r
	534	/// "XSDT" Extended System Description Table\r
	535	///\r
13c31065	536	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
568eb0cb	537	\r
1bc5d021	538	///\r
4a18b92c	539	/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
1bc5d021	540	///\r
13c31065	541	#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
3431f363	542	\r
766f4bc1	543	#pragma pack()\r
766f4bc1	544	\r
568eb0cb	545	#endif\r