[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi20.h

/** @file\r
  ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
\r
  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
**/\r
\r
#ifndef _ACPI_2_0_H_\r
#define _ACPI_2_0_H_\r
\r
#include <IndustryStandard/Acpi10.h>\r
\r
//\r
// Define for Desriptor\r
//\r
#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME          0x02\r
\r
#define ACPI_GENERIC_REGISTER_DESCRIPTOR          0x82\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
///\r
/// Generic Register Descriptor\r
///\r
typedef PACKED struct {\r
  ACPI_LARGE_RESOURCE_HEADER    Header;\r
  UINT8                         AddressSpaceId;\r
  UINT8                         RegisterBitWidth;\r
  UINT8                         RegisterBitOffset;\r
  UINT8                         AddressSize;\r
  UINT64                        RegisterAddress;\r
} EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;\r
\r
#pragma pack()\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
\r
///\r
/// ACPI 2.0 Generic Address Space definition\r
///\r
typedef struct {\r
  UINT8   AddressSpaceId;\r
  UINT8   RegisterBitWidth;\r
  UINT8   RegisterBitOffset;\r
  UINT8   Reserved;\r
  UINT64  Address;\r
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
\r
//\r
// Generic Address Space Address IDs\r
//\r
#define EFI_ACPI_2_0_SYSTEM_MEMORY              0\r
#define EFI_ACPI_2_0_SYSTEM_IO                  1\r
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3\r
#define EFI_ACPI_2_0_SMBUS                      4\r
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F\r
\r
//\r
// ACPI 2.0 table structures\r
//\r
\r
///\r
/// Root System Description Pointer Structure\r
///\r
typedef struct {\r
  UINT64  Signature;\r
  UINT8   Checksum;\r
  UINT8   OemId[6];\r
  UINT8   Revision;\r
  UINT32  RsdtAddress;\r
  UINT32  Length;\r
  UINT64  XsdtAddress;\r
  UINT8   ExtendedChecksum;\r
  UINT8   Reserved[3];\r
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
\r
///\r
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
\r
///\r
/// Common table header, this prefaces all ACPI tables, including FACS, but\r
/// excluding the RSD PTR structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
} EFI_ACPI_2_0_COMMON_HEADER;\r
\r
//\r
// Root System Description Table\r
// No definition needed as it is a common description table header, the same with\r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
//\r
\r
///\r
/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
//\r
// Extended System Description Table\r
// No definition needed as it is a common description table header, the same with\r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
//\r
\r
///\r
/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Fixed ACPI Description Table Structure (FADT)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  UINT32                                  FirmwareCtrl;\r
  UINT32                                  Dsdt;\r
  UINT8                                   Reserved0;\r
  UINT8                                   PreferredPmProfile;\r
  UINT16                                  SciInt;\r
  UINT32                                  SmiCmd;\r
  UINT8                                   AcpiEnable;\r
  UINT8                                   AcpiDisable;\r
  UINT8                                   S4BiosReq;\r
  UINT8                                   PstateCnt;\r
  UINT32                                  Pm1aEvtBlk;\r
  UINT32                                  Pm1bEvtBlk;\r
  UINT32                                  Pm1aCntBlk;\r
  UINT32                                  Pm1bCntBlk;\r
  UINT32                                  Pm2CntBlk;\r
  UINT32                                  PmTmrBlk;\r
  UINT32                                  Gpe0Blk;\r
  UINT32                                  Gpe1Blk;\r
  UINT8                                   Pm1EvtLen;\r
  UINT8                                   Pm1CntLen;\r
  UINT8                                   Pm2CntLen;\r
  UINT8                                   PmTmrLen;\r
  UINT8                                   Gpe0BlkLen;\r
  UINT8                                   Gpe1BlkLen;\r
  UINT8                                   Gpe1Base;\r
  UINT8                                   CstCnt;\r
  UINT16                                  PLvl2Lat;\r
  UINT16                                  PLvl3Lat;\r
  UINT16                                  FlushSize;\r
  UINT16                                  FlushStride;\r
  UINT8                                   DutyOffset;\r
  UINT8                                   DutyWidth;\r
  UINT8                                   DayAlrm;\r
  UINT8                                   MonAlrm;\r
  UINT8                                   Century;\r
  UINT16                                  IaPcBootArch;\r
  UINT8                                   Reserved1;\r
  UINT32                                  Flags;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;\r
  UINT8                                   ResetValue;\r
  UINT8                                   Reserved2[3];\r
  UINT64                                  XFirmwareCtrl;\r
  UINT64                                  XDsdt;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;\r
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
\r
///\r
/// FADT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03\r
\r
//\r
// Fixed ACPI Description Table Preferred Power Management Profile\r
//\r
#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED         0\r
#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP             1\r
#define EFI_ACPI_2_0_PM_PROFILE_MOBILE              2\r
#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION         3\r
#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER   4\r
#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER         5\r
#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC        6\r
\r
//\r
// Fixed ACPI Description Table Boot Architecture Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_LEGACY_DEVICES          BIT0\r
#define EFI_ACPI_2_0_8042                    BIT1\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_WBINVD                  BIT0\r
#define EFI_ACPI_2_0_WBINVD_FLUSH            BIT1\r
#define EFI_ACPI_2_0_PROC_C1                 BIT2\r
#define EFI_ACPI_2_0_P_LVL2_UP               BIT3\r
#define EFI_ACPI_2_0_PWR_BUTTON              BIT4\r
#define EFI_ACPI_2_0_SLP_BUTTON              BIT5\r
#define EFI_ACPI_2_0_FIX_RTC                 BIT6\r
#define EFI_ACPI_2_0_RTC_S4                  BIT7\r
#define EFI_ACPI_2_0_TMR_VAL_EXT             BIT8\r
#define EFI_ACPI_2_0_DCK_CAP                 BIT9\r
#define EFI_ACPI_2_0_RESET_REG_SUP           BIT10\r
#define EFI_ACPI_2_0_SEALED_CASE             BIT11\r
#define EFI_ACPI_2_0_HEADLESS                BIT12\r
#define EFI_ACPI_2_0_CPU_SW_SLP              BIT13\r
\r
///\r
/// Firmware ACPI Control Structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
  UINT32  HardwareSignature;\r
  UINT32  FirmwareWakingVector;\r
  UINT32  GlobalLock;\r
  UINT32  Flags;\r
  UINT64  XFirmwareWakingVector;\r
  UINT8   Version;\r
  UINT8   Reserved[31];\r
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// FACS Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01\r
\r
///\r
/// Firmware Control Structure Feature Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_S4BIOS_F        BIT0\r
\r
///\r
/// Multiple APIC Description Table header definition.  The rest of the table\r
/// must be defined in a platform specific manner.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      LocalApicAddress;\r
  UINT32                      Flags;\r
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Multiple APIC Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_PCAT_COMPAT          BIT0\r
\r
//\r
// Multiple APIC Description Table APIC structure types\r
// All other values between 0x09 an 0xFF are reserved and\r
// will be ignored by OSPM.\r
//\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00\r
#define EFI_ACPI_2_0_IO_APIC                        0x01\r
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02\r
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03\r
#define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04\r
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05\r
#define EFI_ACPI_2_0_IO_SAPIC                       0x06\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07\r
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08\r
\r
//\r
// APIC Structure Definitions\r
//\r
\r
///\r
/// Processor Local APIC Structure Definition\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   ApicId;\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags.  All other bits are reserved and must be 0.\r
///\r
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED         BIT0\r
\r
///\r
/// IO APIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  IoApicAddress;\r
  UINT32  GlobalSystemInterruptBase;\r
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
\r
///\r
/// Interrupt Source Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   Bus;\r
  UINT8   Source;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT16  Flags;\r
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
\r
///\r
/// Non-Maskable Interrupt Source Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT32  GlobalSystemInterrupt;\r
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
\r
///\r
/// Local APIC NMI Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT16  Flags;\r
  UINT8   LocalApicLint;\r
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
\r
///\r
/// Local APIC Address Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Reserved;\r
  UINT64  LocalApicAddress;\r
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
\r
///\r
/// IO SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  GlobalSystemInterruptBase;\r
  UINT64  IoSapicAddress;\r
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
\r
///\r
/// Local SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   LocalSapicId;\r
  UINT8   LocalSapicEid;\r
  UINT8   Reserved[3];\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
\r
///\r
/// Platform Interrupt Sources Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT8   InterruptType;\r
  UINT8   ProcessorId;\r
  UINT8   ProcessorEid;\r
  UINT8   IoSapicVector;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT32  Reserved;\r
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
\r
///\r
/// Smart Battery Description Table (SBST)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      WarningEnergyLevel;\r
  UINT32                      LowEnergyLevel;\r
  UINT32                      CriticalEnergyLevel;\r
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
\r
///\r
/// SBST Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Embedded Controller Boot Resources Table (ECDT)\r
/// The table is followed by a null terminated ASCII string that contains\r
/// a fully qualified reference to the name space object.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;\r
  UINT32                                  Uid;\r
  UINT8                                   GpeBit;\r
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
\r
///\r
/// ECDT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01\r
\r
//\r
// Known table signatures\r
//\r
\r
///\r
/// "RSD PTR " Root System Description Pointer\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
\r
///\r
/// "SPIC" Multiple SAPIC Description Table\r
///\r
/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')\r
\r
///\r
/// "BOOT" MS Simple Boot Spec\r
///\r
#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE  SIGNATURE_32('B', 'O', 'O', 'T')\r
\r
///\r
/// "DBGP" MS Bebug Port Spec\r
///\r
#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', 'P')\r
\r
///\r
/// "DSDT" Differentiated System Description Table\r
///\r
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('D', 'S', 'D', 'T')\r
\r
///\r
/// "ECDT" Embedded Controller Boot Resources Table\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE  SIGNATURE_32('E', 'C', 'D', 'T')\r
\r
///\r
/// "ETDT" Event Timer Description Table\r
///\r
#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'T', 'D', 'T')\r
\r
///\r
/// "FACS" Firmware ACPI Control Structure\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'S')\r
\r
///\r
/// "FACP" Fixed ACPI Description Table\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'P')\r
\r
///\r
/// "APIC" Multiple APIC Description Table\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')\r
\r
///\r
/// "PSDT" Persistent System Description Table\r
///\r
#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('P', 'S', 'D', 'T')\r
\r
///\r
/// "RSDT" Root System Description Table\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('R', 'S', 'D', 'T')\r
\r
///\r
/// "SBST" Smart Battery Specification Table\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'B', 'S', 'T')\r
\r
///\r
/// "SLIT" System Locality Information Table\r
///\r
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'T')\r
\r
///\r
/// "SPCR" Serial Port Concole Redirection Table\r
///\r
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'C', 'R')\r
\r
///\r
/// "SRAT" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE  SIGNATURE_32('S', 'R', 'A', 'T')\r
\r
///\r
/// "SSDT" Secondary System Description Table\r
///\r
#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'S', 'D', 'T')\r
\r
///\r
/// "SPMI" Server Platform Management Interface Table\r
///\r
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE  SIGNATURE_32('S', 'P', 'M', 'I')\r
\r
///\r
/// "XSDT" Extended System Description Table\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('X', 'S', 'D', 'T')\r
\r
///\r
/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
///\r
#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'F', 'G')\r
\r
#pragma pack()\r
\r
#endif\r
Commit	Line	Data
9095d37b	1	/** @file\r
ee6c452c	2	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
568eb0cb	3	\r
9095d37b	4	Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
9344f092	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
568eb0cb	6	**/\r
	7	\r
	8	#ifndef _ACPI_2_0_H_\r
	9	#define _ACPI_2_0_H_\r
	10	\r
732fb201	11	#include <IndustryStandard/Acpi10.h>\r
568eb0cb	12	\r
4a18b92c JY	13	//\r
	14	// Define for Desriptor\r
	15	//\r
	16	#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02\r
	17	\r
	18	#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82\r
	19	\r
	20	//\r
	21	// Ensure proper structure formats\r
	22	//\r
	23	#pragma pack(1)\r
	24	\r
	25	///\r
	26	/// Generic Register Descriptor\r
	27	///\r
	28	typedef PACKED struct {\r
	29	ACPI_LARGE_RESOURCE_HEADER Header;\r
	30	UINT8 AddressSpaceId;\r
	31	UINT8 RegisterBitWidth;\r
	32	UINT8 RegisterBitOffset;\r
	33	UINT8 AddressSize;\r
	34	UINT64 RegisterAddress;\r
	35	} EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;\r
	36	\r
	37	#pragma pack()\r
	38	\r
568eb0cb	39	//\r
	40	// Ensure proper structure formats\r
	41	//\r
	42	#pragma pack(1)\r
568eb0cb	43	\r
1bc5d021	44	///\r
	45	/// ACPI 2.0 Generic Address Space definition\r
	46	///\r
568eb0cb	47	typedef struct {\r
	48	UINT8 AddressSpaceId;\r
	49	UINT8 RegisterBitWidth;\r
	50	UINT8 RegisterBitOffset;\r
	51	UINT8 Reserved;\r
	52	UINT64 Address;\r
	53	} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
	54	\r
	55	//\r
	56	// Generic Address Space Address IDs\r
	57	//\r
	58	#define EFI_ACPI_2_0_SYSTEM_MEMORY 0\r
	59	#define EFI_ACPI_2_0_SYSTEM_IO 1\r
	60	#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2\r
	61	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3\r
	62	#define EFI_ACPI_2_0_SMBUS 4\r
	63	#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
	64	\r
	65	//\r
	66	// ACPI 2.0 table structures\r
	67	//\r
1bc5d021	68	\r
	69	///\r
	70	/// Root System Description Pointer Structure\r
	71	///\r
568eb0cb	72	typedef struct {\r
	73	UINT64 Signature;\r
	74	UINT8 Checksum;\r
	75	UINT8 OemId[6];\r
	76	UINT8 Revision;\r
	77	UINT32 RsdtAddress;\r
	78	UINT32 Length;\r
	79	UINT64 XsdtAddress;\r
	80	UINT8 ExtendedChecksum;\r
	81	UINT8 Reserved[3];\r
	82	} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
	83	\r
1bc5d021	84	///\r
	85	/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
	86	///\r
568eb0cb	87	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
568eb0cb	88	\r
1bc5d021	89	///\r
	90	/// Common table header, this prefaces all ACPI tables, including FACS, but\r
	91	/// excluding the RSD PTR structure\r
	92	///\r
568eb0cb	93	typedef struct {\r
	94	UINT32 Signature;\r
	95	UINT32 Length;\r
	96	} EFI_ACPI_2_0_COMMON_HEADER;\r
	97	\r
	98	//\r
	99	// Root System Description Table\r
9095d37b	100	// No definition needed as it is a common description table header, the same with\r
2b1cf49a	101	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
568eb0cb	102	//\r
1bc5d021	103	\r
	104	///\r
	105	/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
	106	///\r
568eb0cb	107	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
	108	\r
	109	//\r
	110	// Extended System Description Table\r
9095d37b	111	// No definition needed as it is a common description table header, the same with\r
2b1cf49a	112	// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
568eb0cb	113	//\r
1bc5d021	114	\r
	115	///\r
	116	/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
	117	///\r
568eb0cb	118	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	119	\r
1bc5d021	120	///\r
	121	/// Fixed ACPI Description Table Structure (FADT)\r
	122	///\r
568eb0cb	123	typedef struct {\r
	124	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	125	UINT32 FirmwareCtrl;\r
	126	UINT32 Dsdt;\r
	127	UINT8 Reserved0;\r
	128	UINT8 PreferredPmProfile;\r
	129	UINT16 SciInt;\r
	130	UINT32 SmiCmd;\r
	131	UINT8 AcpiEnable;\r
	132	UINT8 AcpiDisable;\r
	133	UINT8 S4BiosReq;\r
	134	UINT8 PstateCnt;\r
	135	UINT32 Pm1aEvtBlk;\r
	136	UINT32 Pm1bEvtBlk;\r
	137	UINT32 Pm1aCntBlk;\r
	138	UINT32 Pm1bCntBlk;\r
	139	UINT32 Pm2CntBlk;\r
	140	UINT32 PmTmrBlk;\r
	141	UINT32 Gpe0Blk;\r
	142	UINT32 Gpe1Blk;\r
	143	UINT8 Pm1EvtLen;\r
	144	UINT8 Pm1CntLen;\r
	145	UINT8 Pm2CntLen;\r
	146	UINT8 PmTmrLen;\r
	147	UINT8 Gpe0BlkLen;\r
	148	UINT8 Gpe1BlkLen;\r
	149	UINT8 Gpe1Base;\r
	150	UINT8 CstCnt;\r
	151	UINT16 PLvl2Lat;\r
	152	UINT16 PLvl3Lat;\r
	153	UINT16 FlushSize;\r
	154	UINT16 FlushStride;\r
	155	UINT8 DutyOffset;\r
	156	UINT8 DutyWidth;\r
	157	UINT8 DayAlrm;\r
	158	UINT8 MonAlrm;\r
	159	UINT8 Century;\r
	160	UINT16 IaPcBootArch;\r
	161	UINT8 Reserved1;\r
	162	UINT32 Flags;\r
	163	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
	164	UINT8 ResetValue;\r
	165	UINT8 Reserved2[3];\r
	166	UINT64 XFirmwareCtrl;\r
	167	UINT64 XDsdt;\r
	168	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
	169	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
	170	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
	171	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
	172	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
	173	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
	174	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
	175	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
	176	} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
	177	\r
1bc5d021	178	///\r
	179	/// FADT Version (as defined in ACPI 2.0 spec.)\r
	180	///\r
568eb0cb	181	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r
568eb0cb	182	\r
4a18b92c JY	183	//\r
	184	// Fixed ACPI Description Table Preferred Power Management Profile\r
	185	//\r
	186	#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0\r
	187	#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1\r
	188	#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2\r
	189	#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3\r
	190	#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
	191	#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5\r
	192	#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6\r
	193	\r
a2461f6b	194	//\r
	195	// Fixed ACPI Description Table Boot Architecture Flags\r
	196	// All other bits are reserved and must be set to 0.\r
	197	//\r
	198	#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0\r
	199	#define EFI_ACPI_2_0_8042 BIT1\r
568eb0cb	200	\r
	201	//\r
	202	// Fixed ACPI Description Table Fixed Feature Flags\r
	203	// All other bits are reserved and must be set to 0.\r
	204	//\r
a2461f6b	205	#define EFI_ACPI_2_0_WBINVD BIT0\r
	206	#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1\r
	207	#define EFI_ACPI_2_0_PROC_C1 BIT2\r
	208	#define EFI_ACPI_2_0_P_LVL2_UP BIT3\r
	209	#define EFI_ACPI_2_0_PWR_BUTTON BIT4\r
	210	#define EFI_ACPI_2_0_SLP_BUTTON BIT5\r
	211	#define EFI_ACPI_2_0_FIX_RTC BIT6\r
	212	#define EFI_ACPI_2_0_RTC_S4 BIT7\r
	213	#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8\r
	214	#define EFI_ACPI_2_0_DCK_CAP BIT9\r
	215	#define EFI_ACPI_2_0_RESET_REG_SUP BIT10\r
	216	#define EFI_ACPI_2_0_SEALED_CASE BIT11\r
	217	#define EFI_ACPI_2_0_HEADLESS BIT12\r
	218	#define EFI_ACPI_2_0_CPU_SW_SLP BIT13\r
568eb0cb	219	\r
1bc5d021	220	///\r
	221	/// Firmware ACPI Control Structure\r
	222	///\r
568eb0cb	223	typedef struct {\r
	224	UINT32 Signature;\r
	225	UINT32 Length;\r
	226	UINT32 HardwareSignature;\r
	227	UINT32 FirmwareWakingVector;\r
	228	UINT32 GlobalLock;\r
	229	UINT32 Flags;\r
	230	UINT64 XFirmwareWakingVector;\r
	231	UINT8 Version;\r
	232	UINT8 Reserved[31];\r
	233	} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
	234	\r
1bc5d021	235	///\r
	236	/// FACS Version (as defined in ACPI 2.0 spec.)\r
	237	///\r
568eb0cb	238	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01\r
568eb0cb	239	\r
1bc5d021	240	///\r
	241	/// Firmware Control Structure Feature Flags\r
	242	/// All other bits are reserved and must be set to 0.\r
	243	///\r
a2461f6b	244	#define EFI_ACPI_2_0_S4BIOS_F BIT0\r
568eb0cb	245	\r
1bc5d021	246	///\r
	247	/// Multiple APIC Description Table header definition. The rest of the table\r
	248	/// must be defined in a platform specific manner.\r
	249	///\r
568eb0cb	250	typedef struct {\r
	251	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	252	UINT32 LocalApicAddress;\r
	253	UINT32 Flags;\r
	254	} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
	255	\r
1bc5d021	256	///\r
	257	/// MADT Revision (as defined in ACPI 2.0 spec.)\r
	258	///\r
568eb0cb	259	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	260	\r
1bc5d021	261	///\r
	262	/// Multiple APIC Flags\r
	263	/// All other bits are reserved and must be set to 0.\r
	264	///\r
a2461f6b	265	#define EFI_ACPI_2_0_PCAT_COMPAT BIT0\r
568eb0cb	266	\r
	267	//\r
	268	// Multiple APIC Description Table APIC structure types\r
	269	// All other values between 0x09 an 0xFF are reserved and\r
	270	// will be ignored by OSPM.\r
	271	//\r
	272	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00\r
	273	#define EFI_ACPI_2_0_IO_APIC 0x01\r
	274	#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
	275	#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
	276	#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04\r
	277	#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
	278	#define EFI_ACPI_2_0_IO_SAPIC 0x06\r
	279	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07\r
	280	#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
	281	\r
	282	//\r
	283	// APIC Structure Definitions\r
	284	//\r
1bc5d021	285	\r
	286	///\r
	287	/// Processor Local APIC Structure Definition\r
	288	///\r
568eb0cb	289	typedef struct {\r
	290	UINT8 Type;\r
	291	UINT8 Length;\r
	292	UINT8 AcpiProcessorId;\r
	293	UINT8 ApicId;\r
	294	UINT32 Flags;\r
	295	} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
	296	\r
1bc5d021	297	///\r
	298	/// Local APIC Flags. All other bits are reserved and must be 0.\r
	299	///\r
a2461f6b	300	#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0\r
568eb0cb	301	\r
1bc5d021	302	///\r
	303	/// IO APIC Structure\r
	304	///\r
568eb0cb	305	typedef struct {\r
	306	UINT8 Type;\r
	307	UINT8 Length;\r
	308	UINT8 IoApicId;\r
	309	UINT8 Reserved;\r
	310	UINT32 IoApicAddress;\r
	311	UINT32 GlobalSystemInterruptBase;\r
	312	} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
	313	\r
1bc5d021	314	///\r
	315	/// Interrupt Source Override Structure\r
	316	///\r
568eb0cb	317	typedef struct {\r
	318	UINT8 Type;\r
	319	UINT8 Length;\r
	320	UINT8 Bus;\r
	321	UINT8 Source;\r
	322	UINT32 GlobalSystemInterrupt;\r
	323	UINT16 Flags;\r
	324	} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
	325	\r
1bc5d021	326	///\r
	327	/// Non-Maskable Interrupt Source Structure\r
	328	///\r
568eb0cb	329	typedef struct {\r
	330	UINT8 Type;\r
	331	UINT8 Length;\r
	332	UINT16 Flags;\r
	333	UINT32 GlobalSystemInterrupt;\r
	334	} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
	335	\r
1bc5d021	336	///\r
	337	/// Local APIC NMI Structure\r
	338	///\r
568eb0cb	339	typedef struct {\r
	340	UINT8 Type;\r
	341	UINT8 Length;\r
	342	UINT8 AcpiProcessorId;\r
	343	UINT16 Flags;\r
	344	UINT8 LocalApicLint;\r
	345	} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
	346	\r
1bc5d021	347	///\r
	348	/// Local APIC Address Override Structure\r
	349	///\r
568eb0cb	350	typedef struct {\r
	351	UINT8 Type;\r
	352	UINT8 Length;\r
	353	UINT16 Reserved;\r
	354	UINT64 LocalApicAddress;\r
	355	} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
	356	\r
1bc5d021	357	///\r
	358	/// IO SAPIC Structure\r
	359	///\r
568eb0cb	360	typedef struct {\r
	361	UINT8 Type;\r
	362	UINT8 Length;\r
	363	UINT8 IoApicId;\r
	364	UINT8 Reserved;\r
	365	UINT32 GlobalSystemInterruptBase;\r
	366	UINT64 IoSapicAddress;\r
	367	} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
	368	\r
1bc5d021	369	///\r
	370	/// Local SAPIC Structure\r
	371	///\r
568eb0cb	372	typedef struct {\r
	373	UINT8 Type;\r
	374	UINT8 Length;\r
	375	UINT8 AcpiProcessorId;\r
	376	UINT8 LocalSapicId;\r
	377	UINT8 LocalSapicEid;\r
	378	UINT8 Reserved[3];\r
	379	UINT32 Flags;\r
	380	} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
	381	\r
1bc5d021	382	///\r
	383	/// Platform Interrupt Sources Structure\r
	384	///\r
568eb0cb	385	typedef struct {\r
	386	UINT8 Type;\r
	387	UINT8 Length;\r
	388	UINT16 Flags;\r
	389	UINT8 InterruptType;\r
	390	UINT8 ProcessorId;\r
	391	UINT8 ProcessorEid;\r
	392	UINT8 IoSapicVector;\r
	393	UINT32 GlobalSystemInterrupt;\r
	394	UINT32 Reserved;\r
	395	} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
	396	\r
1bc5d021	397	///\r
	398	/// Smart Battery Description Table (SBST)\r
	399	///\r
568eb0cb	400	typedef struct {\r
	401	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	402	UINT32 WarningEnergyLevel;\r
	403	UINT32 LowEnergyLevel;\r
	404	UINT32 CriticalEnergyLevel;\r
	405	} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
	406	\r
1bc5d021	407	///\r
	408	/// SBST Version (as defined in ACPI 2.0 spec.)\r
	409	///\r
568eb0cb	410	#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	411	\r
1bc5d021	412	///\r
	413	/// Embedded Controller Boot Resources Table (ECDT)\r
	414	/// The table is followed by a null terminated ASCII string that contains\r
	415	/// a fully qualified reference to the name space object.\r
	416	///\r
568eb0cb	417	typedef struct {\r
	418	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	419	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
	420	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
	421	UINT32 Uid;\r
	422	UINT8 GpeBit;\r
	423	} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
	424	\r
1bc5d021	425	///\r
	426	/// ECDT Version (as defined in ACPI 2.0 spec.)\r
	427	///\r
568eb0cb	428	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
	429	\r
	430	//\r
	431	// Known table signatures\r
	432	//\r
1bc5d021	433	\r
	434	///\r
	435	/// "RSD PTR " Root System Description Pointer\r
	436	///\r
13c31065	437	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
568eb0cb	438	\r
1bc5d021	439	///\r
	440	/// "SPIC" Multiple SAPIC Description Table\r
	441	///\r
	442	/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
	443	/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
	444	///\r
75c123cc	445	#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
568eb0cb	446	\r
1bc5d021	447	///\r
	448	/// "BOOT" MS Simple Boot Spec\r
	449	///\r
13c31065	450	#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
568eb0cb	451	\r
1bc5d021	452	///\r
	453	/// "DBGP" MS Bebug Port Spec\r
	454	///\r
13c31065	455	#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
568eb0cb	456	\r
1bc5d021	457	///\r
	458	/// "DSDT" Differentiated System Description Table\r
	459	///\r
13c31065	460	#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
568eb0cb	461	\r
1bc5d021	462	///\r
	463	/// "ECDT" Embedded Controller Boot Resources Table\r
	464	///\r
13c31065	465	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
568eb0cb	466	\r
1bc5d021	467	///\r
	468	/// "ETDT" Event Timer Description Table\r
	469	///\r
13c31065	470	#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
568eb0cb	471	\r
1bc5d021	472	///\r
	473	/// "FACS" Firmware ACPI Control Structure\r
	474	///\r
13c31065	475	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
568eb0cb	476	\r
1bc5d021	477	///\r
	478	/// "FACP" Fixed ACPI Description Table\r
	479	///\r
13c31065	480	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
568eb0cb	481	\r
1bc5d021	482	///\r
	483	/// "APIC" Multiple APIC Description Table\r
	484	///\r
13c31065	485	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
568eb0cb	486	\r
1bc5d021	487	///\r
	488	/// "PSDT" Persistent System Description Table\r
	489	///\r
13c31065	490	#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
568eb0cb	491	\r
1bc5d021	492	///\r
	493	/// "RSDT" Root System Description Table\r
	494	///\r
13c31065	495	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
568eb0cb	496	\r
1bc5d021	497	///\r
	498	/// "SBST" Smart Battery Specification Table\r
	499	///\r
13c31065	500	#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
568eb0cb	501	\r
1bc5d021	502	///\r
	503	/// "SLIT" System Locality Information Table\r
	504	///\r
13c31065	505	#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
568eb0cb	506	\r
1bc5d021	507	///\r
	508	/// "SPCR" Serial Port Concole Redirection Table\r
	509	///\r
13c31065	510	#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
568eb0cb	511	\r
1bc5d021	512	///\r
	513	/// "SRAT" Static Resource Affinity Table\r
	514	///\r
13c31065	515	#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
568eb0cb	516	\r
1bc5d021	517	///\r
	518	/// "SSDT" Secondary System Description Table\r
	519	///\r
13c31065	520	#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
568eb0cb	521	\r
1bc5d021	522	///\r
	523	/// "SPMI" Server Platform Management Interface Table\r
	524	///\r
13c31065	525	#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
568eb0cb	526	\r
1bc5d021	527	///\r
	528	/// "XSDT" Extended System Description Table\r
	529	///\r
13c31065	530	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
568eb0cb	531	\r
1bc5d021	532	///\r
4a18b92c	533	/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
1bc5d021	534	///\r
13c31065	535	#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
3431f363	536	\r
766f4bc1	537	#pragma pack()\r
766f4bc1	538	\r
568eb0cb	539	#endif\r