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9095d37b 1/** @file\r
f449affe 2 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013.\r
4a18b92c 3\r
a71c80b6 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>\r
9095d37b 5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
9344f092 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
4a18b92c
JY		 7**/\r
8\r
9#ifndef _ACPI_5_0_H_\r
10#define _ACPI_5_0_H_\r
11\r
12#include <IndustryStandard/Acpi40.h>\r
13\r
14//\r
15// Define for Desriptor\r
16//\r
17#define ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME 0x0A\r
18#define ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME 0x0C\r
19#define ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME 0x0E\r
20\r
21#define ACPI_FIXED_DMA_DESCRIPTOR 0x55\r
22#define ACPI_GPIO_CONNECTION_DESCRIPTOR 0x8C\r
23#define ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR 0x8E\r
24\r
25#pragma pack(1)\r
26\r
27///\r
28/// Generic DMA Descriptor.\r
29///\r
30typedef PACKED struct {\r
31 ACPI_SMALL_RESOURCE_HEADER Header;\r
32 UINT16 DmaRequestLine;\r
33 UINT16 DmaChannel;\r
34 UINT8 DmaTransferWidth;\r
35} EFI_ACPI_FIXED_DMA_DESCRIPTOR;\r
36\r
37///\r
38/// GPIO Connection Descriptor\r
39///\r
40typedef PACKED struct {\r
41 ACPI_LARGE_RESOURCE_HEADER Header;\r
42 UINT8 RevisionId;\r
43 UINT8 ConnectionType;\r
44 UINT16 GeneralFlags;\r
45 UINT16 InterruptFlags;\r
46 UINT8 PinConfiguration;\r
47 UINT16 OutputDriveStrength;\r
48 UINT16 DebounceTimeout;\r
49 UINT16 PinTableOffset;\r
50 UINT8 ResourceSourceIndex;\r
51 UINT16 ResourceSourceNameOffset;\r
52 UINT16 VendorDataOffset;\r
53 UINT16 VendorDataLength;\r
54} EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR;\r
55\r
56#define EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT 0x0\r
57#define EFI_ACPI_GPIO_CONNECTION_TYPE_IO 0x1\r
58\r
59///\r
60/// Serial Bus Resource Descriptor (Generic)\r
61///\r
62typedef PACKED struct {\r
63 ACPI_LARGE_RESOURCE_HEADER Header;\r
64 UINT8 RevisionId;\r
65 UINT8 ResourceSourceIndex;\r
66 UINT8 SerialBusType;\r
67 UINT8 GeneralFlags;\r
68 UINT16 TypeSpecificFlags;\r
69 UINT8 TypeSpecificRevisionId;\r
70 UINT16 TypeDataLength;\r
71// Type specific data\r
72} EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR;\r
73\r
74#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C 0x1\r
75#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI 0x2\r
76#define EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART 0x3\r
77\r
78///\r
79/// Serial Bus Resource Descriptor (I2C)\r
80///\r
81typedef PACKED struct {\r
82 ACPI_LARGE_RESOURCE_HEADER Header;\r
83 UINT8 RevisionId;\r
84 UINT8 ResourceSourceIndex;\r
85 UINT8 SerialBusType;\r
86 UINT8 GeneralFlags;\r
87 UINT16 TypeSpecificFlags;\r
88 UINT8 TypeSpecificRevisionId;\r
89 UINT16 TypeDataLength;\r
90 UINT32 ConnectionSpeed;\r
91 UINT16 SlaveAddress;\r
92} EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR;\r
93\r
94///\r
95/// Serial Bus Resource Descriptor (SPI)\r
96///\r
97typedef PACKED struct {\r
98 ACPI_LARGE_RESOURCE_HEADER Header;\r
99 UINT8 RevisionId;\r
100 UINT8 ResourceSourceIndex;\r
101 UINT8 SerialBusType;\r
102 UINT8 GeneralFlags;\r
103 UINT16 TypeSpecificFlags;\r
104 UINT8 TypeSpecificRevisionId;\r
105 UINT16 TypeDataLength;\r
106 UINT32 ConnectionSpeed;\r
107 UINT8 DataBitLength;\r
108 UINT8 Phase;\r
109 UINT8 Polarity;\r
110 UINT16 DeviceSelection;\r
111} EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR;\r
112\r
113///\r
114/// Serial Bus Resource Descriptor (UART)\r
115///\r
116typedef PACKED struct {\r
117 ACPI_LARGE_RESOURCE_HEADER Header;\r
118 UINT8 RevisionId;\r
119 UINT8 ResourceSourceIndex;\r
120 UINT8 SerialBusType;\r
121 UINT8 GeneralFlags;\r
122 UINT16 TypeSpecificFlags;\r
123 UINT8 TypeSpecificRevisionId;\r
124 UINT16 TypeDataLength;\r
125 UINT32 DefaultBaudRate;\r
126 UINT16 RxFIFO;\r
127 UINT16 TxFIFO;\r
128 UINT8 Parity;\r
129 UINT8 SerialLinesEnabled;\r
130} EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR;\r
131\r
132#pragma pack()\r
133\r
134//\r
135// Ensure proper structure formats\r
136//\r
137#pragma pack(1)\r
138\r
139///\r
140/// ACPI 5.0 Generic Address Space definition\r
141///\r
142typedef struct {\r
143 UINT8 AddressSpaceId;\r
144 UINT8 RegisterBitWidth;\r
145 UINT8 RegisterBitOffset;\r
146 UINT8 AccessSize;\r
147 UINT64 Address;\r
148} EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE;\r
149\r
150//\r
151// Generic Address Space Address IDs\r
152//\r
153#define EFI_ACPI_5_0_SYSTEM_MEMORY 0\r
154#define EFI_ACPI_5_0_SYSTEM_IO 1\r
155#define EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE 2\r
156#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER 3\r
157#define EFI_ACPI_5_0_SMBUS 4\r
f449affe
JY		 158#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
159#define EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
4a18b92c
JY		 160\r
161//\r
162// Generic Address Space Access Sizes\r
163//\r
164#define EFI_ACPI_5_0_UNDEFINED 0\r
165#define EFI_ACPI_5_0_BYTE 1\r
166#define EFI_ACPI_5_0_WORD 2\r
167#define EFI_ACPI_5_0_DWORD 3\r
168#define EFI_ACPI_5_0_QWORD 4\r
169\r
170//\r
171// ACPI 5.0 table structures\r
172//\r
173\r
174///\r
175/// Root System Description Pointer Structure\r
176///\r
177typedef struct {\r
178 UINT64 Signature;\r
179 UINT8 Checksum;\r
180 UINT8 OemId[6];\r
181 UINT8 Revision;\r
182 UINT32 RsdtAddress;\r
183 UINT32 Length;\r
184 UINT64 XsdtAddress;\r
185 UINT8 ExtendedChecksum;\r
186 UINT8 Reserved[3];\r
187} EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
188\r
189///\r
190/// RSD_PTR Revision (as defined in ACPI 5.0 spec.)\r
191///\r
192#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.0) says current value is 2\r
193\r
194///\r
195/// Common table header, this prefaces all ACPI tables, including FACS, but\r
196/// excluding the RSD PTR structure\r
197///\r
198typedef struct {\r
199 UINT32 Signature;\r
200 UINT32 Length;\r
201} EFI_ACPI_5_0_COMMON_HEADER;\r
202\r
203//\r
204// Root System Description Table\r
9095d37b 205// No definition needed as it is a common description table header, the same with\r
4a18b92c
JY		 206// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
207//\r
208\r
209///\r
210/// RSDT Revision (as defined in ACPI 5.0 spec.)\r
211///\r
212#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
213\r
214//\r
215// Extended System Description Table\r
9095d37b 216// No definition needed as it is a common description table header, the same with\r
4a18b92c
JY		 217// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
218//\r
219\r
220///\r
221/// XSDT Revision (as defined in ACPI 5.0 spec.)\r
222///\r
223#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
224\r
225///\r
226/// Fixed ACPI Description Table Structure (FADT)\r
227///\r
228typedef struct {\r
229 EFI_ACPI_DESCRIPTION_HEADER Header;\r
230 UINT32 FirmwareCtrl;\r
231 UINT32 Dsdt;\r
232 UINT8 Reserved0;\r
233 UINT8 PreferredPmProfile;\r
234 UINT16 SciInt;\r
235 UINT32 SmiCmd;\r
236 UINT8 AcpiEnable;\r
237 UINT8 AcpiDisable;\r
238 UINT8 S4BiosReq;\r
239 UINT8 PstateCnt;\r
240 UINT32 Pm1aEvtBlk;\r
241 UINT32 Pm1bEvtBlk;\r
242 UINT32 Pm1aCntBlk;\r
243 UINT32 Pm1bCntBlk;\r
244 UINT32 Pm2CntBlk;\r
245 UINT32 PmTmrBlk;\r
246 UINT32 Gpe0Blk;\r
247 UINT32 Gpe1Blk;\r
248 UINT8 Pm1EvtLen;\r
249 UINT8 Pm1CntLen;\r
250 UINT8 Pm2CntLen;\r
251 UINT8 PmTmrLen;\r
252 UINT8 Gpe0BlkLen;\r
253 UINT8 Gpe1BlkLen;\r
254 UINT8 Gpe1Base;\r
255 UINT8 CstCnt;\r
256 UINT16 PLvl2Lat;\r
257 UINT16 PLvl3Lat;\r
258 UINT16 FlushSize;\r
259 UINT16 FlushStride;\r
260 UINT8 DutyOffset;\r
261 UINT8 DutyWidth;\r
262 UINT8 DayAlrm;\r
263 UINT8 MonAlrm;\r
264 UINT8 Century;\r
265 UINT16 IaPcBootArch;\r
266 UINT8 Reserved1;\r
267 UINT32 Flags;\r
268 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
269 UINT8 ResetValue;\r
270 UINT8 Reserved2[3];\r
271 UINT64 XFirmwareCtrl;\r
272 UINT64 XDsdt;\r
273 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
274 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
275 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
276 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
277 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
278 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
279 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
281 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
282 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
283} EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
284\r
285///\r
286/// FADT Version (as defined in ACPI 5.0 spec.)\r
287///\r
288#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
289\r
290//\r
291// Fixed ACPI Description Table Preferred Power Management Profile\r
292//\r
293#define EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED 0\r
294#define EFI_ACPI_5_0_PM_PROFILE_DESKTOP 1\r
295#define EFI_ACPI_5_0_PM_PROFILE_MOBILE 2\r
296#define EFI_ACPI_5_0_PM_PROFILE_WORKSTATION 3\r
297#define EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
298#define EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER 5\r
299#define EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC 6\r
300#define EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER 7\r
301#define EFI_ACPI_5_0_PM_PROFILE_TABLET 8\r
302\r
303//\r
304// Fixed ACPI Description Table Boot Architecture Flags\r
305// All other bits are reserved and must be set to 0.\r
306//\r
307#define EFI_ACPI_5_0_LEGACY_DEVICES BIT0\r
308#define EFI_ACPI_5_0_8042 BIT1\r
309#define EFI_ACPI_5_0_VGA_NOT_PRESENT BIT2\r
310#define EFI_ACPI_5_0_MSI_NOT_SUPPORTED BIT3\r
311#define EFI_ACPI_5_0_PCIE_ASPM_CONTROLS BIT4\r
312#define EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT BIT5\r
313\r
314//\r
315// Fixed ACPI Description Table Fixed Feature Flags\r
316// All other bits are reserved and must be set to 0.\r
317//\r
318#define EFI_ACPI_5_0_WBINVD BIT0\r
319#define EFI_ACPI_5_0_WBINVD_FLUSH BIT1\r
320#define EFI_ACPI_5_0_PROC_C1 BIT2\r
321#define EFI_ACPI_5_0_P_LVL2_UP BIT3\r
322#define EFI_ACPI_5_0_PWR_BUTTON BIT4\r
323#define EFI_ACPI_5_0_SLP_BUTTON BIT5\r
324#define EFI_ACPI_5_0_FIX_RTC BIT6\r
325#define EFI_ACPI_5_0_RTC_S4 BIT7\r
326#define EFI_ACPI_5_0_TMR_VAL_EXT BIT8\r
327#define EFI_ACPI_5_0_DCK_CAP BIT9\r
328#define EFI_ACPI_5_0_RESET_REG_SUP BIT10\r
329#define EFI_ACPI_5_0_SEALED_CASE BIT11\r
330#define EFI_ACPI_5_0_HEADLESS BIT12\r
331#define EFI_ACPI_5_0_CPU_SW_SLP BIT13\r
332#define EFI_ACPI_5_0_PCI_EXP_WAK BIT14\r
333#define EFI_ACPI_5_0_USE_PLATFORM_CLOCK BIT15\r
334#define EFI_ACPI_5_0_S4_RTC_STS_VALID BIT16\r
335#define EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE BIT17\r
336#define EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL BIT18\r
337#define EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
338#define EFI_ACPI_5_0_HW_REDUCED_ACPI BIT20\r
339#define EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
340\r
341///\r
342/// Firmware ACPI Control Structure\r
343///\r
344typedef struct {\r
345 UINT32 Signature;\r
346 UINT32 Length;\r
347 UINT32 HardwareSignature;\r
348 UINT32 FirmwareWakingVector;\r
349 UINT32 GlobalLock;\r
350 UINT32 Flags;\r
351 UINT64 XFirmwareWakingVector;\r
352 UINT8 Version;\r
353 UINT8 Reserved0[3];\r
354 UINT32 OspmFlags;\r
355 UINT8 Reserved1[24];\r
356} EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
357\r
358///\r
359/// FACS Version (as defined in ACPI 5.0 spec.)\r
360///\r
361#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
362\r
363///\r
364/// Firmware Control Structure Feature Flags\r
365/// All other bits are reserved and must be set to 0.\r
366///\r
367#define EFI_ACPI_5_0_S4BIOS_F BIT0\r
368#define EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F BIT1\r
369\r
370///\r
371/// OSPM Enabled Firmware Control Structure Flags\r
372/// All other bits are reserved and must be set to 0.\r
373///\r
374#define EFI_ACPI_5_0_OSPM_64BIT_WAKE_F BIT0\r
375\r
376//\r
377// Differentiated System Description Table,\r
378// Secondary System Description Table\r
379// and Persistent System Description Table,\r
380// no definition needed as they are common description table header, the same with\r
381// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
382//\r
383#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
384#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
385\r
386///\r
387/// Multiple APIC Description Table header definition. The rest of the table\r
388/// must be defined in a platform specific manner.\r
389///\r
390typedef struct {\r
391 EFI_ACPI_DESCRIPTION_HEADER Header;\r
392 UINT32 LocalApicAddress;\r
393 UINT32 Flags;\r
394} EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
395\r
396///\r
397/// MADT Revision (as defined in ACPI 5.0 spec.)\r
398///\r
399#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
400\r
401///\r
402/// Multiple APIC Flags\r
403/// All other bits are reserved and must be set to 0.\r
404///\r
405#define EFI_ACPI_5_0_PCAT_COMPAT BIT0\r
406\r
407//\r
408// Multiple APIC Description Table APIC structure types\r
409// All other values between 0x0D and 0x7F are reserved and\r
410// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
411//\r
412#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC 0x00\r
413#define EFI_ACPI_5_0_IO_APIC 0x01\r
414#define EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
415#define EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
416#define EFI_ACPI_5_0_LOCAL_APIC_NMI 0x04\r
417#define EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
418#define EFI_ACPI_5_0_IO_SAPIC 0x06\r
419#define EFI_ACPI_5_0_LOCAL_SAPIC 0x07\r
420#define EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
421#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC 0x09\r
422#define EFI_ACPI_5_0_LOCAL_X2APIC_NMI 0x0A\r
423#define EFI_ACPI_5_0_GIC 0x0B\r
424#define EFI_ACPI_5_0_GICD 0x0C\r
425\r
426//\r
427// APIC Structure Definitions\r
428//\r
429\r
430///\r
431/// Processor Local APIC Structure Definition\r
432///\r
433typedef struct {\r
434 UINT8 Type;\r
435 UINT8 Length;\r
436 UINT8 AcpiProcessorId;\r
437 UINT8 ApicId;\r
438 UINT32 Flags;\r
439} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
440\r
441///\r
442/// Local APIC Flags. All other bits are reserved and must be 0.\r
443///\r
444#define EFI_ACPI_5_0_LOCAL_APIC_ENABLED BIT0\r
445\r
446///\r
447/// IO APIC Structure\r
448///\r
449typedef struct {\r
450 UINT8 Type;\r
451 UINT8 Length;\r
452 UINT8 IoApicId;\r
453 UINT8 Reserved;\r
454 UINT32 IoApicAddress;\r
455 UINT32 GlobalSystemInterruptBase;\r
456} EFI_ACPI_5_0_IO_APIC_STRUCTURE;\r
457\r
458///\r
459/// Interrupt Source Override Structure\r
460///\r
461typedef struct {\r
462 UINT8 Type;\r
463 UINT8 Length;\r
464 UINT8 Bus;\r
465 UINT8 Source;\r
466 UINT32 GlobalSystemInterrupt;\r
467 UINT16 Flags;\r
468} EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
469\r
470///\r
471/// Platform Interrupt Sources Structure Definition\r
472///\r
473typedef struct {\r
474 UINT8 Type;\r
475 UINT8 Length;\r
476 UINT16 Flags;\r
477 UINT8 InterruptType;\r
478 UINT8 ProcessorId;\r
479 UINT8 ProcessorEid;\r
480 UINT8 IoSapicVector;\r
481 UINT32 GlobalSystemInterrupt;\r
482 UINT32 PlatformInterruptSourceFlags;\r
483 UINT8 CpeiProcessorOverride;\r
484 UINT8 Reserved[31];\r
485} EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
486\r
487//\r
488// MPS INTI flags.\r
489// All other bits are reserved and must be set to 0.\r
490//\r
491#define EFI_ACPI_5_0_POLARITY (3 << 0)\r
492#define EFI_ACPI_5_0_TRIGGER_MODE (3 << 2)\r
493\r
494///\r
495/// Non-Maskable Interrupt Source Structure\r
496///\r
497typedef struct {\r
498 UINT8 Type;\r
499 UINT8 Length;\r
500 UINT16 Flags;\r
501 UINT32 GlobalSystemInterrupt;\r
502} EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
503\r
504///\r
505/// Local APIC NMI Structure\r
506///\r
507typedef struct {\r
508 UINT8 Type;\r
509 UINT8 Length;\r
510 UINT8 AcpiProcessorId;\r
511 UINT16 Flags;\r
512 UINT8 LocalApicLint;\r
513} EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE;\r
514\r
515///\r
516/// Local APIC Address Override Structure\r
517///\r
518typedef struct {\r
519 UINT8 Type;\r
520 UINT8 Length;\r
521 UINT16 Reserved;\r
522 UINT64 LocalApicAddress;\r
523} EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
524\r
525///\r
526/// IO SAPIC Structure\r
527///\r
528typedef struct {\r
529 UINT8 Type;\r
530 UINT8 Length;\r
531 UINT8 IoApicId;\r
532 UINT8 Reserved;\r
533 UINT32 GlobalSystemInterruptBase;\r
534 UINT64 IoSapicAddress;\r
535} EFI_ACPI_5_0_IO_SAPIC_STRUCTURE;\r
536\r
537///\r
538/// Local SAPIC Structure\r
539/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
540///\r
541typedef struct {\r
542 UINT8 Type;\r
543 UINT8 Length;\r
544 UINT8 AcpiProcessorId;\r
545 UINT8 LocalSapicId;\r
546 UINT8 LocalSapicEid;\r
547 UINT8 Reserved[3];\r
548 UINT32 Flags;\r
549 UINT32 ACPIProcessorUIDValue;\r
550} EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
551\r
552///\r
553/// Platform Interrupt Sources Structure\r
554///\r
555typedef struct {\r
556 UINT8 Type;\r
557 UINT8 Length;\r
558 UINT16 Flags;\r
559 UINT8 InterruptType;\r
560 UINT8 ProcessorId;\r
561 UINT8 ProcessorEid;\r
562 UINT8 IoSapicVector;\r
563 UINT32 GlobalSystemInterrupt;\r
564 UINT32 PlatformInterruptSourceFlags;\r
565} EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
566\r
567///\r
568/// Platform Interrupt Source Flags.\r
569/// All other bits are reserved and must be set to 0.\r
570///\r
571#define EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE BIT0\r
572\r
573///\r
574/// Processor Local x2APIC Structure Definition\r
575///\r
576typedef struct {\r
577 UINT8 Type;\r
578 UINT8 Length;\r
579 UINT8 Reserved[2];\r
580 UINT32 X2ApicId;\r
581 UINT32 Flags;\r
582 UINT32 AcpiProcessorUid;\r
583} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
584\r
585///\r
586/// Local x2APIC NMI Structure\r
587///\r
588typedef struct {\r
589 UINT8 Type;\r
590 UINT8 Length;\r
591 UINT16 Flags;\r
592 UINT32 AcpiProcessorUid;\r
593 UINT8 LocalX2ApicLint;\r
594 UINT8 Reserved[3];\r
595} EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE;\r
596\r
597///\r
598/// GIC Structure\r
599///\r
600typedef struct {\r
601 UINT8 Type;\r
602 UINT8 Length;\r
603 UINT16 Reserved;\r
604 UINT32 GicId;\r
605 UINT32 AcpiProcessorUid;\r
606 UINT32 Flags;\r
607 UINT32 ParkingProtocolVersion;\r
608 UINT32 PerformanceInterruptGsiv;\r
609 UINT64 ParkedAddress;\r
610 UINT64 PhysicalBaseAddress;\r
611} EFI_ACPI_5_0_GIC_STRUCTURE;\r
612\r
613///\r
614/// GIC Flags. All other bits are reserved and must be 0.\r
615///\r
616#define EFI_ACPI_5_0_GIC_ENABLED BIT0\r
617#define EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL BIT1\r
618\r
619///\r
620/// GIC Distributor Structure\r
621///\r
622typedef struct {\r
623 UINT8 Type;\r
624 UINT8 Length;\r
625 UINT16 Reserved1;\r
626 UINT32 GicId;\r
627 UINT64 PhysicalBaseAddress;\r
628 UINT32 SystemVectorBase;\r
629 UINT32 Reserved2;\r
630} EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE;\r
631\r
632///\r
633/// Smart Battery Description Table (SBST)\r
634///\r
635typedef struct {\r
636 EFI_ACPI_DESCRIPTION_HEADER Header;\r
637 UINT32 WarningEnergyLevel;\r
638 UINT32 LowEnergyLevel;\r
639 UINT32 CriticalEnergyLevel;\r
640} EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
641\r
642///\r
643/// SBST Version (as defined in ACPI 5.0 spec.)\r
644///\r
645#define EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
646\r
647///\r
648/// Embedded Controller Boot Resources Table (ECDT)\r
649/// The table is followed by a null terminated ASCII string that contains\r
650/// a fully qualified reference to the name space object.\r
651///\r
652typedef struct {\r
653 EFI_ACPI_DESCRIPTION_HEADER Header;\r
654 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
655 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
656 UINT32 Uid;\r
657 UINT8 GpeBit;\r
658} EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
659\r
660///\r
661/// ECDT Version (as defined in ACPI 5.0 spec.)\r
662///\r
663#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
664\r
665///\r
666/// System Resource Affinity Table (SRAT). The rest of the table\r
667/// must be defined in a platform specific manner.\r
668///\r
669typedef struct {\r
670 EFI_ACPI_DESCRIPTION_HEADER Header;\r
671 UINT32 Reserved1; ///< Must be set to 1\r
672 UINT64 Reserved2;\r
673} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
674\r
675///\r
676/// SRAT Version (as defined in ACPI 5.0 spec.)\r
677///\r
678#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
679\r
680//\r
681// SRAT structure types.\r
682// All other values between 0x03 an 0xFF are reserved and\r
683// will be ignored by OSPM.\r
684//\r
685#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
686#define EFI_ACPI_5_0_MEMORY_AFFINITY 0x01\r
687#define EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
688\r
689///\r
690/// Processor Local APIC/SAPIC Affinity Structure Definition\r
691///\r
692typedef struct {\r
693 UINT8 Type;\r
694 UINT8 Length;\r
695 UINT8 ProximityDomain7To0;\r
696 UINT8 ApicId;\r
697 UINT32 Flags;\r
698 UINT8 LocalSapicEid;\r
699 UINT8 ProximityDomain31To8[3];\r
700 UINT32 ClockDomain;\r
701} EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
702\r
703///\r
704/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
705///\r
706#define EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
707\r
708///\r
709/// Memory Affinity Structure Definition\r
710///\r
711typedef struct {\r
712 UINT8 Type;\r
713 UINT8 Length;\r
714 UINT32 ProximityDomain;\r
715 UINT16 Reserved1;\r
716 UINT32 AddressBaseLow;\r
717 UINT32 AddressBaseHigh;\r
718 UINT32 LengthLow;\r
719 UINT32 LengthHigh;\r
720 UINT32 Reserved2;\r
721 UINT32 Flags;\r
722 UINT64 Reserved3;\r
723} EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE;\r
724\r
725//\r
726// Memory Flags. All other bits are reserved and must be 0.\r
727//\r
728#define EFI_ACPI_5_0_MEMORY_ENABLED (1 << 0)\r
729#define EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE (1 << 1)\r
730#define EFI_ACPI_5_0_MEMORY_NONVOLATILE (1 << 2)\r
731\r
732///\r
733/// Processor Local x2APIC Affinity Structure Definition\r
734///\r
735typedef struct {\r
736 UINT8 Type;\r
737 UINT8 Length;\r
738 UINT8 Reserved1[2];\r
739 UINT32 ProximityDomain;\r
740 UINT32 X2ApicId;\r
741 UINT32 Flags;\r
742 UINT32 ClockDomain;\r
743 UINT8 Reserved2[4];\r
744} EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
745\r
746///\r
747/// System Locality Distance Information Table (SLIT).\r
748/// The rest of the table is a matrix.\r
749///\r
750typedef struct {\r
751 EFI_ACPI_DESCRIPTION_HEADER Header;\r
752 UINT64 NumberOfSystemLocalities;\r
753} EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
754\r
755///\r
756/// SLIT Version (as defined in ACPI 5.0 spec.)\r
757///\r
758#define EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
759\r
760///\r
761/// Corrected Platform Error Polling Table (CPEP)\r
762///\r
763typedef struct {\r
764 EFI_ACPI_DESCRIPTION_HEADER Header;\r
765 UINT8 Reserved[8];\r
766} EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
767\r
768///\r
769/// CPEP Version (as defined in ACPI 5.0 spec.)\r
770///\r
771#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
772\r
773//\r
774// CPEP processor structure types.\r
775//\r
776#define EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
777\r
778///\r
779/// Corrected Platform Error Polling Processor Structure Definition\r
780///\r
781typedef struct {\r
782 UINT8 Type;\r
783 UINT8 Length;\r
784 UINT8 ProcessorId;\r
785 UINT8 ProcessorEid;\r
786 UINT32 PollingInterval;\r
787} EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
788\r
789///\r
790/// Maximum System Characteristics Table (MSCT)\r
791///\r
792typedef struct {\r
793 EFI_ACPI_DESCRIPTION_HEADER Header;\r
794 UINT32 OffsetProxDomInfo;\r
795 UINT32 MaximumNumberOfProximityDomains;\r
796 UINT32 MaximumNumberOfClockDomains;\r
797 UINT64 MaximumPhysicalAddress;\r
798} EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
799\r
800///\r
801/// MSCT Version (as defined in ACPI 5.0 spec.)\r
802///\r
803#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
804\r
805///\r
806/// Maximum Proximity Domain Information Structure Definition\r
807///\r
808typedef struct {\r
809 UINT8 Revision;\r
810 UINT8 Length;\r
811 UINT32 ProximityDomainRangeLow;\r
812 UINT32 ProximityDomainRangeHigh;\r
813 UINT32 MaximumProcessorCapacity;\r
814 UINT64 MaximumMemoryCapacity;\r
815} EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
816\r
817///\r
818/// ACPI RAS Feature Table definition.\r
819///\r
820typedef struct {\r
821 EFI_ACPI_DESCRIPTION_HEADER Header;\r
822 UINT8 PlatformCommunicationChannelIdentifier[12];\r
823} EFI_ACPI_5_0_RAS_FEATURE_TABLE;\r
824\r
825///\r
826/// RASF Version (as defined in ACPI 5.0 spec.)\r
827///\r
828#define EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION 0x01\r
829\r
830///\r
831/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
832///\r
833typedef struct {\r
834 UINT32 Signature;\r
835 UINT16 Command;\r
836 UINT16 Status;\r
837 UINT16 Version;\r
838 UINT8 RASCapabilities[16];\r
839 UINT8 SetRASCapabilities[16];\r
840 UINT16 NumberOfRASFParameterBlocks;\r
841 UINT32 SetRASCapabilitiesStatus;\r
842} EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
843\r
844///\r
845/// ACPI RASF PCC command code\r
846///\r
847#define EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
848\r
849///\r
850/// ACPI RASF Platform RAS Capabilities\r
851///\r
852#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
853#define EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
854\r
855///\r
856/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
857///\r
858typedef struct {\r
859 UINT16 Type;\r
860 UINT16 Version;\r
861 UINT16 Length;\r
862 UINT16 PatrolScrubCommand;\r
863 UINT64 RequestedAddressRange[2];\r
864 UINT64 ActualAddressRange[2];\r
865 UINT16 Flags;\r
866 UINT8 RequestedSpeed;\r
867} EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
868\r
869///\r
870/// ACPI RASF Patrol Scrub command\r
871///\r
872#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
873#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
874#define EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
875\r
876///\r
877/// Memory Power State Table definition.\r
878///\r
879typedef struct {\r
880 EFI_ACPI_DESCRIPTION_HEADER Header;\r
881 UINT8 PlatformCommunicationChannelIdentifier;\r
882 UINT8 Reserved[3];\r
883// Memory Power Node Structure\r
884// Memory Power State Characteristics\r
885} EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE;\r
886\r
887///\r
888/// MPST Version (as defined in ACPI 5.0 spec.)\r
889///\r
890#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
891\r
892///\r
893/// MPST Platform Communication Channel Shared Memory Region definition.\r
894///\r
895typedef struct {\r
896 UINT32 Signature;\r
897 UINT16 Command;\r
898 UINT16 Status;\r
899 UINT32 MemoryPowerCommandRegister;\r
900 UINT32 MemoryPowerStatusRegister;\r
901 UINT32 PowerStateId;\r
902 UINT32 MemoryPowerNodeId;\r
903 UINT64 MemoryEnergyConsumed;\r
904 UINT64 ExpectedAveragePowerComsuned;\r
905} EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
906\r
907///\r
908/// ACPI MPST PCC command code\r
909///\r
910#define EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
911\r
912///\r
913/// ACPI MPST Memory Power command\r
914///\r
915#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
916#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
917#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
918#define EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
919\r
920///\r
921/// MPST Memory Power Node Table\r
922///\r
923typedef struct {\r
924 UINT8 PowerStateValue;\r
925 UINT8 PowerStateInformationIndex;\r
926} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE;\r
927\r
928typedef struct {\r
929 UINT8 Flag;\r
930 UINT8 Reserved;\r
931 UINT16 MemoryPowerNodeId;\r
932 UINT32 Length;\r
933 UINT64 AddressBase;\r
934 UINT64 AddressLength;\r
935 UINT32 NumberOfPowerStates;\r
936 UINT32 NumberOfPhysicalComponents;\r
937//EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
938//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
939} EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE;\r
940\r
941#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
942#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
943#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
944\r
945typedef struct {\r
946 UINT16 MemoryPowerNodeCount;\r
947 UINT8 Reserved[2];\r
948} EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE;\r
949\r
950///\r
951/// MPST Memory Power State Characteristics Table\r
952///\r
953typedef struct {\r
954 UINT8 PowerStateStructureID;\r
955 UINT8 Flag;\r
956 UINT16 Reserved;\r
957 UINT32 AveragePowerConsumedInMPS0;\r
958 UINT32 RelativePowerSavingToMPS0;\r
959 UINT64 ExitLatencyToMPS0;\r
960} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
961\r
962#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
963#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
964#define EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
965\r
966typedef struct {\r
967 UINT16 MemoryPowerStateCharacteristicsCount;\r
968 UINT8 Reserved[2];\r
969} EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
970\r
971///\r
972/// Memory Topology Table definition.\r
973///\r
974typedef struct {\r
975 EFI_ACPI_DESCRIPTION_HEADER Header;\r
976 UINT32 Reserved;\r
977} EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE;\r
978\r
979///\r
980/// PMTT Version (as defined in ACPI 5.0 spec.)\r
981///\r
982#define EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
983\r
984///\r
985/// Common Memory Aggregator Device Structure.\r
986///\r
987typedef struct {\r
988 UINT8 Type;\r
989 UINT8 Reserved;\r
990 UINT16 Length;\r
991 UINT16 Flags;\r
992 UINT16 Reserved1;\r
993} EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
994\r
995///\r
996/// Memory Aggregator Device Type\r
997///\r
998#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
999#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1000#define EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
1001\r
1002///\r
1003/// Socket Memory Aggregator Device Structure.\r
1004///\r
1005typedef struct {\r
1006 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
fa8801f5
JY		 1007 UINT16 SocketIdentifier;\r
1008 UINT16 Reserved;\r
4a18b92c
JY		 1009//EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1010} EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1011\r
1012///\r
1013/// MemoryController Memory Aggregator Device Structure.\r
1014///\r
1015typedef struct {\r
1016 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1017 UINT32 ReadLatency;\r
1018 UINT32 WriteLatency;\r
1019 UINT32 ReadBandwidth;\r
1020 UINT32 WriteBandwidth;\r
1021 UINT16 OptimalAccessUnit;\r
1022 UINT16 OptimalAccessAlignment;\r
1023 UINT16 Reserved;\r
1024 UINT16 NumberOfProximityDomains;\r
1025//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1026//EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1027} EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1028\r
1029///\r
1030/// DIMM Memory Aggregator Device Structure.\r
1031///\r
1032typedef struct {\r
1033 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1034 UINT16 PhysicalComponentIdentifier;\r
1035 UINT16 Reserved;\r
1036 UINT32 SizeOfDimm;\r
1037 UINT32 SmbiosHandle;\r
1038} EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1039\r
1040///\r
1041/// Boot Graphics Resource Table definition.\r
1042///\r
1043typedef struct {\r
1044 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1045 ///\r
1046 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1047 ///\r
1048 UINT16 Version;\r
1049 ///\r
1050 /// 1-byte status field indicating current status about the table.\r
1051 /// Bits[7:1] = Reserved (must be zero)\r
1052 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1053 ///\r
1054 UINT8 Status;\r
1055 ///\r
1056 /// 1-byte enumerated type field indicating format of the image.\r
1057 /// 0 = Bitmap\r
1058 /// 1 - 255 Reserved (for future use)\r
1059 ///\r
1060 UINT8 ImageType;\r
1061 ///\r
1062 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1063 /// of the image bitmap.\r
1064 ///\r
1065 UINT64 ImageAddress;\r
1066 ///\r
1067 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1068 /// (X, Y) display offset of the top left corner of the boot image.\r
1069 /// The top left corner of the display is at offset (0, 0).\r
1070 ///\r
1071 UINT32 ImageOffsetX;\r
1072 ///\r
1073 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1074 /// (X, Y) display offset of the top left corner of the boot image.\r
1075 /// The top left corner of the display is at offset (0, 0).\r
1076 ///\r
1077 UINT32 ImageOffsetY;\r
1078} EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1079\r
1080///\r
1081/// BGRT Revision\r
1082///\r
1083#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1084\r
1085///\r
1086/// BGRT Version\r
1087///\r
1088#define EFI_ACPI_5_0_BGRT_VERSION 0x01\r
1089\r
1090///\r
1091/// BGRT Status\r
1092///\r
f449affe
JY		 1093#define EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1094#define EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED 0x01\r
1095#define EFI_ACPI_5_0_BGRT_STATUS_INVALID EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED\r
1096#define EFI_ACPI_5_0_BGRT_STATUS_VALID EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED\r
4a18b92c
JY		 1097\r
1098///\r
1099/// BGRT Image Type\r
1100///\r
1101#define EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP 0x00\r
1102\r
1103///\r
1104/// FPDT Version (as defined in ACPI 5.0 spec.)\r
1105///\r
1106#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1107\r
1108///\r
1109/// FPDT Performance Record Types\r
1110///\r
1111#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1112#define EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1113\r
1114///\r
1115/// FPDT Performance Record Revision\r
1116///\r
1117#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1118#define EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1119\r
1120///\r
1121/// FPDT Runtime Performance Record Types\r
1122///\r
1123#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1124#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1125#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1126\r
1127///\r
1128/// FPDT Runtime Performance Record Revision\r
1129///\r
1130#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1131#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1132#define EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1133\r
1134///\r
1135/// FPDT Performance Record header\r
1136///\r
1137typedef struct {\r
1138 UINT16 Type;\r
1139 UINT8 Length;\r
1140 UINT8 Revision;\r
1141} EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER;\r
1142\r
1143///\r
1144/// FPDT Performance Table header\r
1145///\r
1146typedef struct {\r
1147 UINT32 Signature;\r
1148 UINT32 Length;\r
1149} EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER;\r
1150\r
1151///\r
1152/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1153///\r
1154typedef struct {\r
1155 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1156 UINT32 Reserved;\r
1157 ///\r
1158 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1159 ///\r
1160 UINT64 BootPerformanceTablePointer;\r
1161} EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1162\r
1163///\r
1164/// FPDT S3 Performance Table Pointer Record Structure\r
1165///\r
1166typedef struct {\r
1167 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1168 UINT32 Reserved;\r
1169 ///\r
1170 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1171 ///\r
1172 UINT64 S3PerformanceTablePointer;\r
1173} EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1174\r
1175///\r
1176/// FPDT Firmware Basic Boot Performance Record Structure\r
1177///\r
1178typedef struct {\r
1179 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1180 UINT32 Reserved;\r
1181 ///\r
1182 /// Timer value logged at the beginning of firmware image execution.\r
1183 /// This may not always be zero or near zero.\r
1184 ///\r
1185 UINT64 ResetEnd;\r
1186 ///\r
1187 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1188 /// For non-UEFI compatible boots, this field must be zero.\r
1189 ///\r
1190 UINT64 OsLoaderLoadImageStart;\r
1191 ///\r
1192 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1193 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1194 /// to the INT 19h handler invocation.\r
1195 ///\r
1196 UINT64 OsLoaderStartImageStart;\r
1197 ///\r
1198 /// Timer value logged at the point when the OS loader calls the\r
1199 /// ExitBootServices function for UEFI compatible firmware.\r
1200 /// For non-UEFI compatible boots, this field must be zero.\r
1201 ///\r
1202 UINT64 ExitBootServicesEntry;\r
1203 ///\r
1204 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1205 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1206 /// For non-UEFI compatible boots, this field must be zero.\r
1207 ///\r
1208 UINT64 ExitBootServicesExit;\r
1209} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1210\r
1211///\r
1212/// FPDT Firmware Basic Boot Performance Table signature\r
1213///\r
1214#define EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1215\r
1216//\r
1217// FPDT Firmware Basic Boot Performance Table\r
1218//\r
1219typedef struct {\r
1220 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1221 //\r
1222 // one or more Performance Records.\r
1223 //\r
1224} EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1225\r
1226///\r
1227/// FPDT "S3PT" S3 Performance Table\r
1228///\r
1229#define EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1230\r
1231//\r
1232// FPDT Firmware S3 Boot Performance Table\r
1233//\r
1234typedef struct {\r
1235 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1236 //\r
1237 // one or more Performance Records.\r
1238 //\r
1239} EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1240\r
1241///\r
1242/// FPDT Basic S3 Resume Performance Record\r
1243///\r
1244typedef struct {\r
1245 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1246 ///\r
1247 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1248 ///\r
1249 UINT32 ResumeCount;\r
1250 ///\r
1251 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1252 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1253 ///\r
1254 UINT64 FullResume;\r
1255 ///\r
1256 /// Average timer value of all resume cycles logged since the last full boot\r
1257 /// sequence, including the most recent resume. Note that the entire log of\r
1258 /// timer values does not need to be retained in order to calculate this average.\r
1259 ///\r
1260 UINT64 AverageResume;\r
1261} EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD;\r
1262\r
1263///\r
1264/// FPDT Basic S3 Suspend Performance Record\r
1265///\r
1266typedef struct {\r
1267 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1268 ///\r
1269 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1270 /// Only the most recent suspend cycle's timer value is retained.\r
1271 ///\r
1272 UINT64 SuspendStart;\r
1273 ///\r
1274 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1275 /// mechanism) used to trigger hardware entry to S3.\r
1276 /// Only the most recent suspend cycle's timer value is retained.\r
1277 ///\r
1278 UINT64 SuspendEnd;\r
1279} EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD;\r
1280\r
1281///\r
1282/// Firmware Performance Record Table definition.\r
1283///\r
1284typedef struct {\r
1285 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1286} EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1287\r
1288///\r
1289/// Generic Timer Description Table definition.\r
1290///\r
1291typedef struct {\r
1292 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1293 UINT64 PhysicalAddress;\r
1294 UINT32 GlobalFlags;\r
1295 UINT32 SecurePL1TimerGSIV;\r
1296 UINT32 SecurePL1TimerFlags;\r
1297 UINT32 NonSecurePL1TimerGSIV;\r
1298 UINT32 NonSecurePL1TimerFlags;\r
1299 UINT32 VirtualTimerGSIV;\r
1300 UINT32 VirtualTimerFlags;\r
1301 UINT32 NonSecurePL2TimerGSIV;\r
1302 UINT32 NonSecurePL2TimerFlags;\r
1303} EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1304\r
1305///\r
1306/// GTDT Version (as defined in ACPI 5.0 spec.)\r
1307///\r
1308#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01\r
1309\r
1310///\r
1311/// Global Flags. All other bits are reserved and must be 0.\r
1312///\r
1313#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT BIT0\r
1314#define EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE BIT1\r
1315\r
1316///\r
1317/// Timer Flags. All other bits are reserved and must be 0.\r
1318///\r
1319#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1320#define EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1321\r
1322///\r
1323/// Boot Error Record Table (BERT)\r
1324///\r
1325typedef struct {\r
1326 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1327 UINT32 BootErrorRegionLength;\r
1328 UINT64 BootErrorRegion;\r
1329} EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1330\r
1331///\r
1332/// BERT Version (as defined in ACPI 5.0 spec.)\r
1333///\r
1334#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1335\r
1336///\r
1337/// Boot Error Region Block Status Definition\r
1338///\r
1339typedef struct {\r
1340 UINT32 UncorrectableErrorValid:1;\r
1341 UINT32 CorrectableErrorValid:1;\r
1342 UINT32 MultipleUncorrectableErrors:1;\r
1343 UINT32 MultipleCorrectableErrors:1;\r
1344 UINT32 ErrorDataEntryCount:10;\r
1345 UINT32 Reserved:18;\r
1346} EFI_ACPI_5_0_ERROR_BLOCK_STATUS;\r
1347\r
1348///\r
1349/// Boot Error Region Definition\r
1350///\r
1351typedef struct {\r
1352 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1353 UINT32 RawDataOffset;\r
1354 UINT32 RawDataLength;\r
1355 UINT32 DataLength;\r
1356 UINT32 ErrorSeverity;\r
1357} EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE;\r
1358\r
1359//\r
1360// Boot Error Severity types\r
1361//\r
1362#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE 0x00\r
1363#define EFI_ACPI_5_0_ERROR_SEVERITY_FATAL 0x01\r
1364#define EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED 0x02\r
1365#define EFI_ACPI_5_0_ERROR_SEVERITY_NONE 0x03\r
1366\r
1367///\r
1368/// Generic Error Data Entry Definition\r
1369///\r
1370typedef struct {\r
1371 UINT8 SectionType[16];\r
1372 UINT32 ErrorSeverity;\r
1373 UINT16 Revision;\r
1374 UINT8 ValidationBits;\r
1375 UINT8 Flags;\r
1376 UINT32 ErrorDataLength;\r
1377 UINT8 FruId[16];\r
1378 UINT8 FruText[20];\r
1379} EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1380\r
1381///\r
1382/// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.)\r
1383///\r
1384#define EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1385\r
1386///\r
1387/// HEST - Hardware Error Source Table\r
1388///\r
1389typedef struct {\r
1390 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1391 UINT32 ErrorSourceCount;\r
1392} EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1393\r
1394///\r
1395/// HEST Version (as defined in ACPI 5.0 spec.)\r
1396///\r
1397#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1398\r
1399//\r
1400// Error Source structure types.\r
1401//\r
1402#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1403#define EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1404#define EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1405#define EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1406#define EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER 0x07\r
1407#define EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER 0x08\r
1408#define EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR 0x09\r
1409\r
1410//\r
1411// Error Source structure flags.\r
1412//\r
1413#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1414#define EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1415\r
1416///\r
1417/// IA-32 Architecture Machine Check Exception Structure Definition\r
1418///\r
1419typedef struct {\r
1420 UINT16 Type;\r
1421 UINT16 SourceId;\r
1422 UINT8 Reserved0[2];\r
1423 UINT8 Flags;\r
1424 UINT8 Enabled;\r
1425 UINT32 NumberOfRecordsToPreAllocate;\r
1426 UINT32 MaxSectionsPerRecord;\r
1427 UINT64 GlobalCapabilityInitData;\r
1428 UINT64 GlobalControlInitData;\r
1429 UINT8 NumberOfHardwareBanks;\r
1430 UINT8 Reserved1[7];\r
1431} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1432\r
1433///\r
1434/// IA-32 Architecture Machine Check Bank Structure Definition\r
1435///\r
1436typedef struct {\r
1437 UINT8 BankNumber;\r
1438 UINT8 ClearStatusOnInitialization;\r
1439 UINT8 StatusDataFormat;\r
1440 UINT8 Reserved0;\r
1441 UINT32 ControlRegisterMsrAddress;\r
1442 UINT64 ControlInitData;\r
1443 UINT32 StatusRegisterMsrAddress;\r
1444 UINT32 AddressRegisterMsrAddress;\r
1445 UINT32 MiscRegisterMsrAddress;\r
1446} EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1447\r
1448///\r
1449/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1450///\r
1451#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1452#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1453#define EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1454\r
1455//\r
1456// Hardware Error Notification types. All other values are reserved\r
1457//\r
1458#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1459#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1460#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1461#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1462#define EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1463\r
1464///\r
1465/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1466///\r
1467typedef struct {\r
1468 UINT16 Type:1;\r
1469 UINT16 PollInterval:1;\r
1470 UINT16 SwitchToPollingThresholdValue:1;\r
1471 UINT16 SwitchToPollingThresholdWindow:1;\r
1472 UINT16 ErrorThresholdValue:1;\r
1473 UINT16 ErrorThresholdWindow:1;\r
1474 UINT16 Reserved:10;\r
1475} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1476\r
1477///\r
1478/// Hardware Error Notification Structure Definition\r
1479///\r
1480typedef struct {\r
1481 UINT8 Type;\r
1482 UINT8 Length;\r
1483 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1484 UINT32 PollInterval;\r
1485 UINT32 Vector;\r
1486 UINT32 SwitchToPollingThresholdValue;\r
1487 UINT32 SwitchToPollingThresholdWindow;\r
1488 UINT32 ErrorThresholdValue;\r
1489 UINT32 ErrorThresholdWindow;\r
1490} EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1491\r
1492///\r
1493/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1494///\r
1495typedef struct {\r
1496 UINT16 Type;\r
1497 UINT16 SourceId;\r
1498 UINT8 Reserved0[2];\r
1499 UINT8 Flags;\r
1500 UINT8 Enabled;\r
1501 UINT32 NumberOfRecordsToPreAllocate;\r
1502 UINT32 MaxSectionsPerRecord;\r
1503 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1504 UINT8 NumberOfHardwareBanks;\r
1505 UINT8 Reserved1[3];\r
1506} EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1507\r
1508///\r
1509/// IA-32 Architecture NMI Error Structure Definition\r
1510///\r
1511typedef struct {\r
1512 UINT16 Type;\r
1513 UINT16 SourceId;\r
1514 UINT8 Reserved0[2];\r
1515 UINT32 NumberOfRecordsToPreAllocate;\r
1516 UINT32 MaxSectionsPerRecord;\r
1517 UINT32 MaxRawDataLength;\r
1518} EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1519\r
1520///\r
1521/// PCI Express Root Port AER Structure Definition\r
1522///\r
1523typedef struct {\r
1524 UINT16 Type;\r
1525 UINT16 SourceId;\r
1526 UINT8 Reserved0[2];\r
1527 UINT8 Flags;\r
1528 UINT8 Enabled;\r
1529 UINT32 NumberOfRecordsToPreAllocate;\r
1530 UINT32 MaxSectionsPerRecord;\r
1531 UINT32 Bus;\r
1532 UINT16 Device;\r
1533 UINT16 Function;\r
1534 UINT16 DeviceControl;\r
1535 UINT8 Reserved1[2];\r
1536 UINT32 UncorrectableErrorMask;\r
1537 UINT32 UncorrectableErrorSeverity;\r
1538 UINT32 CorrectableErrorMask;\r
1539 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1540 UINT32 RootErrorCommand;\r
1541} EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1542\r
1543///\r
1544/// PCI Express Device AER Structure Definition\r
1545///\r
1546typedef struct {\r
1547 UINT16 Type;\r
1548 UINT16 SourceId;\r
1549 UINT8 Reserved0[2];\r
1550 UINT8 Flags;\r
1551 UINT8 Enabled;\r
1552 UINT32 NumberOfRecordsToPreAllocate;\r
1553 UINT32 MaxSectionsPerRecord;\r
1554 UINT32 Bus;\r
1555 UINT16 Device;\r
1556 UINT16 Function;\r
1557 UINT16 DeviceControl;\r
1558 UINT8 Reserved1[2];\r
1559 UINT32 UncorrectableErrorMask;\r
1560 UINT32 UncorrectableErrorSeverity;\r
1561 UINT32 CorrectableErrorMask;\r
1562 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1563} EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1564\r
1565///\r
1566/// PCI Express Bridge AER Structure Definition\r
1567///\r
1568typedef struct {\r
1569 UINT16 Type;\r
1570 UINT16 SourceId;\r
1571 UINT8 Reserved0[2];\r
1572 UINT8 Flags;\r
1573 UINT8 Enabled;\r
1574 UINT32 NumberOfRecordsToPreAllocate;\r
1575 UINT32 MaxSectionsPerRecord;\r
1576 UINT32 Bus;\r
1577 UINT16 Device;\r
1578 UINT16 Function;\r
1579 UINT16 DeviceControl;\r
1580 UINT8 Reserved1[2];\r
1581 UINT32 UncorrectableErrorMask;\r
1582 UINT32 UncorrectableErrorSeverity;\r
1583 UINT32 CorrectableErrorMask;\r
1584 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1585 UINT32 SecondaryUncorrectableErrorMask;\r
1586 UINT32 SecondaryUncorrectableErrorSeverity;\r
1587 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1588} EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1589\r
1590///\r
1591/// Generic Hardware Error Source Structure Definition\r
1592///\r
1593typedef struct {\r
1594 UINT16 Type;\r
1595 UINT16 SourceId;\r
1596 UINT16 RelatedSourceId;\r
1597 UINT8 Flags;\r
1598 UINT8 Enabled;\r
1599 UINT32 NumberOfRecordsToPreAllocate;\r
1600 UINT32 MaxSectionsPerRecord;\r
1601 UINT32 MaxRawDataLength;\r
1602 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1603 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1604 UINT32 ErrorStatusBlockLength;\r
1605} EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1606\r
1607///\r
1608/// Generic Error Status Definition\r
1609///\r
1610typedef struct {\r
1611 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus;\r
1612 UINT32 RawDataOffset;\r
1613 UINT32 RawDataLength;\r
1614 UINT32 DataLength;\r
1615 UINT32 ErrorSeverity;\r
1616} EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE;\r
1617\r
1618///\r
1619/// ERST - Error Record Serialization Table\r
1620///\r
1621typedef struct {\r
1622 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1623 UINT32 SerializationHeaderSize;\r
1624 UINT8 Reserved0[4];\r
1625 UINT32 InstructionEntryCount;\r
1626} EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1627\r
1628///\r
1629/// ERST Version (as defined in ACPI 5.0 spec.)\r
1630///\r
1631#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1632\r
1633///\r
1634/// ERST Serialization Actions\r
1635///\r
1636#define EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION 0x00\r
1637#define EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION 0x01\r
1638#define EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1639#define EFI_ACPI_5_0_ERST_END_OPERATION 0x03\r
1640#define EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET 0x04\r
1641#define EFI_ACPI_5_0_ERST_EXECUTE_OPERATION 0x05\r
1642#define EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS 0x06\r
1643#define EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS 0x07\r
1644#define EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER 0x08\r
1645#define EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER 0x09\r
1646#define EFI_ACPI_5_0_ERST_GET_RECORD_COUNT 0x0A\r
1647#define EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1648#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1649#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1650#define EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1651\r
1652///\r
1653/// ERST Action Command Status\r
1654///\r
1655#define EFI_ACPI_5_0_ERST_STATUS_SUCCESS 0x00\r
1656#define EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1657#define EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1658#define EFI_ACPI_5_0_ERST_STATUS_FAILED 0x03\r
1659#define EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1660#define EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1661\r
1662///\r
1663/// ERST Serialization Instructions\r
1664///\r
1665#define EFI_ACPI_5_0_ERST_READ_REGISTER 0x00\r
1666#define EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE 0x01\r
1667#define EFI_ACPI_5_0_ERST_WRITE_REGISTER 0x02\r
1668#define EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE 0x03\r
1669#define EFI_ACPI_5_0_ERST_NOOP 0x04\r
1670#define EFI_ACPI_5_0_ERST_LOAD_VAR1 0x05\r
1671#define EFI_ACPI_5_0_ERST_LOAD_VAR2 0x06\r
1672#define EFI_ACPI_5_0_ERST_STORE_VAR1 0x07\r
1673#define EFI_ACPI_5_0_ERST_ADD 0x08\r
1674#define EFI_ACPI_5_0_ERST_SUBTRACT 0x09\r
1675#define EFI_ACPI_5_0_ERST_ADD_VALUE 0x0A\r
1676#define EFI_ACPI_5_0_ERST_SUBTRACT_VALUE 0x0B\r
1677#define EFI_ACPI_5_0_ERST_STALL 0x0C\r
1678#define EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE 0x0D\r
1679#define EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1680#define EFI_ACPI_5_0_ERST_GOTO 0x0F\r
1681#define EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1682#define EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE 0x11\r
1683#define EFI_ACPI_5_0_ERST_MOVE_DATA 0x12\r
1684\r
1685///\r
1686/// ERST Instruction Flags\r
1687///\r
1688#define EFI_ACPI_5_0_ERST_PRESERVE_REGISTER 0x01\r
1689\r
1690///\r
1691/// ERST Serialization Instruction Entry\r
1692///\r
1693typedef struct {\r
1694 UINT8 SerializationAction;\r
1695 UINT8 Instruction;\r
1696 UINT8 Flags;\r
1697 UINT8 Reserved0;\r
1698 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1699 UINT64 Value;\r
1700 UINT64 Mask;\r
1701} EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1702\r
1703///\r
1704/// EINJ - Error Injection Table\r
1705///\r
1706typedef struct {\r
1707 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1708 UINT32 InjectionHeaderSize;\r
1709 UINT8 InjectionFlags;\r
1710 UINT8 Reserved0[3];\r
1711 UINT32 InjectionEntryCount;\r
1712} EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER;\r
1713\r
1714///\r
1715/// EINJ Version (as defined in ACPI 5.0 spec.)\r
1716///\r
1717#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION 0x01\r
1718\r
1719///\r
1720/// EINJ Error Injection Actions\r
1721///\r
1722#define EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1723#define EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1724#define EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE 0x02\r
1725#define EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE 0x03\r
1726#define EFI_ACPI_5_0_EINJ_END_OPERATION 0x04\r
1727#define EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION 0x05\r
1728#define EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS 0x06\r
1729#define EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS 0x07\r
1730#define EFI_ACPI_5_0_EINJ_TRIGGER_ERROR 0xFF\r
1731\r
1732///\r
1733/// EINJ Action Command Status\r
1734///\r
1735#define EFI_ACPI_5_0_EINJ_STATUS_SUCCESS 0x00\r
1736#define EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1737#define EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS 0x02\r
1738\r
1739///\r
1740/// EINJ Error Type Definition\r
1741///\r
1742#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1743#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1744#define EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1745#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1746#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1747#define EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1748#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1749#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1750#define EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1751#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1752#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1753#define EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1754\r
1755///\r
1756/// EINJ Injection Instructions\r
1757///\r
1758#define EFI_ACPI_5_0_EINJ_READ_REGISTER 0x00\r
1759#define EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE 0x01\r
1760#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER 0x02\r
1761#define EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE 0x03\r
1762#define EFI_ACPI_5_0_EINJ_NOOP 0x04\r
1763\r
1764///\r
1765/// EINJ Instruction Flags\r
1766///\r
1767#define EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER 0x01\r
1768\r
1769///\r
1770/// EINJ Injection Instruction Entry\r
1771///\r
1772typedef struct {\r
1773 UINT8 InjectionAction;\r
1774 UINT8 Instruction;\r
1775 UINT8 Flags;\r
1776 UINT8 Reserved0;\r
1777 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1778 UINT64 Value;\r
1779 UINT64 Mask;\r
1780} EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1781\r
1782///\r
1783/// EINJ Trigger Action Table\r
1784///\r
1785typedef struct {\r
1786 UINT32 HeaderSize;\r
1787 UINT32 Revision;\r
1788 UINT32 TableSize;\r
1789 UINT32 EntryCount;\r
1790} EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE;\r
1791\r
1792///\r
1793/// Platform Communications Channel Table (PCCT)\r
1794///\r
1795typedef struct {\r
1796 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1797 UINT32 Flags;\r
17aa79bf 1798 UINT64 Reserved;\r
4a18b92c
JY		 1799} EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1800\r
1801///\r
1802/// PCCT Version (as defined in ACPI 5.0 spec.)\r
1803///\r
1804#define EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
1805\r
1806///\r
1807/// PCCT Global Flags\r
1808///\r
1809#define EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL BIT0\r
1810\r
1811//\r
1812// PCCT Subspace type\r
1813//\r
1814#define EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1815\r
1816///\r
1817/// PCC Subspace Structure Header\r
1818///\r
1819typedef struct {\r
1820 UINT8 Type;\r
1821 UINT8 Length;\r
1822} EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER;\r
1823\r
1824///\r
1825/// Generic Communications Subspace Structure\r
1826///\r
1827typedef struct {\r
1828 UINT8 Type;\r
1829 UINT8 Length;\r
1830 UINT8 Reserved[6];\r
1831 UINT64 BaseAddress;\r
1832 UINT64 AddressLength;\r
1833 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1834 UINT64 DoorbellPreserve;\r
1835 UINT64 DoorbellWrite;\r
83218902
JY		 1836 UINT32 NominalLatency;\r
1837 UINT32 MaximumPeriodicAccessRate;\r
1838 UINT16 MinimumRequestTurnaroundTime;\r
4a18b92c
JY		 1839} EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC;\r
1840\r
1841///\r
1842/// Generic Communications Channel Shared Memory Region\r
1843///\r
1844\r
1845typedef struct {\r
1846 UINT8 Command;\r
1847 UINT8 Reserved:7;\r
1848 UINT8 GenerateSci:1;\r
1849} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1850\r
1851typedef struct {\r
1852 UINT8 CommandComplete:1;\r
1853 UINT8 SciDoorbell:1;\r
1854 UINT8 Error:1;\r
a71c80b6
SEHM		 1855 UINT8 PlatformNotification:1;\r
1856 UINT8 Reserved:4;\r
4a18b92c
JY		 1857 UINT8 Reserved1;\r
1858} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1859\r
1860typedef struct {\r
1861 UINT32 Signature;\r
1862 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1863 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1864} EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1865\r
1866//\r
1867// Known table signatures\r
1868//\r
1869\r
1870///\r
1871/// "RSD PTR " Root System Description Pointer\r
1872///\r
9095d37b 1873#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
4a18b92c
JY		 1874\r
1875///\r
1876/// "APIC" Multiple APIC Description Table\r
1877///\r
1878#define EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1879\r
1880///\r
1881/// "BERT" Boot Error Record Table\r
1882///\r
1883#define EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1884\r
1885///\r
1886/// "BGRT" Boot Graphics Resource Table\r
1887///\r
1888#define EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1889\r
1890///\r
1891/// "CPEP" Corrected Platform Error Polling Table\r
1892///\r
1893#define EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1894\r
1895///\r
1896/// "DSDT" Differentiated System Description Table\r
1897///\r
1898#define EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1899\r
1900///\r
1901/// "ECDT" Embedded Controller Boot Resources Table\r
1902///\r
1903#define EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1904\r
1905///\r
1906/// "EINJ" Error Injection Table\r
1907///\r
1908#define EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1909\r
1910///\r
1911/// "ERST" Error Record Serialization Table\r
1912///\r
1913#define EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1914\r
1915///\r
1916/// "FACP" Fixed ACPI Description Table\r
1917///\r
1918#define EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1919\r
1920///\r
1921/// "FACS" Firmware ACPI Control Structure\r
1922///\r
1923#define EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1924\r
1925///\r
1926/// "FPDT" Firmware Performance Data Table\r
1927///\r
1928#define EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1929\r
1930///\r
1931/// "GTDT" Generic Timer Description Table\r
1932///\r
1933#define EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1934\r
1935///\r
1936/// "HEST" Hardware Error Source Table\r
1937///\r
1938#define EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1939\r
1940///\r
1941/// "MPST" Memory Power State Table\r
1942///\r
1943#define EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1944\r
1945///\r
1946/// "MSCT" Maximum System Characteristics Table\r
1947///\r
1948#define EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1949\r
1950///\r
1951/// "PMTT" Platform Memory Topology Table\r
1952///\r
1953#define EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1954\r
1955///\r
1956/// "PSDT" Persistent System Description Table\r
1957///\r
1958#define EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1959\r
1960///\r
1961/// "RASF" ACPI RAS Feature Table\r
1962///\r
1963#define EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1964\r
1965///\r
1966/// "RSDT" Root System Description Table\r
1967///\r
1968#define EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1969\r
1970///\r
1971/// "SBST" Smart Battery Specification Table\r
1972///\r
1973#define EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1974\r
1975///\r
1976/// "SLIT" System Locality Information Table\r
1977///\r
1978#define EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
1979\r
1980///\r
1981/// "SRAT" System Resource Affinity Table\r
1982///\r
1983#define EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
1984\r
1985///\r
1986/// "SSDT" Secondary System Description Table\r
1987///\r
1988#define EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
1989\r
1990///\r
1991/// "XSDT" Extended System Description Table\r
1992///\r
1993#define EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
1994\r
1995///\r
1996/// "BOOT" MS Simple Boot Spec\r
1997///\r
1998#define EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
1999\r
2000///\r
2001/// "CSRT" MS Core System Resource Table\r
2002///\r
2003#define EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2004\r
2005///\r
2006/// "DBG2" MS Debug Port 2 Spec\r
2007///\r
2008#define EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2009\r
2010///\r
2011/// "DBGP" MS Debug Port Spec\r
2012///\r
2013#define EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2014\r
2015///\r
2016/// "DMAR" DMA Remapping Table\r
2017///\r
2018#define EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2019\r
f449affe
JY		 2020///\r
2021/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2022///\r
2023#define EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2024\r
4a18b92c
JY		 2025///\r
2026/// "ETDT" Event Timer Description Table\r
2027///\r
2028#define EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2029\r
2030///\r
2031/// "HPET" IA-PC High Precision Event Timer Table\r
2032///\r
2033#define EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2034\r
2035///\r
2036/// "iBFT" iSCSI Boot Firmware Table\r
2037///\r
2038#define EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2039\r
2040///\r
2041/// "IVRS" I/O Virtualization Reporting Structure\r
2042///\r
2043#define EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2044\r
2045///\r
2046/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2047///\r
2048#define EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2049\r
2050///\r
2051/// "MCHI" Management Controller Host Interface Table\r
2052///\r
2053#define EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2054\r
2055///\r
2056/// "MSDM" MS Data Management Table\r
2057///\r
2058#define EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2059\r
2060///\r
2061/// "SLIC" MS Software Licensing Table Specification\r
2062///\r
2063#define EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2064\r
2065///\r
2066/// "SPCR" Serial Port Concole Redirection Table\r
2067///\r
2068#define EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2069\r
2070///\r
2071/// "SPMI" Server Platform Management Interface Table\r
2072///\r
2073#define EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2074\r
2075///\r
2076/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2077///\r
2078#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2079\r
2080///\r
2081/// "TPM2" Trusted Computing Platform 1 Table\r
2082///\r
2083#define EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2084\r
2085///\r
2086/// "UEFI" UEFI ACPI Data Table\r
2087///\r
2088#define EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2089\r
2090///\r
f449affe 2091/// "WAET" Windows ACPI Emulated Devices Table\r
4a18b92c 2092///\r
f449affe
JY		 2093#define EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2094#define EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE\r
4a18b92c
JY		 2095\r
2096///\r
2097/// "WDAT" Watchdog Action Table\r
2098///\r
2099#define EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2100\r
2101///\r
2102/// "WDRT" Watchdog Resource Table\r
2103///\r
2104#define EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2105\r
2106///\r
2107/// "WPBT" MS Platform Binary Table\r
2108///\r
2109#define EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2110\r
2111#pragma pack()\r
2112\r
2113#endif\r
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