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[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi51.h
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9095d37b 1/** @file\r
b84621bc 2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016.\r
f449affe 3\r
a71c80b6 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>\r
267a92fe 5 Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
8a2270a6 6 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
a67efa3b 7 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>\r
9344f092 8 SPDX-License-Identifier: BSD-2-Clause-Patent\r
f449affe
JY		 9**/\r
10\r
11#ifndef _ACPI_5_1_H_\r
12#define _ACPI_5_1_H_\r
13\r
14#include <IndustryStandard/Acpi50.h>\r
15\r
16//\r
17// Ensure proper structure formats\r
18//\r
19#pragma pack(1)\r
20\r
21///\r
22/// ACPI 5.1 Generic Address Space definition\r
23///\r
24typedef struct {\r
2f88bd3a
MK		 25 UINT8 AddressSpaceId;\r
26 UINT8 RegisterBitWidth;\r
27 UINT8 RegisterBitOffset;\r
28 UINT8 AccessSize;\r
29 UINT64 Address;\r
f449affe
JY		 30} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;\r
31\r
32//\r
33// Generic Address Space Address IDs\r
34//\r
2f88bd3a
MK		 35#define EFI_ACPI_5_1_SYSTEM_MEMORY 0\r
36#define EFI_ACPI_5_1_SYSTEM_IO 1\r
37#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2\r
38#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3\r
39#define EFI_ACPI_5_1_SMBUS 4\r
f449affe
JY		 40#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
41#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
42\r
43//\r
44// Generic Address Space Access Sizes\r
45//\r
46#define EFI_ACPI_5_1_UNDEFINED 0\r
47#define EFI_ACPI_5_1_BYTE 1\r
48#define EFI_ACPI_5_1_WORD 2\r
49#define EFI_ACPI_5_1_DWORD 3\r
50#define EFI_ACPI_5_1_QWORD 4\r
51\r
52//\r
53// ACPI 5.1 table structures\r
54//\r
55\r
56///\r
57/// Root System Description Pointer Structure\r
58///\r
59typedef struct {\r
2f88bd3a
MK		 60 UINT64 Signature;\r
61 UINT8 Checksum;\r
62 UINT8 OemId[6];\r
63 UINT8 Revision;\r
64 UINT32 RsdtAddress;\r
65 UINT32 Length;\r
66 UINT64 XsdtAddress;\r
67 UINT8 ExtendedChecksum;\r
68 UINT8 Reserved[3];\r
f449affe
JY		 69} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
70\r
71///\r
72/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)\r
73///\r
2f88bd3a 74#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2\r
f449affe
JY		 75\r
76///\r
77/// Common table header, this prefaces all ACPI tables, including FACS, but\r
78/// excluding the RSD PTR structure\r
79///\r
80typedef struct {\r
2f88bd3a
MK		 81 UINT32 Signature;\r
82 UINT32 Length;\r
f449affe
JY		 83} EFI_ACPI_5_1_COMMON_HEADER;\r
84\r
85//\r
86// Root System Description Table\r
9095d37b 87// No definition needed as it is a common description table header, the same with\r
f449affe
JY		 88// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
89//\r
90\r
91///\r
92/// RSDT Revision (as defined in ACPI 5.1 spec.)\r
93///\r
2f88bd3a 94#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
f449affe
JY		 95\r
96//\r
97// Extended System Description Table\r
9095d37b 98// No definition needed as it is a common description table header, the same with\r
f449affe
JY		 99// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
100//\r
101\r
102///\r
103/// XSDT Revision (as defined in ACPI 5.1 spec.)\r
104///\r
2f88bd3a 105#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
f449affe
JY		 106\r
107///\r
108/// Fixed ACPI Description Table Structure (FADT)\r
109///\r
110typedef struct {\r
2f88bd3a
MK		 111 EFI_ACPI_DESCRIPTION_HEADER Header;\r
112 UINT32 FirmwareCtrl;\r
113 UINT32 Dsdt;\r
114 UINT8 Reserved0;\r
115 UINT8 PreferredPmProfile;\r
116 UINT16 SciInt;\r
117 UINT32 SmiCmd;\r
118 UINT8 AcpiEnable;\r
119 UINT8 AcpiDisable;\r
120 UINT8 S4BiosReq;\r
121 UINT8 PstateCnt;\r
122 UINT32 Pm1aEvtBlk;\r
123 UINT32 Pm1bEvtBlk;\r
124 UINT32 Pm1aCntBlk;\r
125 UINT32 Pm1bCntBlk;\r
126 UINT32 Pm2CntBlk;\r
127 UINT32 PmTmrBlk;\r
128 UINT32 Gpe0Blk;\r
129 UINT32 Gpe1Blk;\r
130 UINT8 Pm1EvtLen;\r
131 UINT8 Pm1CntLen;\r
132 UINT8 Pm2CntLen;\r
133 UINT8 PmTmrLen;\r
134 UINT8 Gpe0BlkLen;\r
135 UINT8 Gpe1BlkLen;\r
136 UINT8 Gpe1Base;\r
137 UINT8 CstCnt;\r
138 UINT16 PLvl2Lat;\r
139 UINT16 PLvl3Lat;\r
140 UINT16 FlushSize;\r
141 UINT16 FlushStride;\r
142 UINT8 DutyOffset;\r
143 UINT8 DutyWidth;\r
144 UINT8 DayAlrm;\r
145 UINT8 MonAlrm;\r
146 UINT8 Century;\r
147 UINT16 IaPcBootArch;\r
148 UINT8 Reserved1;\r
149 UINT32 Flags;\r
150 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
151 UINT8 ResetValue;\r
152 UINT16 ArmBootArch;\r
153 UINT8 MinorVersion;\r
154 UINT64 XFirmwareCtrl;\r
155 UINT64 XDsdt;\r
156 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
157 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
158 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
159 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
f449affe
JY		 166} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;\r
167\r
168///\r
169/// FADT Version (as defined in ACPI 5.1 spec.)\r
170///\r
2f88bd3a 171#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
f449affe
JY		 172#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01\r
173\r
174//\r
175// Fixed ACPI Description Table Preferred Power Management Profile\r
176//\r
177#define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0\r
178#define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1\r
179#define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2\r
180#define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3\r
181#define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4\r
182#define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5\r
183#define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6\r
184#define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7\r
185#define EFI_ACPI_5_1_PM_PROFILE_TABLET 8\r
186\r
187//\r
188// Fixed ACPI Description Table Boot Architecture Flags\r
189// All other bits are reserved and must be set to 0.\r
190//\r
2f88bd3a
MK		 191#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0\r
192#define EFI_ACPI_5_1_8042 BIT1\r
193#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2\r
194#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3\r
195#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4\r
196#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5\r
f449affe
JY		 197\r
198//\r
199// Fixed ACPI Description Table Arm Boot Architecture Flags\r
200// All other bits are reserved and must be set to 0.\r
201//\r
2f88bd3a
MK		 202#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0\r
203#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1\r
f449affe
JY		 204\r
205//\r
206// Fixed ACPI Description Table Fixed Feature Flags\r
207// All other bits are reserved and must be set to 0.\r
208//\r
2f88bd3a
MK		 209#define EFI_ACPI_5_1_WBINVD BIT0\r
210#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1\r
211#define EFI_ACPI_5_1_PROC_C1 BIT2\r
212#define EFI_ACPI_5_1_P_LVL2_UP BIT3\r
213#define EFI_ACPI_5_1_PWR_BUTTON BIT4\r
214#define EFI_ACPI_5_1_SLP_BUTTON BIT5\r
215#define EFI_ACPI_5_1_FIX_RTC BIT6\r
216#define EFI_ACPI_5_1_RTC_S4 BIT7\r
217#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8\r
218#define EFI_ACPI_5_1_DCK_CAP BIT9\r
219#define EFI_ACPI_5_1_RESET_REG_SUP BIT10\r
220#define EFI_ACPI_5_1_SEALED_CASE BIT11\r
221#define EFI_ACPI_5_1_HEADLESS BIT12\r
222#define EFI_ACPI_5_1_CPU_SW_SLP BIT13\r
223#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14\r
224#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15\r
225#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16\r
226#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17\r
227#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18\r
228#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
229#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20\r
230#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
f449affe
JY		 231\r
232///\r
233/// Firmware ACPI Control Structure\r
234///\r
235typedef struct {\r
2f88bd3a
MK		 236 UINT32 Signature;\r
237 UINT32 Length;\r
238 UINT32 HardwareSignature;\r
239 UINT32 FirmwareWakingVector;\r
240 UINT32 GlobalLock;\r
241 UINT32 Flags;\r
242 UINT64 XFirmwareWakingVector;\r
243 UINT8 Version;\r
244 UINT8 Reserved0[3];\r
245 UINT32 OspmFlags;\r
246 UINT8 Reserved1[24];\r
f449affe
JY		 247} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
248\r
249///\r
250/// FACS Version (as defined in ACPI 5.1 spec.)\r
251///\r
252#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
253\r
254///\r
255/// Firmware Control Structure Feature Flags\r
256/// All other bits are reserved and must be set to 0.\r
257///\r
2f88bd3a
MK		 258#define EFI_ACPI_5_1_S4BIOS_F BIT0\r
259#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1\r
f449affe
JY		 260\r
261///\r
262/// OSPM Enabled Firmware Control Structure Flags\r
263/// All other bits are reserved and must be set to 0.\r
264///\r
2f88bd3a 265#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0\r
f449affe
JY		 266\r
267//\r
268// Differentiated System Description Table,\r
269// Secondary System Description Table\r
270// and Persistent System Description Table,\r
271// no definition needed as they are common description table header, the same with\r
272// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
273//\r
2f88bd3a
MK		 274#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
275#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
f449affe
JY		 276\r
277///\r
278/// Multiple APIC Description Table header definition. The rest of the table\r
279/// must be defined in a platform specific manner.\r
280///\r
281typedef struct {\r
2f88bd3a
MK		 282 EFI_ACPI_DESCRIPTION_HEADER Header;\r
283 UINT32 LocalApicAddress;\r
284 UINT32 Flags;\r
f449affe
JY		 285} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
286\r
287///\r
288/// MADT Revision (as defined in ACPI 5.1 spec.)\r
289///\r
2f88bd3a 290#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
f449affe
JY		 291\r
292///\r
293/// Multiple APIC Flags\r
294/// All other bits are reserved and must be set to 0.\r
295///\r
2f88bd3a 296#define EFI_ACPI_5_1_PCAT_COMPAT BIT0\r
f449affe
JY		 297\r
298//\r
299// Multiple APIC Description Table APIC structure types\r
300// All other values between 0x0D and 0x7F are reserved and\r
301// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
302//\r
303#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00\r
304#define EFI_ACPI_5_1_IO_APIC 0x01\r
305#define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02\r
306#define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
307#define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04\r
308#define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
309#define EFI_ACPI_5_1_IO_SAPIC 0x06\r
310#define EFI_ACPI_5_1_LOCAL_SAPIC 0x07\r
311#define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08\r
312#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09\r
313#define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A\r
314#define EFI_ACPI_5_1_GIC 0x0B\r
315#define EFI_ACPI_5_1_GICD 0x0C\r
316#define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D\r
317#define EFI_ACPI_5_1_GICR 0x0E\r
318\r
319//\r
320// APIC Structure Definitions\r
321//\r
322\r
323///\r
324/// Processor Local APIC Structure Definition\r
325///\r
326typedef struct {\r
2f88bd3a
MK		 327 UINT8 Type;\r
328 UINT8 Length;\r
329 UINT8 AcpiProcessorId;\r
330 UINT8 ApicId;\r
331 UINT32 Flags;\r
f449affe
JY		 332} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
333\r
334///\r
335/// Local APIC Flags. All other bits are reserved and must be 0.\r
336///\r
2f88bd3a 337#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0\r
f449affe
JY		 338\r
339///\r
340/// IO APIC Structure\r
341///\r
342typedef struct {\r
2f88bd3a
MK		 343 UINT8 Type;\r
344 UINT8 Length;\r
345 UINT8 IoApicId;\r
346 UINT8 Reserved;\r
347 UINT32 IoApicAddress;\r
348 UINT32 GlobalSystemInterruptBase;\r
f449affe
JY		 349} EFI_ACPI_5_1_IO_APIC_STRUCTURE;\r
350\r
351///\r
352/// Interrupt Source Override Structure\r
353///\r
354typedef struct {\r
2f88bd3a
MK		 355 UINT8 Type;\r
356 UINT8 Length;\r
357 UINT8 Bus;\r
358 UINT8 Source;\r
359 UINT32 GlobalSystemInterrupt;\r
360 UINT16 Flags;\r
f449affe
JY		 361} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
362\r
363///\r
364/// Platform Interrupt Sources Structure Definition\r
365///\r
366typedef struct {\r
2f88bd3a
MK		 367 UINT8 Type;\r
368 UINT8 Length;\r
369 UINT16 Flags;\r
370 UINT8 InterruptType;\r
371 UINT8 ProcessorId;\r
372 UINT8 ProcessorEid;\r
373 UINT8 IoSapicVector;\r
374 UINT32 GlobalSystemInterrupt;\r
375 UINT32 PlatformInterruptSourceFlags;\r
376 UINT8 CpeiProcessorOverride;\r
377 UINT8 Reserved[31];\r
f449affe
JY		 378} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
379\r
380//\r
381// MPS INTI flags.\r
382// All other bits are reserved and must be set to 0.\r
383//\r
384#define EFI_ACPI_5_1_POLARITY (3 << 0)\r
385#define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)\r
386\r
387///\r
388/// Non-Maskable Interrupt Source Structure\r
389///\r
390typedef struct {\r
2f88bd3a
MK		 391 UINT8 Type;\r
392 UINT8 Length;\r
393 UINT16 Flags;\r
394 UINT32 GlobalSystemInterrupt;\r
f449affe
JY		 395} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
396\r
397///\r
398/// Local APIC NMI Structure\r
399///\r
400typedef struct {\r
2f88bd3a
MK		 401 UINT8 Type;\r
402 UINT8 Length;\r
403 UINT8 AcpiProcessorId;\r
404 UINT16 Flags;\r
405 UINT8 LocalApicLint;\r
f449affe
JY		 406} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;\r
407\r
408///\r
409/// Local APIC Address Override Structure\r
410///\r
411typedef struct {\r
2f88bd3a
MK		 412 UINT8 Type;\r
413 UINT8 Length;\r
414 UINT16 Reserved;\r
415 UINT64 LocalApicAddress;\r
f449affe
JY		 416} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
417\r
418///\r
419/// IO SAPIC Structure\r
420///\r
421typedef struct {\r
2f88bd3a
MK		 422 UINT8 Type;\r
423 UINT8 Length;\r
424 UINT8 IoApicId;\r
425 UINT8 Reserved;\r
426 UINT32 GlobalSystemInterruptBase;\r
427 UINT64 IoSapicAddress;\r
f449affe
JY		 428} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;\r
429\r
430///\r
431/// Local SAPIC Structure\r
432/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
433///\r
434typedef struct {\r
2f88bd3a
MK		 435 UINT8 Type;\r
436 UINT8 Length;\r
437 UINT8 AcpiProcessorId;\r
438 UINT8 LocalSapicId;\r
439 UINT8 LocalSapicEid;\r
440 UINT8 Reserved[3];\r
441 UINT32 Flags;\r
442 UINT32 ACPIProcessorUIDValue;\r
f449affe
JY		 443} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
444\r
445///\r
446/// Platform Interrupt Sources Structure\r
447///\r
448typedef struct {\r
2f88bd3a
MK		 449 UINT8 Type;\r
450 UINT8 Length;\r
451 UINT16 Flags;\r
452 UINT8 InterruptType;\r
453 UINT8 ProcessorId;\r
454 UINT8 ProcessorEid;\r
455 UINT8 IoSapicVector;\r
456 UINT32 GlobalSystemInterrupt;\r
457 UINT32 PlatformInterruptSourceFlags;\r
f449affe
JY		 458} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
459\r
460///\r
461/// Platform Interrupt Source Flags.\r
462/// All other bits are reserved and must be set to 0.\r
463///\r
2f88bd3a 464#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0\r
f449affe
JY		 465\r
466///\r
467/// Processor Local x2APIC Structure Definition\r
468///\r
469typedef struct {\r
2f88bd3a
MK		 470 UINT8 Type;\r
471 UINT8 Length;\r
472 UINT8 Reserved[2];\r
473 UINT32 X2ApicId;\r
474 UINT32 Flags;\r
475 UINT32 AcpiProcessorUid;\r
f449affe
JY		 476} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
477\r
478///\r
479/// Local x2APIC NMI Structure\r
480///\r
481typedef struct {\r
2f88bd3a
MK		 482 UINT8 Type;\r
483 UINT8 Length;\r
484 UINT16 Flags;\r
485 UINT32 AcpiProcessorUid;\r
486 UINT8 LocalX2ApicLint;\r
487 UINT8 Reserved[3];\r
f449affe
JY		 488} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;\r
489\r
490///\r
491/// GIC Structure\r
492///\r
493typedef struct {\r
2f88bd3a
MK		 494 UINT8 Type;\r
495 UINT8 Length;\r
496 UINT16 Reserved;\r
497 UINT32 CPUInterfaceNumber;\r
498 UINT32 AcpiProcessorUid;\r
499 UINT32 Flags;\r
500 UINT32 ParkingProtocolVersion;\r
501 UINT32 PerformanceInterruptGsiv;\r
502 UINT64 ParkedAddress;\r
503 UINT64 PhysicalBaseAddress;\r
504 UINT64 GICV;\r
505 UINT64 GICH;\r
506 UINT32 VGICMaintenanceInterrupt;\r
507 UINT64 GICRBaseAddress;\r
508 UINT64 MPIDR;\r
f449affe
JY		 509} EFI_ACPI_5_1_GIC_STRUCTURE;\r
510\r
511///\r
512/// GIC Flags. All other bits are reserved and must be 0.\r
513///\r
2f88bd3a
MK		 514#define EFI_ACPI_5_1_GIC_ENABLED BIT0\r
515#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1\r
516#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
f449affe
JY		 517\r
518///\r
519/// GIC Distributor Structure\r
520///\r
521typedef struct {\r
2f88bd3a
MK		 522 UINT8 Type;\r
523 UINT8 Length;\r
524 UINT16 Reserved1;\r
525 UINT32 GicId;\r
526 UINT64 PhysicalBaseAddress;\r
527 UINT32 SystemVectorBase;\r
528 UINT8 GicVersion;\r
529 UINT8 Reserved2[3];\r
f449affe
JY		 530} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;\r
531\r
8a2270a6
SEHM		 532///\r
533/// GIC Version\r
534///\r
2f88bd3a
MK		 535#define EFI_ACPI_5_1_GIC_V1 0x01\r
536#define EFI_ACPI_5_1_GIC_V2 0x02\r
537#define EFI_ACPI_5_1_GIC_V3 0x03\r
538#define EFI_ACPI_5_1_GIC_V4 0x04\r
8a2270a6 539\r
f449affe
JY		 540///\r
541/// GIC MSI Frame Structure\r
542///\r
543typedef struct {\r
2f88bd3a
MK		 544 UINT8 Type;\r
545 UINT8 Length;\r
546 UINT16 Reserved1;\r
547 UINT32 GicMsiFrameId;\r
548 UINT64 PhysicalBaseAddress;\r
549 UINT32 Flags;\r
550 UINT16 SPICount;\r
551 UINT16 SPIBase;\r
f449affe
JY		 552} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;\r
553\r
554///\r
555/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
556///\r
2f88bd3a 557#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0\r
f449affe
JY		 558\r
559///\r
560/// GICR Structure\r
561///\r
562typedef struct {\r
2f88bd3a
MK		 563 UINT8 Type;\r
564 UINT8 Length;\r
565 UINT16 Reserved;\r
566 UINT64 DiscoveryRangeBaseAddress;\r
567 UINT32 DiscoveryRangeLength;\r
f449affe
JY		 568} EFI_ACPI_5_1_GICR_STRUCTURE;\r
569\r
570///\r
571/// Smart Battery Description Table (SBST)\r
572///\r
573typedef struct {\r
2f88bd3a
MK		 574 EFI_ACPI_DESCRIPTION_HEADER Header;\r
575 UINT32 WarningEnergyLevel;\r
576 UINT32 LowEnergyLevel;\r
577 UINT32 CriticalEnergyLevel;\r
f449affe
JY		 578} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;\r
579\r
580///\r
581/// SBST Version (as defined in ACPI 5.1 spec.)\r
582///\r
2f88bd3a 583#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
f449affe
JY		 584\r
585///\r
586/// Embedded Controller Boot Resources Table (ECDT)\r
587/// The table is followed by a null terminated ASCII string that contains\r
588/// a fully qualified reference to the name space object.\r
589///\r
590typedef struct {\r
2f88bd3a
MK		 591 EFI_ACPI_DESCRIPTION_HEADER Header;\r
592 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;\r
593 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;\r
594 UINT32 Uid;\r
595 UINT8 GpeBit;\r
f449affe
JY		 596} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
597\r
598///\r
599/// ECDT Version (as defined in ACPI 5.1 spec.)\r
600///\r
601#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
602\r
603///\r
604/// System Resource Affinity Table (SRAT). The rest of the table\r
605/// must be defined in a platform specific manner.\r
606///\r
607typedef struct {\r
2f88bd3a
MK		 608 EFI_ACPI_DESCRIPTION_HEADER Header;\r
609 UINT32 Reserved1; ///< Must be set to 1\r
610 UINT64 Reserved2;\r
f449affe
JY		 611} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
612\r
613///\r
614/// SRAT Version (as defined in ACPI 5.1 spec.)\r
615///\r
616#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
617\r
618//\r
619// SRAT structure types.\r
48a42a1c 620// All other values between 0x04 an 0xFF are reserved and\r
f449affe
JY		 621// will be ignored by OSPM.\r
622//\r
623#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
624#define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01\r
625#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
48a42a1c 626#define EFI_ACPI_5_1_GICC_AFFINITY 0x03\r
f449affe
JY		 627\r
628///\r
629/// Processor Local APIC/SAPIC Affinity Structure Definition\r
630///\r
631typedef struct {\r
2f88bd3a
MK		 632 UINT8 Type;\r
633 UINT8 Length;\r
634 UINT8 ProximityDomain7To0;\r
635 UINT8 ApicId;\r
636 UINT32 Flags;\r
637 UINT8 LocalSapicEid;\r
638 UINT8 ProximityDomain31To8[3];\r
639 UINT32 ClockDomain;\r
f449affe
JY		 640} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
641\r
642///\r
643/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
644///\r
2f88bd3a 645#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
f449affe
JY		 646\r
647///\r
648/// Memory Affinity Structure Definition\r
649///\r
650typedef struct {\r
2f88bd3a
MK		 651 UINT8 Type;\r
652 UINT8 Length;\r
653 UINT32 ProximityDomain;\r
654 UINT16 Reserved1;\r
655 UINT32 AddressBaseLow;\r
656 UINT32 AddressBaseHigh;\r
657 UINT32 LengthLow;\r
658 UINT32 LengthHigh;\r
659 UINT32 Reserved2;\r
660 UINT32 Flags;\r
661 UINT64 Reserved3;\r
f449affe
JY		 662} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;\r
663\r
664//\r
665// Memory Flags. All other bits are reserved and must be 0.\r
666//\r
2f88bd3a
MK		 667#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)\r
668#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)\r
669#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)\r
f449affe
JY		 670\r
671///\r
672/// Processor Local x2APIC Affinity Structure Definition\r
673///\r
674typedef struct {\r
2f88bd3a
MK		 675 UINT8 Type;\r
676 UINT8 Length;\r
677 UINT8 Reserved1[2];\r
678 UINT32 ProximityDomain;\r
679 UINT32 X2ApicId;\r
680 UINT32 Flags;\r
681 UINT32 ClockDomain;\r
682 UINT8 Reserved2[4];\r
f449affe
JY		 683} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
684\r
48a42a1c
JY		 685///\r
686/// GICC Affinity Structure Definition\r
687///\r
688typedef struct {\r
2f88bd3a
MK		 689 UINT8 Type;\r
690 UINT8 Length;\r
691 UINT32 ProximityDomain;\r
692 UINT32 AcpiProcessorUid;\r
693 UINT32 Flags;\r
694 UINT32 ClockDomain;\r
48a42a1c
JY		 695} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;\r
696\r
697///\r
698/// GICC Flags. All other bits are reserved and must be 0.\r
699///\r
2f88bd3a 700#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)\r
48a42a1c 701\r
f449affe
JY		 702///\r
703/// System Locality Distance Information Table (SLIT).\r
704/// The rest of the table is a matrix.\r
705///\r
706typedef struct {\r
2f88bd3a
MK		 707 EFI_ACPI_DESCRIPTION_HEADER Header;\r
708 UINT64 NumberOfSystemLocalities;\r
f449affe
JY		 709} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
710\r
711///\r
712/// SLIT Version (as defined in ACPI 5.1 spec.)\r
713///\r
714#define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
715\r
716///\r
717/// Corrected Platform Error Polling Table (CPEP)\r
718///\r
719typedef struct {\r
2f88bd3a
MK		 720 EFI_ACPI_DESCRIPTION_HEADER Header;\r
721 UINT8 Reserved[8];\r
f449affe
JY		 722} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
723\r
724///\r
725/// CPEP Version (as defined in ACPI 5.1 spec.)\r
726///\r
2f88bd3a 727#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
f449affe
JY		 728\r
729//\r
730// CPEP processor structure types.\r
731//\r
732#define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
733\r
734///\r
735/// Corrected Platform Error Polling Processor Structure Definition\r
736///\r
737typedef struct {\r
2f88bd3a
MK		 738 UINT8 Type;\r
739 UINT8 Length;\r
740 UINT8 ProcessorId;\r
741 UINT8 ProcessorEid;\r
742 UINT32 PollingInterval;\r
f449affe
JY		 743} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
744\r
745///\r
746/// Maximum System Characteristics Table (MSCT)\r
747///\r
748typedef struct {\r
2f88bd3a
MK		 749 EFI_ACPI_DESCRIPTION_HEADER Header;\r
750 UINT32 OffsetProxDomInfo;\r
751 UINT32 MaximumNumberOfProximityDomains;\r
752 UINT32 MaximumNumberOfClockDomains;\r
753 UINT64 MaximumPhysicalAddress;\r
f449affe
JY		 754} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
755\r
756///\r
757/// MSCT Version (as defined in ACPI 5.1 spec.)\r
758///\r
2f88bd3a 759#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
f449affe
JY		 760\r
761///\r
762/// Maximum Proximity Domain Information Structure Definition\r
763///\r
764typedef struct {\r
2f88bd3a
MK		 765 UINT8 Revision;\r
766 UINT8 Length;\r
767 UINT32 ProximityDomainRangeLow;\r
768 UINT32 ProximityDomainRangeHigh;\r
769 UINT32 MaximumProcessorCapacity;\r
770 UINT64 MaximumMemoryCapacity;\r
f449affe
JY		 771} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
772\r
773///\r
774/// ACPI RAS Feature Table definition.\r
775///\r
776typedef struct {\r
2f88bd3a
MK		 777 EFI_ACPI_DESCRIPTION_HEADER Header;\r
778 UINT8 PlatformCommunicationChannelIdentifier[12];\r
f449affe
JY		 779} EFI_ACPI_5_1_RAS_FEATURE_TABLE;\r
780\r
781///\r
782/// RASF Version (as defined in ACPI 5.1 spec.)\r
783///\r
2f88bd3a 784#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01\r
f449affe
JY		 785\r
786///\r
787/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
788///\r
789typedef struct {\r
2f88bd3a
MK		 790 UINT32 Signature;\r
791 UINT16 Command;\r
792 UINT16 Status;\r
793 UINT16 Version;\r
794 UINT8 RASCapabilities[16];\r
795 UINT8 SetRASCapabilities[16];\r
796 UINT16 NumberOfRASFParameterBlocks;\r
797 UINT32 SetRASCapabilitiesStatus;\r
f449affe
JY		 798} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
799\r
800///\r
801/// ACPI RASF PCC command code\r
802///\r
803#define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
804\r
805///\r
806/// ACPI RASF Platform RAS Capabilities\r
807///\r
808#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
809#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
810\r
811///\r
812/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
813///\r
814typedef struct {\r
2f88bd3a
MK		 815 UINT16 Type;\r
816 UINT16 Version;\r
817 UINT16 Length;\r
818 UINT16 PatrolScrubCommand;\r
819 UINT64 RequestedAddressRange[2];\r
820 UINT64 ActualAddressRange[2];\r
821 UINT16 Flags;\r
822 UINT8 RequestedSpeed;\r
f449affe
JY		 823} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
824\r
825///\r
826/// ACPI RASF Patrol Scrub command\r
827///\r
2f88bd3a
MK		 828#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
829#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
830#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
f449affe
JY		 831\r
832///\r
833/// Memory Power State Table definition.\r
834///\r
835typedef struct {\r
2f88bd3a
MK		 836 EFI_ACPI_DESCRIPTION_HEADER Header;\r
837 UINT8 PlatformCommunicationChannelIdentifier;\r
838 UINT8 Reserved[3];\r
839 // Memory Power Node Structure\r
840 // Memory Power State Characteristics\r
f449affe
JY		 841} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;\r
842\r
843///\r
844/// MPST Version (as defined in ACPI 5.1 spec.)\r
845///\r
2f88bd3a 846#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
f449affe
JY		 847\r
848///\r
849/// MPST Platform Communication Channel Shared Memory Region definition.\r
850///\r
851typedef struct {\r
2f88bd3a
MK		 852 UINT32 Signature;\r
853 UINT16 Command;\r
854 UINT16 Status;\r
855 UINT32 MemoryPowerCommandRegister;\r
856 UINT32 MemoryPowerStatusRegister;\r
857 UINT32 PowerStateId;\r
858 UINT32 MemoryPowerNodeId;\r
859 UINT64 MemoryEnergyConsumed;\r
860 UINT64 ExpectedAveragePowerComsuned;\r
f449affe
JY		 861} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
862\r
863///\r
864/// ACPI MPST PCC command code\r
865///\r
866#define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
867\r
868///\r
869/// ACPI MPST Memory Power command\r
870///\r
2f88bd3a
MK		 871#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
872#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
873#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
874#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
f449affe
JY		 875\r
876///\r
877/// MPST Memory Power Node Table\r
878///\r
879typedef struct {\r
2f88bd3a
MK		 880 UINT8 PowerStateValue;\r
881 UINT8 PowerStateInformationIndex;\r
f449affe
JY		 882} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;\r
883\r
884typedef struct {\r
2f88bd3a
MK		 885 UINT8 Flag;\r
886 UINT8 Reserved;\r
887 UINT16 MemoryPowerNodeId;\r
888 UINT32 Length;\r
889 UINT64 AddressBase;\r
890 UINT64 AddressLength;\r
891 UINT32 NumberOfPowerStates;\r
892 UINT32 NumberOfPhysicalComponents;\r
893 // EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
894 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
f449affe
JY		 895} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;\r
896\r
2f88bd3a
MK		 897#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
898#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
899#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
f449affe
JY		 900\r
901typedef struct {\r
2f88bd3a
MK		 902 UINT16 MemoryPowerNodeCount;\r
903 UINT8 Reserved[2];\r
f449affe
JY		 904} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;\r
905\r
906///\r
907/// MPST Memory Power State Characteristics Table\r
908///\r
909typedef struct {\r
2f88bd3a
MK		 910 UINT8 PowerStateStructureID;\r
911 UINT8 Flag;\r
912 UINT16 Reserved;\r
913 UINT32 AveragePowerConsumedInMPS0;\r
914 UINT32 RelativePowerSavingToMPS0;\r
915 UINT64 ExitLatencyToMPS0;\r
f449affe
JY		 916} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
917\r
2f88bd3a
MK		 918#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
919#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
920#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
f449affe
JY		 921\r
922typedef struct {\r
2f88bd3a
MK		 923 UINT16 MemoryPowerStateCharacteristicsCount;\r
924 UINT8 Reserved[2];\r
f449affe
JY		 925} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
926\r
927///\r
928/// Memory Topology Table definition.\r
929///\r
930typedef struct {\r
2f88bd3a
MK		 931 EFI_ACPI_DESCRIPTION_HEADER Header;\r
932 UINT32 Reserved;\r
f449affe
JY		 933} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;\r
934\r
935///\r
936/// PMTT Version (as defined in ACPI 5.1 spec.)\r
937///\r
2f88bd3a 938#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
f449affe
JY		 939\r
940///\r
941/// Common Memory Aggregator Device Structure.\r
942///\r
943typedef struct {\r
2f88bd3a
MK		 944 UINT8 Type;\r
945 UINT8 Reserved;\r
946 UINT16 Length;\r
947 UINT16 Flags;\r
948 UINT16 Reserved1;\r
f449affe
JY		 949} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
950\r
951///\r
952/// Memory Aggregator Device Type\r
953///\r
2f88bd3a
MK		 954#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0\r
955#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1\r
956#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2\r
f449affe
JY		 957\r
958///\r
959/// Socket Memory Aggregator Device Structure.\r
960///\r
961typedef struct {\r
2f88bd3a
MK		 962 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
963 UINT16 SocketIdentifier;\r
964 UINT16 Reserved;\r
965 // EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
f449affe
JY		 966} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
967\r
968///\r
969/// MemoryController Memory Aggregator Device Structure.\r
970///\r
971typedef struct {\r
2f88bd3a
MK		 972 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
973 UINT32 ReadLatency;\r
974 UINT32 WriteLatency;\r
975 UINT32 ReadBandwidth;\r
976 UINT32 WriteBandwidth;\r
977 UINT16 OptimalAccessUnit;\r
978 UINT16 OptimalAccessAlignment;\r
979 UINT16 Reserved;\r
980 UINT16 NumberOfProximityDomains;\r
981 // UINT32 ProximityDomain[NumberOfProximityDomains];\r
982 // EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
f449affe
JY		 983} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
984\r
985///\r
986/// DIMM Memory Aggregator Device Structure.\r
987///\r
988typedef struct {\r
2f88bd3a
MK		 989 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
990 UINT16 PhysicalComponentIdentifier;\r
991 UINT16 Reserved;\r
992 UINT32 SizeOfDimm;\r
993 UINT32 SmbiosHandle;\r
f449affe
JY		 994} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
995\r
996///\r
997/// Boot Graphics Resource Table definition.\r
998///\r
999typedef struct {\r
2f88bd3a 1000 EFI_ACPI_DESCRIPTION_HEADER Header;\r
f449affe
JY		 1001 ///\r
1002 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1003 ///\r
2f88bd3a 1004 UINT16 Version;\r
f449affe
JY		 1005 ///\r
1006 /// 1-byte status field indicating current status about the table.\r
1007 /// Bits[7:1] = Reserved (must be zero)\r
1008 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1009 ///\r
2f88bd3a 1010 UINT8 Status;\r
f449affe
JY		 1011 ///\r
1012 /// 1-byte enumerated type field indicating format of the image.\r
1013 /// 0 = Bitmap\r
1014 /// 1 - 255 Reserved (for future use)\r
1015 ///\r
2f88bd3a 1016 UINT8 ImageType;\r
f449affe
JY		 1017 ///\r
1018 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1019 /// of the image bitmap.\r
1020 ///\r
2f88bd3a 1021 UINT64 ImageAddress;\r
f449affe
JY		 1022 ///\r
1023 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1024 /// (X, Y) display offset of the top left corner of the boot image.\r
1025 /// The top left corner of the display is at offset (0, 0).\r
1026 ///\r
2f88bd3a 1027 UINT32 ImageOffsetX;\r
f449affe
JY		 1028 ///\r
1029 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1030 /// (X, Y) display offset of the top left corner of the boot image.\r
1031 /// The top left corner of the display is at offset (0, 0).\r
1032 ///\r
2f88bd3a 1033 UINT32 ImageOffsetY;\r
f449affe
JY		 1034} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1035\r
1036///\r
1037/// BGRT Revision\r
1038///\r
2f88bd3a 1039#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
f449affe
JY		 1040\r
1041///\r
1042/// BGRT Version\r
1043///\r
2f88bd3a 1044#define EFI_ACPI_5_1_BGRT_VERSION 0x01\r
f449affe
JY		 1045\r
1046///\r
1047/// BGRT Status\r
1048///\r
2f88bd3a
MK		 1049#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1050#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01\r
f449affe
JY		 1051\r
1052///\r
1053/// BGRT Image Type\r
1054///\r
1055#define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00\r
1056\r
1057///\r
1058/// FPDT Version (as defined in ACPI 5.1 spec.)\r
1059///\r
2f88bd3a 1060#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
f449affe
JY		 1061\r
1062///\r
1063/// FPDT Performance Record Types\r
1064///\r
2f88bd3a
MK		 1065#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1066#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
f449affe
JY		 1067\r
1068///\r
1069/// FPDT Performance Record Revision\r
1070///\r
2f88bd3a
MK		 1071#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1072#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
f449affe
JY		 1073\r
1074///\r
1075/// FPDT Runtime Performance Record Types\r
1076///\r
2f88bd3a
MK		 1077#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1078#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1079#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
f449affe
JY		 1080\r
1081///\r
1082/// FPDT Runtime Performance Record Revision\r
1083///\r
1084#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1085#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1086#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1087\r
1088///\r
1089/// FPDT Performance Record header\r
1090///\r
1091typedef struct {\r
2f88bd3a
MK		 1092 UINT16 Type;\r
1093 UINT8 Length;\r
1094 UINT8 Revision;\r
f449affe
JY		 1095} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;\r
1096\r
1097///\r
1098/// FPDT Performance Table header\r
1099///\r
1100typedef struct {\r
2f88bd3a
MK		 1101 UINT32 Signature;\r
1102 UINT32 Length;\r
f449affe
JY		 1103} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;\r
1104\r
1105///\r
1106/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1107///\r
1108typedef struct {\r
2f88bd3a
MK		 1109 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1110 UINT32 Reserved;\r
f449affe
JY		 1111 ///\r
1112 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1113 ///\r
2f88bd3a 1114 UINT64 BootPerformanceTablePointer;\r
f449affe
JY		 1115} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1116\r
1117///\r
1118/// FPDT S3 Performance Table Pointer Record Structure\r
1119///\r
1120typedef struct {\r
2f88bd3a
MK		 1121 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1122 UINT32 Reserved;\r
f449affe
JY		 1123 ///\r
1124 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1125 ///\r
2f88bd3a 1126 UINT64 S3PerformanceTablePointer;\r
f449affe
JY		 1127} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1128\r
1129///\r
1130/// FPDT Firmware Basic Boot Performance Record Structure\r
1131///\r
1132typedef struct {\r
2f88bd3a
MK		 1133 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1134 UINT32 Reserved;\r
f449affe
JY		 1135 ///\r
1136 /// Timer value logged at the beginning of firmware image execution.\r
1137 /// This may not always be zero or near zero.\r
1138 ///\r
2f88bd3a 1139 UINT64 ResetEnd;\r
f449affe
JY		 1140 ///\r
1141 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1142 /// For non-UEFI compatible boots, this field must be zero.\r
1143 ///\r
2f88bd3a 1144 UINT64 OsLoaderLoadImageStart;\r
f449affe
JY		 1145 ///\r
1146 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1147 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1148 /// to the INT 19h handler invocation.\r
1149 ///\r
2f88bd3a 1150 UINT64 OsLoaderStartImageStart;\r
f449affe
JY		 1151 ///\r
1152 /// Timer value logged at the point when the OS loader calls the\r
1153 /// ExitBootServices function for UEFI compatible firmware.\r
1154 /// For non-UEFI compatible boots, this field must be zero.\r
1155 ///\r
2f88bd3a 1156 UINT64 ExitBootServicesEntry;\r
f449affe 1157 ///\r
b219e2cd 1158 /// Timer value logged at the point just prior to when the OS loader gaining\r
f449affe
JY		 1159 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1160 /// For non-UEFI compatible boots, this field must be zero.\r
1161 ///\r
2f88bd3a 1162 UINT64 ExitBootServicesExit;\r
f449affe
JY		 1163} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1164\r
1165///\r
1166/// FPDT Firmware Basic Boot Performance Table signature\r
1167///\r
1168#define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1169\r
1170//\r
1171// FPDT Firmware Basic Boot Performance Table\r
1172//\r
1173typedef struct {\r
2f88bd3a 1174 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
f449affe
JY		 1175 //\r
1176 // one or more Performance Records.\r
1177 //\r
1178} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1179\r
1180///\r
1181/// FPDT "S3PT" S3 Performance Table\r
1182///\r
1183#define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1184\r
1185//\r
1186// FPDT Firmware S3 Boot Performance Table\r
1187//\r
1188typedef struct {\r
2f88bd3a 1189 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
f449affe
JY		 1190 //\r
1191 // one or more Performance Records.\r
1192 //\r
1193} EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1194\r
1195///\r
1196/// FPDT Basic S3 Resume Performance Record\r
1197///\r
1198typedef struct {\r
2f88bd3a 1199 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
f449affe
JY		 1200 ///\r
1201 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1202 ///\r
2f88bd3a 1203 UINT32 ResumeCount;\r
f449affe
JY		 1204 ///\r
1205 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1206 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1207 ///\r
2f88bd3a 1208 UINT64 FullResume;\r
f449affe
JY		 1209 ///\r
1210 /// Average timer value of all resume cycles logged since the last full boot\r
1211 /// sequence, including the most recent resume. Note that the entire log of\r
1212 /// timer values does not need to be retained in order to calculate this average.\r
1213 ///\r
2f88bd3a 1214 UINT64 AverageResume;\r
f449affe
JY		 1215} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;\r
1216\r
1217///\r
1218/// FPDT Basic S3 Suspend Performance Record\r
1219///\r
1220typedef struct {\r
2f88bd3a 1221 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
f449affe
JY		 1222 ///\r
1223 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1224 /// Only the most recent suspend cycle's timer value is retained.\r
1225 ///\r
2f88bd3a 1226 UINT64 SuspendStart;\r
f449affe
JY		 1227 ///\r
1228 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1229 /// mechanism) used to trigger hardware entry to S3.\r
1230 /// Only the most recent suspend cycle's timer value is retained.\r
1231 ///\r
2f88bd3a 1232 UINT64 SuspendEnd;\r
f449affe
JY		 1233} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;\r
1234\r
1235///\r
1236/// Firmware Performance Record Table definition.\r
1237///\r
1238typedef struct {\r
2f88bd3a 1239 EFI_ACPI_DESCRIPTION_HEADER Header;\r
f449affe
JY		 1240} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1241\r
1242///\r
1243/// Generic Timer Description Table definition.\r
1244///\r
1245typedef struct {\r
2f88bd3a
MK		 1246 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1247 UINT64 CntControlBasePhysicalAddress;\r
1248 UINT32 Reserved;\r
1249 UINT32 SecurePL1TimerGSIV;\r
1250 UINT32 SecurePL1TimerFlags;\r
1251 UINT32 NonSecurePL1TimerGSIV;\r
1252 UINT32 NonSecurePL1TimerFlags;\r
1253 UINT32 VirtualTimerGSIV;\r
1254 UINT32 VirtualTimerFlags;\r
1255 UINT32 NonSecurePL2TimerGSIV;\r
1256 UINT32 NonSecurePL2TimerFlags;\r
1257 UINT64 CntReadBasePhysicalAddress;\r
1258 UINT32 PlatformTimerCount;\r
1259 UINT32 PlatformTimerOffset;\r
f449affe
JY		 1260} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1261\r
1262///\r
1263/// GTDT Version (as defined in ACPI 5.1 spec.)\r
1264///\r
2f88bd3a 1265#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r
f449affe
JY		 1266\r
1267///\r
1268/// Timer Flags. All other bits are reserved and must be 0.\r
1269///\r
2f88bd3a
MK		 1270#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1271#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1272#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
f449affe
JY		 1273\r
1274///\r
1275/// Platform Timer Type\r
1276///\r
2f88bd3a
MK		 1277#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0\r
1278#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1\r
f449affe
JY		 1279\r
1280///\r
1281/// GT Block Structure\r
1282///\r
1283typedef struct {\r
2f88bd3a
MK		 1284 UINT8 Type;\r
1285 UINT16 Length;\r
1286 UINT8 Reserved;\r
1287 UINT64 CntCtlBase;\r
1288 UINT32 GTBlockTimerCount;\r
1289 UINT32 GTBlockTimerOffset;\r
f449affe
JY		 1290} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;\r
1291\r
1292///\r
1293/// GT Block Timer Structure\r
1294///\r
1295typedef struct {\r
2f88bd3a
MK		 1296 UINT8 GTFrameNumber;\r
1297 UINT8 Reserved[3];\r
1298 UINT64 CntBaseX;\r
1299 UINT64 CntEL0BaseX;\r
1300 UINT32 GTxPhysicalTimerGSIV;\r
1301 UINT32 GTxPhysicalTimerFlags;\r
1302 UINT32 GTxVirtualTimerGSIV;\r
1303 UINT32 GTxVirtualTimerFlags;\r
1304 UINT32 GTxCommonFlags;\r
f449affe
JY		 1305} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1306\r
1307///\r
1308/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1309///\r
2f88bd3a
MK		 1310#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1311#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
f449affe
JY		 1312\r
1313///\r
1314/// Common Flags Flags. All other bits are reserved and must be 0.\r
1315///\r
2f88bd3a
MK		 1316#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1317#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
f449affe
JY		 1318\r
1319///\r
1320/// SBSA Generic Watchdog Structure\r
1321///\r
1322typedef struct {\r
2f88bd3a
MK		 1323 UINT8 Type;\r
1324 UINT16 Length;\r
1325 UINT8 Reserved;\r
1326 UINT64 RefreshFramePhysicalAddress;\r
1327 UINT64 WatchdogControlFramePhysicalAddress;\r
1328 UINT32 WatchdogTimerGSIV;\r
1329 UINT32 WatchdogTimerFlags;\r
f449affe
JY		 1330} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1331\r
1332///\r
1333/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1334///\r
2f88bd3a
MK		 1335#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1336#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1337#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
f449affe
JY		 1338\r
1339///\r
1340/// Boot Error Record Table (BERT)\r
1341///\r
1342typedef struct {\r
2f88bd3a
MK		 1343 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1344 UINT32 BootErrorRegionLength;\r
1345 UINT64 BootErrorRegion;\r
f449affe
JY		 1346} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1347\r
1348///\r
1349/// BERT Version (as defined in ACPI 5.1 spec.)\r
1350///\r
2f88bd3a 1351#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
f449affe
JY		 1352\r
1353///\r
1354/// Boot Error Region Block Status Definition\r
1355///\r
1356typedef struct {\r
2f88bd3a
MK		 1357 UINT32 UncorrectableErrorValid : 1;\r
1358 UINT32 CorrectableErrorValid : 1;\r
1359 UINT32 MultipleUncorrectableErrors : 1;\r
1360 UINT32 MultipleCorrectableErrors : 1;\r
1361 UINT32 ErrorDataEntryCount : 10;\r
1362 UINT32 Reserved : 18;\r
f449affe
JY		 1363} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;\r
1364\r
1365///\r
1366/// Boot Error Region Definition\r
1367///\r
1368typedef struct {\r
2f88bd3a
MK		 1369 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1370 UINT32 RawDataOffset;\r
1371 UINT32 RawDataLength;\r
1372 UINT32 DataLength;\r
1373 UINT32 ErrorSeverity;\r
f449affe
JY		 1374} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;\r
1375\r
1376//\r
1377// Boot Error Severity types\r
1378//\r
267a92fe 1379#define EFI_ACPI_5_1_ERROR_SEVERITY_RECOVERABLE 0x00\r
f449affe
JY		 1380#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01\r
1381#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02\r
1382#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03\r
267a92fe
HW		 1383//\r
1384// The term 'Correctable' is no longer being used as an error severity of the\r
1385// reported error since ACPI Specification Version 5.1 Errata B.\r
1386// The below macro is considered as deprecated and should no longer be used.\r
1387//\r
1388#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00\r
f449affe
JY		 1389\r
1390///\r
1391/// Generic Error Data Entry Definition\r
1392///\r
1393typedef struct {\r
2f88bd3a
MK		 1394 UINT8 SectionType[16];\r
1395 UINT32 ErrorSeverity;\r
1396 UINT16 Revision;\r
1397 UINT8 ValidationBits;\r
1398 UINT8 Flags;\r
1399 UINT32 ErrorDataLength;\r
1400 UINT8 FruId[16];\r
1401 UINT8 FruText[20];\r
f449affe
JY		 1402} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1403\r
1404///\r
1405/// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)\r
1406///\r
1407#define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1408\r
1409///\r
1410/// HEST - Hardware Error Source Table\r
1411///\r
1412typedef struct {\r
2f88bd3a
MK		 1413 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1414 UINT32 ErrorSourceCount;\r
f449affe
JY		 1415} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1416\r
1417///\r
1418/// HEST Version (as defined in ACPI 5.1 spec.)\r
1419///\r
2f88bd3a 1420#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
f449affe
JY		 1421\r
1422//\r
1423// Error Source structure types.\r
1424//\r
1425#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1426#define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1427#define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1428#define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1429#define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07\r
1430#define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08\r
1431#define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09\r
1432\r
1433//\r
1434// Error Source structure flags.\r
1435//\r
2f88bd3a
MK		 1436#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1437#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
f449affe
JY		 1438\r
1439///\r
1440/// IA-32 Architecture Machine Check Exception Structure Definition\r
1441///\r
1442typedef struct {\r
2f88bd3a
MK		 1443 UINT16 Type;\r
1444 UINT16 SourceId;\r
1445 UINT8 Reserved0[2];\r
1446 UINT8 Flags;\r
1447 UINT8 Enabled;\r
1448 UINT32 NumberOfRecordsToPreAllocate;\r
1449 UINT32 MaxSectionsPerRecord;\r
1450 UINT64 GlobalCapabilityInitData;\r
1451 UINT64 GlobalControlInitData;\r
1452 UINT8 NumberOfHardwareBanks;\r
1453 UINT8 Reserved1[7];\r
f449affe
JY		 1454} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1455\r
1456///\r
1457/// IA-32 Architecture Machine Check Bank Structure Definition\r
1458///\r
1459typedef struct {\r
2f88bd3a
MK		 1460 UINT8 BankNumber;\r
1461 UINT8 ClearStatusOnInitialization;\r
1462 UINT8 StatusDataFormat;\r
1463 UINT8 Reserved0;\r
1464 UINT32 ControlRegisterMsrAddress;\r
1465 UINT64 ControlInitData;\r
1466 UINT32 StatusRegisterMsrAddress;\r
1467 UINT32 AddressRegisterMsrAddress;\r
1468 UINT32 MiscRegisterMsrAddress;\r
f449affe
JY		 1469} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1470\r
1471///\r
1472/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1473///\r
2f88bd3a
MK		 1474#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1475#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1476#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
f449affe
JY		 1477\r
1478//\r
1479// Hardware Error Notification types. All other values are reserved\r
1480//\r
2f88bd3a
MK		 1481#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1482#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1483#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1484#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1485#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
f449affe
JY		 1486\r
1487///\r
1488/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1489///\r
1490typedef struct {\r
2f88bd3a
MK		 1491 UINT16 Type : 1;\r
1492 UINT16 PollInterval : 1;\r
1493 UINT16 SwitchToPollingThresholdValue : 1;\r
1494 UINT16 SwitchToPollingThresholdWindow : 1;\r
1495 UINT16 ErrorThresholdValue : 1;\r
1496 UINT16 ErrorThresholdWindow : 1;\r
1497 UINT16 Reserved : 10;\r
f449affe
JY		 1498} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1499\r
1500///\r
1501/// Hardware Error Notification Structure Definition\r
1502///\r
1503typedef struct {\r
2f88bd3a
MK		 1504 UINT8 Type;\r
1505 UINT8 Length;\r
1506 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1507 UINT32 PollInterval;\r
1508 UINT32 Vector;\r
1509 UINT32 SwitchToPollingThresholdValue;\r
1510 UINT32 SwitchToPollingThresholdWindow;\r
1511 UINT32 ErrorThresholdValue;\r
1512 UINT32 ErrorThresholdWindow;\r
f449affe
JY		 1513} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1514\r
1515///\r
1516/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1517///\r
1518typedef struct {\r
2f88bd3a
MK		 1519 UINT16 Type;\r
1520 UINT16 SourceId;\r
1521 UINT8 Reserved0[2];\r
1522 UINT8 Flags;\r
1523 UINT8 Enabled;\r
1524 UINT32 NumberOfRecordsToPreAllocate;\r
1525 UINT32 MaxSectionsPerRecord;\r
1526 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1527 UINT8 NumberOfHardwareBanks;\r
1528 UINT8 Reserved1[3];\r
f449affe
JY		 1529} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1530\r
1531///\r
1532/// IA-32 Architecture NMI Error Structure Definition\r
1533///\r
1534typedef struct {\r
2f88bd3a
MK		 1535 UINT16 Type;\r
1536 UINT16 SourceId;\r
1537 UINT8 Reserved0[2];\r
1538 UINT32 NumberOfRecordsToPreAllocate;\r
1539 UINT32 MaxSectionsPerRecord;\r
1540 UINT32 MaxRawDataLength;\r
f449affe
JY		 1541} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1542\r
1543///\r
1544/// PCI Express Root Port AER Structure Definition\r
1545///\r
1546typedef struct {\r
2f88bd3a
MK		 1547 UINT16 Type;\r
1548 UINT16 SourceId;\r
1549 UINT8 Reserved0[2];\r
1550 UINT8 Flags;\r
1551 UINT8 Enabled;\r
1552 UINT32 NumberOfRecordsToPreAllocate;\r
1553 UINT32 MaxSectionsPerRecord;\r
1554 UINT32 Bus;\r
1555 UINT16 Device;\r
1556 UINT16 Function;\r
1557 UINT16 DeviceControl;\r
1558 UINT8 Reserved1[2];\r
1559 UINT32 UncorrectableErrorMask;\r
1560 UINT32 UncorrectableErrorSeverity;\r
1561 UINT32 CorrectableErrorMask;\r
1562 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1563 UINT32 RootErrorCommand;\r
f449affe
JY		 1564} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1565\r
1566///\r
1567/// PCI Express Device AER Structure Definition\r
1568///\r
1569typedef struct {\r
2f88bd3a
MK		 1570 UINT16 Type;\r
1571 UINT16 SourceId;\r
1572 UINT8 Reserved0[2];\r
1573 UINT8 Flags;\r
1574 UINT8 Enabled;\r
1575 UINT32 NumberOfRecordsToPreAllocate;\r
1576 UINT32 MaxSectionsPerRecord;\r
1577 UINT32 Bus;\r
1578 UINT16 Device;\r
1579 UINT16 Function;\r
1580 UINT16 DeviceControl;\r
1581 UINT8 Reserved1[2];\r
1582 UINT32 UncorrectableErrorMask;\r
1583 UINT32 UncorrectableErrorSeverity;\r
1584 UINT32 CorrectableErrorMask;\r
1585 UINT32 AdvancedErrorCapabilitiesAndControl;\r
f449affe
JY		 1586} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1587\r
1588///\r
1589/// PCI Express Bridge AER Structure Definition\r
1590///\r
1591typedef struct {\r
2f88bd3a
MK		 1592 UINT16 Type;\r
1593 UINT16 SourceId;\r
1594 UINT8 Reserved0[2];\r
1595 UINT8 Flags;\r
1596 UINT8 Enabled;\r
1597 UINT32 NumberOfRecordsToPreAllocate;\r
1598 UINT32 MaxSectionsPerRecord;\r
1599 UINT32 Bus;\r
1600 UINT16 Device;\r
1601 UINT16 Function;\r
1602 UINT16 DeviceControl;\r
1603 UINT8 Reserved1[2];\r
1604 UINT32 UncorrectableErrorMask;\r
1605 UINT32 UncorrectableErrorSeverity;\r
1606 UINT32 CorrectableErrorMask;\r
1607 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1608 UINT32 SecondaryUncorrectableErrorMask;\r
1609 UINT32 SecondaryUncorrectableErrorSeverity;\r
1610 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
f449affe
JY		 1611} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1612\r
1613///\r
1614/// Generic Hardware Error Source Structure Definition\r
1615///\r
1616typedef struct {\r
2f88bd3a
MK		 1617 UINT16 Type;\r
1618 UINT16 SourceId;\r
1619 UINT16 RelatedSourceId;\r
1620 UINT8 Flags;\r
1621 UINT8 Enabled;\r
1622 UINT32 NumberOfRecordsToPreAllocate;\r
1623 UINT32 MaxSectionsPerRecord;\r
1624 UINT32 MaxRawDataLength;\r
1625 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1626 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1627 UINT32 ErrorStatusBlockLength;\r
f449affe
JY		 1628} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1629\r
1630///\r
1631/// Generic Error Status Definition\r
1632///\r
1633typedef struct {\r
2f88bd3a
MK		 1634 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1635 UINT32 RawDataOffset;\r
1636 UINT32 RawDataLength;\r
1637 UINT32 DataLength;\r
1638 UINT32 ErrorSeverity;\r
f449affe
JY		 1639} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;\r
1640\r
1641///\r
1642/// ERST - Error Record Serialization Table\r
1643///\r
1644typedef struct {\r
2f88bd3a
MK		 1645 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1646 UINT32 SerializationHeaderSize;\r
1647 UINT8 Reserved0[4];\r
1648 UINT32 InstructionEntryCount;\r
f449affe
JY		 1649} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1650\r
1651///\r
1652/// ERST Version (as defined in ACPI 5.1 spec.)\r
1653///\r
2f88bd3a 1654#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
f449affe
JY		 1655\r
1656///\r
1657/// ERST Serialization Actions\r
1658///\r
2f88bd3a
MK		 1659#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00\r
1660#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01\r
1661#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1662#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03\r
1663#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04\r
1664#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05\r
1665#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06\r
1666#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07\r
1667#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08\r
1668#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09\r
1669#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A\r
1670#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1671#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1672#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1673#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
f449affe
JY		 1674\r
1675///\r
1676/// ERST Action Command Status\r
1677///\r
2f88bd3a
MK		 1678#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00\r
1679#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1680#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1681#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03\r
1682#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1683#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
f449affe
JY		 1684\r
1685///\r
1686/// ERST Serialization Instructions\r
1687///\r
2f88bd3a
MK		 1688#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00\r
1689#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01\r
1690#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02\r
1691#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03\r
1692#define EFI_ACPI_5_1_ERST_NOOP 0x04\r
1693#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05\r
1694#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06\r
1695#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07\r
1696#define EFI_ACPI_5_1_ERST_ADD 0x08\r
1697#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09\r
1698#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A\r
1699#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B\r
1700#define EFI_ACPI_5_1_ERST_STALL 0x0C\r
1701#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D\r
1702#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1703#define EFI_ACPI_5_1_ERST_GOTO 0x0F\r
1704#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1705#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11\r
1706#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12\r
f449affe
JY		 1707\r
1708///\r
1709/// ERST Instruction Flags\r
1710///\r
2f88bd3a 1711#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01\r
f449affe
JY		 1712\r
1713///\r
1714/// ERST Serialization Instruction Entry\r
1715///\r
1716typedef struct {\r
2f88bd3a
MK		 1717 UINT8 SerializationAction;\r
1718 UINT8 Instruction;\r
1719 UINT8 Flags;\r
1720 UINT8 Reserved0;\r
1721 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1722 UINT64 Value;\r
1723 UINT64 Mask;\r
f449affe
JY		 1724} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1725\r
1726///\r
1727/// EINJ - Error Injection Table\r
1728///\r
1729typedef struct {\r
2f88bd3a
MK		 1730 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1731 UINT32 InjectionHeaderSize;\r
1732 UINT8 InjectionFlags;\r
1733 UINT8 Reserved0[3];\r
1734 UINT32 InjectionEntryCount;\r
f449affe
JY		 1735} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;\r
1736\r
1737///\r
1738/// EINJ Version (as defined in ACPI 5.1 spec.)\r
1739///\r
2f88bd3a 1740#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01\r
f449affe
JY		 1741\r
1742///\r
1743/// EINJ Error Injection Actions\r
1744///\r
2f88bd3a
MK		 1745#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1746#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1747#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02\r
1748#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03\r
1749#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04\r
1750#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05\r
1751#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06\r
1752#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07\r
1753#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF\r
f449affe
JY		 1754\r
1755///\r
1756/// EINJ Action Command Status\r
1757///\r
2f88bd3a
MK		 1758#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00\r
1759#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1760#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02\r
f449affe
JY		 1761\r
1762///\r
1763/// EINJ Error Type Definition\r
1764///\r
2f88bd3a
MK		 1765#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1766#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1767#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1768#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1769#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1770#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1771#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1772#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1773#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1774#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1775#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1776#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
f449affe
JY		 1777\r
1778///\r
1779/// EINJ Injection Instructions\r
1780///\r
2f88bd3a
MK		 1781#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00\r
1782#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01\r
1783#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02\r
1784#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03\r
1785#define EFI_ACPI_5_1_EINJ_NOOP 0x04\r
f449affe
JY		 1786\r
1787///\r
1788/// EINJ Instruction Flags\r
1789///\r
2f88bd3a 1790#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01\r
f449affe
JY		 1791\r
1792///\r
1793/// EINJ Injection Instruction Entry\r
1794///\r
1795typedef struct {\r
2f88bd3a
MK		 1796 UINT8 InjectionAction;\r
1797 UINT8 Instruction;\r
1798 UINT8 Flags;\r
1799 UINT8 Reserved0;\r
1800 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1801 UINT64 Value;\r
1802 UINT64 Mask;\r
f449affe
JY		 1803} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1804\r
1805///\r
1806/// EINJ Trigger Action Table\r
1807///\r
1808typedef struct {\r
2f88bd3a
MK		 1809 UINT32 HeaderSize;\r
1810 UINT32 Revision;\r
1811 UINT32 TableSize;\r
1812 UINT32 EntryCount;\r
f449affe
JY		 1813} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;\r
1814\r
1815///\r
1816/// Platform Communications Channel Table (PCCT)\r
1817///\r
1818typedef struct {\r
2f88bd3a
MK		 1819 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1820 UINT32 Flags;\r
1821 UINT64 Reserved;\r
f449affe
JY		 1822} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1823\r
1824///\r
1825/// PCCT Version (as defined in ACPI 5.1 spec.)\r
1826///\r
2f88bd3a 1827#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
f449affe
JY		 1828\r
1829///\r
1830/// PCCT Global Flags\r
1831///\r
2f88bd3a 1832#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0\r
f449affe
JY		 1833\r
1834//\r
1835// PCCT Subspace type\r
1836//\r
1837#define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1838\r
1839///\r
1840/// PCC Subspace Structure Header\r
1841///\r
1842typedef struct {\r
2f88bd3a
MK		 1843 UINT8 Type;\r
1844 UINT8 Length;\r
f449affe
JY		 1845} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;\r
1846\r
1847///\r
1848/// Generic Communications Subspace Structure\r
1849///\r
1850typedef struct {\r
2f88bd3a
MK		 1851 UINT8 Type;\r
1852 UINT8 Length;\r
1853 UINT8 Reserved[6];\r
1854 UINT64 BaseAddress;\r
1855 UINT64 AddressLength;\r
1856 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1857 UINT64 DoorbellPreserve;\r
1858 UINT64 DoorbellWrite;\r
1859 UINT32 NominalLatency;\r
1860 UINT32 MaximumPeriodicAccessRate;\r
1861 UINT16 MinimumRequestTurnaroundTime;\r
f449affe
JY		 1862} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;\r
1863\r
1864///\r
1865/// Generic Communications Channel Shared Memory Region\r
1866///\r
1867\r
1868typedef struct {\r
2f88bd3a
MK		 1869 UINT8 Command;\r
1870 UINT8 Reserved : 7;\r
1871 UINT8 GenerateSci : 1;\r
f449affe
JY		 1872} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1873\r
1874typedef struct {\r
2f88bd3a
MK		 1875 UINT8 CommandComplete : 1;\r
1876 UINT8 SciDoorbell : 1;\r
1877 UINT8 Error : 1;\r
1878 UINT8 PlatformNotification : 1;\r
1879 UINT8 Reserved : 4;\r
1880 UINT8 Reserved1;\r
f449affe
JY		 1881} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1882\r
1883typedef struct {\r
1884 UINT32 Signature;\r
1885 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1886 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1887} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1888\r
1889//\r
1890// Known table signatures\r
1891//\r
1892\r
1893///\r
1894/// "RSD PTR " Root System Description Pointer\r
1895///\r
9095d37b 1896#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
f449affe
JY		 1897\r
1898///\r
1899/// "APIC" Multiple APIC Description Table\r
1900///\r
1901#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1902\r
1903///\r
1904/// "BERT" Boot Error Record Table\r
1905///\r
1906#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1907\r
1908///\r
1909/// "BGRT" Boot Graphics Resource Table\r
1910///\r
1911#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1912\r
1913///\r
1914/// "CPEP" Corrected Platform Error Polling Table\r
1915///\r
1916#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1917\r
1918///\r
1919/// "DSDT" Differentiated System Description Table\r
1920///\r
1921#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1922\r
1923///\r
1924/// "ECDT" Embedded Controller Boot Resources Table\r
1925///\r
1926#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1927\r
1928///\r
1929/// "EINJ" Error Injection Table\r
1930///\r
1931#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1932\r
1933///\r
1934/// "ERST" Error Record Serialization Table\r
1935///\r
1936#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1937\r
1938///\r
1939/// "FACP" Fixed ACPI Description Table\r
1940///\r
1941#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1942\r
1943///\r
1944/// "FACS" Firmware ACPI Control Structure\r
1945///\r
1946#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1947\r
1948///\r
1949/// "FPDT" Firmware Performance Data Table\r
1950///\r
1951#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1952\r
1953///\r
1954/// "GTDT" Generic Timer Description Table\r
1955///\r
1956#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1957\r
1958///\r
1959/// "HEST" Hardware Error Source Table\r
1960///\r
1961#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1962\r
1963///\r
1964/// "MPST" Memory Power State Table\r
1965///\r
1966#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1967\r
1968///\r
1969/// "MSCT" Maximum System Characteristics Table\r
1970///\r
1971#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1972\r
1973///\r
1974/// "PMTT" Platform Memory Topology Table\r
1975///\r
1976#define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1977\r
1978///\r
1979/// "PSDT" Persistent System Description Table\r
1980///\r
1981#define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1982\r
1983///\r
1984/// "RASF" ACPI RAS Feature Table\r
1985///\r
1986#define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1987\r
1988///\r
1989/// "RSDT" Root System Description Table\r
1990///\r
1991#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1992\r
1993///\r
1994/// "SBST" Smart Battery Specification Table\r
1995///\r
1996#define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1997\r
1998///\r
1999/// "SLIT" System Locality Information Table\r
2000///\r
2001#define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2002\r
2003///\r
2004/// "SRAT" System Resource Affinity Table\r
2005///\r
2006#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2007\r
2008///\r
2009/// "SSDT" Secondary System Description Table\r
2010///\r
2011#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2012\r
2013///\r
2014/// "XSDT" Extended System Description Table\r
2015///\r
2016#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2017\r
2018///\r
2019/// "BOOT" MS Simple Boot Spec\r
2020///\r
2021#define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2022\r
2023///\r
2024/// "CSRT" MS Core System Resource Table\r
2025///\r
2026#define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2027\r
2028///\r
2029/// "DBG2" MS Debug Port 2 Spec\r
2030///\r
2031#define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2032\r
2033///\r
2034/// "DBGP" MS Debug Port Spec\r
2035///\r
2036#define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2037\r
2038///\r
2039/// "DMAR" DMA Remapping Table\r
2040///\r
2041#define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2042\r
2043///\r
2044/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2045///\r
2046#define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2047\r
2048///\r
2049/// "ETDT" Event Timer Description Table\r
2050///\r
2051#define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2052\r
2053///\r
2054/// "HPET" IA-PC High Precision Event Timer Table\r
2055///\r
2056#define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2057\r
2058///\r
2059/// "iBFT" iSCSI Boot Firmware Table\r
2060///\r
2061#define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2062\r
2063///\r
2064/// "IVRS" I/O Virtualization Reporting Structure\r
2065///\r
2066#define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2067\r
2068///\r
2069/// "LPIT" Low Power Idle Table\r
2070///\r
2071#define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2072\r
2073///\r
2074/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2075///\r
2076#define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2077\r
2078///\r
2079/// "MCHI" Management Controller Host Interface Table\r
2080///\r
2081#define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2082\r
2083///\r
2084/// "MSDM" MS Data Management Table\r
2085///\r
2086#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2087\r
a67efa3b
KK		 2088///\r
2089/// "PCCT" Platform Communications Channel Table\r
2090///\r
2091#define EFI_ACPI_5_1_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')\r
2092\r
f449affe
JY		 2093///\r
2094/// "SLIC" MS Software Licensing Table Specification\r
2095///\r
2096#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2097\r
2098///\r
b219e2cd 2099/// "SPCR" Serial Port Console Redirection Table\r
f449affe
JY		 2100///\r
2101#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2102\r
2103///\r
2104/// "SPMI" Server Platform Management Interface Table\r
2105///\r
2106#define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2107\r
2108///\r
2109/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2110///\r
2111#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2112\r
2113///\r
2114/// "TPM2" Trusted Computing Platform 1 Table\r
2115///\r
2116#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2117\r
2118///\r
2119/// "UEFI" UEFI ACPI Data Table\r
2120///\r
2121#define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2122\r
2123///\r
2124/// "WAET" Windows ACPI Emulated Devices Table\r
2125///\r
2126#define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2127\r
2128///\r
2129/// "WDAT" Watchdog Action Table\r
2130///\r
2131#define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2132\r
2133///\r
2134/// "WDRT" Watchdog Resource Table\r
2135///\r
2136#define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2137\r
2138///\r
2139/// "WPBT" MS Platform Binary Table\r
2140///\r
2141#define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2142\r
2143#pragma pack()\r
2144\r
2145#endif\r
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