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9095d37b 1/** @file\r
b84621bc 2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 Errata B January, 2016.\r
f449affe 3\r
a71c80b6 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>\r
9095d37b 5 Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
8a2270a6 6 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
9344f092 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
f449affe
JY		 8**/\r
9\r
10#ifndef _ACPI_5_1_H_\r
11#define _ACPI_5_1_H_\r
12\r
13#include <IndustryStandard/Acpi50.h>\r
14\r
15//\r
16// Ensure proper structure formats\r
17//\r
18#pragma pack(1)\r
19\r
20///\r
21/// ACPI 5.1 Generic Address Space definition\r
22///\r
23typedef struct {\r
24 UINT8 AddressSpaceId;\r
25 UINT8 RegisterBitWidth;\r
26 UINT8 RegisterBitOffset;\r
27 UINT8 AccessSize;\r
28 UINT64 Address;\r
29} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;\r
30\r
31//\r
32// Generic Address Space Address IDs\r
33//\r
34#define EFI_ACPI_5_1_SYSTEM_MEMORY 0\r
35#define EFI_ACPI_5_1_SYSTEM_IO 1\r
36#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2\r
37#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3\r
38#define EFI_ACPI_5_1_SMBUS 4\r
39#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
40#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
41\r
42//\r
43// Generic Address Space Access Sizes\r
44//\r
45#define EFI_ACPI_5_1_UNDEFINED 0\r
46#define EFI_ACPI_5_1_BYTE 1\r
47#define EFI_ACPI_5_1_WORD 2\r
48#define EFI_ACPI_5_1_DWORD 3\r
49#define EFI_ACPI_5_1_QWORD 4\r
50\r
51//\r
52// ACPI 5.1 table structures\r
53//\r
54\r
55///\r
56/// Root System Description Pointer Structure\r
57///\r
58typedef struct {\r
59 UINT64 Signature;\r
60 UINT8 Checksum;\r
61 UINT8 OemId[6];\r
62 UINT8 Revision;\r
63 UINT32 RsdtAddress;\r
64 UINT32 Length;\r
65 UINT64 XsdtAddress;\r
66 UINT8 ExtendedChecksum;\r
67 UINT8 Reserved[3];\r
68} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
69\r
70///\r
71/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)\r
72///\r
73#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2\r
74\r
75///\r
76/// Common table header, this prefaces all ACPI tables, including FACS, but\r
77/// excluding the RSD PTR structure\r
78///\r
79typedef struct {\r
80 UINT32 Signature;\r
81 UINT32 Length;\r
82} EFI_ACPI_5_1_COMMON_HEADER;\r
83\r
84//\r
85// Root System Description Table\r
9095d37b 86// No definition needed as it is a common description table header, the same with\r
f449affe
JY		 87// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
88//\r
89\r
90///\r
91/// RSDT Revision (as defined in ACPI 5.1 spec.)\r
92///\r
93#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
94\r
95//\r
96// Extended System Description Table\r
9095d37b 97// No definition needed as it is a common description table header, the same with\r
f449affe
JY		 98// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
99//\r
100\r
101///\r
102/// XSDT Revision (as defined in ACPI 5.1 spec.)\r
103///\r
104#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
105\r
106///\r
107/// Fixed ACPI Description Table Structure (FADT)\r
108///\r
109typedef struct {\r
110 EFI_ACPI_DESCRIPTION_HEADER Header;\r
111 UINT32 FirmwareCtrl;\r
112 UINT32 Dsdt;\r
113 UINT8 Reserved0;\r
114 UINT8 PreferredPmProfile;\r
115 UINT16 SciInt;\r
116 UINT32 SmiCmd;\r
117 UINT8 AcpiEnable;\r
118 UINT8 AcpiDisable;\r
119 UINT8 S4BiosReq;\r
120 UINT8 PstateCnt;\r
121 UINT32 Pm1aEvtBlk;\r
122 UINT32 Pm1bEvtBlk;\r
123 UINT32 Pm1aCntBlk;\r
124 UINT32 Pm1bCntBlk;\r
125 UINT32 Pm2CntBlk;\r
126 UINT32 PmTmrBlk;\r
127 UINT32 Gpe0Blk;\r
128 UINT32 Gpe1Blk;\r
129 UINT8 Pm1EvtLen;\r
130 UINT8 Pm1CntLen;\r
131 UINT8 Pm2CntLen;\r
132 UINT8 PmTmrLen;\r
133 UINT8 Gpe0BlkLen;\r
134 UINT8 Gpe1BlkLen;\r
135 UINT8 Gpe1Base;\r
136 UINT8 CstCnt;\r
137 UINT16 PLvl2Lat;\r
138 UINT16 PLvl3Lat;\r
139 UINT16 FlushSize;\r
140 UINT16 FlushStride;\r
141 UINT8 DutyOffset;\r
142 UINT8 DutyWidth;\r
143 UINT8 DayAlrm;\r
144 UINT8 MonAlrm;\r
145 UINT8 Century;\r
146 UINT16 IaPcBootArch;\r
147 UINT8 Reserved1;\r
148 UINT32 Flags;\r
149 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
150 UINT8 ResetValue;\r
151 UINT16 ArmBootArch;\r
152 UINT8 MinorVersion;\r
153 UINT64 XFirmwareCtrl;\r
154 UINT64 XDsdt;\r
155 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
156 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
157 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
158 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
159 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
165} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;\r
166\r
167///\r
168/// FADT Version (as defined in ACPI 5.1 spec.)\r
169///\r
170#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
171#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01\r
172\r
173//\r
174// Fixed ACPI Description Table Preferred Power Management Profile\r
175//\r
176#define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0\r
177#define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1\r
178#define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2\r
179#define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3\r
180#define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4\r
181#define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5\r
182#define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6\r
183#define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7\r
184#define EFI_ACPI_5_1_PM_PROFILE_TABLET 8\r
185\r
186//\r
187// Fixed ACPI Description Table Boot Architecture Flags\r
188// All other bits are reserved and must be set to 0.\r
189//\r
190#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0\r
191#define EFI_ACPI_5_1_8042 BIT1\r
192#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2\r
193#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3\r
194#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4\r
195#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5\r
196\r
197//\r
198// Fixed ACPI Description Table Arm Boot Architecture Flags\r
199// All other bits are reserved and must be set to 0.\r
200//\r
201#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0\r
202#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1\r
203\r
204//\r
205// Fixed ACPI Description Table Fixed Feature Flags\r
206// All other bits are reserved and must be set to 0.\r
207//\r
208#define EFI_ACPI_5_1_WBINVD BIT0\r
209#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1\r
210#define EFI_ACPI_5_1_PROC_C1 BIT2\r
211#define EFI_ACPI_5_1_P_LVL2_UP BIT3\r
212#define EFI_ACPI_5_1_PWR_BUTTON BIT4\r
213#define EFI_ACPI_5_1_SLP_BUTTON BIT5\r
214#define EFI_ACPI_5_1_FIX_RTC BIT6\r
215#define EFI_ACPI_5_1_RTC_S4 BIT7\r
216#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8\r
217#define EFI_ACPI_5_1_DCK_CAP BIT9\r
218#define EFI_ACPI_5_1_RESET_REG_SUP BIT10\r
219#define EFI_ACPI_5_1_SEALED_CASE BIT11\r
220#define EFI_ACPI_5_1_HEADLESS BIT12\r
221#define EFI_ACPI_5_1_CPU_SW_SLP BIT13\r
222#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14\r
223#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15\r
224#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16\r
225#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17\r
226#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18\r
227#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
228#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20\r
229#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
230\r
231///\r
232/// Firmware ACPI Control Structure\r
233///\r
234typedef struct {\r
235 UINT32 Signature;\r
236 UINT32 Length;\r
237 UINT32 HardwareSignature;\r
238 UINT32 FirmwareWakingVector;\r
239 UINT32 GlobalLock;\r
240 UINT32 Flags;\r
241 UINT64 XFirmwareWakingVector;\r
242 UINT8 Version;\r
243 UINT8 Reserved0[3];\r
244 UINT32 OspmFlags;\r
245 UINT8 Reserved1[24];\r
246} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
247\r
248///\r
249/// FACS Version (as defined in ACPI 5.1 spec.)\r
250///\r
251#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
252\r
253///\r
254/// Firmware Control Structure Feature Flags\r
255/// All other bits are reserved and must be set to 0.\r
256///\r
257#define EFI_ACPI_5_1_S4BIOS_F BIT0\r
258#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1\r
259\r
260///\r
261/// OSPM Enabled Firmware Control Structure Flags\r
262/// All other bits are reserved and must be set to 0.\r
263///\r
264#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0\r
265\r
266//\r
267// Differentiated System Description Table,\r
268// Secondary System Description Table\r
269// and Persistent System Description Table,\r
270// no definition needed as they are common description table header, the same with\r
271// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
272//\r
273#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
274#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
275\r
276///\r
277/// Multiple APIC Description Table header definition. The rest of the table\r
278/// must be defined in a platform specific manner.\r
279///\r
280typedef struct {\r
281 EFI_ACPI_DESCRIPTION_HEADER Header;\r
282 UINT32 LocalApicAddress;\r
283 UINT32 Flags;\r
284} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
285\r
286///\r
287/// MADT Revision (as defined in ACPI 5.1 spec.)\r
288///\r
289#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
290\r
291///\r
292/// Multiple APIC Flags\r
293/// All other bits are reserved and must be set to 0.\r
294///\r
295#define EFI_ACPI_5_1_PCAT_COMPAT BIT0\r
296\r
297//\r
298// Multiple APIC Description Table APIC structure types\r
299// All other values between 0x0D and 0x7F are reserved and\r
300// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
301//\r
302#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00\r
303#define EFI_ACPI_5_1_IO_APIC 0x01\r
304#define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02\r
305#define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
306#define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04\r
307#define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
308#define EFI_ACPI_5_1_IO_SAPIC 0x06\r
309#define EFI_ACPI_5_1_LOCAL_SAPIC 0x07\r
310#define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08\r
311#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09\r
312#define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A\r
313#define EFI_ACPI_5_1_GIC 0x0B\r
314#define EFI_ACPI_5_1_GICD 0x0C\r
315#define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D\r
316#define EFI_ACPI_5_1_GICR 0x0E\r
317\r
318//\r
319// APIC Structure Definitions\r
320//\r
321\r
322///\r
323/// Processor Local APIC Structure Definition\r
324///\r
325typedef struct {\r
326 UINT8 Type;\r
327 UINT8 Length;\r
328 UINT8 AcpiProcessorId;\r
329 UINT8 ApicId;\r
330 UINT32 Flags;\r
331} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
332\r
333///\r
334/// Local APIC Flags. All other bits are reserved and must be 0.\r
335///\r
336#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0\r
337\r
338///\r
339/// IO APIC Structure\r
340///\r
341typedef struct {\r
342 UINT8 Type;\r
343 UINT8 Length;\r
344 UINT8 IoApicId;\r
345 UINT8 Reserved;\r
346 UINT32 IoApicAddress;\r
347 UINT32 GlobalSystemInterruptBase;\r
348} EFI_ACPI_5_1_IO_APIC_STRUCTURE;\r
349\r
350///\r
351/// Interrupt Source Override Structure\r
352///\r
353typedef struct {\r
354 UINT8 Type;\r
355 UINT8 Length;\r
356 UINT8 Bus;\r
357 UINT8 Source;\r
358 UINT32 GlobalSystemInterrupt;\r
359 UINT16 Flags;\r
360} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
361\r
362///\r
363/// Platform Interrupt Sources Structure Definition\r
364///\r
365typedef struct {\r
366 UINT8 Type;\r
367 UINT8 Length;\r
368 UINT16 Flags;\r
369 UINT8 InterruptType;\r
370 UINT8 ProcessorId;\r
371 UINT8 ProcessorEid;\r
372 UINT8 IoSapicVector;\r
373 UINT32 GlobalSystemInterrupt;\r
374 UINT32 PlatformInterruptSourceFlags;\r
375 UINT8 CpeiProcessorOverride;\r
376 UINT8 Reserved[31];\r
377} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
378\r
379//\r
380// MPS INTI flags.\r
381// All other bits are reserved and must be set to 0.\r
382//\r
383#define EFI_ACPI_5_1_POLARITY (3 << 0)\r
384#define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)\r
385\r
386///\r
387/// Non-Maskable Interrupt Source Structure\r
388///\r
389typedef struct {\r
390 UINT8 Type;\r
391 UINT8 Length;\r
392 UINT16 Flags;\r
393 UINT32 GlobalSystemInterrupt;\r
394} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
395\r
396///\r
397/// Local APIC NMI Structure\r
398///\r
399typedef struct {\r
400 UINT8 Type;\r
401 UINT8 Length;\r
402 UINT8 AcpiProcessorId;\r
403 UINT16 Flags;\r
404 UINT8 LocalApicLint;\r
405} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;\r
406\r
407///\r
408/// Local APIC Address Override Structure\r
409///\r
410typedef struct {\r
411 UINT8 Type;\r
412 UINT8 Length;\r
413 UINT16 Reserved;\r
414 UINT64 LocalApicAddress;\r
415} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
416\r
417///\r
418/// IO SAPIC Structure\r
419///\r
420typedef struct {\r
421 UINT8 Type;\r
422 UINT8 Length;\r
423 UINT8 IoApicId;\r
424 UINT8 Reserved;\r
425 UINT32 GlobalSystemInterruptBase;\r
426 UINT64 IoSapicAddress;\r
427} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;\r
428\r
429///\r
430/// Local SAPIC Structure\r
431/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
432///\r
433typedef struct {\r
434 UINT8 Type;\r
435 UINT8 Length;\r
436 UINT8 AcpiProcessorId;\r
437 UINT8 LocalSapicId;\r
438 UINT8 LocalSapicEid;\r
439 UINT8 Reserved[3];\r
440 UINT32 Flags;\r
441 UINT32 ACPIProcessorUIDValue;\r
442} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
443\r
444///\r
445/// Platform Interrupt Sources Structure\r
446///\r
447typedef struct {\r
448 UINT8 Type;\r
449 UINT8 Length;\r
450 UINT16 Flags;\r
451 UINT8 InterruptType;\r
452 UINT8 ProcessorId;\r
453 UINT8 ProcessorEid;\r
454 UINT8 IoSapicVector;\r
455 UINT32 GlobalSystemInterrupt;\r
456 UINT32 PlatformInterruptSourceFlags;\r
457} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
458\r
459///\r
460/// Platform Interrupt Source Flags.\r
461/// All other bits are reserved and must be set to 0.\r
462///\r
463#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0\r
464\r
465///\r
466/// Processor Local x2APIC Structure Definition\r
467///\r
468typedef struct {\r
469 UINT8 Type;\r
470 UINT8 Length;\r
471 UINT8 Reserved[2];\r
472 UINT32 X2ApicId;\r
473 UINT32 Flags;\r
474 UINT32 AcpiProcessorUid;\r
475} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
476\r
477///\r
478/// Local x2APIC NMI Structure\r
479///\r
480typedef struct {\r
481 UINT8 Type;\r
482 UINT8 Length;\r
483 UINT16 Flags;\r
484 UINT32 AcpiProcessorUid;\r
485 UINT8 LocalX2ApicLint;\r
486 UINT8 Reserved[3];\r
487} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;\r
488\r
489///\r
490/// GIC Structure\r
491///\r
492typedef struct {\r
493 UINT8 Type;\r
494 UINT8 Length;\r
495 UINT16 Reserved;\r
496 UINT32 CPUInterfaceNumber;\r
497 UINT32 AcpiProcessorUid;\r
498 UINT32 Flags;\r
499 UINT32 ParkingProtocolVersion;\r
500 UINT32 PerformanceInterruptGsiv;\r
501 UINT64 ParkedAddress;\r
502 UINT64 PhysicalBaseAddress;\r
503 UINT64 GICV;\r
504 UINT64 GICH;\r
505 UINT32 VGICMaintenanceInterrupt;\r
506 UINT64 GICRBaseAddress;\r
507 UINT64 MPIDR;\r
508} EFI_ACPI_5_1_GIC_STRUCTURE;\r
509\r
510///\r
511/// GIC Flags. All other bits are reserved and must be 0.\r
512///\r
513#define EFI_ACPI_5_1_GIC_ENABLED BIT0\r
514#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1\r
515#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
516\r
517///\r
518/// GIC Distributor Structure\r
519///\r
520typedef struct {\r
521 UINT8 Type;\r
522 UINT8 Length;\r
523 UINT16 Reserved1;\r
524 UINT32 GicId;\r
525 UINT64 PhysicalBaseAddress;\r
526 UINT32 SystemVectorBase;\r
8a2270a6
SEHM		 527 UINT8 GicVersion;\r
528 UINT8 Reserved2[3];\r
f449affe
JY		 529} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;\r
530\r
8a2270a6
SEHM		 531///\r
532/// GIC Version\r
533///\r
b84621bc
LG		 534#define EFI_ACPI_5_1_GIC_V1 0x01\r
535#define EFI_ACPI_5_1_GIC_V2 0x02\r
8a2270a6
SEHM		 536#define EFI_ACPI_5_1_GIC_V3 0x03\r
537#define EFI_ACPI_5_1_GIC_V4 0x04\r
538\r
f449affe
JY		 539///\r
540/// GIC MSI Frame Structure\r
541///\r
542typedef struct {\r
543 UINT8 Type;\r
544 UINT8 Length;\r
545 UINT16 Reserved1;\r
546 UINT32 GicMsiFrameId;\r
547 UINT64 PhysicalBaseAddress;\r
548 UINT32 Flags;\r
549 UINT16 SPICount;\r
550 UINT16 SPIBase;\r
551} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;\r
552\r
553///\r
554/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
555///\r
556#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0\r
557\r
558///\r
559/// GICR Structure\r
560///\r
561typedef struct {\r
562 UINT8 Type;\r
563 UINT8 Length;\r
564 UINT16 Reserved;\r
565 UINT64 DiscoveryRangeBaseAddress;\r
566 UINT32 DiscoveryRangeLength;\r
567} EFI_ACPI_5_1_GICR_STRUCTURE;\r
568\r
569///\r
570/// Smart Battery Description Table (SBST)\r
571///\r
572typedef struct {\r
573 EFI_ACPI_DESCRIPTION_HEADER Header;\r
574 UINT32 WarningEnergyLevel;\r
575 UINT32 LowEnergyLevel;\r
576 UINT32 CriticalEnergyLevel;\r
577} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;\r
578\r
579///\r
580/// SBST Version (as defined in ACPI 5.1 spec.)\r
581///\r
582#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
583\r
584///\r
585/// Embedded Controller Boot Resources Table (ECDT)\r
586/// The table is followed by a null terminated ASCII string that contains\r
587/// a fully qualified reference to the name space object.\r
588///\r
589typedef struct {\r
590 EFI_ACPI_DESCRIPTION_HEADER Header;\r
591 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;\r
592 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;\r
593 UINT32 Uid;\r
594 UINT8 GpeBit;\r
595} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
596\r
597///\r
598/// ECDT Version (as defined in ACPI 5.1 spec.)\r
599///\r
600#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
601\r
602///\r
603/// System Resource Affinity Table (SRAT). The rest of the table\r
604/// must be defined in a platform specific manner.\r
605///\r
606typedef struct {\r
607 EFI_ACPI_DESCRIPTION_HEADER Header;\r
608 UINT32 Reserved1; ///< Must be set to 1\r
609 UINT64 Reserved2;\r
610} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
611\r
612///\r
613/// SRAT Version (as defined in ACPI 5.1 spec.)\r
614///\r
615#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
616\r
617//\r
618// SRAT structure types.\r
48a42a1c 619// All other values between 0x04 an 0xFF are reserved and\r
f449affe
JY		 620// will be ignored by OSPM.\r
621//\r
622#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
623#define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01\r
624#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
48a42a1c 625#define EFI_ACPI_5_1_GICC_AFFINITY 0x03\r
f449affe
JY		 626\r
627///\r
628/// Processor Local APIC/SAPIC Affinity Structure Definition\r
629///\r
630typedef struct {\r
631 UINT8 Type;\r
632 UINT8 Length;\r
633 UINT8 ProximityDomain7To0;\r
634 UINT8 ApicId;\r
635 UINT32 Flags;\r
636 UINT8 LocalSapicEid;\r
637 UINT8 ProximityDomain31To8[3];\r
638 UINT32 ClockDomain;\r
639} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
640\r
641///\r
642/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
643///\r
644#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
645\r
646///\r
647/// Memory Affinity Structure Definition\r
648///\r
649typedef struct {\r
650 UINT8 Type;\r
651 UINT8 Length;\r
652 UINT32 ProximityDomain;\r
653 UINT16 Reserved1;\r
654 UINT32 AddressBaseLow;\r
655 UINT32 AddressBaseHigh;\r
656 UINT32 LengthLow;\r
657 UINT32 LengthHigh;\r
658 UINT32 Reserved2;\r
659 UINT32 Flags;\r
660 UINT64 Reserved3;\r
661} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;\r
662\r
663//\r
664// Memory Flags. All other bits are reserved and must be 0.\r
665//\r
666#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)\r
667#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)\r
668#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)\r
669\r
670///\r
671/// Processor Local x2APIC Affinity Structure Definition\r
672///\r
673typedef struct {\r
674 UINT8 Type;\r
675 UINT8 Length;\r
676 UINT8 Reserved1[2];\r
677 UINT32 ProximityDomain;\r
678 UINT32 X2ApicId;\r
679 UINT32 Flags;\r
680 UINT32 ClockDomain;\r
681 UINT8 Reserved2[4];\r
682} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
683\r
48a42a1c
JY		 684///\r
685/// GICC Affinity Structure Definition\r
686///\r
687typedef struct {\r
688 UINT8 Type;\r
689 UINT8 Length;\r
690 UINT32 ProximityDomain;\r
691 UINT32 AcpiProcessorUid;\r
692 UINT32 Flags;\r
693 UINT32 ClockDomain;\r
694} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;\r
695\r
696///\r
697/// GICC Flags. All other bits are reserved and must be 0.\r
698///\r
699#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)\r
700\r
f449affe
JY		 701///\r
702/// System Locality Distance Information Table (SLIT).\r
703/// The rest of the table is a matrix.\r
704///\r
705typedef struct {\r
706 EFI_ACPI_DESCRIPTION_HEADER Header;\r
707 UINT64 NumberOfSystemLocalities;\r
708} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
709\r
710///\r
711/// SLIT Version (as defined in ACPI 5.1 spec.)\r
712///\r
713#define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
714\r
715///\r
716/// Corrected Platform Error Polling Table (CPEP)\r
717///\r
718typedef struct {\r
719 EFI_ACPI_DESCRIPTION_HEADER Header;\r
720 UINT8 Reserved[8];\r
721} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
722\r
723///\r
724/// CPEP Version (as defined in ACPI 5.1 spec.)\r
725///\r
726#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
727\r
728//\r
729// CPEP processor structure types.\r
730//\r
731#define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
732\r
733///\r
734/// Corrected Platform Error Polling Processor Structure Definition\r
735///\r
736typedef struct {\r
737 UINT8 Type;\r
738 UINT8 Length;\r
739 UINT8 ProcessorId;\r
740 UINT8 ProcessorEid;\r
741 UINT32 PollingInterval;\r
742} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
743\r
744///\r
745/// Maximum System Characteristics Table (MSCT)\r
746///\r
747typedef struct {\r
748 EFI_ACPI_DESCRIPTION_HEADER Header;\r
749 UINT32 OffsetProxDomInfo;\r
750 UINT32 MaximumNumberOfProximityDomains;\r
751 UINT32 MaximumNumberOfClockDomains;\r
752 UINT64 MaximumPhysicalAddress;\r
753} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
754\r
755///\r
756/// MSCT Version (as defined in ACPI 5.1 spec.)\r
757///\r
758#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
759\r
760///\r
761/// Maximum Proximity Domain Information Structure Definition\r
762///\r
763typedef struct {\r
764 UINT8 Revision;\r
765 UINT8 Length;\r
766 UINT32 ProximityDomainRangeLow;\r
767 UINT32 ProximityDomainRangeHigh;\r
768 UINT32 MaximumProcessorCapacity;\r
769 UINT64 MaximumMemoryCapacity;\r
770} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
771\r
772///\r
773/// ACPI RAS Feature Table definition.\r
774///\r
775typedef struct {\r
776 EFI_ACPI_DESCRIPTION_HEADER Header;\r
777 UINT8 PlatformCommunicationChannelIdentifier[12];\r
778} EFI_ACPI_5_1_RAS_FEATURE_TABLE;\r
779\r
780///\r
781/// RASF Version (as defined in ACPI 5.1 spec.)\r
782///\r
783#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01\r
784\r
785///\r
786/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
787///\r
788typedef struct {\r
789 UINT32 Signature;\r
790 UINT16 Command;\r
791 UINT16 Status;\r
792 UINT16 Version;\r
793 UINT8 RASCapabilities[16];\r
794 UINT8 SetRASCapabilities[16];\r
795 UINT16 NumberOfRASFParameterBlocks;\r
796 UINT32 SetRASCapabilitiesStatus;\r
797} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
798\r
799///\r
800/// ACPI RASF PCC command code\r
801///\r
802#define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
803\r
804///\r
805/// ACPI RASF Platform RAS Capabilities\r
806///\r
807#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
808#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
809\r
810///\r
811/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
812///\r
813typedef struct {\r
814 UINT16 Type;\r
815 UINT16 Version;\r
816 UINT16 Length;\r
817 UINT16 PatrolScrubCommand;\r
818 UINT64 RequestedAddressRange[2];\r
819 UINT64 ActualAddressRange[2];\r
820 UINT16 Flags;\r
821 UINT8 RequestedSpeed;\r
822} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
823\r
824///\r
825/// ACPI RASF Patrol Scrub command\r
826///\r
827#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
828#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
829#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
830\r
831///\r
832/// Memory Power State Table definition.\r
833///\r
834typedef struct {\r
835 EFI_ACPI_DESCRIPTION_HEADER Header;\r
836 UINT8 PlatformCommunicationChannelIdentifier;\r
837 UINT8 Reserved[3];\r
838// Memory Power Node Structure\r
839// Memory Power State Characteristics\r
840} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;\r
841\r
842///\r
843/// MPST Version (as defined in ACPI 5.1 spec.)\r
844///\r
845#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
846\r
847///\r
848/// MPST Platform Communication Channel Shared Memory Region definition.\r
849///\r
850typedef struct {\r
851 UINT32 Signature;\r
852 UINT16 Command;\r
853 UINT16 Status;\r
854 UINT32 MemoryPowerCommandRegister;\r
855 UINT32 MemoryPowerStatusRegister;\r
856 UINT32 PowerStateId;\r
857 UINT32 MemoryPowerNodeId;\r
858 UINT64 MemoryEnergyConsumed;\r
859 UINT64 ExpectedAveragePowerComsuned;\r
860} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
861\r
862///\r
863/// ACPI MPST PCC command code\r
864///\r
865#define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
866\r
867///\r
868/// ACPI MPST Memory Power command\r
869///\r
870#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
871#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
872#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
873#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
874\r
875///\r
876/// MPST Memory Power Node Table\r
877///\r
878typedef struct {\r
879 UINT8 PowerStateValue;\r
880 UINT8 PowerStateInformationIndex;\r
881} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;\r
882\r
883typedef struct {\r
884 UINT8 Flag;\r
885 UINT8 Reserved;\r
886 UINT16 MemoryPowerNodeId;\r
887 UINT32 Length;\r
888 UINT64 AddressBase;\r
889 UINT64 AddressLength;\r
890 UINT32 NumberOfPowerStates;\r
891 UINT32 NumberOfPhysicalComponents;\r
892//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
893//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
894} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;\r
895\r
896#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
897#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
898#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
899\r
900typedef struct {\r
901 UINT16 MemoryPowerNodeCount;\r
902 UINT8 Reserved[2];\r
903} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;\r
904\r
905///\r
906/// MPST Memory Power State Characteristics Table\r
907///\r
908typedef struct {\r
909 UINT8 PowerStateStructureID;\r
910 UINT8 Flag;\r
911 UINT16 Reserved;\r
912 UINT32 AveragePowerConsumedInMPS0;\r
913 UINT32 RelativePowerSavingToMPS0;\r
914 UINT64 ExitLatencyToMPS0;\r
915} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
916\r
917#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
918#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
919#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
920\r
921typedef struct {\r
922 UINT16 MemoryPowerStateCharacteristicsCount;\r
923 UINT8 Reserved[2];\r
924} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
925\r
926///\r
927/// Memory Topology Table definition.\r
928///\r
929typedef struct {\r
930 EFI_ACPI_DESCRIPTION_HEADER Header;\r
931 UINT32 Reserved;\r
932} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;\r
933\r
934///\r
935/// PMTT Version (as defined in ACPI 5.1 spec.)\r
936///\r
937#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
938\r
939///\r
940/// Common Memory Aggregator Device Structure.\r
941///\r
942typedef struct {\r
943 UINT8 Type;\r
944 UINT8 Reserved;\r
945 UINT16 Length;\r
946 UINT16 Flags;\r
947 UINT16 Reserved1;\r
948} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
949\r
950///\r
951/// Memory Aggregator Device Type\r
952///\r
953#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
954#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
955#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
956\r
957///\r
958/// Socket Memory Aggregator Device Structure.\r
959///\r
960typedef struct {\r
961 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
962 UINT16 SocketIdentifier;\r
963 UINT16 Reserved;\r
964//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
965} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
966\r
967///\r
968/// MemoryController Memory Aggregator Device Structure.\r
969///\r
970typedef struct {\r
971 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
972 UINT32 ReadLatency;\r
973 UINT32 WriteLatency;\r
974 UINT32 ReadBandwidth;\r
975 UINT32 WriteBandwidth;\r
976 UINT16 OptimalAccessUnit;\r
977 UINT16 OptimalAccessAlignment;\r
978 UINT16 Reserved;\r
979 UINT16 NumberOfProximityDomains;\r
980//UINT32 ProximityDomain[NumberOfProximityDomains];\r
981//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
982} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
983\r
984///\r
985/// DIMM Memory Aggregator Device Structure.\r
986///\r
987typedef struct {\r
988 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
989 UINT16 PhysicalComponentIdentifier;\r
990 UINT16 Reserved;\r
991 UINT32 SizeOfDimm;\r
992 UINT32 SmbiosHandle;\r
993} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
994\r
995///\r
996/// Boot Graphics Resource Table definition.\r
997///\r
998typedef struct {\r
999 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1000 ///\r
1001 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1002 ///\r
1003 UINT16 Version;\r
1004 ///\r
1005 /// 1-byte status field indicating current status about the table.\r
1006 /// Bits[7:1] = Reserved (must be zero)\r
1007 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1008 ///\r
1009 UINT8 Status;\r
1010 ///\r
1011 /// 1-byte enumerated type field indicating format of the image.\r
1012 /// 0 = Bitmap\r
1013 /// 1 - 255 Reserved (for future use)\r
1014 ///\r
1015 UINT8 ImageType;\r
1016 ///\r
1017 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1018 /// of the image bitmap.\r
1019 ///\r
1020 UINT64 ImageAddress;\r
1021 ///\r
1022 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1023 /// (X, Y) display offset of the top left corner of the boot image.\r
1024 /// The top left corner of the display is at offset (0, 0).\r
1025 ///\r
1026 UINT32 ImageOffsetX;\r
1027 ///\r
1028 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1029 /// (X, Y) display offset of the top left corner of the boot image.\r
1030 /// The top left corner of the display is at offset (0, 0).\r
1031 ///\r
1032 UINT32 ImageOffsetY;\r
1033} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1034\r
1035///\r
1036/// BGRT Revision\r
1037///\r
1038#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1039\r
1040///\r
1041/// BGRT Version\r
1042///\r
1043#define EFI_ACPI_5_1_BGRT_VERSION 0x01\r
1044\r
1045///\r
1046/// BGRT Status\r
1047///\r
1048#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1049#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01\r
1050\r
1051///\r
1052/// BGRT Image Type\r
1053///\r
1054#define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00\r
1055\r
1056///\r
1057/// FPDT Version (as defined in ACPI 5.1 spec.)\r
1058///\r
1059#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1060\r
1061///\r
1062/// FPDT Performance Record Types\r
1063///\r
1064#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1065#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1066\r
1067///\r
1068/// FPDT Performance Record Revision\r
1069///\r
1070#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1071#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1072\r
1073///\r
1074/// FPDT Runtime Performance Record Types\r
1075///\r
1076#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1077#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1078#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1079\r
1080///\r
1081/// FPDT Runtime Performance Record Revision\r
1082///\r
1083#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1084#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1085#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1086\r
1087///\r
1088/// FPDT Performance Record header\r
1089///\r
1090typedef struct {\r
1091 UINT16 Type;\r
1092 UINT8 Length;\r
1093 UINT8 Revision;\r
1094} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;\r
1095\r
1096///\r
1097/// FPDT Performance Table header\r
1098///\r
1099typedef struct {\r
1100 UINT32 Signature;\r
1101 UINT32 Length;\r
1102} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;\r
1103\r
1104///\r
1105/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1106///\r
1107typedef struct {\r
1108 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1109 UINT32 Reserved;\r
1110 ///\r
1111 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1112 ///\r
1113 UINT64 BootPerformanceTablePointer;\r
1114} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1115\r
1116///\r
1117/// FPDT S3 Performance Table Pointer Record Structure\r
1118///\r
1119typedef struct {\r
1120 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1121 UINT32 Reserved;\r
1122 ///\r
1123 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1124 ///\r
1125 UINT64 S3PerformanceTablePointer;\r
1126} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1127\r
1128///\r
1129/// FPDT Firmware Basic Boot Performance Record Structure\r
1130///\r
1131typedef struct {\r
1132 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1133 UINT32 Reserved;\r
1134 ///\r
1135 /// Timer value logged at the beginning of firmware image execution.\r
1136 /// This may not always be zero or near zero.\r
1137 ///\r
1138 UINT64 ResetEnd;\r
1139 ///\r
1140 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1141 /// For non-UEFI compatible boots, this field must be zero.\r
1142 ///\r
1143 UINT64 OsLoaderLoadImageStart;\r
1144 ///\r
1145 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1146 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1147 /// to the INT 19h handler invocation.\r
1148 ///\r
1149 UINT64 OsLoaderStartImageStart;\r
1150 ///\r
1151 /// Timer value logged at the point when the OS loader calls the\r
1152 /// ExitBootServices function for UEFI compatible firmware.\r
1153 /// For non-UEFI compatible boots, this field must be zero.\r
1154 ///\r
1155 UINT64 ExitBootServicesEntry;\r
1156 ///\r
1157 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1158 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1159 /// For non-UEFI compatible boots, this field must be zero.\r
1160 ///\r
1161 UINT64 ExitBootServicesExit;\r
1162} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1163\r
1164///\r
1165/// FPDT Firmware Basic Boot Performance Table signature\r
1166///\r
1167#define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1168\r
1169//\r
1170// FPDT Firmware Basic Boot Performance Table\r
1171//\r
1172typedef struct {\r
1173 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1174 //\r
1175 // one or more Performance Records.\r
1176 //\r
1177} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1178\r
1179///\r
1180/// FPDT "S3PT" S3 Performance Table\r
1181///\r
1182#define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1183\r
1184//\r
1185// FPDT Firmware S3 Boot Performance Table\r
1186//\r
1187typedef struct {\r
1188 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1189 //\r
1190 // one or more Performance Records.\r
1191 //\r
1192} EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1193\r
1194///\r
1195/// FPDT Basic S3 Resume Performance Record\r
1196///\r
1197typedef struct {\r
1198 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1199 ///\r
1200 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1201 ///\r
1202 UINT32 ResumeCount;\r
1203 ///\r
1204 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1205 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1206 ///\r
1207 UINT64 FullResume;\r
1208 ///\r
1209 /// Average timer value of all resume cycles logged since the last full boot\r
1210 /// sequence, including the most recent resume. Note that the entire log of\r
1211 /// timer values does not need to be retained in order to calculate this average.\r
1212 ///\r
1213 UINT64 AverageResume;\r
1214} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;\r
1215\r
1216///\r
1217/// FPDT Basic S3 Suspend Performance Record\r
1218///\r
1219typedef struct {\r
1220 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1221 ///\r
1222 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1223 /// Only the most recent suspend cycle's timer value is retained.\r
1224 ///\r
1225 UINT64 SuspendStart;\r
1226 ///\r
1227 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1228 /// mechanism) used to trigger hardware entry to S3.\r
1229 /// Only the most recent suspend cycle's timer value is retained.\r
1230 ///\r
1231 UINT64 SuspendEnd;\r
1232} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;\r
1233\r
1234///\r
1235/// Firmware Performance Record Table definition.\r
1236///\r
1237typedef struct {\r
1238 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1239} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1240\r
1241///\r
1242/// Generic Timer Description Table definition.\r
1243///\r
1244typedef struct {\r
1245 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1246 UINT64 CntControlBasePhysicalAddress;\r
1247 UINT32 Reserved;\r
1248 UINT32 SecurePL1TimerGSIV;\r
1249 UINT32 SecurePL1TimerFlags;\r
1250 UINT32 NonSecurePL1TimerGSIV;\r
1251 UINT32 NonSecurePL1TimerFlags;\r
1252 UINT32 VirtualTimerGSIV;\r
1253 UINT32 VirtualTimerFlags;\r
1254 UINT32 NonSecurePL2TimerGSIV;\r
1255 UINT32 NonSecurePL2TimerFlags;\r
1256 UINT64 CntReadBasePhysicalAddress;\r
1257 UINT32 PlatformTimerCount;\r
1258 UINT32 PlatformTimerOffset;\r
1259} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1260\r
1261///\r
1262/// GTDT Version (as defined in ACPI 5.1 spec.)\r
1263///\r
2d50c478 1264#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r
f449affe
JY		 1265\r
1266///\r
1267/// Timer Flags. All other bits are reserved and must be 0.\r
1268///\r
1269#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1270#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1271#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1272\r
1273///\r
1274/// Platform Timer Type\r
1275///\r
1276#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0\r
1277#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1278\r
1279///\r
1280/// GT Block Structure\r
1281///\r
1282typedef struct {\r
1283 UINT8 Type;\r
1284 UINT16 Length;\r
1285 UINT8 Reserved;\r
1286 UINT64 CntCtlBase;\r
1287 UINT32 GTBlockTimerCount;\r
1288 UINT32 GTBlockTimerOffset;\r
1289} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;\r
1290\r
1291///\r
1292/// GT Block Timer Structure\r
1293///\r
1294typedef struct {\r
1295 UINT8 GTFrameNumber;\r
1296 UINT8 Reserved[3];\r
1297 UINT64 CntBaseX;\r
1298 UINT64 CntEL0BaseX;\r
1299 UINT32 GTxPhysicalTimerGSIV;\r
1300 UINT32 GTxPhysicalTimerFlags;\r
1301 UINT32 GTxVirtualTimerGSIV;\r
1302 UINT32 GTxVirtualTimerFlags;\r
1303 UINT32 GTxCommonFlags;\r
1304} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1305\r
1306///\r
1307/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1308///\r
1309#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1310#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1311\r
1312///\r
1313/// Common Flags Flags. All other bits are reserved and must be 0.\r
1314///\r
1315#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1316#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1317\r
1318///\r
1319/// SBSA Generic Watchdog Structure\r
1320///\r
1321typedef struct {\r
1322 UINT8 Type;\r
f7acc872
SZ		 1323 UINT16 Length;\r
1324 UINT8 Reserved;\r
f449affe
JY		 1325 UINT64 RefreshFramePhysicalAddress;\r
1326 UINT64 WatchdogControlFramePhysicalAddress;\r
1327 UINT32 WatchdogTimerGSIV;\r
1328 UINT32 WatchdogTimerFlags;\r
1329} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1330\r
1331///\r
1332/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1333///\r
1334#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1335#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1336#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1337\r
1338///\r
1339/// Boot Error Record Table (BERT)\r
1340///\r
1341typedef struct {\r
1342 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1343 UINT32 BootErrorRegionLength;\r
1344 UINT64 BootErrorRegion;\r
1345} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1346\r
1347///\r
1348/// BERT Version (as defined in ACPI 5.1 spec.)\r
1349///\r
1350#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1351\r
1352///\r
1353/// Boot Error Region Block Status Definition\r
1354///\r
1355typedef struct {\r
1356 UINT32 UncorrectableErrorValid:1;\r
1357 UINT32 CorrectableErrorValid:1;\r
1358 UINT32 MultipleUncorrectableErrors:1;\r
1359 UINT32 MultipleCorrectableErrors:1;\r
1360 UINT32 ErrorDataEntryCount:10;\r
1361 UINT32 Reserved:18;\r
1362} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;\r
1363\r
1364///\r
1365/// Boot Error Region Definition\r
1366///\r
1367typedef struct {\r
1368 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1369 UINT32 RawDataOffset;\r
1370 UINT32 RawDataLength;\r
1371 UINT32 DataLength;\r
1372 UINT32 ErrorSeverity;\r
1373} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;\r
1374\r
1375//\r
1376// Boot Error Severity types\r
1377//\r
1378#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00\r
1379#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01\r
1380#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02\r
1381#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03\r
1382\r
1383///\r
1384/// Generic Error Data Entry Definition\r
1385///\r
1386typedef struct {\r
1387 UINT8 SectionType[16];\r
1388 UINT32 ErrorSeverity;\r
1389 UINT16 Revision;\r
1390 UINT8 ValidationBits;\r
1391 UINT8 Flags;\r
1392 UINT32 ErrorDataLength;\r
1393 UINT8 FruId[16];\r
1394 UINT8 FruText[20];\r
1395} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1396\r
1397///\r
1398/// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)\r
1399///\r
1400#define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1401\r
1402///\r
1403/// HEST - Hardware Error Source Table\r
1404///\r
1405typedef struct {\r
1406 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1407 UINT32 ErrorSourceCount;\r
1408} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1409\r
1410///\r
1411/// HEST Version (as defined in ACPI 5.1 spec.)\r
1412///\r
1413#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1414\r
1415//\r
1416// Error Source structure types.\r
1417//\r
1418#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1419#define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1420#define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1421#define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1422#define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07\r
1423#define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08\r
1424#define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09\r
1425\r
1426//\r
1427// Error Source structure flags.\r
1428//\r
1429#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1430#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1431\r
1432///\r
1433/// IA-32 Architecture Machine Check Exception Structure Definition\r
1434///\r
1435typedef struct {\r
1436 UINT16 Type;\r
1437 UINT16 SourceId;\r
1438 UINT8 Reserved0[2];\r
1439 UINT8 Flags;\r
1440 UINT8 Enabled;\r
1441 UINT32 NumberOfRecordsToPreAllocate;\r
1442 UINT32 MaxSectionsPerRecord;\r
1443 UINT64 GlobalCapabilityInitData;\r
1444 UINT64 GlobalControlInitData;\r
1445 UINT8 NumberOfHardwareBanks;\r
1446 UINT8 Reserved1[7];\r
1447} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1448\r
1449///\r
1450/// IA-32 Architecture Machine Check Bank Structure Definition\r
1451///\r
1452typedef struct {\r
1453 UINT8 BankNumber;\r
1454 UINT8 ClearStatusOnInitialization;\r
1455 UINT8 StatusDataFormat;\r
1456 UINT8 Reserved0;\r
1457 UINT32 ControlRegisterMsrAddress;\r
1458 UINT64 ControlInitData;\r
1459 UINT32 StatusRegisterMsrAddress;\r
1460 UINT32 AddressRegisterMsrAddress;\r
1461 UINT32 MiscRegisterMsrAddress;\r
1462} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1463\r
1464///\r
1465/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1466///\r
1467#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1468#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1469#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1470\r
1471//\r
1472// Hardware Error Notification types. All other values are reserved\r
1473//\r
1474#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1475#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1476#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1477#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1478#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1479\r
1480///\r
1481/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1482///\r
1483typedef struct {\r
1484 UINT16 Type:1;\r
1485 UINT16 PollInterval:1;\r
1486 UINT16 SwitchToPollingThresholdValue:1;\r
1487 UINT16 SwitchToPollingThresholdWindow:1;\r
1488 UINT16 ErrorThresholdValue:1;\r
1489 UINT16 ErrorThresholdWindow:1;\r
1490 UINT16 Reserved:10;\r
1491} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1492\r
1493///\r
1494/// Hardware Error Notification Structure Definition\r
1495///\r
1496typedef struct {\r
1497 UINT8 Type;\r
1498 UINT8 Length;\r
1499 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1500 UINT32 PollInterval;\r
1501 UINT32 Vector;\r
1502 UINT32 SwitchToPollingThresholdValue;\r
1503 UINT32 SwitchToPollingThresholdWindow;\r
1504 UINT32 ErrorThresholdValue;\r
1505 UINT32 ErrorThresholdWindow;\r
1506} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1507\r
1508///\r
1509/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1510///\r
1511typedef struct {\r
1512 UINT16 Type;\r
1513 UINT16 SourceId;\r
1514 UINT8 Reserved0[2];\r
1515 UINT8 Flags;\r
1516 UINT8 Enabled;\r
1517 UINT32 NumberOfRecordsToPreAllocate;\r
1518 UINT32 MaxSectionsPerRecord;\r
1519 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1520 UINT8 NumberOfHardwareBanks;\r
1521 UINT8 Reserved1[3];\r
1522} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1523\r
1524///\r
1525/// IA-32 Architecture NMI Error Structure Definition\r
1526///\r
1527typedef struct {\r
1528 UINT16 Type;\r
1529 UINT16 SourceId;\r
1530 UINT8 Reserved0[2];\r
1531 UINT32 NumberOfRecordsToPreAllocate;\r
1532 UINT32 MaxSectionsPerRecord;\r
1533 UINT32 MaxRawDataLength;\r
1534} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1535\r
1536///\r
1537/// PCI Express Root Port AER Structure Definition\r
1538///\r
1539typedef struct {\r
1540 UINT16 Type;\r
1541 UINT16 SourceId;\r
1542 UINT8 Reserved0[2];\r
1543 UINT8 Flags;\r
1544 UINT8 Enabled;\r
1545 UINT32 NumberOfRecordsToPreAllocate;\r
1546 UINT32 MaxSectionsPerRecord;\r
1547 UINT32 Bus;\r
1548 UINT16 Device;\r
1549 UINT16 Function;\r
1550 UINT16 DeviceControl;\r
1551 UINT8 Reserved1[2];\r
1552 UINT32 UncorrectableErrorMask;\r
1553 UINT32 UncorrectableErrorSeverity;\r
1554 UINT32 CorrectableErrorMask;\r
1555 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1556 UINT32 RootErrorCommand;\r
1557} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1558\r
1559///\r
1560/// PCI Express Device AER Structure Definition\r
1561///\r
1562typedef struct {\r
1563 UINT16 Type;\r
1564 UINT16 SourceId;\r
1565 UINT8 Reserved0[2];\r
1566 UINT8 Flags;\r
1567 UINT8 Enabled;\r
1568 UINT32 NumberOfRecordsToPreAllocate;\r
1569 UINT32 MaxSectionsPerRecord;\r
1570 UINT32 Bus;\r
1571 UINT16 Device;\r
1572 UINT16 Function;\r
1573 UINT16 DeviceControl;\r
1574 UINT8 Reserved1[2];\r
1575 UINT32 UncorrectableErrorMask;\r
1576 UINT32 UncorrectableErrorSeverity;\r
1577 UINT32 CorrectableErrorMask;\r
1578 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1579} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1580\r
1581///\r
1582/// PCI Express Bridge AER Structure Definition\r
1583///\r
1584typedef struct {\r
1585 UINT16 Type;\r
1586 UINT16 SourceId;\r
1587 UINT8 Reserved0[2];\r
1588 UINT8 Flags;\r
1589 UINT8 Enabled;\r
1590 UINT32 NumberOfRecordsToPreAllocate;\r
1591 UINT32 MaxSectionsPerRecord;\r
1592 UINT32 Bus;\r
1593 UINT16 Device;\r
1594 UINT16 Function;\r
1595 UINT16 DeviceControl;\r
1596 UINT8 Reserved1[2];\r
1597 UINT32 UncorrectableErrorMask;\r
1598 UINT32 UncorrectableErrorSeverity;\r
1599 UINT32 CorrectableErrorMask;\r
1600 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1601 UINT32 SecondaryUncorrectableErrorMask;\r
1602 UINT32 SecondaryUncorrectableErrorSeverity;\r
1603 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1604} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1605\r
1606///\r
1607/// Generic Hardware Error Source Structure Definition\r
1608///\r
1609typedef struct {\r
1610 UINT16 Type;\r
1611 UINT16 SourceId;\r
1612 UINT16 RelatedSourceId;\r
1613 UINT8 Flags;\r
1614 UINT8 Enabled;\r
1615 UINT32 NumberOfRecordsToPreAllocate;\r
1616 UINT32 MaxSectionsPerRecord;\r
1617 UINT32 MaxRawDataLength;\r
1618 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1619 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1620 UINT32 ErrorStatusBlockLength;\r
1621} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1622\r
1623///\r
1624/// Generic Error Status Definition\r
1625///\r
1626typedef struct {\r
1627 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1628 UINT32 RawDataOffset;\r
1629 UINT32 RawDataLength;\r
1630 UINT32 DataLength;\r
1631 UINT32 ErrorSeverity;\r
1632} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;\r
1633\r
1634///\r
1635/// ERST - Error Record Serialization Table\r
1636///\r
1637typedef struct {\r
1638 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1639 UINT32 SerializationHeaderSize;\r
1640 UINT8 Reserved0[4];\r
1641 UINT32 InstructionEntryCount;\r
1642} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1643\r
1644///\r
1645/// ERST Version (as defined in ACPI 5.1 spec.)\r
1646///\r
1647#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1648\r
1649///\r
1650/// ERST Serialization Actions\r
1651///\r
1652#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00\r
1653#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01\r
1654#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1655#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03\r
1656#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04\r
1657#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05\r
1658#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06\r
1659#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07\r
1660#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08\r
1661#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09\r
1662#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A\r
1663#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1664#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1665#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1666#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1667\r
1668///\r
1669/// ERST Action Command Status\r
1670///\r
1671#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00\r
1672#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1673#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1674#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03\r
1675#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1676#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1677\r
1678///\r
1679/// ERST Serialization Instructions\r
1680///\r
1681#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00\r
1682#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01\r
1683#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02\r
1684#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03\r
1685#define EFI_ACPI_5_1_ERST_NOOP 0x04\r
1686#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05\r
1687#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06\r
1688#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07\r
1689#define EFI_ACPI_5_1_ERST_ADD 0x08\r
1690#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09\r
1691#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A\r
1692#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B\r
1693#define EFI_ACPI_5_1_ERST_STALL 0x0C\r
1694#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D\r
1695#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1696#define EFI_ACPI_5_1_ERST_GOTO 0x0F\r
1697#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1698#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11\r
1699#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12\r
1700\r
1701///\r
1702/// ERST Instruction Flags\r
1703///\r
1704#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01\r
1705\r
1706///\r
1707/// ERST Serialization Instruction Entry\r
1708///\r
1709typedef struct {\r
1710 UINT8 SerializationAction;\r
1711 UINT8 Instruction;\r
1712 UINT8 Flags;\r
1713 UINT8 Reserved0;\r
1714 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1715 UINT64 Value;\r
1716 UINT64 Mask;\r
1717} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1718\r
1719///\r
1720/// EINJ - Error Injection Table\r
1721///\r
1722typedef struct {\r
1723 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1724 UINT32 InjectionHeaderSize;\r
1725 UINT8 InjectionFlags;\r
1726 UINT8 Reserved0[3];\r
1727 UINT32 InjectionEntryCount;\r
1728} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;\r
1729\r
1730///\r
1731/// EINJ Version (as defined in ACPI 5.1 spec.)\r
1732///\r
1733#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01\r
1734\r
1735///\r
1736/// EINJ Error Injection Actions\r
1737///\r
1738#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1739#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1740#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02\r
1741#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03\r
1742#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04\r
1743#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05\r
1744#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06\r
1745#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07\r
1746#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF\r
1747\r
1748///\r
1749/// EINJ Action Command Status\r
1750///\r
1751#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00\r
1752#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1753#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02\r
1754\r
1755///\r
1756/// EINJ Error Type Definition\r
1757///\r
1758#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1759#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1760#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1761#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1762#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1763#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1764#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1765#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1766#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1767#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1768#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1769#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1770\r
1771///\r
1772/// EINJ Injection Instructions\r
1773///\r
1774#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00\r
1775#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01\r
1776#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02\r
1777#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03\r
1778#define EFI_ACPI_5_1_EINJ_NOOP 0x04\r
1779\r
1780///\r
1781/// EINJ Instruction Flags\r
1782///\r
1783#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01\r
1784\r
1785///\r
1786/// EINJ Injection Instruction Entry\r
1787///\r
1788typedef struct {\r
1789 UINT8 InjectionAction;\r
1790 UINT8 Instruction;\r
1791 UINT8 Flags;\r
1792 UINT8 Reserved0;\r
1793 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1794 UINT64 Value;\r
1795 UINT64 Mask;\r
1796} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1797\r
1798///\r
1799/// EINJ Trigger Action Table\r
1800///\r
1801typedef struct {\r
1802 UINT32 HeaderSize;\r
1803 UINT32 Revision;\r
1804 UINT32 TableSize;\r
1805 UINT32 EntryCount;\r
1806} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;\r
1807\r
1808///\r
1809/// Platform Communications Channel Table (PCCT)\r
1810///\r
1811typedef struct {\r
1812 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1813 UINT32 Flags;\r
1814 UINT64 Reserved;\r
1815} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1816\r
1817///\r
1818/// PCCT Version (as defined in ACPI 5.1 spec.)\r
1819///\r
1820#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
1821\r
1822///\r
1823/// PCCT Global Flags\r
1824///\r
1825#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0\r
1826\r
1827//\r
1828// PCCT Subspace type\r
1829//\r
1830#define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1831\r
1832///\r
1833/// PCC Subspace Structure Header\r
1834///\r
1835typedef struct {\r
1836 UINT8 Type;\r
1837 UINT8 Length;\r
1838} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;\r
1839\r
1840///\r
1841/// Generic Communications Subspace Structure\r
1842///\r
1843typedef struct {\r
1844 UINT8 Type;\r
1845 UINT8 Length;\r
1846 UINT8 Reserved[6];\r
1847 UINT64 BaseAddress;\r
1848 UINT64 AddressLength;\r
1849 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1850 UINT64 DoorbellPreserve;\r
1851 UINT64 DoorbellWrite;\r
1852 UINT32 NominalLatency;\r
1853 UINT32 MaximumPeriodicAccessRate;\r
1854 UINT16 MinimumRequestTurnaroundTime;\r
1855} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;\r
1856\r
1857///\r
1858/// Generic Communications Channel Shared Memory Region\r
1859///\r
1860\r
1861typedef struct {\r
1862 UINT8 Command;\r
1863 UINT8 Reserved:7;\r
1864 UINT8 GenerateSci:1;\r
1865} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1866\r
1867typedef struct {\r
1868 UINT8 CommandComplete:1;\r
1869 UINT8 SciDoorbell:1;\r
1870 UINT8 Error:1;\r
9095d37b 1871 UINT8 PlatformNotification:1;\r
a71c80b6 1872 UINT8 Reserved:4;\r
f449affe
JY		 1873 UINT8 Reserved1;\r
1874} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1875\r
1876typedef struct {\r
1877 UINT32 Signature;\r
1878 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1879 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1880} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1881\r
1882//\r
1883// Known table signatures\r
1884//\r
1885\r
1886///\r
1887/// "RSD PTR " Root System Description Pointer\r
1888///\r
9095d37b 1889#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
f449affe
JY		 1890\r
1891///\r
1892/// "APIC" Multiple APIC Description Table\r
1893///\r
1894#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1895\r
1896///\r
1897/// "BERT" Boot Error Record Table\r
1898///\r
1899#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1900\r
1901///\r
1902/// "BGRT" Boot Graphics Resource Table\r
1903///\r
1904#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1905\r
1906///\r
1907/// "CPEP" Corrected Platform Error Polling Table\r
1908///\r
1909#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1910\r
1911///\r
1912/// "DSDT" Differentiated System Description Table\r
1913///\r
1914#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1915\r
1916///\r
1917/// "ECDT" Embedded Controller Boot Resources Table\r
1918///\r
1919#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1920\r
1921///\r
1922/// "EINJ" Error Injection Table\r
1923///\r
1924#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1925\r
1926///\r
1927/// "ERST" Error Record Serialization Table\r
1928///\r
1929#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1930\r
1931///\r
1932/// "FACP" Fixed ACPI Description Table\r
1933///\r
1934#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1935\r
1936///\r
1937/// "FACS" Firmware ACPI Control Structure\r
1938///\r
1939#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1940\r
1941///\r
1942/// "FPDT" Firmware Performance Data Table\r
1943///\r
1944#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1945\r
1946///\r
1947/// "GTDT" Generic Timer Description Table\r
1948///\r
1949#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1950\r
1951///\r
1952/// "HEST" Hardware Error Source Table\r
1953///\r
1954#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1955\r
1956///\r
1957/// "MPST" Memory Power State Table\r
1958///\r
1959#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1960\r
1961///\r
1962/// "MSCT" Maximum System Characteristics Table\r
1963///\r
1964#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1965\r
1966///\r
1967/// "PMTT" Platform Memory Topology Table\r
1968///\r
1969#define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1970\r
1971///\r
1972/// "PSDT" Persistent System Description Table\r
1973///\r
1974#define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1975\r
1976///\r
1977/// "RASF" ACPI RAS Feature Table\r
1978///\r
1979#define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1980\r
1981///\r
1982/// "RSDT" Root System Description Table\r
1983///\r
1984#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1985\r
1986///\r
1987/// "SBST" Smart Battery Specification Table\r
1988///\r
1989#define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1990\r
1991///\r
1992/// "SLIT" System Locality Information Table\r
1993///\r
1994#define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
1995\r
1996///\r
1997/// "SRAT" System Resource Affinity Table\r
1998///\r
1999#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2000\r
2001///\r
2002/// "SSDT" Secondary System Description Table\r
2003///\r
2004#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2005\r
2006///\r
2007/// "XSDT" Extended System Description Table\r
2008///\r
2009#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2010\r
2011///\r
2012/// "BOOT" MS Simple Boot Spec\r
2013///\r
2014#define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2015\r
2016///\r
2017/// "CSRT" MS Core System Resource Table\r
2018///\r
2019#define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2020\r
2021///\r
2022/// "DBG2" MS Debug Port 2 Spec\r
2023///\r
2024#define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2025\r
2026///\r
2027/// "DBGP" MS Debug Port Spec\r
2028///\r
2029#define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2030\r
2031///\r
2032/// "DMAR" DMA Remapping Table\r
2033///\r
2034#define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2035\r
2036///\r
2037/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2038///\r
2039#define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2040\r
2041///\r
2042/// "ETDT" Event Timer Description Table\r
2043///\r
2044#define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2045\r
2046///\r
2047/// "HPET" IA-PC High Precision Event Timer Table\r
2048///\r
2049#define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2050\r
2051///\r
2052/// "iBFT" iSCSI Boot Firmware Table\r
2053///\r
2054#define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2055\r
2056///\r
2057/// "IVRS" I/O Virtualization Reporting Structure\r
2058///\r
2059#define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2060\r
2061///\r
2062/// "LPIT" Low Power Idle Table\r
2063///\r
2064#define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2065\r
2066///\r
2067/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2068///\r
2069#define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2070\r
2071///\r
2072/// "MCHI" Management Controller Host Interface Table\r
2073///\r
2074#define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2075\r
2076///\r
2077/// "MSDM" MS Data Management Table\r
2078///\r
2079#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2080\r
2081///\r
2082/// "SLIC" MS Software Licensing Table Specification\r
2083///\r
2084#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2085\r
2086///\r
2087/// "SPCR" Serial Port Concole Redirection Table\r
2088///\r
2089#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2090\r
2091///\r
2092/// "SPMI" Server Platform Management Interface Table\r
2093///\r
2094#define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2095\r
2096///\r
2097/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2098///\r
2099#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2100\r
2101///\r
2102/// "TPM2" Trusted Computing Platform 1 Table\r
2103///\r
2104#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2105\r
2106///\r
2107/// "UEFI" UEFI ACPI Data Table\r
2108///\r
2109#define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2110\r
2111///\r
2112/// "WAET" Windows ACPI Emulated Devices Table\r
2113///\r
2114#define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2115\r
2116///\r
2117/// "WDAT" Watchdog Action Table\r
2118///\r
2119#define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2120\r
2121///\r
2122/// "WDRT" Watchdog Resource Table\r
2123///\r
2124#define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2125\r
2126///\r
2127/// "WPBT" MS Platform Binary Table\r
2128///\r
2129#define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2130\r
2131#pragma pack()\r
2132\r
2133#endif\r
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