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Added PlatformNotification to ACPI 5.0 PCCT structure.
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi51.h
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f449affe
JY		 1/** @file \r
2 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014.\r
3\r
a71c80b6 4 Copyright (c) 2014 Hewlett-Packard Development Company, L.P.<BR>\r
f449affe
JY		 5 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
6 This program and the accompanying materials \r
7 are licensed and made available under the terms and conditions of the BSD License \r
8 which accompanies this distribution. The full text of the license may be found at \r
9 http://opensource.org/licenses/bsd-license.php \r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
13**/\r
14\r
15#ifndef _ACPI_5_1_H_\r
16#define _ACPI_5_1_H_\r
17\r
18#include <IndustryStandard/Acpi50.h>\r
19\r
20//\r
21// Ensure proper structure formats\r
22//\r
23#pragma pack(1)\r
24\r
25///\r
26/// ACPI 5.1 Generic Address Space definition\r
27///\r
28typedef struct {\r
29 UINT8 AddressSpaceId;\r
30 UINT8 RegisterBitWidth;\r
31 UINT8 RegisterBitOffset;\r
32 UINT8 AccessSize;\r
33 UINT64 Address;\r
34} EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE;\r
35\r
36//\r
37// Generic Address Space Address IDs\r
38//\r
39#define EFI_ACPI_5_1_SYSTEM_MEMORY 0\r
40#define EFI_ACPI_5_1_SYSTEM_IO 1\r
41#define EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE 2\r
42#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER 3\r
43#define EFI_ACPI_5_1_SMBUS 4\r
44#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
45#define EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
46\r
47//\r
48// Generic Address Space Access Sizes\r
49//\r
50#define EFI_ACPI_5_1_UNDEFINED 0\r
51#define EFI_ACPI_5_1_BYTE 1\r
52#define EFI_ACPI_5_1_WORD 2\r
53#define EFI_ACPI_5_1_DWORD 3\r
54#define EFI_ACPI_5_1_QWORD 4\r
55\r
56//\r
57// ACPI 5.1 table structures\r
58//\r
59\r
60///\r
61/// Root System Description Pointer Structure\r
62///\r
63typedef struct {\r
64 UINT64 Signature;\r
65 UINT8 Checksum;\r
66 UINT8 OemId[6];\r
67 UINT8 Revision;\r
68 UINT32 RsdtAddress;\r
69 UINT32 Length;\r
70 UINT64 XsdtAddress;\r
71 UINT8 ExtendedChecksum;\r
72 UINT8 Reserved[3];\r
73} EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
74\r
75///\r
76/// RSD_PTR Revision (as defined in ACPI 5.1 spec.)\r
77///\r
78#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 5.1) says current value is 2\r
79\r
80///\r
81/// Common table header, this prefaces all ACPI tables, including FACS, but\r
82/// excluding the RSD PTR structure\r
83///\r
84typedef struct {\r
85 UINT32 Signature;\r
86 UINT32 Length;\r
87} EFI_ACPI_5_1_COMMON_HEADER;\r
88\r
89//\r
90// Root System Description Table\r
91// No definition needed as it is a common description table header, the same with \r
92// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
93//\r
94\r
95///\r
96/// RSDT Revision (as defined in ACPI 5.1 spec.)\r
97///\r
98#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
99\r
100//\r
101// Extended System Description Table\r
102// No definition needed as it is a common description table header, the same with \r
103// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
104//\r
105\r
106///\r
107/// XSDT Revision (as defined in ACPI 5.1 spec.)\r
108///\r
109#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
110\r
111///\r
112/// Fixed ACPI Description Table Structure (FADT)\r
113///\r
114typedef struct {\r
115 EFI_ACPI_DESCRIPTION_HEADER Header;\r
116 UINT32 FirmwareCtrl;\r
117 UINT32 Dsdt;\r
118 UINT8 Reserved0;\r
119 UINT8 PreferredPmProfile;\r
120 UINT16 SciInt;\r
121 UINT32 SmiCmd;\r
122 UINT8 AcpiEnable;\r
123 UINT8 AcpiDisable;\r
124 UINT8 S4BiosReq;\r
125 UINT8 PstateCnt;\r
126 UINT32 Pm1aEvtBlk;\r
127 UINT32 Pm1bEvtBlk;\r
128 UINT32 Pm1aCntBlk;\r
129 UINT32 Pm1bCntBlk;\r
130 UINT32 Pm2CntBlk;\r
131 UINT32 PmTmrBlk;\r
132 UINT32 Gpe0Blk;\r
133 UINT32 Gpe1Blk;\r
134 UINT8 Pm1EvtLen;\r
135 UINT8 Pm1CntLen;\r
136 UINT8 Pm2CntLen;\r
137 UINT8 PmTmrLen;\r
138 UINT8 Gpe0BlkLen;\r
139 UINT8 Gpe1BlkLen;\r
140 UINT8 Gpe1Base;\r
141 UINT8 CstCnt;\r
142 UINT16 PLvl2Lat;\r
143 UINT16 PLvl3Lat;\r
144 UINT16 FlushSize;\r
145 UINT16 FlushStride;\r
146 UINT8 DutyOffset;\r
147 UINT8 DutyWidth;\r
148 UINT8 DayAlrm;\r
149 UINT8 MonAlrm;\r
150 UINT8 Century;\r
151 UINT16 IaPcBootArch;\r
152 UINT8 Reserved1;\r
153 UINT32 Flags;\r
154 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
155 UINT8 ResetValue;\r
156 UINT16 ArmBootArch;\r
157 UINT8 MinorVersion;\r
158 UINT64 XFirmwareCtrl;\r
159 UINT64 XDsdt;\r
160 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
161 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
162 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
163 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
164 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
165 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
166 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
167 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
168 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
169 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
170} EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE;\r
171\r
172///\r
173/// FADT Version (as defined in ACPI 5.1 spec.)\r
174///\r
175#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x05\r
176#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01\r
177\r
178//\r
179// Fixed ACPI Description Table Preferred Power Management Profile\r
180//\r
181#define EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED 0\r
182#define EFI_ACPI_5_1_PM_PROFILE_DESKTOP 1\r
183#define EFI_ACPI_5_1_PM_PROFILE_MOBILE 2\r
184#define EFI_ACPI_5_1_PM_PROFILE_WORKSTATION 3\r
185#define EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER 4\r
186#define EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER 5\r
187#define EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC 6\r
188#define EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER 7\r
189#define EFI_ACPI_5_1_PM_PROFILE_TABLET 8\r
190\r
191//\r
192// Fixed ACPI Description Table Boot Architecture Flags\r
193// All other bits are reserved and must be set to 0.\r
194//\r
195#define EFI_ACPI_5_1_LEGACY_DEVICES BIT0\r
196#define EFI_ACPI_5_1_8042 BIT1\r
197#define EFI_ACPI_5_1_VGA_NOT_PRESENT BIT2\r
198#define EFI_ACPI_5_1_MSI_NOT_SUPPORTED BIT3\r
199#define EFI_ACPI_5_1_PCIE_ASPM_CONTROLS BIT4\r
200#define EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT BIT5\r
201\r
202//\r
203// Fixed ACPI Description Table Arm Boot Architecture Flags\r
204// All other bits are reserved and must be set to 0.\r
205//\r
206#define EFI_ACPI_5_1_ARM_PSCI_COMPLIANT BIT0\r
207#define EFI_ACPI_5_1_ARM_PSCI_USE_HVC BIT1\r
208\r
209//\r
210// Fixed ACPI Description Table Fixed Feature Flags\r
211// All other bits are reserved and must be set to 0.\r
212//\r
213#define EFI_ACPI_5_1_WBINVD BIT0\r
214#define EFI_ACPI_5_1_WBINVD_FLUSH BIT1\r
215#define EFI_ACPI_5_1_PROC_C1 BIT2\r
216#define EFI_ACPI_5_1_P_LVL2_UP BIT3\r
217#define EFI_ACPI_5_1_PWR_BUTTON BIT4\r
218#define EFI_ACPI_5_1_SLP_BUTTON BIT5\r
219#define EFI_ACPI_5_1_FIX_RTC BIT6\r
220#define EFI_ACPI_5_1_RTC_S4 BIT7\r
221#define EFI_ACPI_5_1_TMR_VAL_EXT BIT8\r
222#define EFI_ACPI_5_1_DCK_CAP BIT9\r
223#define EFI_ACPI_5_1_RESET_REG_SUP BIT10\r
224#define EFI_ACPI_5_1_SEALED_CASE BIT11\r
225#define EFI_ACPI_5_1_HEADLESS BIT12\r
226#define EFI_ACPI_5_1_CPU_SW_SLP BIT13\r
227#define EFI_ACPI_5_1_PCI_EXP_WAK BIT14\r
228#define EFI_ACPI_5_1_USE_PLATFORM_CLOCK BIT15\r
229#define EFI_ACPI_5_1_S4_RTC_STS_VALID BIT16\r
230#define EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE BIT17\r
231#define EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL BIT18\r
232#define EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
233#define EFI_ACPI_5_1_HW_REDUCED_ACPI BIT20\r
234#define EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
235\r
236///\r
237/// Firmware ACPI Control Structure\r
238///\r
239typedef struct {\r
240 UINT32 Signature;\r
241 UINT32 Length;\r
242 UINT32 HardwareSignature;\r
243 UINT32 FirmwareWakingVector;\r
244 UINT32 GlobalLock;\r
245 UINT32 Flags;\r
246 UINT64 XFirmwareWakingVector;\r
247 UINT8 Version;\r
248 UINT8 Reserved0[3];\r
249 UINT32 OspmFlags;\r
250 UINT8 Reserved1[24];\r
251} EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
252\r
253///\r
254/// FACS Version (as defined in ACPI 5.1 spec.)\r
255///\r
256#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
257\r
258///\r
259/// Firmware Control Structure Feature Flags\r
260/// All other bits are reserved and must be set to 0.\r
261///\r
262#define EFI_ACPI_5_1_S4BIOS_F BIT0\r
263#define EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F BIT1\r
264\r
265///\r
266/// OSPM Enabled Firmware Control Structure Flags\r
267/// All other bits are reserved and must be set to 0.\r
268///\r
269#define EFI_ACPI_5_1_OSPM_64BIT_WAKE_F BIT0\r
270\r
271//\r
272// Differentiated System Description Table,\r
273// Secondary System Description Table\r
274// and Persistent System Description Table,\r
275// no definition needed as they are common description table header, the same with\r
276// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
277//\r
278#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
279#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
280\r
281///\r
282/// Multiple APIC Description Table header definition. The rest of the table\r
283/// must be defined in a platform specific manner.\r
284///\r
285typedef struct {\r
286 EFI_ACPI_DESCRIPTION_HEADER Header;\r
287 UINT32 LocalApicAddress;\r
288 UINT32 Flags;\r
289} EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
290\r
291///\r
292/// MADT Revision (as defined in ACPI 5.1 spec.)\r
293///\r
294#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x03\r
295\r
296///\r
297/// Multiple APIC Flags\r
298/// All other bits are reserved and must be set to 0.\r
299///\r
300#define EFI_ACPI_5_1_PCAT_COMPAT BIT0\r
301\r
302//\r
303// Multiple APIC Description Table APIC structure types\r
304// All other values between 0x0D and 0x7F are reserved and\r
305// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
306//\r
307#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC 0x00\r
308#define EFI_ACPI_5_1_IO_APIC 0x01\r
309#define EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE 0x02\r
310#define EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
311#define EFI_ACPI_5_1_LOCAL_APIC_NMI 0x04\r
312#define EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
313#define EFI_ACPI_5_1_IO_SAPIC 0x06\r
314#define EFI_ACPI_5_1_LOCAL_SAPIC 0x07\r
315#define EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES 0x08\r
316#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC 0x09\r
317#define EFI_ACPI_5_1_LOCAL_X2APIC_NMI 0x0A\r
318#define EFI_ACPI_5_1_GIC 0x0B\r
319#define EFI_ACPI_5_1_GICD 0x0C\r
320#define EFI_ACPI_5_1_GIC_MSI_FRAME 0x0D\r
321#define EFI_ACPI_5_1_GICR 0x0E\r
322\r
323//\r
324// APIC Structure Definitions\r
325//\r
326\r
327///\r
328/// Processor Local APIC Structure Definition\r
329///\r
330typedef struct {\r
331 UINT8 Type;\r
332 UINT8 Length;\r
333 UINT8 AcpiProcessorId;\r
334 UINT8 ApicId;\r
335 UINT32 Flags;\r
336} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
337\r
338///\r
339/// Local APIC Flags. All other bits are reserved and must be 0.\r
340///\r
341#define EFI_ACPI_5_1_LOCAL_APIC_ENABLED BIT0\r
342\r
343///\r
344/// IO APIC Structure\r
345///\r
346typedef struct {\r
347 UINT8 Type;\r
348 UINT8 Length;\r
349 UINT8 IoApicId;\r
350 UINT8 Reserved;\r
351 UINT32 IoApicAddress;\r
352 UINT32 GlobalSystemInterruptBase;\r
353} EFI_ACPI_5_1_IO_APIC_STRUCTURE;\r
354\r
355///\r
356/// Interrupt Source Override Structure\r
357///\r
358typedef struct {\r
359 UINT8 Type;\r
360 UINT8 Length;\r
361 UINT8 Bus;\r
362 UINT8 Source;\r
363 UINT32 GlobalSystemInterrupt;\r
364 UINT16 Flags;\r
365} EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
366\r
367///\r
368/// Platform Interrupt Sources Structure Definition\r
369///\r
370typedef struct {\r
371 UINT8 Type;\r
372 UINT8 Length;\r
373 UINT16 Flags;\r
374 UINT8 InterruptType;\r
375 UINT8 ProcessorId;\r
376 UINT8 ProcessorEid;\r
377 UINT8 IoSapicVector;\r
378 UINT32 GlobalSystemInterrupt;\r
379 UINT32 PlatformInterruptSourceFlags;\r
380 UINT8 CpeiProcessorOverride;\r
381 UINT8 Reserved[31];\r
382} EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
383\r
384//\r
385// MPS INTI flags.\r
386// All other bits are reserved and must be set to 0.\r
387//\r
388#define EFI_ACPI_5_1_POLARITY (3 << 0)\r
389#define EFI_ACPI_5_1_TRIGGER_MODE (3 << 2)\r
390\r
391///\r
392/// Non-Maskable Interrupt Source Structure\r
393///\r
394typedef struct {\r
395 UINT8 Type;\r
396 UINT8 Length;\r
397 UINT16 Flags;\r
398 UINT32 GlobalSystemInterrupt;\r
399} EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
400\r
401///\r
402/// Local APIC NMI Structure\r
403///\r
404typedef struct {\r
405 UINT8 Type;\r
406 UINT8 Length;\r
407 UINT8 AcpiProcessorId;\r
408 UINT16 Flags;\r
409 UINT8 LocalApicLint;\r
410} EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE;\r
411\r
412///\r
413/// Local APIC Address Override Structure\r
414///\r
415typedef struct {\r
416 UINT8 Type;\r
417 UINT8 Length;\r
418 UINT16 Reserved;\r
419 UINT64 LocalApicAddress;\r
420} EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
421\r
422///\r
423/// IO SAPIC Structure\r
424///\r
425typedef struct {\r
426 UINT8 Type;\r
427 UINT8 Length;\r
428 UINT8 IoApicId;\r
429 UINT8 Reserved;\r
430 UINT32 GlobalSystemInterruptBase;\r
431 UINT64 IoSapicAddress;\r
432} EFI_ACPI_5_1_IO_SAPIC_STRUCTURE;\r
433\r
434///\r
435/// Local SAPIC Structure\r
436/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
437///\r
438typedef struct {\r
439 UINT8 Type;\r
440 UINT8 Length;\r
441 UINT8 AcpiProcessorId;\r
442 UINT8 LocalSapicId;\r
443 UINT8 LocalSapicEid;\r
444 UINT8 Reserved[3];\r
445 UINT32 Flags;\r
446 UINT32 ACPIProcessorUIDValue;\r
447} EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
448\r
449///\r
450/// Platform Interrupt Sources Structure\r
451///\r
452typedef struct {\r
453 UINT8 Type;\r
454 UINT8 Length;\r
455 UINT16 Flags;\r
456 UINT8 InterruptType;\r
457 UINT8 ProcessorId;\r
458 UINT8 ProcessorEid;\r
459 UINT8 IoSapicVector;\r
460 UINT32 GlobalSystemInterrupt;\r
461 UINT32 PlatformInterruptSourceFlags;\r
462} EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
463\r
464///\r
465/// Platform Interrupt Source Flags.\r
466/// All other bits are reserved and must be set to 0.\r
467///\r
468#define EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE BIT0\r
469\r
470///\r
471/// Processor Local x2APIC Structure Definition\r
472///\r
473typedef struct {\r
474 UINT8 Type;\r
475 UINT8 Length;\r
476 UINT8 Reserved[2];\r
477 UINT32 X2ApicId;\r
478 UINT32 Flags;\r
479 UINT32 AcpiProcessorUid;\r
480} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
481\r
482///\r
483/// Local x2APIC NMI Structure\r
484///\r
485typedef struct {\r
486 UINT8 Type;\r
487 UINT8 Length;\r
488 UINT16 Flags;\r
489 UINT32 AcpiProcessorUid;\r
490 UINT8 LocalX2ApicLint;\r
491 UINT8 Reserved[3];\r
492} EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE;\r
493\r
494///\r
495/// GIC Structure\r
496///\r
497typedef struct {\r
498 UINT8 Type;\r
499 UINT8 Length;\r
500 UINT16 Reserved;\r
501 UINT32 CPUInterfaceNumber;\r
502 UINT32 AcpiProcessorUid;\r
503 UINT32 Flags;\r
504 UINT32 ParkingProtocolVersion;\r
505 UINT32 PerformanceInterruptGsiv;\r
506 UINT64 ParkedAddress;\r
507 UINT64 PhysicalBaseAddress;\r
508 UINT64 GICV;\r
509 UINT64 GICH;\r
510 UINT32 VGICMaintenanceInterrupt;\r
511 UINT64 GICRBaseAddress;\r
512 UINT64 MPIDR;\r
513} EFI_ACPI_5_1_GIC_STRUCTURE;\r
514\r
515///\r
516/// GIC Flags. All other bits are reserved and must be 0.\r
517///\r
518#define EFI_ACPI_5_1_GIC_ENABLED BIT0\r
519#define EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL BIT1\r
520#define EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
521\r
522///\r
523/// GIC Distributor Structure\r
524///\r
525typedef struct {\r
526 UINT8 Type;\r
527 UINT8 Length;\r
528 UINT16 Reserved1;\r
529 UINT32 GicId;\r
530 UINT64 PhysicalBaseAddress;\r
531 UINT32 SystemVectorBase;\r
532 UINT32 Reserved2;\r
533} EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE;\r
534\r
535///\r
536/// GIC MSI Frame Structure\r
537///\r
538typedef struct {\r
539 UINT8 Type;\r
540 UINT8 Length;\r
541 UINT16 Reserved1;\r
542 UINT32 GicMsiFrameId;\r
543 UINT64 PhysicalBaseAddress;\r
544 UINT32 Flags;\r
545 UINT16 SPICount;\r
546 UINT16 SPIBase;\r
547} EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE;\r
548\r
549///\r
550/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
551///\r
552#define EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT BIT0\r
553\r
554///\r
555/// GICR Structure\r
556///\r
557typedef struct {\r
558 UINT8 Type;\r
559 UINT8 Length;\r
560 UINT16 Reserved;\r
561 UINT64 DiscoveryRangeBaseAddress;\r
562 UINT32 DiscoveryRangeLength;\r
563} EFI_ACPI_5_1_GICR_STRUCTURE;\r
564\r
565///\r
566/// Smart Battery Description Table (SBST)\r
567///\r
568typedef struct {\r
569 EFI_ACPI_DESCRIPTION_HEADER Header;\r
570 UINT32 WarningEnergyLevel;\r
571 UINT32 LowEnergyLevel;\r
572 UINT32 CriticalEnergyLevel;\r
573} EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE;\r
574\r
575///\r
576/// SBST Version (as defined in ACPI 5.1 spec.)\r
577///\r
578#define EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
579\r
580///\r
581/// Embedded Controller Boot Resources Table (ECDT)\r
582/// The table is followed by a null terminated ASCII string that contains\r
583/// a fully qualified reference to the name space object.\r
584///\r
585typedef struct {\r
586 EFI_ACPI_DESCRIPTION_HEADER Header;\r
587 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl;\r
588 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData;\r
589 UINT32 Uid;\r
590 UINT8 GpeBit;\r
591} EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
592\r
593///\r
594/// ECDT Version (as defined in ACPI 5.1 spec.)\r
595///\r
596#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
597\r
598///\r
599/// System Resource Affinity Table (SRAT). The rest of the table\r
600/// must be defined in a platform specific manner.\r
601///\r
602typedef struct {\r
603 EFI_ACPI_DESCRIPTION_HEADER Header;\r
604 UINT32 Reserved1; ///< Must be set to 1\r
605 UINT64 Reserved2;\r
606} EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
607\r
608///\r
609/// SRAT Version (as defined in ACPI 5.1 spec.)\r
610///\r
611#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
612\r
613//\r
614// SRAT structure types.\r
48a42a1c 615// All other values between 0x04 an 0xFF are reserved and\r
f449affe
JY		 616// will be ignored by OSPM.\r
617//\r
618#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
619#define EFI_ACPI_5_1_MEMORY_AFFINITY 0x01\r
620#define EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
48a42a1c 621#define EFI_ACPI_5_1_GICC_AFFINITY 0x03\r
f449affe
JY		 622\r
623///\r
624/// Processor Local APIC/SAPIC Affinity Structure Definition\r
625///\r
626typedef struct {\r
627 UINT8 Type;\r
628 UINT8 Length;\r
629 UINT8 ProximityDomain7To0;\r
630 UINT8 ApicId;\r
631 UINT32 Flags;\r
632 UINT8 LocalSapicEid;\r
633 UINT8 ProximityDomain31To8[3];\r
634 UINT32 ClockDomain;\r
635} EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
636\r
637///\r
638/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
639///\r
640#define EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
641\r
642///\r
643/// Memory Affinity Structure Definition\r
644///\r
645typedef struct {\r
646 UINT8 Type;\r
647 UINT8 Length;\r
648 UINT32 ProximityDomain;\r
649 UINT16 Reserved1;\r
650 UINT32 AddressBaseLow;\r
651 UINT32 AddressBaseHigh;\r
652 UINT32 LengthLow;\r
653 UINT32 LengthHigh;\r
654 UINT32 Reserved2;\r
655 UINT32 Flags;\r
656 UINT64 Reserved3;\r
657} EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE;\r
658\r
659//\r
660// Memory Flags. All other bits are reserved and must be 0.\r
661//\r
662#define EFI_ACPI_5_1_MEMORY_ENABLED (1 << 0)\r
663#define EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE (1 << 1)\r
664#define EFI_ACPI_5_1_MEMORY_NONVOLATILE (1 << 2)\r
665\r
666///\r
667/// Processor Local x2APIC Affinity Structure Definition\r
668///\r
669typedef struct {\r
670 UINT8 Type;\r
671 UINT8 Length;\r
672 UINT8 Reserved1[2];\r
673 UINT32 ProximityDomain;\r
674 UINT32 X2ApicId;\r
675 UINT32 Flags;\r
676 UINT32 ClockDomain;\r
677 UINT8 Reserved2[4];\r
678} EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
679\r
48a42a1c
JY		 680///\r
681/// GICC Affinity Structure Definition\r
682///\r
683typedef struct {\r
684 UINT8 Type;\r
685 UINT8 Length;\r
686 UINT32 ProximityDomain;\r
687 UINT32 AcpiProcessorUid;\r
688 UINT32 Flags;\r
689 UINT32 ClockDomain;\r
690} EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE;\r
691\r
692///\r
693/// GICC Flags. All other bits are reserved and must be 0.\r
694///\r
695#define EFI_ACPI_5_1_GICC_ENABLED (1 << 0)\r
696\r
f449affe
JY		 697///\r
698/// System Locality Distance Information Table (SLIT).\r
699/// The rest of the table is a matrix.\r
700///\r
701typedef struct {\r
702 EFI_ACPI_DESCRIPTION_HEADER Header;\r
703 UINT64 NumberOfSystemLocalities;\r
704} EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
705\r
706///\r
707/// SLIT Version (as defined in ACPI 5.1 spec.)\r
708///\r
709#define EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
710\r
711///\r
712/// Corrected Platform Error Polling Table (CPEP)\r
713///\r
714typedef struct {\r
715 EFI_ACPI_DESCRIPTION_HEADER Header;\r
716 UINT8 Reserved[8];\r
717} EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
718\r
719///\r
720/// CPEP Version (as defined in ACPI 5.1 spec.)\r
721///\r
722#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
723\r
724//\r
725// CPEP processor structure types.\r
726//\r
727#define EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
728\r
729///\r
730/// Corrected Platform Error Polling Processor Structure Definition\r
731///\r
732typedef struct {\r
733 UINT8 Type;\r
734 UINT8 Length;\r
735 UINT8 ProcessorId;\r
736 UINT8 ProcessorEid;\r
737 UINT32 PollingInterval;\r
738} EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
739\r
740///\r
741/// Maximum System Characteristics Table (MSCT)\r
742///\r
743typedef struct {\r
744 EFI_ACPI_DESCRIPTION_HEADER Header;\r
745 UINT32 OffsetProxDomInfo;\r
746 UINT32 MaximumNumberOfProximityDomains;\r
747 UINT32 MaximumNumberOfClockDomains;\r
748 UINT64 MaximumPhysicalAddress;\r
749} EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
750\r
751///\r
752/// MSCT Version (as defined in ACPI 5.1 spec.)\r
753///\r
754#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
755\r
756///\r
757/// Maximum Proximity Domain Information Structure Definition\r
758///\r
759typedef struct {\r
760 UINT8 Revision;\r
761 UINT8 Length;\r
762 UINT32 ProximityDomainRangeLow;\r
763 UINT32 ProximityDomainRangeHigh;\r
764 UINT32 MaximumProcessorCapacity;\r
765 UINT64 MaximumMemoryCapacity;\r
766} EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
767\r
768///\r
769/// ACPI RAS Feature Table definition.\r
770///\r
771typedef struct {\r
772 EFI_ACPI_DESCRIPTION_HEADER Header;\r
773 UINT8 PlatformCommunicationChannelIdentifier[12];\r
774} EFI_ACPI_5_1_RAS_FEATURE_TABLE;\r
775\r
776///\r
777/// RASF Version (as defined in ACPI 5.1 spec.)\r
778///\r
779#define EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION 0x01\r
780\r
781///\r
782/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
783///\r
784typedef struct {\r
785 UINT32 Signature;\r
786 UINT16 Command;\r
787 UINT16 Status;\r
788 UINT16 Version;\r
789 UINT8 RASCapabilities[16];\r
790 UINT8 SetRASCapabilities[16];\r
791 UINT16 NumberOfRASFParameterBlocks;\r
792 UINT32 SetRASCapabilitiesStatus;\r
793} EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
794\r
795///\r
796/// ACPI RASF PCC command code\r
797///\r
798#define EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
799\r
800///\r
801/// ACPI RASF Platform RAS Capabilities\r
802///\r
803#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
804#define EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
805\r
806///\r
807/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
808///\r
809typedef struct {\r
810 UINT16 Type;\r
811 UINT16 Version;\r
812 UINT16 Length;\r
813 UINT16 PatrolScrubCommand;\r
814 UINT64 RequestedAddressRange[2];\r
815 UINT64 ActualAddressRange[2];\r
816 UINT16 Flags;\r
817 UINT8 RequestedSpeed;\r
818} EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
819\r
820///\r
821/// ACPI RASF Patrol Scrub command\r
822///\r
823#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
824#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
825#define EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
826\r
827///\r
828/// Memory Power State Table definition.\r
829///\r
830typedef struct {\r
831 EFI_ACPI_DESCRIPTION_HEADER Header;\r
832 UINT8 PlatformCommunicationChannelIdentifier;\r
833 UINT8 Reserved[3];\r
834// Memory Power Node Structure\r
835// Memory Power State Characteristics\r
836} EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE;\r
837\r
838///\r
839/// MPST Version (as defined in ACPI 5.1 spec.)\r
840///\r
841#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
842\r
843///\r
844/// MPST Platform Communication Channel Shared Memory Region definition.\r
845///\r
846typedef struct {\r
847 UINT32 Signature;\r
848 UINT16 Command;\r
849 UINT16 Status;\r
850 UINT32 MemoryPowerCommandRegister;\r
851 UINT32 MemoryPowerStatusRegister;\r
852 UINT32 PowerStateId;\r
853 UINT32 MemoryPowerNodeId;\r
854 UINT64 MemoryEnergyConsumed;\r
855 UINT64 ExpectedAveragePowerComsuned;\r
856} EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
857\r
858///\r
859/// ACPI MPST PCC command code\r
860///\r
861#define EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
862\r
863///\r
864/// ACPI MPST Memory Power command\r
865///\r
866#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
867#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
868#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
869#define EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
870\r
871///\r
872/// MPST Memory Power Node Table\r
873///\r
874typedef struct {\r
875 UINT8 PowerStateValue;\r
876 UINT8 PowerStateInformationIndex;\r
877} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE;\r
878\r
879typedef struct {\r
880 UINT8 Flag;\r
881 UINT8 Reserved;\r
882 UINT16 MemoryPowerNodeId;\r
883 UINT32 Length;\r
884 UINT64 AddressBase;\r
885 UINT64 AddressLength;\r
886 UINT32 NumberOfPowerStates;\r
887 UINT32 NumberOfPhysicalComponents;\r
888//EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
889//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
890} EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE;\r
891\r
892#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
893#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
894#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
895\r
896typedef struct {\r
897 UINT16 MemoryPowerNodeCount;\r
898 UINT8 Reserved[2];\r
899} EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE;\r
900\r
901///\r
902/// MPST Memory Power State Characteristics Table\r
903///\r
904typedef struct {\r
905 UINT8 PowerStateStructureID;\r
906 UINT8 Flag;\r
907 UINT16 Reserved;\r
908 UINT32 AveragePowerConsumedInMPS0;\r
909 UINT32 RelativePowerSavingToMPS0;\r
910 UINT64 ExitLatencyToMPS0;\r
911} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
912\r
913#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
914#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
915#define EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
916\r
917typedef struct {\r
918 UINT16 MemoryPowerStateCharacteristicsCount;\r
919 UINT8 Reserved[2];\r
920} EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
921\r
922///\r
923/// Memory Topology Table definition.\r
924///\r
925typedef struct {\r
926 EFI_ACPI_DESCRIPTION_HEADER Header;\r
927 UINT32 Reserved;\r
928} EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE;\r
929\r
930///\r
931/// PMTT Version (as defined in ACPI 5.1 spec.)\r
932///\r
933#define EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
934\r
935///\r
936/// Common Memory Aggregator Device Structure.\r
937///\r
938typedef struct {\r
939 UINT8 Type;\r
940 UINT8 Reserved;\r
941 UINT16 Length;\r
942 UINT16 Flags;\r
943 UINT16 Reserved1;\r
944} EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
945\r
946///\r
947/// Memory Aggregator Device Type\r
948///\r
949#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x1\r
950#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
951#define EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x3\r
952\r
953///\r
954/// Socket Memory Aggregator Device Structure.\r
955///\r
956typedef struct {\r
957 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
958 UINT16 SocketIdentifier;\r
959 UINT16 Reserved;\r
960//EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
961} EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
962\r
963///\r
964/// MemoryController Memory Aggregator Device Structure.\r
965///\r
966typedef struct {\r
967 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
968 UINT32 ReadLatency;\r
969 UINT32 WriteLatency;\r
970 UINT32 ReadBandwidth;\r
971 UINT32 WriteBandwidth;\r
972 UINT16 OptimalAccessUnit;\r
973 UINT16 OptimalAccessAlignment;\r
974 UINT16 Reserved;\r
975 UINT16 NumberOfProximityDomains;\r
976//UINT32 ProximityDomain[NumberOfProximityDomains];\r
977//EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
978} EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
979\r
980///\r
981/// DIMM Memory Aggregator Device Structure.\r
982///\r
983typedef struct {\r
984 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
985 UINT16 PhysicalComponentIdentifier;\r
986 UINT16 Reserved;\r
987 UINT32 SizeOfDimm;\r
988 UINT32 SmbiosHandle;\r
989} EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
990\r
991///\r
992/// Boot Graphics Resource Table definition.\r
993///\r
994typedef struct {\r
995 EFI_ACPI_DESCRIPTION_HEADER Header;\r
996 ///\r
997 /// 2-bytes (16 bit) version ID. This value must be 1.\r
998 ///\r
999 UINT16 Version;\r
1000 ///\r
1001 /// 1-byte status field indicating current status about the table.\r
1002 /// Bits[7:1] = Reserved (must be zero)\r
1003 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1004 ///\r
1005 UINT8 Status;\r
1006 ///\r
1007 /// 1-byte enumerated type field indicating format of the image.\r
1008 /// 0 = Bitmap\r
1009 /// 1 - 255 Reserved (for future use)\r
1010 ///\r
1011 UINT8 ImageType;\r
1012 ///\r
1013 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1014 /// of the image bitmap.\r
1015 ///\r
1016 UINT64 ImageAddress;\r
1017 ///\r
1018 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1019 /// (X, Y) display offset of the top left corner of the boot image.\r
1020 /// The top left corner of the display is at offset (0, 0).\r
1021 ///\r
1022 UINT32 ImageOffsetX;\r
1023 ///\r
1024 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1025 /// (X, Y) display offset of the top left corner of the boot image.\r
1026 /// The top left corner of the display is at offset (0, 0).\r
1027 ///\r
1028 UINT32 ImageOffsetY;\r
1029} EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1030\r
1031///\r
1032/// BGRT Revision\r
1033///\r
1034#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1035\r
1036///\r
1037/// BGRT Version\r
1038///\r
1039#define EFI_ACPI_5_1_BGRT_VERSION 0x01\r
1040\r
1041///\r
1042/// BGRT Status\r
1043///\r
1044#define EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1045#define EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED 0x01\r
1046\r
1047///\r
1048/// BGRT Image Type\r
1049///\r
1050#define EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP 0x00\r
1051\r
1052///\r
1053/// FPDT Version (as defined in ACPI 5.1 spec.)\r
1054///\r
1055#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1056\r
1057///\r
1058/// FPDT Performance Record Types\r
1059///\r
1060#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1061#define EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1062\r
1063///\r
1064/// FPDT Performance Record Revision\r
1065///\r
1066#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1067#define EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1068\r
1069///\r
1070/// FPDT Runtime Performance Record Types\r
1071///\r
1072#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1073#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1074#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1075\r
1076///\r
1077/// FPDT Runtime Performance Record Revision\r
1078///\r
1079#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1080#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1081#define EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1082\r
1083///\r
1084/// FPDT Performance Record header\r
1085///\r
1086typedef struct {\r
1087 UINT16 Type;\r
1088 UINT8 Length;\r
1089 UINT8 Revision;\r
1090} EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER;\r
1091\r
1092///\r
1093/// FPDT Performance Table header\r
1094///\r
1095typedef struct {\r
1096 UINT32 Signature;\r
1097 UINT32 Length;\r
1098} EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER;\r
1099\r
1100///\r
1101/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1102///\r
1103typedef struct {\r
1104 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1105 UINT32 Reserved;\r
1106 ///\r
1107 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1108 ///\r
1109 UINT64 BootPerformanceTablePointer;\r
1110} EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1111\r
1112///\r
1113/// FPDT S3 Performance Table Pointer Record Structure\r
1114///\r
1115typedef struct {\r
1116 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1117 UINT32 Reserved;\r
1118 ///\r
1119 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1120 ///\r
1121 UINT64 S3PerformanceTablePointer;\r
1122} EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1123\r
1124///\r
1125/// FPDT Firmware Basic Boot Performance Record Structure\r
1126///\r
1127typedef struct {\r
1128 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1129 UINT32 Reserved;\r
1130 ///\r
1131 /// Timer value logged at the beginning of firmware image execution.\r
1132 /// This may not always be zero or near zero.\r
1133 ///\r
1134 UINT64 ResetEnd;\r
1135 ///\r
1136 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1137 /// For non-UEFI compatible boots, this field must be zero.\r
1138 ///\r
1139 UINT64 OsLoaderLoadImageStart;\r
1140 ///\r
1141 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1142 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1143 /// to the INT 19h handler invocation.\r
1144 ///\r
1145 UINT64 OsLoaderStartImageStart;\r
1146 ///\r
1147 /// Timer value logged at the point when the OS loader calls the\r
1148 /// ExitBootServices function for UEFI compatible firmware.\r
1149 /// For non-UEFI compatible boots, this field must be zero.\r
1150 ///\r
1151 UINT64 ExitBootServicesEntry;\r
1152 ///\r
1153 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1154 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1155 /// For non-UEFI compatible boots, this field must be zero.\r
1156 ///\r
1157 UINT64 ExitBootServicesExit;\r
1158} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1159\r
1160///\r
1161/// FPDT Firmware Basic Boot Performance Table signature\r
1162///\r
1163#define EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1164\r
1165//\r
1166// FPDT Firmware Basic Boot Performance Table\r
1167//\r
1168typedef struct {\r
1169 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1170 //\r
1171 // one or more Performance Records.\r
1172 //\r
1173} EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1174\r
1175///\r
1176/// FPDT "S3PT" S3 Performance Table\r
1177///\r
1178#define EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1179\r
1180//\r
1181// FPDT Firmware S3 Boot Performance Table\r
1182//\r
1183typedef struct {\r
1184 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1185 //\r
1186 // one or more Performance Records.\r
1187 //\r
1188} EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1189\r
1190///\r
1191/// FPDT Basic S3 Resume Performance Record\r
1192///\r
1193typedef struct {\r
1194 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1195 ///\r
1196 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1197 ///\r
1198 UINT32 ResumeCount;\r
1199 ///\r
1200 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1201 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1202 ///\r
1203 UINT64 FullResume;\r
1204 ///\r
1205 /// Average timer value of all resume cycles logged since the last full boot\r
1206 /// sequence, including the most recent resume. Note that the entire log of\r
1207 /// timer values does not need to be retained in order to calculate this average.\r
1208 ///\r
1209 UINT64 AverageResume;\r
1210} EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD;\r
1211\r
1212///\r
1213/// FPDT Basic S3 Suspend Performance Record\r
1214///\r
1215typedef struct {\r
1216 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1217 ///\r
1218 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1219 /// Only the most recent suspend cycle's timer value is retained.\r
1220 ///\r
1221 UINT64 SuspendStart;\r
1222 ///\r
1223 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1224 /// mechanism) used to trigger hardware entry to S3.\r
1225 /// Only the most recent suspend cycle's timer value is retained.\r
1226 ///\r
1227 UINT64 SuspendEnd;\r
1228} EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD;\r
1229\r
1230///\r
1231/// Firmware Performance Record Table definition.\r
1232///\r
1233typedef struct {\r
1234 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1235} EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1236\r
1237///\r
1238/// Generic Timer Description Table definition.\r
1239///\r
1240typedef struct {\r
1241 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1242 UINT64 CntControlBasePhysicalAddress;\r
1243 UINT32 Reserved;\r
1244 UINT32 SecurePL1TimerGSIV;\r
1245 UINT32 SecurePL1TimerFlags;\r
1246 UINT32 NonSecurePL1TimerGSIV;\r
1247 UINT32 NonSecurePL1TimerFlags;\r
1248 UINT32 VirtualTimerGSIV;\r
1249 UINT32 VirtualTimerFlags;\r
1250 UINT32 NonSecurePL2TimerGSIV;\r
1251 UINT32 NonSecurePL2TimerFlags;\r
1252 UINT64 CntReadBasePhysicalAddress;\r
1253 UINT32 PlatformTimerCount;\r
1254 UINT32 PlatformTimerOffset;\r
1255} EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1256\r
1257///\r
1258/// GTDT Version (as defined in ACPI 5.1 spec.)\r
1259///\r
1260#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x01\r
1261\r
1262///\r
1263/// Timer Flags. All other bits are reserved and must be 0.\r
1264///\r
1265#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1266#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1267#define EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1268\r
1269///\r
1270/// Platform Timer Type\r
1271///\r
1272#define EFI_ACPI_5_1_GTDT_GT_BLOCK 0\r
1273#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1274\r
1275///\r
1276/// GT Block Structure\r
1277///\r
1278typedef struct {\r
1279 UINT8 Type;\r
1280 UINT16 Length;\r
1281 UINT8 Reserved;\r
1282 UINT64 CntCtlBase;\r
1283 UINT32 GTBlockTimerCount;\r
1284 UINT32 GTBlockTimerOffset;\r
1285} EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE;\r
1286\r
1287///\r
1288/// GT Block Timer Structure\r
1289///\r
1290typedef struct {\r
1291 UINT8 GTFrameNumber;\r
1292 UINT8 Reserved[3];\r
1293 UINT64 CntBaseX;\r
1294 UINT64 CntEL0BaseX;\r
1295 UINT32 GTxPhysicalTimerGSIV;\r
1296 UINT32 GTxPhysicalTimerFlags;\r
1297 UINT32 GTxVirtualTimerGSIV;\r
1298 UINT32 GTxVirtualTimerFlags;\r
1299 UINT32 GTxCommonFlags;\r
1300} EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1301\r
1302///\r
1303/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1304///\r
1305#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1306#define EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1307\r
1308///\r
1309/// Common Flags Flags. All other bits are reserved and must be 0.\r
1310///\r
1311#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1312#define EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1313\r
1314///\r
1315/// SBSA Generic Watchdog Structure\r
1316///\r
1317typedef struct {\r
1318 UINT8 Type;\r
f7acc872
SZ		 1319 UINT16 Length;\r
1320 UINT8 Reserved;\r
f449affe
JY		 1321 UINT64 RefreshFramePhysicalAddress;\r
1322 UINT64 WatchdogControlFramePhysicalAddress;\r
1323 UINT32 WatchdogTimerGSIV;\r
1324 UINT32 WatchdogTimerFlags;\r
1325} EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1326\r
1327///\r
1328/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1329///\r
1330#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1331#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1332#define EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1333\r
1334///\r
1335/// Boot Error Record Table (BERT)\r
1336///\r
1337typedef struct {\r
1338 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1339 UINT32 BootErrorRegionLength;\r
1340 UINT64 BootErrorRegion;\r
1341} EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1342\r
1343///\r
1344/// BERT Version (as defined in ACPI 5.1 spec.)\r
1345///\r
1346#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1347\r
1348///\r
1349/// Boot Error Region Block Status Definition\r
1350///\r
1351typedef struct {\r
1352 UINT32 UncorrectableErrorValid:1;\r
1353 UINT32 CorrectableErrorValid:1;\r
1354 UINT32 MultipleUncorrectableErrors:1;\r
1355 UINT32 MultipleCorrectableErrors:1;\r
1356 UINT32 ErrorDataEntryCount:10;\r
1357 UINT32 Reserved:18;\r
1358} EFI_ACPI_5_1_ERROR_BLOCK_STATUS;\r
1359\r
1360///\r
1361/// Boot Error Region Definition\r
1362///\r
1363typedef struct {\r
1364 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1365 UINT32 RawDataOffset;\r
1366 UINT32 RawDataLength;\r
1367 UINT32 DataLength;\r
1368 UINT32 ErrorSeverity;\r
1369} EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE;\r
1370\r
1371//\r
1372// Boot Error Severity types\r
1373//\r
1374#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE 0x00\r
1375#define EFI_ACPI_5_1_ERROR_SEVERITY_FATAL 0x01\r
1376#define EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED 0x02\r
1377#define EFI_ACPI_5_1_ERROR_SEVERITY_NONE 0x03\r
1378\r
1379///\r
1380/// Generic Error Data Entry Definition\r
1381///\r
1382typedef struct {\r
1383 UINT8 SectionType[16];\r
1384 UINT32 ErrorSeverity;\r
1385 UINT16 Revision;\r
1386 UINT8 ValidationBits;\r
1387 UINT8 Flags;\r
1388 UINT32 ErrorDataLength;\r
1389 UINT8 FruId[16];\r
1390 UINT8 FruText[20];\r
1391} EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1392\r
1393///\r
1394/// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.)\r
1395///\r
1396#define EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0201\r
1397\r
1398///\r
1399/// HEST - Hardware Error Source Table\r
1400///\r
1401typedef struct {\r
1402 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1403 UINT32 ErrorSourceCount;\r
1404} EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1405\r
1406///\r
1407/// HEST Version (as defined in ACPI 5.1 spec.)\r
1408///\r
1409#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1410\r
1411//\r
1412// Error Source structure types.\r
1413//\r
1414#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1415#define EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1416#define EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1417#define EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1418#define EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER 0x07\r
1419#define EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER 0x08\r
1420#define EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR 0x09\r
1421\r
1422//\r
1423// Error Source structure flags.\r
1424//\r
1425#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1426#define EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1427\r
1428///\r
1429/// IA-32 Architecture Machine Check Exception Structure Definition\r
1430///\r
1431typedef struct {\r
1432 UINT16 Type;\r
1433 UINT16 SourceId;\r
1434 UINT8 Reserved0[2];\r
1435 UINT8 Flags;\r
1436 UINT8 Enabled;\r
1437 UINT32 NumberOfRecordsToPreAllocate;\r
1438 UINT32 MaxSectionsPerRecord;\r
1439 UINT64 GlobalCapabilityInitData;\r
1440 UINT64 GlobalControlInitData;\r
1441 UINT8 NumberOfHardwareBanks;\r
1442 UINT8 Reserved1[7];\r
1443} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1444\r
1445///\r
1446/// IA-32 Architecture Machine Check Bank Structure Definition\r
1447///\r
1448typedef struct {\r
1449 UINT8 BankNumber;\r
1450 UINT8 ClearStatusOnInitialization;\r
1451 UINT8 StatusDataFormat;\r
1452 UINT8 Reserved0;\r
1453 UINT32 ControlRegisterMsrAddress;\r
1454 UINT64 ControlInitData;\r
1455 UINT32 StatusRegisterMsrAddress;\r
1456 UINT32 AddressRegisterMsrAddress;\r
1457 UINT32 MiscRegisterMsrAddress;\r
1458} EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1459\r
1460///\r
1461/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1462///\r
1463#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1464#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1465#define EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1466\r
1467//\r
1468// Hardware Error Notification types. All other values are reserved\r
1469//\r
1470#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1471#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1472#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1473#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1474#define EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1475\r
1476///\r
1477/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1478///\r
1479typedef struct {\r
1480 UINT16 Type:1;\r
1481 UINT16 PollInterval:1;\r
1482 UINT16 SwitchToPollingThresholdValue:1;\r
1483 UINT16 SwitchToPollingThresholdWindow:1;\r
1484 UINT16 ErrorThresholdValue:1;\r
1485 UINT16 ErrorThresholdWindow:1;\r
1486 UINT16 Reserved:10;\r
1487} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1488\r
1489///\r
1490/// Hardware Error Notification Structure Definition\r
1491///\r
1492typedef struct {\r
1493 UINT8 Type;\r
1494 UINT8 Length;\r
1495 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1496 UINT32 PollInterval;\r
1497 UINT32 Vector;\r
1498 UINT32 SwitchToPollingThresholdValue;\r
1499 UINT32 SwitchToPollingThresholdWindow;\r
1500 UINT32 ErrorThresholdValue;\r
1501 UINT32 ErrorThresholdWindow;\r
1502} EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1503\r
1504///\r
1505/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1506///\r
1507typedef struct {\r
1508 UINT16 Type;\r
1509 UINT16 SourceId;\r
1510 UINT8 Reserved0[2];\r
1511 UINT8 Flags;\r
1512 UINT8 Enabled;\r
1513 UINT32 NumberOfRecordsToPreAllocate;\r
1514 UINT32 MaxSectionsPerRecord;\r
1515 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1516 UINT8 NumberOfHardwareBanks;\r
1517 UINT8 Reserved1[3];\r
1518} EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1519\r
1520///\r
1521/// IA-32 Architecture NMI Error Structure Definition\r
1522///\r
1523typedef struct {\r
1524 UINT16 Type;\r
1525 UINT16 SourceId;\r
1526 UINT8 Reserved0[2];\r
1527 UINT32 NumberOfRecordsToPreAllocate;\r
1528 UINT32 MaxSectionsPerRecord;\r
1529 UINT32 MaxRawDataLength;\r
1530} EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1531\r
1532///\r
1533/// PCI Express Root Port AER Structure Definition\r
1534///\r
1535typedef struct {\r
1536 UINT16 Type;\r
1537 UINT16 SourceId;\r
1538 UINT8 Reserved0[2];\r
1539 UINT8 Flags;\r
1540 UINT8 Enabled;\r
1541 UINT32 NumberOfRecordsToPreAllocate;\r
1542 UINT32 MaxSectionsPerRecord;\r
1543 UINT32 Bus;\r
1544 UINT16 Device;\r
1545 UINT16 Function;\r
1546 UINT16 DeviceControl;\r
1547 UINT8 Reserved1[2];\r
1548 UINT32 UncorrectableErrorMask;\r
1549 UINT32 UncorrectableErrorSeverity;\r
1550 UINT32 CorrectableErrorMask;\r
1551 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1552 UINT32 RootErrorCommand;\r
1553} EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1554\r
1555///\r
1556/// PCI Express Device AER Structure Definition\r
1557///\r
1558typedef struct {\r
1559 UINT16 Type;\r
1560 UINT16 SourceId;\r
1561 UINT8 Reserved0[2];\r
1562 UINT8 Flags;\r
1563 UINT8 Enabled;\r
1564 UINT32 NumberOfRecordsToPreAllocate;\r
1565 UINT32 MaxSectionsPerRecord;\r
1566 UINT32 Bus;\r
1567 UINT16 Device;\r
1568 UINT16 Function;\r
1569 UINT16 DeviceControl;\r
1570 UINT8 Reserved1[2];\r
1571 UINT32 UncorrectableErrorMask;\r
1572 UINT32 UncorrectableErrorSeverity;\r
1573 UINT32 CorrectableErrorMask;\r
1574 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1575} EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1576\r
1577///\r
1578/// PCI Express Bridge AER Structure Definition\r
1579///\r
1580typedef struct {\r
1581 UINT16 Type;\r
1582 UINT16 SourceId;\r
1583 UINT8 Reserved0[2];\r
1584 UINT8 Flags;\r
1585 UINT8 Enabled;\r
1586 UINT32 NumberOfRecordsToPreAllocate;\r
1587 UINT32 MaxSectionsPerRecord;\r
1588 UINT32 Bus;\r
1589 UINT16 Device;\r
1590 UINT16 Function;\r
1591 UINT16 DeviceControl;\r
1592 UINT8 Reserved1[2];\r
1593 UINT32 UncorrectableErrorMask;\r
1594 UINT32 UncorrectableErrorSeverity;\r
1595 UINT32 CorrectableErrorMask;\r
1596 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1597 UINT32 SecondaryUncorrectableErrorMask;\r
1598 UINT32 SecondaryUncorrectableErrorSeverity;\r
1599 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1600} EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1601\r
1602///\r
1603/// Generic Hardware Error Source Structure Definition\r
1604///\r
1605typedef struct {\r
1606 UINT16 Type;\r
1607 UINT16 SourceId;\r
1608 UINT16 RelatedSourceId;\r
1609 UINT8 Flags;\r
1610 UINT8 Enabled;\r
1611 UINT32 NumberOfRecordsToPreAllocate;\r
1612 UINT32 MaxSectionsPerRecord;\r
1613 UINT32 MaxRawDataLength;\r
1614 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1615 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1616 UINT32 ErrorStatusBlockLength;\r
1617} EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1618\r
1619///\r
1620/// Generic Error Status Definition\r
1621///\r
1622typedef struct {\r
1623 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus;\r
1624 UINT32 RawDataOffset;\r
1625 UINT32 RawDataLength;\r
1626 UINT32 DataLength;\r
1627 UINT32 ErrorSeverity;\r
1628} EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE;\r
1629\r
1630///\r
1631/// ERST - Error Record Serialization Table\r
1632///\r
1633typedef struct {\r
1634 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1635 UINT32 SerializationHeaderSize;\r
1636 UINT8 Reserved0[4];\r
1637 UINT32 InstructionEntryCount;\r
1638} EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1639\r
1640///\r
1641/// ERST Version (as defined in ACPI 5.1 spec.)\r
1642///\r
1643#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1644\r
1645///\r
1646/// ERST Serialization Actions\r
1647///\r
1648#define EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION 0x00\r
1649#define EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION 0x01\r
1650#define EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1651#define EFI_ACPI_5_1_ERST_END_OPERATION 0x03\r
1652#define EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET 0x04\r
1653#define EFI_ACPI_5_1_ERST_EXECUTE_OPERATION 0x05\r
1654#define EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS 0x06\r
1655#define EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS 0x07\r
1656#define EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER 0x08\r
1657#define EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER 0x09\r
1658#define EFI_ACPI_5_1_ERST_GET_RECORD_COUNT 0x0A\r
1659#define EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1660#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1661#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1662#define EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1663\r
1664///\r
1665/// ERST Action Command Status\r
1666///\r
1667#define EFI_ACPI_5_1_ERST_STATUS_SUCCESS 0x00\r
1668#define EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1669#define EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1670#define EFI_ACPI_5_1_ERST_STATUS_FAILED 0x03\r
1671#define EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1672#define EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1673\r
1674///\r
1675/// ERST Serialization Instructions\r
1676///\r
1677#define EFI_ACPI_5_1_ERST_READ_REGISTER 0x00\r
1678#define EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE 0x01\r
1679#define EFI_ACPI_5_1_ERST_WRITE_REGISTER 0x02\r
1680#define EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE 0x03\r
1681#define EFI_ACPI_5_1_ERST_NOOP 0x04\r
1682#define EFI_ACPI_5_1_ERST_LOAD_VAR1 0x05\r
1683#define EFI_ACPI_5_1_ERST_LOAD_VAR2 0x06\r
1684#define EFI_ACPI_5_1_ERST_STORE_VAR1 0x07\r
1685#define EFI_ACPI_5_1_ERST_ADD 0x08\r
1686#define EFI_ACPI_5_1_ERST_SUBTRACT 0x09\r
1687#define EFI_ACPI_5_1_ERST_ADD_VALUE 0x0A\r
1688#define EFI_ACPI_5_1_ERST_SUBTRACT_VALUE 0x0B\r
1689#define EFI_ACPI_5_1_ERST_STALL 0x0C\r
1690#define EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE 0x0D\r
1691#define EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1692#define EFI_ACPI_5_1_ERST_GOTO 0x0F\r
1693#define EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1694#define EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE 0x11\r
1695#define EFI_ACPI_5_1_ERST_MOVE_DATA 0x12\r
1696\r
1697///\r
1698/// ERST Instruction Flags\r
1699///\r
1700#define EFI_ACPI_5_1_ERST_PRESERVE_REGISTER 0x01\r
1701\r
1702///\r
1703/// ERST Serialization Instruction Entry\r
1704///\r
1705typedef struct {\r
1706 UINT8 SerializationAction;\r
1707 UINT8 Instruction;\r
1708 UINT8 Flags;\r
1709 UINT8 Reserved0;\r
1710 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1711 UINT64 Value;\r
1712 UINT64 Mask;\r
1713} EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1714\r
1715///\r
1716/// EINJ - Error Injection Table\r
1717///\r
1718typedef struct {\r
1719 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1720 UINT32 InjectionHeaderSize;\r
1721 UINT8 InjectionFlags;\r
1722 UINT8 Reserved0[3];\r
1723 UINT32 InjectionEntryCount;\r
1724} EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER;\r
1725\r
1726///\r
1727/// EINJ Version (as defined in ACPI 5.1 spec.)\r
1728///\r
1729#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION 0x01\r
1730\r
1731///\r
1732/// EINJ Error Injection Actions\r
1733///\r
1734#define EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1735#define EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1736#define EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE 0x02\r
1737#define EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE 0x03\r
1738#define EFI_ACPI_5_1_EINJ_END_OPERATION 0x04\r
1739#define EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION 0x05\r
1740#define EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS 0x06\r
1741#define EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS 0x07\r
1742#define EFI_ACPI_5_1_EINJ_TRIGGER_ERROR 0xFF\r
1743\r
1744///\r
1745/// EINJ Action Command Status\r
1746///\r
1747#define EFI_ACPI_5_1_EINJ_STATUS_SUCCESS 0x00\r
1748#define EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1749#define EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS 0x02\r
1750\r
1751///\r
1752/// EINJ Error Type Definition\r
1753///\r
1754#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1755#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1756#define EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1757#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1758#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1759#define EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1760#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1761#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1762#define EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1763#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1764#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1765#define EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1766\r
1767///\r
1768/// EINJ Injection Instructions\r
1769///\r
1770#define EFI_ACPI_5_1_EINJ_READ_REGISTER 0x00\r
1771#define EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE 0x01\r
1772#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER 0x02\r
1773#define EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE 0x03\r
1774#define EFI_ACPI_5_1_EINJ_NOOP 0x04\r
1775\r
1776///\r
1777/// EINJ Instruction Flags\r
1778///\r
1779#define EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER 0x01\r
1780\r
1781///\r
1782/// EINJ Injection Instruction Entry\r
1783///\r
1784typedef struct {\r
1785 UINT8 InjectionAction;\r
1786 UINT8 Instruction;\r
1787 UINT8 Flags;\r
1788 UINT8 Reserved0;\r
1789 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1790 UINT64 Value;\r
1791 UINT64 Mask;\r
1792} EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
1793\r
1794///\r
1795/// EINJ Trigger Action Table\r
1796///\r
1797typedef struct {\r
1798 UINT32 HeaderSize;\r
1799 UINT32 Revision;\r
1800 UINT32 TableSize;\r
1801 UINT32 EntryCount;\r
1802} EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE;\r
1803\r
1804///\r
1805/// Platform Communications Channel Table (PCCT)\r
1806///\r
1807typedef struct {\r
1808 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1809 UINT32 Flags;\r
1810 UINT64 Reserved;\r
1811} EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
1812\r
1813///\r
1814/// PCCT Version (as defined in ACPI 5.1 spec.)\r
1815///\r
1816#define EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
1817\r
1818///\r
1819/// PCCT Global Flags\r
1820///\r
1821#define EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL BIT0\r
1822\r
1823//\r
1824// PCCT Subspace type\r
1825//\r
1826#define EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
1827\r
1828///\r
1829/// PCC Subspace Structure Header\r
1830///\r
1831typedef struct {\r
1832 UINT8 Type;\r
1833 UINT8 Length;\r
1834} EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER;\r
1835\r
1836///\r
1837/// Generic Communications Subspace Structure\r
1838///\r
1839typedef struct {\r
1840 UINT8 Type;\r
1841 UINT8 Length;\r
1842 UINT8 Reserved[6];\r
1843 UINT64 BaseAddress;\r
1844 UINT64 AddressLength;\r
1845 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
1846 UINT64 DoorbellPreserve;\r
1847 UINT64 DoorbellWrite;\r
1848 UINT32 NominalLatency;\r
1849 UINT32 MaximumPeriodicAccessRate;\r
1850 UINT16 MinimumRequestTurnaroundTime;\r
1851} EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC;\r
1852\r
1853///\r
1854/// Generic Communications Channel Shared Memory Region\r
1855///\r
1856\r
1857typedef struct {\r
1858 UINT8 Command;\r
1859 UINT8 Reserved:7;\r
1860 UINT8 GenerateSci:1;\r
1861} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
1862\r
1863typedef struct {\r
1864 UINT8 CommandComplete:1;\r
1865 UINT8 SciDoorbell:1;\r
1866 UINT8 Error:1;\r
a71c80b6
SEHM		 1867 UINT8 PlatformNotification:1; \r
1868 UINT8 Reserved:4;\r
f449affe
JY		 1869 UINT8 Reserved1;\r
1870} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
1871\r
1872typedef struct {\r
1873 UINT32 Signature;\r
1874 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
1875 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
1876} EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
1877\r
1878//\r
1879// Known table signatures\r
1880//\r
1881\r
1882///\r
1883/// "RSD PTR " Root System Description Pointer\r
1884///\r
1885#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ') \r
1886\r
1887///\r
1888/// "APIC" Multiple APIC Description Table\r
1889///\r
1890#define EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
1891\r
1892///\r
1893/// "BERT" Boot Error Record Table\r
1894///\r
1895#define EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
1896\r
1897///\r
1898/// "BGRT" Boot Graphics Resource Table\r
1899///\r
1900#define EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
1901\r
1902///\r
1903/// "CPEP" Corrected Platform Error Polling Table\r
1904///\r
1905#define EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
1906\r
1907///\r
1908/// "DSDT" Differentiated System Description Table\r
1909///\r
1910#define EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
1911\r
1912///\r
1913/// "ECDT" Embedded Controller Boot Resources Table\r
1914///\r
1915#define EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
1916\r
1917///\r
1918/// "EINJ" Error Injection Table\r
1919///\r
1920#define EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
1921\r
1922///\r
1923/// "ERST" Error Record Serialization Table\r
1924///\r
1925#define EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
1926\r
1927///\r
1928/// "FACP" Fixed ACPI Description Table\r
1929///\r
1930#define EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
1931\r
1932///\r
1933/// "FACS" Firmware ACPI Control Structure\r
1934///\r
1935#define EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
1936\r
1937///\r
1938/// "FPDT" Firmware Performance Data Table\r
1939///\r
1940#define EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
1941\r
1942///\r
1943/// "GTDT" Generic Timer Description Table\r
1944///\r
1945#define EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
1946\r
1947///\r
1948/// "HEST" Hardware Error Source Table\r
1949///\r
1950#define EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
1951\r
1952///\r
1953/// "MPST" Memory Power State Table\r
1954///\r
1955#define EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
1956\r
1957///\r
1958/// "MSCT" Maximum System Characteristics Table\r
1959///\r
1960#define EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
1961\r
1962///\r
1963/// "PMTT" Platform Memory Topology Table\r
1964///\r
1965#define EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
1966\r
1967///\r
1968/// "PSDT" Persistent System Description Table\r
1969///\r
1970#define EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
1971\r
1972///\r
1973/// "RASF" ACPI RAS Feature Table\r
1974///\r
1975#define EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
1976\r
1977///\r
1978/// "RSDT" Root System Description Table\r
1979///\r
1980#define EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
1981\r
1982///\r
1983/// "SBST" Smart Battery Specification Table\r
1984///\r
1985#define EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
1986\r
1987///\r
1988/// "SLIT" System Locality Information Table\r
1989///\r
1990#define EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
1991\r
1992///\r
1993/// "SRAT" System Resource Affinity Table\r
1994///\r
1995#define EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
1996\r
1997///\r
1998/// "SSDT" Secondary System Description Table\r
1999///\r
2000#define EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2001\r
2002///\r
2003/// "XSDT" Extended System Description Table\r
2004///\r
2005#define EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2006\r
2007///\r
2008/// "BOOT" MS Simple Boot Spec\r
2009///\r
2010#define EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2011\r
2012///\r
2013/// "CSRT" MS Core System Resource Table\r
2014///\r
2015#define EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2016\r
2017///\r
2018/// "DBG2" MS Debug Port 2 Spec\r
2019///\r
2020#define EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2021\r
2022///\r
2023/// "DBGP" MS Debug Port Spec\r
2024///\r
2025#define EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2026\r
2027///\r
2028/// "DMAR" DMA Remapping Table\r
2029///\r
2030#define EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2031\r
2032///\r
2033/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2034///\r
2035#define EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2036\r
2037///\r
2038/// "ETDT" Event Timer Description Table\r
2039///\r
2040#define EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2041\r
2042///\r
2043/// "HPET" IA-PC High Precision Event Timer Table\r
2044///\r
2045#define EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2046\r
2047///\r
2048/// "iBFT" iSCSI Boot Firmware Table\r
2049///\r
2050#define EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2051\r
2052///\r
2053/// "IVRS" I/O Virtualization Reporting Structure\r
2054///\r
2055#define EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2056\r
2057///\r
2058/// "LPIT" Low Power Idle Table\r
2059///\r
2060#define EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2061\r
2062///\r
2063/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2064///\r
2065#define EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2066\r
2067///\r
2068/// "MCHI" Management Controller Host Interface Table\r
2069///\r
2070#define EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2071\r
2072///\r
2073/// "MSDM" MS Data Management Table\r
2074///\r
2075#define EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2076\r
2077///\r
2078/// "SLIC" MS Software Licensing Table Specification\r
2079///\r
2080#define EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2081\r
2082///\r
2083/// "SPCR" Serial Port Concole Redirection Table\r
2084///\r
2085#define EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2086\r
2087///\r
2088/// "SPMI" Server Platform Management Interface Table\r
2089///\r
2090#define EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2091\r
2092///\r
2093/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2094///\r
2095#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2096\r
2097///\r
2098/// "TPM2" Trusted Computing Platform 1 Table\r
2099///\r
2100#define EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2101\r
2102///\r
2103/// "UEFI" UEFI ACPI Data Table\r
2104///\r
2105#define EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2106\r
2107///\r
2108/// "WAET" Windows ACPI Emulated Devices Table\r
2109///\r
2110#define EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2111\r
2112///\r
2113/// "WDAT" Watchdog Action Table\r
2114///\r
2115#define EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2116\r
2117///\r
2118/// "WDRT" Watchdog Resource Table\r
2119///\r
2120#define EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2121\r
2122///\r
2123/// "WPBT" MS Platform Binary Table\r
2124///\r
2125#define EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2126\r
2127#pragma pack()\r
2128\r
2129#endif\r
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