]> git.proxmox.com Git - mirror_edk2.git/blame - MdePkg/Include/IndustryStandard/Acpi61.h
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
MdePkg: Fix ACPI memory aggregator/device type mismatch
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi61.h
CommitLineData
9095d37b 1/** @file\r
f2e4f2fc
JY		 2 ACPI 6.1 definitions from the ACPI Specification Revision 6.1 January, 2016.\r
3\r
9095d37b 4 Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
71a2a892 5 (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
a67efa3b 6 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>\r
9344f092 7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
f2e4f2fc
JY		 8**/\r
9\r
10#ifndef _ACPI_6_1_H_\r
11#define _ACPI_6_1_H_\r
12\r
13#include <IndustryStandard/Acpi60.h>\r
14\r
15//\r
16// Ensure proper structure formats\r
17//\r
18#pragma pack(1)\r
19\r
20///\r
21/// ACPI 6.1 Generic Address Space definition\r
22///\r
23typedef struct {\r
24 UINT8 AddressSpaceId;\r
25 UINT8 RegisterBitWidth;\r
26 UINT8 RegisterBitOffset;\r
27 UINT8 AccessSize;\r
28 UINT64 Address;\r
29} EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE;\r
30\r
31//\r
32// Generic Address Space Address IDs\r
33//\r
34#define EFI_ACPI_6_1_SYSTEM_MEMORY 0\r
35#define EFI_ACPI_6_1_SYSTEM_IO 1\r
36#define EFI_ACPI_6_1_PCI_CONFIGURATION_SPACE 2\r
37#define EFI_ACPI_6_1_EMBEDDED_CONTROLLER 3\r
38#define EFI_ACPI_6_1_SMBUS 4\r
39#define EFI_ACPI_6_1_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
40#define EFI_ACPI_6_1_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
41\r
42//\r
43// Generic Address Space Access Sizes\r
44//\r
45#define EFI_ACPI_6_1_UNDEFINED 0\r
46#define EFI_ACPI_6_1_BYTE 1\r
47#define EFI_ACPI_6_1_WORD 2\r
48#define EFI_ACPI_6_1_DWORD 3\r
49#define EFI_ACPI_6_1_QWORD 4\r
50\r
51//\r
52// ACPI 6.1 table structures\r
53//\r
54\r
55///\r
56/// Root System Description Pointer Structure\r
57///\r
58typedef struct {\r
59 UINT64 Signature;\r
60 UINT8 Checksum;\r
61 UINT8 OemId[6];\r
62 UINT8 Revision;\r
63 UINT32 RsdtAddress;\r
64 UINT32 Length;\r
65 UINT64 XsdtAddress;\r
66 UINT8 ExtendedChecksum;\r
67 UINT8 Reserved[3];\r
68} EFI_ACPI_6_1_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
69\r
70///\r
71/// RSD_PTR Revision (as defined in ACPI 6.1 spec.)\r
72///\r
73#define EFI_ACPI_6_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.1) says current value is 2\r
74\r
75///\r
76/// Common table header, this prefaces all ACPI tables, including FACS, but\r
77/// excluding the RSD PTR structure\r
78///\r
79typedef struct {\r
80 UINT32 Signature;\r
81 UINT32 Length;\r
82} EFI_ACPI_6_1_COMMON_HEADER;\r
83\r
84//\r
85// Root System Description Table\r
9095d37b 86// No definition needed as it is a common description table header, the same with\r
f2e4f2fc
JY		 87// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
88//\r
89\r
90///\r
91/// RSDT Revision (as defined in ACPI 6.1 spec.)\r
92///\r
93#define EFI_ACPI_6_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
94\r
95//\r
96// Extended System Description Table\r
9095d37b 97// No definition needed as it is a common description table header, the same with\r
f2e4f2fc
JY		 98// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
99//\r
100\r
101///\r
102/// XSDT Revision (as defined in ACPI 6.1 spec.)\r
103///\r
104#define EFI_ACPI_6_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
105\r
106///\r
107/// Fixed ACPI Description Table Structure (FADT)\r
108///\r
109typedef struct {\r
110 EFI_ACPI_DESCRIPTION_HEADER Header;\r
111 UINT32 FirmwareCtrl;\r
112 UINT32 Dsdt;\r
113 UINT8 Reserved0;\r
114 UINT8 PreferredPmProfile;\r
115 UINT16 SciInt;\r
116 UINT32 SmiCmd;\r
117 UINT8 AcpiEnable;\r
118 UINT8 AcpiDisable;\r
119 UINT8 S4BiosReq;\r
120 UINT8 PstateCnt;\r
121 UINT32 Pm1aEvtBlk;\r
122 UINT32 Pm1bEvtBlk;\r
123 UINT32 Pm1aCntBlk;\r
124 UINT32 Pm1bCntBlk;\r
125 UINT32 Pm2CntBlk;\r
126 UINT32 PmTmrBlk;\r
127 UINT32 Gpe0Blk;\r
128 UINT32 Gpe1Blk;\r
129 UINT8 Pm1EvtLen;\r
130 UINT8 Pm1CntLen;\r
131 UINT8 Pm2CntLen;\r
132 UINT8 PmTmrLen;\r
133 UINT8 Gpe0BlkLen;\r
134 UINT8 Gpe1BlkLen;\r
135 UINT8 Gpe1Base;\r
136 UINT8 CstCnt;\r
137 UINT16 PLvl2Lat;\r
138 UINT16 PLvl3Lat;\r
139 UINT16 FlushSize;\r
140 UINT16 FlushStride;\r
141 UINT8 DutyOffset;\r
142 UINT8 DutyWidth;\r
143 UINT8 DayAlrm;\r
144 UINT8 MonAlrm;\r
145 UINT8 Century;\r
146 UINT16 IaPcBootArch;\r
147 UINT8 Reserved1;\r
148 UINT32 Flags;\r
149 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
150 UINT8 ResetValue;\r
151 UINT16 ArmBootArch;\r
152 UINT8 MinorVersion;\r
153 UINT64 XFirmwareCtrl;\r
154 UINT64 XDsdt;\r
155 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
156 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
157 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
158 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
159 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
160 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
161 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
162 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
163 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
164 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
165 UINT64 HypervisorVendorIdentity;\r
166} EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE;\r
167\r
168///\r
169/// FADT Version (as defined in ACPI 6.1 spec.)\r
170///\r
171#define EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
172#define EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x01\r
173\r
174//\r
175// Fixed ACPI Description Table Preferred Power Management Profile\r
176//\r
177#define EFI_ACPI_6_1_PM_PROFILE_UNSPECIFIED 0\r
178#define EFI_ACPI_6_1_PM_PROFILE_DESKTOP 1\r
179#define EFI_ACPI_6_1_PM_PROFILE_MOBILE 2\r
180#define EFI_ACPI_6_1_PM_PROFILE_WORKSTATION 3\r
181#define EFI_ACPI_6_1_PM_PROFILE_ENTERPRISE_SERVER 4\r
182#define EFI_ACPI_6_1_PM_PROFILE_SOHO_SERVER 5\r
183#define EFI_ACPI_6_1_PM_PROFILE_APPLIANCE_PC 6\r
184#define EFI_ACPI_6_1_PM_PROFILE_PERFORMANCE_SERVER 7\r
185#define EFI_ACPI_6_1_PM_PROFILE_TABLET 8\r
186\r
187//\r
188// Fixed ACPI Description Table Boot Architecture Flags\r
189// All other bits are reserved and must be set to 0.\r
190//\r
191#define EFI_ACPI_6_1_LEGACY_DEVICES BIT0\r
192#define EFI_ACPI_6_1_8042 BIT1\r
193#define EFI_ACPI_6_1_VGA_NOT_PRESENT BIT2\r
194#define EFI_ACPI_6_1_MSI_NOT_SUPPORTED BIT3\r
195#define EFI_ACPI_6_1_PCIE_ASPM_CONTROLS BIT4\r
196#define EFI_ACPI_6_1_CMOS_RTC_NOT_PRESENT BIT5\r
197\r
198//\r
199// Fixed ACPI Description Table Arm Boot Architecture Flags\r
200// All other bits are reserved and must be set to 0.\r
201//\r
202#define EFI_ACPI_6_1_ARM_PSCI_COMPLIANT BIT0\r
203#define EFI_ACPI_6_1_ARM_PSCI_USE_HVC BIT1\r
204\r
205//\r
206// Fixed ACPI Description Table Fixed Feature Flags\r
207// All other bits are reserved and must be set to 0.\r
208//\r
209#define EFI_ACPI_6_1_WBINVD BIT0\r
210#define EFI_ACPI_6_1_WBINVD_FLUSH BIT1\r
211#define EFI_ACPI_6_1_PROC_C1 BIT2\r
212#define EFI_ACPI_6_1_P_LVL2_UP BIT3\r
213#define EFI_ACPI_6_1_PWR_BUTTON BIT4\r
214#define EFI_ACPI_6_1_SLP_BUTTON BIT5\r
215#define EFI_ACPI_6_1_FIX_RTC BIT6\r
216#define EFI_ACPI_6_1_RTC_S4 BIT7\r
217#define EFI_ACPI_6_1_TMR_VAL_EXT BIT8\r
218#define EFI_ACPI_6_1_DCK_CAP BIT9\r
219#define EFI_ACPI_6_1_RESET_REG_SUP BIT10\r
220#define EFI_ACPI_6_1_SEALED_CASE BIT11\r
221#define EFI_ACPI_6_1_HEADLESS BIT12\r
222#define EFI_ACPI_6_1_CPU_SW_SLP BIT13\r
223#define EFI_ACPI_6_1_PCI_EXP_WAK BIT14\r
224#define EFI_ACPI_6_1_USE_PLATFORM_CLOCK BIT15\r
225#define EFI_ACPI_6_1_S4_RTC_STS_VALID BIT16\r
226#define EFI_ACPI_6_1_REMOTE_POWER_ON_CAPABLE BIT17\r
227#define EFI_ACPI_6_1_FORCE_APIC_CLUSTER_MODEL BIT18\r
228#define EFI_ACPI_6_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
229#define EFI_ACPI_6_1_HW_REDUCED_ACPI BIT20\r
230#define EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
231\r
232///\r
233/// Firmware ACPI Control Structure\r
234///\r
235typedef struct {\r
236 UINT32 Signature;\r
237 UINT32 Length;\r
238 UINT32 HardwareSignature;\r
239 UINT32 FirmwareWakingVector;\r
240 UINT32 GlobalLock;\r
241 UINT32 Flags;\r
242 UINT64 XFirmwareWakingVector;\r
243 UINT8 Version;\r
244 UINT8 Reserved0[3];\r
245 UINT32 OspmFlags;\r
246 UINT8 Reserved1[24];\r
247} EFI_ACPI_6_1_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
248\r
249///\r
250/// FACS Version (as defined in ACPI 6.1 spec.)\r
251///\r
252#define EFI_ACPI_6_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
253\r
254///\r
255/// Firmware Control Structure Feature Flags\r
256/// All other bits are reserved and must be set to 0.\r
257///\r
258#define EFI_ACPI_6_1_S4BIOS_F BIT0\r
259#define EFI_ACPI_6_1_64BIT_WAKE_SUPPORTED_F BIT1\r
260\r
261///\r
262/// OSPM Enabled Firmware Control Structure Flags\r
263/// All other bits are reserved and must be set to 0.\r
264///\r
265#define EFI_ACPI_6_1_OSPM_64BIT_WAKE_F BIT0\r
266\r
267//\r
268// Differentiated System Description Table,\r
269// Secondary System Description Table\r
270// and Persistent System Description Table,\r
271// no definition needed as they are common description table header, the same with\r
272// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
273//\r
274#define EFI_ACPI_6_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
275#define EFI_ACPI_6_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
276\r
277///\r
278/// Multiple APIC Description Table header definition. The rest of the table\r
279/// must be defined in a platform specific manner.\r
280///\r
281typedef struct {\r
282 EFI_ACPI_DESCRIPTION_HEADER Header;\r
283 UINT32 LocalApicAddress;\r
284 UINT32 Flags;\r
285} EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
286\r
287///\r
288/// MADT Revision (as defined in ACPI 6.1 spec.)\r
289///\r
290#define EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04\r
291\r
292///\r
293/// Multiple APIC Flags\r
294/// All other bits are reserved and must be set to 0.\r
295///\r
296#define EFI_ACPI_6_1_PCAT_COMPAT BIT0\r
297\r
298//\r
299// Multiple APIC Description Table APIC structure types\r
300// All other values between 0x0D and 0x7F are reserved and\r
301// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
302//\r
303#define EFI_ACPI_6_1_PROCESSOR_LOCAL_APIC 0x00\r
304#define EFI_ACPI_6_1_IO_APIC 0x01\r
305#define EFI_ACPI_6_1_INTERRUPT_SOURCE_OVERRIDE 0x02\r
306#define EFI_ACPI_6_1_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
307#define EFI_ACPI_6_1_LOCAL_APIC_NMI 0x04\r
308#define EFI_ACPI_6_1_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
309#define EFI_ACPI_6_1_IO_SAPIC 0x06\r
310#define EFI_ACPI_6_1_LOCAL_SAPIC 0x07\r
311#define EFI_ACPI_6_1_PLATFORM_INTERRUPT_SOURCES 0x08\r
312#define EFI_ACPI_6_1_PROCESSOR_LOCAL_X2APIC 0x09\r
313#define EFI_ACPI_6_1_LOCAL_X2APIC_NMI 0x0A\r
314#define EFI_ACPI_6_1_GIC 0x0B\r
315#define EFI_ACPI_6_1_GICD 0x0C\r
316#define EFI_ACPI_6_1_GIC_MSI_FRAME 0x0D\r
317#define EFI_ACPI_6_1_GICR 0x0E\r
318#define EFI_ACPI_6_1_GIC_ITS 0x0F\r
319\r
320//\r
321// APIC Structure Definitions\r
322//\r
323\r
324///\r
325/// Processor Local APIC Structure Definition\r
326///\r
327typedef struct {\r
328 UINT8 Type;\r
329 UINT8 Length;\r
330 UINT8 AcpiProcessorUid;\r
331 UINT8 ApicId;\r
332 UINT32 Flags;\r
333} EFI_ACPI_6_1_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
334\r
335///\r
336/// Local APIC Flags. All other bits are reserved and must be 0.\r
337///\r
338#define EFI_ACPI_6_1_LOCAL_APIC_ENABLED BIT0\r
339\r
340///\r
341/// IO APIC Structure\r
342///\r
343typedef struct {\r
344 UINT8 Type;\r
345 UINT8 Length;\r
346 UINT8 IoApicId;\r
347 UINT8 Reserved;\r
348 UINT32 IoApicAddress;\r
349 UINT32 GlobalSystemInterruptBase;\r
350} EFI_ACPI_6_1_IO_APIC_STRUCTURE;\r
351\r
352///\r
353/// Interrupt Source Override Structure\r
354///\r
355typedef struct {\r
356 UINT8 Type;\r
357 UINT8 Length;\r
358 UINT8 Bus;\r
359 UINT8 Source;\r
360 UINT32 GlobalSystemInterrupt;\r
361 UINT16 Flags;\r
362} EFI_ACPI_6_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
363\r
364///\r
365/// Platform Interrupt Sources Structure Definition\r
366///\r
367typedef struct {\r
368 UINT8 Type;\r
369 UINT8 Length;\r
370 UINT16 Flags;\r
371 UINT8 InterruptType;\r
372 UINT8 ProcessorId;\r
373 UINT8 ProcessorEid;\r
374 UINT8 IoSapicVector;\r
375 UINT32 GlobalSystemInterrupt;\r
376 UINT32 PlatformInterruptSourceFlags;\r
377 UINT8 CpeiProcessorOverride;\r
378 UINT8 Reserved[31];\r
379} EFI_ACPI_6_1_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
380\r
381//\r
382// MPS INTI flags.\r
383// All other bits are reserved and must be set to 0.\r
384//\r
385#define EFI_ACPI_6_1_POLARITY (3 << 0)\r
386#define EFI_ACPI_6_1_TRIGGER_MODE (3 << 2)\r
387\r
388///\r
389/// Non-Maskable Interrupt Source Structure\r
390///\r
391typedef struct {\r
392 UINT8 Type;\r
393 UINT8 Length;\r
394 UINT16 Flags;\r
395 UINT32 GlobalSystemInterrupt;\r
396} EFI_ACPI_6_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
397\r
398///\r
399/// Local APIC NMI Structure\r
400///\r
401typedef struct {\r
402 UINT8 Type;\r
403 UINT8 Length;\r
404 UINT8 AcpiProcessorUid;\r
405 UINT16 Flags;\r
406 UINT8 LocalApicLint;\r
407} EFI_ACPI_6_1_LOCAL_APIC_NMI_STRUCTURE;\r
408\r
409///\r
410/// Local APIC Address Override Structure\r
411///\r
412typedef struct {\r
413 UINT8 Type;\r
414 UINT8 Length;\r
415 UINT16 Reserved;\r
416 UINT64 LocalApicAddress;\r
417} EFI_ACPI_6_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
418\r
419///\r
420/// IO SAPIC Structure\r
421///\r
422typedef struct {\r
423 UINT8 Type;\r
424 UINT8 Length;\r
425 UINT8 IoApicId;\r
426 UINT8 Reserved;\r
427 UINT32 GlobalSystemInterruptBase;\r
428 UINT64 IoSapicAddress;\r
429} EFI_ACPI_6_1_IO_SAPIC_STRUCTURE;\r
430\r
431///\r
432/// Local SAPIC Structure\r
433/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
434///\r
435typedef struct {\r
436 UINT8 Type;\r
437 UINT8 Length;\r
438 UINT8 AcpiProcessorId;\r
439 UINT8 LocalSapicId;\r
440 UINT8 LocalSapicEid;\r
441 UINT8 Reserved[3];\r
442 UINT32 Flags;\r
443 UINT32 ACPIProcessorUIDValue;\r
444} EFI_ACPI_6_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
445\r
446///\r
447/// Platform Interrupt Sources Structure\r
448///\r
449typedef struct {\r
450 UINT8 Type;\r
451 UINT8 Length;\r
452 UINT16 Flags;\r
453 UINT8 InterruptType;\r
454 UINT8 ProcessorId;\r
455 UINT8 ProcessorEid;\r
456 UINT8 IoSapicVector;\r
457 UINT32 GlobalSystemInterrupt;\r
458 UINT32 PlatformInterruptSourceFlags;\r
459} EFI_ACPI_6_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
460\r
461///\r
462/// Platform Interrupt Source Flags.\r
463/// All other bits are reserved and must be set to 0.\r
464///\r
465#define EFI_ACPI_6_1_CPEI_PROCESSOR_OVERRIDE BIT0\r
466\r
467///\r
468/// Processor Local x2APIC Structure Definition\r
469///\r
470typedef struct {\r
471 UINT8 Type;\r
472 UINT8 Length;\r
473 UINT8 Reserved[2];\r
474 UINT32 X2ApicId;\r
475 UINT32 Flags;\r
476 UINT32 AcpiProcessorUid;\r
477} EFI_ACPI_6_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
478\r
479///\r
480/// Local x2APIC NMI Structure\r
481///\r
482typedef struct {\r
483 UINT8 Type;\r
484 UINT8 Length;\r
485 UINT16 Flags;\r
486 UINT32 AcpiProcessorUid;\r
487 UINT8 LocalX2ApicLint;\r
488 UINT8 Reserved[3];\r
489} EFI_ACPI_6_1_LOCAL_X2APIC_NMI_STRUCTURE;\r
490\r
491///\r
492/// GIC Structure\r
493///\r
494typedef struct {\r
495 UINT8 Type;\r
496 UINT8 Length;\r
497 UINT16 Reserved;\r
498 UINT32 CPUInterfaceNumber;\r
499 UINT32 AcpiProcessorUid;\r
500 UINT32 Flags;\r
501 UINT32 ParkingProtocolVersion;\r
502 UINT32 PerformanceInterruptGsiv;\r
503 UINT64 ParkedAddress;\r
504 UINT64 PhysicalBaseAddress;\r
505 UINT64 GICV;\r
506 UINT64 GICH;\r
507 UINT32 VGICMaintenanceInterrupt;\r
508 UINT64 GICRBaseAddress;\r
509 UINT64 MPIDR;\r
510 UINT8 ProcessorPowerEfficiencyClass;\r
511 UINT8 Reserved2[3];\r
512} EFI_ACPI_6_1_GIC_STRUCTURE;\r
513\r
514///\r
515/// GIC Flags. All other bits are reserved and must be 0.\r
516///\r
517#define EFI_ACPI_6_1_GIC_ENABLED BIT0\r
518#define EFI_ACPI_6_1_PERFORMANCE_INTERRUPT_MODEL BIT1\r
519#define EFI_ACPI_6_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
520\r
521///\r
522/// GIC Distributor Structure\r
523///\r
524typedef struct {\r
525 UINT8 Type;\r
526 UINT8 Length;\r
527 UINT16 Reserved1;\r
528 UINT32 GicId;\r
529 UINT64 PhysicalBaseAddress;\r
530 UINT32 SystemVectorBase;\r
531 UINT8 GicVersion;\r
532 UINT8 Reserved2[3];\r
533} EFI_ACPI_6_1_GIC_DISTRIBUTOR_STRUCTURE;\r
534\r
535///\r
536/// GIC Version\r
537///\r
538#define EFI_ACPI_6_1_GIC_V1 0x01\r
539#define EFI_ACPI_6_1_GIC_V2 0x02\r
540#define EFI_ACPI_6_1_GIC_V3 0x03\r
541#define EFI_ACPI_6_1_GIC_V4 0x04\r
542\r
543///\r
544/// GIC MSI Frame Structure\r
545///\r
546typedef struct {\r
547 UINT8 Type;\r
548 UINT8 Length;\r
549 UINT16 Reserved1;\r
550 UINT32 GicMsiFrameId;\r
551 UINT64 PhysicalBaseAddress;\r
552 UINT32 Flags;\r
553 UINT16 SPICount;\r
554 UINT16 SPIBase;\r
555} EFI_ACPI_6_1_GIC_MSI_FRAME_STRUCTURE;\r
556\r
557///\r
558/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
559///\r
560#define EFI_ACPI_6_1_SPI_COUNT_BASE_SELECT BIT0\r
561\r
562///\r
563/// GICR Structure\r
564///\r
565typedef struct {\r
566 UINT8 Type;\r
567 UINT8 Length;\r
568 UINT16 Reserved;\r
569 UINT64 DiscoveryRangeBaseAddress;\r
570 UINT32 DiscoveryRangeLength;\r
571} EFI_ACPI_6_1_GICR_STRUCTURE;\r
572\r
573///\r
574/// GIC Interrupt Translation Service Structure\r
575///\r
576typedef struct {\r
577 UINT8 Type;\r
578 UINT8 Length;\r
579 UINT16 Reserved;\r
580 UINT32 GicItsId;\r
581 UINT64 PhysicalBaseAddress;\r
582 UINT32 Reserved2;\r
583} EFI_ACPI_6_1_GIC_ITS_STRUCTURE;\r
584\r
585///\r
586/// Smart Battery Description Table (SBST)\r
587///\r
588typedef struct {\r
589 EFI_ACPI_DESCRIPTION_HEADER Header;\r
590 UINT32 WarningEnergyLevel;\r
591 UINT32 LowEnergyLevel;\r
592 UINT32 CriticalEnergyLevel;\r
593} EFI_ACPI_6_1_SMART_BATTERY_DESCRIPTION_TABLE;\r
594\r
595///\r
596/// SBST Version (as defined in ACPI 6.1 spec.)\r
597///\r
598#define EFI_ACPI_6_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
599\r
600///\r
601/// Embedded Controller Boot Resources Table (ECDT)\r
602/// The table is followed by a null terminated ASCII string that contains\r
603/// a fully qualified reference to the name space object.\r
604///\r
605typedef struct {\r
606 EFI_ACPI_DESCRIPTION_HEADER Header;\r
607 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE EcControl;\r
608 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE EcData;\r
609 UINT32 Uid;\r
610 UINT8 GpeBit;\r
611} EFI_ACPI_6_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
612\r
613///\r
614/// ECDT Version (as defined in ACPI 6.1 spec.)\r
615///\r
616#define EFI_ACPI_6_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
617\r
618///\r
619/// System Resource Affinity Table (SRAT). The rest of the table\r
620/// must be defined in a platform specific manner.\r
621///\r
622typedef struct {\r
623 EFI_ACPI_DESCRIPTION_HEADER Header;\r
624 UINT32 Reserved1; ///< Must be set to 1\r
625 UINT64 Reserved2;\r
626} EFI_ACPI_6_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
627\r
628///\r
629/// SRAT Version (as defined in ACPI 6.1 spec.)\r
630///\r
631#define EFI_ACPI_6_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
632\r
633//\r
634// SRAT structure types.\r
635// All other values between 0x04 an 0xFF are reserved and\r
636// will be ignored by OSPM.\r
637//\r
638#define EFI_ACPI_6_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
639#define EFI_ACPI_6_1_MEMORY_AFFINITY 0x01\r
640#define EFI_ACPI_6_1_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
641#define EFI_ACPI_6_1_GICC_AFFINITY 0x03\r
642\r
643///\r
644/// Processor Local APIC/SAPIC Affinity Structure Definition\r
645///\r
646typedef struct {\r
647 UINT8 Type;\r
648 UINT8 Length;\r
649 UINT8 ProximityDomain7To0;\r
650 UINT8 ApicId;\r
651 UINT32 Flags;\r
652 UINT8 LocalSapicEid;\r
653 UINT8 ProximityDomain31To8[3];\r
654 UINT32 ClockDomain;\r
655} EFI_ACPI_6_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
656\r
657///\r
658/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
659///\r
660#define EFI_ACPI_6_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
661\r
662///\r
663/// Memory Affinity Structure Definition\r
664///\r
665typedef struct {\r
666 UINT8 Type;\r
667 UINT8 Length;\r
668 UINT32 ProximityDomain;\r
669 UINT16 Reserved1;\r
670 UINT32 AddressBaseLow;\r
671 UINT32 AddressBaseHigh;\r
672 UINT32 LengthLow;\r
673 UINT32 LengthHigh;\r
674 UINT32 Reserved2;\r
675 UINT32 Flags;\r
676 UINT64 Reserved3;\r
677} EFI_ACPI_6_1_MEMORY_AFFINITY_STRUCTURE;\r
678\r
679//\r
680// Memory Flags. All other bits are reserved and must be 0.\r
681//\r
682#define EFI_ACPI_6_1_MEMORY_ENABLED (1 << 0)\r
683#define EFI_ACPI_6_1_MEMORY_HOT_PLUGGABLE (1 << 1)\r
684#define EFI_ACPI_6_1_MEMORY_NONVOLATILE (1 << 2)\r
685\r
686///\r
687/// Processor Local x2APIC Affinity Structure Definition\r
688///\r
689typedef struct {\r
690 UINT8 Type;\r
691 UINT8 Length;\r
692 UINT8 Reserved1[2];\r
693 UINT32 ProximityDomain;\r
694 UINT32 X2ApicId;\r
695 UINT32 Flags;\r
696 UINT32 ClockDomain;\r
697 UINT8 Reserved2[4];\r
698} EFI_ACPI_6_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
699\r
700///\r
701/// GICC Affinity Structure Definition\r
702///\r
703typedef struct {\r
704 UINT8 Type;\r
705 UINT8 Length;\r
706 UINT32 ProximityDomain;\r
707 UINT32 AcpiProcessorUid;\r
708 UINT32 Flags;\r
709 UINT32 ClockDomain;\r
710} EFI_ACPI_6_1_GICC_AFFINITY_STRUCTURE;\r
711\r
712///\r
713/// GICC Flags. All other bits are reserved and must be 0.\r
714///\r
715#define EFI_ACPI_6_1_GICC_ENABLED (1 << 0)\r
716\r
717///\r
718/// System Locality Distance Information Table (SLIT).\r
719/// The rest of the table is a matrix.\r
720///\r
721typedef struct {\r
722 EFI_ACPI_DESCRIPTION_HEADER Header;\r
723 UINT64 NumberOfSystemLocalities;\r
724} EFI_ACPI_6_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
725\r
726///\r
727/// SLIT Version (as defined in ACPI 6.1 spec.)\r
728///\r
729#define EFI_ACPI_6_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
730\r
731///\r
732/// Corrected Platform Error Polling Table (CPEP)\r
733///\r
734typedef struct {\r
735 EFI_ACPI_DESCRIPTION_HEADER Header;\r
736 UINT8 Reserved[8];\r
737} EFI_ACPI_6_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
738\r
739///\r
740/// CPEP Version (as defined in ACPI 6.1 spec.)\r
741///\r
742#define EFI_ACPI_6_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
743\r
744//\r
745// CPEP processor structure types.\r
746//\r
747#define EFI_ACPI_6_1_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
748\r
749///\r
750/// Corrected Platform Error Polling Processor Structure Definition\r
751///\r
752typedef struct {\r
753 UINT8 Type;\r
754 UINT8 Length;\r
755 UINT8 ProcessorId;\r
756 UINT8 ProcessorEid;\r
757 UINT32 PollingInterval;\r
758} EFI_ACPI_6_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
759\r
760///\r
761/// Maximum System Characteristics Table (MSCT)\r
762///\r
763typedef struct {\r
764 EFI_ACPI_DESCRIPTION_HEADER Header;\r
765 UINT32 OffsetProxDomInfo;\r
766 UINT32 MaximumNumberOfProximityDomains;\r
767 UINT32 MaximumNumberOfClockDomains;\r
768 UINT64 MaximumPhysicalAddress;\r
769} EFI_ACPI_6_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
770\r
771///\r
772/// MSCT Version (as defined in ACPI 6.1 spec.)\r
773///\r
774#define EFI_ACPI_6_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
775\r
776///\r
777/// Maximum Proximity Domain Information Structure Definition\r
778///\r
779typedef struct {\r
780 UINT8 Revision;\r
781 UINT8 Length;\r
782 UINT32 ProximityDomainRangeLow;\r
783 UINT32 ProximityDomainRangeHigh;\r
784 UINT32 MaximumProcessorCapacity;\r
785 UINT64 MaximumMemoryCapacity;\r
786} EFI_ACPI_6_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
787\r
788///\r
789/// ACPI RAS Feature Table definition.\r
790///\r
791typedef struct {\r
792 EFI_ACPI_DESCRIPTION_HEADER Header;\r
793 UINT8 PlatformCommunicationChannelIdentifier[12];\r
794} EFI_ACPI_6_1_RAS_FEATURE_TABLE;\r
795\r
796///\r
797/// RASF Version (as defined in ACPI 6.1 spec.)\r
798///\r
799#define EFI_ACPI_6_1_RAS_FEATURE_TABLE_REVISION 0x01\r
800\r
801///\r
802/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
803///\r
804typedef struct {\r
805 UINT32 Signature;\r
806 UINT16 Command;\r
807 UINT16 Status;\r
808 UINT16 Version;\r
809 UINT8 RASCapabilities[16];\r
810 UINT8 SetRASCapabilities[16];\r
811 UINT16 NumberOfRASFParameterBlocks;\r
812 UINT32 SetRASCapabilitiesStatus;\r
813} EFI_ACPI_6_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
814\r
815///\r
816/// ACPI RASF PCC command code\r
817///\r
818#define EFI_ACPI_6_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
819\r
820///\r
821/// ACPI RASF Platform RAS Capabilities\r
822///\r
823#define EFI_ACPI_6_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED 0x01\r
824#define EFI_ACPI_6_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE 0x02\r
825\r
826///\r
827/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
828///\r
829typedef struct {\r
830 UINT16 Type;\r
831 UINT16 Version;\r
832 UINT16 Length;\r
833 UINT16 PatrolScrubCommand;\r
834 UINT64 RequestedAddressRange[2];\r
835 UINT64 ActualAddressRange[2];\r
836 UINT16 Flags;\r
837 UINT8 RequestedSpeed;\r
838} EFI_ACPI_6_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
839\r
840///\r
841/// ACPI RASF Patrol Scrub command\r
842///\r
843#define EFI_ACPI_6_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
844#define EFI_ACPI_6_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
845#define EFI_ACPI_6_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
846\r
847///\r
848/// Memory Power State Table definition.\r
849///\r
850typedef struct {\r
851 EFI_ACPI_DESCRIPTION_HEADER Header;\r
852 UINT8 PlatformCommunicationChannelIdentifier;\r
853 UINT8 Reserved[3];\r
854// Memory Power Node Structure\r
855// Memory Power State Characteristics\r
856} EFI_ACPI_6_1_MEMORY_POWER_STATUS_TABLE;\r
857\r
858///\r
859/// MPST Version (as defined in ACPI 6.1 spec.)\r
860///\r
861#define EFI_ACPI_6_1_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
862\r
863///\r
864/// MPST Platform Communication Channel Shared Memory Region definition.\r
865///\r
866typedef struct {\r
867 UINT32 Signature;\r
868 UINT16 Command;\r
869 UINT16 Status;\r
870 UINT32 MemoryPowerCommandRegister;\r
871 UINT32 MemoryPowerStatusRegister;\r
872 UINT32 PowerStateId;\r
873 UINT32 MemoryPowerNodeId;\r
874 UINT64 MemoryEnergyConsumed;\r
875 UINT64 ExpectedAveragePowerComsuned;\r
876} EFI_ACPI_6_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
877\r
878///\r
879/// ACPI MPST PCC command code\r
880///\r
881#define EFI_ACPI_6_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
882\r
883///\r
884/// ACPI MPST Memory Power command\r
885///\r
886#define EFI_ACPI_6_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
887#define EFI_ACPI_6_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
888#define EFI_ACPI_6_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
889#define EFI_ACPI_6_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
890\r
891///\r
892/// MPST Memory Power Node Table\r
893///\r
894typedef struct {\r
895 UINT8 PowerStateValue;\r
896 UINT8 PowerStateInformationIndex;\r
897} EFI_ACPI_6_1_MPST_MEMORY_POWER_STATE;\r
898\r
899typedef struct {\r
900 UINT8 Flag;\r
901 UINT8 Reserved;\r
902 UINT16 MemoryPowerNodeId;\r
903 UINT32 Length;\r
904 UINT64 AddressBase;\r
905 UINT64 AddressLength;\r
906 UINT32 NumberOfPowerStates;\r
907 UINT32 NumberOfPhysicalComponents;\r
908//EFI_ACPI_6_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
909//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
910} EFI_ACPI_6_1_MPST_MEMORY_POWER_STRUCTURE;\r
911\r
912#define EFI_ACPI_6_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
913#define EFI_ACPI_6_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
914#define EFI_ACPI_6_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
915\r
916typedef struct {\r
917 UINT16 MemoryPowerNodeCount;\r
918 UINT8 Reserved[2];\r
919} EFI_ACPI_6_1_MPST_MEMORY_POWER_NODE_TABLE;\r
920\r
921///\r
922/// MPST Memory Power State Characteristics Table\r
923///\r
924typedef struct {\r
925 UINT8 PowerStateStructureID;\r
926 UINT8 Flag;\r
927 UINT16 Reserved;\r
928 UINT32 AveragePowerConsumedInMPS0;\r
929 UINT32 RelativePowerSavingToMPS0;\r
930 UINT64 ExitLatencyToMPS0;\r
931} EFI_ACPI_6_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
932\r
933#define EFI_ACPI_6_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
934#define EFI_ACPI_6_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
935#define EFI_ACPI_6_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
936\r
937typedef struct {\r
938 UINT16 MemoryPowerStateCharacteristicsCount;\r
939 UINT8 Reserved[2];\r
940} EFI_ACPI_6_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
941\r
942///\r
943/// Memory Topology Table definition.\r
944///\r
945typedef struct {\r
946 EFI_ACPI_DESCRIPTION_HEADER Header;\r
947 UINT32 Reserved;\r
948} EFI_ACPI_6_1_MEMORY_TOPOLOGY_TABLE;\r
949\r
950///\r
951/// PMTT Version (as defined in ACPI 6.1 spec.)\r
952///\r
953#define EFI_ACPI_6_1_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
954\r
955///\r
956/// Common Memory Aggregator Device Structure.\r
957///\r
958typedef struct {\r
959 UINT8 Type;\r
960 UINT8 Reserved;\r
961 UINT16 Length;\r
962 UINT16 Flags;\r
963 UINT16 Reserved1;\r
964} EFI_ACPI_6_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
965\r
966///\r
967/// Memory Aggregator Device Type\r
968///\r
d6e6337c
CJ		 969#define EFI_ACPI_6_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0\r
970#define EFI_ACPI_6_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1\r
971#define EFI_ACPI_6_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2\r
f2e4f2fc
JY		 972\r
973///\r
974/// Socket Memory Aggregator Device Structure.\r
975///\r
976typedef struct {\r
977 EFI_ACPI_6_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
978 UINT16 SocketIdentifier;\r
979 UINT16 Reserved;\r
980//EFI_ACPI_6_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
981} EFI_ACPI_6_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
982\r
983///\r
984/// MemoryController Memory Aggregator Device Structure.\r
985///\r
986typedef struct {\r
987 EFI_ACPI_6_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
988 UINT32 ReadLatency;\r
989 UINT32 WriteLatency;\r
990 UINT32 ReadBandwidth;\r
991 UINT32 WriteBandwidth;\r
992 UINT16 OptimalAccessUnit;\r
993 UINT16 OptimalAccessAlignment;\r
994 UINT16 Reserved;\r
995 UINT16 NumberOfProximityDomains;\r
996//UINT32 ProximityDomain[NumberOfProximityDomains];\r
997//EFI_ACPI_6_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
998} EFI_ACPI_6_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
999\r
1000///\r
1001/// DIMM Memory Aggregator Device Structure.\r
1002///\r
1003typedef struct {\r
1004 EFI_ACPI_6_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1005 UINT16 PhysicalComponentIdentifier;\r
1006 UINT16 Reserved;\r
1007 UINT32 SizeOfDimm;\r
1008 UINT32 SmbiosHandle;\r
1009} EFI_ACPI_6_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1010\r
1011///\r
1012/// Boot Graphics Resource Table definition.\r
1013///\r
1014typedef struct {\r
1015 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1016 ///\r
1017 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1018 ///\r
1019 UINT16 Version;\r
1020 ///\r
1021 /// 1-byte status field indicating current status about the table.\r
1022 /// Bits[7:1] = Reserved (must be zero)\r
1023 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1024 ///\r
1025 UINT8 Status;\r
1026 ///\r
1027 /// 1-byte enumerated type field indicating format of the image.\r
1028 /// 0 = Bitmap\r
1029 /// 1 - 255 Reserved (for future use)\r
1030 ///\r
1031 UINT8 ImageType;\r
1032 ///\r
1033 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1034 /// of the image bitmap.\r
1035 ///\r
1036 UINT64 ImageAddress;\r
1037 ///\r
1038 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1039 /// (X, Y) display offset of the top left corner of the boot image.\r
1040 /// The top left corner of the display is at offset (0, 0).\r
1041 ///\r
1042 UINT32 ImageOffsetX;\r
1043 ///\r
1044 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1045 /// (X, Y) display offset of the top left corner of the boot image.\r
1046 /// The top left corner of the display is at offset (0, 0).\r
1047 ///\r
1048 UINT32 ImageOffsetY;\r
1049} EFI_ACPI_6_1_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1050\r
1051///\r
1052/// BGRT Revision\r
1053///\r
1054#define EFI_ACPI_6_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1055\r
1056///\r
1057/// BGRT Version\r
1058///\r
1059#define EFI_ACPI_6_1_BGRT_VERSION 0x01\r
1060\r
1061///\r
1062/// BGRT Status\r
1063///\r
1064#define EFI_ACPI_6_1_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1065#define EFI_ACPI_6_1_BGRT_STATUS_DISPLAYED 0x01\r
1066\r
1067///\r
1068/// BGRT Image Type\r
1069///\r
1070#define EFI_ACPI_6_1_BGRT_IMAGE_TYPE_BMP 0x00\r
1071\r
1072///\r
1073/// FPDT Version (as defined in ACPI 6.1 spec.)\r
1074///\r
1075#define EFI_ACPI_6_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1076\r
1077///\r
1078/// FPDT Performance Record Types\r
1079///\r
1080#define EFI_ACPI_6_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1081#define EFI_ACPI_6_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1082\r
1083///\r
1084/// FPDT Performance Record Revision\r
1085///\r
1086#define EFI_ACPI_6_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1087#define EFI_ACPI_6_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1088\r
1089///\r
1090/// FPDT Runtime Performance Record Types\r
1091///\r
1092#define EFI_ACPI_6_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1093#define EFI_ACPI_6_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1094#define EFI_ACPI_6_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1095\r
1096///\r
1097/// FPDT Runtime Performance Record Revision\r
1098///\r
1099#define EFI_ACPI_6_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1100#define EFI_ACPI_6_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1101#define EFI_ACPI_6_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1102\r
1103///\r
1104/// FPDT Performance Record header\r
1105///\r
1106typedef struct {\r
1107 UINT16 Type;\r
1108 UINT8 Length;\r
1109 UINT8 Revision;\r
1110} EFI_ACPI_6_1_FPDT_PERFORMANCE_RECORD_HEADER;\r
1111\r
1112///\r
1113/// FPDT Performance Table header\r
1114///\r
1115typedef struct {\r
1116 UINT32 Signature;\r
1117 UINT32 Length;\r
1118} EFI_ACPI_6_1_FPDT_PERFORMANCE_TABLE_HEADER;\r
1119\r
1120///\r
1121/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1122///\r
1123typedef struct {\r
1124 EFI_ACPI_6_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1125 UINT32 Reserved;\r
1126 ///\r
1127 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1128 ///\r
1129 UINT64 BootPerformanceTablePointer;\r
1130} EFI_ACPI_6_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1131\r
1132///\r
1133/// FPDT S3 Performance Table Pointer Record Structure\r
1134///\r
1135typedef struct {\r
1136 EFI_ACPI_6_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1137 UINT32 Reserved;\r
1138 ///\r
1139 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1140 ///\r
1141 UINT64 S3PerformanceTablePointer;\r
1142} EFI_ACPI_6_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1143\r
1144///\r
1145/// FPDT Firmware Basic Boot Performance Record Structure\r
1146///\r
1147typedef struct {\r
1148 EFI_ACPI_6_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1149 UINT32 Reserved;\r
1150 ///\r
1151 /// Timer value logged at the beginning of firmware image execution.\r
1152 /// This may not always be zero or near zero.\r
1153 ///\r
1154 UINT64 ResetEnd;\r
1155 ///\r
1156 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1157 /// For non-UEFI compatible boots, this field must be zero.\r
1158 ///\r
1159 UINT64 OsLoaderLoadImageStart;\r
1160 ///\r
1161 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1162 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1163 /// to the INT 19h handler invocation.\r
1164 ///\r
1165 UINT64 OsLoaderStartImageStart;\r
1166 ///\r
1167 /// Timer value logged at the point when the OS loader calls the\r
1168 /// ExitBootServices function for UEFI compatible firmware.\r
1169 /// For non-UEFI compatible boots, this field must be zero.\r
1170 ///\r
1171 UINT64 ExitBootServicesEntry;\r
1172 ///\r
b219e2cd 1173 /// Timer value logged at the point just prior to when the OS loader gaining\r
f2e4f2fc
JY		 1174 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1175 /// For non-UEFI compatible boots, this field must be zero.\r
1176 ///\r
1177 UINT64 ExitBootServicesExit;\r
1178} EFI_ACPI_6_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1179\r
1180///\r
1181/// FPDT Firmware Basic Boot Performance Table signature\r
1182///\r
1183#define EFI_ACPI_6_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1184\r
1185//\r
1186// FPDT Firmware Basic Boot Performance Table\r
1187//\r
1188typedef struct {\r
1189 EFI_ACPI_6_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1190 //\r
1191 // one or more Performance Records.\r
1192 //\r
1193} EFI_ACPI_6_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1194\r
1195///\r
1196/// FPDT "S3PT" S3 Performance Table\r
1197///\r
1198#define EFI_ACPI_6_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1199\r
1200//\r
1201// FPDT Firmware S3 Boot Performance Table\r
1202//\r
1203typedef struct {\r
1204 EFI_ACPI_6_1_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1205 //\r
1206 // one or more Performance Records.\r
1207 //\r
1208} EFI_ACPI_6_1_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1209\r
1210///\r
1211/// FPDT Basic S3 Resume Performance Record\r
1212///\r
1213typedef struct {\r
1214 EFI_ACPI_6_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1215 ///\r
1216 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1217 ///\r
1218 UINT32 ResumeCount;\r
1219 ///\r
1220 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1221 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1222 ///\r
1223 UINT64 FullResume;\r
1224 ///\r
1225 /// Average timer value of all resume cycles logged since the last full boot\r
1226 /// sequence, including the most recent resume. Note that the entire log of\r
1227 /// timer values does not need to be retained in order to calculate this average.\r
1228 ///\r
1229 UINT64 AverageResume;\r
1230} EFI_ACPI_6_1_FPDT_S3_RESUME_RECORD;\r
1231\r
1232///\r
1233/// FPDT Basic S3 Suspend Performance Record\r
1234///\r
1235typedef struct {\r
1236 EFI_ACPI_6_1_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1237 ///\r
1238 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1239 /// Only the most recent suspend cycle's timer value is retained.\r
1240 ///\r
1241 UINT64 SuspendStart;\r
1242 ///\r
1243 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1244 /// mechanism) used to trigger hardware entry to S3.\r
1245 /// Only the most recent suspend cycle's timer value is retained.\r
1246 ///\r
1247 UINT64 SuspendEnd;\r
1248} EFI_ACPI_6_1_FPDT_S3_SUSPEND_RECORD;\r
1249\r
1250///\r
1251/// Firmware Performance Record Table definition.\r
1252///\r
1253typedef struct {\r
1254 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1255} EFI_ACPI_6_1_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1256\r
1257///\r
1258/// Generic Timer Description Table definition.\r
1259///\r
1260typedef struct {\r
1261 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1262 UINT64 CntControlBasePhysicalAddress;\r
1263 UINT32 Reserved;\r
1264 UINT32 SecurePL1TimerGSIV;\r
1265 UINT32 SecurePL1TimerFlags;\r
1266 UINT32 NonSecurePL1TimerGSIV;\r
1267 UINT32 NonSecurePL1TimerFlags;\r
1268 UINT32 VirtualTimerGSIV;\r
1269 UINT32 VirtualTimerFlags;\r
1270 UINT32 NonSecurePL2TimerGSIV;\r
1271 UINT32 NonSecurePL2TimerFlags;\r
1272 UINT64 CntReadBasePhysicalAddress;\r
1273 UINT32 PlatformTimerCount;\r
1274 UINT32 PlatformTimerOffset;\r
1275} EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1276\r
1277///\r
1278/// GTDT Version (as defined in ACPI 6.1 spec.)\r
1279///\r
1280#define EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r
1281\r
1282///\r
1283/// Timer Flags. All other bits are reserved and must be 0.\r
1284///\r
1285#define EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1286#define EFI_ACPI_6_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1287#define EFI_ACPI_6_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1288\r
1289///\r
1290/// Platform Timer Type\r
1291///\r
1292#define EFI_ACPI_6_1_GTDT_GT_BLOCK 0\r
1293#define EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1294\r
1295///\r
1296/// GT Block Structure\r
1297///\r
1298typedef struct {\r
1299 UINT8 Type;\r
1300 UINT16 Length;\r
1301 UINT8 Reserved;\r
1302 UINT64 CntCtlBase;\r
1303 UINT32 GTBlockTimerCount;\r
1304 UINT32 GTBlockTimerOffset;\r
1305} EFI_ACPI_6_1_GTDT_GT_BLOCK_STRUCTURE;\r
1306\r
1307///\r
1308/// GT Block Timer Structure\r
1309///\r
1310typedef struct {\r
1311 UINT8 GTFrameNumber;\r
1312 UINT8 Reserved[3];\r
1313 UINT64 CntBaseX;\r
1314 UINT64 CntEL0BaseX;\r
1315 UINT32 GTxPhysicalTimerGSIV;\r
1316 UINT32 GTxPhysicalTimerFlags;\r
1317 UINT32 GTxVirtualTimerGSIV;\r
1318 UINT32 GTxVirtualTimerFlags;\r
1319 UINT32 GTxCommonFlags;\r
1320} EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1321\r
1322///\r
1323/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1324///\r
1325#define EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1326#define EFI_ACPI_6_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1327\r
1328///\r
1329/// Common Flags Flags. All other bits are reserved and must be 0.\r
1330///\r
1331#define EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1332#define EFI_ACPI_6_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1333\r
1334///\r
1335/// SBSA Generic Watchdog Structure\r
1336///\r
1337typedef struct {\r
1338 UINT8 Type;\r
1339 UINT16 Length;\r
1340 UINT8 Reserved;\r
1341 UINT64 RefreshFramePhysicalAddress;\r
1342 UINT64 WatchdogControlFramePhysicalAddress;\r
1343 UINT32 WatchdogTimerGSIV;\r
1344 UINT32 WatchdogTimerFlags;\r
1345} EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1346\r
1347///\r
1348/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1349///\r
1350#define EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1351#define EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1352#define EFI_ACPI_6_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1353\r
1354//\r
1355// NVDIMM Firmware Interface Table definition.\r
1356//\r
1357typedef struct {\r
1358 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1359 UINT32 Reserved;\r
1360} EFI_ACPI_6_1_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1361\r
1362//\r
1363// NFIT Version (as defined in ACPI 6.1 spec.)\r
1364//\r
1365#define EFI_ACPI_6_1_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1366\r
1367//\r
1368// Definition for NFIT Table Structure Types\r
1369//\r
1370#define EFI_ACPI_6_1_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1371#define EFI_ACPI_6_1_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1372#define EFI_ACPI_6_1_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1373#define EFI_ACPI_6_1_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1374#define EFI_ACPI_6_1_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1375#define EFI_ACPI_6_1_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1376#define EFI_ACPI_6_1_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1377\r
1378//\r
1379// Definition for NFIT Structure Header\r
1380//\r
1381typedef struct {\r
1382 UINT16 Type;\r
1383 UINT16 Length;\r
1384} EFI_ACPI_6_1_NFIT_STRUCTURE_HEADER;\r
1385\r
1386//\r
1387// Definition for System Physical Address Range Structure\r
1388//\r
1389#define EFI_ACPI_6_1_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1390#define EFI_ACPI_6_1_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
5f87f979
SEHM		 1391#define EFI_ACPI_6_1_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1392#define EFI_ACPI_6_1_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1393#define EFI_ACPI_6_1_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1394#define EFI_ACPI_6_1_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1395#define EFI_ACPI_6_1_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1396#define EFI_ACPI_6_1_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1397#define EFI_ACPI_6_1_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
385c0bf5 1398#define EFI_ACPI_6_1_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
f2e4f2fc
JY		 1399typedef struct {\r
1400 UINT16 Type;\r
1401 UINT16 Length;\r
1402 UINT16 SPARangeStructureIndex;\r
1403 UINT16 Flags;\r
1404 UINT32 Reserved_8;\r
1405 UINT32 ProximityDomain;\r
1406 GUID AddressRangeTypeGUID;\r
1407 UINT64 SystemPhysicalAddressRangeBase;\r
1408 UINT64 SystemPhysicalAddressRangeLength;\r
1409 UINT64 AddressRangeMemoryMappingAttribute;\r
1410} EFI_ACPI_6_1_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1411\r
1412//\r
1413// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1414//\r
1415typedef struct {\r
1416 UINT32 DIMMNumber:4;\r
1417 UINT32 MemoryChannelNumber:4;\r
1418 UINT32 MemoryControllerID:4;\r
1419 UINT32 SocketID:4;\r
1420 UINT32 NodeControllerID:12;\r
1421 UINT32 Reserved_28:4;\r
1422} EFI_ACPI_6_1_NFIT_DEVICE_HANDLE;\r
1423\r
1424#define EFI_ACPI_6_1_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1425#define EFI_ACPI_6_1_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1426#define EFI_ACPI_6_1_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1427#define EFI_ACPI_6_1_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1428#define EFI_ACPI_6_1_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1429#define EFI_ACPI_6_1_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1430#define EFI_ACPI_6_1_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
1431typedef struct {\r
1432 UINT16 Type;\r
1433 UINT16 Length;\r
1434 EFI_ACPI_6_1_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1435 UINT16 NVDIMMPhysicalID;\r
1436 UINT16 NVDIMMRegionID;\r
1437 UINT16 SPARangeStructureIndex ;\r
1438 UINT16 NVDIMMControlRegionStructureIndex;\r
1439 UINT64 NVDIMMRegionSize;\r
1440 UINT64 RegionOffset;\r
1441 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1442 UINT16 InterleaveStructureIndex;\r
1443 UINT16 InterleaveWays;\r
1444 UINT16 NVDIMMStateFlags;\r
1445 UINT16 Reserved_46;\r
1446} EFI_ACPI_6_1_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1447\r
1448//\r
1449// Definition for Interleave Structure\r
1450//\r
1451typedef struct {\r
1452 UINT16 Type;\r
1453 UINT16 Length;\r
1454 UINT16 InterleaveStructureIndex;\r
1455 UINT16 Reserved_6;\r
1456 UINT32 NumberOfLines;\r
1457 UINT32 LineSize;\r
1458//UINT32 LineOffset[NumberOfLines];\r
1459} EFI_ACPI_6_1_NFIT_INTERLEAVE_STRUCTURE;\r
1460\r
1461//\r
1462// Definition for SMBIOS Management Information Structure\r
1463//\r
1464typedef struct {\r
1465 UINT16 Type;\r
1466 UINT16 Length;\r
1467 UINT32 Reserved_4;\r
1468//UINT8 Data[];\r
1469} EFI_ACPI_6_1_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1470\r
1471//\r
1472// Definition for NVDIMM Control Region Structure\r
1473//\r
71a2a892
SEHM		 1474#define EFI_ACPI_6_1_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1475\r
f2e4f2fc
JY		 1476#define EFI_ACPI_6_1_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1477typedef struct {\r
1478 UINT16 Type;\r
1479 UINT16 Length;\r
1480 UINT16 NVDIMMControlRegionStructureIndex;\r
1481 UINT16 VendorID;\r
1482 UINT16 DeviceID;\r
1483 UINT16 RevisionID;\r
1484 UINT16 SubsystemVendorID;\r
1485 UINT16 SubsystemDeviceID;\r
1486 UINT16 SubsystemRevisionID;\r
1487 UINT8 ValidFields;\r
1488 UINT8 ManufacturingLocation;\r
1489 UINT16 ManufacturingDate;\r
1490 UINT8 Reserved_22[2];\r
1491 UINT32 SerialNumber;\r
1492 UINT16 RegionFormatInterfaceCode;\r
1493 UINT16 NumberOfBlockControlWindows;\r
1494 UINT64 SizeOfBlockControlWindow;\r
1495 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1496 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1497 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1498 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1499 UINT16 NVDIMMControlRegionFlag;\r
1500 UINT8 Reserved_74[6];\r
1501} EFI_ACPI_6_1_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1502\r
1503//\r
1504// Definition for NVDIMM Block Data Window Region Structure\r
1505//\r
1506typedef struct {\r
1507 UINT16 Type;\r
1508 UINT16 Length;\r
1509 UINT16 NVDIMMControlRegionStructureIndex;\r
1510 UINT16 NumberOfBlockDataWindows;\r
1511 UINT64 BlockDataWindowStartOffset;\r
1512 UINT64 SizeOfBlockDataWindow;\r
1513 UINT64 BlockAccessibleMemoryCapacity;\r
1514 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1515} EFI_ACPI_6_1_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1516\r
1517//\r
1518// Definition for Flush Hint Address Structure\r
1519//\r
1520typedef struct {\r
1521 UINT16 Type;\r
1522 UINT16 Length;\r
1523 EFI_ACPI_6_1_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1524 UINT16 NumberOfFlushHintAddresses;\r
1525 UINT8 Reserved_10[6];\r
1526//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1527} EFI_ACPI_6_1_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1528\r
1529///\r
1530/// Boot Error Record Table (BERT)\r
1531///\r
1532typedef struct {\r
1533 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1534 UINT32 BootErrorRegionLength;\r
1535 UINT64 BootErrorRegion;\r
1536} EFI_ACPI_6_1_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1537\r
1538///\r
1539/// BERT Version (as defined in ACPI 6.1 spec.)\r
1540///\r
1541#define EFI_ACPI_6_1_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1542\r
1543///\r
1544/// Boot Error Region Block Status Definition\r
1545///\r
1546typedef struct {\r
1547 UINT32 UncorrectableErrorValid:1;\r
1548 UINT32 CorrectableErrorValid:1;\r
1549 UINT32 MultipleUncorrectableErrors:1;\r
1550 UINT32 MultipleCorrectableErrors:1;\r
1551 UINT32 ErrorDataEntryCount:10;\r
1552 UINT32 Reserved:18;\r
1553} EFI_ACPI_6_1_ERROR_BLOCK_STATUS;\r
1554\r
1555///\r
1556/// Boot Error Region Definition\r
1557///\r
1558typedef struct {\r
1559 EFI_ACPI_6_1_ERROR_BLOCK_STATUS BlockStatus;\r
1560 UINT32 RawDataOffset;\r
1561 UINT32 RawDataLength;\r
1562 UINT32 DataLength;\r
1563 UINT32 ErrorSeverity;\r
1564} EFI_ACPI_6_1_BOOT_ERROR_REGION_STRUCTURE;\r
1565\r
1566//\r
1567// Boot Error Severity types\r
1568//\r
1569#define EFI_ACPI_6_1_ERROR_SEVERITY_CORRECTABLE 0x00\r
1570#define EFI_ACPI_6_1_ERROR_SEVERITY_FATAL 0x01\r
1571#define EFI_ACPI_6_1_ERROR_SEVERITY_CORRECTED 0x02\r
1572#define EFI_ACPI_6_1_ERROR_SEVERITY_NONE 0x03\r
1573\r
1574///\r
1575/// Generic Error Data Entry Definition\r
1576///\r
1577typedef struct {\r
1578 UINT8 SectionType[16];\r
1579 UINT32 ErrorSeverity;\r
1580 UINT16 Revision;\r
1581 UINT8 ValidationBits;\r
1582 UINT8 Flags;\r
1583 UINT32 ErrorDataLength;\r
1584 UINT8 FruId[16];\r
1585 UINT8 FruText[20];\r
1586 UINT8 Timestamp[8];\r
1587} EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1588\r
1589///\r
1590/// Generic Error Data Entry Version (as defined in ACPI 6.1 spec.)\r
1591///\r
1592#define EFI_ACPI_6_1_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1593\r
1594///\r
1595/// HEST - Hardware Error Source Table\r
1596///\r
1597typedef struct {\r
1598 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1599 UINT32 ErrorSourceCount;\r
1600} EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1601\r
1602///\r
1603/// HEST Version (as defined in ACPI 6.1 spec.)\r
1604///\r
1605#define EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1606\r
1607//\r
1608// Error Source structure types.\r
1609//\r
1610#define EFI_ACPI_6_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1611#define EFI_ACPI_6_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1612#define EFI_ACPI_6_1_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1613#define EFI_ACPI_6_1_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1614#define EFI_ACPI_6_1_PCI_EXPRESS_DEVICE_AER 0x07\r
1615#define EFI_ACPI_6_1_PCI_EXPRESS_BRIDGE_AER 0x08\r
1616#define EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR 0x09\r
1617#define EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1618\r
1619//\r
1620// Error Source structure flags.\r
1621//\r
1622#define EFI_ACPI_6_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1623#define EFI_ACPI_6_1_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1624\r
1625///\r
1626/// IA-32 Architecture Machine Check Exception Structure Definition\r
1627///\r
1628typedef struct {\r
1629 UINT16 Type;\r
1630 UINT16 SourceId;\r
1631 UINT8 Reserved0[2];\r
1632 UINT8 Flags;\r
1633 UINT8 Enabled;\r
1634 UINT32 NumberOfRecordsToPreAllocate;\r
1635 UINT32 MaxSectionsPerRecord;\r
1636 UINT64 GlobalCapabilityInitData;\r
1637 UINT64 GlobalControlInitData;\r
1638 UINT8 NumberOfHardwareBanks;\r
1639 UINT8 Reserved1[7];\r
1640} EFI_ACPI_6_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1641\r
1642///\r
1643/// IA-32 Architecture Machine Check Bank Structure Definition\r
1644///\r
1645typedef struct {\r
1646 UINT8 BankNumber;\r
1647 UINT8 ClearStatusOnInitialization;\r
1648 UINT8 StatusDataFormat;\r
1649 UINT8 Reserved0;\r
1650 UINT32 ControlRegisterMsrAddress;\r
1651 UINT64 ControlInitData;\r
1652 UINT32 StatusRegisterMsrAddress;\r
1653 UINT32 AddressRegisterMsrAddress;\r
1654 UINT32 MiscRegisterMsrAddress;\r
1655} EFI_ACPI_6_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1656\r
1657///\r
1658/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1659///\r
1660#define EFI_ACPI_6_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1661#define EFI_ACPI_6_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1662#define EFI_ACPI_6_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1663\r
1664//\r
1665// Hardware Error Notification types. All other values are reserved\r
1666//\r
1667#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1668#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1669#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1670#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1671#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1672#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1673#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1674#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1675#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1676#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1677#define EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1678\r
1679///\r
1680/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1681///\r
1682typedef struct {\r
1683 UINT16 Type:1;\r
1684 UINT16 PollInterval:1;\r
1685 UINT16 SwitchToPollingThresholdValue:1;\r
1686 UINT16 SwitchToPollingThresholdWindow:1;\r
1687 UINT16 ErrorThresholdValue:1;\r
1688 UINT16 ErrorThresholdWindow:1;\r
1689 UINT16 Reserved:10;\r
1690} EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1691\r
1692///\r
1693/// Hardware Error Notification Structure Definition\r
1694///\r
1695typedef struct {\r
1696 UINT8 Type;\r
1697 UINT8 Length;\r
1698 EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1699 UINT32 PollInterval;\r
1700 UINT32 Vector;\r
1701 UINT32 SwitchToPollingThresholdValue;\r
1702 UINT32 SwitchToPollingThresholdWindow;\r
1703 UINT32 ErrorThresholdValue;\r
1704 UINT32 ErrorThresholdWindow;\r
1705} EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1706\r
1707///\r
1708/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1709///\r
1710typedef struct {\r
1711 UINT16 Type;\r
1712 UINT16 SourceId;\r
1713 UINT8 Reserved0[2];\r
1714 UINT8 Flags;\r
1715 UINT8 Enabled;\r
1716 UINT32 NumberOfRecordsToPreAllocate;\r
1717 UINT32 MaxSectionsPerRecord;\r
1718 EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1719 UINT8 NumberOfHardwareBanks;\r
1720 UINT8 Reserved1[3];\r
1721} EFI_ACPI_6_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1722\r
1723///\r
1724/// IA-32 Architecture NMI Error Structure Definition\r
1725///\r
1726typedef struct {\r
1727 UINT16 Type;\r
1728 UINT16 SourceId;\r
1729 UINT8 Reserved0[2];\r
1730 UINT32 NumberOfRecordsToPreAllocate;\r
1731 UINT32 MaxSectionsPerRecord;\r
1732 UINT32 MaxRawDataLength;\r
1733} EFI_ACPI_6_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1734\r
1735///\r
1736/// PCI Express Root Port AER Structure Definition\r
1737///\r
1738typedef struct {\r
1739 UINT16 Type;\r
1740 UINT16 SourceId;\r
1741 UINT8 Reserved0[2];\r
1742 UINT8 Flags;\r
1743 UINT8 Enabled;\r
1744 UINT32 NumberOfRecordsToPreAllocate;\r
1745 UINT32 MaxSectionsPerRecord;\r
1746 UINT32 Bus;\r
1747 UINT16 Device;\r
1748 UINT16 Function;\r
1749 UINT16 DeviceControl;\r
1750 UINT8 Reserved1[2];\r
1751 UINT32 UncorrectableErrorMask;\r
1752 UINT32 UncorrectableErrorSeverity;\r
1753 UINT32 CorrectableErrorMask;\r
1754 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1755 UINT32 RootErrorCommand;\r
1756} EFI_ACPI_6_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1757\r
1758///\r
1759/// PCI Express Device AER Structure Definition\r
1760///\r
1761typedef struct {\r
1762 UINT16 Type;\r
1763 UINT16 SourceId;\r
1764 UINT8 Reserved0[2];\r
1765 UINT8 Flags;\r
1766 UINT8 Enabled;\r
1767 UINT32 NumberOfRecordsToPreAllocate;\r
1768 UINT32 MaxSectionsPerRecord;\r
1769 UINT32 Bus;\r
1770 UINT16 Device;\r
1771 UINT16 Function;\r
1772 UINT16 DeviceControl;\r
1773 UINT8 Reserved1[2];\r
1774 UINT32 UncorrectableErrorMask;\r
1775 UINT32 UncorrectableErrorSeverity;\r
1776 UINT32 CorrectableErrorMask;\r
1777 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1778} EFI_ACPI_6_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1779\r
1780///\r
1781/// PCI Express Bridge AER Structure Definition\r
1782///\r
1783typedef struct {\r
1784 UINT16 Type;\r
1785 UINT16 SourceId;\r
1786 UINT8 Reserved0[2];\r
1787 UINT8 Flags;\r
1788 UINT8 Enabled;\r
1789 UINT32 NumberOfRecordsToPreAllocate;\r
1790 UINT32 MaxSectionsPerRecord;\r
1791 UINT32 Bus;\r
1792 UINT16 Device;\r
1793 UINT16 Function;\r
1794 UINT16 DeviceControl;\r
1795 UINT8 Reserved1[2];\r
1796 UINT32 UncorrectableErrorMask;\r
1797 UINT32 UncorrectableErrorSeverity;\r
1798 UINT32 CorrectableErrorMask;\r
1799 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1800 UINT32 SecondaryUncorrectableErrorMask;\r
1801 UINT32 SecondaryUncorrectableErrorSeverity;\r
1802 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1803} EFI_ACPI_6_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1804\r
1805///\r
1806/// Generic Hardware Error Source Structure Definition\r
1807///\r
1808typedef struct {\r
1809 UINT16 Type;\r
1810 UINT16 SourceId;\r
1811 UINT16 RelatedSourceId;\r
1812 UINT8 Flags;\r
1813 UINT8 Enabled;\r
1814 UINT32 NumberOfRecordsToPreAllocate;\r
1815 UINT32 MaxSectionsPerRecord;\r
1816 UINT32 MaxRawDataLength;\r
1817 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1818 EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1819 UINT32 ErrorStatusBlockLength;\r
1820} EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1821\r
1822///\r
1823/// Generic Hardware Error Source Version 2 Structure Definition\r
1824///\r
1825typedef struct {\r
1826 UINT16 Type;\r
1827 UINT16 SourceId;\r
1828 UINT16 RelatedSourceId;\r
1829 UINT8 Flags;\r
1830 UINT8 Enabled;\r
1831 UINT32 NumberOfRecordsToPreAllocate;\r
1832 UINT32 MaxSectionsPerRecord;\r
1833 UINT32 MaxRawDataLength;\r
1834 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1835 EFI_ACPI_6_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1836 UINT32 ErrorStatusBlockLength;\r
1837 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
1838 UINT64 ReadAckPreserve;\r
1839 UINT64 ReadAckWrite;\r
1840} EFI_ACPI_6_1_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
1841\r
1842///\r
1843/// Generic Error Status Definition\r
1844///\r
1845typedef struct {\r
1846 EFI_ACPI_6_1_ERROR_BLOCK_STATUS BlockStatus;\r
1847 UINT32 RawDataOffset;\r
1848 UINT32 RawDataLength;\r
1849 UINT32 DataLength;\r
1850 UINT32 ErrorSeverity;\r
1851} EFI_ACPI_6_1_GENERIC_ERROR_STATUS_STRUCTURE;\r
1852\r
1853///\r
1854/// ERST - Error Record Serialization Table\r
1855///\r
1856typedef struct {\r
1857 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1858 UINT32 SerializationHeaderSize;\r
1859 UINT8 Reserved0[4];\r
1860 UINT32 InstructionEntryCount;\r
1861} EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
1862\r
1863///\r
1864/// ERST Version (as defined in ACPI 6.1 spec.)\r
1865///\r
1866#define EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
1867\r
1868///\r
1869/// ERST Serialization Actions\r
1870///\r
1871#define EFI_ACPI_6_1_ERST_BEGIN_WRITE_OPERATION 0x00\r
1872#define EFI_ACPI_6_1_ERST_BEGIN_READ_OPERATION 0x01\r
1873#define EFI_ACPI_6_1_ERST_BEGIN_CLEAR_OPERATION 0x02\r
1874#define EFI_ACPI_6_1_ERST_END_OPERATION 0x03\r
1875#define EFI_ACPI_6_1_ERST_SET_RECORD_OFFSET 0x04\r
1876#define EFI_ACPI_6_1_ERST_EXECUTE_OPERATION 0x05\r
1877#define EFI_ACPI_6_1_ERST_CHECK_BUSY_STATUS 0x06\r
1878#define EFI_ACPI_6_1_ERST_GET_COMMAND_STATUS 0x07\r
1879#define EFI_ACPI_6_1_ERST_GET_RECORD_IDENTIFIER 0x08\r
1880#define EFI_ACPI_6_1_ERST_SET_RECORD_IDENTIFIER 0x09\r
1881#define EFI_ACPI_6_1_ERST_GET_RECORD_COUNT 0x0A\r
1882#define EFI_ACPI_6_1_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
1883#define EFI_ACPI_6_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
1884#define EFI_ACPI_6_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
1885#define EFI_ACPI_6_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
1886#define EFI_ACPI_6_1_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
1887\r
1888///\r
1889/// ERST Action Command Status\r
1890///\r
1891#define EFI_ACPI_6_1_ERST_STATUS_SUCCESS 0x00\r
1892#define EFI_ACPI_6_1_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
1893#define EFI_ACPI_6_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
1894#define EFI_ACPI_6_1_ERST_STATUS_FAILED 0x03\r
1895#define EFI_ACPI_6_1_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
1896#define EFI_ACPI_6_1_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
1897\r
1898///\r
1899/// ERST Serialization Instructions\r
1900///\r
1901#define EFI_ACPI_6_1_ERST_READ_REGISTER 0x00\r
1902#define EFI_ACPI_6_1_ERST_READ_REGISTER_VALUE 0x01\r
1903#define EFI_ACPI_6_1_ERST_WRITE_REGISTER 0x02\r
1904#define EFI_ACPI_6_1_ERST_WRITE_REGISTER_VALUE 0x03\r
1905#define EFI_ACPI_6_1_ERST_NOOP 0x04\r
1906#define EFI_ACPI_6_1_ERST_LOAD_VAR1 0x05\r
1907#define EFI_ACPI_6_1_ERST_LOAD_VAR2 0x06\r
1908#define EFI_ACPI_6_1_ERST_STORE_VAR1 0x07\r
1909#define EFI_ACPI_6_1_ERST_ADD 0x08\r
1910#define EFI_ACPI_6_1_ERST_SUBTRACT 0x09\r
1911#define EFI_ACPI_6_1_ERST_ADD_VALUE 0x0A\r
1912#define EFI_ACPI_6_1_ERST_SUBTRACT_VALUE 0x0B\r
1913#define EFI_ACPI_6_1_ERST_STALL 0x0C\r
1914#define EFI_ACPI_6_1_ERST_STALL_WHILE_TRUE 0x0D\r
1915#define EFI_ACPI_6_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
1916#define EFI_ACPI_6_1_ERST_GOTO 0x0F\r
1917#define EFI_ACPI_6_1_ERST_SET_SRC_ADDRESS_BASE 0x10\r
1918#define EFI_ACPI_6_1_ERST_SET_DST_ADDRESS_BASE 0x11\r
1919#define EFI_ACPI_6_1_ERST_MOVE_DATA 0x12\r
1920\r
1921///\r
1922/// ERST Instruction Flags\r
1923///\r
1924#define EFI_ACPI_6_1_ERST_PRESERVE_REGISTER 0x01\r
1925\r
1926///\r
1927/// ERST Serialization Instruction Entry\r
1928///\r
1929typedef struct {\r
1930 UINT8 SerializationAction;\r
1931 UINT8 Instruction;\r
1932 UINT8 Flags;\r
1933 UINT8 Reserved0;\r
1934 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
1935 UINT64 Value;\r
1936 UINT64 Mask;\r
1937} EFI_ACPI_6_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
1938\r
1939///\r
1940/// EINJ - Error Injection Table\r
1941///\r
1942typedef struct {\r
1943 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1944 UINT32 InjectionHeaderSize;\r
1945 UINT8 InjectionFlags;\r
1946 UINT8 Reserved0[3];\r
1947 UINT32 InjectionEntryCount;\r
1948} EFI_ACPI_6_1_ERROR_INJECTION_TABLE_HEADER;\r
1949\r
1950///\r
1951/// EINJ Version (as defined in ACPI 6.1 spec.)\r
1952///\r
1953#define EFI_ACPI_6_1_ERROR_INJECTION_TABLE_REVISION 0x01\r
1954\r
1955///\r
1956/// EINJ Error Injection Actions\r
1957///\r
1958#define EFI_ACPI_6_1_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
1959#define EFI_ACPI_6_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
1960#define EFI_ACPI_6_1_EINJ_SET_ERROR_TYPE 0x02\r
1961#define EFI_ACPI_6_1_EINJ_GET_ERROR_TYPE 0x03\r
1962#define EFI_ACPI_6_1_EINJ_END_OPERATION 0x04\r
1963#define EFI_ACPI_6_1_EINJ_EXECUTE_OPERATION 0x05\r
1964#define EFI_ACPI_6_1_EINJ_CHECK_BUSY_STATUS 0x06\r
1965#define EFI_ACPI_6_1_EINJ_GET_COMMAND_STATUS 0x07\r
1966#define EFI_ACPI_6_1_EINJ_TRIGGER_ERROR 0xFF\r
1967\r
1968///\r
1969/// EINJ Action Command Status\r
1970///\r
1971#define EFI_ACPI_6_1_EINJ_STATUS_SUCCESS 0x00\r
1972#define EFI_ACPI_6_1_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
1973#define EFI_ACPI_6_1_EINJ_STATUS_INVALID_ACCESS 0x02\r
1974\r
1975///\r
1976/// EINJ Error Type Definition\r
1977///\r
1978#define EFI_ACPI_6_1_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
1979#define EFI_ACPI_6_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
1980#define EFI_ACPI_6_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
1981#define EFI_ACPI_6_1_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
1982#define EFI_ACPI_6_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
1983#define EFI_ACPI_6_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
1984#define EFI_ACPI_6_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
1985#define EFI_ACPI_6_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
1986#define EFI_ACPI_6_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
1987#define EFI_ACPI_6_1_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
1988#define EFI_ACPI_6_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
1989#define EFI_ACPI_6_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
1990\r
1991///\r
1992/// EINJ Injection Instructions\r
1993///\r
1994#define EFI_ACPI_6_1_EINJ_READ_REGISTER 0x00\r
1995#define EFI_ACPI_6_1_EINJ_READ_REGISTER_VALUE 0x01\r
1996#define EFI_ACPI_6_1_EINJ_WRITE_REGISTER 0x02\r
1997#define EFI_ACPI_6_1_EINJ_WRITE_REGISTER_VALUE 0x03\r
1998#define EFI_ACPI_6_1_EINJ_NOOP 0x04\r
1999\r
2000///\r
2001/// EINJ Instruction Flags\r
2002///\r
2003#define EFI_ACPI_6_1_EINJ_PRESERVE_REGISTER 0x01\r
2004\r
2005///\r
2006/// EINJ Injection Instruction Entry\r
2007///\r
2008typedef struct {\r
2009 UINT8 InjectionAction;\r
2010 UINT8 Instruction;\r
2011 UINT8 Flags;\r
2012 UINT8 Reserved0;\r
2013 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2014 UINT64 Value;\r
2015 UINT64 Mask;\r
2016} EFI_ACPI_6_1_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2017\r
2018///\r
2019/// EINJ Trigger Action Table\r
2020///\r
2021typedef struct {\r
2022 UINT32 HeaderSize;\r
2023 UINT32 Revision;\r
2024 UINT32 TableSize;\r
2025 UINT32 EntryCount;\r
2026} EFI_ACPI_6_1_EINJ_TRIGGER_ACTION_TABLE;\r
2027\r
2028///\r
2029/// Platform Communications Channel Table (PCCT)\r
2030///\r
2031typedef struct {\r
2032 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2033 UINT32 Flags;\r
2034 UINT64 Reserved;\r
2035} EFI_ACPI_6_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2036\r
2037///\r
2038/// PCCT Version (as defined in ACPI 6.1 spec.)\r
2039///\r
2040#define EFI_ACPI_6_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x01\r
2041\r
2042///\r
2043/// PCCT Global Flags\r
2044///\r
2045#define EFI_ACPI_6_1_PCCT_FLAGS_SCI_DOORBELL BIT0\r
2046\r
2047//\r
2048// PCCT Subspace type\r
2049//\r
69ebfa2b
SZ		 2050#define EFI_ACPI_6_1_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2051#define EFI_ACPI_6_1_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2052#define EFI_ACPI_6_1_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
f2e4f2fc
JY		 2053\r
2054///\r
2055/// PCC Subspace Structure Header\r
2056///\r
2057typedef struct {\r
2058 UINT8 Type;\r
2059 UINT8 Length;\r
2060} EFI_ACPI_6_1_PCCT_SUBSPACE_HEADER;\r
2061\r
2062///\r
2063/// Generic Communications Subspace Structure\r
2064///\r
2065typedef struct {\r
2066 UINT8 Type;\r
2067 UINT8 Length;\r
2068 UINT8 Reserved[6];\r
2069 UINT64 BaseAddress;\r
2070 UINT64 AddressLength;\r
2071 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2072 UINT64 DoorbellPreserve;\r
2073 UINT64 DoorbellWrite;\r
2074 UINT32 NominalLatency;\r
2075 UINT32 MaximumPeriodicAccessRate;\r
2076 UINT16 MinimumRequestTurnaroundTime;\r
2077} EFI_ACPI_6_1_PCCT_SUBSPACE_GENERIC;\r
2078\r
2079///\r
2080/// Generic Communications Channel Shared Memory Region\r
2081///\r
2082\r
2083typedef struct {\r
2084 UINT8 Command;\r
2085 UINT8 Reserved:7;\r
2086 UINT8 GenerateSci:1;\r
2087} EFI_ACPI_6_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2088\r
2089typedef struct {\r
2090 UINT8 CommandComplete:1;\r
2091 UINT8 SciDoorbell:1;\r
2092 UINT8 Error:1;\r
9095d37b 2093 UINT8 PlatformNotification:1;\r
f2e4f2fc
JY		 2094 UINT8 Reserved:4;\r
2095 UINT8 Reserved1;\r
2096} EFI_ACPI_6_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2097\r
2098typedef struct {\r
2099 UINT32 Signature;\r
2100 EFI_ACPI_6_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2101 EFI_ACPI_6_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2102} EFI_ACPI_6_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2103\r
69ebfa2b
SZ		 2104#define EFI_ACPI_6_1_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_POLARITY BIT0\r
2105#define EFI_ACPI_6_1_PCCT_SUBSPACE_DOORBELL_INTERRUPT_FLAGS_MODE BIT1\r
2106\r
2107///\r
2108/// Type 1 HW-Reduced Communications Subspace Structure\r
2109///\r
2110typedef struct {\r
2111 UINT8 Type;\r
2112 UINT8 Length;\r
2113 UINT32 DoorbellInterrupt;\r
2114 UINT8 DoorbellInterruptFlags;\r
2115 UINT8 Reserved;\r
2116 UINT64 BaseAddress;\r
2117 UINT64 AddressLength;\r
2118 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2119 UINT64 DoorbellPreserve;\r
2120 UINT64 DoorbellWrite;\r
2121 UINT32 NominalLatency;\r
2122 UINT32 MaximumPeriodicAccessRate;\r
2123 UINT16 MinimumRequestTurnaroundTime;\r
2124} EFI_ACPI_6_1_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2125\r
2126///\r
2127/// Type 2 HW-Reduced Communications Subspace Structure\r
2128///\r
2129typedef struct {\r
2130 UINT8 Type;\r
2131 UINT8 Length;\r
2132 UINT32 DoorbellInterrupt;\r
2133 UINT8 DoorbellInterruptFlags;\r
2134 UINT8 Reserved;\r
2135 UINT64 BaseAddress;\r
2136 UINT64 AddressLength;\r
2137 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2138 UINT64 DoorbellPreserve;\r
2139 UINT64 DoorbellWrite;\r
2140 UINT32 NominalLatency;\r
2141 UINT32 MaximumPeriodicAccessRate;\r
2142 UINT16 MinimumRequestTurnaroundTime;\r
2143 EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE DoorbellAckRegister;\r
2144 UINT64 DoorbellAckPreserve;\r
2145 UINT64 DoorbellAckWrite;\r
2146} EFI_ACPI_6_1_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2147\r
f2e4f2fc
JY		 2148//\r
2149// Known table signatures\r
2150//\r
2151\r
2152///\r
2153/// "RSD PTR " Root System Description Pointer\r
2154///\r
9095d37b 2155#define EFI_ACPI_6_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
f2e4f2fc
JY		 2156\r
2157///\r
2158/// "APIC" Multiple APIC Description Table\r
2159///\r
2160#define EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2161\r
2162///\r
2163/// "BERT" Boot Error Record Table\r
2164///\r
2165#define EFI_ACPI_6_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2166\r
2167///\r
2168/// "BGRT" Boot Graphics Resource Table\r
2169///\r
2170#define EFI_ACPI_6_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2171\r
2172///\r
2173/// "CPEP" Corrected Platform Error Polling Table\r
2174///\r
2175#define EFI_ACPI_6_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2176\r
2177///\r
2178/// "DSDT" Differentiated System Description Table\r
2179///\r
2180#define EFI_ACPI_6_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2181\r
2182///\r
2183/// "ECDT" Embedded Controller Boot Resources Table\r
2184///\r
2185#define EFI_ACPI_6_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2186\r
2187///\r
2188/// "EINJ" Error Injection Table\r
2189///\r
2190#define EFI_ACPI_6_1_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2191\r
2192///\r
2193/// "ERST" Error Record Serialization Table\r
2194///\r
2195#define EFI_ACPI_6_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2196\r
2197///\r
2198/// "FACP" Fixed ACPI Description Table\r
2199///\r
2200#define EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2201\r
2202///\r
2203/// "FACS" Firmware ACPI Control Structure\r
2204///\r
2205#define EFI_ACPI_6_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2206\r
2207///\r
2208/// "FPDT" Firmware Performance Data Table\r
2209///\r
2210#define EFI_ACPI_6_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2211\r
2212///\r
2213/// "GTDT" Generic Timer Description Table\r
2214///\r
2215#define EFI_ACPI_6_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2216\r
2217///\r
2218/// "HEST" Hardware Error Source Table\r
2219///\r
2220#define EFI_ACPI_6_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2221\r
2222///\r
2223/// "MPST" Memory Power State Table\r
2224///\r
2225#define EFI_ACPI_6_1_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2226\r
2227///\r
2228/// "MSCT" Maximum System Characteristics Table\r
2229///\r
2230#define EFI_ACPI_6_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2231\r
2232///\r
2233/// "NFIT" NVDIMM Firmware Interface Table\r
2234///\r
2235#define EFI_ACPI_6_1_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2236\r
2237///\r
2238/// "PMTT" Platform Memory Topology Table\r
2239///\r
2240#define EFI_ACPI_6_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2241\r
2242///\r
2243/// "PSDT" Persistent System Description Table\r
2244///\r
2245#define EFI_ACPI_6_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2246\r
2247///\r
2248/// "RASF" ACPI RAS Feature Table\r
2249///\r
2250#define EFI_ACPI_6_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2251\r
2252///\r
2253/// "RSDT" Root System Description Table\r
2254///\r
2255#define EFI_ACPI_6_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2256\r
2257///\r
2258/// "SBST" Smart Battery Specification Table\r
2259///\r
2260#define EFI_ACPI_6_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2261\r
2262///\r
2263/// "SLIT" System Locality Information Table\r
2264///\r
2265#define EFI_ACPI_6_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2266\r
2267///\r
2268/// "SRAT" System Resource Affinity Table\r
2269///\r
2270#define EFI_ACPI_6_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2271\r
2272///\r
2273/// "SSDT" Secondary System Description Table\r
2274///\r
2275#define EFI_ACPI_6_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2276\r
2277///\r
2278/// "XSDT" Extended System Description Table\r
2279///\r
2280#define EFI_ACPI_6_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2281\r
2282///\r
2283/// "BOOT" MS Simple Boot Spec\r
2284///\r
2285#define EFI_ACPI_6_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2286\r
2287///\r
2288/// "CSRT" MS Core System Resource Table\r
2289///\r
2290#define EFI_ACPI_6_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2291\r
2292///\r
2293/// "DBG2" MS Debug Port 2 Spec\r
2294///\r
2295#define EFI_ACPI_6_1_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2296\r
2297///\r
2298/// "DBGP" MS Debug Port Spec\r
2299///\r
2300#define EFI_ACPI_6_1_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2301\r
2302///\r
2303/// "DMAR" DMA Remapping Table\r
2304///\r
2305#define EFI_ACPI_6_1_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2306\r
2307///\r
2308/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2309///\r
2310#define EFI_ACPI_6_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2311\r
2312///\r
2313/// "ETDT" Event Timer Description Table\r
2314///\r
2315#define EFI_ACPI_6_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2316\r
2317///\r
2318/// "HPET" IA-PC High Precision Event Timer Table\r
2319///\r
2320#define EFI_ACPI_6_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2321\r
2322///\r
2323/// "iBFT" iSCSI Boot Firmware Table\r
2324///\r
2325#define EFI_ACPI_6_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2326\r
2327///\r
8b2a15fd 2328/// "IORT" I/O Remapping Table\r
f2e4f2fc 2329///\r
8b2a15fd 2330#define EFI_ACPI_6_1_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
f2e4f2fc
JY		 2331\r
2332///\r
2333/// "IVRS" I/O Virtualization Reporting Structure\r
2334///\r
2335#define EFI_ACPI_6_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2336\r
2337///\r
2338/// "LPIT" Low Power Idle Table\r
2339///\r
2340#define EFI_ACPI_6_1_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2341\r
2342///\r
2343/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2344///\r
2345#define EFI_ACPI_6_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2346\r
2347///\r
2348/// "MCHI" Management Controller Host Interface Table\r
2349///\r
2350#define EFI_ACPI_6_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2351\r
2352///\r
2353/// "MSDM" MS Data Management Table\r
2354///\r
2355#define EFI_ACPI_6_1_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2356\r
a67efa3b
KK		 2357///\r
2358/// "PCCT" Platform Communications Channel Table\r
2359///\r
2360#define EFI_ACPI_6_1_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')\r
2361\r
f2e4f2fc
JY		 2362///\r
2363/// "SLIC" MS Software Licensing Table Specification\r
2364///\r
2365#define EFI_ACPI_6_1_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2366\r
2367///\r
b219e2cd 2368/// "SPCR" Serial Port Console Redirection Table\r
f2e4f2fc
JY		 2369///\r
2370#define EFI_ACPI_6_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2371\r
2372///\r
2373/// "SPMI" Server Platform Management Interface Table\r
2374///\r
2375#define EFI_ACPI_6_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2376\r
2377///\r
2378/// "STAO" _STA Override Table\r
2379///\r
2380#define EFI_ACPI_6_1_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
2381\r
2382///\r
2383/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2384///\r
2385#define EFI_ACPI_6_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2386\r
2387///\r
2388/// "TPM2" Trusted Computing Platform 1 Table\r
2389///\r
2390#define EFI_ACPI_6_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2391\r
2392///\r
2393/// "UEFI" UEFI ACPI Data Table\r
2394///\r
2395#define EFI_ACPI_6_1_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2396\r
2397///\r
2398/// "WAET" Windows ACPI Emulated Devices Table\r
2399///\r
2400#define EFI_ACPI_6_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2401\r
2402///\r
2403/// "WDAT" Watchdog Action Table\r
2404///\r
2405#define EFI_ACPI_6_1_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2406\r
2407///\r
2408/// "WDRT" Watchdog Resource Table\r
2409///\r
2410#define EFI_ACPI_6_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2411\r
2412///\r
2413/// "WPBT" MS Platform Binary Table\r
2414///\r
2415#define EFI_ACPI_6_1_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2416\r
2417///\r
2418/// "XENV" Xen Project Table\r
2419///\r
2420#define EFI_ACPI_6_1_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
2421\r
2422#pragma pack()\r
2423\r
2424#endif\r
EFI Development Kit II mirror for PVE