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MdePkg: Fix ACPI memory aggregator/device type mismatch
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi62.h
CommitLineData
e67b675d
SZ		 1/** @file\r
2 ACPI 6.2 definitions from the ACPI Specification Revision 6.2 May, 2017.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
a67efa3b 5 Copyright (c) 2020, ARM Ltd. All rights reserved.<BR>\r
9344f092 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
e67b675d
SZ		 7**/\r
8\r
9#ifndef _ACPI_6_2_H_\r
10#define _ACPI_6_2_H_\r
11\r
12#include <IndustryStandard/Acpi61.h>\r
13\r
14//\r
15// Large Item Descriptor Name\r
16//\r
17#define ACPI_LARGE_PIN_FUNCTION_DESCRIPTOR_NAME 0x0D\r
18#define ACPI_LARGE_PIN_CONFIGURATION_DESCRIPTOR_NAME 0x0F\r
19#define ACPI_LARGE_PIN_GROUP_DESCRIPTOR_NAME 0x10\r
20#define ACPI_LARGE_PIN_GROUP_FUNCTION_DESCRIPTOR_NAME 0x11\r
21#define ACPI_LARGE_PIN_GROUP_CONFIGURATION_DESCRIPTOR_NAME 0x12\r
22\r
23//\r
24// Large Item Descriptor Value\r
25//\r
26#define ACPI_PIN_FUNCTION_DESCRIPTOR 0x8D\r
27#define ACPI_PIN_CONFIGURATION_DESCRIPTOR 0x8F\r
28#define ACPI_PIN_GROUP_DESCRIPTOR 0x90\r
29#define ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR 0x91\r
30#define ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR 0x92\r
31\r
32#pragma pack(1)\r
33\r
34///\r
35/// Pin Function Descriptor\r
36///\r
37typedef PACKED struct {\r
38 ACPI_LARGE_RESOURCE_HEADER Header;\r
39 UINT8 RevisionId;\r
40 UINT16 Flags;\r
41 UINT8 PinPullConfiguration;\r
42 UINT16 FunctionNumber;\r
43 UINT16 PinTableOffset;\r
44 UINT8 ResourceSourceIndex;\r
45 UINT16 ResourceSourceNameOffset;\r
46 UINT16 VendorDataOffset;\r
47 UINT16 VendorDataLength;\r
48} EFI_ACPI_PIN_FUNCTION_DESCRIPTOR;\r
49\r
50///\r
51/// Pin Configuration Descriptor\r
52///\r
53typedef PACKED struct {\r
54 ACPI_LARGE_RESOURCE_HEADER Header;\r
55 UINT8 RevisionId;\r
56 UINT16 Flags;\r
57 UINT8 PinConfigurationType;\r
58 UINT32 PinConfigurationValue;\r
59 UINT16 PinTableOffset;\r
60 UINT8 ResourceSourceIndex;\r
61 UINT16 ResourceSourceNameOffset;\r
62 UINT16 VendorDataOffset;\r
63 UINT16 VendorDataLength;\r
64} EFI_ACPI_PIN_CONFIGURATION_DESCRIPTOR;\r
65\r
66///\r
67/// Pin Group Descriptor\r
68///\r
69typedef PACKED struct {\r
70 ACPI_LARGE_RESOURCE_HEADER Header;\r
71 UINT8 RevisionId;\r
72 UINT16 Flags;\r
73 UINT16 PinTableOffset;\r
74 UINT16 ResourceLabelOffset;\r
75 UINT16 VendorDataOffset;\r
76 UINT16 VendorDataLength;\r
77} EFI_ACPI_PIN_GROUP_DESCRIPTOR;\r
78\r
79///\r
80/// Pin Group Function Descriptor\r
81///\r
82typedef PACKED struct {\r
83 ACPI_LARGE_RESOURCE_HEADER Header;\r
84 UINT8 RevisionId;\r
85 UINT16 Flags;\r
86 UINT16 FunctionNumber;\r
87 UINT8 ResourceSourceIndex;\r
88 UINT16 ResourceSourceNameOffset;\r
89 UINT16 ResourceSourceLabelOffset;\r
90 UINT16 VendorDataOffset;\r
91 UINT16 VendorDataLength;\r
92} EFI_ACPI_PIN_GROUP_FUNCTION_DESCRIPTOR;\r
93\r
94///\r
95/// Pin Group Configuration Descriptor\r
96///\r
97typedef PACKED struct {\r
98 ACPI_LARGE_RESOURCE_HEADER Header;\r
99 UINT8 RevisionId;\r
100 UINT16 Flags;\r
101 UINT8 PinConfigurationType;\r
102 UINT32 PinConfigurationValue;\r
103 UINT8 ResourceSourceIndex;\r
104 UINT16 ResourceSourceNameOffset;\r
105 UINT16 ResourceSourceLabelOffset;\r
106 UINT16 VendorDataOffset;\r
107 UINT16 VendorDataLength;\r
108} EFI_ACPI_PIN_GROUP_CONFIGURATION_DESCRIPTOR;\r
109\r
110#pragma pack()\r
111\r
112//\r
113// Ensure proper structure formats\r
114//\r
115#pragma pack(1)\r
116\r
117///\r
118/// ACPI 6.2 Generic Address Space definition\r
119///\r
120typedef struct {\r
121 UINT8 AddressSpaceId;\r
122 UINT8 RegisterBitWidth;\r
123 UINT8 RegisterBitOffset;\r
124 UINT8 AccessSize;\r
125 UINT64 Address;\r
126} EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE;\r
127\r
128//\r
129// Generic Address Space Address IDs\r
130//\r
131#define EFI_ACPI_6_2_SYSTEM_MEMORY 0\r
132#define EFI_ACPI_6_2_SYSTEM_IO 1\r
133#define EFI_ACPI_6_2_PCI_CONFIGURATION_SPACE 2\r
134#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER 3\r
135#define EFI_ACPI_6_2_SMBUS 4\r
136#define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
137#define EFI_ACPI_6_2_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
138\r
139//\r
140// Generic Address Space Access Sizes\r
141//\r
142#define EFI_ACPI_6_2_UNDEFINED 0\r
143#define EFI_ACPI_6_2_BYTE 1\r
144#define EFI_ACPI_6_2_WORD 2\r
145#define EFI_ACPI_6_2_DWORD 3\r
146#define EFI_ACPI_6_2_QWORD 4\r
147\r
148//\r
149// ACPI 6.2 table structures\r
150//\r
151\r
152///\r
153/// Root System Description Pointer Structure\r
154///\r
155typedef struct {\r
156 UINT64 Signature;\r
157 UINT8 Checksum;\r
158 UINT8 OemId[6];\r
159 UINT8 Revision;\r
160 UINT32 RsdtAddress;\r
161 UINT32 Length;\r
162 UINT64 XsdtAddress;\r
163 UINT8 ExtendedChecksum;\r
164 UINT8 Reserved[3];\r
165} EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
166\r
167///\r
168/// RSD_PTR Revision (as defined in ACPI 6.2 spec.)\r
169///\r
170#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.2) says current value is 2\r
171\r
172///\r
173/// Common table header, this prefaces all ACPI tables, including FACS, but\r
174/// excluding the RSD PTR structure\r
175///\r
176typedef struct {\r
177 UINT32 Signature;\r
178 UINT32 Length;\r
179} EFI_ACPI_6_2_COMMON_HEADER;\r
180\r
181//\r
182// Root System Description Table\r
183// No definition needed as it is a common description table header, the same with\r
184// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
185//\r
186\r
187///\r
188/// RSDT Revision (as defined in ACPI 6.2 spec.)\r
189///\r
190#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
191\r
192//\r
193// Extended System Description Table\r
194// No definition needed as it is a common description table header, the same with\r
195// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
196//\r
197\r
198///\r
199/// XSDT Revision (as defined in ACPI 6.2 spec.)\r
200///\r
201#define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
202\r
203///\r
204/// Fixed ACPI Description Table Structure (FADT)\r
205///\r
206typedef struct {\r
207 EFI_ACPI_DESCRIPTION_HEADER Header;\r
208 UINT32 FirmwareCtrl;\r
209 UINT32 Dsdt;\r
210 UINT8 Reserved0;\r
211 UINT8 PreferredPmProfile;\r
212 UINT16 SciInt;\r
213 UINT32 SmiCmd;\r
214 UINT8 AcpiEnable;\r
215 UINT8 AcpiDisable;\r
216 UINT8 S4BiosReq;\r
217 UINT8 PstateCnt;\r
218 UINT32 Pm1aEvtBlk;\r
219 UINT32 Pm1bEvtBlk;\r
220 UINT32 Pm1aCntBlk;\r
221 UINT32 Pm1bCntBlk;\r
222 UINT32 Pm2CntBlk;\r
223 UINT32 PmTmrBlk;\r
224 UINT32 Gpe0Blk;\r
225 UINT32 Gpe1Blk;\r
226 UINT8 Pm1EvtLen;\r
227 UINT8 Pm1CntLen;\r
228 UINT8 Pm2CntLen;\r
229 UINT8 PmTmrLen;\r
230 UINT8 Gpe0BlkLen;\r
231 UINT8 Gpe1BlkLen;\r
232 UINT8 Gpe1Base;\r
233 UINT8 CstCnt;\r
234 UINT16 PLvl2Lat;\r
235 UINT16 PLvl3Lat;\r
236 UINT16 FlushSize;\r
237 UINT16 FlushStride;\r
238 UINT8 DutyOffset;\r
239 UINT8 DutyWidth;\r
240 UINT8 DayAlrm;\r
241 UINT8 MonAlrm;\r
242 UINT8 Century;\r
243 UINT16 IaPcBootArch;\r
244 UINT8 Reserved1;\r
245 UINT32 Flags;\r
246 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
247 UINT8 ResetValue;\r
248 UINT16 ArmBootArch;\r
249 UINT8 MinorVersion;\r
250 UINT64 XFirmwareCtrl;\r
251 UINT64 XDsdt;\r
252 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
253 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
254 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
255 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
256 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
257 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
258 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
259 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
260 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
261 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
262 UINT64 HypervisorVendorIdentity;\r
263} EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE;\r
264\r
265///\r
266/// FADT Version (as defined in ACPI 6.2 spec.)\r
267///\r
268#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
269#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x02\r
270\r
271//\r
272// Fixed ACPI Description Table Preferred Power Management Profile\r
273//\r
274#define EFI_ACPI_6_2_PM_PROFILE_UNSPECIFIED 0\r
275#define EFI_ACPI_6_2_PM_PROFILE_DESKTOP 1\r
276#define EFI_ACPI_6_2_PM_PROFILE_MOBILE 2\r
277#define EFI_ACPI_6_2_PM_PROFILE_WORKSTATION 3\r
278#define EFI_ACPI_6_2_PM_PROFILE_ENTERPRISE_SERVER 4\r
279#define EFI_ACPI_6_2_PM_PROFILE_SOHO_SERVER 5\r
280#define EFI_ACPI_6_2_PM_PROFILE_APPLIANCE_PC 6\r
281#define EFI_ACPI_6_2_PM_PROFILE_PERFORMANCE_SERVER 7\r
282#define EFI_ACPI_6_2_PM_PROFILE_TABLET 8\r
283\r
284//\r
285// Fixed ACPI Description Table Boot Architecture Flags\r
286// All other bits are reserved and must be set to 0.\r
287//\r
288#define EFI_ACPI_6_2_LEGACY_DEVICES BIT0\r
289#define EFI_ACPI_6_2_8042 BIT1\r
290#define EFI_ACPI_6_2_VGA_NOT_PRESENT BIT2\r
291#define EFI_ACPI_6_2_MSI_NOT_SUPPORTED BIT3\r
292#define EFI_ACPI_6_2_PCIE_ASPM_CONTROLS BIT4\r
293#define EFI_ACPI_6_2_CMOS_RTC_NOT_PRESENT BIT5\r
294\r
295//\r
296// Fixed ACPI Description Table Arm Boot Architecture Flags\r
297// All other bits are reserved and must be set to 0.\r
298//\r
299#define EFI_ACPI_6_2_ARM_PSCI_COMPLIANT BIT0\r
300#define EFI_ACPI_6_2_ARM_PSCI_USE_HVC BIT1\r
301\r
302//\r
303// Fixed ACPI Description Table Fixed Feature Flags\r
304// All other bits are reserved and must be set to 0.\r
305//\r
306#define EFI_ACPI_6_2_WBINVD BIT0\r
307#define EFI_ACPI_6_2_WBINVD_FLUSH BIT1\r
308#define EFI_ACPI_6_2_PROC_C1 BIT2\r
309#define EFI_ACPI_6_2_P_LVL2_UP BIT3\r
310#define EFI_ACPI_6_2_PWR_BUTTON BIT4\r
311#define EFI_ACPI_6_2_SLP_BUTTON BIT5\r
312#define EFI_ACPI_6_2_FIX_RTC BIT6\r
313#define EFI_ACPI_6_2_RTC_S4 BIT7\r
314#define EFI_ACPI_6_2_TMR_VAL_EXT BIT8\r
315#define EFI_ACPI_6_2_DCK_CAP BIT9\r
316#define EFI_ACPI_6_2_RESET_REG_SUP BIT10\r
317#define EFI_ACPI_6_2_SEALED_CASE BIT11\r
318#define EFI_ACPI_6_2_HEADLESS BIT12\r
319#define EFI_ACPI_6_2_CPU_SW_SLP BIT13\r
320#define EFI_ACPI_6_2_PCI_EXP_WAK BIT14\r
321#define EFI_ACPI_6_2_USE_PLATFORM_CLOCK BIT15\r
322#define EFI_ACPI_6_2_S4_RTC_STS_VALID BIT16\r
323#define EFI_ACPI_6_2_REMOTE_POWER_ON_CAPABLE BIT17\r
324#define EFI_ACPI_6_2_FORCE_APIC_CLUSTER_MODEL BIT18\r
325#define EFI_ACPI_6_2_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
326#define EFI_ACPI_6_2_HW_REDUCED_ACPI BIT20\r
327#define EFI_ACPI_6_2_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
328\r
329///\r
330/// Firmware ACPI Control Structure\r
331///\r
332typedef struct {\r
333 UINT32 Signature;\r
334 UINT32 Length;\r
335 UINT32 HardwareSignature;\r
336 UINT32 FirmwareWakingVector;\r
337 UINT32 GlobalLock;\r
338 UINT32 Flags;\r
339 UINT64 XFirmwareWakingVector;\r
340 UINT8 Version;\r
341 UINT8 Reserved0[3];\r
342 UINT32 OspmFlags;\r
343 UINT8 Reserved1[24];\r
344} EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
345\r
346///\r
347/// FACS Version (as defined in ACPI 6.2 spec.)\r
348///\r
349#define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
350\r
351///\r
352/// Firmware Control Structure Feature Flags\r
353/// All other bits are reserved and must be set to 0.\r
354///\r
355#define EFI_ACPI_6_2_S4BIOS_F BIT0\r
356#define EFI_ACPI_6_2_64BIT_WAKE_SUPPORTED_F BIT1\r
357\r
358///\r
359/// OSPM Enabled Firmware Control Structure Flags\r
360/// All other bits are reserved and must be set to 0.\r
361///\r
362#define EFI_ACPI_6_2_OSPM_64BIT_WAKE_F BIT0\r
363\r
364//\r
365// Differentiated System Description Table,\r
366// Secondary System Description Table\r
367// and Persistent System Description Table,\r
368// no definition needed as they are common description table header, the same with\r
369// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
370//\r
371#define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
372#define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
373\r
374///\r
375/// Multiple APIC Description Table header definition. The rest of the table\r
376/// must be defined in a platform specific manner.\r
377///\r
378typedef struct {\r
379 EFI_ACPI_DESCRIPTION_HEADER Header;\r
380 UINT32 LocalApicAddress;\r
381 UINT32 Flags;\r
382} EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
383\r
384///\r
385/// MADT Revision (as defined in ACPI 6.2 spec.)\r
386///\r
387#define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x04\r
388\r
389///\r
390/// Multiple APIC Flags\r
391/// All other bits are reserved and must be set to 0.\r
392///\r
393#define EFI_ACPI_6_2_PCAT_COMPAT BIT0\r
394\r
395//\r
396// Multiple APIC Description Table APIC structure types\r
397// All other values between 0x0D and 0x7F are reserved and\r
398// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
399//\r
400#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC 0x00\r
401#define EFI_ACPI_6_2_IO_APIC 0x01\r
402#define EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE 0x02\r
403#define EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
404#define EFI_ACPI_6_2_LOCAL_APIC_NMI 0x04\r
405#define EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
406#define EFI_ACPI_6_2_IO_SAPIC 0x06\r
407#define EFI_ACPI_6_2_LOCAL_SAPIC 0x07\r
408#define EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES 0x08\r
409#define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC 0x09\r
410#define EFI_ACPI_6_2_LOCAL_X2APIC_NMI 0x0A\r
411#define EFI_ACPI_6_2_GIC 0x0B\r
412#define EFI_ACPI_6_2_GICD 0x0C\r
413#define EFI_ACPI_6_2_GIC_MSI_FRAME 0x0D\r
414#define EFI_ACPI_6_2_GICR 0x0E\r
415#define EFI_ACPI_6_2_GIC_ITS 0x0F\r
416\r
417//\r
418// APIC Structure Definitions\r
419//\r
420\r
421///\r
422/// Processor Local APIC Structure Definition\r
423///\r
424typedef struct {\r
425 UINT8 Type;\r
426 UINT8 Length;\r
427 UINT8 AcpiProcessorUid;\r
428 UINT8 ApicId;\r
429 UINT32 Flags;\r
430} EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
431\r
432///\r
433/// Local APIC Flags. All other bits are reserved and must be 0.\r
434///\r
435#define EFI_ACPI_6_2_LOCAL_APIC_ENABLED BIT0\r
436\r
437///\r
438/// IO APIC Structure\r
439///\r
440typedef struct {\r
441 UINT8 Type;\r
442 UINT8 Length;\r
443 UINT8 IoApicId;\r
444 UINT8 Reserved;\r
445 UINT32 IoApicAddress;\r
446 UINT32 GlobalSystemInterruptBase;\r
447} EFI_ACPI_6_2_IO_APIC_STRUCTURE;\r
448\r
449///\r
450/// Interrupt Source Override Structure\r
451///\r
452typedef struct {\r
453 UINT8 Type;\r
454 UINT8 Length;\r
455 UINT8 Bus;\r
456 UINT8 Source;\r
457 UINT32 GlobalSystemInterrupt;\r
458 UINT16 Flags;\r
459} EFI_ACPI_6_2_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
460\r
461///\r
462/// Platform Interrupt Sources Structure Definition\r
463///\r
464typedef struct {\r
465 UINT8 Type;\r
466 UINT8 Length;\r
467 UINT16 Flags;\r
468 UINT8 InterruptType;\r
469 UINT8 ProcessorId;\r
470 UINT8 ProcessorEid;\r
471 UINT8 IoSapicVector;\r
472 UINT32 GlobalSystemInterrupt;\r
473 UINT32 PlatformInterruptSourceFlags;\r
474 UINT8 CpeiProcessorOverride;\r
475 UINT8 Reserved[31];\r
476} EFI_ACPI_6_2_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
477\r
478//\r
479// MPS INTI flags.\r
480// All other bits are reserved and must be set to 0.\r
481//\r
482#define EFI_ACPI_6_2_POLARITY (3 << 0)\r
483#define EFI_ACPI_6_2_TRIGGER_MODE (3 << 2)\r
484\r
485///\r
486/// Non-Maskable Interrupt Source Structure\r
487///\r
488typedef struct {\r
489 UINT8 Type;\r
490 UINT8 Length;\r
491 UINT16 Flags;\r
492 UINT32 GlobalSystemInterrupt;\r
493} EFI_ACPI_6_2_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
494\r
495///\r
496/// Local APIC NMI Structure\r
497///\r
498typedef struct {\r
499 UINT8 Type;\r
500 UINT8 Length;\r
501 UINT8 AcpiProcessorUid;\r
502 UINT16 Flags;\r
503 UINT8 LocalApicLint;\r
504} EFI_ACPI_6_2_LOCAL_APIC_NMI_STRUCTURE;\r
505\r
506///\r
507/// Local APIC Address Override Structure\r
508///\r
509typedef struct {\r
510 UINT8 Type;\r
511 UINT8 Length;\r
512 UINT16 Reserved;\r
513 UINT64 LocalApicAddress;\r
514} EFI_ACPI_6_2_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
515\r
516///\r
517/// IO SAPIC Structure\r
518///\r
519typedef struct {\r
520 UINT8 Type;\r
521 UINT8 Length;\r
522 UINT8 IoApicId;\r
523 UINT8 Reserved;\r
524 UINT32 GlobalSystemInterruptBase;\r
525 UINT64 IoSapicAddress;\r
526} EFI_ACPI_6_2_IO_SAPIC_STRUCTURE;\r
527\r
528///\r
529/// Local SAPIC Structure\r
530/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
531///\r
532typedef struct {\r
533 UINT8 Type;\r
534 UINT8 Length;\r
535 UINT8 AcpiProcessorId;\r
536 UINT8 LocalSapicId;\r
537 UINT8 LocalSapicEid;\r
538 UINT8 Reserved[3];\r
539 UINT32 Flags;\r
540 UINT32 ACPIProcessorUIDValue;\r
541} EFI_ACPI_6_2_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
542\r
543///\r
544/// Platform Interrupt Sources Structure\r
545///\r
546typedef struct {\r
547 UINT8 Type;\r
548 UINT8 Length;\r
549 UINT16 Flags;\r
550 UINT8 InterruptType;\r
551 UINT8 ProcessorId;\r
552 UINT8 ProcessorEid;\r
553 UINT8 IoSapicVector;\r
554 UINT32 GlobalSystemInterrupt;\r
555 UINT32 PlatformInterruptSourceFlags;\r
556} EFI_ACPI_6_2_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
557\r
558///\r
559/// Platform Interrupt Source Flags.\r
560/// All other bits are reserved and must be set to 0.\r
561///\r
562#define EFI_ACPI_6_2_CPEI_PROCESSOR_OVERRIDE BIT0\r
563\r
564///\r
565/// Processor Local x2APIC Structure Definition\r
566///\r
567typedef struct {\r
568 UINT8 Type;\r
569 UINT8 Length;\r
570 UINT8 Reserved[2];\r
571 UINT32 X2ApicId;\r
572 UINT32 Flags;\r
573 UINT32 AcpiProcessorUid;\r
574} EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
575\r
576///\r
577/// Local x2APIC NMI Structure\r
578///\r
579typedef struct {\r
580 UINT8 Type;\r
581 UINT8 Length;\r
582 UINT16 Flags;\r
583 UINT32 AcpiProcessorUid;\r
584 UINT8 LocalX2ApicLint;\r
585 UINT8 Reserved[3];\r
586} EFI_ACPI_6_2_LOCAL_X2APIC_NMI_STRUCTURE;\r
587\r
588///\r
589/// GIC Structure\r
590///\r
591typedef struct {\r
592 UINT8 Type;\r
593 UINT8 Length;\r
594 UINT16 Reserved;\r
595 UINT32 CPUInterfaceNumber;\r
596 UINT32 AcpiProcessorUid;\r
597 UINT32 Flags;\r
598 UINT32 ParkingProtocolVersion;\r
599 UINT32 PerformanceInterruptGsiv;\r
600 UINT64 ParkedAddress;\r
601 UINT64 PhysicalBaseAddress;\r
602 UINT64 GICV;\r
603 UINT64 GICH;\r
604 UINT32 VGICMaintenanceInterrupt;\r
605 UINT64 GICRBaseAddress;\r
606 UINT64 MPIDR;\r
607 UINT8 ProcessorPowerEfficiencyClass;\r
608 UINT8 Reserved2[3];\r
609} EFI_ACPI_6_2_GIC_STRUCTURE;\r
610\r
611///\r
612/// GIC Flags. All other bits are reserved and must be 0.\r
613///\r
614#define EFI_ACPI_6_2_GIC_ENABLED BIT0\r
615#define EFI_ACPI_6_2_PERFORMANCE_INTERRUPT_MODEL BIT1\r
616#define EFI_ACPI_6_2_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
617\r
618///\r
619/// GIC Distributor Structure\r
620///\r
621typedef struct {\r
622 UINT8 Type;\r
623 UINT8 Length;\r
624 UINT16 Reserved1;\r
625 UINT32 GicId;\r
626 UINT64 PhysicalBaseAddress;\r
627 UINT32 SystemVectorBase;\r
628 UINT8 GicVersion;\r
629 UINT8 Reserved2[3];\r
630} EFI_ACPI_6_2_GIC_DISTRIBUTOR_STRUCTURE;\r
631\r
632///\r
633/// GIC Version\r
634///\r
635#define EFI_ACPI_6_2_GIC_V1 0x01\r
636#define EFI_ACPI_6_2_GIC_V2 0x02\r
637#define EFI_ACPI_6_2_GIC_V3 0x03\r
638#define EFI_ACPI_6_2_GIC_V4 0x04\r
639\r
640///\r
641/// GIC MSI Frame Structure\r
642///\r
643typedef struct {\r
644 UINT8 Type;\r
645 UINT8 Length;\r
646 UINT16 Reserved1;\r
647 UINT32 GicMsiFrameId;\r
648 UINT64 PhysicalBaseAddress;\r
649 UINT32 Flags;\r
650 UINT16 SPICount;\r
651 UINT16 SPIBase;\r
652} EFI_ACPI_6_2_GIC_MSI_FRAME_STRUCTURE;\r
653\r
654///\r
655/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
656///\r
657#define EFI_ACPI_6_2_SPI_COUNT_BASE_SELECT BIT0\r
658\r
659///\r
660/// GICR Structure\r
661///\r
662typedef struct {\r
663 UINT8 Type;\r
664 UINT8 Length;\r
665 UINT16 Reserved;\r
666 UINT64 DiscoveryRangeBaseAddress;\r
667 UINT32 DiscoveryRangeLength;\r
668} EFI_ACPI_6_2_GICR_STRUCTURE;\r
669\r
670///\r
671/// GIC Interrupt Translation Service Structure\r
672///\r
673typedef struct {\r
674 UINT8 Type;\r
675 UINT8 Length;\r
676 UINT16 Reserved;\r
677 UINT32 GicItsId;\r
678 UINT64 PhysicalBaseAddress;\r
679 UINT32 Reserved2;\r
680} EFI_ACPI_6_2_GIC_ITS_STRUCTURE;\r
681\r
682///\r
683/// Smart Battery Description Table (SBST)\r
684///\r
685typedef struct {\r
686 EFI_ACPI_DESCRIPTION_HEADER Header;\r
687 UINT32 WarningEnergyLevel;\r
688 UINT32 LowEnergyLevel;\r
689 UINT32 CriticalEnergyLevel;\r
690} EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE;\r
691\r
692///\r
693/// SBST Version (as defined in ACPI 6.2 spec.)\r
694///\r
695#define EFI_ACPI_6_2_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
696\r
697///\r
698/// Embedded Controller Boot Resources Table (ECDT)\r
699/// The table is followed by a null terminated ASCII string that contains\r
700/// a fully qualified reference to the name space object.\r
701///\r
702typedef struct {\r
703 EFI_ACPI_DESCRIPTION_HEADER Header;\r
704 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcControl;\r
705 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE EcData;\r
706 UINT32 Uid;\r
707 UINT8 GpeBit;\r
708} EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
709\r
710///\r
711/// ECDT Version (as defined in ACPI 6.2 spec.)\r
712///\r
713#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
714\r
715///\r
716/// System Resource Affinity Table (SRAT). The rest of the table\r
717/// must be defined in a platform specific manner.\r
718///\r
719typedef struct {\r
720 EFI_ACPI_DESCRIPTION_HEADER Header;\r
721 UINT32 Reserved1; ///< Must be set to 1\r
722 UINT64 Reserved2;\r
723} EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
724\r
725///\r
726/// SRAT Version (as defined in ACPI 6.2 spec.)\r
727///\r
728#define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
729\r
730//\r
731// SRAT structure types.\r
732// All other values between 0x05 an 0xFF are reserved and\r
733// will be ignored by OSPM.\r
734//\r
735#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
736#define EFI_ACPI_6_2_MEMORY_AFFINITY 0x01\r
737#define EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
738#define EFI_ACPI_6_2_GICC_AFFINITY 0x03\r
739#define EFI_ACPI_6_2_GIC_ITS_AFFINITY 0x04\r
740\r
741///\r
742/// Processor Local APIC/SAPIC Affinity Structure Definition\r
743///\r
744typedef struct {\r
745 UINT8 Type;\r
746 UINT8 Length;\r
747 UINT8 ProximityDomain7To0;\r
748 UINT8 ApicId;\r
749 UINT32 Flags;\r
750 UINT8 LocalSapicEid;\r
751 UINT8 ProximityDomain31To8[3];\r
752 UINT32 ClockDomain;\r
753} EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
754\r
755///\r
756/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
757///\r
758#define EFI_ACPI_6_2_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
759\r
760///\r
761/// Memory Affinity Structure Definition\r
762///\r
763typedef struct {\r
764 UINT8 Type;\r
765 UINT8 Length;\r
766 UINT32 ProximityDomain;\r
767 UINT16 Reserved1;\r
768 UINT32 AddressBaseLow;\r
769 UINT32 AddressBaseHigh;\r
770 UINT32 LengthLow;\r
771 UINT32 LengthHigh;\r
772 UINT32 Reserved2;\r
773 UINT32 Flags;\r
774 UINT64 Reserved3;\r
775} EFI_ACPI_6_2_MEMORY_AFFINITY_STRUCTURE;\r
776\r
777//\r
778// Memory Flags. All other bits are reserved and must be 0.\r
779//\r
780#define EFI_ACPI_6_2_MEMORY_ENABLED (1 << 0)\r
781#define EFI_ACPI_6_2_MEMORY_HOT_PLUGGABLE (1 << 1)\r
782#define EFI_ACPI_6_2_MEMORY_NONVOLATILE (1 << 2)\r
783\r
784///\r
785/// Processor Local x2APIC Affinity Structure Definition\r
786///\r
787typedef struct {\r
788 UINT8 Type;\r
789 UINT8 Length;\r
790 UINT8 Reserved1[2];\r
791 UINT32 ProximityDomain;\r
792 UINT32 X2ApicId;\r
793 UINT32 Flags;\r
794 UINT32 ClockDomain;\r
795 UINT8 Reserved2[4];\r
796} EFI_ACPI_6_2_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
797\r
798///\r
799/// GICC Affinity Structure Definition\r
800///\r
801typedef struct {\r
802 UINT8 Type;\r
803 UINT8 Length;\r
804 UINT32 ProximityDomain;\r
805 UINT32 AcpiProcessorUid;\r
806 UINT32 Flags;\r
807 UINT32 ClockDomain;\r
808} EFI_ACPI_6_2_GICC_AFFINITY_STRUCTURE;\r
809\r
810///\r
811/// GICC Flags. All other bits are reserved and must be 0.\r
812///\r
813#define EFI_ACPI_6_2_GICC_ENABLED (1 << 0)\r
814\r
815///\r
816/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
817///\r
818typedef struct {\r
819 UINT8 Type;\r
820 UINT8 Length;\r
821 UINT32 ProximityDomain;\r
822 UINT8 Reserved[2];\r
823 UINT32 ItsId;\r
824} EFI_ACPI_6_2_GIC_ITS_AFFINITY_STRUCTURE;\r
825\r
826///\r
827/// System Locality Distance Information Table (SLIT).\r
828/// The rest of the table is a matrix.\r
829///\r
830typedef struct {\r
831 EFI_ACPI_DESCRIPTION_HEADER Header;\r
832 UINT64 NumberOfSystemLocalities;\r
833} EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
834\r
835///\r
836/// SLIT Version (as defined in ACPI 6.2 spec.)\r
837///\r
838#define EFI_ACPI_6_2_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
839\r
840///\r
841/// Corrected Platform Error Polling Table (CPEP)\r
842///\r
843typedef struct {\r
844 EFI_ACPI_DESCRIPTION_HEADER Header;\r
845 UINT8 Reserved[8];\r
846} EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
847\r
848///\r
849/// CPEP Version (as defined in ACPI 6.2 spec.)\r
850///\r
851#define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
852\r
853//\r
854// CPEP processor structure types.\r
855//\r
856#define EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
857\r
858///\r
859/// Corrected Platform Error Polling Processor Structure Definition\r
860///\r
861typedef struct {\r
862 UINT8 Type;\r
863 UINT8 Length;\r
864 UINT8 ProcessorId;\r
865 UINT8 ProcessorEid;\r
866 UINT32 PollingInterval;\r
867} EFI_ACPI_6_2_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
868\r
869///\r
870/// Maximum System Characteristics Table (MSCT)\r
871///\r
872typedef struct {\r
873 EFI_ACPI_DESCRIPTION_HEADER Header;\r
874 UINT32 OffsetProxDomInfo;\r
875 UINT32 MaximumNumberOfProximityDomains;\r
876 UINT32 MaximumNumberOfClockDomains;\r
877 UINT64 MaximumPhysicalAddress;\r
878} EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
879\r
880///\r
881/// MSCT Version (as defined in ACPI 6.2 spec.)\r
882///\r
883#define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
884\r
885///\r
886/// Maximum Proximity Domain Information Structure Definition\r
887///\r
888typedef struct {\r
889 UINT8 Revision;\r
890 UINT8 Length;\r
891 UINT32 ProximityDomainRangeLow;\r
892 UINT32 ProximityDomainRangeHigh;\r
893 UINT32 MaximumProcessorCapacity;\r
894 UINT64 MaximumMemoryCapacity;\r
895} EFI_ACPI_6_2_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
896\r
897///\r
898/// ACPI RAS Feature Table definition.\r
899///\r
900typedef struct {\r
901 EFI_ACPI_DESCRIPTION_HEADER Header;\r
902 UINT8 PlatformCommunicationChannelIdentifier[12];\r
903} EFI_ACPI_6_2_RAS_FEATURE_TABLE;\r
904\r
905///\r
906/// RASF Version (as defined in ACPI 6.2 spec.)\r
907///\r
908#define EFI_ACPI_6_2_RAS_FEATURE_TABLE_REVISION 0x01\r
909\r
910///\r
911/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
912///\r
913typedef struct {\r
914 UINT32 Signature;\r
915 UINT16 Command;\r
916 UINT16 Status;\r
917 UINT16 Version;\r
918 UINT8 RASCapabilities[16];\r
919 UINT8 SetRASCapabilities[16];\r
920 UINT16 NumberOfRASFParameterBlocks;\r
921 UINT32 SetRASCapabilitiesStatus;\r
922} EFI_ACPI_6_2_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
923\r
924///\r
925/// ACPI RASF PCC command code\r
926///\r
927#define EFI_ACPI_6_2_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
928\r
929///\r
930/// ACPI RASF Platform RAS Capabilities\r
931///\r
932#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
933#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
934#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
935#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
936#define EFI_ACPI_6_2_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
937\r
938///\r
939/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
940///\r
941typedef struct {\r
942 UINT16 Type;\r
943 UINT16 Version;\r
944 UINT16 Length;\r
945 UINT16 PatrolScrubCommand;\r
946 UINT64 RequestedAddressRange[2];\r
947 UINT64 ActualAddressRange[2];\r
948 UINT16 Flags;\r
949 UINT8 RequestedSpeed;\r
950} EFI_ACPI_6_2_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
951\r
952///\r
953/// ACPI RASF Patrol Scrub command\r
954///\r
955#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
956#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
957#define EFI_ACPI_6_2_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
958\r
959///\r
960/// Memory Power State Table definition.\r
961///\r
962typedef struct {\r
963 EFI_ACPI_DESCRIPTION_HEADER Header;\r
964 UINT8 PlatformCommunicationChannelIdentifier;\r
965 UINT8 Reserved[3];\r
966// Memory Power Node Structure\r
967// Memory Power State Characteristics\r
968} EFI_ACPI_6_2_MEMORY_POWER_STATUS_TABLE;\r
969\r
970///\r
971/// MPST Version (as defined in ACPI 6.2 spec.)\r
972///\r
973#define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
974\r
975///\r
976/// MPST Platform Communication Channel Shared Memory Region definition.\r
977///\r
978typedef struct {\r
979 UINT32 Signature;\r
980 UINT16 Command;\r
981 UINT16 Status;\r
982 UINT32 MemoryPowerCommandRegister;\r
983 UINT32 MemoryPowerStatusRegister;\r
984 UINT32 PowerStateId;\r
985 UINT32 MemoryPowerNodeId;\r
986 UINT64 MemoryEnergyConsumed;\r
987 UINT64 ExpectedAveragePowerComsuned;\r
988} EFI_ACPI_6_2_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
989\r
990///\r
991/// ACPI MPST PCC command code\r
992///\r
993#define EFI_ACPI_6_2_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
994\r
995///\r
996/// ACPI MPST Memory Power command\r
997///\r
998#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
999#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
1000#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
1001#define EFI_ACPI_6_2_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
1002\r
1003///\r
1004/// MPST Memory Power Node Table\r
1005///\r
1006typedef struct {\r
1007 UINT8 PowerStateValue;\r
1008 UINT8 PowerStateInformationIndex;\r
1009} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE;\r
1010\r
1011typedef struct {\r
1012 UINT8 Flag;\r
1013 UINT8 Reserved;\r
1014 UINT16 MemoryPowerNodeId;\r
1015 UINT32 Length;\r
1016 UINT64 AddressBase;\r
1017 UINT64 AddressLength;\r
1018 UINT32 NumberOfPowerStates;\r
1019 UINT32 NumberOfPhysicalComponents;\r
1020//EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
1021//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
1022} EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE;\r
1023\r
1024#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
1025#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
1026#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
1027\r
1028typedef struct {\r
1029 UINT16 MemoryPowerNodeCount;\r
1030 UINT8 Reserved[2];\r
1031} EFI_ACPI_6_2_MPST_MEMORY_POWER_NODE_TABLE;\r
1032\r
1033///\r
1034/// MPST Memory Power State Characteristics Table\r
1035///\r
1036typedef struct {\r
1037 UINT8 PowerStateStructureID;\r
1038 UINT8 Flag;\r
1039 UINT16 Reserved;\r
1040 UINT32 AveragePowerConsumedInMPS0;\r
1041 UINT32 RelativePowerSavingToMPS0;\r
1042 UINT64 ExitLatencyToMPS0;\r
1043} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
1044\r
1045#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
1046#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1047#define EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1048\r
1049typedef struct {\r
1050 UINT16 MemoryPowerStateCharacteristicsCount;\r
1051 UINT8 Reserved[2];\r
1052} EFI_ACPI_6_2_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1053\r
1054///\r
1055/// Memory Topology Table definition.\r
1056///\r
1057typedef struct {\r
1058 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1059 UINT32 Reserved;\r
1060} EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE;\r
1061\r
1062///\r
1063/// PMTT Version (as defined in ACPI 6.2 spec.)\r
1064///\r
1065#define EFI_ACPI_6_2_MEMORY_TOPOLOGY_TABLE_REVISION 0x01\r
1066\r
1067///\r
1068/// Common Memory Aggregator Device Structure.\r
1069///\r
1070typedef struct {\r
1071 UINT8 Type;\r
1072 UINT8 Reserved;\r
1073 UINT16 Length;\r
1074 UINT16 Flags;\r
1075 UINT16 Reserved1;\r
1076} EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1077\r
1078///\r
1079/// Memory Aggregator Device Type\r
1080///\r
d6e6337c
CJ		 1081#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET 0x0\r
1082#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER 0x1\r
1083#define EFI_ACPI_6_2_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM 0x2\r
e67b675d
SZ		 1084\r
1085///\r
1086/// Socket Memory Aggregator Device Structure.\r
1087///\r
1088typedef struct {\r
1089 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1090 UINT16 SocketIdentifier;\r
1091 UINT16 Reserved;\r
1092//EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[];\r
1093} EFI_ACPI_6_2_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1094\r
1095///\r
1096/// MemoryController Memory Aggregator Device Structure.\r
1097///\r
1098typedef struct {\r
1099 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1100 UINT32 ReadLatency;\r
1101 UINT32 WriteLatency;\r
1102 UINT32 ReadBandwidth;\r
1103 UINT32 WriteBandwidth;\r
1104 UINT16 OptimalAccessUnit;\r
1105 UINT16 OptimalAccessAlignment;\r
1106 UINT16 Reserved;\r
1107 UINT16 NumberOfProximityDomains;\r
1108//UINT32 ProximityDomain[NumberOfProximityDomains];\r
1109//EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[];\r
1110} EFI_ACPI_6_2_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1111\r
1112///\r
1113/// DIMM Memory Aggregator Device Structure.\r
1114///\r
1115typedef struct {\r
1116 EFI_ACPI_6_2_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header;\r
1117 UINT16 PhysicalComponentIdentifier;\r
1118 UINT16 Reserved;\r
1119 UINT32 SizeOfDimm;\r
1120 UINT32 SmbiosHandle;\r
1121} EFI_ACPI_6_2_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE;\r
1122\r
1123///\r
1124/// Boot Graphics Resource Table definition.\r
1125///\r
1126typedef struct {\r
1127 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1128 ///\r
1129 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1130 ///\r
1131 UINT16 Version;\r
1132 ///\r
1133 /// 1-byte status field indicating current status about the table.\r
1134 /// Bits[7:1] = Reserved (must be zero)\r
1135 /// Bit [0] = Valid. A one indicates the boot image graphic is valid.\r
1136 ///\r
1137 UINT8 Status;\r
1138 ///\r
1139 /// 1-byte enumerated type field indicating format of the image.\r
1140 /// 0 = Bitmap\r
1141 /// 1 - 255 Reserved (for future use)\r
1142 ///\r
1143 UINT8 ImageType;\r
1144 ///\r
1145 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1146 /// of the image bitmap.\r
1147 ///\r
1148 UINT64 ImageAddress;\r
1149 ///\r
1150 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1151 /// (X, Y) display offset of the top left corner of the boot image.\r
1152 /// The top left corner of the display is at offset (0, 0).\r
1153 ///\r
1154 UINT32 ImageOffsetX;\r
1155 ///\r
1156 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1157 /// (X, Y) display offset of the top left corner of the boot image.\r
1158 /// The top left corner of the display is at offset (0, 0).\r
1159 ///\r
1160 UINT32 ImageOffsetY;\r
1161} EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1162\r
1163///\r
1164/// BGRT Revision\r
1165///\r
1166#define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1167\r
1168///\r
1169/// BGRT Version\r
1170///\r
1171#define EFI_ACPI_6_2_BGRT_VERSION 0x01\r
1172\r
1173///\r
1174/// BGRT Status\r
1175///\r
1176#define EFI_ACPI_6_2_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1177#define EFI_ACPI_6_2_BGRT_STATUS_DISPLAYED 0x01\r
1178\r
1179///\r
1180/// BGRT Image Type\r
1181///\r
1182#define EFI_ACPI_6_2_BGRT_IMAGE_TYPE_BMP 0x00\r
1183\r
1184///\r
1185/// FPDT Version (as defined in ACPI 6.2 spec.)\r
1186///\r
1187#define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1188\r
1189///\r
1190/// FPDT Performance Record Types\r
1191///\r
1192#define EFI_ACPI_6_2_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1193#define EFI_ACPI_6_2_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1194\r
1195///\r
1196/// FPDT Performance Record Revision\r
1197///\r
1198#define EFI_ACPI_6_2_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1199#define EFI_ACPI_6_2_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1200\r
1201///\r
1202/// FPDT Runtime Performance Record Types\r
1203///\r
1204#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1205#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1206#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1207\r
1208///\r
1209/// FPDT Runtime Performance Record Revision\r
1210///\r
1211#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1212#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1213#define EFI_ACPI_6_2_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1214\r
1215///\r
1216/// FPDT Performance Record header\r
1217///\r
1218typedef struct {\r
1219 UINT16 Type;\r
1220 UINT8 Length;\r
1221 UINT8 Revision;\r
1222} EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER;\r
1223\r
1224///\r
1225/// FPDT Performance Table header\r
1226///\r
1227typedef struct {\r
1228 UINT32 Signature;\r
1229 UINT32 Length;\r
1230} EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER;\r
1231\r
1232///\r
1233/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1234///\r
1235typedef struct {\r
1236 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1237 UINT32 Reserved;\r
1238 ///\r
1239 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1240 ///\r
1241 UINT64 BootPerformanceTablePointer;\r
1242} EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1243\r
1244///\r
1245/// FPDT S3 Performance Table Pointer Record Structure\r
1246///\r
1247typedef struct {\r
1248 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1249 UINT32 Reserved;\r
1250 ///\r
1251 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1252 ///\r
1253 UINT64 S3PerformanceTablePointer;\r
1254} EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1255\r
1256///\r
1257/// FPDT Firmware Basic Boot Performance Record Structure\r
1258///\r
1259typedef struct {\r
1260 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1261 UINT32 Reserved;\r
1262 ///\r
1263 /// Timer value logged at the beginning of firmware image execution.\r
1264 /// This may not always be zero or near zero.\r
1265 ///\r
1266 UINT64 ResetEnd;\r
1267 ///\r
1268 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1269 /// For non-UEFI compatible boots, this field must be zero.\r
1270 ///\r
1271 UINT64 OsLoaderLoadImageStart;\r
1272 ///\r
1273 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1274 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1275 /// to the INT 19h handler invocation.\r
1276 ///\r
1277 UINT64 OsLoaderStartImageStart;\r
1278 ///\r
1279 /// Timer value logged at the point when the OS loader calls the\r
1280 /// ExitBootServices function for UEFI compatible firmware.\r
1281 /// For non-UEFI compatible boots, this field must be zero.\r
1282 ///\r
1283 UINT64 ExitBootServicesEntry;\r
1284 ///\r
b219e2cd 1285 /// Timer value logged at the point just prior to when the OS loader gaining\r
e67b675d
SZ		 1286 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1287 /// For non-UEFI compatible boots, this field must be zero.\r
1288 ///\r
1289 UINT64 ExitBootServicesExit;\r
1290} EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1291\r
1292///\r
1293/// FPDT Firmware Basic Boot Performance Table signature\r
1294///\r
1295#define EFI_ACPI_6_2_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1296\r
1297//\r
1298// FPDT Firmware Basic Boot Performance Table\r
1299//\r
1300typedef struct {\r
1301 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1302 //\r
1303 // one or more Performance Records.\r
1304 //\r
1305} EFI_ACPI_6_2_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1306\r
1307///\r
1308/// FPDT "S3PT" S3 Performance Table\r
1309///\r
1310#define EFI_ACPI_6_2_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1311\r
1312//\r
1313// FPDT Firmware S3 Boot Performance Table\r
1314//\r
1315typedef struct {\r
1316 EFI_ACPI_6_2_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1317 //\r
1318 // one or more Performance Records.\r
1319 //\r
1320} EFI_ACPI_6_2_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1321\r
1322///\r
1323/// FPDT Basic S3 Resume Performance Record\r
1324///\r
1325typedef struct {\r
1326 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1327 ///\r
1328 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1329 ///\r
1330 UINT32 ResumeCount;\r
1331 ///\r
1332 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1333 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1334 ///\r
1335 UINT64 FullResume;\r
1336 ///\r
1337 /// Average timer value of all resume cycles logged since the last full boot\r
1338 /// sequence, including the most recent resume. Note that the entire log of\r
1339 /// timer values does not need to be retained in order to calculate this average.\r
1340 ///\r
1341 UINT64 AverageResume;\r
1342} EFI_ACPI_6_2_FPDT_S3_RESUME_RECORD;\r
1343\r
1344///\r
1345/// FPDT Basic S3 Suspend Performance Record\r
1346///\r
1347typedef struct {\r
1348 EFI_ACPI_6_2_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1349 ///\r
1350 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1351 /// Only the most recent suspend cycle's timer value is retained.\r
1352 ///\r
1353 UINT64 SuspendStart;\r
1354 ///\r
1355 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1356 /// mechanism) used to trigger hardware entry to S3.\r
1357 /// Only the most recent suspend cycle's timer value is retained.\r
1358 ///\r
1359 UINT64 SuspendEnd;\r
1360} EFI_ACPI_6_2_FPDT_S3_SUSPEND_RECORD;\r
1361\r
1362///\r
1363/// Firmware Performance Record Table definition.\r
1364///\r
1365typedef struct {\r
1366 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1367} EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1368\r
1369///\r
1370/// Generic Timer Description Table definition.\r
1371///\r
1372typedef struct {\r
1373 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1374 UINT64 CntControlBasePhysicalAddress;\r
1375 UINT32 Reserved;\r
1376 UINT32 SecurePL1TimerGSIV;\r
1377 UINT32 SecurePL1TimerFlags;\r
1378 UINT32 NonSecurePL1TimerGSIV;\r
1379 UINT32 NonSecurePL1TimerFlags;\r
1380 UINT32 VirtualTimerGSIV;\r
1381 UINT32 VirtualTimerFlags;\r
1382 UINT32 NonSecurePL2TimerGSIV;\r
1383 UINT32 NonSecurePL2TimerFlags;\r
1384 UINT64 CntReadBasePhysicalAddress;\r
1385 UINT32 PlatformTimerCount;\r
1386 UINT32 PlatformTimerOffset;\r
1387} EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1388\r
1389///\r
1390/// GTDT Version (as defined in ACPI 6.2 spec.)\r
1391///\r
1392#define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x02\r
1393\r
1394///\r
1395/// Timer Flags. All other bits are reserved and must be 0.\r
1396///\r
1397#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1398#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1399#define EFI_ACPI_6_2_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1400\r
1401///\r
1402/// Platform Timer Type\r
1403///\r
1404#define EFI_ACPI_6_2_GTDT_GT_BLOCK 0\r
1405#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG 1\r
1406\r
1407///\r
1408/// GT Block Structure\r
1409///\r
1410typedef struct {\r
1411 UINT8 Type;\r
1412 UINT16 Length;\r
1413 UINT8 Reserved;\r
1414 UINT64 CntCtlBase;\r
1415 UINT32 GTBlockTimerCount;\r
1416 UINT32 GTBlockTimerOffset;\r
1417} EFI_ACPI_6_2_GTDT_GT_BLOCK_STRUCTURE;\r
1418\r
1419///\r
1420/// GT Block Timer Structure\r
1421///\r
1422typedef struct {\r
1423 UINT8 GTFrameNumber;\r
1424 UINT8 Reserved[3];\r
1425 UINT64 CntBaseX;\r
1426 UINT64 CntEL0BaseX;\r
1427 UINT32 GTxPhysicalTimerGSIV;\r
1428 UINT32 GTxPhysicalTimerFlags;\r
1429 UINT32 GTxVirtualTimerGSIV;\r
1430 UINT32 GTxVirtualTimerFlags;\r
1431 UINT32 GTxCommonFlags;\r
1432} EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1433\r
1434///\r
1435/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1436///\r
1437#define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1438#define EFI_ACPI_6_2_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1439\r
1440///\r
1441/// Common Flags Flags. All other bits are reserved and must be 0.\r
1442///\r
1443#define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1444#define EFI_ACPI_6_2_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1445\r
1446///\r
1447/// SBSA Generic Watchdog Structure\r
1448///\r
1449typedef struct {\r
1450 UINT8 Type;\r
1451 UINT16 Length;\r
1452 UINT8 Reserved;\r
1453 UINT64 RefreshFramePhysicalAddress;\r
1454 UINT64 WatchdogControlFramePhysicalAddress;\r
1455 UINT32 WatchdogTimerGSIV;\r
1456 UINT32 WatchdogTimerFlags;\r
1457} EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE;\r
1458\r
1459///\r
1460/// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1461///\r
1462#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1463#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1464#define EFI_ACPI_6_2_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1465\r
1466//\r
1467// NVDIMM Firmware Interface Table definition.\r
1468//\r
1469typedef struct {\r
1470 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1471 UINT32 Reserved;\r
1472} EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1473\r
1474//\r
1475// NFIT Version (as defined in ACPI 6.2 spec.)\r
1476//\r
1477#define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1478\r
1479//\r
1480// Definition for NFIT Table Structure Types\r
1481//\r
1482#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1483#define EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1484#define EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1485#define EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1486#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1487#define EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1488#define EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1489\r
1490//\r
1491// Definition for NFIT Structure Header\r
1492//\r
1493typedef struct {\r
1494 UINT16 Type;\r
1495 UINT16 Length;\r
1496} EFI_ACPI_6_2_NFIT_STRUCTURE_HEADER;\r
1497\r
1498//\r
1499// Definition for System Physical Address Range Structure\r
1500//\r
1501#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1502#define EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
1503#define EFI_ACPI_6_2_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1504#define EFI_ACPI_6_2_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1505#define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1506#define EFI_ACPI_6_2_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1507#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1508#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1509#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
385c0bf5 1510#define EFI_ACPI_6_2_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
e67b675d
SZ		 1511typedef struct {\r
1512 UINT16 Type;\r
1513 UINT16 Length;\r
1514 UINT16 SPARangeStructureIndex;\r
1515 UINT16 Flags;\r
1516 UINT32 Reserved_8;\r
1517 UINT32 ProximityDomain;\r
1518 GUID AddressRangeTypeGUID;\r
1519 UINT64 SystemPhysicalAddressRangeBase;\r
1520 UINT64 SystemPhysicalAddressRangeLength;\r
1521 UINT64 AddressRangeMemoryMappingAttribute;\r
1522} EFI_ACPI_6_2_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1523\r
1524//\r
1525// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1526//\r
1527typedef struct {\r
1528 UINT32 DIMMNumber:4;\r
1529 UINT32 MemoryChannelNumber:4;\r
1530 UINT32 MemoryControllerID:4;\r
1531 UINT32 SocketID:4;\r
1532 UINT32 NodeControllerID:12;\r
1533 UINT32 Reserved_28:4;\r
1534} EFI_ACPI_6_2_NFIT_DEVICE_HANDLE;\r
1535\r
1536#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1537#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1538#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1539#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1540#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1541#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1542#define EFI_ACPI_6_2_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
1543typedef struct {\r
1544 UINT16 Type;\r
1545 UINT16 Length;\r
1546 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1547 UINT16 NVDIMMPhysicalID;\r
1548 UINT16 NVDIMMRegionID;\r
1549 UINT16 SPARangeStructureIndex ;\r
1550 UINT16 NVDIMMControlRegionStructureIndex;\r
1551 UINT64 NVDIMMRegionSize;\r
1552 UINT64 RegionOffset;\r
1553 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1554 UINT16 InterleaveStructureIndex;\r
1555 UINT16 InterleaveWays;\r
1556 UINT16 NVDIMMStateFlags;\r
1557 UINT16 Reserved_46;\r
1558} EFI_ACPI_6_2_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1559\r
1560//\r
1561// Definition for Interleave Structure\r
1562//\r
1563typedef struct {\r
1564 UINT16 Type;\r
1565 UINT16 Length;\r
1566 UINT16 InterleaveStructureIndex;\r
1567 UINT16 Reserved_6;\r
1568 UINT32 NumberOfLines;\r
1569 UINT32 LineSize;\r
1570//UINT32 LineOffset[NumberOfLines];\r
1571} EFI_ACPI_6_2_NFIT_INTERLEAVE_STRUCTURE;\r
1572\r
1573//\r
1574// Definition for SMBIOS Management Information Structure\r
1575//\r
1576typedef struct {\r
1577 UINT16 Type;\r
1578 UINT16 Length;\r
1579 UINT32 Reserved_4;\r
1580//UINT8 Data[];\r
1581} EFI_ACPI_6_2_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1582\r
1583//\r
1584// Definition for NVDIMM Control Region Structure\r
1585//\r
1586#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1587\r
1588#define EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1589typedef struct {\r
1590 UINT16 Type;\r
1591 UINT16 Length;\r
1592 UINT16 NVDIMMControlRegionStructureIndex;\r
1593 UINT16 VendorID;\r
1594 UINT16 DeviceID;\r
1595 UINT16 RevisionID;\r
1596 UINT16 SubsystemVendorID;\r
1597 UINT16 SubsystemDeviceID;\r
1598 UINT16 SubsystemRevisionID;\r
1599 UINT8 ValidFields;\r
1600 UINT8 ManufacturingLocation;\r
1601 UINT16 ManufacturingDate;\r
1602 UINT8 Reserved_22[2];\r
1603 UINT32 SerialNumber;\r
1604 UINT16 RegionFormatInterfaceCode;\r
1605 UINT16 NumberOfBlockControlWindows;\r
1606 UINT64 SizeOfBlockControlWindow;\r
1607 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1608 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1609 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1610 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1611 UINT16 NVDIMMControlRegionFlag;\r
1612 UINT8 Reserved_74[6];\r
1613} EFI_ACPI_6_2_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1614\r
1615//\r
1616// Definition for NVDIMM Block Data Window Region Structure\r
1617//\r
1618typedef struct {\r
1619 UINT16 Type;\r
1620 UINT16 Length;\r
1621 UINT16 NVDIMMControlRegionStructureIndex;\r
1622 UINT16 NumberOfBlockDataWindows;\r
1623 UINT64 BlockDataWindowStartOffset;\r
1624 UINT64 SizeOfBlockDataWindow;\r
1625 UINT64 BlockAccessibleMemoryCapacity;\r
1626 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1627} EFI_ACPI_6_2_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1628\r
1629//\r
1630// Definition for Flush Hint Address Structure\r
1631//\r
1632typedef struct {\r
1633 UINT16 Type;\r
1634 UINT16 Length;\r
1635 EFI_ACPI_6_2_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1636 UINT16 NumberOfFlushHintAddresses;\r
1637 UINT8 Reserved_10[6];\r
1638//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1639} EFI_ACPI_6_2_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1640\r
1641///\r
1642/// Secure DEVices Table (SDEV)\r
1643///\r
1644typedef struct {\r
1645 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1646} EFI_ACPI_6_2_SECURE_DEVICES_TABLE_HEADER;\r
1647\r
1648///\r
1649/// SDEV Revision (as defined in ACPI 6.2 spec.)\r
1650///\r
1651#define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_REVISION 0x01\r
1652\r
1653///\r
b219e2cd 1654/// Secure Device types\r
e67b675d
SZ		 1655///\r
1656#define EFI_ACPI_6_2_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
1657#define EFI_ACPI_6_2_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1658\r
1659///\r
b219e2cd 1660/// Secure Device flags\r
e67b675d
SZ		 1661///\r
1662#define EFI_ACPI_6_2_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1663\r
1664///\r
1665/// SDEV Structure Header\r
1666///\r
1667typedef struct {\r
1668 UINT8 Type;\r
1669 UINT8 Flags;\r
1670 UINT16 Length;\r
1671} EFI_ACPI_6_2_SDEV_STRUCTURE_HEADER;\r
1672\r
1673///\r
1674/// PCIe Endpoint Device based Secure Device Structure\r
1675///\r
1676typedef struct {\r
1677 UINT8 Type;\r
1678 UINT8 Flags;\r
1679 UINT16 Length;\r
1680 UINT16 PciSegmentNumber;\r
1681 UINT16 StartBusNumber;\r
1682 UINT16 PciPathOffset;\r
1683 UINT16 PciPathLength;\r
1684 UINT16 VendorSpecificDataOffset;\r
1685 UINT16 VendorSpecificDataLength;\r
1686} EFI_ACPI_6_2_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
1687\r
1688///\r
1689/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
1690///\r
1691typedef struct {\r
1692 UINT8 Type;\r
1693 UINT8 Flags;\r
1694 UINT16 Length;\r
1695 UINT16 DeviceIdentifierOffset;\r
1696 UINT16 DeviceIdentifierLength;\r
1697 UINT16 VendorSpecificDataOffset;\r
1698 UINT16 VendorSpecificDataLength;\r
1699} EFI_ACPI_6_2_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
1700\r
1701///\r
1702/// Boot Error Record Table (BERT)\r
1703///\r
1704typedef struct {\r
1705 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1706 UINT32 BootErrorRegionLength;\r
1707 UINT64 BootErrorRegion;\r
1708} EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1709\r
1710///\r
1711/// BERT Version (as defined in ACPI 6.2 spec.)\r
1712///\r
1713#define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1714\r
1715///\r
1716/// Boot Error Region Block Status Definition\r
1717///\r
1718typedef struct {\r
1719 UINT32 UncorrectableErrorValid:1;\r
1720 UINT32 CorrectableErrorValid:1;\r
1721 UINT32 MultipleUncorrectableErrors:1;\r
1722 UINT32 MultipleCorrectableErrors:1;\r
1723 UINT32 ErrorDataEntryCount:10;\r
1724 UINT32 Reserved:18;\r
1725} EFI_ACPI_6_2_ERROR_BLOCK_STATUS;\r
1726\r
1727///\r
1728/// Boot Error Region Definition\r
1729///\r
1730typedef struct {\r
1731 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;\r
1732 UINT32 RawDataOffset;\r
1733 UINT32 RawDataLength;\r
1734 UINT32 DataLength;\r
1735 UINT32 ErrorSeverity;\r
1736} EFI_ACPI_6_2_BOOT_ERROR_REGION_STRUCTURE;\r
1737\r
1738//\r
1739// Boot Error Severity types\r
1740//\r
1741#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTABLE 0x00\r
1742#define EFI_ACPI_6_2_ERROR_SEVERITY_FATAL 0x01\r
1743#define EFI_ACPI_6_2_ERROR_SEVERITY_CORRECTED 0x02\r
1744#define EFI_ACPI_6_2_ERROR_SEVERITY_NONE 0x03\r
1745\r
1746///\r
1747/// Generic Error Data Entry Definition\r
1748///\r
1749typedef struct {\r
1750 UINT8 SectionType[16];\r
1751 UINT32 ErrorSeverity;\r
1752 UINT16 Revision;\r
1753 UINT8 ValidationBits;\r
1754 UINT8 Flags;\r
1755 UINT32 ErrorDataLength;\r
1756 UINT8 FruId[16];\r
1757 UINT8 FruText[20];\r
1758 UINT8 Timestamp[8];\r
1759} EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1760\r
1761///\r
1762/// Generic Error Data Entry Version (as defined in ACPI 6.2 spec.)\r
1763///\r
1764#define EFI_ACPI_6_2_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1765\r
1766///\r
1767/// HEST - Hardware Error Source Table\r
1768///\r
1769typedef struct {\r
1770 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1771 UINT32 ErrorSourceCount;\r
1772} EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1773\r
1774///\r
1775/// HEST Version (as defined in ACPI 6.2 spec.)\r
1776///\r
1777#define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1778\r
1779//\r
1780// Error Source structure types.\r
1781//\r
1782#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1783#define EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1784#define EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1785#define EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1786#define EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER 0x07\r
1787#define EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER 0x08\r
1788#define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR 0x09\r
1789#define EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1790#define EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1791\r
1792//\r
1793// Error Source structure flags.\r
1794//\r
1795#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1796#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1797#define EFI_ACPI_6_2_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1798\r
1799///\r
1800/// IA-32 Architecture Machine Check Exception Structure Definition\r
1801///\r
1802typedef struct {\r
1803 UINT16 Type;\r
1804 UINT16 SourceId;\r
1805 UINT8 Reserved0[2];\r
1806 UINT8 Flags;\r
1807 UINT8 Enabled;\r
1808 UINT32 NumberOfRecordsToPreAllocate;\r
1809 UINT32 MaxSectionsPerRecord;\r
1810 UINT64 GlobalCapabilityInitData;\r
1811 UINT64 GlobalControlInitData;\r
1812 UINT8 NumberOfHardwareBanks;\r
1813 UINT8 Reserved1[7];\r
1814} EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1815\r
1816///\r
1817/// IA-32 Architecture Machine Check Bank Structure Definition\r
1818///\r
1819typedef struct {\r
1820 UINT8 BankNumber;\r
1821 UINT8 ClearStatusOnInitialization;\r
1822 UINT8 StatusDataFormat;\r
1823 UINT8 Reserved0;\r
1824 UINT32 ControlRegisterMsrAddress;\r
1825 UINT64 ControlInitData;\r
1826 UINT32 StatusRegisterMsrAddress;\r
1827 UINT32 AddressRegisterMsrAddress;\r
1828 UINT32 MiscRegisterMsrAddress;\r
1829} EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1830\r
1831///\r
1832/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1833///\r
1834#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1835#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1836#define EFI_ACPI_6_2_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1837\r
1838//\r
1839// Hardware Error Notification types. All other values are reserved\r
1840//\r
1841#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1842#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1843#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1844#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1845#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1846#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1847#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1848#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1849#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1850#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1851#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1852#define EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
1853\r
1854///\r
1855/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1856///\r
1857typedef struct {\r
1858 UINT16 Type:1;\r
1859 UINT16 PollInterval:1;\r
1860 UINT16 SwitchToPollingThresholdValue:1;\r
1861 UINT16 SwitchToPollingThresholdWindow:1;\r
1862 UINT16 ErrorThresholdValue:1;\r
1863 UINT16 ErrorThresholdWindow:1;\r
1864 UINT16 Reserved:10;\r
1865} EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1866\r
1867///\r
1868/// Hardware Error Notification Structure Definition\r
1869///\r
1870typedef struct {\r
1871 UINT8 Type;\r
1872 UINT8 Length;\r
1873 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1874 UINT32 PollInterval;\r
1875 UINT32 Vector;\r
1876 UINT32 SwitchToPollingThresholdValue;\r
1877 UINT32 SwitchToPollingThresholdWindow;\r
1878 UINT32 ErrorThresholdValue;\r
1879 UINT32 ErrorThresholdWindow;\r
1880} EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1881\r
1882///\r
1883/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1884///\r
1885typedef struct {\r
1886 UINT16 Type;\r
1887 UINT16 SourceId;\r
1888 UINT8 Reserved0[2];\r
1889 UINT8 Flags;\r
1890 UINT8 Enabled;\r
1891 UINT32 NumberOfRecordsToPreAllocate;\r
1892 UINT32 MaxSectionsPerRecord;\r
1893 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1894 UINT8 NumberOfHardwareBanks;\r
1895 UINT8 Reserved1[3];\r
1896} EFI_ACPI_6_2_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1897\r
1898///\r
1899/// IA-32 Architecture NMI Error Structure Definition\r
1900///\r
1901typedef struct {\r
1902 UINT16 Type;\r
1903 UINT16 SourceId;\r
1904 UINT8 Reserved0[2];\r
1905 UINT32 NumberOfRecordsToPreAllocate;\r
1906 UINT32 MaxSectionsPerRecord;\r
1907 UINT32 MaxRawDataLength;\r
1908} EFI_ACPI_6_2_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1909\r
1910///\r
1911/// PCI Express Root Port AER Structure Definition\r
1912///\r
1913typedef struct {\r
1914 UINT16 Type;\r
1915 UINT16 SourceId;\r
1916 UINT8 Reserved0[2];\r
1917 UINT8 Flags;\r
1918 UINT8 Enabled;\r
1919 UINT32 NumberOfRecordsToPreAllocate;\r
1920 UINT32 MaxSectionsPerRecord;\r
1921 UINT32 Bus;\r
1922 UINT16 Device;\r
1923 UINT16 Function;\r
1924 UINT16 DeviceControl;\r
1925 UINT8 Reserved1[2];\r
1926 UINT32 UncorrectableErrorMask;\r
1927 UINT32 UncorrectableErrorSeverity;\r
1928 UINT32 CorrectableErrorMask;\r
1929 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1930 UINT32 RootErrorCommand;\r
1931} EFI_ACPI_6_2_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1932\r
1933///\r
1934/// PCI Express Device AER Structure Definition\r
1935///\r
1936typedef struct {\r
1937 UINT16 Type;\r
1938 UINT16 SourceId;\r
1939 UINT8 Reserved0[2];\r
1940 UINT8 Flags;\r
1941 UINT8 Enabled;\r
1942 UINT32 NumberOfRecordsToPreAllocate;\r
1943 UINT32 MaxSectionsPerRecord;\r
1944 UINT32 Bus;\r
1945 UINT16 Device;\r
1946 UINT16 Function;\r
1947 UINT16 DeviceControl;\r
1948 UINT8 Reserved1[2];\r
1949 UINT32 UncorrectableErrorMask;\r
1950 UINT32 UncorrectableErrorSeverity;\r
1951 UINT32 CorrectableErrorMask;\r
1952 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1953} EFI_ACPI_6_2_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1954\r
1955///\r
1956/// PCI Express Bridge AER Structure Definition\r
1957///\r
1958typedef struct {\r
1959 UINT16 Type;\r
1960 UINT16 SourceId;\r
1961 UINT8 Reserved0[2];\r
1962 UINT8 Flags;\r
1963 UINT8 Enabled;\r
1964 UINT32 NumberOfRecordsToPreAllocate;\r
1965 UINT32 MaxSectionsPerRecord;\r
1966 UINT32 Bus;\r
1967 UINT16 Device;\r
1968 UINT16 Function;\r
1969 UINT16 DeviceControl;\r
1970 UINT8 Reserved1[2];\r
1971 UINT32 UncorrectableErrorMask;\r
1972 UINT32 UncorrectableErrorSeverity;\r
1973 UINT32 CorrectableErrorMask;\r
1974 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1975 UINT32 SecondaryUncorrectableErrorMask;\r
1976 UINT32 SecondaryUncorrectableErrorSeverity;\r
1977 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
1978} EFI_ACPI_6_2_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
1979\r
1980///\r
1981/// Generic Hardware Error Source Structure Definition\r
1982///\r
1983typedef struct {\r
1984 UINT16 Type;\r
1985 UINT16 SourceId;\r
1986 UINT16 RelatedSourceId;\r
1987 UINT8 Flags;\r
1988 UINT8 Enabled;\r
1989 UINT32 NumberOfRecordsToPreAllocate;\r
1990 UINT32 MaxSectionsPerRecord;\r
1991 UINT32 MaxRawDataLength;\r
1992 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
1993 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1994 UINT32 ErrorStatusBlockLength;\r
1995} EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
1996\r
1997///\r
1998/// Generic Hardware Error Source Version 2 Structure Definition\r
1999///\r
2000typedef struct {\r
2001 UINT16 Type;\r
2002 UINT16 SourceId;\r
2003 UINT16 RelatedSourceId;\r
2004 UINT8 Flags;\r
2005 UINT8 Enabled;\r
2006 UINT32 NumberOfRecordsToPreAllocate;\r
2007 UINT32 MaxSectionsPerRecord;\r
2008 UINT32 MaxRawDataLength;\r
2009 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2010 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2011 UINT32 ErrorStatusBlockLength;\r
2012 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
2013 UINT64 ReadAckPreserve;\r
2014 UINT64 ReadAckWrite;\r
2015} EFI_ACPI_6_2_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
2016\r
2017///\r
2018/// Generic Error Status Definition\r
2019///\r
2020typedef struct {\r
2021 EFI_ACPI_6_2_ERROR_BLOCK_STATUS BlockStatus;\r
2022 UINT32 RawDataOffset;\r
2023 UINT32 RawDataLength;\r
2024 UINT32 DataLength;\r
2025 UINT32 ErrorSeverity;\r
2026} EFI_ACPI_6_2_GENERIC_ERROR_STATUS_STRUCTURE;\r
2027\r
2028///\r
2029/// IA-32 Architecture Deferred Machine Check Structure Definition\r
2030///\r
2031typedef struct {\r
2032 UINT16 Type;\r
2033 UINT16 SourceId;\r
2034 UINT8 Reserved0[2];\r
2035 UINT8 Flags;\r
2036 UINT8 Enabled;\r
2037 UINT32 NumberOfRecordsToPreAllocate;\r
2038 UINT32 MaxSectionsPerRecord;\r
2039 EFI_ACPI_6_2_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2040 UINT8 NumberOfHardwareBanks;\r
2041 UINT8 Reserved1[3];\r
2042} EFI_ACPI_6_2_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;\r
2043\r
2044///\r
2045/// HMAT - Heterogeneous Memory Attribute Table\r
2046///\r
2047typedef struct {\r
2048 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2049 UINT8 Reserved[4];\r
2050} EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2051\r
2052///\r
2053/// HMAT Revision (as defined in ACPI 6.2 spec.)\r
2054///\r
2055#define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x01\r
2056\r
2057///\r
2058/// HMAT types\r
2059///\r
2060#define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SUBSYSTEM_ADDRESS_RANGE 0x00\r
2061#define EFI_ACPI_6_2_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2062#define EFI_ACPI_6_2_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2063\r
2064///\r
2065/// HMAT Structure Header\r
2066///\r
2067typedef struct {\r
2068 UINT16 Type;\r
2069 UINT8 Reserved[2];\r
2070 UINT32 Length;\r
2071} EFI_ACPI_6_2_HMAT_STRUCTURE_HEADER;\r
2072\r
2073///\r
2074/// Memory Subsystem Address Range Structure flags\r
2075///\r
2076typedef struct {\r
2077 UINT16 ProcessorProximityDomainValid:1;\r
2078 UINT16 MemoryProximityDomainValid:1;\r
2079 UINT16 ReservationHint:1;\r
2080 UINT16 Reserved:13;\r
2081} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS;\r
2082\r
2083///\r
2084/// Memory Subsystem Address Range Structure\r
2085///\r
2086typedef struct {\r
2087 UINT16 Type;\r
2088 UINT8 Reserved[2];\r
2089 UINT32 Length;\r
2090 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE_FLAGS Flags;\r
2091 UINT8 Reserved1[2];\r
2092 UINT32 ProcessorProximityDomain;\r
2093 UINT32 MemoryProximityDomain;\r
2094 UINT8 Reserved2[4];\r
2095 UINT64 SystemPhysicalAddressRangeBase;\r
2096 UINT64 SystemPhysicalAddressRangeLength;\r
2097} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SUBSYSTEM_ADDRESS_RANGE;\r
2098\r
2099///\r
2100/// System Locality Latency and Bandwidth Information Structure flags\r
2101///\r
2102typedef struct {\r
2103 UINT8 MemoryHierarchy:5;\r
2104 UINT8 Reserved:3;\r
2105} EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2106\r
2107///\r
2108/// System Locality Latency and Bandwidth Information Structure\r
2109///\r
2110typedef struct {\r
2111 UINT16 Type;\r
2112 UINT8 Reserved[2];\r
2113 UINT32 Length;\r
2114 EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2115 UINT8 DataType;\r
2116 UINT8 Reserved1[2];\r
2117 UINT32 NumberOfInitiatorProximityDomains;\r
2118 UINT32 NumberOfTargetProximityDomains;\r
2119 UINT8 Reserved2[4];\r
2120 UINT64 EntryBaseUnit;\r
2121} EFI_ACPI_6_2_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2122\r
2123///\r
2124/// Memory Side Cache Information Structure cache attributes\r
2125///\r
2126typedef struct {\r
2127 UINT32 TotalCacheLevels:4;\r
2128 UINT32 CacheLevel:4;\r
2129 UINT32 CacheAssociativity:4;\r
2130 UINT32 WritePolicy:4;\r
2131 UINT32 CacheLineSize:16;\r
2132} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2133\r
2134///\r
2135/// Memory Side Cache Information Structure\r
2136///\r
2137typedef struct {\r
2138 UINT16 Type;\r
2139 UINT8 Reserved[2];\r
2140 UINT32 Length;\r
2141 UINT32 MemoryProximityDomain;\r
2142 UINT8 Reserved1[4];\r
2143 UINT64 MemorySideCacheSize;\r
2144 EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2145 UINT8 Reserved2[2];\r
2146 UINT16 NumberOfSmbiosHandles;\r
2147} EFI_ACPI_6_2_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2148\r
2149///\r
2150/// ERST - Error Record Serialization Table\r
2151///\r
2152typedef struct {\r
2153 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2154 UINT32 SerializationHeaderSize;\r
2155 UINT8 Reserved0[4];\r
2156 UINT32 InstructionEntryCount;\r
2157} EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2158\r
2159///\r
2160/// ERST Version (as defined in ACPI 6.2 spec.)\r
2161///\r
2162#define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2163\r
2164///\r
2165/// ERST Serialization Actions\r
2166///\r
2167#define EFI_ACPI_6_2_ERST_BEGIN_WRITE_OPERATION 0x00\r
2168#define EFI_ACPI_6_2_ERST_BEGIN_READ_OPERATION 0x01\r
2169#define EFI_ACPI_6_2_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2170#define EFI_ACPI_6_2_ERST_END_OPERATION 0x03\r
2171#define EFI_ACPI_6_2_ERST_SET_RECORD_OFFSET 0x04\r
2172#define EFI_ACPI_6_2_ERST_EXECUTE_OPERATION 0x05\r
2173#define EFI_ACPI_6_2_ERST_CHECK_BUSY_STATUS 0x06\r
2174#define EFI_ACPI_6_2_ERST_GET_COMMAND_STATUS 0x07\r
2175#define EFI_ACPI_6_2_ERST_GET_RECORD_IDENTIFIER 0x08\r
2176#define EFI_ACPI_6_2_ERST_SET_RECORD_IDENTIFIER 0x09\r
2177#define EFI_ACPI_6_2_ERST_GET_RECORD_COUNT 0x0A\r
2178#define EFI_ACPI_6_2_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2179#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2180#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2181#define EFI_ACPI_6_2_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2182#define EFI_ACPI_6_2_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2183\r
2184///\r
2185/// ERST Action Command Status\r
2186///\r
2187#define EFI_ACPI_6_2_ERST_STATUS_SUCCESS 0x00\r
2188#define EFI_ACPI_6_2_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2189#define EFI_ACPI_6_2_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2190#define EFI_ACPI_6_2_ERST_STATUS_FAILED 0x03\r
2191#define EFI_ACPI_6_2_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2192#define EFI_ACPI_6_2_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2193\r
2194///\r
2195/// ERST Serialization Instructions\r
2196///\r
2197#define EFI_ACPI_6_2_ERST_READ_REGISTER 0x00\r
2198#define EFI_ACPI_6_2_ERST_READ_REGISTER_VALUE 0x01\r
2199#define EFI_ACPI_6_2_ERST_WRITE_REGISTER 0x02\r
2200#define EFI_ACPI_6_2_ERST_WRITE_REGISTER_VALUE 0x03\r
2201#define EFI_ACPI_6_2_ERST_NOOP 0x04\r
2202#define EFI_ACPI_6_2_ERST_LOAD_VAR1 0x05\r
2203#define EFI_ACPI_6_2_ERST_LOAD_VAR2 0x06\r
2204#define EFI_ACPI_6_2_ERST_STORE_VAR1 0x07\r
2205#define EFI_ACPI_6_2_ERST_ADD 0x08\r
2206#define EFI_ACPI_6_2_ERST_SUBTRACT 0x09\r
2207#define EFI_ACPI_6_2_ERST_ADD_VALUE 0x0A\r
2208#define EFI_ACPI_6_2_ERST_SUBTRACT_VALUE 0x0B\r
2209#define EFI_ACPI_6_2_ERST_STALL 0x0C\r
2210#define EFI_ACPI_6_2_ERST_STALL_WHILE_TRUE 0x0D\r
2211#define EFI_ACPI_6_2_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2212#define EFI_ACPI_6_2_ERST_GOTO 0x0F\r
2213#define EFI_ACPI_6_2_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2214#define EFI_ACPI_6_2_ERST_SET_DST_ADDRESS_BASE 0x11\r
2215#define EFI_ACPI_6_2_ERST_MOVE_DATA 0x12\r
2216\r
2217///\r
2218/// ERST Instruction Flags\r
2219///\r
2220#define EFI_ACPI_6_2_ERST_PRESERVE_REGISTER 0x01\r
2221\r
2222///\r
2223/// ERST Serialization Instruction Entry\r
2224///\r
2225typedef struct {\r
2226 UINT8 SerializationAction;\r
2227 UINT8 Instruction;\r
2228 UINT8 Flags;\r
2229 UINT8 Reserved0;\r
2230 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2231 UINT64 Value;\r
2232 UINT64 Mask;\r
2233} EFI_ACPI_6_2_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2234\r
2235///\r
2236/// EINJ - Error Injection Table\r
2237///\r
2238typedef struct {\r
2239 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2240 UINT32 InjectionHeaderSize;\r
2241 UINT8 InjectionFlags;\r
2242 UINT8 Reserved0[3];\r
2243 UINT32 InjectionEntryCount;\r
2244} EFI_ACPI_6_2_ERROR_INJECTION_TABLE_HEADER;\r
2245\r
2246///\r
2247/// EINJ Version (as defined in ACPI 6.2 spec.)\r
2248///\r
2249#define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_REVISION 0x01\r
2250\r
2251///\r
2252/// EINJ Error Injection Actions\r
2253///\r
2254#define EFI_ACPI_6_2_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2255#define EFI_ACPI_6_2_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2256#define EFI_ACPI_6_2_EINJ_SET_ERROR_TYPE 0x02\r
2257#define EFI_ACPI_6_2_EINJ_GET_ERROR_TYPE 0x03\r
2258#define EFI_ACPI_6_2_EINJ_END_OPERATION 0x04\r
2259#define EFI_ACPI_6_2_EINJ_EXECUTE_OPERATION 0x05\r
2260#define EFI_ACPI_6_2_EINJ_CHECK_BUSY_STATUS 0x06\r
2261#define EFI_ACPI_6_2_EINJ_GET_COMMAND_STATUS 0x07\r
2262#define EFI_ACPI_6_2_EINJ_TRIGGER_ERROR 0xFF\r
2263\r
2264///\r
2265/// EINJ Action Command Status\r
2266///\r
2267#define EFI_ACPI_6_2_EINJ_STATUS_SUCCESS 0x00\r
2268#define EFI_ACPI_6_2_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2269#define EFI_ACPI_6_2_EINJ_STATUS_INVALID_ACCESS 0x02\r
2270\r
2271///\r
2272/// EINJ Error Type Definition\r
2273///\r
2274#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2275#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2276#define EFI_ACPI_6_2_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2277#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2278#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2279#define EFI_ACPI_6_2_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2280#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2281#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2282#define EFI_ACPI_6_2_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2283#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2284#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2285#define EFI_ACPI_6_2_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2286\r
2287///\r
2288/// EINJ Injection Instructions\r
2289///\r
2290#define EFI_ACPI_6_2_EINJ_READ_REGISTER 0x00\r
2291#define EFI_ACPI_6_2_EINJ_READ_REGISTER_VALUE 0x01\r
2292#define EFI_ACPI_6_2_EINJ_WRITE_REGISTER 0x02\r
2293#define EFI_ACPI_6_2_EINJ_WRITE_REGISTER_VALUE 0x03\r
2294#define EFI_ACPI_6_2_EINJ_NOOP 0x04\r
2295\r
2296///\r
2297/// EINJ Instruction Flags\r
2298///\r
2299#define EFI_ACPI_6_2_EINJ_PRESERVE_REGISTER 0x01\r
2300\r
2301///\r
2302/// EINJ Injection Instruction Entry\r
2303///\r
2304typedef struct {\r
2305 UINT8 InjectionAction;\r
2306 UINT8 Instruction;\r
2307 UINT8 Flags;\r
2308 UINT8 Reserved0;\r
2309 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2310 UINT64 Value;\r
2311 UINT64 Mask;\r
2312} EFI_ACPI_6_2_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2313\r
2314///\r
2315/// EINJ Trigger Action Table\r
2316///\r
2317typedef struct {\r
2318 UINT32 HeaderSize;\r
2319 UINT32 Revision;\r
2320 UINT32 TableSize;\r
2321 UINT32 EntryCount;\r
2322} EFI_ACPI_6_2_EINJ_TRIGGER_ACTION_TABLE;\r
2323\r
2324///\r
2325/// Platform Communications Channel Table (PCCT)\r
2326///\r
2327typedef struct {\r
2328 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2329 UINT32 Flags;\r
2330 UINT64 Reserved;\r
2331} EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2332\r
2333///\r
2334/// PCCT Version (as defined in ACPI 6.2 spec.)\r
2335///\r
2336#define EFI_ACPI_6_2_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2337\r
2338///\r
2339/// PCCT Global Flags\r
2340///\r
2341#define EFI_ACPI_6_2_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2342\r
2343//\r
2344// PCCT Subspace type\r
2345//\r
2346#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2347#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2348#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2349#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2350#define EFI_ACPI_6_2_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
2351\r
2352///\r
2353/// PCC Subspace Structure Header\r
2354///\r
2355typedef struct {\r
2356 UINT8 Type;\r
2357 UINT8 Length;\r
2358} EFI_ACPI_6_2_PCCT_SUBSPACE_HEADER;\r
2359\r
2360///\r
2361/// Generic Communications Subspace Structure\r
2362///\r
2363typedef struct {\r
2364 UINT8 Type;\r
2365 UINT8 Length;\r
2366 UINT8 Reserved[6];\r
2367 UINT64 BaseAddress;\r
2368 UINT64 AddressLength;\r
2369 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2370 UINT64 DoorbellPreserve;\r
2371 UINT64 DoorbellWrite;\r
2372 UINT32 NominalLatency;\r
2373 UINT32 MaximumPeriodicAccessRate;\r
2374 UINT16 MinimumRequestTurnaroundTime;\r
2375} EFI_ACPI_6_2_PCCT_SUBSPACE_GENERIC;\r
2376\r
2377///\r
2378/// Generic Communications Channel Shared Memory Region\r
2379///\r
2380\r
2381typedef struct {\r
2382 UINT8 Command;\r
2383 UINT8 Reserved:7;\r
2384 UINT8 NotifyOnCompletion:1;\r
2385} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2386\r
2387typedef struct {\r
2388 UINT8 CommandComplete:1;\r
2389 UINT8 PlatformInterrupt:1;\r
2390 UINT8 Error:1;\r
2391 UINT8 PlatformNotification:1;\r
2392 UINT8 Reserved:4;\r
2393 UINT8 Reserved1;\r
2394} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2395\r
2396typedef struct {\r
2397 UINT32 Signature;\r
2398 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2399 EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2400} EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2401\r
2402#define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2403#define EFI_ACPI_6_2_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2404\r
2405///\r
2406/// Type 1 HW-Reduced Communications Subspace Structure\r
2407///\r
2408typedef struct {\r
2409 UINT8 Type;\r
2410 UINT8 Length;\r
2411 UINT32 PlatformInterrupt;\r
2412 UINT8 PlatformInterruptFlags;\r
2413 UINT8 Reserved;\r
2414 UINT64 BaseAddress;\r
2415 UINT64 AddressLength;\r
2416 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2417 UINT64 DoorbellPreserve;\r
2418 UINT64 DoorbellWrite;\r
2419 UINT32 NominalLatency;\r
2420 UINT32 MaximumPeriodicAccessRate;\r
2421 UINT16 MinimumRequestTurnaroundTime;\r
2422} EFI_ACPI_6_2_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2423\r
2424///\r
2425/// Type 2 HW-Reduced Communications Subspace Structure\r
2426///\r
2427typedef struct {\r
2428 UINT8 Type;\r
2429 UINT8 Length;\r
2430 UINT32 PlatformInterrupt;\r
2431 UINT8 PlatformInterruptFlags;\r
2432 UINT8 Reserved;\r
2433 UINT64 BaseAddress;\r
2434 UINT64 AddressLength;\r
2435 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2436 UINT64 DoorbellPreserve;\r
2437 UINT64 DoorbellWrite;\r
2438 UINT32 NominalLatency;\r
2439 UINT32 MaximumPeriodicAccessRate;\r
2440 UINT16 MinimumRequestTurnaroundTime;\r
2441 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2442 UINT64 PlatformInterruptAckPreserve;\r
2443 UINT64 PlatformInterruptAckWrite;\r
2444} EFI_ACPI_6_2_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2445\r
2446///\r
2447/// Type 3 Extended PCC Subspace Structure\r
2448///\r
2449typedef struct {\r
2450 UINT8 Type;\r
2451 UINT8 Length;\r
2452 UINT32 PlatformInterrupt;\r
2453 UINT8 PlatformInterruptFlags;\r
2454 UINT8 Reserved;\r
2455 UINT64 BaseAddress;\r
2456 UINT32 AddressLength;\r
2457 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2458 UINT64 DoorbellPreserve;\r
2459 UINT64 DoorbellWrite;\r
2460 UINT32 NominalLatency;\r
2461 UINT32 MaximumPeriodicAccessRate;\r
2462 UINT32 MinimumRequestTurnaroundTime;\r
2463 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2464 UINT64 PlatformInterruptAckPreserve;\r
2465 UINT64 PlatformInterruptAckSet;\r
2466 UINT8 Reserved1[8];\r
2467 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2468 UINT64 CommandCompleteCheckMask;\r
2469 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2470 UINT64 CommandCompleteUpdatePreserve;\r
2471 UINT64 CommandCompleteUpdateSet;\r
2472 EFI_ACPI_6_2_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2473 UINT64 ErrorStatusMask;\r
2474} EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2475\r
2476///\r
2477/// Type 4 Extended PCC Subspace Structure\r
2478///\r
2479typedef EFI_ACPI_6_2_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_2_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2480\r
2481#define EFI_ACPI_6_2_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2482\r
2483typedef struct {\r
2484 UINT32 Signature;\r
2485 UINT32 Flags;\r
2486 UINT32 Length;\r
2487 UINT32 Command;\r
2488} EFI_ACPI_6_2_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2489\r
2490///\r
2491/// Platform Debug Trigger Table (PDTT)\r
2492///\r
2493typedef struct {\r
2494 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2495 UINT8 TriggerCount;\r
2496 UINT8 Reserved[3];\r
2497 UINT32 TriggerIdentifierArrayOffset;\r
2498} EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2499\r
2500///\r
2501/// PDTT Revision (as defined in ACPI 6.2 spec.)\r
2502///\r
2503#define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2504\r
2505///\r
2506/// PDTT Platform Communication Channel Identifier Structure\r
2507///\r
2508typedef struct {\r
2509 UINT16 SubChannelIdentifer:8;\r
2510 UINT16 Runtime:1;\r
2511 UINT16 WaitForCompletion:1;\r
2512 UINT16 Reserved:6;\r
2513} EFI_ACPI_6_2_PDTT_PCC_IDENTIFIER;\r
2514\r
2515///\r
2516/// PCC Commands Codes used by Platform Debug Trigger Table\r
2517///\r
2518#define EFI_ACPI_6_2_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2519#define EFI_ACPI_6_2_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2520\r
2521///\r
2522/// PPTT Platform Communication Channel\r
2523///\r
2524typedef EFI_ACPI_6_2_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_2_PDTT_PCC;\r
2525\r
2526///\r
2527/// Processor Properties Topology Table (PPTT)\r
2528///\r
2529typedef struct {\r
2530 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2531} EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2532\r
2533///\r
2534/// PPTT Revision (as defined in ACPI 6.2 spec.)\r
2535///\r
2536#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x01\r
2537\r
2538///\r
2539/// PPTT types\r
2540///\r
2541#define EFI_ACPI_6_2_PPTT_TYPE_PROCESSOR 0x00\r
2542#define EFI_ACPI_6_2_PPTT_TYPE_CACHE 0x01\r
2543#define EFI_ACPI_6_2_PPTT_TYPE_ID 0x02\r
2544\r
2545///\r
2546/// PPTT Structure Header\r
2547///\r
2548typedef struct {\r
2549 UINT8 Type;\r
2550 UINT8 Length;\r
2551 UINT8 Reserved[2];\r
2552} EFI_ACPI_6_2_PPTT_STRUCTURE_HEADER;\r
2553\r
c4e75574
HG		 2554///\r
2555/// For PPTT struct processor flags\r
2556///\r
2557#define EFI_ACPI_6_2_PPTT_PROCESSOR_ID_INVALID 0x0\r
2558#define EFI_ACPI_6_2_PPTT_PROCESSOR_ID_VALID 0x1\r
2559\r
e67b675d
SZ		 2560///\r
2561/// Processor hierarchy node structure flags\r
2562///\r
2563typedef struct {\r
2564 UINT32 PhysicalPackage:1;\r
2565 UINT32 AcpiProcessorIdValid:1;\r
2566 UINT32 Reserved:30;\r
2567} EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2568\r
2569///\r
2570/// Processor hierarchy node structure\r
2571///\r
2572typedef struct {\r
19ef86ee 2573 UINT8 Type;\r
e67b675d
SZ		 2574 UINT8 Length;\r
2575 UINT8 Reserved[2];\r
2576 EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2577 UINT32 Parent;\r
2578 UINT32 AcpiProcessorId;\r
2579 UINT32 NumberOfPrivateResources;\r
2580} EFI_ACPI_6_2_PPTT_STRUCTURE_PROCESSOR;\r
2581\r
2582///\r
2583/// Cache Type Structure flags\r
2584///\r
2585typedef struct {\r
2586 UINT32 SizePropertyValid:1;\r
2587 UINT32 NumberOfSetsValid:1;\r
2588 UINT32 AssociativityValid:1;\r
2589 UINT32 AllocationTypeValid:1;\r
2590 UINT32 CacheTypeValid:1;\r
2591 UINT32 WritePolicyValid:1;\r
2592 UINT32 LineSizeValid:1;\r
2593 UINT32 Reserved:25;\r
2594} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS;\r
2595\r
c4e75574
HG		 2596///\r
2597/// For cache attributes\r
2598///\r
2599#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0\r
2600#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1\r
2601#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2\r
2602#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0\r
2603#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1\r
2604#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2\r
2605#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0\r
2606#define EFI_ACPI_6_2_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1\r
2607\r
e67b675d
SZ		 2608///\r
2609/// Cache Type Structure cache attributes\r
2610///\r
2611typedef struct {\r
2612 UINT8 AllocationType:2;\r
2613 UINT8 CacheType:2;\r
2614 UINT8 WritePolicy:1;\r
2615 UINT8 Reserved:3;\r
2616} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2617\r
2618///\r
2619/// Cache Type Structure\r
2620///\r
2621typedef struct {\r
2622 UINT8 Type;\r
2623 UINT8 Length;\r
2624 UINT8 Reserved[2];\r
2625 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2626 UINT32 NextLevelOfCache;\r
2627 UINT32 Size;\r
2628 UINT32 NumberOfSets;\r
2629 UINT8 Associativity;\r
2630 EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2631 UINT16 LineSize;\r
2632} EFI_ACPI_6_2_PPTT_STRUCTURE_CACHE;\r
2633\r
2634///\r
2635/// ID structure\r
2636///\r
2637typedef struct {\r
2638 UINT8 Type;\r
2639 UINT8 Length;\r
2640 UINT8 Reserved[2];\r
2641 UINT32 VendorId;\r
2642 UINT64 Level1Id;\r
2643 UINT64 Level2Id;\r
2644 UINT16 MajorRev;\r
2645 UINT16 MinorRev;\r
2646 UINT16 SpinRev;\r
2647} EFI_ACPI_6_2_PPTT_STRUCTURE_ID;\r
2648\r
2649//\r
2650// Known table signatures\r
2651//\r
2652\r
2653///\r
2654/// "RSD PTR " Root System Description Pointer\r
2655///\r
2656#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2657\r
2658///\r
2659/// "APIC" Multiple APIC Description Table\r
2660///\r
2661#define EFI_ACPI_6_2_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2662\r
2663///\r
2664/// "BERT" Boot Error Record Table\r
2665///\r
2666#define EFI_ACPI_6_2_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2667\r
2668///\r
2669/// "BGRT" Boot Graphics Resource Table\r
2670///\r
2671#define EFI_ACPI_6_2_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2672\r
2673///\r
2674/// "CPEP" Corrected Platform Error Polling Table\r
2675///\r
2676#define EFI_ACPI_6_2_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2677\r
2678///\r
2679/// "DSDT" Differentiated System Description Table\r
2680///\r
2681#define EFI_ACPI_6_2_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2682\r
2683///\r
2684/// "ECDT" Embedded Controller Boot Resources Table\r
2685///\r
2686#define EFI_ACPI_6_2_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2687\r
2688///\r
2689/// "EINJ" Error Injection Table\r
2690///\r
2691#define EFI_ACPI_6_2_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2692\r
2693///\r
2694/// "ERST" Error Record Serialization Table\r
2695///\r
2696#define EFI_ACPI_6_2_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2697\r
2698///\r
2699/// "FACP" Fixed ACPI Description Table\r
2700///\r
2701#define EFI_ACPI_6_2_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2702\r
2703///\r
2704/// "FACS" Firmware ACPI Control Structure\r
2705///\r
2706#define EFI_ACPI_6_2_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2707\r
2708///\r
2709/// "FPDT" Firmware Performance Data Table\r
2710///\r
2711#define EFI_ACPI_6_2_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2712\r
2713///\r
2714/// "GTDT" Generic Timer Description Table\r
2715///\r
2716#define EFI_ACPI_6_2_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2717\r
2718///\r
2719/// "HEST" Hardware Error Source Table\r
2720///\r
2721#define EFI_ACPI_6_2_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2722\r
2723///\r
2724/// "HMAT" Heterogeneous Memory Attribute Table\r
2725///\r
2726#define EFI_ACPI_6_2_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
2727\r
2728///\r
2729/// "MPST" Memory Power State Table\r
2730///\r
2731#define EFI_ACPI_6_2_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2732\r
2733///\r
2734/// "MSCT" Maximum System Characteristics Table\r
2735///\r
2736#define EFI_ACPI_6_2_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2737\r
2738///\r
2739/// "NFIT" NVDIMM Firmware Interface Table\r
2740///\r
2741#define EFI_ACPI_6_2_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2742\r
2743///\r
2744/// "PDTT" Platform Debug Trigger Table\r
2745///\r
2746#define EFI_ACPI_6_2_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
2747\r
2748///\r
2749/// "PMTT" Platform Memory Topology Table\r
2750///\r
2751#define EFI_ACPI_6_2_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2752\r
2753///\r
2754/// "PPTT" Processor Properties Topology Table\r
2755///\r
2756#define EFI_ACPI_6_2_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
2757\r
2758///\r
2759/// "PSDT" Persistent System Description Table\r
2760///\r
2761#define EFI_ACPI_6_2_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2762\r
2763///\r
2764/// "RASF" ACPI RAS Feature Table\r
2765///\r
2766#define EFI_ACPI_6_2_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2767\r
2768///\r
2769/// "RSDT" Root System Description Table\r
2770///\r
2771#define EFI_ACPI_6_2_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2772\r
2773///\r
2774/// "SBST" Smart Battery Specification Table\r
2775///\r
2776#define EFI_ACPI_6_2_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2777\r
2778///\r
2779/// "SDEV" Secure DEVices Table\r
2780///\r
2781#define EFI_ACPI_6_2_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
2782\r
2783///\r
2784/// "SLIT" System Locality Information Table\r
2785///\r
2786#define EFI_ACPI_6_2_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2787\r
2788///\r
2789/// "SRAT" System Resource Affinity Table\r
2790///\r
2791#define EFI_ACPI_6_2_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2792\r
2793///\r
2794/// "SSDT" Secondary System Description Table\r
2795///\r
2796#define EFI_ACPI_6_2_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2797\r
2798///\r
2799/// "XSDT" Extended System Description Table\r
2800///\r
2801#define EFI_ACPI_6_2_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2802\r
2803///\r
2804/// "BOOT" MS Simple Boot Spec\r
2805///\r
2806#define EFI_ACPI_6_2_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2807\r
2808///\r
2809/// "CSRT" MS Core System Resource Table\r
2810///\r
2811#define EFI_ACPI_6_2_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2812\r
2813///\r
2814/// "DBG2" MS Debug Port 2 Spec\r
2815///\r
2816#define EFI_ACPI_6_2_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
2817\r
2818///\r
2819/// "DBGP" MS Debug Port Spec\r
2820///\r
2821#define EFI_ACPI_6_2_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
2822\r
2823///\r
2824/// "DMAR" DMA Remapping Table\r
2825///\r
2826#define EFI_ACPI_6_2_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
2827\r
2828///\r
2829/// "DPPT" DMA Protection Policy Table\r
2830///\r
2831#define EFI_ACPI_6_2_DMA_PROTECTION_POLICY_TABLE_SIGNATURE SIGNATURE_32('D', 'P', 'P', 'T')\r
2832\r
2833///\r
2834/// "DRTM" Dynamic Root of Trust for Measurement Table\r
2835///\r
2836#define EFI_ACPI_6_2_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
2837\r
2838///\r
2839/// "ETDT" Event Timer Description Table\r
2840///\r
2841#define EFI_ACPI_6_2_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
2842\r
2843///\r
2844/// "HPET" IA-PC High Precision Event Timer Table\r
2845///\r
2846#define EFI_ACPI_6_2_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
2847\r
2848///\r
2849/// "iBFT" iSCSI Boot Firmware Table\r
2850///\r
2851#define EFI_ACPI_6_2_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
2852\r
2853///\r
2854/// "IORT" I/O Remapping Table\r
2855///\r
2856#define EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
2857\r
2858///\r
2859/// "IVRS" I/O Virtualization Reporting Structure\r
2860///\r
2861#define EFI_ACPI_6_2_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
2862\r
2863///\r
2864/// "LPIT" Low Power Idle Table\r
2865///\r
2866#define EFI_ACPI_6_2_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
2867\r
2868///\r
2869/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
2870///\r
2871#define EFI_ACPI_6_2_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
2872\r
2873///\r
2874/// "MCHI" Management Controller Host Interface Table\r
2875///\r
2876#define EFI_ACPI_6_2_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
2877\r
2878///\r
2879/// "MSDM" MS Data Management Table\r
2880///\r
2881#define EFI_ACPI_6_2_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
2882\r
a67efa3b
KK		 2883///\r
2884/// "PCCT" Platform Communications Channel Table\r
2885///\r
2886#define EFI_ACPI_6_2_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')\r
2887\r
e67b675d
SZ		 2888///\r
2889/// "SDEI" Software Delegated Exceptions Interface Table\r
2890///\r
2891#define EFI_ACPI_6_2_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
2892\r
2893///\r
2894/// "SLIC" MS Software Licensing Table Specification\r
2895///\r
2896#define EFI_ACPI_6_2_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
2897\r
2898///\r
b219e2cd 2899/// "SPCR" Serial Port Console Redirection Table\r
e67b675d
SZ		 2900///\r
2901#define EFI_ACPI_6_2_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
2902\r
2903///\r
2904/// "SPMI" Server Platform Management Interface Table\r
2905///\r
2906#define EFI_ACPI_6_2_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
2907\r
2908///\r
2909/// "STAO" _STA Override Table\r
2910///\r
2911#define EFI_ACPI_6_2_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
2912\r
2913///\r
2914/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
2915///\r
2916#define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
2917\r
2918///\r
2919/// "TPM2" Trusted Computing Platform 1 Table\r
2920///\r
2921#define EFI_ACPI_6_2_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
2922\r
2923///\r
2924/// "UEFI" UEFI ACPI Data Table\r
2925///\r
2926#define EFI_ACPI_6_2_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
2927\r
2928///\r
2929/// "WAET" Windows ACPI Emulated Devices Table\r
2930///\r
2931#define EFI_ACPI_6_2_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
2932\r
2933///\r
2934/// "WDAT" Watchdog Action Table\r
2935///\r
2936#define EFI_ACPI_6_2_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
2937\r
2938///\r
2939/// "WDRT" Watchdog Resource Table\r
2940///\r
2941#define EFI_ACPI_6_2_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
2942\r
2943///\r
2944/// "WPBT" MS Platform Binary Table\r
2945///\r
2946#define EFI_ACPI_6_2_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
2947\r
2948///\r
2949/// "WSMT" Windows SMM Security Mitigation Table\r
2950///\r
2951#define EFI_ACPI_6_2_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
2952\r
2953///\r
2954/// "XENV" Xen Project Table\r
2955///\r
2956#define EFI_ACPI_6_2_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
2957\r
2958#pragma pack()\r
2959\r
2960#endif\r
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