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5963ce5d
CJ		 1/** @file\r
2 ACPI 6.4 definitions from the ACPI Specification Revision 6.4 Jan, 2021.\r
3\r
4 Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
5 Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>\r
6\r
7 SPDX-License-Identifier: BSD-2-Clause-Patent\r
8**/\r
9\r
10#ifndef ACPI_6_4_H_\r
11#define ACPI_6_4_H_\r
12\r
13#include <IndustryStandard/Acpi63.h>\r
14\r
15//\r
16// Ensure proper structure formats\r
17//\r
18#pragma pack(1)\r
19\r
20///\r
21/// ACPI 6.4 Generic Address Space definition\r
22///\r
23typedef struct {\r
24 UINT8 AddressSpaceId;\r
25 UINT8 RegisterBitWidth;\r
26 UINT8 RegisterBitOffset;\r
27 UINT8 AccessSize;\r
28 UINT64 Address;\r
29} EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE;\r
30\r
31//\r
32// Generic Address Space Address IDs\r
33//\r
34#define EFI_ACPI_6_4_SYSTEM_MEMORY 0x00\r
35#define EFI_ACPI_6_4_SYSTEM_IO 0x01\r
36#define EFI_ACPI_6_4_PCI_CONFIGURATION_SPACE 0x02\r
37#define EFI_ACPI_6_4_EMBEDDED_CONTROLLER 0x03\r
38#define EFI_ACPI_6_4_SMBUS 0x04\r
39#define EFI_ACPI_6_4_SYSTEM_CMOS 0x05\r
40#define EFI_ACPI_6_4_PCI_BAR_TARGET 0x06\r
41#define EFI_ACPI_6_4_IPMI 0x07\r
42#define EFI_ACPI_6_4_GENERAL_PURPOSE_IO 0x08\r
43#define EFI_ACPI_6_4_GENERIC_SERIAL_BUS 0x09\r
44#define EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
45#define EFI_ACPI_6_4_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
46\r
47//\r
48// Generic Address Space Access Sizes\r
49//\r
50#define EFI_ACPI_6_4_UNDEFINED 0\r
51#define EFI_ACPI_6_4_BYTE 1\r
52#define EFI_ACPI_6_4_WORD 2\r
53#define EFI_ACPI_6_4_DWORD 3\r
54#define EFI_ACPI_6_4_QWORD 4\r
55\r
56//\r
57// ACPI 6.4 table structures\r
58//\r
59\r
60///\r
61/// Root System Description Pointer Structure\r
62///\r
63typedef struct {\r
64 UINT64 Signature;\r
65 UINT8 Checksum;\r
66 UINT8 OemId[6];\r
67 UINT8 Revision;\r
68 UINT32 RsdtAddress;\r
69 UINT32 Length;\r
70 UINT64 XsdtAddress;\r
71 UINT8 ExtendedChecksum;\r
72 UINT8 Reserved[3];\r
73} EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
74\r
75///\r
76/// RSD_PTR Revision (as defined in ACPI 6.4 spec.)\r
77///\r
78#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.4) says current value is 2\r
79\r
80///\r
81/// Common table header, this prefaces all ACPI tables, including FACS, but\r
82/// excluding the RSD PTR structure\r
83///\r
84typedef struct {\r
85 UINT32 Signature;\r
86 UINT32 Length;\r
87} EFI_ACPI_6_4_COMMON_HEADER;\r
88\r
89//\r
90// Root System Description Table\r
91// No definition needed as it is a common description table header, the same with\r
92// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
93//\r
94\r
95///\r
96/// RSDT Revision (as defined in ACPI 6.4 spec.)\r
97///\r
98#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
99\r
100//\r
101// Extended System Description Table\r
102// No definition needed as it is a common description table header, the same with\r
103// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
104//\r
105\r
106///\r
107/// XSDT Revision (as defined in ACPI 6.4 spec.)\r
108///\r
109#define EFI_ACPI_6_4_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
110\r
111///\r
112/// Fixed ACPI Description Table Structure (FADT)\r
113///\r
114typedef struct {\r
115 EFI_ACPI_DESCRIPTION_HEADER Header;\r
116 UINT32 FirmwareCtrl;\r
117 UINT32 Dsdt;\r
118 UINT8 Reserved0;\r
119 UINT8 PreferredPmProfile;\r
120 UINT16 SciInt;\r
121 UINT32 SmiCmd;\r
122 UINT8 AcpiEnable;\r
123 UINT8 AcpiDisable;\r
124 UINT8 S4BiosReq;\r
125 UINT8 PstateCnt;\r
126 UINT32 Pm1aEvtBlk;\r
127 UINT32 Pm1bEvtBlk;\r
128 UINT32 Pm1aCntBlk;\r
129 UINT32 Pm1bCntBlk;\r
130 UINT32 Pm2CntBlk;\r
131 UINT32 PmTmrBlk;\r
132 UINT32 Gpe0Blk;\r
133 UINT32 Gpe1Blk;\r
134 UINT8 Pm1EvtLen;\r
135 UINT8 Pm1CntLen;\r
136 UINT8 Pm2CntLen;\r
137 UINT8 PmTmrLen;\r
138 UINT8 Gpe0BlkLen;\r
139 UINT8 Gpe1BlkLen;\r
140 UINT8 Gpe1Base;\r
141 UINT8 CstCnt;\r
142 UINT16 PLvl2Lat;\r
143 UINT16 PLvl3Lat;\r
144 UINT16 FlushSize;\r
145 UINT16 FlushStride;\r
146 UINT8 DutyOffset;\r
147 UINT8 DutyWidth;\r
148 UINT8 DayAlrm;\r
149 UINT8 MonAlrm;\r
150 UINT8 Century;\r
151 UINT16 IaPcBootArch;\r
152 UINT8 Reserved1;\r
153 UINT32 Flags;\r
154 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
155 UINT8 ResetValue;\r
156 UINT16 ArmBootArch;\r
157 UINT8 MinorVersion;\r
158 UINT64 XFirmwareCtrl;\r
159 UINT64 XDsdt;\r
160 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
161 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
162 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
163 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
164 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
165 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
166 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
167 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
168 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
169 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
170 UINT64 HypervisorVendorIdentity;\r
171} EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE;\r
172\r
173///\r
174/// FADT Version (as defined in ACPI 6.4 spec.)\r
175///\r
176#define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
4d7137f2 177#define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x04\r
5963ce5d
CJ		 178\r
179//\r
180// Fixed ACPI Description Table Preferred Power Management Profile\r
181//\r
182#define EFI_ACPI_6_4_PM_PROFILE_UNSPECIFIED 0\r
183#define EFI_ACPI_6_4_PM_PROFILE_DESKTOP 1\r
184#define EFI_ACPI_6_4_PM_PROFILE_MOBILE 2\r
185#define EFI_ACPI_6_4_PM_PROFILE_WORKSTATION 3\r
186#define EFI_ACPI_6_4_PM_PROFILE_ENTERPRISE_SERVER 4\r
187#define EFI_ACPI_6_4_PM_PROFILE_SOHO_SERVER 5\r
188#define EFI_ACPI_6_4_PM_PROFILE_APPLIANCE_PC 6\r
189#define EFI_ACPI_6_4_PM_PROFILE_PERFORMANCE_SERVER 7\r
190#define EFI_ACPI_6_4_PM_PROFILE_TABLET 8\r
191\r
192//\r
193// Fixed ACPI Description Table Boot Architecture Flags\r
194// All other bits are reserved and must be set to 0.\r
195//\r
196#define EFI_ACPI_6_4_LEGACY_DEVICES BIT0\r
197#define EFI_ACPI_6_4_8042 BIT1\r
198#define EFI_ACPI_6_4_VGA_NOT_PRESENT BIT2\r
199#define EFI_ACPI_6_4_MSI_NOT_SUPPORTED BIT3\r
200#define EFI_ACPI_6_4_PCIE_ASPM_CONTROLS BIT4\r
201#define EFI_ACPI_6_4_CMOS_RTC_NOT_PRESENT BIT5\r
202\r
203//\r
204// Fixed ACPI Description Table Arm Boot Architecture Flags\r
205// All other bits are reserved and must be set to 0.\r
206//\r
207#define EFI_ACPI_6_4_ARM_PSCI_COMPLIANT BIT0\r
208#define EFI_ACPI_6_4_ARM_PSCI_USE_HVC BIT1\r
209\r
210//\r
211// Fixed ACPI Description Table Fixed Feature Flags\r
212// All other bits are reserved and must be set to 0.\r
213//\r
214#define EFI_ACPI_6_4_WBINVD BIT0\r
215#define EFI_ACPI_6_4_WBINVD_FLUSH BIT1\r
216#define EFI_ACPI_6_4_PROC_C1 BIT2\r
217#define EFI_ACPI_6_4_P_LVL2_UP BIT3\r
218#define EFI_ACPI_6_4_PWR_BUTTON BIT4\r
219#define EFI_ACPI_6_4_SLP_BUTTON BIT5\r
220#define EFI_ACPI_6_4_FIX_RTC BIT6\r
221#define EFI_ACPI_6_4_RTC_S4 BIT7\r
222#define EFI_ACPI_6_4_TMR_VAL_EXT BIT8\r
223#define EFI_ACPI_6_4_DCK_CAP BIT9\r
224#define EFI_ACPI_6_4_RESET_REG_SUP BIT10\r
225#define EFI_ACPI_6_4_SEALED_CASE BIT11\r
226#define EFI_ACPI_6_4_HEADLESS BIT12\r
227#define EFI_ACPI_6_4_CPU_SW_SLP BIT13\r
228#define EFI_ACPI_6_4_PCI_EXP_WAK BIT14\r
229#define EFI_ACPI_6_4_USE_PLATFORM_CLOCK BIT15\r
230#define EFI_ACPI_6_4_S4_RTC_STS_VALID BIT16\r
231#define EFI_ACPI_6_4_REMOTE_POWER_ON_CAPABLE BIT17\r
232#define EFI_ACPI_6_4_FORCE_APIC_CLUSTER_MODEL BIT18\r
233#define EFI_ACPI_6_4_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
234#define EFI_ACPI_6_4_HW_REDUCED_ACPI BIT20\r
235#define EFI_ACPI_6_4_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
236\r
237///\r
238/// Firmware ACPI Control Structure\r
239///\r
240typedef struct {\r
241 UINT32 Signature;\r
242 UINT32 Length;\r
243 UINT32 HardwareSignature;\r
244 UINT32 FirmwareWakingVector;\r
245 UINT32 GlobalLock;\r
246 UINT32 Flags;\r
247 UINT64 XFirmwareWakingVector;\r
248 UINT8 Version;\r
249 UINT8 Reserved0[3];\r
250 UINT32 OspmFlags;\r
251 UINT8 Reserved1[24];\r
252} EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
253\r
254///\r
255/// FACS Version (as defined in ACPI 6.4 spec.)\r
256///\r
257#define EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
258\r
259///\r
260/// Firmware Control Structure Feature Flags\r
261/// All other bits are reserved and must be set to 0.\r
262///\r
263#define EFI_ACPI_6_4_S4BIOS_F BIT0\r
264#define EFI_ACPI_6_4_64BIT_WAKE_SUPPORTED_F BIT1\r
265\r
266///\r
267/// OSPM Enabled Firmware Control Structure Flags\r
268/// All other bits are reserved and must be set to 0.\r
269///\r
270#define EFI_ACPI_6_4_OSPM_64BIT_WAKE_F BIT0\r
271\r
272//\r
273// Differentiated System Description Table,\r
274// Secondary System Description Table\r
275// and Persistent System Description Table,\r
276// no definition needed as they are common description table header, the same with\r
277// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
278//\r
279#define EFI_ACPI_6_4_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
280#define EFI_ACPI_6_4_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
281\r
282///\r
283/// Multiple APIC Description Table header definition. The rest of the table\r
284/// must be defined in a platform specific manner.\r
285///\r
286typedef struct {\r
287 EFI_ACPI_DESCRIPTION_HEADER Header;\r
288 UINT32 LocalApicAddress;\r
289 UINT32 Flags;\r
290} EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
291\r
292///\r
293/// MADT Revision (as defined in ACPI 6.4 spec.)\r
294///\r
295#define EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05\r
296\r
297///\r
298/// Multiple APIC Flags\r
299/// All other bits are reserved and must be set to 0.\r
300///\r
301#define EFI_ACPI_6_4_PCAT_COMPAT BIT0\r
302\r
303//\r
304// Multiple APIC Description Table APIC structure types\r
0938f923 305// All other values between 0x10 and 0x7F are reserved and\r
5963ce5d
CJ		 306// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
307//\r
308#define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC 0x00\r
309#define EFI_ACPI_6_4_IO_APIC 0x01\r
310#define EFI_ACPI_6_4_INTERRUPT_SOURCE_OVERRIDE 0x02\r
311#define EFI_ACPI_6_4_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
312#define EFI_ACPI_6_4_LOCAL_APIC_NMI 0x04\r
313#define EFI_ACPI_6_4_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
314#define EFI_ACPI_6_4_IO_SAPIC 0x06\r
315#define EFI_ACPI_6_4_LOCAL_SAPIC 0x07\r
316#define EFI_ACPI_6_4_PLATFORM_INTERRUPT_SOURCES 0x08\r
317#define EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC 0x09\r
318#define EFI_ACPI_6_4_LOCAL_X2APIC_NMI 0x0A\r
319#define EFI_ACPI_6_4_GIC 0x0B\r
320#define EFI_ACPI_6_4_GICD 0x0C\r
321#define EFI_ACPI_6_4_GIC_MSI_FRAME 0x0D\r
322#define EFI_ACPI_6_4_GICR 0x0E\r
323#define EFI_ACPI_6_4_GIC_ITS 0x0F\r
0938f923 324#define EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP 0x10\r
5963ce5d
CJ		 325\r
326//\r
327// APIC Structure Definitions\r
328//\r
329\r
330///\r
331/// Processor Local APIC Structure Definition\r
332///\r
333typedef struct {\r
334 UINT8 Type;\r
335 UINT8 Length;\r
336 UINT8 AcpiProcessorUid;\r
337 UINT8 ApicId;\r
338 UINT32 Flags;\r
339} EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
340\r
341///\r
342/// Local APIC Flags. All other bits are reserved and must be 0.\r
343///\r
344#define EFI_ACPI_6_4_LOCAL_APIC_ENABLED BIT0\r
345#define EFI_ACPI_6_4_LOCAL_APIC_ONLINE_CAPABLE BIT1\r
346\r
347///\r
348/// IO APIC Structure\r
349///\r
350typedef struct {\r
351 UINT8 Type;\r
352 UINT8 Length;\r
353 UINT8 IoApicId;\r
354 UINT8 Reserved;\r
355 UINT32 IoApicAddress;\r
356 UINT32 GlobalSystemInterruptBase;\r
357} EFI_ACPI_6_4_IO_APIC_STRUCTURE;\r
358\r
359///\r
360/// Interrupt Source Override Structure\r
361///\r
362typedef struct {\r
363 UINT8 Type;\r
364 UINT8 Length;\r
365 UINT8 Bus;\r
366 UINT8 Source;\r
367 UINT32 GlobalSystemInterrupt;\r
368 UINT16 Flags;\r
369} EFI_ACPI_6_4_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
370\r
371///\r
372/// Platform Interrupt Sources Structure Definition\r
373///\r
374typedef struct {\r
375 UINT8 Type;\r
376 UINT8 Length;\r
377 UINT16 Flags;\r
378 UINT8 InterruptType;\r
379 UINT8 ProcessorId;\r
380 UINT8 ProcessorEid;\r
381 UINT8 IoSapicVector;\r
382 UINT32 GlobalSystemInterrupt;\r
383 UINT32 PlatformInterruptSourceFlags;\r
384 UINT8 CpeiProcessorOverride;\r
385 UINT8 Reserved[31];\r
386} EFI_ACPI_6_4_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
387\r
388//\r
389// MPS INTI flags.\r
390// All other bits are reserved and must be set to 0.\r
391//\r
392#define EFI_ACPI_6_4_POLARITY (3 << 0)\r
393#define EFI_ACPI_6_4_TRIGGER_MODE (3 << 2)\r
394\r
395///\r
396/// Non-Maskable Interrupt Source Structure\r
397///\r
398typedef struct {\r
399 UINT8 Type;\r
400 UINT8 Length;\r
401 UINT16 Flags;\r
402 UINT32 GlobalSystemInterrupt;\r
403} EFI_ACPI_6_4_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
404\r
405///\r
406/// Local APIC NMI Structure\r
407///\r
408typedef struct {\r
409 UINT8 Type;\r
410 UINT8 Length;\r
411 UINT8 AcpiProcessorUid;\r
412 UINT16 Flags;\r
413 UINT8 LocalApicLint;\r
414} EFI_ACPI_6_4_LOCAL_APIC_NMI_STRUCTURE;\r
415\r
416///\r
417/// Local APIC Address Override Structure\r
418///\r
419typedef struct {\r
420 UINT8 Type;\r
421 UINT8 Length;\r
422 UINT16 Reserved;\r
423 UINT64 LocalApicAddress;\r
424} EFI_ACPI_6_4_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
425\r
426///\r
427/// IO SAPIC Structure\r
428///\r
429typedef struct {\r
430 UINT8 Type;\r
431 UINT8 Length;\r
432 UINT8 IoApicId;\r
433 UINT8 Reserved;\r
434 UINT32 GlobalSystemInterruptBase;\r
435 UINT64 IoSapicAddress;\r
436} EFI_ACPI_6_4_IO_SAPIC_STRUCTURE;\r
437\r
438///\r
439/// Local SAPIC Structure\r
440/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
441///\r
442typedef struct {\r
443 UINT8 Type;\r
444 UINT8 Length;\r
445 UINT8 AcpiProcessorId;\r
446 UINT8 LocalSapicId;\r
447 UINT8 LocalSapicEid;\r
448 UINT8 Reserved[3];\r
449 UINT32 Flags;\r
450 UINT32 ACPIProcessorUIDValue;\r
451} EFI_ACPI_6_4_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
452\r
453///\r
454/// Platform Interrupt Sources Structure\r
455///\r
456typedef struct {\r
457 UINT8 Type;\r
458 UINT8 Length;\r
459 UINT16 Flags;\r
460 UINT8 InterruptType;\r
461 UINT8 ProcessorId;\r
462 UINT8 ProcessorEid;\r
463 UINT8 IoSapicVector;\r
464 UINT32 GlobalSystemInterrupt;\r
465 UINT32 PlatformInterruptSourceFlags;\r
466} EFI_ACPI_6_4_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
467\r
468///\r
469/// Platform Interrupt Source Flags.\r
470/// All other bits are reserved and must be set to 0.\r
471///\r
472#define EFI_ACPI_6_4_CPEI_PROCESSOR_OVERRIDE BIT0\r
473\r
474///\r
475/// Processor Local x2APIC Structure Definition\r
476///\r
477typedef struct {\r
478 UINT8 Type;\r
479 UINT8 Length;\r
480 UINT8 Reserved[2];\r
481 UINT32 X2ApicId;\r
482 UINT32 Flags;\r
483 UINT32 AcpiProcessorUid;\r
484} EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
485\r
486///\r
487/// Local x2APIC NMI Structure\r
488///\r
489typedef struct {\r
490 UINT8 Type;\r
491 UINT8 Length;\r
492 UINT16 Flags;\r
493 UINT32 AcpiProcessorUid;\r
494 UINT8 LocalX2ApicLint;\r
495 UINT8 Reserved[3];\r
496} EFI_ACPI_6_4_LOCAL_X2APIC_NMI_STRUCTURE;\r
497\r
498///\r
499/// GIC Structure\r
500///\r
501typedef struct {\r
502 UINT8 Type;\r
503 UINT8 Length;\r
504 UINT16 Reserved;\r
505 UINT32 CPUInterfaceNumber;\r
506 UINT32 AcpiProcessorUid;\r
507 UINT32 Flags;\r
508 UINT32 ParkingProtocolVersion;\r
509 UINT32 PerformanceInterruptGsiv;\r
510 UINT64 ParkedAddress;\r
511 UINT64 PhysicalBaseAddress;\r
512 UINT64 GICV;\r
513 UINT64 GICH;\r
514 UINT32 VGICMaintenanceInterrupt;\r
515 UINT64 GICRBaseAddress;\r
516 UINT64 MPIDR;\r
517 UINT8 ProcessorPowerEfficiencyClass;\r
518 UINT8 Reserved2;\r
519 UINT16 SpeOverflowInterrupt;\r
520} EFI_ACPI_6_4_GIC_STRUCTURE;\r
521\r
522///\r
523/// GIC Flags. All other bits are reserved and must be 0.\r
524///\r
525#define EFI_ACPI_6_4_GIC_ENABLED BIT0\r
526#define EFI_ACPI_6_4_PERFORMANCE_INTERRUPT_MODEL BIT1\r
527#define EFI_ACPI_6_4_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
528\r
529///\r
530/// GIC Distributor Structure\r
531///\r
532typedef struct {\r
533 UINT8 Type;\r
534 UINT8 Length;\r
535 UINT16 Reserved1;\r
536 UINT32 GicId;\r
537 UINT64 PhysicalBaseAddress;\r
538 UINT32 SystemVectorBase;\r
539 UINT8 GicVersion;\r
540 UINT8 Reserved2[3];\r
541} EFI_ACPI_6_4_GIC_DISTRIBUTOR_STRUCTURE;\r
542\r
543///\r
544/// GIC Version\r
545///\r
546#define EFI_ACPI_6_4_GIC_V1 0x01\r
547#define EFI_ACPI_6_4_GIC_V2 0x02\r
548#define EFI_ACPI_6_4_GIC_V3 0x03\r
549#define EFI_ACPI_6_4_GIC_V4 0x04\r
550\r
551///\r
552/// GIC MSI Frame Structure\r
553///\r
554typedef struct {\r
555 UINT8 Type;\r
556 UINT8 Length;\r
557 UINT16 Reserved1;\r
558 UINT32 GicMsiFrameId;\r
559 UINT64 PhysicalBaseAddress;\r
560 UINT32 Flags;\r
561 UINT16 SPICount;\r
562 UINT16 SPIBase;\r
563} EFI_ACPI_6_4_GIC_MSI_FRAME_STRUCTURE;\r
564\r
565///\r
566/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
567///\r
568#define EFI_ACPI_6_4_SPI_COUNT_BASE_SELECT BIT0\r
569\r
570///\r
571/// GICR Structure\r
572///\r
573typedef struct {\r
574 UINT8 Type;\r
575 UINT8 Length;\r
576 UINT16 Reserved;\r
577 UINT64 DiscoveryRangeBaseAddress;\r
578 UINT32 DiscoveryRangeLength;\r
579} EFI_ACPI_6_4_GICR_STRUCTURE;\r
580\r
581///\r
582/// GIC Interrupt Translation Service Structure\r
583///\r
584typedef struct {\r
585 UINT8 Type;\r
586 UINT8 Length;\r
587 UINT16 Reserved;\r
588 UINT32 GicItsId;\r
589 UINT64 PhysicalBaseAddress;\r
590 UINT32 Reserved2;\r
591} EFI_ACPI_6_4_GIC_ITS_STRUCTURE;\r
592\r
0938f923
CJ		 593///\r
594/// Multiprocessor Wakeup Structure\r
595///\r
596typedef struct {\r
597 UINT8 Type;\r
598 UINT8 Length;\r
599 UINT16 MailBoxVersion;\r
600 UINT32 Reserved;\r
601 UINT64 MailBoxAddress;\r
602} EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_STRUCTURE;\r
603\r
604///\r
605/// Multiprocessor Wakeup Mailbox Structure\r
606///\r
607typedef struct {\r
608 UINT16 Command;\r
609 UINT16 Reserved;\r
610 UINT32 AcpiId;\r
611 UINT64 WakeupVector;\r
612 UINT8 ReservedForOs[2032];\r
613 UINT8 ReservedForFirmware[2048];\r
614} EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_MAILBOX_STRUCTURE;\r
615\r
616#define EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP 0x0000\r
617#define EFI_ACPI_6_4_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP 0x0001\r
618\r
5963ce5d
CJ		 619///\r
620/// Smart Battery Description Table (SBST)\r
621///\r
622typedef struct {\r
623 EFI_ACPI_DESCRIPTION_HEADER Header;\r
624 UINT32 WarningEnergyLevel;\r
625 UINT32 LowEnergyLevel;\r
626 UINT32 CriticalEnergyLevel;\r
627} EFI_ACPI_6_4_SMART_BATTERY_DESCRIPTION_TABLE;\r
628\r
629///\r
630/// SBST Version (as defined in ACPI 6.4 spec.)\r
631///\r
632#define EFI_ACPI_6_4_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
633\r
634///\r
635/// Embedded Controller Boot Resources Table (ECDT)\r
636/// The table is followed by a null terminated ASCII string that contains\r
637/// a fully qualified reference to the name space object.\r
638///\r
639typedef struct {\r
640 EFI_ACPI_DESCRIPTION_HEADER Header;\r
641 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EcControl;\r
642 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EcData;\r
643 UINT32 Uid;\r
644 UINT8 GpeBit;\r
645} EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
646\r
647///\r
648/// ECDT Version (as defined in ACPI 6.4 spec.)\r
649///\r
650#define EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
651\r
652///\r
653/// System Resource Affinity Table (SRAT). The rest of the table\r
654/// must be defined in a platform specific manner.\r
655///\r
656typedef struct {\r
657 EFI_ACPI_DESCRIPTION_HEADER Header;\r
658 UINT32 Reserved1; ///< Must be set to 1\r
659 UINT64 Reserved2;\r
660} EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
661\r
662///\r
663/// SRAT Version (as defined in ACPI 6.4 spec.)\r
664///\r
665#define EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
666\r
667//\r
668// SRAT structure types.\r
669// All other values between 0x06 an 0xFF are reserved and\r
670// will be ignored by OSPM.\r
671//\r
672#define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
673#define EFI_ACPI_6_4_MEMORY_AFFINITY 0x01\r
674#define EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
675#define EFI_ACPI_6_4_GICC_AFFINITY 0x03\r
676#define EFI_ACPI_6_4_GIC_ITS_AFFINITY 0x04\r
677#define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY 0x05\r
678\r
679///\r
680/// Processor Local APIC/SAPIC Affinity Structure Definition\r
681///\r
682typedef struct {\r
683 UINT8 Type;\r
684 UINT8 Length;\r
685 UINT8 ProximityDomain7To0;\r
686 UINT8 ApicId;\r
687 UINT32 Flags;\r
688 UINT8 LocalSapicEid;\r
689 UINT8 ProximityDomain31To8[3];\r
690 UINT32 ClockDomain;\r
691} EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
692\r
693///\r
694/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
695///\r
696#define EFI_ACPI_6_4_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
697\r
698///\r
699/// Memory Affinity Structure Definition\r
700///\r
701typedef struct {\r
702 UINT8 Type;\r
703 UINT8 Length;\r
704 UINT32 ProximityDomain;\r
705 UINT16 Reserved1;\r
706 UINT32 AddressBaseLow;\r
707 UINT32 AddressBaseHigh;\r
708 UINT32 LengthLow;\r
709 UINT32 LengthHigh;\r
710 UINT32 Reserved2;\r
711 UINT32 Flags;\r
712 UINT64 Reserved3;\r
713} EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE;\r
714\r
715//\r
716// Memory Flags. All other bits are reserved and must be 0.\r
717//\r
718#define EFI_ACPI_6_4_MEMORY_ENABLED (1 << 0)\r
719#define EFI_ACPI_6_4_MEMORY_HOT_PLUGGABLE (1 << 1)\r
720#define EFI_ACPI_6_4_MEMORY_NONVOLATILE (1 << 2)\r
721\r
722///\r
723/// Processor Local x2APIC Affinity Structure Definition\r
724///\r
725typedef struct {\r
726 UINT8 Type;\r
727 UINT8 Length;\r
728 UINT8 Reserved1[2];\r
729 UINT32 ProximityDomain;\r
730 UINT32 X2ApicId;\r
731 UINT32 Flags;\r
732 UINT32 ClockDomain;\r
733 UINT8 Reserved2[4];\r
734} EFI_ACPI_6_4_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
735\r
736///\r
737/// GICC Affinity Structure Definition\r
738///\r
739typedef struct {\r
740 UINT8 Type;\r
741 UINT8 Length;\r
742 UINT32 ProximityDomain;\r
743 UINT32 AcpiProcessorUid;\r
744 UINT32 Flags;\r
745 UINT32 ClockDomain;\r
746} EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE;\r
747\r
748///\r
749/// GICC Flags. All other bits are reserved and must be 0.\r
750///\r
751#define EFI_ACPI_6_4_GICC_ENABLED (1 << 0)\r
752\r
753///\r
754/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
755///\r
756typedef struct {\r
757 UINT8 Type;\r
758 UINT8 Length;\r
759 UINT32 ProximityDomain;\r
760 UINT8 Reserved[2];\r
761 UINT32 ItsId;\r
762} EFI_ACPI_6_4_GIC_ITS_AFFINITY_STRUCTURE;\r
763\r
764//\r
765// Generic Initiator Affinity Structure Device Handle Types\r
766// All other values between 0x02 an 0xFF are reserved and\r
767// will be ignored by OSPM.\r
768//\r
769#define EFI_ACPI_6_4_ACPI_DEVICE_HANDLE 0x00\r
770#define EFI_ACPI_6_4_PCI_DEVICE_HANDLE 0x01\r
771\r
772///\r
773/// Device Handle - ACPI\r
774///\r
775typedef struct {\r
776 UINT64 AcpiHid;\r
777 UINT32 AcpiUid;\r
778 UINT8 Reserved[4];\r
779} EFI_ACPI_6_4_DEVICE_HANDLE_ACPI;\r
780\r
781///\r
782/// Device Handle - PCI\r
783///\r
784typedef struct {\r
785 UINT16 PciSegment;\r
786 UINT16 PciBdfNumber;\r
787 UINT8 Reserved[12];\r
788} EFI_ACPI_6_4_DEVICE_HANDLE_PCI;\r
789\r
790///\r
791/// Generic Initiator Affinity Structure\r
792///\r
793typedef struct {\r
794 UINT8 Type;\r
795 UINT8 Length;\r
796 UINT8 Reserved1;\r
797 UINT8 DeviceHandleType;\r
798 UINT32 ProximityDomain;\r
799\r
800 union {\r
801 EFI_ACPI_6_4_DEVICE_HANDLE_ACPI Acpi;\r
802 EFI_ACPI_6_4_DEVICE_HANDLE_PCI Pci;\r
803 } DeviceHandle;\r
804\r
805 UINT32 Flags;\r
806 UINT8 Reserved2[4];\r
807} EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE;\r
808\r
809///\r
810/// Generic Initiator Affinity Structure Flags. All other bits are reserved\r
811/// and must be 0.\r
812///\r
357383bc
CJ		 813#define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED BIT0\r
814#define EFI_ACPI_6_4_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1\r
5963ce5d
CJ		 815\r
816///\r
817/// System Locality Distance Information Table (SLIT).\r
818/// The rest of the table is a matrix.\r
819///\r
820typedef struct {\r
821 EFI_ACPI_DESCRIPTION_HEADER Header;\r
822 UINT64 NumberOfSystemLocalities;\r
823} EFI_ACPI_6_4_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
824\r
825///\r
826/// SLIT Version (as defined in ACPI 6.4 spec.)\r
827///\r
828#define EFI_ACPI_6_4_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
829\r
830///\r
831/// Corrected Platform Error Polling Table (CPEP)\r
832///\r
833typedef struct {\r
834 EFI_ACPI_DESCRIPTION_HEADER Header;\r
835 UINT8 Reserved[8];\r
836} EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
837\r
838///\r
839/// CPEP Version (as defined in ACPI 6.4 spec.)\r
840///\r
841#define EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
842\r
843//\r
844// CPEP processor structure types.\r
845//\r
846#define EFI_ACPI_6_4_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
847\r
848///\r
849/// Corrected Platform Error Polling Processor Structure Definition\r
850///\r
851typedef struct {\r
852 UINT8 Type;\r
853 UINT8 Length;\r
854 UINT8 ProcessorId;\r
855 UINT8 ProcessorEid;\r
856 UINT32 PollingInterval;\r
857} EFI_ACPI_6_4_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
858\r
859///\r
860/// Maximum System Characteristics Table (MSCT)\r
861///\r
862typedef struct {\r
863 EFI_ACPI_DESCRIPTION_HEADER Header;\r
864 UINT32 OffsetProxDomInfo;\r
865 UINT32 MaximumNumberOfProximityDomains;\r
866 UINT32 MaximumNumberOfClockDomains;\r
867 UINT64 MaximumPhysicalAddress;\r
868} EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
869\r
870///\r
871/// MSCT Version (as defined in ACPI 6.4 spec.)\r
872///\r
873#define EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
874\r
875///\r
876/// Maximum Proximity Domain Information Structure Definition\r
877///\r
878typedef struct {\r
879 UINT8 Revision;\r
880 UINT8 Length;\r
881 UINT32 ProximityDomainRangeLow;\r
882 UINT32 ProximityDomainRangeHigh;\r
883 UINT32 MaximumProcessorCapacity;\r
884 UINT64 MaximumMemoryCapacity;\r
885} EFI_ACPI_6_4_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
886\r
887///\r
888/// ACPI RAS Feature Table definition.\r
889///\r
890typedef struct {\r
891 EFI_ACPI_DESCRIPTION_HEADER Header;\r
892 UINT8 PlatformCommunicationChannelIdentifier[12];\r
893} EFI_ACPI_6_4_RAS_FEATURE_TABLE;\r
894\r
895///\r
896/// RASF Version (as defined in ACPI 6.4 spec.)\r
897///\r
898#define EFI_ACPI_6_4_RAS_FEATURE_TABLE_REVISION 0x01\r
899\r
900///\r
901/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
902///\r
903typedef struct {\r
904 UINT32 Signature;\r
905 UINT16 Command;\r
906 UINT16 Status;\r
907 UINT16 Version;\r
908 UINT8 RASCapabilities[16];\r
909 UINT8 SetRASCapabilities[16];\r
910 UINT16 NumberOfRASFParameterBlocks;\r
911 UINT32 SetRASCapabilitiesStatus;\r
912} EFI_ACPI_6_4_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
913\r
914///\r
915/// ACPI RASF PCC command code\r
916///\r
917#define EFI_ACPI_6_4_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
918\r
919///\r
920/// ACPI RASF Platform RAS Capabilities\r
921///\r
922#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
923#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
924#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
925#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
926#define EFI_ACPI_6_4_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
927\r
928///\r
929/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
930///\r
931typedef struct {\r
932 UINT16 Type;\r
933 UINT16 Version;\r
934 UINT16 Length;\r
935 UINT16 PatrolScrubCommand;\r
936 UINT64 RequestedAddressRange[2];\r
937 UINT64 ActualAddressRange[2];\r
938 UINT16 Flags;\r
939 UINT8 RequestedSpeed;\r
940} EFI_ACPI_6_4_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
941\r
942///\r
943/// ACPI RASF Patrol Scrub command\r
944///\r
945#define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
946#define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
947#define EFI_ACPI_6_4_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
948\r
949///\r
950/// Memory Power State Table definition.\r
951///\r
952typedef struct {\r
953 EFI_ACPI_DESCRIPTION_HEADER Header;\r
954 UINT8 PlatformCommunicationChannelIdentifier;\r
955 UINT8 Reserved[3];\r
956// Memory Power Node Structure\r
957// Memory Power State Characteristics\r
958} EFI_ACPI_6_4_MEMORY_POWER_STATUS_TABLE;\r
959\r
960///\r
961/// MPST Version (as defined in ACPI 6.4 spec.)\r
962///\r
963#define EFI_ACPI_6_4_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
964\r
965///\r
966/// MPST Platform Communication Channel Shared Memory Region definition.\r
967///\r
968typedef struct {\r
969 UINT32 Signature;\r
970 UINT16 Command;\r
971 UINT16 Status;\r
972 UINT32 MemoryPowerCommandRegister;\r
973 UINT32 MemoryPowerStatusRegister;\r
974 UINT32 PowerStateId;\r
975 UINT32 MemoryPowerNodeId;\r
976 UINT64 MemoryEnergyConsumed;\r
977 UINT64 ExpectedAveragePowerComsuned;\r
978} EFI_ACPI_6_4_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
979\r
980///\r
981/// ACPI MPST PCC command code\r
982///\r
983#define EFI_ACPI_6_4_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
984\r
985///\r
986/// ACPI MPST Memory Power command\r
987///\r
988#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
989#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
990#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
991#define EFI_ACPI_6_4_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
992\r
993///\r
994/// MPST Memory Power Node Table\r
995///\r
996typedef struct {\r
997 UINT8 PowerStateValue;\r
998 UINT8 PowerStateInformationIndex;\r
999} EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE;\r
1000\r
1001typedef struct {\r
1002 UINT8 Flag;\r
1003 UINT8 Reserved;\r
1004 UINT16 MemoryPowerNodeId;\r
1005 UINT32 Length;\r
1006 UINT64 AddressBase;\r
1007 UINT64 AddressLength;\r
1008 UINT32 NumberOfPowerStates;\r
1009 UINT32 NumberOfPhysicalComponents;\r
1010//EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
1011//UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
1012} EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE;\r
1013\r
1014#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
1015#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
1016#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
1017\r
1018typedef struct {\r
1019 UINT16 MemoryPowerNodeCount;\r
1020 UINT8 Reserved[2];\r
1021} EFI_ACPI_6_4_MPST_MEMORY_POWER_NODE_TABLE;\r
1022\r
1023///\r
1024/// MPST Memory Power State Characteristics Table\r
1025///\r
1026typedef struct {\r
1027 UINT8 PowerStateStructureID;\r
1028 UINT8 Flag;\r
1029 UINT16 Reserved;\r
1030 UINT32 AveragePowerConsumedInMPS0;\r
1031 UINT32 RelativePowerSavingToMPS0;\r
1032 UINT64 ExitLatencyToMPS0;\r
1033} EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
1034\r
1035#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
1036#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1037#define EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1038\r
1039typedef struct {\r
1040 UINT16 MemoryPowerStateCharacteristicsCount;\r
1041 UINT8 Reserved[2];\r
1042} EFI_ACPI_6_4_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1043\r
1044///\r
ad3dea98 1045/// Platform Memory Topology Table definition.\r
5963ce5d
CJ		 1046///\r
1047typedef struct {\r
ad3dea98
CJ		 1048 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1049 UINT32 NumberOfMemoryDevices;\r
1050//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1051} EFI_ACPI_6_4_PLATFORM_MEMORY_TOPOLOGY_TABLE;\r
5963ce5d
CJ		 1052\r
1053///\r
1054/// PMTT Version (as defined in ACPI 6.4 spec.)\r
1055///\r
ad3dea98 1056#define EFI_ACPI_6_4_MEMORY_TOPOLOGY_TABLE_REVISION 0x02\r
5963ce5d
CJ		 1057\r
1058///\r
ad3dea98 1059/// Common Memory Device.\r
5963ce5d
CJ		 1060///\r
1061typedef struct {\r
ad3dea98
CJ		 1062 UINT8 Type;\r
1063 UINT8 Reserved;\r
1064 UINT16 Length;\r
1065 UINT16 Flags;\r
1066 UINT16 Reserved1;\r
1067 UINT32 NumberOfMemoryDevices;\r
1068//UINT8 TypeSpecificData[];\r
1069//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1070} EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE;\r
1071\r
1072///\r
1073/// Memory Device Type.\r
1074///\r
1075#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_SOCKET 0x1\r
1076#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER 0x2\r
1077#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_DIMM 0x3\r
1078#define EFI_ACPI_6_4_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE 0xFF\r
5963ce5d
CJ		 1079\r
1080///\r
ad3dea98 1081/// Socket Type Data.\r
5963ce5d 1082///\r
ad3dea98
CJ		 1083typedef struct {\r
1084 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1085 UINT16 SocketIdentifier;\r
1086 UINT16 Reserved;\r
1087//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1088} EFI_ACPI_6_4_PMTT_SOCKET_TYPE_DATA;\r
5963ce5d
CJ		 1089\r
1090///\r
ad3dea98 1091/// Memory Controller Type Data.\r
5963ce5d
CJ		 1092///\r
1093typedef struct {\r
ad3dea98
CJ		 1094 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1095 UINT16 MemoryControllerIdentifier;\r
1096 UINT16 Reserved;\r
1097//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1098} EFI_ACPI_6_4_PMTT_MEMORY_CONTROLLER_TYPE_DATA;\r
5963ce5d
CJ		 1099\r
1100///\r
ad3dea98 1101/// DIMM Type Specific Data.\r
5963ce5d
CJ		 1102///\r
1103typedef struct {\r
ad3dea98
CJ		 1104 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1105 UINT32 SmbiosHandle;\r
1106} EFI_ACPI_6_4_PMTT_DIMM_TYPE_SPECIFIC_DATA;\r
1107\r
1108///\r
1109/// Vendor Specific Type Data.\r
5963ce5d
CJ		 1110///\r
1111typedef struct {\r
ad3dea98
CJ		 1112 EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1113 UINT8 TypeUuid[16];\r
1114//EFI_ACPI_6_4_PMTT_VENDOR_SPECIFIC_TYPE_DATA VendorSpecificData[];\r
1115//EFI_ACPI_6_4_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1116} EFI_ACPI_6_4_PMTT_VENDOR_SPECIFIC_TYPE_DATA;\r
5963ce5d
CJ		 1117\r
1118///\r
1119/// Boot Graphics Resource Table definition.\r
1120///\r
1121typedef struct {\r
1122 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1123 ///\r
1124 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1125 ///\r
1126 UINT16 Version;\r
1127 ///\r
1128 /// 1-byte status field indicating current status about the table.\r
1129 /// Bits[7:3] = Reserved (must be zero)\r
1130 /// Bits[2:1] = Orientation Offset. These bits describe the clockwise\r
1131 /// degree offset from the image's default orientation.\r
1132 /// [00] = 0, no offset\r
1133 /// [01] = 90\r
1134 /// [10] = 180\r
1135 /// [11] = 270\r
1136 /// Bit [0] = Displayed. A one indicates the boot image graphic is\r
1137 /// displayed.\r
1138 ///\r
1139 UINT8 Status;\r
1140 ///\r
1141 /// 1-byte enumerated type field indicating format of the image.\r
1142 /// 0 = Bitmap\r
1143 /// 1 - 255 Reserved (for future use)\r
1144 ///\r
1145 UINT8 ImageType;\r
1146 ///\r
1147 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1148 /// of the image bitmap.\r
1149 ///\r
1150 UINT64 ImageAddress;\r
1151 ///\r
1152 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1153 /// (X, Y) display offset of the top left corner of the boot image.\r
1154 /// The top left corner of the display is at offset (0, 0).\r
1155 ///\r
1156 UINT32 ImageOffsetX;\r
1157 ///\r
1158 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1159 /// (X, Y) display offset of the top left corner of the boot image.\r
1160 /// The top left corner of the display is at offset (0, 0).\r
1161 ///\r
1162 UINT32 ImageOffsetY;\r
1163} EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1164\r
1165///\r
1166/// BGRT Revision\r
1167///\r
1168#define EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1169\r
1170///\r
1171/// BGRT Version\r
1172///\r
1173#define EFI_ACPI_6_4_BGRT_VERSION 0x01\r
1174\r
1175///\r
1176/// BGRT Status\r
1177///\r
1178#define EFI_ACPI_6_4_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1179#define EFI_ACPI_6_4_BGRT_STATUS_DISPLAYED 0x01\r
1180\r
1181///\r
1182/// BGRT Image Type\r
1183///\r
1184#define EFI_ACPI_6_4_BGRT_IMAGE_TYPE_BMP 0x00\r
1185\r
1186///\r
1187/// FPDT Version (as defined in ACPI 6.4 spec.)\r
1188///\r
1189#define EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1190\r
1191///\r
1192/// FPDT Performance Record Types\r
1193///\r
1194#define EFI_ACPI_6_4_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1195#define EFI_ACPI_6_4_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1196\r
1197///\r
1198/// FPDT Performance Record Revision\r
1199///\r
1200#define EFI_ACPI_6_4_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1201#define EFI_ACPI_6_4_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1202\r
1203///\r
1204/// FPDT Runtime Performance Record Types\r
1205///\r
1206#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1207#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1208#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1209\r
1210///\r
1211/// FPDT Runtime Performance Record Revision\r
1212///\r
1213#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1214#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1215#define EFI_ACPI_6_4_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1216\r
1217///\r
1218/// FPDT Performance Record header\r
1219///\r
1220typedef struct {\r
1221 UINT16 Type;\r
1222 UINT8 Length;\r
1223 UINT8 Revision;\r
1224} EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER;\r
1225\r
1226///\r
1227/// FPDT Performance Table header\r
1228///\r
1229typedef struct {\r
1230 UINT32 Signature;\r
1231 UINT32 Length;\r
1232} EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER;\r
1233\r
1234///\r
1235/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1236///\r
1237typedef struct {\r
1238 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1239 UINT32 Reserved;\r
1240 ///\r
1241 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1242 ///\r
1243 UINT64 BootPerformanceTablePointer;\r
1244} EFI_ACPI_6_4_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1245\r
1246///\r
1247/// FPDT S3 Performance Table Pointer Record Structure\r
1248///\r
1249typedef struct {\r
1250 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1251 UINT32 Reserved;\r
1252 ///\r
1253 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1254 ///\r
1255 UINT64 S3PerformanceTablePointer;\r
1256} EFI_ACPI_6_4_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1257\r
1258///\r
1259/// FPDT Firmware Basic Boot Performance Record Structure\r
1260///\r
1261typedef struct {\r
1262 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1263 UINT32 Reserved;\r
1264 ///\r
1265 /// Timer value logged at the beginning of firmware image execution.\r
1266 /// This may not always be zero or near zero.\r
1267 ///\r
1268 UINT64 ResetEnd;\r
1269 ///\r
1270 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1271 /// For non-UEFI compatible boots, this field must be zero.\r
1272 ///\r
1273 UINT64 OsLoaderLoadImageStart;\r
1274 ///\r
1275 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1276 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1277 /// to the INT 19h handler invocation.\r
1278 ///\r
1279 UINT64 OsLoaderStartImageStart;\r
1280 ///\r
1281 /// Timer value logged at the point when the OS loader calls the\r
1282 /// ExitBootServices function for UEFI compatible firmware.\r
1283 /// For non-UEFI compatible boots, this field must be zero.\r
1284 ///\r
1285 UINT64 ExitBootServicesEntry;\r
1286 ///\r
1287 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1288 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1289 /// For non-UEFI compatible boots, this field must be zero.\r
1290 ///\r
1291 UINT64 ExitBootServicesExit;\r
1292} EFI_ACPI_6_4_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1293\r
1294///\r
1295/// FPDT Firmware Basic Boot Performance Table signature\r
1296///\r
1297#define EFI_ACPI_6_4_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1298\r
1299//\r
1300// FPDT Firmware Basic Boot Performance Table\r
1301//\r
1302typedef struct {\r
1303 EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1304 //\r
1305 // one or more Performance Records.\r
1306 //\r
1307} EFI_ACPI_6_4_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1308\r
1309///\r
1310/// FPDT "S3PT" S3 Performance Table\r
1311///\r
1312#define EFI_ACPI_6_4_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1313\r
1314//\r
1315// FPDT Firmware S3 Boot Performance Table\r
1316//\r
1317typedef struct {\r
1318 EFI_ACPI_6_4_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1319 //\r
1320 // one or more Performance Records.\r
1321 //\r
1322} EFI_ACPI_6_4_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1323\r
1324///\r
1325/// FPDT Basic S3 Resume Performance Record\r
1326///\r
1327typedef struct {\r
1328 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1329 ///\r
1330 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1331 ///\r
1332 UINT32 ResumeCount;\r
1333 ///\r
1334 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1335 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1336 ///\r
1337 UINT64 FullResume;\r
1338 ///\r
1339 /// Average timer value of all resume cycles logged since the last full boot\r
1340 /// sequence, including the most recent resume. Note that the entire log of\r
1341 /// timer values does not need to be retained in order to calculate this average.\r
1342 ///\r
1343 UINT64 AverageResume;\r
1344} EFI_ACPI_6_4_FPDT_S3_RESUME_RECORD;\r
1345\r
1346///\r
1347/// FPDT Basic S3 Suspend Performance Record\r
1348///\r
1349typedef struct {\r
1350 EFI_ACPI_6_4_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1351 ///\r
1352 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1353 /// Only the most recent suspend cycle's timer value is retained.\r
1354 ///\r
1355 UINT64 SuspendStart;\r
1356 ///\r
1357 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1358 /// mechanism) used to trigger hardware entry to S3.\r
1359 /// Only the most recent suspend cycle's timer value is retained.\r
1360 ///\r
1361 UINT64 SuspendEnd;\r
1362} EFI_ACPI_6_4_FPDT_S3_SUSPEND_RECORD;\r
1363\r
1364///\r
1365/// Firmware Performance Record Table definition.\r
1366///\r
1367typedef struct {\r
1368 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1369} EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1370\r
1371///\r
1372/// Generic Timer Description Table definition.\r
1373///\r
1374typedef struct {\r
1375 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1376 UINT64 CntControlBasePhysicalAddress;\r
1377 UINT32 Reserved;\r
1378 UINT32 SecurePL1TimerGSIV;\r
1379 UINT32 SecurePL1TimerFlags;\r
1380 UINT32 NonSecurePL1TimerGSIV;\r
1381 UINT32 NonSecurePL1TimerFlags;\r
1382 UINT32 VirtualTimerGSIV;\r
1383 UINT32 VirtualTimerFlags;\r
1384 UINT32 NonSecurePL2TimerGSIV;\r
1385 UINT32 NonSecurePL2TimerFlags;\r
1386 UINT64 CntReadBasePhysicalAddress;\r
1387 UINT32 PlatformTimerCount;\r
1388 UINT32 PlatformTimerOffset;\r
1389 UINT32 VirtualPL2TimerGSIV;\r
1390 UINT32 VirtualPL2TimerFlags;\r
1391} EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1392\r
1393///\r
1394/// GTDT Version (as defined in ACPI 6.4 spec.)\r
1395///\r
1396#define EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03\r
1397\r
1398///\r
1399/// Timer Flags. All other bits are reserved and must be 0.\r
1400///\r
1401#define EFI_ACPI_6_4_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1402#define EFI_ACPI_6_4_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1403#define EFI_ACPI_6_4_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1404\r
1405///\r
1406/// Platform Timer Type\r
1407///\r
1408#define EFI_ACPI_6_4_GTDT_GT_BLOCK 0\r
d910e832 1409#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG 1\r
5963ce5d
CJ		 1410\r
1411///\r
1412/// GT Block Structure\r
1413///\r
1414typedef struct {\r
1415 UINT8 Type;\r
1416 UINT16 Length;\r
1417 UINT8 Reserved;\r
1418 UINT64 CntCtlBase;\r
1419 UINT32 GTBlockTimerCount;\r
1420 UINT32 GTBlockTimerOffset;\r
1421} EFI_ACPI_6_4_GTDT_GT_BLOCK_STRUCTURE;\r
1422\r
1423///\r
1424/// GT Block Timer Structure\r
1425///\r
1426typedef struct {\r
1427 UINT8 GTFrameNumber;\r
1428 UINT8 Reserved[3];\r
1429 UINT64 CntBaseX;\r
1430 UINT64 CntEL0BaseX;\r
1431 UINT32 GTxPhysicalTimerGSIV;\r
1432 UINT32 GTxPhysicalTimerFlags;\r
1433 UINT32 GTxVirtualTimerGSIV;\r
1434 UINT32 GTxVirtualTimerFlags;\r
1435 UINT32 GTxCommonFlags;\r
1436} EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1437\r
1438///\r
1439/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1440///\r
1441#define EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1442#define EFI_ACPI_6_4_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1443\r
1444///\r
1445/// Common Flags Flags. All other bits are reserved and must be 0.\r
1446///\r
1447#define EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1448#define EFI_ACPI_6_4_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1449\r
1450///\r
d910e832 1451/// Arm Generic Watchdog Structure\r
5963ce5d
CJ		 1452///\r
1453typedef struct {\r
1454 UINT8 Type;\r
1455 UINT16 Length;\r
1456 UINT8 Reserved;\r
1457 UINT64 RefreshFramePhysicalAddress;\r
1458 UINT64 WatchdogControlFramePhysicalAddress;\r
1459 UINT32 WatchdogTimerGSIV;\r
1460 UINT32 WatchdogTimerFlags;\r
d910e832 1461} EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;\r
5963ce5d
CJ		 1462\r
1463///\r
d910e832 1464/// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
5963ce5d 1465///\r
d910e832
CJ		 1466#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1467#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1468#define EFI_ACPI_6_4_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
5963ce5d
CJ		 1469\r
1470//\r
1471// NVDIMM Firmware Interface Table definition.\r
1472//\r
1473typedef struct {\r
1474 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1475 UINT32 Reserved;\r
1476} EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1477\r
1478//\r
1479// NFIT Version (as defined in ACPI 6.4 spec.)\r
1480//\r
1481#define EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1482\r
1483//\r
1484// Definition for NFIT Table Structure Types\r
1485//\r
1486#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1487#define EFI_ACPI_6_4_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1488#define EFI_ACPI_6_4_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1489#define EFI_ACPI_6_4_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1490#define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1491#define EFI_ACPI_6_4_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1492#define EFI_ACPI_6_4_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1493\r
1494//\r
1495// Definition for NFIT Structure Header\r
1496//\r
1497typedef struct {\r
1498 UINT16 Type;\r
1499 UINT16 Length;\r
1500} EFI_ACPI_6_4_NFIT_STRUCTURE_HEADER;\r
1501\r
1502//\r
1503// Definition for System Physical Address Range Structure\r
1504//\r
1505#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1506#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
ced4cb76
CJ		 1507#define EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID BIT2\r
1508\r
5963ce5d
CJ		 1509#define EFI_ACPI_6_4_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1510#define EFI_ACPI_6_4_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1511#define EFI_ACPI_6_4_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1512#define EFI_ACPI_6_4_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1513#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x624B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1514#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1515#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
1516#define EFI_ACPI_6_4_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
ced4cb76 1517\r
5963ce5d
CJ		 1518typedef struct {\r
1519 UINT16 Type;\r
1520 UINT16 Length;\r
1521 UINT16 SPARangeStructureIndex;\r
1522 UINT16 Flags;\r
1523 UINT32 Reserved_8;\r
1524 UINT32 ProximityDomain;\r
1525 GUID AddressRangeTypeGUID;\r
1526 UINT64 SystemPhysicalAddressRangeBase;\r
1527 UINT64 SystemPhysicalAddressRangeLength;\r
1528 UINT64 AddressRangeMemoryMappingAttribute;\r
ced4cb76 1529 UINT64 SPALocationCookie;\r
5963ce5d
CJ		 1530} EFI_ACPI_6_4_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1531\r
1532//\r
1533// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1534//\r
1535typedef struct {\r
1536 UINT32 DIMMNumber:4;\r
1537 UINT32 MemoryChannelNumber:4;\r
1538 UINT32 MemoryControllerID:4;\r
1539 UINT32 SocketID:4;\r
1540 UINT32 NodeControllerID:12;\r
1541 UINT32 Reserved_28:4;\r
1542} EFI_ACPI_6_4_NFIT_DEVICE_HANDLE;\r
1543\r
1544#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1545#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1546#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1547#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1548#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1549#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1550#define EFI_ACPI_6_4_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
ced4cb76 1551\r
5963ce5d
CJ		 1552typedef struct {\r
1553 UINT16 Type;\r
1554 UINT16 Length;\r
1555 EFI_ACPI_6_4_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1556 UINT16 NVDIMMPhysicalID;\r
1557 UINT16 NVDIMMRegionID;\r
1558 UINT16 SPARangeStructureIndex ;\r
1559 UINT16 NVDIMMControlRegionStructureIndex;\r
1560 UINT64 NVDIMMRegionSize;\r
1561 UINT64 RegionOffset;\r
1562 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1563 UINT16 InterleaveStructureIndex;\r
1564 UINT16 InterleaveWays;\r
1565 UINT16 NVDIMMStateFlags;\r
1566 UINT16 Reserved_46;\r
1567} EFI_ACPI_6_4_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1568\r
1569//\r
1570// Definition for Interleave Structure\r
1571//\r
1572typedef struct {\r
1573 UINT16 Type;\r
1574 UINT16 Length;\r
1575 UINT16 InterleaveStructureIndex;\r
1576 UINT16 Reserved_6;\r
1577 UINT32 NumberOfLines;\r
1578 UINT32 LineSize;\r
1579//UINT32 LineOffset[NumberOfLines];\r
1580} EFI_ACPI_6_4_NFIT_INTERLEAVE_STRUCTURE;\r
1581\r
1582//\r
1583// Definition for SMBIOS Management Information Structure\r
1584//\r
1585typedef struct {\r
1586 UINT16 Type;\r
1587 UINT16 Length;\r
1588 UINT32 Reserved_4;\r
1589//UINT8 Data[];\r
1590} EFI_ACPI_6_4_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1591\r
1592//\r
1593// Definition for NVDIMM Control Region Structure\r
1594//\r
1595#define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1596\r
1597#define EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
ced4cb76 1598\r
5963ce5d
CJ		 1599typedef struct {\r
1600 UINT16 Type;\r
1601 UINT16 Length;\r
1602 UINT16 NVDIMMControlRegionStructureIndex;\r
1603 UINT16 VendorID;\r
1604 UINT16 DeviceID;\r
1605 UINT16 RevisionID;\r
1606 UINT16 SubsystemVendorID;\r
1607 UINT16 SubsystemDeviceID;\r
1608 UINT16 SubsystemRevisionID;\r
1609 UINT8 ValidFields;\r
1610 UINT8 ManufacturingLocation;\r
1611 UINT16 ManufacturingDate;\r
1612 UINT8 Reserved_22[2];\r
1613 UINT32 SerialNumber;\r
1614 UINT16 RegionFormatInterfaceCode;\r
1615 UINT16 NumberOfBlockControlWindows;\r
1616 UINT64 SizeOfBlockControlWindow;\r
1617 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1618 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1619 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1620 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1621 UINT16 NVDIMMControlRegionFlag;\r
1622 UINT8 Reserved_74[6];\r
1623} EFI_ACPI_6_4_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1624\r
1625//\r
1626// Definition for NVDIMM Block Data Window Region Structure\r
1627//\r
1628typedef struct {\r
1629 UINT16 Type;\r
1630 UINT16 Length;\r
1631 UINT16 NVDIMMControlRegionStructureIndex;\r
1632 UINT16 NumberOfBlockDataWindows;\r
1633 UINT64 BlockDataWindowStartOffset;\r
1634 UINT64 SizeOfBlockDataWindow;\r
1635 UINT64 BlockAccessibleMemoryCapacity;\r
1636 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1637} EFI_ACPI_6_4_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1638\r
1639//\r
1640// Definition for Flush Hint Address Structure\r
1641//\r
1642typedef struct {\r
1643 UINT16 Type;\r
1644 UINT16 Length;\r
1645 EFI_ACPI_6_4_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1646 UINT16 NumberOfFlushHintAddresses;\r
1647 UINT8 Reserved_10[6];\r
1648//UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1649} EFI_ACPI_6_4_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1650\r
1651///\r
1652/// Secure DEVices Table (SDEV)\r
1653///\r
1654typedef struct {\r
1655 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1656} EFI_ACPI_6_4_SECURE_DEVICES_TABLE_HEADER;\r
1657\r
1658///\r
1659/// SDEV Revision (as defined in ACPI 6.4 spec.)\r
1660///\r
1661#define EFI_ACPI_6_4_SECURE_DEVICES_TABLE_REVISION 0x01\r
1662\r
1663///\r
1803757a 1664/// Secure Device types\r
5963ce5d 1665///\r
5963ce5d 1666#define EFI_ACPI_6_4_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1803757a 1667#define EFI_ACPI_6_4_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
5963ce5d
CJ		 1668\r
1669///\r
1803757a 1670/// Secure Device flags\r
5963ce5d 1671///\r
1803757a
CJ		 1672#define EFI_ACPI_6_4_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1673#define EFI_ACPI_6_4_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT BIT1\r
5963ce5d
CJ		 1674\r
1675///\r
1676/// SDEV Structure Header\r
1677///\r
1678typedef struct {\r
1679 UINT8 Type;\r
1680 UINT8 Flags;\r
1681 UINT16 Length;\r
1682} EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER;\r
1683\r
1684///\r
1803757a 1685/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
5963ce5d
CJ		 1686///\r
1687typedef struct {\r
1803757a
CJ		 1688 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
1689 UINT16 DeviceIdentifierOffset;\r
1690 UINT16 DeviceIdentifierLength;\r
1691 UINT16 VendorSpecificDataOffset;\r
1692 UINT16 VendorSpecificDataLength;\r
1693 UINT16 SecureAccessComponentsOffset;\r
1694 UINT16 SecureAccessComponentsLength;\r
1695} EFI_ACPI_6_4_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
5963ce5d
CJ		 1696\r
1697///\r
1803757a
CJ		 1698/// Secure Access Component Types\r
1699///\r
1700#define EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION 0x00\r
1701#define EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY 0x01\r
1702\r
1703///\r
1704/// Identification Based Secure Access Component\r
5963ce5d
CJ		 1705///\r
1706typedef struct {\r
1803757a
CJ		 1707 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
1708 UINT16 HardwareIdentifierOffset;\r
1709 UINT16 HardwareIdentifierLength;\r
1710 UINT16 SubsystemIdentifierOffset;\r
1711 UINT16 SubsystemIdentifierLength;\r
1712 UINT16 HardwareRevision;\r
1713 UINT8 HardwareRevisionPresent;\r
1714 UINT8 ClassCodePresent;\r
1715 UINT8 PciCompatibleBaseClass;\r
1716 UINT8 PciCompatibleSubClass;\r
1717 UINT8 PciCompatibleProgrammingInterface;\r
1718} EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE;\r
1719\r
1720///\r
1721/// Memory-based Secure Access Component\r
1722///\r
1723typedef struct {\r
1724 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
1725 UINT32 Reserved;\r
1726 UINT64 MemoryAddressBase;\r
1727 UINT64 MemoryLength;\r
1728} EFI_ACPI_6_4_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE;\r
1729\r
1730///\r
1731/// PCIe Endpoint Device based Secure Device Structure\r
1732///\r
1733typedef struct {\r
1734 EFI_ACPI_6_4_SDEV_STRUCTURE_HEADER Header;\r
1735 UINT16 PciSegmentNumber;\r
1736 UINT16 StartBusNumber;\r
1737 UINT16 PciPathOffset;\r
1738 UINT16 PciPathLength;\r
1739 UINT16 VendorSpecificDataOffset;\r
1740 UINT16 VendorSpecificDataLength;\r
1741} EFI_ACPI_6_4_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
5963ce5d
CJ		 1742\r
1743///\r
1744/// Boot Error Record Table (BERT)\r
1745///\r
1746typedef struct {\r
1747 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1748 UINT32 BootErrorRegionLength;\r
1749 UINT64 BootErrorRegion;\r
1750} EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1751\r
1752///\r
1753/// BERT Version (as defined in ACPI 6.4 spec.)\r
1754///\r
1755#define EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1756\r
1757///\r
1758/// Boot Error Region Block Status Definition\r
1759///\r
1760typedef struct {\r
1761 UINT32 UncorrectableErrorValid:1;\r
1762 UINT32 CorrectableErrorValid:1;\r
1763 UINT32 MultipleUncorrectableErrors:1;\r
1764 UINT32 MultipleCorrectableErrors:1;\r
1765 UINT32 ErrorDataEntryCount:10;\r
1766 UINT32 Reserved:18;\r
1767} EFI_ACPI_6_4_ERROR_BLOCK_STATUS;\r
1768\r
1769///\r
1770/// Boot Error Region Definition\r
1771///\r
1772typedef struct {\r
1773 EFI_ACPI_6_4_ERROR_BLOCK_STATUS BlockStatus;\r
1774 UINT32 RawDataOffset;\r
1775 UINT32 RawDataLength;\r
1776 UINT32 DataLength;\r
1777 UINT32 ErrorSeverity;\r
1778} EFI_ACPI_6_4_BOOT_ERROR_REGION_STRUCTURE;\r
1779\r
1780//\r
1781// Boot Error Severity types\r
1782//\r
1783#define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTABLE 0x00\r
1784#define EFI_ACPI_6_4_ERROR_SEVERITY_FATAL 0x01\r
1785#define EFI_ACPI_6_4_ERROR_SEVERITY_CORRECTED 0x02\r
1786#define EFI_ACPI_6_4_ERROR_SEVERITY_NONE 0x03\r
1787\r
1788///\r
1789/// Generic Error Data Entry Definition\r
1790///\r
1791typedef struct {\r
1792 UINT8 SectionType[16];\r
1793 UINT32 ErrorSeverity;\r
1794 UINT16 Revision;\r
1795 UINT8 ValidationBits;\r
1796 UINT8 Flags;\r
1797 UINT32 ErrorDataLength;\r
1798 UINT8 FruId[16];\r
1799 UINT8 FruText[20];\r
1800 UINT8 Timestamp[8];\r
1801} EFI_ACPI_6_4_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1802\r
1803///\r
1804/// Generic Error Data Entry Version (as defined in ACPI 6.4 spec.)\r
1805///\r
1806#define EFI_ACPI_6_4_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1807\r
1808///\r
1809/// HEST - Hardware Error Source Table\r
1810///\r
1811typedef struct {\r
1812 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1813 UINT32 ErrorSourceCount;\r
1814} EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1815\r
1816///\r
1817/// HEST Version (as defined in ACPI 6.4 spec.)\r
1818///\r
1819#define EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1820\r
1821//\r
1822// Error Source structure types.\r
1823//\r
1824#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1825#define EFI_ACPI_6_4_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1826#define EFI_ACPI_6_4_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1827#define EFI_ACPI_6_4_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1828#define EFI_ACPI_6_4_PCI_EXPRESS_DEVICE_AER 0x07\r
1829#define EFI_ACPI_6_4_PCI_EXPRESS_BRIDGE_AER 0x08\r
1830#define EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR 0x09\r
1831#define EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1832#define EFI_ACPI_6_4_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1833\r
1834//\r
1835// Error Source structure flags.\r
1836//\r
1837#define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1838#define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1839#define EFI_ACPI_6_4_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1840\r
1841///\r
1842/// IA-32 Architecture Machine Check Exception Structure Definition\r
1843///\r
1844typedef struct {\r
1845 UINT16 Type;\r
1846 UINT16 SourceId;\r
1847 UINT8 Reserved0[2];\r
1848 UINT8 Flags;\r
1849 UINT8 Enabled;\r
1850 UINT32 NumberOfRecordsToPreAllocate;\r
1851 UINT32 MaxSectionsPerRecord;\r
1852 UINT64 GlobalCapabilityInitData;\r
1853 UINT64 GlobalControlInitData;\r
1854 UINT8 NumberOfHardwareBanks;\r
1855 UINT8 Reserved1[7];\r
1856} EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1857\r
1858///\r
1859/// IA-32 Architecture Machine Check Bank Structure Definition\r
1860///\r
1861typedef struct {\r
1862 UINT8 BankNumber;\r
1863 UINT8 ClearStatusOnInitialization;\r
1864 UINT8 StatusDataFormat;\r
1865 UINT8 Reserved0;\r
1866 UINT32 ControlRegisterMsrAddress;\r
1867 UINT64 ControlInitData;\r
1868 UINT32 StatusRegisterMsrAddress;\r
1869 UINT32 AddressRegisterMsrAddress;\r
1870 UINT32 MiscRegisterMsrAddress;\r
1871} EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1872\r
1873///\r
1874/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1875///\r
1876#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1877#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1878#define EFI_ACPI_6_4_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1879\r
1880//\r
1881// Hardware Error Notification types. All other values are reserved\r
1882//\r
1883#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
1884#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
1885#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
1886#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
1887#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
1888#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
1889#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
1890#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
1891#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
1892#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
1893#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
1894#define EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
1895\r
1896///\r
1897/// Hardware Error Notification Configuration Write Enable Structure Definition\r
1898///\r
1899typedef struct {\r
1900 UINT16 Type:1;\r
1901 UINT16 PollInterval:1;\r
1902 UINT16 SwitchToPollingThresholdValue:1;\r
1903 UINT16 SwitchToPollingThresholdWindow:1;\r
1904 UINT16 ErrorThresholdValue:1;\r
1905 UINT16 ErrorThresholdWindow:1;\r
1906 UINT16 Reserved:10;\r
1907} EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
1908\r
1909///\r
1910/// Hardware Error Notification Structure Definition\r
1911///\r
1912typedef struct {\r
1913 UINT8 Type;\r
1914 UINT8 Length;\r
1915 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
1916 UINT32 PollInterval;\r
1917 UINT32 Vector;\r
1918 UINT32 SwitchToPollingThresholdValue;\r
1919 UINT32 SwitchToPollingThresholdWindow;\r
1920 UINT32 ErrorThresholdValue;\r
1921 UINT32 ErrorThresholdWindow;\r
1922} EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
1923\r
1924///\r
1925/// IA-32 Architecture Corrected Machine Check Structure Definition\r
1926///\r
1927typedef struct {\r
1928 UINT16 Type;\r
1929 UINT16 SourceId;\r
1930 UINT8 Reserved0[2];\r
1931 UINT8 Flags;\r
1932 UINT8 Enabled;\r
1933 UINT32 NumberOfRecordsToPreAllocate;\r
1934 UINT32 MaxSectionsPerRecord;\r
1935 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
1936 UINT8 NumberOfHardwareBanks;\r
1937 UINT8 Reserved1[3];\r
1938} EFI_ACPI_6_4_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
1939\r
1940///\r
1941/// IA-32 Architecture NMI Error Structure Definition\r
1942///\r
1943typedef struct {\r
1944 UINT16 Type;\r
1945 UINT16 SourceId;\r
1946 UINT8 Reserved0[2];\r
1947 UINT32 NumberOfRecordsToPreAllocate;\r
1948 UINT32 MaxSectionsPerRecord;\r
1949 UINT32 MaxRawDataLength;\r
1950} EFI_ACPI_6_4_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
1951\r
1952///\r
1953/// PCI Express Root Port AER Structure Definition\r
1954///\r
1955typedef struct {\r
1956 UINT16 Type;\r
1957 UINT16 SourceId;\r
1958 UINT8 Reserved0[2];\r
1959 UINT8 Flags;\r
1960 UINT8 Enabled;\r
1961 UINT32 NumberOfRecordsToPreAllocate;\r
1962 UINT32 MaxSectionsPerRecord;\r
1963 UINT32 Bus;\r
1964 UINT16 Device;\r
1965 UINT16 Function;\r
1966 UINT16 DeviceControl;\r
1967 UINT8 Reserved1[2];\r
1968 UINT32 UncorrectableErrorMask;\r
1969 UINT32 UncorrectableErrorSeverity;\r
1970 UINT32 CorrectableErrorMask;\r
1971 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1972 UINT32 RootErrorCommand;\r
1973} EFI_ACPI_6_4_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
1974\r
1975///\r
1976/// PCI Express Device AER Structure Definition\r
1977///\r
1978typedef struct {\r
1979 UINT16 Type;\r
1980 UINT16 SourceId;\r
1981 UINT8 Reserved0[2];\r
1982 UINT8 Flags;\r
1983 UINT8 Enabled;\r
1984 UINT32 NumberOfRecordsToPreAllocate;\r
1985 UINT32 MaxSectionsPerRecord;\r
1986 UINT32 Bus;\r
1987 UINT16 Device;\r
1988 UINT16 Function;\r
1989 UINT16 DeviceControl;\r
1990 UINT8 Reserved1[2];\r
1991 UINT32 UncorrectableErrorMask;\r
1992 UINT32 UncorrectableErrorSeverity;\r
1993 UINT32 CorrectableErrorMask;\r
1994 UINT32 AdvancedErrorCapabilitiesAndControl;\r
1995} EFI_ACPI_6_4_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
1996\r
1997///\r
1998/// PCI Express Bridge AER Structure Definition\r
1999///\r
2000typedef struct {\r
2001 UINT16 Type;\r
2002 UINT16 SourceId;\r
2003 UINT8 Reserved0[2];\r
2004 UINT8 Flags;\r
2005 UINT8 Enabled;\r
2006 UINT32 NumberOfRecordsToPreAllocate;\r
2007 UINT32 MaxSectionsPerRecord;\r
2008 UINT32 Bus;\r
2009 UINT16 Device;\r
2010 UINT16 Function;\r
2011 UINT16 DeviceControl;\r
2012 UINT8 Reserved1[2];\r
2013 UINT32 UncorrectableErrorMask;\r
2014 UINT32 UncorrectableErrorSeverity;\r
2015 UINT32 CorrectableErrorMask;\r
2016 UINT32 AdvancedErrorCapabilitiesAndControl;\r
2017 UINT32 SecondaryUncorrectableErrorMask;\r
2018 UINT32 SecondaryUncorrectableErrorSeverity;\r
2019 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
2020} EFI_ACPI_6_4_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
2021\r
2022///\r
2023/// Generic Hardware Error Source Structure Definition\r
2024///\r
2025typedef struct {\r
2026 UINT16 Type;\r
2027 UINT16 SourceId;\r
2028 UINT16 RelatedSourceId;\r
2029 UINT8 Flags;\r
2030 UINT8 Enabled;\r
2031 UINT32 NumberOfRecordsToPreAllocate;\r
2032 UINT32 MaxSectionsPerRecord;\r
2033 UINT32 MaxRawDataLength;\r
2034 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2035 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2036 UINT32 ErrorStatusBlockLength;\r
2037} EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
2038\r
2039///\r
2040/// Generic Hardware Error Source Version 2 Structure Definition\r
2041///\r
2042typedef struct {\r
2043 UINT16 Type;\r
2044 UINT16 SourceId;\r
2045 UINT16 RelatedSourceId;\r
2046 UINT8 Flags;\r
2047 UINT8 Enabled;\r
2048 UINT32 NumberOfRecordsToPreAllocate;\r
2049 UINT32 MaxSectionsPerRecord;\r
2050 UINT32 MaxRawDataLength;\r
2051 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2052 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2053 UINT32 ErrorStatusBlockLength;\r
2054 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
2055 UINT64 ReadAckPreserve;\r
2056 UINT64 ReadAckWrite;\r
2057} EFI_ACPI_6_4_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
2058\r
2059///\r
2060/// Generic Error Status Definition\r
2061///\r
2062typedef struct {\r
2063 EFI_ACPI_6_4_ERROR_BLOCK_STATUS BlockStatus;\r
2064 UINT32 RawDataOffset;\r
2065 UINT32 RawDataLength;\r
2066 UINT32 DataLength;\r
2067 UINT32 ErrorSeverity;\r
2068} EFI_ACPI_6_4_GENERIC_ERROR_STATUS_STRUCTURE;\r
2069\r
2070///\r
2071/// IA-32 Architecture Deferred Machine Check Structure Definition\r
2072///\r
2073typedef struct {\r
2074 UINT16 Type;\r
2075 UINT16 SourceId;\r
2076 UINT8 Reserved0[2];\r
2077 UINT8 Flags;\r
2078 UINT8 Enabled;\r
2079 UINT32 NumberOfRecordsToPreAllocate;\r
2080 UINT32 MaxSectionsPerRecord;\r
2081 EFI_ACPI_6_4_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2082 UINT8 NumberOfHardwareBanks;\r
2083 UINT8 Reserved1[3];\r
2084} EFI_ACPI_6_4_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;;\r
2085\r
2086///\r
2087/// HMAT - Heterogeneous Memory Attribute Table\r
2088///\r
2089typedef struct {\r
2090 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2091 UINT8 Reserved[4];\r
2092} EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2093\r
2094///\r
2095/// HMAT Revision (as defined in ACPI 6.4 spec.)\r
2096///\r
2097#define EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02\r
2098\r
2099///\r
2100/// HMAT types\r
2101///\r
2102#define EFI_ACPI_6_4_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00\r
2103#define EFI_ACPI_6_4_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2104#define EFI_ACPI_6_4_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2105\r
2106///\r
2107/// HMAT Structure Header\r
2108///\r
2109typedef struct {\r
2110 UINT16 Type;\r
2111 UINT8 Reserved[2];\r
2112 UINT32 Length;\r
2113} EFI_ACPI_6_4_HMAT_STRUCTURE_HEADER;\r
2114\r
2115///\r
2116/// Memory Proximity Domain Attributes Structure flags\r
2117///\r
2118typedef struct {\r
2119 UINT16 InitiatorProximityDomainValid:1;\r
2120 UINT16 Reserved:15;\r
2121} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;\r
2122\r
2123///\r
2124/// Memory Proximity Domain Attributes Structure\r
2125///\r
2126typedef struct {\r
2127 UINT16 Type;\r
2128 UINT8 Reserved[2];\r
2129 UINT32 Length;\r
2130 EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;\r
2131 UINT8 Reserved1[2];\r
2132 UINT32 InitiatorProximityDomain;\r
2133 UINT32 MemoryProximityDomain;\r
2134 UINT8 Reserved2[20];\r
2135} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;\r
2136\r
2137///\r
2138/// System Locality Latency and Bandwidth Information Structure flags\r
2139///\r
2140typedef struct {\r
2141 UINT8 MemoryHierarchy:4;\r
357383bc
CJ		 2142 UINT8 AccessAttributes:2;\r
2143 UINT8 Reserved:2;\r
5963ce5d
CJ		 2144} EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2145\r
2146///\r
2147/// System Locality Latency and Bandwidth Information Structure\r
2148///\r
2149typedef struct {\r
2150 UINT16 Type;\r
2151 UINT8 Reserved[2];\r
2152 UINT32 Length;\r
2153 EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2154 UINT8 DataType;\r
357383bc
CJ		 2155 UINT8 MinTransferSize;\r
2156 UINT8 Reserved1;\r
5963ce5d
CJ		 2157 UINT32 NumberOfInitiatorProximityDomains;\r
2158 UINT32 NumberOfTargetProximityDomains;\r
2159 UINT8 Reserved2[4];\r
2160 UINT64 EntryBaseUnit;\r
2161} EFI_ACPI_6_4_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2162\r
2163///\r
2164/// Memory Side Cache Information Structure cache attributes\r
2165///\r
2166typedef struct {\r
2167 UINT32 TotalCacheLevels:4;\r
2168 UINT32 CacheLevel:4;\r
2169 UINT32 CacheAssociativity:4;\r
2170 UINT32 WritePolicy:4;\r
2171 UINT32 CacheLineSize:16;\r
2172} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2173\r
2174///\r
2175/// Memory Side Cache Information Structure\r
2176///\r
2177typedef struct {\r
2178 UINT16 Type;\r
2179 UINT8 Reserved[2];\r
2180 UINT32 Length;\r
2181 UINT32 MemoryProximityDomain;\r
2182 UINT8 Reserved1[4];\r
2183 UINT64 MemorySideCacheSize;\r
2184 EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2185 UINT8 Reserved2[2];\r
2186 UINT16 NumberOfSmbiosHandles;\r
2187} EFI_ACPI_6_4_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2188\r
2189///\r
2190/// ERST - Error Record Serialization Table\r
2191///\r
2192typedef struct {\r
2193 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2194 UINT32 SerializationHeaderSize;\r
2195 UINT8 Reserved0[4];\r
2196 UINT32 InstructionEntryCount;\r
2197} EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2198\r
2199///\r
2200/// ERST Version (as defined in ACPI 6.4 spec.)\r
2201///\r
2202#define EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2203\r
2204///\r
2205/// ERST Serialization Actions\r
2206///\r
2207#define EFI_ACPI_6_4_ERST_BEGIN_WRITE_OPERATION 0x00\r
2208#define EFI_ACPI_6_4_ERST_BEGIN_READ_OPERATION 0x01\r
2209#define EFI_ACPI_6_4_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2210#define EFI_ACPI_6_4_ERST_END_OPERATION 0x03\r
2211#define EFI_ACPI_6_4_ERST_SET_RECORD_OFFSET 0x04\r
2212#define EFI_ACPI_6_4_ERST_EXECUTE_OPERATION 0x05\r
2213#define EFI_ACPI_6_4_ERST_CHECK_BUSY_STATUS 0x06\r
2214#define EFI_ACPI_6_4_ERST_GET_COMMAND_STATUS 0x07\r
2215#define EFI_ACPI_6_4_ERST_GET_RECORD_IDENTIFIER 0x08\r
2216#define EFI_ACPI_6_4_ERST_SET_RECORD_IDENTIFIER 0x09\r
2217#define EFI_ACPI_6_4_ERST_GET_RECORD_COUNT 0x0A\r
2218#define EFI_ACPI_6_4_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2219#define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2220#define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2221#define EFI_ACPI_6_4_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2222#define EFI_ACPI_6_4_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2223\r
2224///\r
2225/// ERST Action Command Status\r
2226///\r
2227#define EFI_ACPI_6_4_ERST_STATUS_SUCCESS 0x00\r
2228#define EFI_ACPI_6_4_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2229#define EFI_ACPI_6_4_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2230#define EFI_ACPI_6_4_ERST_STATUS_FAILED 0x03\r
2231#define EFI_ACPI_6_4_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2232#define EFI_ACPI_6_4_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2233\r
2234///\r
2235/// ERST Serialization Instructions\r
2236///\r
2237#define EFI_ACPI_6_4_ERST_READ_REGISTER 0x00\r
2238#define EFI_ACPI_6_4_ERST_READ_REGISTER_VALUE 0x01\r
2239#define EFI_ACPI_6_4_ERST_WRITE_REGISTER 0x02\r
2240#define EFI_ACPI_6_4_ERST_WRITE_REGISTER_VALUE 0x03\r
2241#define EFI_ACPI_6_4_ERST_NOOP 0x04\r
2242#define EFI_ACPI_6_4_ERST_LOAD_VAR1 0x05\r
2243#define EFI_ACPI_6_4_ERST_LOAD_VAR2 0x06\r
2244#define EFI_ACPI_6_4_ERST_STORE_VAR1 0x07\r
2245#define EFI_ACPI_6_4_ERST_ADD 0x08\r
2246#define EFI_ACPI_6_4_ERST_SUBTRACT 0x09\r
2247#define EFI_ACPI_6_4_ERST_ADD_VALUE 0x0A\r
2248#define EFI_ACPI_6_4_ERST_SUBTRACT_VALUE 0x0B\r
2249#define EFI_ACPI_6_4_ERST_STALL 0x0C\r
2250#define EFI_ACPI_6_4_ERST_STALL_WHILE_TRUE 0x0D\r
2251#define EFI_ACPI_6_4_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2252#define EFI_ACPI_6_4_ERST_GOTO 0x0F\r
2253#define EFI_ACPI_6_4_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2254#define EFI_ACPI_6_4_ERST_SET_DST_ADDRESS_BASE 0x11\r
2255#define EFI_ACPI_6_4_ERST_MOVE_DATA 0x12\r
2256\r
2257///\r
2258/// ERST Instruction Flags\r
2259///\r
2260#define EFI_ACPI_6_4_ERST_PRESERVE_REGISTER 0x01\r
2261\r
2262///\r
2263/// ERST Serialization Instruction Entry\r
2264///\r
2265typedef struct {\r
2266 UINT8 SerializationAction;\r
2267 UINT8 Instruction;\r
2268 UINT8 Flags;\r
2269 UINT8 Reserved0;\r
2270 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2271 UINT64 Value;\r
2272 UINT64 Mask;\r
2273} EFI_ACPI_6_4_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2274\r
2275///\r
2276/// EINJ - Error Injection Table\r
2277///\r
2278typedef struct {\r
2279 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2280 UINT32 InjectionHeaderSize;\r
2281 UINT8 InjectionFlags;\r
2282 UINT8 Reserved0[3];\r
2283 UINT32 InjectionEntryCount;\r
2284} EFI_ACPI_6_4_ERROR_INJECTION_TABLE_HEADER;\r
2285\r
2286///\r
2287/// EINJ Version (as defined in ACPI 6.4 spec.)\r
2288///\r
2289#define EFI_ACPI_6_4_ERROR_INJECTION_TABLE_REVISION 0x01\r
2290\r
2291///\r
2292/// EINJ Error Injection Actions\r
2293///\r
2294#define EFI_ACPI_6_4_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2295#define EFI_ACPI_6_4_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2296#define EFI_ACPI_6_4_EINJ_SET_ERROR_TYPE 0x02\r
2297#define EFI_ACPI_6_4_EINJ_GET_ERROR_TYPE 0x03\r
2298#define EFI_ACPI_6_4_EINJ_END_OPERATION 0x04\r
2299#define EFI_ACPI_6_4_EINJ_EXECUTE_OPERATION 0x05\r
2300#define EFI_ACPI_6_4_EINJ_CHECK_BUSY_STATUS 0x06\r
2301#define EFI_ACPI_6_4_EINJ_GET_COMMAND_STATUS 0x07\r
2302#define EFI_ACPI_6_4_EINJ_TRIGGER_ERROR 0xFF\r
2303\r
2304///\r
2305/// EINJ Action Command Status\r
2306///\r
2307#define EFI_ACPI_6_4_EINJ_STATUS_SUCCESS 0x00\r
2308#define EFI_ACPI_6_4_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2309#define EFI_ACPI_6_4_EINJ_STATUS_INVALID_ACCESS 0x02\r
2310\r
2311///\r
2312/// EINJ Error Type Definition\r
2313///\r
2314#define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2315#define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2316#define EFI_ACPI_6_4_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2317#define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2318#define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2319#define EFI_ACPI_6_4_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2320#define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2321#define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2322#define EFI_ACPI_6_4_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2323#define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2324#define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2325#define EFI_ACPI_6_4_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2326\r
2327///\r
2328/// EINJ Injection Instructions\r
2329///\r
2330#define EFI_ACPI_6_4_EINJ_READ_REGISTER 0x00\r
2331#define EFI_ACPI_6_4_EINJ_READ_REGISTER_VALUE 0x01\r
2332#define EFI_ACPI_6_4_EINJ_WRITE_REGISTER 0x02\r
2333#define EFI_ACPI_6_4_EINJ_WRITE_REGISTER_VALUE 0x03\r
2334#define EFI_ACPI_6_4_EINJ_NOOP 0x04\r
2335\r
2336///\r
2337/// EINJ Instruction Flags\r
2338///\r
2339#define EFI_ACPI_6_4_EINJ_PRESERVE_REGISTER 0x01\r
2340\r
2341///\r
2342/// EINJ Injection Instruction Entry\r
2343///\r
2344typedef struct {\r
2345 UINT8 InjectionAction;\r
2346 UINT8 Instruction;\r
2347 UINT8 Flags;\r
2348 UINT8 Reserved0;\r
2349 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2350 UINT64 Value;\r
2351 UINT64 Mask;\r
2352} EFI_ACPI_6_4_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2353\r
2354///\r
2355/// EINJ Trigger Action Table\r
2356///\r
2357typedef struct {\r
2358 UINT32 HeaderSize;\r
2359 UINT32 Revision;\r
2360 UINT32 TableSize;\r
2361 UINT32 EntryCount;\r
2362} EFI_ACPI_6_4_EINJ_TRIGGER_ACTION_TABLE;\r
2363\r
2364///\r
2365/// Platform Communications Channel Table (PCCT)\r
2366///\r
2367typedef struct {\r
2368 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2369 UINT32 Flags;\r
2370 UINT64 Reserved;\r
2371} EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2372\r
2373///\r
2374/// PCCT Version (as defined in ACPI 6.4 spec.)\r
2375///\r
2376#define EFI_ACPI_6_4_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2377\r
2378///\r
2379/// PCCT Global Flags\r
2380///\r
2381#define EFI_ACPI_6_4_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2382\r
2383//\r
2384// PCCT Subspace type\r
2385//\r
2386#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2387#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2388#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2389#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2390#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
7b17bcd9 2391#define EFI_ACPI_6_4_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS 0x05\r
5963ce5d
CJ		 2392\r
2393///\r
2394/// PCC Subspace Structure Header\r
2395///\r
2396typedef struct {\r
2397 UINT8 Type;\r
2398 UINT8 Length;\r
2399} EFI_ACPI_6_4_PCCT_SUBSPACE_HEADER;\r
2400\r
2401///\r
2402/// Generic Communications Subspace Structure\r
2403///\r
2404typedef struct {\r
2405 UINT8 Type;\r
2406 UINT8 Length;\r
2407 UINT8 Reserved[6];\r
2408 UINT64 BaseAddress;\r
2409 UINT64 AddressLength;\r
2410 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2411 UINT64 DoorbellPreserve;\r
2412 UINT64 DoorbellWrite;\r
2413 UINT32 NominalLatency;\r
2414 UINT32 MaximumPeriodicAccessRate;\r
2415 UINT16 MinimumRequestTurnaroundTime;\r
2416} EFI_ACPI_6_4_PCCT_SUBSPACE_GENERIC;\r
2417\r
2418///\r
2419/// Generic Communications Channel Shared Memory Region\r
2420///\r
2421\r
2422typedef struct {\r
2423 UINT8 Command;\r
2424 UINT8 Reserved:7;\r
2425 UINT8 NotifyOnCompletion:1;\r
2426} EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2427\r
2428typedef struct {\r
2429 UINT8 CommandComplete:1;\r
2430 UINT8 PlatformInterrupt:1;\r
2431 UINT8 Error:1;\r
2432 UINT8 PlatformNotification:1;\r
2433 UINT8 Reserved:4;\r
2434 UINT8 Reserved1;\r
2435} EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2436\r
2437typedef struct {\r
2438 UINT32 Signature;\r
2439 EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2440 EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2441} EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2442\r
2443#define EFI_ACPI_6_4_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2444#define EFI_ACPI_6_4_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2445\r
2446///\r
2447/// Type 1 HW-Reduced Communications Subspace Structure\r
2448///\r
2449typedef struct {\r
2450 UINT8 Type;\r
2451 UINT8 Length;\r
2452 UINT32 PlatformInterrupt;\r
2453 UINT8 PlatformInterruptFlags;\r
2454 UINT8 Reserved;\r
2455 UINT64 BaseAddress;\r
2456 UINT64 AddressLength;\r
2457 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2458 UINT64 DoorbellPreserve;\r
2459 UINT64 DoorbellWrite;\r
2460 UINT32 NominalLatency;\r
2461 UINT32 MaximumPeriodicAccessRate;\r
2462 UINT16 MinimumRequestTurnaroundTime;\r
2463} EFI_ACPI_6_4_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2464\r
2465///\r
2466/// Type 2 HW-Reduced Communications Subspace Structure\r
2467///\r
2468typedef struct {\r
2469 UINT8 Type;\r
2470 UINT8 Length;\r
2471 UINT32 PlatformInterrupt;\r
2472 UINT8 PlatformInterruptFlags;\r
2473 UINT8 Reserved;\r
2474 UINT64 BaseAddress;\r
2475 UINT64 AddressLength;\r
2476 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2477 UINT64 DoorbellPreserve;\r
2478 UINT64 DoorbellWrite;\r
2479 UINT32 NominalLatency;\r
2480 UINT32 MaximumPeriodicAccessRate;\r
2481 UINT16 MinimumRequestTurnaroundTime;\r
2482 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2483 UINT64 PlatformInterruptAckPreserve;\r
2484 UINT64 PlatformInterruptAckWrite;\r
2485} EFI_ACPI_6_4_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2486\r
2487///\r
2488/// Type 3 Extended PCC Subspace Structure\r
2489///\r
2490typedef struct {\r
2491 UINT8 Type;\r
2492 UINT8 Length;\r
2493 UINT32 PlatformInterrupt;\r
2494 UINT8 PlatformInterruptFlags;\r
2495 UINT8 Reserved;\r
2496 UINT64 BaseAddress;\r
2497 UINT32 AddressLength;\r
2498 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2499 UINT64 DoorbellPreserve;\r
2500 UINT64 DoorbellWrite;\r
2501 UINT32 NominalLatency;\r
2502 UINT32 MaximumPeriodicAccessRate;\r
2503 UINT32 MinimumRequestTurnaroundTime;\r
2504 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2505 UINT64 PlatformInterruptAckPreserve;\r
2506 UINT64 PlatformInterruptAckSet;\r
2507 UINT8 Reserved1[8];\r
2508 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2509 UINT64 CommandCompleteCheckMask;\r
2510 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2511 UINT64 CommandCompleteUpdatePreserve;\r
2512 UINT64 CommandCompleteUpdateSet;\r
2513 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2514 UINT64 ErrorStatusMask;\r
2515} EFI_ACPI_6_4_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2516\r
2517///\r
2518/// Type 4 Extended PCC Subspace Structure\r
2519///\r
2520typedef EFI_ACPI_6_4_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_4_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2521\r
2522#define EFI_ACPI_6_4_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2523\r
2524typedef struct {\r
2525 UINT32 Signature;\r
2526 UINT32 Flags;\r
2527 UINT32 Length;\r
2528 UINT32 Command;\r
2529} EFI_ACPI_6_4_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2530\r
7b17bcd9
CJ		 2531///\r
2532/// Type 5 HW Registers based Communications Subspace Structure\r
2533///\r
2534typedef struct {\r
2535 UINT8 Type;\r
2536 UINT8 Length;\r
2537 UINT16 Version;\r
2538 UINT64 BaseAddress;\r
2539 UINT64 SharedMemoryRangeLength;\r
2540 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2541 UINT64 DoorbellPreserve;\r
2542 UINT64 DoorbellWrite;\r
2543 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2544 UINT64 CommandCompleteCheckMask;\r
2545 EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2546 UINT64 ErrorStatusMask;\r
2547 UINT32 NominalLatency;\r
2548 UINT32 MinimumRequestTurnaroundTime;\r
2549} EFI_ACPI_6_4_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS;\r
2550\r
2551///\r
2552/// Reduced PCC Subspace Shared Memory Region\r
2553///\r
2554typedef struct {\r
2555 UINT32 Signature;\r
2556//UINT8 CommunicationSubspace[];\r
2557} EFI_6_4_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION;\r
2558\r
5963ce5d
CJ		 2559///\r
2560/// Platform Debug Trigger Table (PDTT)\r
2561///\r
2562typedef struct {\r
2563 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2564 UINT8 TriggerCount;\r
2565 UINT8 Reserved[3];\r
2566 UINT32 TriggerIdentifierArrayOffset;\r
2567} EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2568\r
2569///\r
2570/// PDTT Revision (as defined in ACPI 6.4 spec.)\r
2571///\r
2572#define EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2573\r
2574///\r
2575/// PDTT Platform Communication Channel Identifier Structure\r
2576///\r
2577typedef struct {\r
2578 UINT16 SubChannelIdentifer:8;\r
2579 UINT16 Runtime:1;\r
2580 UINT16 WaitForCompletion:1;\r
2581 UINT16 TriggerOrder:1;\r
2582 UINT16 Reserved:5;\r
2583} EFI_ACPI_6_4_PDTT_PCC_IDENTIFIER;\r
2584\r
2585///\r
2586/// PCC Commands Codes used by Platform Debug Trigger Table\r
2587///\r
2588#define EFI_ACPI_6_4_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2589#define EFI_ACPI_6_4_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2590\r
2591///\r
2592/// PDTT Platform Communication Channel\r
2593///\r
2594typedef EFI_ACPI_6_4_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_4_PDTT_PCC;\r
2595\r
2596///\r
2597/// Processor Properties Topology Table (PPTT)\r
2598///\r
2599typedef struct {\r
2600 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2601} EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2602\r
2603///\r
2604/// PPTT Revision (as defined in ACPI 6.4 spec.)\r
2605///\r
2606#define EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x02\r
2607\r
2608///\r
2609/// PPTT types\r
2610///\r
2611#define EFI_ACPI_6_4_PPTT_TYPE_PROCESSOR 0x00\r
2612#define EFI_ACPI_6_4_PPTT_TYPE_CACHE 0x01\r
2613#define EFI_ACPI_6_4_PPTT_TYPE_ID 0x02\r
2614\r
2615///\r
2616/// PPTT Structure Header\r
2617///\r
2618typedef struct {\r
2619 UINT8 Type;\r
2620 UINT8 Length;\r
2621 UINT8 Reserved[2];\r
2622} EFI_ACPI_6_4_PPTT_STRUCTURE_HEADER;\r
2623\r
2624///\r
2625/// For PPTT struct processor flags\r
2626///\r
2627#define EFI_ACPI_6_4_PPTT_PACKAGE_NOT_PHYSICAL 0x0\r
2628#define EFI_ACPI_6_4_PPTT_PACKAGE_PHYSICAL 0x1\r
2629#define EFI_ACPI_6_4_PPTT_PROCESSOR_ID_INVALID 0x0\r
2630#define EFI_ACPI_6_4_PPTT_PROCESSOR_ID_VALID 0x1\r
2631#define EFI_ACPI_6_4_PPTT_PROCESSOR_IS_NOT_THREAD 0x0\r
2632#define EFI_ACPI_6_4_PPTT_PROCESSOR_IS_THREAD 0x1\r
2633#define EFI_ACPI_6_4_PPTT_NODE_IS_NOT_LEAF 0x0\r
2634#define EFI_ACPI_6_4_PPTT_NODE_IS_LEAF 0x1\r
2635#define EFI_ACPI_6_4_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0\r
2636#define EFI_ACPI_6_4_PPTT_IMPLEMENTATION_IDENTICAL 0x1\r
2637\r
2638///\r
2639/// Processor hierarchy node structure flags\r
2640///\r
2641typedef struct {\r
2642 UINT32 PhysicalPackage:1;\r
2643 UINT32 AcpiProcessorIdValid:1;\r
2644 UINT32 ProcessorIsAThread:1;\r
2645 UINT32 NodeIsALeaf:1;\r
2646 UINT32 IdenticalImplementation:1;\r
2647 UINT32 Reserved:27;\r
2648} EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2649\r
2650///\r
2651/// Processor hierarchy node structure\r
2652///\r
2653typedef struct {\r
2654 UINT8 Type;\r
2655 UINT8 Length;\r
2656 UINT8 Reserved[2];\r
2657 EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2658 UINT32 Parent;\r
2659 UINT32 AcpiProcessorId;\r
2660 UINT32 NumberOfPrivateResources;\r
2661} EFI_ACPI_6_4_PPTT_STRUCTURE_PROCESSOR;\r
2662\r
2663///\r
2664/// For PPTT struct cache flags\r
2665///\r
2666#define EFI_ACPI_6_4_PPTT_CACHE_SIZE_INVALID 0x0\r
2667#define EFI_ACPI_6_4_PPTT_CACHE_SIZE_VALID 0x1\r
2668#define EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_INVALID 0x0\r
2669#define EFI_ACPI_6_4_PPTT_NUMBER_OF_SETS_VALID 0x1\r
2670#define EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_INVALID 0x0\r
2671#define EFI_ACPI_6_4_PPTT_ASSOCIATIVITY_VALID 0x1\r
2672#define EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_INVALID 0x0\r
2673#define EFI_ACPI_6_4_PPTT_ALLOCATION_TYPE_VALID 0x1\r
2674#define EFI_ACPI_6_4_PPTT_CACHE_TYPE_INVALID 0x0\r
2675#define EFI_ACPI_6_4_PPTT_CACHE_TYPE_VALID 0x1\r
2676#define EFI_ACPI_6_4_PPTT_WRITE_POLICY_INVALID 0x0\r
2677#define EFI_ACPI_6_4_PPTT_WRITE_POLICY_VALID 0x1\r
2678#define EFI_ACPI_6_4_PPTT_LINE_SIZE_INVALID 0x0\r
2679#define EFI_ACPI_6_4_PPTT_LINE_SIZE_VALID 0x1\r
2680\r
2681///\r
2682/// Cache Type Structure flags\r
2683///\r
2684typedef struct {\r
2685 UINT32 SizePropertyValid:1;\r
2686 UINT32 NumberOfSetsValid:1;\r
2687 UINT32 AssociativityValid:1;\r
2688 UINT32 AllocationTypeValid:1;\r
2689 UINT32 CacheTypeValid:1;\r
2690 UINT32 WritePolicyValid:1;\r
2691 UINT32 LineSizeValid:1;\r
2692 UINT32 Reserved:25;\r
2693} EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_FLAGS;\r
2694\r
2695///\r
2696/// For cache attributes\r
2697///\r
2698#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0\r
2699#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1\r
2700#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2\r
2701#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0\r
2702#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1\r
2703#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2\r
2704#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0\r
2705#define EFI_ACPI_6_4_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1\r
2706\r
2707///\r
2708/// Cache Type Structure cache attributes\r
2709///\r
2710typedef struct {\r
2711 UINT8 AllocationType:2;\r
2712 UINT8 CacheType:2;\r
2713 UINT8 WritePolicy:1;\r
2714 UINT8 Reserved:3;\r
2715} EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2716\r
2717///\r
2718/// Cache Type Structure\r
2719///\r
2720typedef struct {\r
2721 UINT8 Type;\r
2722 UINT8 Length;\r
2723 UINT8 Reserved[2];\r
2724 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2725 UINT32 NextLevelOfCache;\r
2726 UINT32 Size;\r
2727 UINT32 NumberOfSets;\r
2728 UINT8 Associativity;\r
2729 EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2730 UINT16 LineSize;\r
2731} EFI_ACPI_6_4_PPTT_STRUCTURE_CACHE;\r
2732\r
2733///\r
2734/// ID structure\r
2735///\r
2736typedef struct {\r
2737 UINT8 Type;\r
2738 UINT8 Length;\r
2739 UINT8 Reserved[2];\r
2740 UINT32 VendorId;\r
2741 UINT64 Level1Id;\r
2742 UINT64 Level2Id;\r
2743 UINT16 MajorRev;\r
2744 UINT16 MinorRev;\r
2745 UINT16 SpinRev;\r
2746} EFI_ACPI_6_4_PPTT_STRUCTURE_ID;\r
2747\r
75c4a8e1
CJ		 2748///\r
2749/// Platform Health Assessment Table (PHAT) Format\r
2750///\r
2751typedef struct {\r
2752 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2753//UINT8 PlatformTelemetryRecords[];\r
2754} EFI_ACPI_6_4_PLATFORM_HEALTH_ASSESSMENT_TABLE;\r
2755\r
2756#define EFI_ACPI_6_4_PLATFORM_HEALTH_ASSESSMENT_TABLE_REVISION 0x01\r
2757\r
2758///\r
2759/// PHAT Record Format\r
2760///\r
2761typedef struct {\r
2762 UINT16 PlatformHealthAssessmentRecordType;\r
2763 UINT16 RecordLength;\r
2764 UINT8 Revision;\r
2765//UINT8 Data[];\r
2766} EFI_ACPI_6_4_PHAT_RECORD;\r
2767\r
2768///\r
2769/// PHAT Record Type Format\r
2770///\r
2771#define EFI_ACPI_6_4_PHAT_RECORD_TYPE_FIRMWARE_VERSION_DATA_RECORD 0x0000\r
2772#define EFI_ACPI_6_4_PHAT_RECORD_TYPE_FIRMWARE_HEALTH_DATA_RECORD 0x0001\r
2773\r
2774///\r
2775/// PHAT Version Element\r
2776///\r
2777typedef struct {\r
2778 GUID ComponentId;\r
2779 UINT64 VersionValue;\r
2780 UINT32 ProducerId;\r
2781} EFI_ACPI_6_4_PHAT_VERSION_ELEMENT;\r
2782\r
2783///\r
2784/// PHAT Firmware Version Data Record\r
2785///\r
2786typedef struct {\r
2787 UINT16 PlatformRecordType;\r
2788 UINT16 RecordLength;\r
2789 UINT8 Revision;\r
2790 UINT8 Reserved[3];\r
2791 UINT32 RecordCount;\r
2792//UINT8 PhatVersionElement[];\r
2793} EFI_ACPI_6_4_PHAT_FIRMWARE_VERISON_DATA_RECORD;\r
2794\r
2795#define EFI_ACPI_6_4_PHAT_FIRMWARE_VERSION_DATA_RECORD_REVISION 0x01\r
2796\r
2797///\r
2798/// Firmware Health Data Record Structure\r
2799///\r
2800typedef struct {\r
2801 UINT16 PlatformRecordType;\r
2802 UINT16 RecordLength;\r
2803 UINT8 Revision;\r
2804 UINT16 Reserved;\r
2805 UINT8 AmHealthy;\r
2806 GUID DeviceSignature;\r
2807 UINT32 DeviceSpecificDataOffset;\r
2808//UINT8 DevicePath[];\r
2809//UINT8 DeviceSpecificData[];\r
2810} EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_STRUCTURE;\r
2811\r
2812#define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_REVISION 0x01\r
2813\r
2814///\r
2815/// Firmware Health Data Record device health state\r
2816///\r
2817#define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ERRORS_FOUND 0x00\r
2818#define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_NO_ERRORS_FOUND 0x01\r
2819#define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN 0x02\r
2820#define EFI_ACPI_6_4_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY 0x03\r
2821\r
5963ce5d
CJ		 2822//\r
2823// Known table signatures\r
2824//\r
2825\r
2826///\r
2827/// "RSD PTR " Root System Description Pointer\r
2828///\r
2829#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2830\r
2831///\r
2832/// "APIC" Multiple APIC Description Table\r
2833///\r
2834#define EFI_ACPI_6_4_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2835\r
2836///\r
2837/// "BERT" Boot Error Record Table\r
2838///\r
2839#define EFI_ACPI_6_4_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2840\r
2841///\r
2842/// "BGRT" Boot Graphics Resource Table\r
2843///\r
2844#define EFI_ACPI_6_4_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2845\r
2846///\r
2847/// "CDIT" Component Distance Information Table\r
2848///\r
2849#define EFI_ACPI_6_4_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')\r
2850\r
2851///\r
2852/// "CPEP" Corrected Platform Error Polling Table\r
2853///\r
2854#define EFI_ACPI_6_4_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2855\r
2856///\r
2857/// "CRAT" Component Resource Attribute Table\r
2858///\r
2859#define EFI_ACPI_6_4_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')\r
2860\r
2861///\r
2862/// "DSDT" Differentiated System Description Table\r
2863///\r
2864#define EFI_ACPI_6_4_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2865\r
2866///\r
2867/// "ECDT" Embedded Controller Boot Resources Table\r
2868///\r
2869#define EFI_ACPI_6_4_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2870\r
2871///\r
2872/// "EINJ" Error Injection Table\r
2873///\r
2874#define EFI_ACPI_6_4_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2875\r
2876///\r
2877/// "ERST" Error Record Serialization Table\r
2878///\r
2879#define EFI_ACPI_6_4_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2880\r
2881///\r
2882/// "FACP" Fixed ACPI Description Table\r
2883///\r
2884#define EFI_ACPI_6_4_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2885\r
2886///\r
2887/// "FACS" Firmware ACPI Control Structure\r
2888///\r
2889#define EFI_ACPI_6_4_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
2890\r
2891///\r
2892/// "FPDT" Firmware Performance Data Table\r
2893///\r
2894#define EFI_ACPI_6_4_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
2895\r
2896///\r
2897/// "GTDT" Generic Timer Description Table\r
2898///\r
2899#define EFI_ACPI_6_4_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
2900\r
2901///\r
2902/// "HEST" Hardware Error Source Table\r
2903///\r
2904#define EFI_ACPI_6_4_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
2905\r
2906///\r
2907/// "HMAT" Heterogeneous Memory Attribute Table\r
2908///\r
2909#define EFI_ACPI_6_4_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
2910\r
2911///\r
2912/// "MPST" Memory Power State Table\r
2913///\r
2914#define EFI_ACPI_6_4_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
2915\r
2916///\r
2917/// "MSCT" Maximum System Characteristics Table\r
2918///\r
2919#define EFI_ACPI_6_4_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
2920\r
2921///\r
2922/// "NFIT" NVDIMM Firmware Interface Table\r
2923///\r
2924#define EFI_ACPI_6_4_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
2925\r
2926///\r
2927/// "PDTT" Platform Debug Trigger Table\r
2928///\r
2929#define EFI_ACPI_6_4_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
2930\r
2931///\r
2932/// "PMTT" Platform Memory Topology Table\r
2933///\r
2934#define EFI_ACPI_6_4_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
2935\r
2936///\r
2937/// "PPTT" Processor Properties Topology Table\r
2938///\r
2939#define EFI_ACPI_6_4_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
2940\r
2941///\r
2942/// "PSDT" Persistent System Description Table\r
2943///\r
2944#define EFI_ACPI_6_4_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
2945\r
2946///\r
2947/// "RASF" ACPI RAS Feature Table\r
2948///\r
2949#define EFI_ACPI_6_4_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
2950\r
2951///\r
2952/// "RSDT" Root System Description Table\r
2953///\r
2954#define EFI_ACPI_6_4_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
2955\r
2956///\r
2957/// "SBST" Smart Battery Specification Table\r
2958///\r
2959#define EFI_ACPI_6_4_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
2960\r
2961///\r
2962/// "SDEV" Secure DEVices Table\r
2963///\r
2964#define EFI_ACPI_6_4_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
2965\r
2966///\r
2967/// "SLIT" System Locality Information Table\r
2968///\r
2969#define EFI_ACPI_6_4_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
2970\r
2971///\r
2972/// "SRAT" System Resource Affinity Table\r
2973///\r
2974#define EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
2975\r
2976///\r
2977/// "SSDT" Secondary System Description Table\r
2978///\r
2979#define EFI_ACPI_6_4_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
2980\r
2981///\r
2982/// "XSDT" Extended System Description Table\r
2983///\r
2984#define EFI_ACPI_6_4_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
2985\r
2986///\r
2987/// "BOOT" MS Simple Boot Spec\r
2988///\r
2989#define EFI_ACPI_6_4_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
2990\r
2991///\r
2992/// "CSRT" MS Core System Resource Table\r
2993///\r
2994#define EFI_ACPI_6_4_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
2995\r
2996///\r
2997/// "DBG2" MS Debug Port 2 Spec\r
2998///\r
2999#define EFI_ACPI_6_4_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
3000\r
3001///\r
3002/// "DBGP" MS Debug Port Spec\r
3003///\r
3004#define EFI_ACPI_6_4_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
3005\r
3006///\r
3007/// "DMAR" DMA Remapping Table\r
3008///\r
3009#define EFI_ACPI_6_4_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
3010\r
5963ce5d
CJ		 3011///\r
3012/// "DRTM" Dynamic Root of Trust for Measurement Table\r
3013///\r
3014#define EFI_ACPI_6_4_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
3015\r
3016///\r
3017/// "ETDT" Event Timer Description Table\r
3018///\r
3019#define EFI_ACPI_6_4_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
3020\r
3021///\r
3022/// "HPET" IA-PC High Precision Event Timer Table\r
3023///\r
3024#define EFI_ACPI_6_4_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
3025\r
3026///\r
3027/// "iBFT" iSCSI Boot Firmware Table\r
3028///\r
3029#define EFI_ACPI_6_4_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
3030\r
3031///\r
3032/// "IORT" I/O Remapping Table\r
3033///\r
3034#define EFI_ACPI_6_4_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
3035\r
3036///\r
3037/// "IVRS" I/O Virtualization Reporting Structure\r
3038///\r
3039#define EFI_ACPI_6_4_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
3040\r
3041///\r
3042/// "LPIT" Low Power Idle Table\r
3043///\r
3044#define EFI_ACPI_6_4_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
3045\r
3046///\r
3047/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
3048///\r
3049#define EFI_ACPI_6_4_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
3050\r
3051///\r
3052/// "MCHI" Management Controller Host Interface Table\r
3053///\r
3054#define EFI_ACPI_6_4_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
3055\r
3056///\r
3057/// "MSDM" MS Data Management Table\r
3058///\r
3059#define EFI_ACPI_6_4_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
3060\r
3061///\r
3062/// "PCCT" Platform Communications Channel Table\r
3063///\r
3064#define EFI_ACPI_6_4_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')\r
3065\r
75c4a8e1
CJ		 3066///\r
3067/// "PHAT" Platform Health Assessment Table\r
3068///\r
3069#define EFI_ACPI_6_4_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE SIGNATURE_32('P', 'H', 'A', 'T')\r
3070\r
5963ce5d
CJ		 3071///\r
3072/// "SDEI" Software Delegated Exceptions Interface Table\r
3073///\r
3074#define EFI_ACPI_6_4_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
3075\r
3076///\r
3077/// "SLIC" MS Software Licensing Table Specification\r
3078///\r
3079#define EFI_ACPI_6_4_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
3080\r
3081///\r
3082/// "SPCR" Serial Port Concole Redirection Table\r
3083///\r
3084#define EFI_ACPI_6_4_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
3085\r
3086///\r
3087/// "SPMI" Server Platform Management Interface Table\r
3088///\r
3089#define EFI_ACPI_6_4_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
3090\r
3091///\r
3092/// "STAO" _STA Override Table\r
3093///\r
3094#define EFI_ACPI_6_4_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
3095\r
3096///\r
3097/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
3098///\r
3099#define EFI_ACPI_6_4_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
3100\r
3101///\r
3102/// "TPM2" Trusted Computing Platform 1 Table\r
3103///\r
3104#define EFI_ACPI_6_4_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
3105\r
3106///\r
3107/// "UEFI" UEFI ACPI Data Table\r
3108///\r
3109#define EFI_ACPI_6_4_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
3110\r
3111///\r
3112/// "WAET" Windows ACPI Emulated Devices Table\r
3113///\r
3114#define EFI_ACPI_6_4_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
3115\r
3116///\r
3117/// "WDAT" Watchdog Action Table\r
3118///\r
3119#define EFI_ACPI_6_4_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
3120\r
3121///\r
3122/// "WDRT" Watchdog Resource Table\r
3123///\r
3124#define EFI_ACPI_6_4_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
3125\r
3126///\r
3127/// "WPBT" MS Platform Binary Table\r
3128///\r
3129#define EFI_ACPI_6_4_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
3130\r
3131///\r
3132/// "WSMT" Windows SMM Security Mitigation Table\r
3133///\r
3134#define EFI_ACPI_6_4_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
3135\r
3136///\r
3137/// "XENV" Xen Project Table\r
3138///\r
3139#define EFI_ACPI_6_4_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
3140\r
3141#pragma pack()\r
3142\r
3143#endif\r
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