]> git.proxmox.com Git - mirror_edk2.git/blame - MdePkg/Include/IndustryStandard/Acpi65.h
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm
[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi65.h
CommitLineData
c5ef1f01
CL		 1/** @file\r
2 ACPI 6.5 definitions from the ACPI Specification Revision 6.5 Aug, 2022.\r
3\r
4 Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>\r
5 Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>\r
6 Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.<BR>\r
7\r
8 SPDX-License-Identifier: BSD-2-Clause-Patent\r
9**/\r
10\r
11#ifndef ACPI_6_5_H_\r
12#define ACPI_6_5_H_\r
13\r
14#include <IndustryStandard/Acpi64.h>\r
15\r
16//\r
17// Ensure proper structure formats\r
18//\r
19#pragma pack(1)\r
20\r
21///\r
22/// ACPI 6.5 Generic Address Space definition\r
23///\r
24typedef struct {\r
25 UINT8 AddressSpaceId;\r
26 UINT8 RegisterBitWidth;\r
27 UINT8 RegisterBitOffset;\r
28 UINT8 AccessSize;\r
29 UINT64 Address;\r
30} EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE;\r
31\r
32//\r
33// Generic Address Space Address IDs\r
34//\r
35#define EFI_ACPI_6_5_SYSTEM_MEMORY 0x00\r
36#define EFI_ACPI_6_5_SYSTEM_IO 0x01\r
37#define EFI_ACPI_6_5_PCI_CONFIGURATION_SPACE 0x02\r
38#define EFI_ACPI_6_5_EMBEDDED_CONTROLLER 0x03\r
39#define EFI_ACPI_6_5_SMBUS 0x04\r
40#define EFI_ACPI_6_5_SYSTEM_CMOS 0x05\r
41#define EFI_ACPI_6_5_PCI_BAR_TARGET 0x06\r
42#define EFI_ACPI_6_5_IPMI 0x07\r
43#define EFI_ACPI_6_5_GENERAL_PURPOSE_IO 0x08\r
44#define EFI_ACPI_6_5_GENERIC_SERIAL_BUS 0x09\r
45#define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL 0x0A\r
46#define EFI_ACPI_6_5_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
47\r
48//\r
49// Generic Address Space Access Sizes\r
50//\r
51#define EFI_ACPI_6_5_UNDEFINED 0\r
52#define EFI_ACPI_6_5_BYTE 1\r
53#define EFI_ACPI_6_5_WORD 2\r
54#define EFI_ACPI_6_5_DWORD 3\r
55#define EFI_ACPI_6_5_QWORD 4\r
56\r
57//\r
58// ACPI 6.5 table structures\r
59//\r
60\r
61///\r
62/// Root System Description Pointer Structure\r
63///\r
64typedef struct {\r
65 UINT64 Signature;\r
66 UINT8 Checksum;\r
67 UINT8 OemId[6];\r
68 UINT8 Revision;\r
69 UINT32 RsdtAddress;\r
70 UINT32 Length;\r
71 UINT64 XsdtAddress;\r
72 UINT8 ExtendedChecksum;\r
73 UINT8 Reserved[3];\r
74} EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
75\r
76///\r
77/// RSD_PTR Revision (as defined in ACPI 6.5 spec.)\r
78///\r
79#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02 ///< ACPISpec (Revision 6.5) says current value is 2\r
80\r
81///\r
82/// Common table header, this prefaces all ACPI tables, including FACS, but\r
83/// excluding the RSD PTR structure\r
84///\r
85typedef struct {\r
86 UINT32 Signature;\r
87 UINT32 Length;\r
88} EFI_ACPI_6_5_COMMON_HEADER;\r
89\r
90//\r
91// Root System Description Table\r
92// No definition needed as it is a common description table header, the same with\r
93// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
94//\r
95\r
96///\r
97/// RSDT Revision (as defined in ACPI 6.5 spec.)\r
98///\r
99#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
100\r
101//\r
102// Extended System Description Table\r
103// No definition needed as it is a common description table header, the same with\r
104// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
105//\r
106\r
107///\r
108/// XSDT Revision (as defined in ACPI 6.5 spec.)\r
109///\r
110#define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
111\r
112///\r
113/// Fixed ACPI Description Table Structure (FADT)\r
114///\r
115typedef struct {\r
116 EFI_ACPI_DESCRIPTION_HEADER Header;\r
117 UINT32 FirmwareCtrl;\r
118 UINT32 Dsdt;\r
119 UINT8 Reserved0;\r
120 UINT8 PreferredPmProfile;\r
121 UINT16 SciInt;\r
122 UINT32 SmiCmd;\r
123 UINT8 AcpiEnable;\r
124 UINT8 AcpiDisable;\r
125 UINT8 S4BiosReq;\r
126 UINT8 PstateCnt;\r
127 UINT32 Pm1aEvtBlk;\r
128 UINT32 Pm1bEvtBlk;\r
129 UINT32 Pm1aCntBlk;\r
130 UINT32 Pm1bCntBlk;\r
131 UINT32 Pm2CntBlk;\r
132 UINT32 PmTmrBlk;\r
133 UINT32 Gpe0Blk;\r
134 UINT32 Gpe1Blk;\r
135 UINT8 Pm1EvtLen;\r
136 UINT8 Pm1CntLen;\r
137 UINT8 Pm2CntLen;\r
138 UINT8 PmTmrLen;\r
139 UINT8 Gpe0BlkLen;\r
140 UINT8 Gpe1BlkLen;\r
141 UINT8 Gpe1Base;\r
142 UINT8 CstCnt;\r
143 UINT16 PLvl2Lat;\r
144 UINT16 PLvl3Lat;\r
145 UINT16 FlushSize;\r
146 UINT16 FlushStride;\r
147 UINT8 DutyOffset;\r
148 UINT8 DutyWidth;\r
149 UINT8 DayAlrm;\r
150 UINT8 MonAlrm;\r
151 UINT8 Century;\r
152 UINT16 IaPcBootArch;\r
153 UINT8 Reserved1;\r
154 UINT32 Flags;\r
155 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
156 UINT8 ResetValue;\r
157 UINT16 ArmBootArch;\r
158 UINT8 MinorVersion;\r
159 UINT64 XFirmwareCtrl;\r
160 UINT64 XDsdt;\r
161 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
162 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
163 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
164 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
165 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
166 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
167 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
168 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
169 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepControlReg;\r
170 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE SleepStatusReg;\r
171 UINT64 HypervisorVendorIdentity;\r
172} EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE;\r
173\r
174///\r
175/// FADT Version (as defined in ACPI 6.5 spec.)\r
176///\r
177#define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x06\r
178#define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION 0x05\r
179\r
180//\r
181// Fixed ACPI Description Table Preferred Power Management Profile\r
182//\r
183#define EFI_ACPI_6_5_PM_PROFILE_UNSPECIFIED 0\r
184#define EFI_ACPI_6_5_PM_PROFILE_DESKTOP 1\r
185#define EFI_ACPI_6_5_PM_PROFILE_MOBILE 2\r
186#define EFI_ACPI_6_5_PM_PROFILE_WORKSTATION 3\r
187#define EFI_ACPI_6_5_PM_PROFILE_ENTERPRISE_SERVER 4\r
188#define EFI_ACPI_6_5_PM_PROFILE_SOHO_SERVER 5\r
189#define EFI_ACPI_6_5_PM_PROFILE_APPLIANCE_PC 6\r
190#define EFI_ACPI_6_5_PM_PROFILE_PERFORMANCE_SERVER 7\r
191#define EFI_ACPI_6_5_PM_PROFILE_TABLET 8\r
192\r
193//\r
194// Fixed ACPI Description Table Boot Architecture Flags\r
195// All other bits are reserved and must be set to 0.\r
196//\r
197#define EFI_ACPI_6_5_LEGACY_DEVICES BIT0\r
198#define EFI_ACPI_6_5_8042 BIT1\r
199#define EFI_ACPI_6_5_VGA_NOT_PRESENT BIT2\r
200#define EFI_ACPI_6_5_MSI_NOT_SUPPORTED BIT3\r
201#define EFI_ACPI_6_5_PCIE_ASPM_CONTROLS BIT4\r
202#define EFI_ACPI_6_5_CMOS_RTC_NOT_PRESENT BIT5\r
203\r
204//\r
205// Fixed ACPI Description Table Arm Boot Architecture Flags\r
206// All other bits are reserved and must be set to 0.\r
207//\r
208#define EFI_ACPI_6_5_ARM_PSCI_COMPLIANT BIT0\r
209#define EFI_ACPI_6_5_ARM_PSCI_USE_HVC BIT1\r
210\r
211//\r
212// Fixed ACPI Description Table Fixed Feature Flags\r
213// All other bits are reserved and must be set to 0.\r
214//\r
215#define EFI_ACPI_6_5_WBINVD BIT0\r
216#define EFI_ACPI_6_5_WBINVD_FLUSH BIT1\r
217#define EFI_ACPI_6_5_PROC_C1 BIT2\r
218#define EFI_ACPI_6_5_P_LVL2_UP BIT3\r
219#define EFI_ACPI_6_5_PWR_BUTTON BIT4\r
220#define EFI_ACPI_6_5_SLP_BUTTON BIT5\r
221#define EFI_ACPI_6_5_FIX_RTC BIT6\r
222#define EFI_ACPI_6_5_RTC_S4 BIT7\r
223#define EFI_ACPI_6_5_TMR_VAL_EXT BIT8\r
224#define EFI_ACPI_6_5_DCK_CAP BIT9\r
225#define EFI_ACPI_6_5_RESET_REG_SUP BIT10\r
226#define EFI_ACPI_6_5_SEALED_CASE BIT11\r
227#define EFI_ACPI_6_5_HEADLESS BIT12\r
228#define EFI_ACPI_6_5_CPU_SW_SLP BIT13\r
229#define EFI_ACPI_6_5_PCI_EXP_WAK BIT14\r
230#define EFI_ACPI_6_5_USE_PLATFORM_CLOCK BIT15\r
231#define EFI_ACPI_6_5_S4_RTC_STS_VALID BIT16\r
232#define EFI_ACPI_6_5_REMOTE_POWER_ON_CAPABLE BIT17\r
233#define EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL BIT18\r
234#define EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE BIT19\r
235#define EFI_ACPI_6_5_HW_REDUCED_ACPI BIT20\r
236#define EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE BIT21\r
237\r
238///\r
239/// Firmware ACPI Control Structure\r
240///\r
241typedef struct {\r
242 UINT32 Signature;\r
243 UINT32 Length;\r
244 UINT32 HardwareSignature;\r
245 UINT32 FirmwareWakingVector;\r
246 UINT32 GlobalLock;\r
247 UINT32 Flags;\r
248 UINT64 XFirmwareWakingVector;\r
249 UINT8 Version;\r
250 UINT8 Reserved0[3];\r
251 UINT32 OspmFlags;\r
252 UINT8 Reserved1[24];\r
253} EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
254\r
255///\r
256/// FACS Version (as defined in ACPI 6.5 spec.)\r
257///\r
258#define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x02\r
259\r
260///\r
261/// Firmware Control Structure Feature Flags\r
262/// All other bits are reserved and must be set to 0.\r
263///\r
264#define EFI_ACPI_6_5_S4BIOS_F BIT0\r
265#define EFI_ACPI_6_5_64BIT_WAKE_SUPPORTED_F BIT1\r
266\r
267///\r
268/// OSPM Enabled Firmware Control Structure Flags\r
269/// All other bits are reserved and must be set to 0.\r
270///\r
271#define EFI_ACPI_6_5_OSPM_64BIT_WAKE_F BIT0\r
272\r
273//\r
274// Differentiated System Description Table,\r
275// Secondary System Description Table\r
276// and Persistent System Description Table,\r
277// no definition needed as they are common description table header, the same with\r
278// EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.\r
279//\r
280#define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
281#define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION 0x02\r
282\r
283///\r
284/// Multiple APIC Description Table header definition. The rest of the table\r
285/// must be defined in a platform specific manner.\r
286///\r
287typedef struct {\r
288 EFI_ACPI_DESCRIPTION_HEADER Header;\r
289 UINT32 LocalApicAddress;\r
290 UINT32 Flags;\r
291} EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
292\r
293///\r
294/// MADT Revision (as defined in ACPI 6.5 spec.)\r
295///\r
296#define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x05\r
297\r
298///\r
299/// Multiple APIC Flags\r
300/// All other bits are reserved and must be set to 0.\r
301///\r
302#define EFI_ACPI_6_5_PCAT_COMPAT BIT0\r
303\r
304//\r
305// Multiple APIC Description Table APIC structure types\r
35091031 306// All other values between 0x18 and 0x7F are reserved and\r
c5ef1f01
CL		 307// will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.\r
308//\r
309#define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC 0x00\r
310#define EFI_ACPI_6_5_IO_APIC 0x01\r
311#define EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE 0x02\r
312#define EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
313#define EFI_ACPI_6_5_LOCAL_APIC_NMI 0x04\r
314#define EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
315#define EFI_ACPI_6_5_IO_SAPIC 0x06\r
316#define EFI_ACPI_6_5_LOCAL_SAPIC 0x07\r
317#define EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES 0x08\r
318#define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC 0x09\r
319#define EFI_ACPI_6_5_LOCAL_X2APIC_NMI 0x0A\r
320#define EFI_ACPI_6_5_GIC 0x0B\r
321#define EFI_ACPI_6_5_GICD 0x0C\r
322#define EFI_ACPI_6_5_GIC_MSI_FRAME 0x0D\r
323#define EFI_ACPI_6_5_GICR 0x0E\r
324#define EFI_ACPI_6_5_GIC_ITS 0x0F\r
325#define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP 0x10\r
35091031
CL		 326#define EFI_ACPI_6_5_CORE_PIC 0x11\r
327#define EFI_ACPI_6_5_LIO_PIC 0x12\r
328#define EFI_ACPI_6_5_HT_PIC 0x13\r
329#define EFI_ACPI_6_5_EIO_PIC 0x14\r
330#define EFI_ACPI_6_5_MSI_PIC 0x15\r
331#define EFI_ACPI_6_5_BIO_PIC 0x16\r
332#define EFI_ACPI_6_5_LPC_PIC 0x17\r
c5ef1f01
CL		 333\r
334//\r
335// APIC Structure Definitions\r
336//\r
337\r
338///\r
339/// Processor Local APIC Structure Definition\r
340///\r
341typedef struct {\r
342 UINT8 Type;\r
343 UINT8 Length;\r
344 UINT8 AcpiProcessorUid;\r
345 UINT8 ApicId;\r
346 UINT32 Flags;\r
347} EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
348\r
349///\r
350/// Local APIC Flags. All other bits are reserved and must be 0.\r
351///\r
352#define EFI_ACPI_6_5_LOCAL_APIC_ENABLED BIT0\r
353#define EFI_ACPI_6_5_LOCAL_APIC_ONLINE_CAPABLE BIT1\r
354\r
355///\r
356/// IO APIC Structure\r
357///\r
358typedef struct {\r
359 UINT8 Type;\r
360 UINT8 Length;\r
361 UINT8 IoApicId;\r
362 UINT8 Reserved;\r
363 UINT32 IoApicAddress;\r
364 UINT32 GlobalSystemInterruptBase;\r
365} EFI_ACPI_6_5_IO_APIC_STRUCTURE;\r
366\r
367///\r
368/// Interrupt Source Override Structure\r
369///\r
370typedef struct {\r
371 UINT8 Type;\r
372 UINT8 Length;\r
373 UINT8 Bus;\r
374 UINT8 Source;\r
375 UINT32 GlobalSystemInterrupt;\r
376 UINT16 Flags;\r
377} EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
378\r
379///\r
380/// Platform Interrupt Sources Structure Definition\r
381///\r
382typedef struct {\r
383 UINT8 Type;\r
384 UINT8 Length;\r
385 UINT16 Flags;\r
386 UINT8 InterruptType;\r
387 UINT8 ProcessorId;\r
388 UINT8 ProcessorEid;\r
389 UINT8 IoSapicVector;\r
390 UINT32 GlobalSystemInterrupt;\r
391 UINT32 PlatformInterruptSourceFlags;\r
392 UINT8 CpeiProcessorOverride;\r
393 UINT8 Reserved[31];\r
394} EFI_ACPI_6_5_PLATFORM_INTERRUPT_APIC_STRUCTURE;\r
395\r
396//\r
397// MPS INTI flags.\r
398// All other bits are reserved and must be set to 0.\r
399//\r
400#define EFI_ACPI_6_5_POLARITY (3 << 0)\r
401#define EFI_ACPI_6_5_TRIGGER_MODE (3 << 2)\r
402\r
403///\r
404/// Non-Maskable Interrupt Source Structure\r
405///\r
406typedef struct {\r
407 UINT8 Type;\r
408 UINT8 Length;\r
409 UINT16 Flags;\r
410 UINT32 GlobalSystemInterrupt;\r
411} EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
412\r
413///\r
414/// Local APIC NMI Structure\r
415///\r
416typedef struct {\r
417 UINT8 Type;\r
418 UINT8 Length;\r
419 UINT8 AcpiProcessorUid;\r
420 UINT16 Flags;\r
421 UINT8 LocalApicLint;\r
422} EFI_ACPI_6_5_LOCAL_APIC_NMI_STRUCTURE;\r
423\r
424///\r
425/// Local APIC Address Override Structure\r
426///\r
427typedef struct {\r
428 UINT8 Type;\r
429 UINT8 Length;\r
430 UINT16 Reserved;\r
431 UINT64 LocalApicAddress;\r
432} EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
433\r
434///\r
435/// IO SAPIC Structure\r
436///\r
437typedef struct {\r
438 UINT8 Type;\r
439 UINT8 Length;\r
440 UINT8 IoApicId;\r
441 UINT8 Reserved;\r
442 UINT32 GlobalSystemInterruptBase;\r
443 UINT64 IoSapicAddress;\r
444} EFI_ACPI_6_5_IO_SAPIC_STRUCTURE;\r
445\r
446///\r
447/// Local SAPIC Structure\r
448/// This struct followed by a null-terminated ASCII string - ACPI Processor UID String\r
449///\r
450typedef struct {\r
451 UINT8 Type;\r
452 UINT8 Length;\r
453 UINT8 AcpiProcessorId;\r
454 UINT8 LocalSapicId;\r
455 UINT8 LocalSapicEid;\r
456 UINT8 Reserved[3];\r
457 UINT32 Flags;\r
458 UINT32 ACPIProcessorUIDValue;\r
459} EFI_ACPI_6_5_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
460\r
461///\r
462/// Platform Interrupt Sources Structure\r
463///\r
464typedef struct {\r
465 UINT8 Type;\r
466 UINT8 Length;\r
467 UINT16 Flags;\r
468 UINT8 InterruptType;\r
469 UINT8 ProcessorId;\r
470 UINT8 ProcessorEid;\r
471 UINT8 IoSapicVector;\r
472 UINT32 GlobalSystemInterrupt;\r
473 UINT32 PlatformInterruptSourceFlags;\r
474} EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
475\r
476///\r
477/// Platform Interrupt Source Flags.\r
478/// All other bits are reserved and must be set to 0.\r
479///\r
480#define EFI_ACPI_6_5_CPEI_PROCESSOR_OVERRIDE BIT0\r
481\r
482///\r
483/// Processor Local x2APIC Structure Definition\r
484///\r
485typedef struct {\r
486 UINT8 Type;\r
487 UINT8 Length;\r
488 UINT8 Reserved[2];\r
489 UINT32 X2ApicId;\r
490 UINT32 Flags;\r
491 UINT32 AcpiProcessorUid;\r
492} EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_STRUCTURE;\r
493\r
494///\r
495/// Local x2APIC NMI Structure\r
496///\r
497typedef struct {\r
498 UINT8 Type;\r
499 UINT8 Length;\r
500 UINT16 Flags;\r
501 UINT32 AcpiProcessorUid;\r
502 UINT8 LocalX2ApicLint;\r
503 UINT8 Reserved[3];\r
504} EFI_ACPI_6_5_LOCAL_X2APIC_NMI_STRUCTURE;\r
505\r
506///\r
507/// GIC Structure\r
508///\r
509typedef struct {\r
510 UINT8 Type;\r
511 UINT8 Length;\r
512 UINT16 Reserved;\r
513 UINT32 CPUInterfaceNumber;\r
514 UINT32 AcpiProcessorUid;\r
515 UINT32 Flags;\r
516 UINT32 ParkingProtocolVersion;\r
517 UINT32 PerformanceInterruptGsiv;\r
518 UINT64 ParkedAddress;\r
519 UINT64 PhysicalBaseAddress;\r
520 UINT64 GICV;\r
521 UINT64 GICH;\r
522 UINT32 VGICMaintenanceInterrupt;\r
523 UINT64 GICRBaseAddress;\r
524 UINT64 MPIDR;\r
525 UINT8 ProcessorPowerEfficiencyClass;\r
526 UINT8 Reserved2;\r
527 UINT16 SpeOverflowInterrupt;\r
528} EFI_ACPI_6_5_GIC_STRUCTURE;\r
529\r
530///\r
531/// GIC Flags. All other bits are reserved and must be 0.\r
532///\r
533#define EFI_ACPI_6_5_GIC_ENABLED BIT0\r
534#define EFI_ACPI_6_5_PERFORMANCE_INTERRUPT_MODEL BIT1\r
535#define EFI_ACPI_6_5_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS BIT2\r
536\r
537///\r
538/// GIC Distributor Structure\r
539///\r
540typedef struct {\r
541 UINT8 Type;\r
542 UINT8 Length;\r
543 UINT16 Reserved1;\r
544 UINT32 GicId;\r
545 UINT64 PhysicalBaseAddress;\r
546 UINT32 SystemVectorBase;\r
547 UINT8 GicVersion;\r
548 UINT8 Reserved2[3];\r
549} EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE;\r
550\r
551///\r
552/// GIC Version\r
553///\r
554#define EFI_ACPI_6_5_GIC_V1 0x01\r
555#define EFI_ACPI_6_5_GIC_V2 0x02\r
556#define EFI_ACPI_6_5_GIC_V3 0x03\r
557#define EFI_ACPI_6_5_GIC_V4 0x04\r
558\r
559///\r
560/// GIC MSI Frame Structure\r
561///\r
562typedef struct {\r
563 UINT8 Type;\r
564 UINT8 Length;\r
565 UINT16 Reserved1;\r
566 UINT32 GicMsiFrameId;\r
567 UINT64 PhysicalBaseAddress;\r
568 UINT32 Flags;\r
569 UINT16 SPICount;\r
570 UINT16 SPIBase;\r
571} EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE;\r
572\r
573///\r
574/// GIC MSI Frame Flags. All other bits are reserved and must be 0.\r
575///\r
576#define EFI_ACPI_6_5_SPI_COUNT_BASE_SELECT BIT0\r
577\r
578///\r
579/// GICR Structure\r
580///\r
581typedef struct {\r
582 UINT8 Type;\r
583 UINT8 Length;\r
584 UINT16 Reserved;\r
585 UINT64 DiscoveryRangeBaseAddress;\r
586 UINT32 DiscoveryRangeLength;\r
587} EFI_ACPI_6_5_GICR_STRUCTURE;\r
588\r
589///\r
590/// GIC Interrupt Translation Service Structure\r
591///\r
592typedef struct {\r
593 UINT8 Type;\r
594 UINT8 Length;\r
595 UINT16 Reserved;\r
596 UINT32 GicItsId;\r
597 UINT64 PhysicalBaseAddress;\r
598 UINT32 Reserved2;\r
599} EFI_ACPI_6_5_GIC_ITS_STRUCTURE;\r
600\r
601///\r
602/// Multiprocessor Wakeup Structure\r
603///\r
604typedef struct {\r
605 UINT8 Type;\r
606 UINT8 Length;\r
607 UINT16 MailBoxVersion;\r
608 UINT32 Reserved;\r
609 UINT64 MailBoxAddress;\r
610} EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_STRUCTURE;\r
611\r
612///\r
613/// Multiprocessor Wakeup Mailbox Structure\r
614///\r
615typedef struct {\r
616 UINT16 Command;\r
617 UINT16 Reserved;\r
618 UINT32 AcpiId;\r
619 UINT64 WakeupVector;\r
620 UINT8 ReservedForOs[2032];\r
621 UINT8 ReservedForFirmware[2048];\r
622} EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_STRUCTURE;\r
623\r
624#define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP 0x0000\r
625#define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP 0x0001\r
626\r
35091031
CL		 627///\r
628/// Core Programmable Interrupt Controller\r
629///\r
630typedef struct {\r
631 UINT8 Type;\r
632 UINT8 Length;\r
633 UINT8 Version;\r
634 UINT32 ProcessorId;\r
635 UINT32 CoreId;\r
636 UINT32 Flags;\r
637} EFI_ACPI_6_5_CORE_PIC_STRUCTURE;\r
638\r
639///\r
640/// Legacy I/O Programmable Interrupt Controller\r
641///\r
642typedef struct {\r
643 UINT8 Type;\r
644 UINT8 Length;\r
645 UINT8 Version;\r
646 UINT64 Address;\r
647 UINT16 Size;\r
648 UINT8 Cascade[2];\r
649 UINT32 CascadeMap[2];\r
650} EFI_ACPI_6_5_LIO_PIC_STRUCTURE;\r
651\r
652///\r
653/// HyperTransport Programmable Interrupt Controller\r
654///\r
655typedef struct {\r
656 UINT8 Type;\r
657 UINT8 Length;\r
658 UINT8 Version;\r
659 UINT64 Address;\r
660 UINT16 Size;\r
661 UINT8 Cascade[8];\r
662} EFI_ACPI_6_5_HT_PIC_STRUCTURE;\r
663\r
664///\r
665/// Extend I/O Programmable Interrupt Controller\r
666///\r
667typedef struct {\r
668 UINT8 Type;\r
669 UINT8 Length;\r
670 UINT8 Version;\r
671 UINT8 Cascade;\r
672 UINT8 Node;\r
673 UINT64 NodeMap;\r
674} EFI_ACPI_6_5_EIO_PIC_STRUCTURE;\r
675\r
676///\r
677/// MSI Programmable Interrupt Controller\r
678///\r
679typedef struct {\r
680 UINT8 Type;\r
681 UINT8 Length;\r
682 UINT8 Version;\r
683 UINT64 MsgAddress;\r
684 UINT32 Start;\r
685 UINT32 Count;\r
686} EFI_ACPI_6_5_MSI_PIC_STRUCTURE;\r
687\r
688///\r
689/// Bridge I/O Programmable Interrupt Controller\r
690///\r
691typedef struct {\r
692 UINT8 Type;\r
693 UINT8 Length;\r
694 UINT8 Version;\r
695 UINT64 Address;\r
696 UINT16 Size;\r
697 UINT16 Id;\r
698 UINT16 GsiBase;\r
699} EFI_ACPI_6_5_BIO_PIC_STRUCTURE;\r
700\r
701///\r
702/// Low Pin Count Programmable Interrupt Controller\r
703///\r
704typedef struct {\r
705 UINT8 Type;\r
706 UINT8 Length;\r
707 UINT8 Version;\r
708 UINT64 Address;\r
709 UINT16 Size;\r
710 UINT8 Cascade;\r
711} EFI_ACPI_6_5_LPC_PIC_STRUCTURE;\r
712\r
c5ef1f01
CL		 713///\r
714/// Smart Battery Description Table (SBST)\r
715///\r
716typedef struct {\r
717 EFI_ACPI_DESCRIPTION_HEADER Header;\r
718 UINT32 WarningEnergyLevel;\r
719 UINT32 LowEnergyLevel;\r
720 UINT32 CriticalEnergyLevel;\r
721} EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE;\r
722\r
723///\r
724/// SBST Version (as defined in ACPI 6.5 spec.)\r
725///\r
726#define EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
727\r
728///\r
729/// Embedded Controller Boot Resources Table (ECDT)\r
730/// The table is followed by a null terminated ASCII string that contains\r
731/// a fully qualified reference to the name space object.\r
732///\r
733typedef struct {\r
734 EFI_ACPI_DESCRIPTION_HEADER Header;\r
735 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE EcControl;\r
736 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE EcData;\r
737 UINT32 Uid;\r
738 UINT8 GpeBit;\r
739} EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
740\r
741///\r
742/// ECDT Version (as defined in ACPI 6.5 spec.)\r
743///\r
744#define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
745\r
746///\r
747/// System Resource Affinity Table (SRAT). The rest of the table\r
748/// must be defined in a platform specific manner.\r
749///\r
750typedef struct {\r
751 EFI_ACPI_DESCRIPTION_HEADER Header;\r
752 UINT32 Reserved1; ///< Must be set to 1\r
753 UINT64 Reserved2;\r
754} EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
755\r
756///\r
757/// SRAT Version (as defined in ACPI 6.5 spec.)\r
758///\r
759#define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION 0x03\r
760\r
761//\r
762// SRAT structure types.\r
763// All other values between 0x06 an 0xFF are reserved and\r
764// will be ignored by OSPM.\r
765//\r
766#define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY 0x00\r
767#define EFI_ACPI_6_5_MEMORY_AFFINITY 0x01\r
768#define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY 0x02\r
769#define EFI_ACPI_6_5_GICC_AFFINITY 0x03\r
770#define EFI_ACPI_6_5_GIC_ITS_AFFINITY 0x04\r
771#define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY 0x05\r
772\r
773///\r
774/// Processor Local APIC/SAPIC Affinity Structure Definition\r
775///\r
776typedef struct {\r
777 UINT8 Type;\r
778 UINT8 Length;\r
779 UINT8 ProximityDomain7To0;\r
780 UINT8 ApicId;\r
781 UINT32 Flags;\r
782 UINT8 LocalSapicEid;\r
783 UINT8 ProximityDomain31To8[3];\r
784 UINT32 ClockDomain;\r
785} EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;\r
786\r
787///\r
788/// Local APIC/SAPIC Flags. All other bits are reserved and must be 0.\r
789///\r
790#define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED (1 << 0)\r
791\r
792///\r
793/// Memory Affinity Structure Definition\r
794///\r
795typedef struct {\r
796 UINT8 Type;\r
797 UINT8 Length;\r
798 UINT32 ProximityDomain;\r
799 UINT16 Reserved1;\r
800 UINT32 AddressBaseLow;\r
801 UINT32 AddressBaseHigh;\r
802 UINT32 LengthLow;\r
803 UINT32 LengthHigh;\r
804 UINT32 Reserved2;\r
805 UINT32 Flags;\r
806 UINT64 Reserved3;\r
807} EFI_ACPI_6_5_MEMORY_AFFINITY_STRUCTURE;\r
808\r
809//\r
810// Memory Flags. All other bits are reserved and must be 0.\r
811//\r
812#define EFI_ACPI_6_5_MEMORY_ENABLED (1 << 0)\r
813#define EFI_ACPI_6_5_MEMORY_HOT_PLUGGABLE (1 << 1)\r
814#define EFI_ACPI_6_5_MEMORY_NONVOLATILE (1 << 2)\r
815\r
816///\r
817/// Processor Local x2APIC Affinity Structure Definition\r
818///\r
819typedef struct {\r
820 UINT8 Type;\r
821 UINT8 Length;\r
822 UINT8 Reserved1[2];\r
823 UINT32 ProximityDomain;\r
824 UINT32 X2ApicId;\r
825 UINT32 Flags;\r
826 UINT32 ClockDomain;\r
827 UINT8 Reserved2[4];\r
828} EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;\r
829\r
830///\r
831/// GICC Affinity Structure Definition\r
832///\r
833typedef struct {\r
834 UINT8 Type;\r
835 UINT8 Length;\r
836 UINT32 ProximityDomain;\r
837 UINT32 AcpiProcessorUid;\r
838 UINT32 Flags;\r
839 UINT32 ClockDomain;\r
840} EFI_ACPI_6_5_GICC_AFFINITY_STRUCTURE;\r
841\r
842///\r
843/// GICC Flags. All other bits are reserved and must be 0.\r
844///\r
845#define EFI_ACPI_6_5_GICC_ENABLED (1 << 0)\r
846\r
847///\r
848/// GIC Interrupt Translation Service (ITS) Affinity Structure Definition\r
849///\r
850typedef struct {\r
851 UINT8 Type;\r
852 UINT8 Length;\r
853 UINT32 ProximityDomain;\r
854 UINT8 Reserved[2];\r
855 UINT32 ItsId;\r
856} EFI_ACPI_6_5_GIC_ITS_AFFINITY_STRUCTURE;\r
857\r
858//\r
859// Generic Initiator Affinity Structure Device Handle Types\r
860// All other values between 0x02 an 0xFF are reserved and\r
861// will be ignored by OSPM.\r
862//\r
863#define EFI_ACPI_6_5_ACPI_DEVICE_HANDLE 0x00\r
864#define EFI_ACPI_6_5_PCI_DEVICE_HANDLE 0x01\r
865\r
866///\r
867/// Device Handle - ACPI\r
868///\r
869typedef struct {\r
870 UINT64 AcpiHid;\r
871 UINT32 AcpiUid;\r
872 UINT8 Reserved[4];\r
873} EFI_ACPI_6_5_DEVICE_HANDLE_ACPI;\r
874\r
875///\r
876/// Device Handle - PCI\r
877///\r
878typedef struct {\r
879 UINT16 PciSegment;\r
880 UINT16 PciBdfNumber;\r
881 UINT8 Reserved[12];\r
882} EFI_ACPI_6_5_DEVICE_HANDLE_PCI;\r
883\r
884///\r
885/// Device Handle\r
886///\r
887typedef union {\r
888 EFI_ACPI_6_5_DEVICE_HANDLE_ACPI Acpi;\r
889 EFI_ACPI_6_5_DEVICE_HANDLE_PCI Pci;\r
890} EFI_ACPI_6_5_DEVICE_HANDLE;\r
891\r
892///\r
893/// Generic Initiator Affinity Structure\r
894///\r
895typedef struct {\r
896 UINT8 Type;\r
897 UINT8 Length;\r
898 UINT8 Reserved1;\r
899 UINT8 DeviceHandleType;\r
900 UINT32 ProximityDomain;\r
901 EFI_ACPI_6_5_DEVICE_HANDLE DeviceHandle;\r
902 UINT32 Flags;\r
903 UINT8 Reserved2[4];\r
904} EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE;\r
905\r
906///\r
907/// Generic Initiator Affinity Structure Flags. All other bits are reserved\r
908/// and must be 0.\r
909///\r
910#define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED BIT0\r
911#define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS BIT1\r
912\r
913///\r
914/// System Locality Distance Information Table (SLIT).\r
915/// The rest of the table is a matrix.\r
916///\r
917typedef struct {\r
918 EFI_ACPI_DESCRIPTION_HEADER Header;\r
919 UINT64 NumberOfSystemLocalities;\r
920} EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;\r
921\r
922///\r
923/// SLIT Version (as defined in ACPI 6.5 spec.)\r
924///\r
925#define EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION 0x01\r
926\r
927///\r
928/// Corrected Platform Error Polling Table (CPEP)\r
929///\r
930typedef struct {\r
931 EFI_ACPI_DESCRIPTION_HEADER Header;\r
932 UINT8 Reserved[8];\r
933} EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;\r
934\r
935///\r
936/// CPEP Version (as defined in ACPI 6.5 spec.)\r
937///\r
938#define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION 0x01\r
939\r
940//\r
941// CPEP processor structure types.\r
942//\r
943#define EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC 0x00\r
944\r
945///\r
946/// Corrected Platform Error Polling Processor Structure Definition\r
947///\r
948typedef struct {\r
949 UINT8 Type;\r
950 UINT8 Length;\r
951 UINT8 ProcessorId;\r
952 UINT8 ProcessorEid;\r
953 UINT32 PollingInterval;\r
954} EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;\r
955\r
956///\r
957/// Maximum System Characteristics Table (MSCT)\r
958///\r
959typedef struct {\r
960 EFI_ACPI_DESCRIPTION_HEADER Header;\r
961 UINT32 OffsetProxDomInfo;\r
962 UINT32 MaximumNumberOfProximityDomains;\r
963 UINT32 MaximumNumberOfClockDomains;\r
964 UINT64 MaximumPhysicalAddress;\r
965} EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;\r
966\r
967///\r
968/// MSCT Version (as defined in ACPI 6.5 spec.)\r
969///\r
970#define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION 0x01\r
971\r
972///\r
973/// Maximum Proximity Domain Information Structure Definition\r
974///\r
975typedef struct {\r
976 UINT8 Revision;\r
977 UINT8 Length;\r
978 UINT32 ProximityDomainRangeLow;\r
979 UINT32 ProximityDomainRangeHigh;\r
980 UINT32 MaximumProcessorCapacity;\r
981 UINT64 MaximumMemoryCapacity;\r
982} EFI_ACPI_6_5_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;\r
983\r
984///\r
985/// ACPI RAS Feature Table definition.\r
986///\r
987typedef struct {\r
988 EFI_ACPI_DESCRIPTION_HEADER Header;\r
989 UINT8 PlatformCommunicationChannelIdentifier[12];\r
990} EFI_ACPI_6_5_RAS_FEATURE_TABLE;\r
991\r
992///\r
993/// RASF Version (as defined in ACPI 6.5 spec.)\r
994///\r
995#define EFI_ACPI_6_5_RAS_FEATURE_TABLE_REVISION 0x01\r
996\r
997///\r
998/// ACPI RASF Platform Communication Channel Shared Memory Region definition.\r
999///\r
1000typedef struct {\r
1001 UINT32 Signature;\r
1002 UINT16 Command;\r
1003 UINT16 Status;\r
1004 UINT16 Version;\r
1005 UINT8 RASCapabilities[16];\r
1006 UINT8 SetRASCapabilities[16];\r
1007 UINT16 NumberOfRASFParameterBlocks;\r
1008 UINT32 SetRASCapabilitiesStatus;\r
1009} EFI_ACPI_6_5_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
1010\r
1011///\r
1012/// ACPI RASF PCC command code\r
1013///\r
1014#define EFI_ACPI_6_5_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND 0x01\r
1015\r
1016///\r
1017/// ACPI RASF Platform RAS Capabilities\r
1018///\r
1019#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED BIT0\r
1020#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE BIT1\r
1021#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT2\r
1022#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT3\r
1023#define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT4\r
1024\r
1025///\r
1026/// ACPI RASF Parameter Block structure for PATROL_SCRUB\r
1027///\r
1028typedef struct {\r
1029 UINT16 Type;\r
1030 UINT16 Version;\r
1031 UINT16 Length;\r
1032 UINT16 PatrolScrubCommand;\r
1033 UINT64 RequestedAddressRange[2];\r
1034 UINT64 ActualAddressRange[2];\r
1035 UINT16 Flags;\r
1036 UINT8 RequestedSpeed;\r
1037} EFI_ACPI_6_5_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;\r
1038\r
1039///\r
1040/// ACPI RASF Patrol Scrub command\r
1041///\r
1042#define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS 0x01\r
1043#define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER 0x02\r
1044#define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER 0x03\r
1045\r
1046///\r
1047/// Memory Power State Table definition.\r
1048///\r
1049typedef struct {\r
1050 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1051 UINT8 PlatformCommunicationChannelIdentifier;\r
1052 UINT8 Reserved[3];\r
1053 // Memory Power Node Structure\r
1054 // Memory Power State Characteristics\r
1055} EFI_ACPI_6_5_MEMORY_POWER_STATUS_TABLE;\r
1056\r
1057///\r
1058/// MPST Version (as defined in ACPI 6.5 spec.)\r
1059///\r
1060#define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_REVISION 0x01\r
1061\r
1062///\r
1063/// MPST Platform Communication Channel Shared Memory Region definition.\r
1064///\r
1065typedef struct {\r
1066 UINT32 Signature;\r
1067 UINT16 Command;\r
1068 UINT16 Status;\r
1069 UINT32 MemoryPowerCommandRegister;\r
1070 UINT32 MemoryPowerStatusRegister;\r
1071 UINT32 PowerStateId;\r
1072 UINT32 MemoryPowerNodeId;\r
1073 UINT64 MemoryEnergyConsumed;\r
1074 UINT64 ExpectedAveragePowerComsuned;\r
1075} EFI_ACPI_6_5_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;\r
1076\r
1077///\r
1078/// ACPI MPST PCC command code\r
1079///\r
1080#define EFI_ACPI_6_5_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND 0x03\r
1081\r
1082///\r
1083/// ACPI MPST Memory Power command\r
1084///\r
1085#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE 0x01\r
1086#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE 0x02\r
1087#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED 0x03\r
1088#define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED 0x04\r
1089\r
1090///\r
1091/// MPST Memory Power Node Table\r
1092///\r
1093typedef struct {\r
1094 UINT8 PowerStateValue;\r
1095 UINT8 PowerStateInformationIndex;\r
1096} EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE;\r
1097\r
1098typedef struct {\r
1099 UINT8 Flag;\r
1100 UINT8 Reserved;\r
1101 UINT16 MemoryPowerNodeId;\r
1102 UINT32 Length;\r
1103 UINT64 AddressBase;\r
1104 UINT64 AddressLength;\r
1105 UINT32 NumberOfPowerStates;\r
1106 UINT32 NumberOfPhysicalComponents;\r
1107 // EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates];\r
1108 // UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents];\r
1109} EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE;\r
1110\r
1111#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE 0x01\r
1112#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED 0x02\r
1113#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE 0x04\r
1114\r
1115typedef struct {\r
1116 UINT16 MemoryPowerNodeCount;\r
1117 UINT8 Reserved[2];\r
1118} EFI_ACPI_6_5_MPST_MEMORY_POWER_NODE_TABLE;\r
1119\r
1120///\r
1121/// MPST Memory Power State Characteristics Table\r
1122///\r
1123typedef struct {\r
1124 UINT8 PowerStateStructureID;\r
1125 UINT8 Flag;\r
1126 UINT16 Reserved;\r
1127 UINT32 AveragePowerConsumedInMPS0;\r
1128 UINT32 RelativePowerSavingToMPS0;\r
1129 UINT64 ExitLatencyToMPS0;\r
1130} EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;\r
1131\r
1132#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED 0x01\r
1133#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY 0x02\r
1134#define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT 0x04\r
1135\r
1136typedef struct {\r
1137 UINT16 MemoryPowerStateCharacteristicsCount;\r
1138 UINT8 Reserved[2];\r
1139} EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;\r
1140\r
1141///\r
1142/// Platform Memory Topology Table definition.\r
1143///\r
1144typedef struct {\r
1145 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1146 UINT32 NumberOfMemoryDevices;\r
1147 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1148} EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE;\r
1149\r
1150///\r
1151/// PMTT Version (as defined in ACPI 6.5 spec.)\r
1152///\r
1153#define EFI_ACPI_6_5_MEMORY_TOPOLOGY_TABLE_REVISION 0x02\r
1154\r
1155///\r
1156/// Common Memory Device.\r
1157///\r
1158typedef struct {\r
1159 UINT8 Type;\r
1160 UINT8 Reserved;\r
1161 UINT16 Length;\r
1162 UINT16 Flags;\r
1163 UINT16 Reserved1;\r
1164 UINT32 NumberOfMemoryDevices;\r
1165 // UINT8 TypeSpecificData[];\r
1166 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[NumberOfMemoryDevices];\r
1167} EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE;\r
1168\r
1169///\r
1170/// Memory Device Type.\r
1171///\r
1172#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_SOCKET 0x0\r
1173#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER 0x1\r
1174#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_DIMM 0x2\r
1175#define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE 0xFF\r
1176\r
1177///\r
1178/// Socket Type Data.\r
1179///\r
1180typedef struct {\r
1181 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1182 UINT16 SocketIdentifier;\r
1183 UINT16 Reserved;\r
1184 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1185} EFI_ACPI_6_5_PMTT_SOCKET_TYPE_DATA;\r
1186\r
1187///\r
1188/// Memory Controller Type Data.\r
1189///\r
1190typedef struct {\r
1191 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1192 UINT16 MemoryControllerIdentifier;\r
1193 UINT16 Reserved;\r
1194 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1195} EFI_ACPI_6_5_PMTT_MEMORY_CONTROLLER_TYPE_DATA;\r
1196\r
1197///\r
1198/// DIMM Type Specific Data.\r
1199///\r
1200typedef struct {\r
1201 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1202 UINT32 SmbiosHandle;\r
1203} EFI_ACPI_6_5_PMTT_DIMM_TYPE_SPECIFIC_DATA;\r
1204\r
1205///\r
1206/// Vendor Specific Type Data.\r
1207///\r
1208typedef struct {\r
1209 EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE CommonMemoryDeviceHeader;\r
1210 UINT8 TypeUuid[16];\r
1211 // EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA VendorSpecificData[];\r
1212 // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE MemoryDeviceStructure[];\r
1213} EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA;\r
1214\r
1215///\r
1216/// Boot Graphics Resource Table definition.\r
1217///\r
1218typedef struct {\r
1219 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1220 ///\r
1221 /// 2-bytes (16 bit) version ID. This value must be 1.\r
1222 ///\r
1223 UINT16 Version;\r
1224 ///\r
1225 /// 1-byte status field indicating current status about the table.\r
1226 /// Bits[7:3] = Reserved (must be zero)\r
1227 /// Bits[2:1] = Orientation Offset. These bits describe the clockwise\r
1228 /// degree offset from the image's default orientation.\r
1229 /// [00] = 0, no offset\r
1230 /// [01] = 90\r
1231 /// [10] = 180\r
1232 /// [11] = 270\r
1233 /// Bit [0] = Displayed. A one indicates the boot image graphic is\r
1234 /// displayed.\r
1235 ///\r
1236 UINT8 Status;\r
1237 ///\r
1238 /// 1-byte enumerated type field indicating format of the image.\r
1239 /// 0 = Bitmap\r
1240 /// 1 - 255 Reserved (for future use)\r
1241 ///\r
1242 UINT8 ImageType;\r
1243 ///\r
1244 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy\r
1245 /// of the image bitmap.\r
1246 ///\r
1247 UINT64 ImageAddress;\r
1248 ///\r
1249 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.\r
1250 /// (X, Y) display offset of the top left corner of the boot image.\r
1251 /// The top left corner of the display is at offset (0, 0).\r
1252 ///\r
1253 UINT32 ImageOffsetX;\r
1254 ///\r
1255 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.\r
1256 /// (X, Y) display offset of the top left corner of the boot image.\r
1257 /// The top left corner of the display is at offset (0, 0).\r
1258 ///\r
1259 UINT32 ImageOffsetY;\r
1260} EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE;\r
1261\r
1262///\r
1263/// BGRT Revision\r
1264///\r
1265#define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION 1\r
1266\r
1267///\r
1268/// BGRT Version\r
1269///\r
1270#define EFI_ACPI_6_5_BGRT_VERSION 0x01\r
1271\r
1272///\r
1273/// BGRT Status\r
1274///\r
1275#define EFI_ACPI_6_5_BGRT_STATUS_NOT_DISPLAYED 0x00\r
1276#define EFI_ACPI_6_5_BGRT_STATUS_DISPLAYED 0x01\r
1277\r
1278///\r
1279/// BGRT Image Type\r
1280///\r
1281#define EFI_ACPI_6_5_BGRT_IMAGE_TYPE_BMP 0x00\r
1282\r
1283///\r
1284/// FPDT Version (as defined in ACPI 6.5 spec.)\r
1285///\r
1286#define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION 0x01\r
1287\r
1288///\r
1289/// FPDT Performance Record Types\r
1290///\r
1291#define EFI_ACPI_6_5_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER 0x0000\r
1292#define EFI_ACPI_6_5_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER 0x0001\r
1293\r
1294///\r
1295/// FPDT Performance Record Revision\r
1296///\r
1297#define EFI_ACPI_6_5_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER 0x01\r
1298#define EFI_ACPI_6_5_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER 0x01\r
1299\r
1300///\r
1301/// FPDT Runtime Performance Record Types\r
1302///\r
1303#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME 0x0000\r
1304#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND 0x0001\r
1305#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT 0x0002\r
1306\r
1307///\r
1308/// FPDT Runtime Performance Record Revision\r
1309///\r
1310#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME 0x01\r
1311#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND 0x01\r
1312#define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT 0x02\r
1313\r
1314///\r
1315/// FPDT Performance Record header\r
1316///\r
1317typedef struct {\r
1318 UINT16 Type;\r
1319 UINT8 Length;\r
1320 UINT8 Revision;\r
1321} EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER;\r
1322\r
1323///\r
1324/// FPDT Performance Table header\r
1325///\r
1326typedef struct {\r
1327 UINT32 Signature;\r
1328 UINT32 Length;\r
1329} EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER;\r
1330\r
1331///\r
1332/// FPDT Firmware Basic Boot Performance Pointer Record Structure\r
1333///\r
1334typedef struct {\r
1335 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1336 UINT32 Reserved;\r
1337 ///\r
1338 /// 64-bit processor-relative physical address of the Basic Boot Performance Table.\r
1339 ///\r
1340 UINT64 BootPerformanceTablePointer;\r
1341} EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;\r
1342\r
1343///\r
1344/// FPDT S3 Performance Table Pointer Record Structure\r
1345///\r
1346typedef struct {\r
1347 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1348 UINT32 Reserved;\r
1349 ///\r
1350 /// 64-bit processor-relative physical address of the S3 Performance Table.\r
1351 ///\r
1352 UINT64 S3PerformanceTablePointer;\r
1353} EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;\r
1354\r
1355///\r
1356/// FPDT Firmware Basic Boot Performance Record Structure\r
1357///\r
1358typedef struct {\r
1359 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1360 UINT32 Reserved;\r
1361 ///\r
1362 /// Timer value logged at the beginning of firmware image execution.\r
1363 /// This may not always be zero or near zero.\r
1364 ///\r
1365 UINT64 ResetEnd;\r
1366 ///\r
1367 /// Timer value logged just prior to loading the OS boot loader into memory.\r
1368 /// For non-UEFI compatible boots, this field must be zero.\r
1369 ///\r
1370 UINT64 OsLoaderLoadImageStart;\r
1371 ///\r
1372 /// Timer value logged just prior to launching the previously loaded OS boot loader image.\r
1373 /// For non-UEFI compatible boots, the timer value logged will be just prior\r
1374 /// to the INT 19h handler invocation.\r
1375 ///\r
1376 UINT64 OsLoaderStartImageStart;\r
1377 ///\r
1378 /// Timer value logged at the point when the OS loader calls the\r
1379 /// ExitBootServices function for UEFI compatible firmware.\r
1380 /// For non-UEFI compatible boots, this field must be zero.\r
1381 ///\r
1382 UINT64 ExitBootServicesEntry;\r
1383 ///\r
1384 /// Timer value logged at the point just prior towhen the OS loader gaining\r
1385 /// control back from calls the ExitBootServices function for UEFI compatible firmware.\r
1386 /// For non-UEFI compatible boots, this field must be zero.\r
1387 ///\r
1388 UINT64 ExitBootServicesExit;\r
1389} EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_RECORD;\r
1390\r
1391///\r
1392/// FPDT Firmware Basic Boot Performance Table signature\r
1393///\r
1394#define EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('F', 'B', 'P', 'T')\r
1395\r
1396//\r
1397// FPDT Firmware Basic Boot Performance Table\r
1398//\r
1399typedef struct {\r
1400 EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1401 //\r
1402 // one or more Performance Records.\r
1403 //\r
1404} EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_TABLE;\r
1405\r
1406///\r
1407/// FPDT "S3PT" S3 Performance Table\r
1408///\r
1409#define EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE SIGNATURE_32('S', '3', 'P', 'T')\r
1410\r
1411//\r
1412// FPDT Firmware S3 Boot Performance Table\r
1413//\r
1414typedef struct {\r
1415 EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER Header;\r
1416 //\r
1417 // one or more Performance Records.\r
1418 //\r
1419} EFI_ACPI_6_5_FPDT_FIRMWARE_S3_BOOT_TABLE;\r
1420\r
1421///\r
1422/// FPDT Basic S3 Resume Performance Record\r
1423///\r
1424typedef struct {\r
1425 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1426 ///\r
1427 /// A count of the number of S3 resume cycles since the last full boot sequence.\r
1428 ///\r
1429 UINT32 ResumeCount;\r
1430 ///\r
1431 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the\r
1432 /// OS waking vector. Only the most recent resume cycle's time is retained.\r
1433 ///\r
1434 UINT64 FullResume;\r
1435 ///\r
1436 /// Average timer value of all resume cycles logged since the last full boot\r
1437 /// sequence, including the most recent resume. Note that the entire log of\r
1438 /// timer values does not need to be retained in order to calculate this average.\r
1439 ///\r
1440 UINT64 AverageResume;\r
1441} EFI_ACPI_6_5_FPDT_S3_RESUME_RECORD;\r
1442\r
1443///\r
1444/// FPDT Basic S3 Suspend Performance Record\r
1445///\r
1446typedef struct {\r
1447 EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER Header;\r
1448 ///\r
1449 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.\r
1450 /// Only the most recent suspend cycle's timer value is retained.\r
1451 ///\r
1452 UINT64 SuspendStart;\r
1453 ///\r
1454 /// Timer value recorded at the final firmware write to SLP_TYP (or other\r
1455 /// mechanism) used to trigger hardware entry to S3.\r
1456 /// Only the most recent suspend cycle's timer value is retained.\r
1457 ///\r
1458 UINT64 SuspendEnd;\r
1459} EFI_ACPI_6_5_FPDT_S3_SUSPEND_RECORD;\r
1460\r
1461///\r
1462/// Firmware Performance Record Table definition.\r
1463///\r
1464typedef struct {\r
1465 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1466} EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_RECORD_TABLE;\r
1467\r
1468///\r
1469/// Generic Timer Description Table definition.\r
1470///\r
1471typedef struct {\r
1472 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1473 UINT64 CntControlBasePhysicalAddress;\r
1474 UINT32 Reserved;\r
1475 UINT32 SecurePL1TimerGSIV;\r
1476 UINT32 SecurePL1TimerFlags;\r
1477 UINT32 NonSecurePL1TimerGSIV;\r
1478 UINT32 NonSecurePL1TimerFlags;\r
1479 UINT32 VirtualTimerGSIV;\r
1480 UINT32 VirtualTimerFlags;\r
1481 UINT32 NonSecurePL2TimerGSIV;\r
1482 UINT32 NonSecurePL2TimerFlags;\r
1483 UINT64 CntReadBasePhysicalAddress;\r
1484 UINT32 PlatformTimerCount;\r
1485 UINT32 PlatformTimerOffset;\r
1486 UINT32 VirtualPL2TimerGSIV;\r
1487 UINT32 VirtualPL2TimerFlags;\r
1488} EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE;\r
1489\r
1490///\r
1491/// GTDT Version (as defined in ACPI 6.5 spec.)\r
1492///\r
1493#define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION 0x03\r
1494\r
1495///\r
1496/// Timer Flags. All other bits are reserved and must be 0.\r
1497///\r
1498#define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1499#define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1500#define EFI_ACPI_6_5_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY BIT2\r
1501\r
1502///\r
1503/// Platform Timer Type\r
1504///\r
1505#define EFI_ACPI_6_5_GTDT_GT_BLOCK 0\r
1506#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG 1\r
1507\r
1508///\r
1509/// GT Block Structure\r
1510///\r
1511typedef struct {\r
1512 UINT8 Type;\r
1513 UINT16 Length;\r
1514 UINT8 Reserved;\r
1515 UINT64 CntCtlBase;\r
1516 UINT32 GTBlockTimerCount;\r
1517 UINT32 GTBlockTimerOffset;\r
1518} EFI_ACPI_6_5_GTDT_GT_BLOCK_STRUCTURE;\r
1519\r
1520///\r
1521/// GT Block Timer Structure\r
1522///\r
1523typedef struct {\r
1524 UINT8 GTFrameNumber;\r
1525 UINT8 Reserved[3];\r
1526 UINT64 CntBaseX;\r
1527 UINT64 CntEL0BaseX;\r
1528 UINT32 GTxPhysicalTimerGSIV;\r
1529 UINT32 GTxPhysicalTimerFlags;\r
1530 UINT32 GTxVirtualTimerGSIV;\r
1531 UINT32 GTxVirtualTimerFlags;\r
1532 UINT32 GTxCommonFlags;\r
1533} EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_STRUCTURE;\r
1534\r
1535///\r
1536/// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0.\r
1537///\r
1538#define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1539#define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1540\r
1541///\r
1542/// Common Flags Flags. All other bits are reserved and must be 0.\r
1543///\r
1544#define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER BIT0\r
1545#define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY BIT1\r
1546\r
1547///\r
1548/// Arm Generic Watchdog Structure\r
1549///\r
1550typedef struct {\r
1551 UINT8 Type;\r
1552 UINT16 Length;\r
1553 UINT8 Reserved;\r
1554 UINT64 RefreshFramePhysicalAddress;\r
1555 UINT64 WatchdogControlFramePhysicalAddress;\r
1556 UINT32 WatchdogTimerGSIV;\r
1557 UINT32 WatchdogTimerFlags;\r
1558} EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;\r
1559\r
1560///\r
1561/// Arm Generic Watchdog Timer Flags. All other bits are reserved and must be 0.\r
1562///\r
1563#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE BIT0\r
1564#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY BIT1\r
1565#define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER BIT2\r
1566\r
1567//\r
1568// NVDIMM Firmware Interface Table definition.\r
1569//\r
1570typedef struct {\r
1571 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1572 UINT32 Reserved;\r
1573} EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE;\r
1574\r
1575//\r
1576// NFIT Version (as defined in ACPI 6.5 spec.)\r
1577//\r
1578#define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION 0x1\r
1579\r
1580//\r
1581// Definition for NFIT Table Structure Types\r
1582//\r
1583#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE 0\r
1584#define EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE 1\r
1585#define EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE_TYPE 2\r
1586#define EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE 3\r
1587#define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE 4\r
1588#define EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE 5\r
1589#define EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE 6\r
1590#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE_TYPE 7\r
1591\r
1592//\r
1593// Definition for NFIT Structure Header\r
1594//\r
1595typedef struct {\r
1596 UINT16 Type;\r
1597 UINT16 Length;\r
1598} EFI_ACPI_6_5_NFIT_STRUCTURE_HEADER;\r
1599\r
1600//\r
1601// Definition for System Physical Address Range Structure\r
1602//\r
1603#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT BIT0\r
1604#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID BIT1\r
1605#define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID BIT2\r
1606\r
1607#define EFI_ACPI_6_5_NFIT_GUID_VOLATILE_MEMORY_REGION { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}\r
1608#define EFI_ACPI_6_5_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}\r
1609#define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_CONTROL_REGION { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}\r
1610#define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}\r
1611#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE { 0x77AB535A, 0x45FC, 0x6.5B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}\r
1612#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}\r
1613#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}\r
1614#define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}\r
1615\r
1616typedef struct {\r
1617 UINT16 Type;\r
1618 UINT16 Length;\r
1619 UINT16 SPARangeStructureIndex;\r
1620 UINT16 Flags;\r
1621 UINT32 Reserved_8;\r
1622 UINT32 ProximityDomain;\r
1623 GUID AddressRangeTypeGUID;\r
1624 UINT64 SystemPhysicalAddressRangeBase;\r
1625 UINT64 SystemPhysicalAddressRangeLength;\r
1626 UINT64 AddressRangeMemoryMappingAttribute;\r
1627 UINT64 SPALocationCookie;\r
1628} EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;\r
1629\r
1630//\r
1631// Definition for Memory Device to System Physical Address Range Mapping Structure\r
1632//\r
1633typedef struct {\r
1634 UINT32 DIMMNumber : 4;\r
1635 UINT32 MemoryChannelNumber : 4;\r
1636 UINT32 MemoryControllerID : 4;\r
1637 UINT32 SocketID : 4;\r
1638 UINT32 NodeControllerID : 12;\r
1639 UINT32 Reserved_28 : 4;\r
1640} EFI_ACPI_6_5_NFIT_DEVICE_HANDLE;\r
1641\r
1642#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL BIT0\r
1643#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL BIT1\r
1644#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL BIT2\r
1645#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF BIT3\r
1646#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF BIT4\r
1647#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS BIT5\r
1648#define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA BIT6\r
1649\r
1650typedef struct {\r
1651 UINT16 Type;\r
1652 UINT16 Length;\r
1653 EFI_ACPI_6_5_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1654 UINT16 NVDIMMPhysicalID;\r
1655 UINT16 NVDIMMRegionID;\r
1656 UINT16 SPARangeStructureIndex;\r
1657 UINT16 NVDIMMControlRegionStructureIndex;\r
1658 UINT64 NVDIMMRegionSize;\r
1659 UINT64 RegionOffset;\r
1660 UINT64 NVDIMMPhysicalAddressRegionBase;\r
1661 UINT16 InterleaveStructureIndex;\r
1662 UINT16 InterleaveWays;\r
1663 UINT16 NVDIMMStateFlags;\r
1664 UINT16 Reserved_46;\r
1665} EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;\r
1666\r
1667//\r
1668// Definition for Interleave Structure\r
1669//\r
1670typedef struct {\r
1671 UINT16 Type;\r
1672 UINT16 Length;\r
1673 UINT16 InterleaveStructureIndex;\r
1674 UINT16 Reserved_6;\r
1675 UINT32 NumberOfLines;\r
1676 UINT32 LineSize;\r
1677 // UINT32 LineOffset[NumberOfLines];\r
1678} EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE;\r
1679\r
1680//\r
1681// Definition for SMBIOS Management Information Structure\r
1682//\r
1683typedef struct {\r
1684 UINT16 Type;\r
1685 UINT16 Length;\r
1686 UINT32 Reserved_4;\r
1687 // UINT8 Data[];\r
1688} EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;\r
1689\r
1690//\r
1691// Definition for NVDIMM Control Region Structure\r
1692//\r
1693#define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING BIT0\r
1694\r
1695#define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED BIT0\r
1696\r
1697typedef struct {\r
1698 UINT16 Type;\r
1699 UINT16 Length;\r
1700 UINT16 NVDIMMControlRegionStructureIndex;\r
1701 UINT16 VendorID;\r
1702 UINT16 DeviceID;\r
1703 UINT16 RevisionID;\r
1704 UINT16 SubsystemVendorID;\r
1705 UINT16 SubsystemDeviceID;\r
1706 UINT16 SubsystemRevisionID;\r
1707 UINT8 ValidFields;\r
1708 UINT8 ManufacturingLocation;\r
1709 UINT16 ManufacturingDate;\r
1710 UINT8 Reserved_22[2];\r
1711 UINT32 SerialNumber;\r
1712 UINT16 RegionFormatInterfaceCode;\r
1713 UINT16 NumberOfBlockControlWindows;\r
1714 UINT64 SizeOfBlockControlWindow;\r
1715 UINT64 CommandRegisterOffsetInBlockControlWindow;\r
1716 UINT64 SizeOfCommandRegisterInBlockControlWindows;\r
1717 UINT64 StatusRegisterOffsetInBlockControlWindow;\r
1718 UINT64 SizeOfStatusRegisterInBlockControlWindows;\r
1719 UINT16 NVDIMMControlRegionFlag;\r
1720 UINT8 Reserved_74[6];\r
1721} EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;\r
1722\r
1723//\r
1724// Definition for NVDIMM Block Data Window Region Structure\r
1725//\r
1726typedef struct {\r
1727 UINT16 Type;\r
1728 UINT16 Length;\r
1729 UINT16 NVDIMMControlRegionStructureIndex;\r
1730 UINT16 NumberOfBlockDataWindows;\r
1731 UINT64 BlockDataWindowStartOffset;\r
1732 UINT64 SizeOfBlockDataWindow;\r
1733 UINT64 BlockAccessibleMemoryCapacity;\r
1734 UINT64 BeginningAddressOfFirstBlockInBlockAccessibleMemory;\r
1735} EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;\r
1736\r
1737//\r
1738// Definition for Flush Hint Address Structure\r
1739//\r
1740typedef struct {\r
1741 UINT16 Type;\r
1742 UINT16 Length;\r
1743 EFI_ACPI_6_5_NFIT_DEVICE_HANDLE NFITDeviceHandle;\r
1744 UINT16 NumberOfFlushHintAddresses;\r
1745 UINT8 Reserved_10[6];\r
1746 // UINT64 FlushHintAddress[NumberOfFlushHintAddresses];\r
1747} EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;\r
1748\r
1749//\r
1750// Definition for Platform Capabilities Structure\r
1751//\r
1752typedef struct {\r
1753 UINT16 Type;\r
1754 UINT16 Length;\r
1755 UINT8 HighestValidCapability;\r
1756 UINT8 Reserved_5[3];\r
1757 UINT32 Capabilities;\r
1758 UINT8 Reserved_12[4];\r
1759} EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE;\r
1760\r
1761#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT0\r
1762#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS BIT1\r
1763#define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING BIT2\r
1764\r
1765///\r
1766/// Secure DEVices Table (SDEV)\r
1767///\r
1768typedef struct {\r
1769 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1770} EFI_ACPI_6_5_SECURE_DEVICES_TABLE_HEADER;\r
1771\r
1772///\r
1773/// SDEV Revision (as defined in ACPI 6.5 spec.)\r
1774///\r
1775#define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_REVISION 0x01\r
1776\r
1777///\r
1778/// Secure Device types\r
1779///\r
1780#define EFI_ACPI_6_5_SDEV_TYPE_ACPI_NAMESPACE_DEVICE 0x00\r
1781#define EFI_ACPI_6_5_SDEV_TYPE_PCIE_ENDPOINT_DEVICE 0x01\r
1782\r
1783///\r
1784/// Secure Device flags\r
1785///\r
1786#define EFI_ACPI_6_5_SDEV_FLAG_ALLOW_HANDOFF BIT0\r
1787#define EFI_ACPI_6_5_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT BIT1\r
1788\r
1789///\r
1790/// SDEV Structure Header\r
1791///\r
1792typedef struct {\r
1793 UINT8 Type;\r
1794 UINT8 Flags;\r
1795 UINT16 Length;\r
1796} EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER;\r
1797\r
1798///\r
1799/// ACPI_NAMESPACE_DEVICE based Secure Device Structure\r
1800///\r
1801typedef struct {\r
1802 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1803 UINT16 DeviceIdentifierOffset;\r
1804 UINT16 DeviceIdentifierLength;\r
1805 UINT16 VendorSpecificDataOffset;\r
1806 UINT16 VendorSpecificDataLength;\r
1807 UINT16 SecureAccessComponentsOffset;\r
1808 UINT16 SecureAccessComponentsLength;\r
1809} EFI_ACPI_6_5_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;\r
1810\r
1811///\r
1812/// Secure Access Component Types\r
1813///\r
1814#define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION 0x00\r
1815#define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY 0x01\r
1816\r
1817///\r
1818/// Identification Based Secure Access Component\r
1819///\r
1820typedef struct {\r
1821 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1822 UINT16 HardwareIdentifierOffset;\r
1823 UINT16 HardwareIdentifierLength;\r
1824 UINT16 SubsystemIdentifierOffset;\r
1825 UINT16 SubsystemIdentifierLength;\r
1826 UINT16 HardwareRevision;\r
1827 UINT8 HardwareRevisionPresent;\r
1828 UINT8 ClassCodePresent;\r
1829 UINT8 PciCompatibleBaseClass;\r
1830 UINT8 PciCompatibleSubClass;\r
1831 UINT8 PciCompatibleProgrammingInterface;\r
1832} EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE;\r
1833\r
1834///\r
1835/// Memory-based Secure Access Component\r
1836///\r
1837typedef struct {\r
1838 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1839 UINT32 Reserved;\r
1840 UINT64 MemoryAddressBase;\r
1841 UINT64 MemoryLength;\r
1842} EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE;\r
1843\r
1844///\r
1845/// PCIe Endpoint Device based Secure Device Structure\r
1846///\r
1847typedef struct {\r
1848 EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER Header;\r
1849 UINT16 PciSegmentNumber;\r
1850 UINT16 StartBusNumber;\r
1851 UINT16 PciPathOffset;\r
1852 UINT16 PciPathLength;\r
1853 UINT16 VendorSpecificDataOffset;\r
1854 UINT16 VendorSpecificDataLength;\r
1855} EFI_ACPI_6_5_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;\r
1856\r
1857///\r
1858/// Boot Error Record Table (BERT)\r
1859///\r
1860typedef struct {\r
1861 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1862 UINT32 BootErrorRegionLength;\r
1863 UINT64 BootErrorRegion;\r
1864} EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_HEADER;\r
1865\r
1866///\r
1867/// BERT Version (as defined in ACPI 6.5 spec.)\r
1868///\r
1869#define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_REVISION 0x01\r
1870\r
1871///\r
1872/// Boot Error Region Block Status Definition\r
1873///\r
1874typedef struct {\r
1875 UINT32 UncorrectableErrorValid : 1;\r
1876 UINT32 CorrectableErrorValid : 1;\r
1877 UINT32 MultipleUncorrectableErrors : 1;\r
1878 UINT32 MultipleCorrectableErrors : 1;\r
1879 UINT32 ErrorDataEntryCount : 10;\r
1880 UINT32 Reserved : 18;\r
1881} EFI_ACPI_6_5_ERROR_BLOCK_STATUS;\r
1882\r
1883///\r
1884/// Boot Error Region Definition\r
1885///\r
1886typedef struct {\r
1887 EFI_ACPI_6_5_ERROR_BLOCK_STATUS BlockStatus;\r
1888 UINT32 RawDataOffset;\r
1889 UINT32 RawDataLength;\r
1890 UINT32 DataLength;\r
1891 UINT32 ErrorSeverity;\r
1892} EFI_ACPI_6_5_BOOT_ERROR_REGION_STRUCTURE;\r
1893\r
1894//\r
1895// Boot Error Severity types\r
1896//\r
1897#define EFI_ACPI_6_5_ERROR_SEVERITY_RECOVERABLE 0x00\r
1898#define EFI_ACPI_6_5_ERROR_SEVERITY_FATAL 0x01\r
1899#define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTED 0x02\r
1900#define EFI_ACPI_6_5_ERROR_SEVERITY_NONE 0x03\r
1901//\r
1902// The term 'Correctable' is no longer being used as an error severity of the\r
1903// reported error since ACPI Specification Version 5.1 Errata B.\r
1904// The below macro is considered as deprecated and should no longer be used.\r
1905//\r
1906#define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTABLE 0x00\r
1907\r
1908///\r
1909/// Generic Error Data Entry Definition\r
1910///\r
1911typedef struct {\r
1912 UINT8 SectionType[16];\r
1913 UINT32 ErrorSeverity;\r
1914 UINT16 Revision;\r
1915 UINT8 ValidationBits;\r
1916 UINT8 Flags;\r
1917 UINT32 ErrorDataLength;\r
1918 UINT8 FruId[16];\r
1919 UINT8 FruText[20];\r
1920 UINT8 Timestamp[8];\r
1921} EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;\r
1922\r
1923///\r
1924/// Generic Error Data Entry Version (as defined in ACPI 6.5 spec.)\r
1925///\r
1926#define EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_REVISION 0x0300\r
1927\r
1928///\r
1929/// HEST - Hardware Error Source Table\r
1930///\r
1931typedef struct {\r
1932 EFI_ACPI_DESCRIPTION_HEADER Header;\r
1933 UINT32 ErrorSourceCount;\r
1934} EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_HEADER;\r
1935\r
1936///\r
1937/// HEST Version (as defined in ACPI 6.5 spec.)\r
1938///\r
1939#define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_REVISION 0x01\r
1940\r
1941//\r
1942// Error Source structure types.\r
1943//\r
1944#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION 0x00\r
1945#define EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK 0x01\r
1946#define EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR 0x02\r
1947#define EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER 0x06\r
1948#define EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER 0x07\r
1949#define EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER 0x08\r
1950#define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR 0x09\r
1951#define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_VERSION_2 0x0A\r
1952#define EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK 0x0B\r
1953\r
1954//\r
1955// Error Source structure flags.\r
1956//\r
1957#define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_FIRMWARE_FIRST (1 << 0)\r
1958#define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GLOBAL (1 << 1)\r
1959#define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GHES_ASSIST (1 << 2)\r
1960\r
1961///\r
1962/// IA-32 Architecture Machine Check Exception Structure Definition\r
1963///\r
1964typedef struct {\r
1965 UINT16 Type;\r
1966 UINT16 SourceId;\r
1967 UINT8 Reserved0[2];\r
1968 UINT8 Flags;\r
1969 UINT8 Enabled;\r
1970 UINT32 NumberOfRecordsToPreAllocate;\r
1971 UINT32 MaxSectionsPerRecord;\r
1972 UINT64 GlobalCapabilityInitData;\r
1973 UINT64 GlobalControlInitData;\r
1974 UINT8 NumberOfHardwareBanks;\r
1975 UINT8 Reserved1[7];\r
1976} EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;\r
1977\r
1978///\r
1979/// IA-32 Architecture Machine Check Bank Structure Definition\r
1980///\r
1981typedef struct {\r
1982 UINT8 BankNumber;\r
1983 UINT8 ClearStatusOnInitialization;\r
1984 UINT8 StatusDataFormat;\r
1985 UINT8 Reserved0;\r
1986 UINT32 ControlRegisterMsrAddress;\r
1987 UINT64 ControlInitData;\r
1988 UINT32 StatusRegisterMsrAddress;\r
1989 UINT32 AddressRegisterMsrAddress;\r
1990 UINT32 MiscRegisterMsrAddress;\r
1991} EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;\r
1992\r
1993///\r
1994/// IA-32 Architecture Machine Check Bank Structure MCA data format\r
1995///\r
1996#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 0x00\r
1997#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 0x01\r
1998#define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 0x02\r
1999\r
2000//\r
2001// Hardware Error Notification types. All other values are reserved\r
2002//\r
2003#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_POLLED 0x00\r
2004#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT 0x01\r
2005#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT 0x02\r
2006#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SCI 0x03\r
2007#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_NMI 0x04\r
2008#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CMCI 0x05\r
2009#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_MCE 0x06\r
2010#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL 0x07\r
2011#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA 0x08\r
2012#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI 0x09\r
2013#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GSIV 0x0A\r
2014#define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION 0x0B\r
2015\r
2016///\r
2017/// Hardware Error Notification Configuration Write Enable Structure Definition\r
2018///\r
2019typedef struct {\r
2020 UINT16 Type : 1;\r
2021 UINT16 PollInterval : 1;\r
2022 UINT16 SwitchToPollingThresholdValue : 1;\r
2023 UINT16 SwitchToPollingThresholdWindow : 1;\r
2024 UINT16 ErrorThresholdValue : 1;\r
2025 UINT16 ErrorThresholdWindow : 1;\r
2026 UINT16 Reserved : 10;\r
2027} EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;\r
2028\r
2029///\r
2030/// Hardware Error Notification Structure Definition\r
2031///\r
2032typedef struct {\r
2033 UINT8 Type;\r
2034 UINT8 Length;\r
2035 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable;\r
2036 UINT32 PollInterval;\r
2037 UINT32 Vector;\r
2038 UINT32 SwitchToPollingThresholdValue;\r
2039 UINT32 SwitchToPollingThresholdWindow;\r
2040 UINT32 ErrorThresholdValue;\r
2041 UINT32 ErrorThresholdWindow;\r
2042} EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;\r
2043\r
2044///\r
2045/// IA-32 Architecture Corrected Machine Check Structure Definition\r
2046///\r
2047typedef struct {\r
2048 UINT16 Type;\r
2049 UINT16 SourceId;\r
2050 UINT8 Reserved0[2];\r
2051 UINT8 Flags;\r
2052 UINT8 Enabled;\r
2053 UINT32 NumberOfRecordsToPreAllocate;\r
2054 UINT32 MaxSectionsPerRecord;\r
2055 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2056 UINT8 NumberOfHardwareBanks;\r
2057 UINT8 Reserved1[3];\r
2058} EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;\r
2059\r
2060///\r
2061/// IA-32 Architecture NMI Error Structure Definition\r
2062///\r
2063typedef struct {\r
2064 UINT16 Type;\r
2065 UINT16 SourceId;\r
2066 UINT8 Reserved0[2];\r
2067 UINT32 NumberOfRecordsToPreAllocate;\r
2068 UINT32 MaxSectionsPerRecord;\r
2069 UINT32 MaxRawDataLength;\r
2070} EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;\r
2071\r
2072///\r
2073/// PCI Express Root Port AER Structure Definition\r
2074///\r
2075typedef struct {\r
2076 UINT16 Type;\r
2077 UINT16 SourceId;\r
2078 UINT8 Reserved0[2];\r
2079 UINT8 Flags;\r
2080 UINT8 Enabled;\r
2081 UINT32 NumberOfRecordsToPreAllocate;\r
2082 UINT32 MaxSectionsPerRecord;\r
2083 UINT32 Bus;\r
2084 UINT16 Device;\r
2085 UINT16 Function;\r
2086 UINT16 DeviceControl;\r
2087 UINT8 Reserved1[2];\r
2088 UINT32 UncorrectableErrorMask;\r
2089 UINT32 UncorrectableErrorSeverity;\r
2090 UINT32 CorrectableErrorMask;\r
2091 UINT32 AdvancedErrorCapabilitiesAndControl;\r
2092 UINT32 RootErrorCommand;\r
2093} EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;\r
2094\r
2095///\r
2096/// PCI Express Device AER Structure Definition\r
2097///\r
2098typedef struct {\r
2099 UINT16 Type;\r
2100 UINT16 SourceId;\r
2101 UINT8 Reserved0[2];\r
2102 UINT8 Flags;\r
2103 UINT8 Enabled;\r
2104 UINT32 NumberOfRecordsToPreAllocate;\r
2105 UINT32 MaxSectionsPerRecord;\r
2106 UINT32 Bus;\r
2107 UINT16 Device;\r
2108 UINT16 Function;\r
2109 UINT16 DeviceControl;\r
2110 UINT8 Reserved1[2];\r
2111 UINT32 UncorrectableErrorMask;\r
2112 UINT32 UncorrectableErrorSeverity;\r
2113 UINT32 CorrectableErrorMask;\r
2114 UINT32 AdvancedErrorCapabilitiesAndControl;\r
2115} EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER_STRUCTURE;\r
2116\r
2117///\r
2118/// PCI Express Bridge AER Structure Definition\r
2119///\r
2120typedef struct {\r
2121 UINT16 Type;\r
2122 UINT16 SourceId;\r
2123 UINT8 Reserved0[2];\r
2124 UINT8 Flags;\r
2125 UINT8 Enabled;\r
2126 UINT32 NumberOfRecordsToPreAllocate;\r
2127 UINT32 MaxSectionsPerRecord;\r
2128 UINT32 Bus;\r
2129 UINT16 Device;\r
2130 UINT16 Function;\r
2131 UINT16 DeviceControl;\r
2132 UINT8 Reserved1[2];\r
2133 UINT32 UncorrectableErrorMask;\r
2134 UINT32 UncorrectableErrorSeverity;\r
2135 UINT32 CorrectableErrorMask;\r
2136 UINT32 AdvancedErrorCapabilitiesAndControl;\r
2137 UINT32 SecondaryUncorrectableErrorMask;\r
2138 UINT32 SecondaryUncorrectableErrorSeverity;\r
2139 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl;\r
2140} EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;\r
2141\r
2142///\r
2143/// Generic Hardware Error Source Structure Definition\r
2144///\r
2145typedef struct {\r
2146 UINT16 Type;\r
2147 UINT16 SourceId;\r
2148 UINT16 RelatedSourceId;\r
2149 UINT8 Flags;\r
2150 UINT8 Enabled;\r
2151 UINT32 NumberOfRecordsToPreAllocate;\r
2152 UINT32 MaxSectionsPerRecord;\r
2153 UINT32 MaxRawDataLength;\r
2154 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2155 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2156 UINT32 ErrorStatusBlockLength;\r
2157} EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;\r
2158\r
2159///\r
2160/// Generic Hardware Error Source Version 2 Structure Definition\r
2161///\r
2162typedef struct {\r
2163 UINT16 Type;\r
2164 UINT16 SourceId;\r
2165 UINT16 RelatedSourceId;\r
2166 UINT8 Flags;\r
2167 UINT8 Enabled;\r
2168 UINT32 NumberOfRecordsToPreAllocate;\r
2169 UINT32 MaxSectionsPerRecord;\r
2170 UINT32 MaxRawDataLength;\r
2171 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress;\r
2172 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2173 UINT32 ErrorStatusBlockLength;\r
2174 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ReadAckRegister;\r
2175 UINT64 ReadAckPreserve;\r
2176 UINT64 ReadAckWrite;\r
2177} EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;\r
2178\r
2179///\r
2180/// Generic Error Status Definition\r
2181///\r
2182typedef struct {\r
2183 EFI_ACPI_6_5_ERROR_BLOCK_STATUS BlockStatus;\r
2184 UINT32 RawDataOffset;\r
2185 UINT32 RawDataLength;\r
2186 UINT32 DataLength;\r
2187 UINT32 ErrorSeverity;\r
2188} EFI_ACPI_6_5_GENERIC_ERROR_STATUS_STRUCTURE;\r
2189\r
2190///\r
2191/// IA-32 Architecture Deferred Machine Check Structure Definition\r
2192///\r
2193typedef struct {\r
2194 UINT16 Type;\r
2195 UINT16 SourceId;\r
2196 UINT8 Reserved0[2];\r
2197 UINT8 Flags;\r
2198 UINT8 Enabled;\r
2199 UINT32 NumberOfRecordsToPreAllocate;\r
2200 UINT32 MaxSectionsPerRecord;\r
2201 EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure;\r
2202 UINT8 NumberOfHardwareBanks;\r
2203 UINT8 Reserved1[3];\r
2204} EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;\r
2205\r
2206///\r
2207/// HMAT - Heterogeneous Memory Attribute Table\r
2208///\r
2209typedef struct {\r
2210 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2211 UINT8 Reserved[4];\r
2212} EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;\r
2213\r
2214///\r
2215/// HMAT Revision (as defined in ACPI 6.5 spec.)\r
2216///\r
2217#define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION 0x02\r
2218\r
2219///\r
2220/// HMAT types\r
2221///\r
2222#define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES 0x00\r
2223#define EFI_ACPI_6_5_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO 0x01\r
2224#define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO 0x02\r
2225\r
2226///\r
2227/// HMAT Structure Header\r
2228///\r
2229typedef struct {\r
2230 UINT16 Type;\r
2231 UINT8 Reserved[2];\r
2232 UINT32 Length;\r
2233} EFI_ACPI_6_5_HMAT_STRUCTURE_HEADER;\r
2234\r
2235///\r
2236/// Memory Proximity Domain Attributes Structure flags\r
2237///\r
2238typedef struct {\r
2239 UINT16 InitiatorProximityDomainValid : 1;\r
2240 UINT16 Reserved : 15;\r
2241} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;\r
2242\r
2243///\r
2244/// Memory Proximity Domain Attributes Structure\r
2245///\r
2246typedef struct {\r
2247 UINT16 Type;\r
2248 UINT8 Reserved[2];\r
2249 UINT32 Length;\r
2250 EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS Flags;\r
2251 UINT8 Reserved1[2];\r
2252 UINT32 InitiatorProximityDomain;\r
2253 UINT32 MemoryProximityDomain;\r
2254 UINT8 Reserved2[20];\r
2255} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;\r
2256\r
2257///\r
2258/// System Locality Latency and Bandwidth Information Structure flags\r
2259///\r
2260typedef struct {\r
2261 UINT8 MemoryHierarchy : 4;\r
2262 UINT8 AccessAttributes : 2;\r
2263 UINT8 Reserved : 2;\r
2264} EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;\r
2265\r
2266///\r
2267/// System Locality Latency and Bandwidth Information Structure\r
2268///\r
2269typedef struct {\r
2270 UINT16 Type;\r
2271 UINT8 Reserved[2];\r
2272 UINT32 Length;\r
2273 EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS Flags;\r
2274 UINT8 DataType;\r
2275 UINT8 MinTransferSize;\r
2276 UINT8 Reserved1;\r
2277 UINT32 NumberOfInitiatorProximityDomains;\r
2278 UINT32 NumberOfTargetProximityDomains;\r
2279 UINT8 Reserved2[4];\r
2280 UINT64 EntryBaseUnit;\r
2281} EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;\r
2282\r
2283///\r
2284/// Memory Side Cache Information Structure cache attributes\r
2285///\r
2286typedef struct {\r
2287 UINT32 TotalCacheLevels : 4;\r
2288 UINT32 CacheLevel : 4;\r
2289 UINT32 CacheAssociativity : 4;\r
2290 UINT32 WritePolicy : 4;\r
2291 UINT32 CacheLineSize : 16;\r
2292} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;\r
2293\r
2294///\r
2295/// Memory Side Cache Information Structure\r
2296///\r
2297typedef struct {\r
2298 UINT16 Type;\r
2299 UINT8 Reserved[2];\r
2300 UINT32 Length;\r
2301 UINT32 MemoryProximityDomain;\r
2302 UINT8 Reserved1[4];\r
2303 UINT64 MemorySideCacheSize;\r
2304 EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES CacheAttributes;\r
2305 UINT8 Reserved2[2];\r
2306 UINT16 NumberOfSmbiosHandles;\r
2307} EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;\r
2308\r
2309///\r
2310/// ERST - Error Record Serialization Table\r
2311///\r
2312typedef struct {\r
2313 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2314 UINT32 SerializationHeaderSize;\r
2315 UINT8 Reserved0[4];\r
2316 UINT32 InstructionEntryCount;\r
2317} EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;\r
2318\r
2319///\r
2320/// ERST Version (as defined in ACPI 6.5 spec.)\r
2321///\r
2322#define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_REVISION 0x01\r
2323\r
2324///\r
2325/// ERST Serialization Actions\r
2326///\r
2327#define EFI_ACPI_6_5_ERST_BEGIN_WRITE_OPERATION 0x00\r
2328#define EFI_ACPI_6_5_ERST_BEGIN_READ_OPERATION 0x01\r
2329#define EFI_ACPI_6_5_ERST_BEGIN_CLEAR_OPERATION 0x02\r
2330#define EFI_ACPI_6_5_ERST_END_OPERATION 0x03\r
2331#define EFI_ACPI_6_5_ERST_SET_RECORD_OFFSET 0x04\r
2332#define EFI_ACPI_6_5_ERST_EXECUTE_OPERATION 0x05\r
2333#define EFI_ACPI_6_5_ERST_CHECK_BUSY_STATUS 0x06\r
2334#define EFI_ACPI_6_5_ERST_GET_COMMAND_STATUS 0x07\r
2335#define EFI_ACPI_6_5_ERST_GET_RECORD_IDENTIFIER 0x08\r
2336#define EFI_ACPI_6_5_ERST_SET_RECORD_IDENTIFIER 0x09\r
2337#define EFI_ACPI_6_5_ERST_GET_RECORD_COUNT 0x0A\r
2338#define EFI_ACPI_6_5_ERST_BEGIN_DUMMY_WRITE_OPERATION 0x0B\r
2339#define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE 0x0D\r
2340#define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH 0x0E\r
2341#define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES 0x0F\r
2342#define EFI_ACPI_6_5_ERST_GET_EXECUTE_OPERATION_TIMINGS 0x10\r
2343\r
2344///\r
2345/// ERST Action Command Status\r
2346///\r
2347#define EFI_ACPI_6_5_ERST_STATUS_SUCCESS 0x00\r
2348#define EFI_ACPI_6_5_ERST_STATUS_NOT_ENOUGH_SPACE 0x01\r
2349#define EFI_ACPI_6_5_ERST_STATUS_HARDWARE_NOT_AVAILABLE 0x02\r
2350#define EFI_ACPI_6_5_ERST_STATUS_FAILED 0x03\r
2351#define EFI_ACPI_6_5_ERST_STATUS_RECORD_STORE_EMPTY 0x04\r
2352#define EFI_ACPI_6_5_ERST_STATUS_RECORD_NOT_FOUND 0x05\r
2353\r
2354///\r
2355/// ERST Serialization Instructions\r
2356///\r
2357#define EFI_ACPI_6_5_ERST_READ_REGISTER 0x00\r
2358#define EFI_ACPI_6_5_ERST_READ_REGISTER_VALUE 0x01\r
2359#define EFI_ACPI_6_5_ERST_WRITE_REGISTER 0x02\r
2360#define EFI_ACPI_6_5_ERST_WRITE_REGISTER_VALUE 0x03\r
2361#define EFI_ACPI_6_5_ERST_NOOP 0x04\r
2362#define EFI_ACPI_6_5_ERST_LOAD_VAR1 0x05\r
2363#define EFI_ACPI_6_5_ERST_LOAD_VAR2 0x06\r
2364#define EFI_ACPI_6_5_ERST_STORE_VAR1 0x07\r
2365#define EFI_ACPI_6_5_ERST_ADD 0x08\r
2366#define EFI_ACPI_6_5_ERST_SUBTRACT 0x09\r
2367#define EFI_ACPI_6_5_ERST_ADD_VALUE 0x0A\r
2368#define EFI_ACPI_6_5_ERST_SUBTRACT_VALUE 0x0B\r
2369#define EFI_ACPI_6_5_ERST_STALL 0x0C\r
2370#define EFI_ACPI_6_5_ERST_STALL_WHILE_TRUE 0x0D\r
2371#define EFI_ACPI_6_5_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE 0x0E\r
2372#define EFI_ACPI_6_5_ERST_GOTO 0x0F\r
2373#define EFI_ACPI_6_5_ERST_SET_SRC_ADDRESS_BASE 0x10\r
2374#define EFI_ACPI_6_5_ERST_SET_DST_ADDRESS_BASE 0x11\r
2375#define EFI_ACPI_6_5_ERST_MOVE_DATA 0x12\r
2376\r
2377///\r
2378/// ERST Instruction Flags\r
2379///\r
2380#define EFI_ACPI_6_5_ERST_PRESERVE_REGISTER 0x01\r
2381\r
2382///\r
2383/// ERST Serialization Instruction Entry\r
2384///\r
2385typedef struct {\r
2386 UINT8 SerializationAction;\r
2387 UINT8 Instruction;\r
2388 UINT8 Flags;\r
2389 UINT8 Reserved0;\r
2390 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2391 UINT64 Value;\r
2392 UINT64 Mask;\r
2393} EFI_ACPI_6_5_ERST_SERIALIZATION_INSTRUCTION_ENTRY;\r
2394\r
2395///\r
2396/// EINJ - Error Injection Table\r
2397///\r
2398typedef struct {\r
2399 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2400 UINT32 InjectionHeaderSize;\r
2401 UINT8 InjectionFlags;\r
2402 UINT8 Reserved0[3];\r
2403 UINT32 InjectionEntryCount;\r
2404} EFI_ACPI_6_5_ERROR_INJECTION_TABLE_HEADER;\r
2405\r
2406///\r
2407/// EINJ Version (as defined in ACPI 6.5 spec.)\r
2408///\r
2409#define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_REVISION 0x01\r
2410\r
2411///\r
2412/// EINJ Error Injection Actions\r
2413///\r
2414#define EFI_ACPI_6_5_EINJ_BEGIN_INJECTION_OPERATION 0x00\r
2415#define EFI_ACPI_6_5_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE 0x01\r
2416#define EFI_ACPI_6_5_EINJ_SET_ERROR_TYPE 0x02\r
2417#define EFI_ACPI_6_5_EINJ_GET_ERROR_TYPE 0x03\r
2418#define EFI_ACPI_6_5_EINJ_END_OPERATION 0x04\r
2419#define EFI_ACPI_6_5_EINJ_EXECUTE_OPERATION 0x05\r
2420#define EFI_ACPI_6_5_EINJ_CHECK_BUSY_STATUS 0x06\r
2421#define EFI_ACPI_6_5_EINJ_GET_COMMAND_STATUS 0x07\r
2422#define EFI_ACPI_6_5_EINJ_TRIGGER_ERROR 0xFF\r
2423\r
2424///\r
2425/// EINJ Action Command Status\r
2426///\r
2427#define EFI_ACPI_6_5_EINJ_STATUS_SUCCESS 0x00\r
2428#define EFI_ACPI_6_5_EINJ_STATUS_UNKNOWN_FAILURE 0x01\r
2429#define EFI_ACPI_6_5_EINJ_STATUS_INVALID_ACCESS 0x02\r
2430\r
2431///\r
2432/// EINJ Error Type Definition\r
2433///\r
2434#define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_CORRECTABLE (1 << 0)\r
2435#define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL (1 << 1)\r
2436#define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL (1 << 2)\r
2437#define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_CORRECTABLE (1 << 3)\r
2438#define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL (1 << 4)\r
2439#define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL (1 << 5)\r
2440#define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE (1 << 6)\r
2441#define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL (1 << 7)\r
2442#define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL (1 << 8)\r
2443#define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_CORRECTABLE (1 << 9)\r
2444#define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL (1 << 10)\r
2445#define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL (1 << 11)\r
2446\r
2447///\r
2448/// EINJ Injection Instructions\r
2449///\r
2450#define EFI_ACPI_6_5_EINJ_READ_REGISTER 0x00\r
2451#define EFI_ACPI_6_5_EINJ_READ_REGISTER_VALUE 0x01\r
2452#define EFI_ACPI_6_5_EINJ_WRITE_REGISTER 0x02\r
2453#define EFI_ACPI_6_5_EINJ_WRITE_REGISTER_VALUE 0x03\r
2454#define EFI_ACPI_6_5_EINJ_NOOP 0x04\r
2455\r
2456///\r
2457/// EINJ Instruction Flags\r
2458///\r
2459#define EFI_ACPI_6_5_EINJ_PRESERVE_REGISTER 0x01\r
2460\r
2461///\r
2462/// EINJ Injection Instruction Entry\r
2463///\r
2464typedef struct {\r
2465 UINT8 InjectionAction;\r
2466 UINT8 Instruction;\r
2467 UINT8 Flags;\r
2468 UINT8 Reserved0;\r
2469 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE RegisterRegion;\r
2470 UINT64 Value;\r
2471 UINT64 Mask;\r
2472} EFI_ACPI_6_5_EINJ_INJECTION_INSTRUCTION_ENTRY;\r
2473\r
2474///\r
2475/// EINJ Trigger Action Table\r
2476///\r
2477typedef struct {\r
2478 UINT32 HeaderSize;\r
2479 UINT32 Revision;\r
2480 UINT32 TableSize;\r
2481 UINT32 EntryCount;\r
2482} EFI_ACPI_6_5_EINJ_TRIGGER_ACTION_TABLE;\r
2483\r
2484///\r
2485/// Platform Communications Channel Table (PCCT)\r
2486///\r
2487typedef struct {\r
2488 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2489 UINT32 Flags;\r
2490 UINT64 Reserved;\r
2491} EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;\r
2492\r
2493///\r
2494/// PCCT Version (as defined in ACPI 6.5 spec.)\r
2495///\r
2496#define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION 0x02\r
2497\r
2498///\r
2499/// PCCT Global Flags\r
2500///\r
2501#define EFI_ACPI_6_5_PCCT_FLAGS_PLATFORM_INTERRUPT BIT0\r
2502\r
2503//\r
2504// PCCT Subspace type\r
2505//\r
2506#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_GENERIC 0x00\r
2507#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS 0x01\r
2508#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS 0x02\r
2509#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC 0x03\r
2510#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC 0x04\r
2511#define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS 0x05\r
2512\r
2513///\r
2514/// PCC Subspace Structure Header\r
2515///\r
2516typedef struct {\r
2517 UINT8 Type;\r
2518 UINT8 Length;\r
2519} EFI_ACPI_6_5_PCCT_SUBSPACE_HEADER;\r
2520\r
2521///\r
2522/// Generic Communications Subspace Structure\r
2523///\r
2524typedef struct {\r
2525 UINT8 Type;\r
2526 UINT8 Length;\r
2527 UINT8 Reserved[6];\r
2528 UINT64 BaseAddress;\r
2529 UINT64 AddressLength;\r
2530 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2531 UINT64 DoorbellPreserve;\r
2532 UINT64 DoorbellWrite;\r
2533 UINT32 NominalLatency;\r
2534 UINT32 MaximumPeriodicAccessRate;\r
2535 UINT16 MinimumRequestTurnaroundTime;\r
2536} EFI_ACPI_6_5_PCCT_SUBSPACE_GENERIC;\r
2537\r
2538///\r
2539/// Generic Communications Channel Shared Memory Region\r
2540///\r
2541\r
2542typedef struct {\r
2543 UINT8 Command;\r
2544 UINT8 Reserved : 7;\r
2545 UINT8 NotifyOnCompletion : 1;\r
2546} EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;\r
2547\r
2548typedef struct {\r
2549 UINT8 CommandComplete : 1;\r
2550 UINT8 PlatformInterrupt : 1;\r
2551 UINT8 Error : 1;\r
2552 UINT8 PlatformNotification : 1;\r
2553 UINT8 Reserved : 4;\r
2554 UINT8 Reserved1;\r
2555} EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;\r
2556\r
2557typedef struct {\r
2558 UINT32 Signature;\r
2559 EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command;\r
2560 EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status;\r
2561} EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;\r
2562\r
2563#define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY BIT0\r
2564#define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE BIT1\r
2565\r
2566///\r
2567/// Type 1 HW-Reduced Communications Subspace Structure\r
2568///\r
2569typedef struct {\r
2570 UINT8 Type;\r
2571 UINT8 Length;\r
2572 UINT32 PlatformInterrupt;\r
2573 UINT8 PlatformInterruptFlags;\r
2574 UINT8 Reserved;\r
2575 UINT64 BaseAddress;\r
2576 UINT64 AddressLength;\r
2577 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2578 UINT64 DoorbellPreserve;\r
2579 UINT64 DoorbellWrite;\r
2580 UINT32 NominalLatency;\r
2581 UINT32 MaximumPeriodicAccessRate;\r
2582 UINT16 MinimumRequestTurnaroundTime;\r
2583} EFI_ACPI_6_5_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;\r
2584\r
2585///\r
2586/// Type 2 HW-Reduced Communications Subspace Structure\r
2587///\r
2588typedef struct {\r
2589 UINT8 Type;\r
2590 UINT8 Length;\r
2591 UINT32 PlatformInterrupt;\r
2592 UINT8 PlatformInterruptFlags;\r
2593 UINT8 Reserved;\r
2594 UINT64 BaseAddress;\r
2595 UINT64 AddressLength;\r
2596 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2597 UINT64 DoorbellPreserve;\r
2598 UINT64 DoorbellWrite;\r
2599 UINT32 NominalLatency;\r
2600 UINT32 MaximumPeriodicAccessRate;\r
2601 UINT16 MinimumRequestTurnaroundTime;\r
2602 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2603 UINT64 PlatformInterruptAckPreserve;\r
2604 UINT64 PlatformInterruptAckWrite;\r
2605} EFI_ACPI_6_5_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;\r
2606\r
2607///\r
2608/// Type 3 Extended PCC Subspace Structure\r
2609///\r
2610typedef struct {\r
2611 UINT8 Type;\r
2612 UINT8 Length;\r
2613 UINT32 PlatformInterrupt;\r
2614 UINT8 PlatformInterruptFlags;\r
2615 UINT8 Reserved;\r
2616 UINT64 BaseAddress;\r
2617 UINT32 AddressLength;\r
2618 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2619 UINT64 DoorbellPreserve;\r
2620 UINT64 DoorbellWrite;\r
2621 UINT32 NominalLatency;\r
2622 UINT32 MaximumPeriodicAccessRate;\r
2623 UINT32 MinimumRequestTurnaroundTime;\r
2624 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE PlatformInterruptAckRegister;\r
2625 UINT64 PlatformInterruptAckPreserve;\r
2626 UINT64 PlatformInterruptAckSet;\r
2627 UINT8 Reserved1[8];\r
2628 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2629 UINT64 CommandCompleteCheckMask;\r
2630 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteUpdateRegister;\r
2631 UINT64 CommandCompleteUpdatePreserve;\r
2632 UINT64 CommandCompleteUpdateSet;\r
2633 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2634 UINT64 ErrorStatusMask;\r
2635} EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC;\r
2636\r
2637///\r
2638/// Type 4 Extended PCC Subspace Structure\r
2639///\r
2640typedef EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_5_PCCT_SUBSPACE_4_EXTENDED_PCC;\r
2641\r
2642#define EFI_ACPI_6_5_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION BIT0\r
2643\r
2644typedef struct {\r
2645 UINT32 Signature;\r
2646 UINT32 Flags;\r
2647 UINT32 Length;\r
2648 UINT32 Command;\r
2649} EFI_ACPI_6_5_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;\r
2650\r
2651///\r
2652/// Type 5 HW Registers based Communications Subspace Structure\r
2653///\r
2654typedef struct {\r
2655 UINT8 Type;\r
2656 UINT8 Length;\r
2657 UINT16 Version;\r
2658 UINT64 BaseAddress;\r
2659 UINT64 SharedMemoryRangeLength;\r
2660 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE DoorbellRegister;\r
2661 UINT64 DoorbellPreserve;\r
2662 UINT64 DoorbellWrite;\r
2663 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE CommandCompleteCheckRegister;\r
2664 UINT64 CommandCompleteCheckMask;\r
2665 EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE ErrorStatusRegister;\r
2666 UINT64 ErrorStatusMask;\r
2667 UINT32 NominalLatency;\r
2668 UINT32 MinimumRequestTurnaroundTime;\r
2669} EFI_ACPI_6_5_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS;\r
2670\r
2671///\r
2672/// Reduced PCC Subspace Shared Memory Region\r
2673///\r
2674typedef struct {\r
2675 UINT32 Signature;\r
2676 // UINT8 CommunicationSubspace[];\r
2677} EFI_6_5_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION;\r
2678\r
2679///\r
2680/// Platform Debug Trigger Table (PDTT)\r
2681///\r
2682typedef struct {\r
2683 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2684 UINT8 TriggerCount;\r
2685 UINT8 Reserved[3];\r
2686 UINT32 TriggerIdentifierArrayOffset;\r
2687} EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;\r
2688\r
2689///\r
2690/// PDTT Revision (as defined in ACPI 6.5 spec.)\r
2691///\r
2692#define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION 0x00\r
2693\r
2694///\r
2695/// PDTT Platform Communication Channel Identifier Structure\r
2696///\r
2697typedef struct {\r
2698 UINT16 SubChannelIdentifer : 8;\r
2699 UINT16 Runtime : 1;\r
2700 UINT16 WaitForCompletion : 1;\r
2701 UINT16 TriggerOrder : 1;\r
2702 UINT16 Reserved : 5;\r
2703} EFI_ACPI_6_5_PDTT_PCC_IDENTIFIER;\r
2704\r
2705///\r
2706/// PCC Commands Codes used by Platform Debug Trigger Table\r
2707///\r
2708#define EFI_ACPI_6_5_PDTT_PCC_COMMAND_DOORBELL_ONLY 0x00\r
2709#define EFI_ACPI_6_5_PDTT_PCC_COMMAND_VENDOR_SPECIFIC 0x01\r
2710\r
2711///\r
2712/// PDTT Platform Communication Channel\r
2713///\r
2714typedef EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_5_PDTT_PCC;\r
2715\r
2716///\r
2717/// Processor Properties Topology Table (PPTT)\r
2718///\r
2719typedef struct {\r
2720 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2721} EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;\r
2722\r
2723///\r
2724/// PPTT Revision (as defined in ACPI 6.5 spec.)\r
2725///\r
2726#define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION 0x03\r
2727\r
2728///\r
2729/// PPTT types\r
2730///\r
2731#define EFI_ACPI_6_5_PPTT_TYPE_PROCESSOR 0x00\r
2732#define EFI_ACPI_6_5_PPTT_TYPE_CACHE 0x01\r
2733\r
2734///\r
2735/// PPTT Structure Header\r
2736///\r
2737typedef struct {\r
2738 UINT8 Type;\r
2739 UINT8 Length;\r
2740 UINT8 Reserved[2];\r
2741} EFI_ACPI_6_5_PPTT_STRUCTURE_HEADER;\r
2742\r
2743///\r
2744/// For PPTT struct processor flags\r
2745///\r
2746#define EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL 0x0\r
2747#define EFI_ACPI_6_5_PPTT_PACKAGE_PHYSICAL 0x1\r
2748#define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID 0x0\r
2749#define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID 0x1\r
2750#define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD 0x0\r
2751#define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD 0x1\r
2752#define EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF 0x0\r
2753#define EFI_ACPI_6_5_PPTT_NODE_IS_LEAF 0x1\r
2754#define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_NOT_IDENTICAL 0x0\r
2755#define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL 0x1\r
2756\r
2757///\r
2758/// Processor hierarchy node structure flags\r
2759///\r
2760typedef struct {\r
2761 UINT32 PhysicalPackage : 1;\r
2762 UINT32 AcpiProcessorIdValid : 1;\r
2763 UINT32 ProcessorIsAThread : 1;\r
2764 UINT32 NodeIsALeaf : 1;\r
2765 UINT32 IdenticalImplementation : 1;\r
2766 UINT32 Reserved : 27;\r
2767} EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS;\r
2768\r
2769///\r
2770/// Processor hierarchy node structure\r
2771///\r
2772typedef struct {\r
2773 UINT8 Type;\r
2774 UINT8 Length;\r
2775 UINT8 Reserved[2];\r
2776 EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS Flags;\r
2777 UINT32 Parent;\r
2778 UINT32 AcpiProcessorId;\r
2779 UINT32 NumberOfPrivateResources;\r
2780} EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR;\r
2781\r
2782///\r
2783/// For PPTT struct cache flags\r
2784///\r
2785#define EFI_ACPI_6_5_PPTT_CACHE_SIZE_INVALID 0x0\r
2786#define EFI_ACPI_6_5_PPTT_CACHE_SIZE_VALID 0x1\r
2787#define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_INVALID 0x0\r
2788#define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_VALID 0x1\r
2789#define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_INVALID 0x0\r
2790#define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_VALID 0x1\r
2791#define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_INVALID 0x0\r
2792#define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_VALID 0x1\r
2793#define EFI_ACPI_6_5_PPTT_CACHE_TYPE_INVALID 0x0\r
2794#define EFI_ACPI_6_5_PPTT_CACHE_TYPE_VALID 0x1\r
2795#define EFI_ACPI_6_5_PPTT_WRITE_POLICY_INVALID 0x0\r
2796#define EFI_ACPI_6_5_PPTT_WRITE_POLICY_VALID 0x1\r
2797#define EFI_ACPI_6_5_PPTT_LINE_SIZE_INVALID 0x0\r
2798#define EFI_ACPI_6_5_PPTT_LINE_SIZE_VALID 0x1\r
2799#define EFI_ACPI_6_5_PPTT_CACHE_ID_INVALID 0x0\r
2800#define EFI_ACPI_6_5_PPTT_CACHE_ID_VALID 0x1\r
2801\r
2802///\r
2803/// Cache Type Structure flags\r
2804///\r
2805typedef struct {\r
2806 UINT32 SizePropertyValid : 1;\r
2807 UINT32 NumberOfSetsValid : 1;\r
2808 UINT32 AssociativityValid : 1;\r
2809 UINT32 AllocationTypeValid : 1;\r
2810 UINT32 CacheTypeValid : 1;\r
2811 UINT32 WritePolicyValid : 1;\r
2812 UINT32 LineSizeValid : 1;\r
2813 UINT32 CacheIdValid : 1;\r
2814 UINT32 Reserved : 24;\r
2815} EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS;\r
2816\r
2817///\r
2818/// For cache attributes\r
2819///\r
2820#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ 0x0\r
2821#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_WRITE 0x1\r
2822#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE 0x2\r
2823#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_DATA 0x0\r
2824#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION 0x1\r
2825#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED 0x2\r
2826#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK 0x0\r
2827#define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH 0x1\r
2828\r
2829///\r
2830/// Cache Type Structure cache attributes\r
2831///\r
2832typedef struct {\r
2833 UINT8 AllocationType : 2;\r
2834 UINT8 CacheType : 2;\r
2835 UINT8 WritePolicy : 1;\r
2836 UINT8 Reserved : 3;\r
2837} EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES;\r
2838\r
2839///\r
2840/// Cache Type Structure\r
2841///\r
2842typedef struct {\r
2843 UINT8 Type;\r
2844 UINT8 Length;\r
2845 UINT8 Reserved[2];\r
2846 EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS Flags;\r
2847 UINT32 NextLevelOfCache;\r
2848 UINT32 Size;\r
2849 UINT32 NumberOfSets;\r
2850 UINT8 Associativity;\r
2851 EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES Attributes;\r
2852 UINT16 LineSize;\r
2853 UINT32 CacheId;\r
2854} EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE;\r
2855\r
2856///\r
2857/// Platform Health Assessment Table (PHAT) Format\r
2858///\r
2859typedef struct {\r
2860 EFI_ACPI_DESCRIPTION_HEADER Header;\r
2861 // UINT8 PlatformTelemetryRecords[];\r
2862} EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE;\r
2863\r
2864#define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_REVISION 0x01\r
2865\r
2866///\r
2867/// PHAT Record Format\r
2868///\r
2869typedef struct {\r
2870 UINT16 PlatformHealthAssessmentRecordType;\r
2871 UINT16 RecordLength;\r
2872 UINT8 Revision;\r
2873 // UINT8 Data[];\r
2874} EFI_ACPI_6_5_PHAT_RECORD;\r
2875\r
2876///\r
2877/// PHAT Record Type Format\r
2878///\r
2879#define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_VERSION_DATA_RECORD 0x0000\r
2880#define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_HEALTH_DATA_RECORD 0x0001\r
2881\r
2882///\r
2883/// PHAT Version Element\r
2884///\r
2885typedef struct {\r
2886 GUID ComponentId;\r
2887 UINT64 VersionValue;\r
2888 UINT32 ProducerId;\r
2889} EFI_ACPI_6_5_PHAT_VERSION_ELEMENT;\r
2890\r
2891///\r
2892/// PHAT Firmware Version Data Record\r
2893///\r
2894typedef struct {\r
2895 UINT16 PlatformRecordType;\r
2896 UINT16 RecordLength;\r
2897 UINT8 Revision;\r
2898 UINT8 Reserved[3];\r
2899 UINT32 RecordCount;\r
2900 // UINT8 PhatVersionElement[];\r
2901} EFI_ACPI_6_5_PHAT_FIRMWARE_VERISON_DATA_RECORD;\r
2902\r
2903#define EFI_ACPI_6_5_PHAT_FIRMWARE_VERSION_DATA_RECORD_REVISION 0x01\r
2904\r
2905///\r
2906/// Firmware Health Data Record Structure\r
2907///\r
2908typedef struct {\r
2909 UINT16 PlatformRecordType;\r
2910 UINT16 RecordLength;\r
2911 UINT8 Revision;\r
2912 UINT16 Reserved;\r
2913 UINT8 AmHealthy;\r
2914 GUID DeviceSignature;\r
2915 UINT32 DeviceSpecificDataOffset;\r
2916 // UINT8 DevicePath[];\r
2917 // UINT8 DeviceSpecificData[];\r
2918} EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_STRUCTURE;\r
2919\r
2920#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_REVISION 0x01\r
2921\r
2922///\r
2923/// Firmware Health Data Record device health state\r
2924///\r
2925#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ERRORS_FOUND 0x00\r
2926#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_NO_ERRORS_FOUND 0x01\r
2927#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN 0x02\r
2928#define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY 0x03\r
2929\r
2930//\r
2931// Known table signatures\r
2932//\r
2933\r
2934///\r
2935/// "RSD PTR " Root System Description Pointer\r
2936///\r
2937#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')\r
2938\r
2939///\r
2940/// "APIC" Multiple APIC Description Table\r
2941///\r
2942#define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'I', 'C')\r
2943\r
2944///\r
2945/// "APMT" Arm Performance Monitoring Unit Table\r
2946///\r
2947#define EFI_ACPI_6_5_ARM_PERFORMANCE_MONITORING_UNIT_TABLE_SIGNATURE SIGNATURE_32('A', 'P', 'M', 'T')\r
2948\r
2949///\r
2950/// "BERT" Boot Error Record Table\r
2951///\r
2952#define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_SIGNATURE SIGNATURE_32('B', 'E', 'R', 'T')\r
2953\r
2954///\r
2955/// "BGRT" Boot Graphics Resource Table\r
2956///\r
2957#define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('B', 'G', 'R', 'T')\r
2958\r
2959///\r
2960/// "CDIT" Component Distance Information Table\r
2961///\r
2962#define EFI_ACPI_6_5_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('C', 'D', 'I', 'T')\r
2963\r
2964///\r
2965/// "CPEP" Corrected Platform Error Polling Table\r
2966///\r
2967#define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE SIGNATURE_32('C', 'P', 'E', 'P')\r
2968\r
2969///\r
2970/// "CRAT" Component Resource Attribute Table\r
2971///\r
2972#define EFI_ACPI_6_5_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('C', 'R', 'A', 'T')\r
2973\r
2974///\r
2975/// "DSDT" Differentiated System Description Table\r
2976///\r
2977#define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('D', 'S', 'D', 'T')\r
2978\r
2979///\r
2980/// "ECDT" Embedded Controller Boot Resources Table\r
2981///\r
2982#define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE SIGNATURE_32('E', 'C', 'D', 'T')\r
2983\r
2984///\r
2985/// "EINJ" Error Injection Table\r
2986///\r
2987#define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_SIGNATURE SIGNATURE_32('E', 'I', 'N', 'J')\r
2988\r
2989///\r
2990/// "ERST" Error Record Serialization Table\r
2991///\r
2992#define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE SIGNATURE_32('E', 'R', 'S', 'T')\r
2993\r
2994///\r
2995/// "FACP" Fixed ACPI Description Table\r
2996///\r
2997#define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'P')\r
2998\r
2999///\r
3000/// "FACS" Firmware ACPI Control Structure\r
3001///\r
3002#define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE SIGNATURE_32('F', 'A', 'C', 'S')\r
3003\r
3004///\r
3005/// "FPDT" Firmware Performance Data Table\r
3006///\r
3007#define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE SIGNATURE_32('F', 'P', 'D', 'T')\r
3008\r
3009///\r
3010/// "GTDT" Generic Timer Description Table\r
3011///\r
3012#define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('G', 'T', 'D', 'T')\r
3013\r
3014///\r
3015/// "HEST" Hardware Error Source Table\r
3016///\r
3017#define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE SIGNATURE_32('H', 'E', 'S', 'T')\r
3018\r
3019///\r
3020/// "HMAT" Heterogeneous Memory Attribute Table\r
3021///\r
3022#define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE SIGNATURE_32('H', 'M', 'A', 'T')\r
3023\r
3024///\r
3025/// "MPST" Memory Power State Table\r
3026///\r
3027#define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_SIGNATURE SIGNATURE_32('M', 'P', 'S', 'T')\r
3028\r
3029///\r
3030/// "MSCT" Maximum System Characteristics Table\r
3031///\r
3032#define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'C', 'T')\r
3033\r
3034///\r
3035/// "NFIT" NVDIMM Firmware Interface Table\r
3036///\r
3037#define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('N', 'F', 'I', 'T')\r
3038\r
3039///\r
3040/// "PDTT" Platform Debug Trigger Table\r
3041///\r
3042#define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'D', 'T', 'T')\r
3043\r
3044///\r
3045/// "PMTT" Platform Memory Topology Table\r
3046///\r
3047#define EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE SIGNATURE_32('P', 'M', 'T', 'T')\r
3048\r
3049///\r
3050/// "PPTT" Processor Properties Topology Table\r
3051///\r
3052#define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('P', 'P', 'T', 'T')\r
3053\r
3054///\r
3055/// "PSDT" Persistent System Description Table\r
3056///\r
3057#define EFI_ACPI_6_5_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('P', 'S', 'D', 'T')\r
3058\r
3059///\r
3060/// "RASF" ACPI RAS Feature Table\r
3061///\r
3062#define EFI_ACPI_6_5_ACPI_RAS_FEATURE_TABLE_SIGNATURE SIGNATURE_32('R', 'A', 'S', 'F')\r
3063\r
3064///\r
3065/// "RSDT" Root System Description Table\r
3066///\r
3067#define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('R', 'S', 'D', 'T')\r
3068\r
3069///\r
3070/// "SBST" Smart Battery Specification Table\r
3071///\r
3072#define EFI_ACPI_6_5_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE SIGNATURE_32('S', 'B', 'S', 'T')\r
3073\r
3074///\r
3075/// "SDEV" Secure DEVices Table\r
3076///\r
3077#define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'V')\r
3078\r
3079///\r
3080/// "SLIT" System Locality Information Table\r
3081///\r
3082#define EFI_ACPI_6_5_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
3083\r
3084///\r
3085/// "SRAT" System Resource Affinity Table\r
3086///\r
3087#define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE SIGNATURE_32('S', 'R', 'A', 'T')\r
3088\r
3089///\r
3090/// "SSDT" Secondary System Description Table\r
3091///\r
3092#define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('S', 'S', 'D', 'T')\r
3093\r
3094///\r
3095/// "XSDT" Extended System Description Table\r
3096///\r
3097#define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
3098\r
3099///\r
3100/// "BOOT" MS Simple Boot Spec\r
3101///\r
3102#define EFI_ACPI_6_5_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE SIGNATURE_32('B', 'O', 'O', 'T')\r
3103\r
3104///\r
3105/// "CSRT" MS Core System Resource Table\r
3106///\r
3107#define EFI_ACPI_6_5_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('C', 'S', 'R', 'T')\r
3108\r
3109///\r
3110/// "DBG2" MS Debug Port 2 Spec\r
3111///\r
3112#define EFI_ACPI_6_5_DEBUG_PORT_2_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', '2')\r
3113\r
3114///\r
3115/// "DBGP" MS Debug Port Spec\r
3116///\r
3117#define EFI_ACPI_6_5_DEBUG_PORT_TABLE_SIGNATURE SIGNATURE_32('D', 'B', 'G', 'P')\r
3118\r
3119///\r
3120/// "DMAR" DMA Remapping Table\r
3121///\r
3122#define EFI_ACPI_6_5_DMA_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('D', 'M', 'A', 'R')\r
3123\r
3124///\r
3125/// "DRTM" Dynamic Root of Trust for Measurement Table\r
3126///\r
3127#define EFI_ACPI_6_5_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE SIGNATURE_32('D', 'R', 'T', 'M')\r
3128\r
3129///\r
3130/// "ETDT" Event Timer Description Table\r
3131///\r
3132#define EFI_ACPI_6_5_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('E', 'T', 'D', 'T')\r
3133\r
3134///\r
3135/// "HPET" IA-PC High Precision Event Timer Table\r
3136///\r
3137#define EFI_ACPI_6_5_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE SIGNATURE_32('H', 'P', 'E', 'T')\r
3138\r
3139///\r
3140/// "iBFT" iSCSI Boot Firmware Table\r
3141///\r
3142#define EFI_ACPI_6_5_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE SIGNATURE_32('i', 'B', 'F', 'T')\r
3143\r
3144///\r
3145/// "IORT" I/O Remapping Table\r
3146///\r
3147#define EFI_ACPI_6_5_IO_REMAPPING_TABLE_SIGNATURE SIGNATURE_32('I', 'O', 'R', 'T')\r
3148\r
3149///\r
3150/// "IVRS" I/O Virtualization Reporting Structure\r
3151///\r
3152#define EFI_ACPI_6_5_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE SIGNATURE_32('I', 'V', 'R', 'S')\r
3153\r
3154///\r
3155/// "LPIT" Low Power Idle Table\r
3156///\r
3157#define EFI_ACPI_6_5_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE SIGNATURE_32('L', 'P', 'I', 'T')\r
3158\r
3159///\r
3160/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
3161///\r
3162#define EFI_ACPI_6_5_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
3163\r
3164///\r
3165/// "MCHI" Management Controller Host Interface Table\r
3166///\r
3167#define EFI_ACPI_6_5_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'H', 'I')\r
3168\r
3169///\r
3170/// "MSDM" MS Data Management Table\r
3171///\r
3172#define EFI_ACPI_6_5_DATA_MANAGEMENT_TABLE_SIGNATURE SIGNATURE_32('M', 'S', 'D', 'M')\r
3173\r
3174///\r
3175/// "PCCT" Platform Communications Channel Table\r
3176///\r
3177#define EFI_ACPI_6_5_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE SIGNATURE_32('P', 'C', 'C', 'T')\r
3178\r
3179///\r
3180/// "PHAT" Platform Health Assessment Table\r
3181///\r
3182#define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE SIGNATURE_32('P', 'H', 'A', 'T')\r
3183\r
3184///\r
3185/// "SDEI" Software Delegated Exceptions Interface Table\r
3186///\r
3187#define EFI_ACPI_6_5_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'D', 'E', 'I')\r
3188\r
3189///\r
3190/// "SLIC" MS Software Licensing Table Specification\r
3191///\r
3192#define EFI_ACPI_6_5_SOFTWARE_LICENSING_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'C')\r
3193\r
3194///\r
3195/// "SPCR" Serial Port Concole Redirection Table\r
3196///\r
3197#define EFI_ACPI_6_5_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
3198\r
3199///\r
3200/// "SPMI" Server Platform Management Interface Table\r
3201///\r
3202#define EFI_ACPI_6_5_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'M', 'I')\r
3203\r
3204///\r
3205/// "STAO" _STA Override Table\r
3206///\r
3207#define EFI_ACPI_6_5_STA_OVERRIDE_TABLE_SIGNATURE SIGNATURE_32('S', 'T', 'A', 'O')\r
3208\r
3209///\r
3210/// "TCPA" Trusted Computing Platform Alliance Capabilities Table\r
3211///\r
3212#define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE SIGNATURE_32('T', 'C', 'P', 'A')\r
3213\r
3214///\r
3215/// "TPM2" Trusted Computing Platform 1 Table\r
3216///\r
3217#define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE SIGNATURE_32('T', 'P', 'M', '2')\r
3218\r
3219///\r
3220/// "UEFI" UEFI ACPI Data Table\r
3221///\r
3222#define EFI_ACPI_6_5_UEFI_ACPI_DATA_TABLE_SIGNATURE SIGNATURE_32('U', 'E', 'F', 'I')\r
3223\r
3224///\r
3225/// "WAET" Windows ACPI Emulated Devices Table\r
3226///\r
3227#define EFI_ACPI_6_5_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE SIGNATURE_32('W', 'A', 'E', 'T')\r
3228\r
3229///\r
3230/// "WDAT" Watchdog Action Table\r
3231///\r
3232#define EFI_ACPI_6_5_WATCHDOG_ACTION_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'A', 'T')\r
3233\r
3234///\r
3235/// "WDRT" Watchdog Resource Table\r
3236///\r
3237#define EFI_ACPI_6_5_WATCHDOG_RESOURCE_TABLE_SIGNATURE SIGNATURE_32('W', 'D', 'R', 'T')\r
3238\r
3239///\r
3240/// "WPBT" MS Platform Binary Table\r
3241///\r
3242#define EFI_ACPI_6_5_PLATFORM_BINARY_TABLE_SIGNATURE SIGNATURE_32('W', 'P', 'B', 'T')\r
3243\r
3244///\r
3245/// "WSMT" Windows SMM Security Mitigation Table\r
3246///\r
3247#define EFI_ACPI_6_5_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE SIGNATURE_32('W', 'S', 'M', 'T')\r
3248\r
3249///\r
3250/// "XENV" Xen Project Table\r
3251///\r
3252#define EFI_ACPI_6_5_XEN_PROJECT_TABLE_SIGNATURE SIGNATURE_32('X', 'E', 'N', 'V')\r
3253\r
3254#pragma pack()\r
3255\r
3256#endif\r
EFI Development Kit II mirror for PVE