8bdadcc8 |
1 | /** @file\r |
37640ed3 |
2 | This file contains just some basic definitions that are needed by drivers\r |
3 | that dealing with ATA/ATAPI interface.\r |
8bdadcc8 |
4 | \r |
4777d7fc |
5 | Copyright (c) 2007 - 2010, Intel Corporation\r |
8bdadcc8 |
6 | All rights reserved. This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r |
8 | which accompanies this distribution. The full text of the license may be found at\r |
9 | http://opensource.org/licenses/bsd-license.php\r |
10 | \r |
11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
13 | \r |
14 | **/\r |
15 | \r |
42eedea9 |
16 | #ifndef _ATAPI_H_\r |
17 | #define _ATAPI_H_\r |
8bdadcc8 |
18 | \r |
766f4bc1 |
19 | #pragma pack(1)\r |
20 | \r |
81dac930 |
21 | ///\r |
4777d7fc |
22 | /// ATA5_IDENTIFY_DATA is defined in ATA-5\r |
23 | /// (This structure is provided here mainly for backward-compatibility support.\r |
24 | /// Old drivers may reference some field that is marked "obsolete" in \r |
25 | /// ATA_IDENTIFY_DATA, which current conforms to ATA-8) \r |
81dac930 |
26 | ///\r |
27 | typedef struct { \r |
28 | UINT16 config; ///< General Configuration \r |
29 | UINT16 cylinders; ///< Number of Cylinders \r |
30 | UINT16 reserved_2; \r |
31 | UINT16 heads; ///< Number of logical heads \r |
32 | UINT16 vendor_data1; \r |
33 | UINT16 vendor_data2; \r |
34 | UINT16 sectors_per_track; \r |
35 | UINT16 vendor_specific_7_9[3]; \r |
36 | CHAR8 SerialNo[20]; ///< ASCII \r |
37 | UINT16 vendor_specific_20_21[2]; \r |
38 | UINT16 ecc_bytes_available; \r |
39 | CHAR8 FirmwareVer[8]; ///< ASCII \r |
40 | CHAR8 ModelName[40]; ///< ASCII \r |
41 | UINT16 multi_sector_cmd_max_sct_cnt; \r |
42 | UINT16 reserved_48; \r |
43 | UINT16 capabilities; \r |
44 | UINT16 reserved_50; \r |
45 | UINT16 pio_cycle_timing; \r |
46 | UINT16 reserved_52; \r |
47 | UINT16 field_validity; \r |
48 | UINT16 current_cylinders; \r |
49 | UINT16 current_heads; \r |
50 | UINT16 current_sectors; \r |
51 | UINT16 CurrentCapacityLsb; \r |
52 | UINT16 CurrentCapacityMsb; \r |
53 | UINT16 reserved_59; \r |
54 | UINT16 user_addressable_sectors_lo; \r |
55 | UINT16 user_addressable_sectors_hi; \r |
56 | UINT16 reserved_62; \r |
57 | UINT16 multi_word_dma_mode; \r |
58 | UINT16 advanced_pio_modes; \r |
59 | UINT16 min_multi_word_dma_cycle_time; \r |
60 | UINT16 rec_multi_word_dma_cycle_time; \r |
61 | UINT16 min_pio_cycle_time_without_flow_control; \r |
62 | UINT16 min_pio_cycle_time_with_flow_control; \r |
63 | UINT16 reserved_69_79[11]; \r |
64 | UINT16 major_version_no; \r |
65 | UINT16 minor_version_no; \r |
66 | UINT16 command_set_supported_82; ///< word 82 \r |
67 | UINT16 command_set_supported_83; ///< word 83 \r |
68 | UINT16 command_set_feature_extn; ///< word 84 \r |
69 | UINT16 command_set_feature_enb_85; ///< word 85 \r |
70 | UINT16 command_set_feature_enb_86; ///< word 86 \r |
71 | UINT16 command_set_feature_default; ///< word 87 \r |
72 | UINT16 ultra_dma_mode; ///< word 88 \r |
73 | UINT16 reserved_89_127[39]; \r |
74 | UINT16 security_status; \r |
75 | UINT16 vendor_data_129_159[31]; \r |
76 | UINT16 reserved_160_255[96]; \r |
4777d7fc |
77 | } ATA5_IDENTIFY_DATA;\r |
78 | \r |
79 | ///\r |
80 | /// ATA_IDENTIFY_DATA is strictly complied with ATA/ATAPI-8 Spec\r |
81 | /// to define the data returned by an ATA device upon successful\r |
82 | /// completion of the ATA IDENTIFY_DEVICE command\r |
83 | ///\r |
84 | typedef struct {\r |
85 | UINT16 config; ///< General Configuration\r |
86 | UINT16 obsolete_1;\r |
87 | UINT16 specific_config; ///< Specific Configuration\r |
88 | UINT16 obsolete_3;\r |
89 | UINT16 retired_4_5[2]; \r |
90 | UINT16 obsolete_6;\r |
91 | UINT16 cfa_reserved_7_8[2];\r |
92 | UINT16 retired_9; \r |
93 | CHAR8 SerialNo[20]; ///< word 10~19\r |
94 | UINT16 retired_20_21[2]; \r |
95 | UINT16 obsolete_22; \r |
96 | CHAR8 FirmwareVer[8]; ///< word 23~26\r |
97 | CHAR8 ModelName[40]; ///< word 27~46\r |
98 | UINT16 multi_sector_cmd_max_sct_cnt;\r |
99 | UINT16 trusted_computing_support; \r |
100 | UINT16 capabilities_49;\r |
101 | UINT16 capabilities_50;\r |
102 | UINT16 obsolete_51_52[2]; \r |
103 | UINT16 field_validity; \r |
104 | UINT16 obsolete_54_58[5]; \r |
105 | UINT16 multi_sector_setting; \r |
106 | UINT16 user_addressable_sectors_lo; \r |
107 | UINT16 user_addressable_sectors_hi; \r |
108 | UINT16 obsolete_62; \r |
109 | UINT16 multi_word_dma_mode; \r |
110 | UINT16 advanced_pio_modes; \r |
111 | UINT16 min_multi_word_dma_cycle_time; \r |
112 | UINT16 rec_multi_word_dma_cycle_time; \r |
113 | UINT16 min_pio_cycle_time_without_flow_control; \r |
114 | UINT16 min_pio_cycle_time_with_flow_control; \r |
115 | UINT16 reserved_69_74[6]; \r |
116 | UINT16 queue_depth; \r |
117 | UINT16 reserved_76_79[4]; ///< reserved for Serial ATA\r |
118 | UINT16 major_version_no; \r |
119 | UINT16 minor_version_no; \r |
120 | UINT16 command_set_supported_82; ///< word 82\r |
121 | UINT16 command_set_supported_83; ///< word 83\r |
122 | UINT16 command_set_feature_extn; ///< word 84\r |
123 | UINT16 command_set_feature_enb_85; ///< word 85\r |
124 | UINT16 command_set_feature_enb_86; ///< word 86\r |
125 | UINT16 command_set_feature_default; ///< word 87\r |
126 | UINT16 ultra_dma_mode; ///< word 88 \r |
127 | UINT16 time_for_security_erase_unit; \r |
128 | UINT16 time_for_enhanced_security_erase_unit;\r |
129 | UINT16 advanced_power_management_level;\r |
130 | UINT16 master_password_identifier;\r |
131 | UINT16 hardware_configuration_test_result;\r |
132 | UINT16 acoustic_management_value;\r |
133 | UINT16 stream_minimum_request_size;\r |
134 | UINT16 streaming_transfer_time_for_dma;\r |
135 | UINT16 streaming_access_latency_for_dma_and_pio;\r |
136 | UINT16 streaming_performance_granularity[2]; ///< word 98~99\r |
137 | UINT16 maximum_lba_for_48bit_addressing[4]; ///< word 100~103\r |
138 | UINT16 streaming_transfer_time_for_pio;\r |
139 | UINT16 reserved_105;\r |
140 | UINT16 phy_logic_sector_support; ///< word 106\r |
141 | UINT16 interseek_delay_for_iso7779;\r |
142 | UINT16 world_wide_name[4]; ///< word 108~111\r |
143 | UINT16 reserved_for_128bit_wwn_112_115[4];\r |
144 | UINT16 reserved_for_technical_report;\r |
145 | UINT16 logic_sector_size_lo; ///< word 117\r |
146 | UINT16 logic_sector_size_hi; ///< word 118\r |
147 | UINT16 features_and_command_sets_supported_ext; ///< word 119\r |
148 | UINT16 features_and_command_sets_enabled_ext; ///< word 120\r |
149 | UINT16 reserved_121_126[8];\r |
150 | UINT16 obsolete_127;\r |
151 | UINT16 security_status; ///< word 128\r |
152 | UINT16 vendor_specific_129_159[31]; \r |
153 | UINT16 cfa_power_mode; ///< word 160\r |
154 | UINT16 reserved_for_compactflash_161_175[15];\r |
155 | CHAR8 media_serial_number[60]; ///< word 176~205\r |
156 | UINT16 sct_command_transport; ///< word 206\r |
157 | UINT16 reserved_207_208[2];\r |
158 | UINT16 alignment_logic_in_phy_blocks; ///< word 209\r |
159 | UINT16 write_read_verify_sector_count_mode3[2]; ///< word 210~211\r |
160 | UINT16 verify_sector_count_mode2[2];\r |
161 | UINT16 nv_cache_capabilities;\r |
162 | UINT16 nv_cache_size_in_logical_block_lsw; ///< word 215\r |
163 | UINT16 nv_cache_size_in_logical_block_msw; ///< word 216\r |
164 | UINT16 nv_cache_read_speed;\r |
165 | UINT16 nv_cache_write_speed;\r |
166 | UINT16 nv_cache_options; ///< word 219\r |
167 | UINT16 write_read_verify_mode; ///< word 220\r |
168 | UINT16 reserved_221;\r |
169 | UINT16 transport_major_revision_number;\r |
170 | UINT16 transport_minor_revision_number;\r |
171 | UINT16 reserved_224_233[10];\r |
172 | UINT16 min_number_per_download_microcode_mode3; ///< word 234\r |
173 | UINT16 max_number_per_download_microcode_mode3; ///< word 235\r |
174 | UINT16 reserved_236_254[19];\r |
175 | UINT16 integrity_word;\r |
81dac930 |
176 | } ATA_IDENTIFY_DATA;\r |
177 | \r |
1bc5d021 |
178 | ///\r |
4777d7fc |
179 | /// ATAPI_IDENTIFY_DATA is strictly complied with ATA/ATAPI-8 Spec\r |
180 | /// to define the data returned by an ATAPI device upon successful\r |
181 | /// completion of the ATA IDENTIFY_PACKET_DEVICE command\r |
1bc5d021 |
182 | ///\r |
8bdadcc8 |
183 | typedef struct {\r |
4777d7fc |
184 | UINT16 config; ///< General Configuration\r |
185 | UINT16 reserved_1;\r |
186 | UINT16 specific_config; ///< Specific Configuration\r |
187 | UINT16 reserved_3_9[7];\r |
188 | CHAR8 SerialNo[20]; ///< word 10~19\r |
189 | UINT16 reserved_20_22[3];\r |
190 | CHAR8 FirmwareVer[8]; ///< word 23~26\r |
191 | CHAR8 ModelName[40]; ///< word 27~46\r |
192 | UINT16 reserved_47_48[2];\r |
193 | UINT16 capabilities_49;\r |
194 | UINT16 capabilities_50;\r |
195 | UINT16 obsolete_51;\r |
196 | UINT16 reserved_52;\r |
197 | UINT16 field_validity; ///< word 53\r |
198 | UINT16 reserved_54_61[8];\r |
199 | UINT16 dma_dir;\r |
200 | UINT16 multi_word_dma_mode; ///< word 63\r |
201 | UINT16 advanced_pio_modes; ///< word 64\r |
202 | UINT16 min_multi_word_dma_cycle_time;\r |
203 | UINT16 rec_multi_word_dma_cycle_time;\r |
204 | UINT16 min_pio_cycle_time_without_flow_control;\r |
205 | UINT16 min_pio_cycle_time_with_flow_control;\r |
206 | UINT16 reserved_69_70[2];\r |
207 | UINT16 obsolete_71_72[2];\r |
208 | UINT16 reserved_73_74[2];\r |
209 | UINT16 queue_depth;\r |
210 | UINT16 reserved_76_79[4];\r |
211 | UINT16 major_version_no; ///< word 80\r |
212 | UINT16 minor_version_no; ///< word 81\r |
213 | UINT16 cmd_set_support_82;\r |
214 | UINT16 cmd_set_support_83;\r |
215 | UINT16 cmd_feature_support;\r |
216 | UINT16 cmd_feature_enable_85;\r |
217 | UINT16 cmd_feature_enable_86;\r |
218 | UINT16 cmd_feature_default;\r |
219 | UINT16 ultra_dma_select;\r |
220 | UINT16 time_required_for_sec_erase; ///< word 89\r |
221 | UINT16 time_required_for_enhanced_sec_erase; ///< word 90\r |
222 | UINT16 reserved_91;\r |
223 | UINT16 master_pwd_revison_code;\r |
224 | UINT16 hardware_reset_result; ///< word 93\r |
225 | UINT16 current_auto_acoustic_mgmt_value;\r |
226 | UINT16 reserved_95_107[13];\r |
227 | UINT16 world_wide_name[4]; ///< word 108~111\r |
228 | UINT16 reserved_for_128bit_wwn_112_115[4];\r |
229 | UINT16 reserved_116_124[9];\r |
230 | UINT16 atapi_byte_count_0_behavior; ///< word 125\r |
231 | UINT16 obsolete_126;\r |
232 | UINT16 removable_media_status_notification_support;\r |
233 | UINT16 security_status;\r |
234 | UINT16 reserved_129_160[32];\r |
235 | UINT16 cfa_reserved_161_175[15];\r |
236 | UINT16 reserved_176_254[79];\r |
237 | UINT16 integrity_word;\r |
8bdadcc8 |
238 | } ATAPI_IDENTIFY_DATA;\r |
239 | \r |
4777d7fc |
240 | \r |
37640ed3 |
241 | ///\r |
53bbea41 |
242 | /// Standard Quiry Data format, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
243 | ///\r |
8bdadcc8 |
244 | typedef struct {\r |
245 | UINT8 peripheral_type;\r |
246 | UINT8 RMB;\r |
247 | UINT8 version;\r |
248 | UINT8 response_data_format;\r |
53bbea41 |
249 | UINT8 addnl_length; ///< n - 4, Numbers of bytes following this one\r |
8bdadcc8 |
250 | UINT8 reserved_5;\r |
251 | UINT8 reserved_6;\r |
252 | UINT8 reserved_7;\r |
253 | UINT8 vendor_info[8];\r |
254 | UINT8 product_id[16];\r |
255 | UINT8 product_revision_level[4];\r |
37640ed3 |
256 | UINT8 vendor_specific_36_55[55 - 36 + 1];\r |
257 | UINT8 reserved_56_95[95 - 56 + 1];\r |
258 | ///\r |
53bbea41 |
259 | /// Vendor specific parameters fields, the sizeof (ATAPI_INQUIRY_DATA) is 254\r |
37640ed3 |
260 | /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r |
261 | ///\r |
53bbea41 |
262 | UINT8 vendor_specific_96_253[253 - 96 + 1];\r |
37640ed3 |
263 | } ATAPI_INQUIRY_DATA;\r |
264 | \r |
db835e01 |
265 | ///\r |
266 | /// Request Sense Standard Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
267 | ///\r |
8bdadcc8 |
268 | typedef struct {\r |
269 | UINT8 error_code : 7;\r |
270 | UINT8 valid : 1;\r |
271 | UINT8 reserved_1;\r |
272 | UINT8 sense_key : 4;\r |
37640ed3 |
273 | UINT8 reserved_2 : 1;\r |
274 | UINT8 Vendor_specifc_1 : 3;\r |
8bdadcc8 |
275 | UINT8 vendor_specific_3;\r |
276 | UINT8 vendor_specific_4;\r |
277 | UINT8 vendor_specific_5;\r |
278 | UINT8 vendor_specific_6;\r |
37640ed3 |
279 | UINT8 addnl_sense_length; ///< n - 7\r |
8bdadcc8 |
280 | UINT8 vendor_specific_8;\r |
281 | UINT8 vendor_specific_9;\r |
282 | UINT8 vendor_specific_10;\r |
283 | UINT8 vendor_specific_11;\r |
37640ed3 |
284 | UINT8 addnl_sense_code; ///< mandatory\r |
285 | UINT8 addnl_sense_code_qualifier; ///< mandatory\r |
286 | UINT8 field_replaceable_unit_code; ///< optional\r |
287 | UINT8 sense_key_specific_15 : 7;\r |
288 | UINT8 SKSV : 1;\r |
289 | UINT8 sense_key_specific_16;\r |
290 | UINT8 sense_key_specific_17;\r |
8bdadcc8 |
291 | } ATAPI_REQUEST_SENSE_DATA;\r |
292 | \r |
db835e01 |
293 | ///\r |
427987f5 |
294 | /// READ CAPACITY Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
295 | ///\r |
8bdadcc8 |
296 | typedef struct {\r |
297 | UINT8 LastLba3;\r |
298 | UINT8 LastLba2;\r |
299 | UINT8 LastLba1;\r |
300 | UINT8 LastLba0;\r |
301 | UINT8 BlockSize3;\r |
302 | UINT8 BlockSize2;\r |
303 | UINT8 BlockSize1;\r |
304 | UINT8 BlockSize0;\r |
305 | } ATAPI_READ_CAPACITY_DATA;\r |
306 | \r |
37640ed3 |
307 | ///\r |
db835e01 |
308 | /// Capacity List Header + Current/Maximum Capacity Descriptor,\r |
427987f5 |
309 | /// defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
310 | ///\r |
8bdadcc8 |
311 | typedef struct {\r |
312 | UINT8 reserved_0;\r |
313 | UINT8 reserved_1;\r |
314 | UINT8 reserved_2;\r |
315 | UINT8 Capacity_Length;\r |
316 | UINT8 LastLba3;\r |
317 | UINT8 LastLba2;\r |
318 | UINT8 LastLba1;\r |
319 | UINT8 LastLba0;\r |
320 | UINT8 DesCode : 2;\r |
321 | UINT8 reserved_9 : 6;\r |
322 | UINT8 BlockSize2;\r |
323 | UINT8 BlockSize1;\r |
324 | UINT8 BlockSize0;\r |
325 | } ATAPI_READ_FORMAT_CAPACITY_DATA;\r |
326 | \r |
37640ed3 |
327 | ///\r |
427987f5 |
328 | /// Test Unit Ready Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
329 | ///\r |
8bdadcc8 |
330 | typedef struct {\r |
331 | UINT8 opcode;\r |
332 | UINT8 reserved_1;\r |
333 | UINT8 reserved_2;\r |
334 | UINT8 reserved_3;\r |
335 | UINT8 reserved_4;\r |
336 | UINT8 reserved_5;\r |
337 | UINT8 reserved_6;\r |
338 | UINT8 reserved_7;\r |
339 | UINT8 reserved_8;\r |
340 | UINT8 reserved_9;\r |
341 | UINT8 reserved_10;\r |
342 | UINT8 reserved_11;\r |
343 | } ATAPI_TEST_UNIT_READY_CMD;\r |
344 | \r |
37640ed3 |
345 | ///\r |
427987f5 |
346 | /// INQUIRY Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
347 | ///\r |
8bdadcc8 |
348 | typedef struct {\r |
349 | UINT8 opcode;\r |
37640ed3 |
350 | UINT8 reserved_1 : 5;\r |
351 | UINT8 lun : 3;\r |
352 | UINT8 page_code; ///< defined in SFF8090i, V6\r |
8bdadcc8 |
353 | UINT8 reserved_3;\r |
354 | UINT8 allocation_length;\r |
355 | UINT8 reserved_5;\r |
356 | UINT8 reserved_6;\r |
357 | UINT8 reserved_7;\r |
358 | UINT8 reserved_8;\r |
359 | UINT8 reserved_9;\r |
360 | UINT8 reserved_10;\r |
361 | UINT8 reserved_11;\r |
362 | } ATAPI_INQUIRY_CMD;\r |
363 | \r |
37640ed3 |
364 | ///\r |
427987f5 |
365 | /// REQUEST SENSE Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
366 | ///\r |
8bdadcc8 |
367 | typedef struct {\r |
368 | UINT8 opcode;\r |
37640ed3 |
369 | UINT8 reserved_1 : 5;\r |
370 | UINT8 lun : 3;\r |
8bdadcc8 |
371 | UINT8 reserved_2;\r |
372 | UINT8 reserved_3;\r |
373 | UINT8 allocation_length;\r |
374 | UINT8 reserved_5;\r |
375 | UINT8 reserved_6;\r |
376 | UINT8 reserved_7;\r |
377 | UINT8 reserved_8;\r |
378 | UINT8 reserved_9;\r |
379 | UINT8 reserved_10;\r |
380 | UINT8 reserved_11;\r |
381 | } ATAPI_REQUEST_SENSE_CMD;\r |
382 | \r |
37640ed3 |
383 | ///\r |
427987f5 |
384 | /// READ (10) Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
385 | ///\r |
8bdadcc8 |
386 | typedef struct {\r |
387 | UINT8 opcode;\r |
388 | UINT8 reserved_1 : 5;\r |
389 | UINT8 lun : 3;\r |
390 | UINT8 Lba0;\r |
391 | UINT8 Lba1;\r |
392 | UINT8 Lba2;\r |
393 | UINT8 Lba3;\r |
394 | UINT8 reserved_6;\r |
395 | UINT8 TranLen0;\r |
396 | UINT8 TranLen1;\r |
397 | UINT8 reserved_9;\r |
398 | UINT8 reserved_10;\r |
399 | UINT8 reserved_11;\r |
400 | } ATAPI_READ10_CMD;\r |
401 | \r |
37640ed3 |
402 | ///\r |
427987f5 |
403 | /// READ Format Capacity Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
404 | ///\r |
8bdadcc8 |
405 | typedef struct {\r |
406 | UINT8 opcode;\r |
37640ed3 |
407 | UINT8 reserved_1 : 5;\r |
408 | UINT8 lun : 3;\r |
8bdadcc8 |
409 | UINT8 reserved_2;\r |
410 | UINT8 reserved_3;\r |
411 | UINT8 reserved_4;\r |
412 | UINT8 reserved_5;\r |
413 | UINT8 reserved_6;\r |
414 | UINT8 allocation_length_hi;\r |
415 | UINT8 allocation_length_lo;\r |
416 | UINT8 reserved_9;\r |
417 | UINT8 reserved_10;\r |
418 | UINT8 reserved_11;\r |
419 | } ATAPI_READ_FORMAT_CAP_CMD;\r |
420 | \r |
37640ed3 |
421 | ///\r |
427987f5 |
422 | /// MODE SENSE Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r |
37640ed3 |
423 | ///\r |
8bdadcc8 |
424 | typedef struct {\r |
425 | UINT8 opcode;\r |
37640ed3 |
426 | UINT8 reserved_1 : 5;\r |
427 | UINT8 lun : 3;\r |
428 | UINT8 page_code : 6;\r |
429 | UINT8 page_control : 2;\r |
8bdadcc8 |
430 | UINT8 reserved_3;\r |
431 | UINT8 reserved_4;\r |
432 | UINT8 reserved_5;\r |
433 | UINT8 reserved_6;\r |
434 | UINT8 parameter_list_length_hi;\r |
435 | UINT8 parameter_list_length_lo;\r |
436 | UINT8 reserved_9;\r |
437 | UINT8 reserved_10;\r |
438 | UINT8 reserved_11;\r |
439 | } ATAPI_MODE_SENSE_CMD;\r |
440 | \r |
1bc5d021 |
441 | ///\r |
442 | /// ATAPI_PACKET_COMMAND is not defined in ATA specification.\r |
443 | /// We add it here for the convenience for ATA/ATAPI module writer. \r |
444 | ///\r |
8bdadcc8 |
445 | typedef union {\r |
446 | UINT16 Data16[6];\r |
447 | ATAPI_TEST_UNIT_READY_CMD TestUnitReady;\r |
448 | ATAPI_READ10_CMD Read10;\r |
449 | ATAPI_REQUEST_SENSE_CMD RequestSence;\r |
450 | ATAPI_INQUIRY_CMD Inquiry;\r |
451 | ATAPI_MODE_SENSE_CMD ModeSense;\r |
452 | ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;\r |
453 | } ATAPI_PACKET_COMMAND;\r |
454 | \r |
766f4bc1 |
455 | #pragma pack()\r |
456 | \r |
8bdadcc8 |
457 | \r |
458 | #define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000\r |
459 | #define ATAPI_MAX_DMA_CMD_SECTORS 0x100\r |
460 | \r |
461 | //\r |
462 | // ATA Packet Command Code\r |
463 | //\r |
81dac930 |
464 | #define ATA_CMD_SOFT_RESET 0x08 ///< defined from ATA-3\r |
465 | #define ATA_CMD_PACKET 0xA0 ///< defined from ATA-3\r |
466 | #define ATA_CMD_IDENTIFY_DEVICE 0xA1 ///< defined from ATA-3\r |
467 | #define ATA_CMD_SERVICE 0xA2 ///< defined from ATA-3\r |
468 | #define ATA_CMD_TEST_UNIT_READY 0x00 ///< defined from ATA-1\r |
469 | #define ATA_CMD_REQUEST_SENSE 0x03 ///< defined from ATA-4\r |
37640ed3 |
470 | #define ATA_CMD_INQUIRY 0x12 ///< defined in ATAPI Removable Rewritable Media Devcies\r |
471 | #define ATA_CMD_READ_FORMAT_CAPACITY 0x23 ///< defined in ATAPI Removable Rewritable Media Devcies\r |
472 | #define ATA_CMD_READ_CAPACITY 0x25 ///< defined in ATAPI Removable Rewritable Media Devcies\r |
473 | #define ATA_CMD_READ_10 0x28 ///< defined in ATAPI Removable Rewritable Media Devcies\r |
474 | #define ATA_CMD_WRITE_10 0x2A ///< defined in ATAPI Removable Rewritable Media Devcies\r |
8bdadcc8 |
475 | \r |
476 | //\r |
477 | // ATA Commands Code\r |
478 | //\r |
479 | \r |
480 | //\r |
481 | // Class 1: PIO Data-In Commands\r |
482 | //\r |
81dac930 |
483 | #define ATA_CMD_IDENTIFY_DRIVE 0xec ///< defined from ATA-3\r |
484 | #define ATA_CMD_READ_BUFFER 0xe4 ///< defined from ATA-1\r |
485 | #define ATA_CMD_READ_SECTORS 0x20 ///< defined from ATA-1 \r |
486 | #define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21 ///< defined from ATA-1, obsoleted from ATA-5\r |
487 | #define ATA_CMD_READ_LONG 0x22 ///< defined from ATA-1, obsoleted from ATA-5\r |
488 | #define ATA_CMD_READ_LONG_WITH_RETRY 0x23 ///< defined from ATA-1, obsoleted from ATA-5\r |
489 | #define ATA_CMD_READ_SECTORS_EXT 0x24 ///< defined from ATA-6\r |
8bdadcc8 |
490 | \r |
8bdadcc8 |
491 | //\r |
492 | // Class 2: PIO Data-Out Commands\r |
493 | //\r |
81dac930 |
494 | #define ATA_CMD_FORMAT_TRACK 0x50 ///< defined from ATA-1, obsoleted from ATA-4\r |
495 | #define ATA_CMD_WRITE_BUFFER 0xe8 ///< defined from ATA-1 \r |
496 | #define ATA_CMD_WRITE_SECTORS 0x30 ///< defined from ATA-1\r |
497 | #define ATA_CMD_WRITE_SECTORS_WITH_RETRY 0x31 ///< defined from ATA-1, obsoleted from ATA-5\r |
498 | #define ATA_CMD_WRITE_LONG 0x32 ///< defined from ATA-1, obsoleted from ATA-5\r |
499 | #define ATA_CMD_WRITE_LONG_WITH_RETRY 0x33 ///< defined from ATA-1, obsoleted from ATA-5\r |
500 | #define ATA_CMD_WRITE_VERIFY 0x3c ///< defined from ATA-1, obsoleted from ATA-5\r |
501 | #define ATA_CMD_WRITE_SECTORS_EXT 0x34 ///< defined from ATA-6\r |
8bdadcc8 |
502 | \r |
503 | //\r |
504 | // Class 3 No Data Command\r |
505 | //\r |
81dac930 |
506 | #define ATA_CMD_ACK_MEDIA_CHANGE 0xdb ///< defined from ATA-1, obsoleted from ATA-5 \r |
507 | #define ATA_CMD_BOOT_POST_BOOT 0xdc ///< defined from ATA-1, obsoleted from ATA-3\r |
508 | #define ATA_CMD_BOOT_PRE_BOOT 0xdd ///< defined from ATA-1, obsoleted from ATA-3\r |
509 | #define ATA_CMD_CHECK_POWER_MODE 0x98 ///< defined from ATA-1, obsoleted from ATA-4\r |
510 | #define ATA_CMD_CHECK_POWER_MODE_ALIAS 0xe5 ///< defined from ATA-1\r |
511 | #define ATA_CMD_DOOR_LOCK 0xde ///< defined from ATA-1\r |
512 | #define ATA_CMD_DOOR_UNLOCK 0xdf ///< defined from ATA-1\r |
513 | #define ATA_CMD_EXEC_DRIVE_DIAG 0x90 ///< defined from ATA-1\r |
514 | #define ATA_CMD_IDLE_ALIAS 0x97 ///< defined from ATA-1, obsoleted from ATA-4\r |
515 | #define ATA_CMD_IDLE 0xe3 ///< defined from ATA-1\r |
516 | #define ATA_CMD_IDLE_IMMEDIATE 0x95 ///< defined from ATA-1, obsoleted from ATA-4\r |
517 | #define ATA_CMD_IDLE_IMMEDIATE_ALIAS 0xe1 ///< defined from ATA-1\r |
518 | #define ATA_CMD_INIT_DRIVE_PARAM 0x91 ///< defined from ATA-1, obsoleted from ATA-6\r |
519 | #define ATA_CMD_RECALIBRATE 0x10 ///< defined from ATA-1, obsoleted from ATA-4\r |
520 | #define ATA_CMD_READ_DRIVE_STATE 0xe9 ///< defined from ATA-1, obsoleted from ATA-3\r |
521 | #define ATA_CMD_SET_MULTIPLE_MODE 0xC6 ///< defined from ATA-2\r |
522 | #define ATA_CMD_READ_VERIFY 0x40 ///< defined from ATA-1\r |
523 | #define ATA_CMD_READ_VERIFY_WITH_RETRY 0x41 ///< defined from ATA-1, obsoleted from ATA-5\r |
524 | #define ATA_CMD_SEEK 0x70 ///< defined from ATA-1\r |
525 | #define ATA_CMD_SET_FEATURES 0xef ///< defined from ATA-1\r |
526 | #define ATA_CMD_STANDBY 0x96 ///< defined from ATA-1, obsoleted from ATA-4\r |
527 | #define ATA_CMD_STANDBY_ALIAS 0xe2 ///< defined from ATA-1\r |
528 | #define ATA_CMD_STANDBY_IMMEDIATE 0x94 ///< defined from ATA-1, obsoleted from ATA-4\r |
529 | #define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0 ///< defined from ATA-1\r |
a2461f6b |
530 | //\r |
531 | // S.M.A.R.T\r |
532 | //\r |
81dac930 |
533 | #define ATA_CMD_SMART 0xb0 ///< defined from ATA-3\r |
534 | #define ATA_CONSTANT_C2 0xc2 ///< reserved\r |
535 | #define ATA_CONSTANT_4F 0x4f ///< reserved\r |
536 | #define ATA_SMART_ENABLE_OPERATION 0xd8 ///< reserved\r |
537 | #define ATA_SMART_RETURN_STATUS 0xda ///< defined from ATA-3\r |
8bdadcc8 |
538 | \r |
a2461f6b |
539 | //\r |
540 | // Class 4: DMA Command\r |
541 | //\r |
81dac930 |
542 | #define ATA_CMD_READ_DMA 0xc8 ///< defined from ATA-1\r |
543 | #define ATA_CMD_READ_DMA_WITH_RETRY 0xc9 ///< defined from ATA-1, obsoleted from ATA-5\r |
544 | #define ATA_CMD_READ_DMA_EXT 0x25 ///< defined from ATA-6\r |
545 | #define ATA_CMD_WRITE_DMA 0xca ///< defined from ATA-1\r |
546 | #define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb ///< defined from ATA-1, obsoleted from ATA-\r |
547 | #define ATA_CMD_WRITE_DMA_EXT 0x35 ///< defined from ATA-6\r |
a2461f6b |
548 | \r |
37640ed3 |
549 | ///\r |
550 | /// default content of device control register, disable INT,\r |
551 | /// Bit3 is set to 1 according ATA-1\r |
552 | ///\r |
553 | #define ATA_DEFAULT_CTL (0x0a) \r |
554 | ///\r |
555 | /// default context of Device/Head Register,\r |
556 | /// Bit7 and Bit5 are set to 1 for back-compatibilities\r |
557 | ///\r |
8bdadcc8 |
558 | #define ATA_DEFAULT_CMD (0xa0)\r |
559 | \r |
560 | #define ATAPI_MAX_BYTE_COUNT (0xfffe)\r |
561 | \r |
53bbea41 |
562 | #define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i\r |
563 | \r |
a2461f6b |
564 | //\r |
565 | // Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r |
566 | // defined in MultiMedia Commands (MMC, MMC-2) \r |
567 | //\r |
568 | // Sense Key \r |
569 | //\r |
8bdadcc8 |
570 | #define ATA_SK_NO_SENSE (0x0)\r |
571 | #define ATA_SK_RECOVERY_ERROR (0x1)\r |
572 | #define ATA_SK_NOT_READY (0x2)\r |
573 | #define ATA_SK_MEDIUM_ERROR (0x3)\r |
574 | #define ATA_SK_HARDWARE_ERROR (0x4)\r |
575 | #define ATA_SK_ILLEGAL_REQUEST (0x5)\r |
576 | #define ATA_SK_UNIT_ATTENTION (0x6)\r |
577 | #define ATA_SK_DATA_PROTECT (0x7)\r |
578 | #define ATA_SK_BLANK_CHECK (0x8)\r |
579 | #define ATA_SK_VENDOR_SPECIFIC (0x9)\r |
580 | #define ATA_SK_RESERVED_A (0xA)\r |
581 | #define ATA_SK_ABORT (0xB)\r |
582 | #define ATA_SK_RESERVED_C (0xC)\r |
583 | #define ATA_SK_OVERFLOW (0xD)\r |
584 | #define ATA_SK_MISCOMPARE (0xE)\r |
585 | #define ATA_SK_RESERVED_F (0xF)\r |
586 | \r |
a2461f6b |
587 | //\r |
588 | // Additional Sense Codes\r |
589 | //\r |
8bdadcc8 |
590 | #define ATA_ASC_NOT_READY (0x04)\r |
591 | #define ATA_ASC_MEDIA_ERR1 (0x10)\r |
592 | #define ATA_ASC_MEDIA_ERR2 (0x11)\r |
593 | #define ATA_ASC_MEDIA_ERR3 (0x14)\r |
594 | #define ATA_ASC_MEDIA_ERR4 (0x30)\r |
595 | #define ATA_ASC_MEDIA_UPSIDE_DOWN (0x06)\r |
596 | #define ATA_ASC_INVALID_CMD (0x20)\r |
597 | #define ATA_ASC_LBA_OUT_OF_RANGE (0x21)\r |
598 | #define ATA_ASC_INVALID_FIELD (0x24)\r |
599 | #define ATA_ASC_WRITE_PROTECTED (0x27)\r |
600 | #define ATA_ASC_MEDIA_CHANGE (0x28)\r |
37640ed3 |
601 | #define ATA_ASC_RESET (0x29) ///< Power On Reset or Bus Reset occurred\r |
8bdadcc8 |
602 | #define ATA_ASC_ILLEGAL_FIELD (0x26)\r |
603 | #define ATA_ASC_NO_MEDIA (0x3A)\r |
604 | #define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)\r |
605 | \r |
606 | //\r |
607 | // Additional Sense Code Qualifier\r |
608 | //\r |
609 | #define ATA_ASCQ_IN_PROGRESS (0x01)\r |
610 | \r |
a2461f6b |
611 | //\r |
612 | // Error Register\r |
613 | //\r |
81dac930 |
614 | #define ATA_ERRREG_BBK BIT7 ///< Bad block detected defined from ATA-1, obsoleted from ATA-2\r |
615 | #define ATA_ERRREG_UNC BIT6 ///< Uncorrectable Data defined from ATA-1, obsoleted from ATA-4\r |
616 | #define ATA_ERRREG_MC BIT5 ///< Media Change defined from ATA-1, obsoleted from ATA-4\r |
617 | #define ATA_ERRREG_IDNF BIT4 ///< ID Not Found defined from ATA-1, obsoleted from ATA-4\r |
618 | #define ATA_ERRREG_MCR BIT3 ///< Media Change Requested defined from ATA-1, obsoleted from ATA-4\r |
619 | #define ATA_ERRREG_ABRT BIT2 ///< Aborted Command defined from ATA-1\r |
620 | #define ATA_ERRREG_TK0NF BIT1 ///< Track 0 Not Found defined from ATA-1, obsoleted from ATA-4\r |
621 | #define ATA_ERRREG_AMNF BIT0 ///< Address Mark Not Found defined from ATA-1, obsoleted from ATA-4\r |
8bdadcc8 |
622 | \r |
a2461f6b |
623 | //\r |
624 | // Status Register\r |
625 | //\r |
81dac930 |
626 | #define ATA_STSREG_BSY BIT7 ///< Controller Busy defined from ATA-1\r |
627 | #define ATA_STSREG_DRDY BIT6 ///< Drive Ready defined from ATA-1\r |
628 | #define ATA_STSREG_DWF BIT5 ///< Drive Write Fault defined from ATA-1, obsoleted from ATA-4\r |
629 | #define ATA_STSREG_DF BIT5 ///< Drive Fault defined from ATA-6\r |
630 | #define ATA_STSREG_DSC BIT4 ///< Disk Seek Complete defined from ATA-1, obsoleted from ATA-4\r |
631 | #define ATA_STSREG_DRQ BIT3 ///< Data Request defined from ATA-1\r |
632 | #define ATA_STSREG_CORR BIT2 ///< Corrected Data defined from ATA-1, obsoleted from ATA-4\r |
633 | #define ATA_STSREG_IDX BIT1 ///< Index defined from ATA-1, obsoleted from ATA-4\r |
634 | #define ATA_STSREG_ERR BIT0 ///< Error defined from ATA-1\r |
8bdadcc8 |
635 | \r |
a2461f6b |
636 | //\r |
637 | // Device Control Register\r |
638 | //\r |
37640ed3 |
639 | #define ATA_CTLREG_SRST BIT2 ///< Software Reset\r |
640 | #define ATA_CTLREG_IEN_L BIT1 ///< Interrupt Enable #\r |
8bdadcc8 |
641 | \r |
642 | #endif\r |
643 | \r |