projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 57419e67 GM |
1 | /** @file\r |
| 2 | ACPI Low Power Idle Table (LPIT) definitions\r | |
| 3 | \r | |
| 4 | Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r | |
| 9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 57419e67 GM |
6 | \r |
| 7 | @par Revision Reference:\r | |
| 8 | - ACPI Low Power Idle Table (LPIT) Revision 001, dated July 2014\r | |
| 9 | http://www.uefi.org/sites/default/files/resources/ACPI_Low_Power_Idle_Table.pdf\r | |
| 10 | \r | |
| 11 | @par Glossary:\r | |
| 12 | - GAS - Generic Address Structure\r | |
| 13 | - LPI - Low Power Idle\r | |
| 14 | **/\r | |
| 15 | #ifndef _LOW_POWER_IDLE_TABLE_H_\r | |
| 16 | #define _LOW_POWER_IDLE_TABLE_H_\r | |
| 17 | \r | |
| 18 | #include <IndustryStandard/Acpi.h>\r | |
| 19 | \r | |
| 20 | #pragma pack(1)\r | |
| 21 | \r | |
| 22 | ///\r | |
| 23 | /// LPI Structure Types\r | |
| 24 | ///\r | |
| 25 | #define ACPI_LPI_STRUCTURE_TYPE_NATIVE_CSTATE 0x00\r | |
| 26 | \r | |
| 27 | ///\r | |
| 28 | /// Low Power Idle (LPI) State Flags\r | |
| 29 | ///\r | |
| 30 | typedef union {\r | |
| 31 | struct {\r | |
| 32 | UINT32 Disabled : 1; ///< If set, LPI state is not used\r | |
| 33 | /**\r | |
| 34 | If set, Residency counter is not available for this LPI state and\r | |
| 35 | Residency Counter Frequency is invalid\r | |
| 36 | **/\r | |
| 37 | UINT32 CounterUnavailable : 1;\r | |
| 38 | UINT32 Reserved : 30; ///< Reserved for future use. Must be zero\r | |
| 39 | } Bits;\r | |
| 40 | UINT32 Data32;\r | |
| 41 | } ACPI_LPI_STATE_FLAGS;\r | |
| 42 | \r | |
| 43 | ///\r | |
| 44 | /// Low Power Idle (LPI) structure with Native C-state instruction entry trigger descriptor\r | |
| 45 | ///\r | |
| 46 | typedef struct {\r | |
| 47 | UINT32 Type; ///< LPI State descriptor Type 0\r | |
| 48 | UINT32 Length; ///< Length of LPI state Descriptor Structure\r | |
| 49 | ///\r | |
| 50 | /// Unique LPI state identifier: zero based, monotonically increasing identifier\r | |
| 51 | ///\r | |
| 52 | UINT16 UniqueId;\r | |
| 53 | UINT8 Reserved[2]; ///< Must be Zero\r | |
| 54 | ACPI_LPI_STATE_FLAGS Flags; ///< LPI state flags\r | |
| 55 | /**\r | |
| 56 | The LPI entry trigger, matching an existing _CST.Register object, represented as a\r | |
| 57 | Generic Address Structure. All processors must request this state or deeper to trigger.\r | |
| 58 | **/\r | |
| 59 | EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE EntryTrigger;\r | |
| 60 | UINT32 Residency; ///< Minimum residency or break-even in uSec\r | |
| 61 | UINT32 Latency; ///< Worst case exit latency in uSec\r | |
| 62 | /**\r | |
| 63 | [optional] Residency counter, represented as a Generic Address Structure.\r | |
| 64 | If not present, Flags[1] bit should be set.\r | |
| 65 | **/\r | |
| 66 | EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE ResidencyCounter;\r | |
| 67 | /**\r | |
| 68 | [optional] Residency counter frequency in cycles per second. Value 0 indicates that\r | |
| 69 | counter runs at TSC frequency. Valid only if Residency Counter is present.\r | |
| 70 | **/\r | |
| 71 | UINT64 ResidencyCounterFrequency;\r | |
| 72 | } ACPI_LPI_NATIVE_CSTATE_DESCRIPTOR;\r | |
| 73 | \r | |
| 74 | #pragma pack()\r | |
| 75 | \r | |
| 76 | #endif\r |