UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Pci30.h

/** @file\r
  Support for PCI 3.0 standard.\r
\r
  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __PCI30_H__\r
#define __PCI30_H__\r
\r
#include <IndustryStandard/Pci23.h>\r
\r
///\r
/// PCI_CLASS_MASS_STORAGE, Base Class 01h.\r
///\r
///@{\r
#define PCI_CLASS_MASS_STORAGE_SATADPA  0x06\r
#define   PCI_IF_MASS_STORAGE_SATA      0x00\r
#define   PCI_IF_MASS_STORAGE_AHCI      0x01\r
///@}\r
\r
///\r
/// PCI_CLASS_WIRELESS, Base Class 0Dh.\r
///\r
///@{\r
#define PCI_SUBCLASS_ETHERNET_80211A  0x20\r
#define PCI_SUBCLASS_ETHERNET_80211B  0x21\r
///@}\r
\r
/**\r
  Macro that checks whether device is a SATA controller.\r
\r
  @param  _p      Specified device.\r
\r
  @retval TRUE    Device is a SATA controller.\r
  @retval FALSE   Device is not a SATA controller.\r
\r
**/\r
#define IS_PCI_SATADPA(_p)  IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SATADPA)\r
\r
///\r
/// PCI Capability List IDs and records\r
///\r
#define EFI_PCI_CAPABILITY_ID_PCIEXP  0x10\r
\r
#pragma pack(1)\r
\r
///\r
/// PCI Data Structure Format\r
/// Section 5.1.2, PCI Firmware Specification, Revision 3.0\r
///\r
typedef struct {\r
  UINT32    Signature;  ///< "PCIR"\r
  UINT16    VendorId;\r
  UINT16    DeviceId;\r
  UINT16    DeviceListOffset;\r
  UINT16    Length;\r
  UINT8     Revision;\r
  UINT8     ClassCode[3];\r
  UINT16    ImageLength;\r
  UINT16    CodeRevision;\r
  UINT8     CodeType;\r
  UINT8     Indicator;\r
  UINT16    MaxRuntimeImageLength;\r
  UINT16    ConfigUtilityCodeHeaderOffset;\r
  UINT16    DMTFCLPEntryPointOffset;\r
} PCI_3_0_DATA_STRUCTURE;\r
\r
#pragma pack()\r
\r
#endif\r