projects / mirror_edk2.git / blame
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| 627373d7 FT |
1 | /** @file\r |
| 2 | Header file for SD memory card support.\r | |
| 3 | \r | |
| 4 | This header file contains some definitions defined in SD Physical Layer Simplified\r | |
| 5 | Specification Version 4.10 spec.\r | |
| 6 | \r | |
| 7 | Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r | |
| 8 | This program and the accompanying materials\r | |
| 9 | are licensed and made available under the terms and conditions of the BSD License\r | |
| 10 | which accompanies this distribution. The full text of the license may be found at\r | |
| 11 | http://opensource.org/licenses/bsd-license.php\r | |
| 12 | \r | |
| 13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 15 | \r | |
| 16 | **/\r | |
| 17 | \r | |
| 18 | #ifndef __SD_H__\r | |
| 19 | #define __SD_H__\r | |
| 20 | \r | |
| 21 | //\r | |
| 22 | // SD command index\r | |
| 23 | //\r | |
| 24 | #define SD_GO_IDLE_STATE 0\r | |
| 25 | #define SD_ALL_SEND_CID 2\r | |
| 26 | #define SD_SET_RELATIVE_ADDR 3\r | |
| 27 | #define SD_SET_DSR 4\r | |
| 28 | #define SDIO_SEND_OP_COND 5\r | |
| 29 | #define SD_SWITCH_FUNC 6\r | |
| 30 | #define SD_SELECT_DESELECT_CARD 7\r | |
| 31 | #define SD_SEND_IF_COND 8\r | |
| 32 | #define SD_SEND_CSD 9\r | |
| 33 | #define SD_SEND_CID 10\r | |
| 34 | #define SD_VOLTAGE_SWITCH 11\r | |
| 35 | #define SD_STOP_TRANSMISSION 12\r | |
| 36 | #define SD_SEND_STATUS 13\r | |
| 37 | #define SD_GO_INACTIVE_STATE 15\r | |
| 38 | #define SD_SET_BLOCKLEN 16\r | |
| 39 | #define SD_READ_SINGLE_BLOCK 17\r | |
| 40 | #define SD_READ_MULTIPLE_BLOCK 18\r | |
| 41 | #define SD_SEND_TUNING_BLOCK 19\r | |
| 42 | #define SD_SPEED_CLASS_CONTROL 20\r | |
| 43 | #define SD_SET_BLOCK_COUNT 23\r | |
| 44 | #define SD_WRITE_SINGLE_BLOCK 24\r | |
| 45 | #define SD_WRITE_MULTIPLE_BLOCK 25\r | |
| 46 | #define SD_PROGRAM_CSD 27\r | |
| 47 | #define SD_SET_WRITE_PROT 28\r | |
| 48 | #define SD_CLR_WRITE_PROT 29\r | |
| 49 | #define SD_SEND_WRITE_PROT 30\r | |
| 50 | #define SD_ERASE_WR_BLK_START 32\r | |
| 51 | #define SD_ERASE_WR_BLK_END 33\r | |
| 52 | #define SD_ERASE 38\r | |
| 53 | #define SD_LOCK_UNLOCK 42\r | |
| 54 | #define SD_READ_EXTR_SINGLE 48\r | |
| 55 | #define SD_WRITE_EXTR_SINGLE 49\r | |
| 56 | #define SDIO_RW_DIRECT 52\r | |
| 57 | #define SDIO_RW_EXTENDED 53\r | |
| 58 | #define SD_APP_CMD 55\r | |
| 59 | #define SD_GEN_CMD 56\r | |
| 60 | #define SD_READ_EXTR_MULTI 58\r | |
| 61 | #define SD_WRITE_EXTR_MULTI 59\r | |
| 62 | \r | |
| 63 | #define SD_SET_BUS_WIDTH 6 // ACMD6\r | |
| 64 | #define SD_STATUS 13 // ACMD13\r | |
| 65 | #define SD_SEND_NUM_WR_BLOCKS 22 // ACMD22\r | |
| 66 | #define SD_SET_WR_BLK_ERASE_COUNT 23 // ACMD23\r | |
| 67 | #define SD_SEND_OP_COND 41 // ACMD41\r | |
| 68 | #define SD_SET_CLR_CARD_DETECT 42 // ACMD42\r | |
| 69 | #define SD_SEND_SCR 51 // ACMD51\r | |
| 70 | \r | |
| 71 | #pragma pack(1)\r | |
| 72 | typedef struct {\r | |
| 73 | UINT8 NotUsed:1; // Not used [0:0]\r | |
| 74 | UINT8 Crc:7; // CRC [7:1]\r | |
| 75 | UINT16 ManufacturingDate:12; // Manufacturing date [19:8]\r | |
| 76 | UINT16 Reserved:4; // Reserved [23:20]\r | |
| 77 | UINT8 ProductSerialNumber[4]; // Product serial number [55:24]\r | |
| 78 | UINT8 ProductRevision; // Product revision [63:56]\r | |
| 79 | UINT8 ProductName[5]; // Product name [103:64]\r | |
| 80 | UINT8 OemId[2]; // OEM/Application ID [119:104]\r | |
| 81 | UINT8 ManufacturerId; // Manufacturer ID [127:120]\r | |
| 82 | } SD_CID;\r | |
| 83 | \r | |
| 84 | typedef struct {\r | |
| 85 | UINT32 NotUsed:1; // Not used [0:0]\r | |
| 86 | UINT32 Crc:7; // CRC [7:1]\r | |
| 87 | UINT32 Reserved:2; // Reserved [9:8]\r | |
| 88 | UINT32 FileFormat:2; // File format [11:10]\r | |
| 89 | UINT32 TmpWriteProtect:1; // Temporary write protection [12:12]\r | |
| 90 | UINT32 PermWriteProtect:1; // Permanent write protection [13:13]\r | |
| 91 | UINT32 Copy:1; // Copy flag (OTP) [14:14]\r | |
| 92 | UINT32 FileFormatGrp:1; // File format group [15:15]\r | |
| 93 | UINT32 Reserved1:5; // Reserved [20:16]\r | |
| 94 | UINT32 WriteBlPartial:1; // Partial blocks for write allowed [21:21]\r | |
| 95 | UINT32 WriteBlLen:4; // Max. write data block length [25:22]\r | |
| 96 | UINT32 R2WFactor:3; // Write speed factor [28:26]\r | |
| 97 | UINT32 Reserved2:2; // Manufacturer default ECC [30:29]\r | |
| 98 | UINT32 WpGrpEnable:1; // Write protect group enable [31:31]\r | |
| 99 | \r | |
| 100 | UINT32 WpGrpSize:7; // Write protect group size [38:32]\r | |
| 101 | UINT32 SectorSize:7; // Erase sector size [45:39]\r | |
| 102 | UINT32 EraseBlkEn:1; // Erase single block enable [46:46]\r | |
| 103 | UINT32 CSizeMul:3; // device size multiplier [49:47]\r | |
| 104 | UINT32 VddWCurrMax:3; // max. write current @VDD max [52:50]\r | |
| 105 | UINT32 VddWCurrMin:3; // max. write current @VDD min [55:53]\r | |
| 106 | UINT32 VddRCurrMax:3; // max. read current @VDD max [58:56]\r | |
| 107 | UINT32 VddRCurrMin:3; // max. read current @VDD min [61:59]\r | |
| 108 | UINT32 CSizeLow:2; // Device size low 2 bits [63:62]\r | |
| 109 | \r | |
| 110 | UINT32 CSizeHigh:10; // Device size high 10 bits [73:64]\r | |
| 111 | UINT32 Reserved4:2; // Reserved [75:74]\r | |
| 112 | UINT32 DsrImp:1; // DSR implemented [76:76]\r | |
| 113 | UINT32 ReadBlkMisalign:1; // Read block misalignment [77:77]\r | |
| 114 | UINT32 WriteBlkMisalign:1; // Write block misalignment [78:78]\r | |
| 115 | UINT32 ReadBlPartial:1; // Partial blocks for read allowed [79:79]\r | |
| 116 | UINT32 ReadBlLen:4; // Max. read data block length [83:80]\r | |
| 117 | UINT32 Ccc:12; // Card command classes [95:84]\r | |
| 118 | \r | |
| 119 | UINT32 TranSpeed:8; // Max. data transfer rate [103:96]\r | |
| 120 | UINT32 Nsac:8; // Data read access-time in CLK cycles (NSAC*100) [111:104]\r | |
| 121 | UINT32 Taac:8; // Data read access-time [119:112]\r | |
| 122 | UINT32 Reserved5:6; // Reserved [125:120]\r | |
| 123 | UINT32 CsdStructure:2; // CSD structure [127:126]\r | |
| 124 | } SD_CSD;\r | |
| 125 | \r | |
| 126 | typedef struct {\r | |
| 127 | UINT32 NotUsed:1; // Not used [0:0]\r | |
| 128 | UINT32 Crc:7; // CRC [7:1]\r | |
| 129 | UINT32 Reserved:2; // Reserved [9:8]\r | |
| 130 | UINT32 FileFormat:2; // File format [11:10]\r | |
| 131 | UINT32 TmpWriteProtect:1; // Temporary write protection [12:12]\r | |
| 132 | UINT32 PermWriteProtect:1; // Permanent write protection [13:13]\r | |
| 133 | UINT32 Copy:1; // Copy flag (OTP) [14:14]\r | |
| 134 | UINT32 FileFormatGrp:1; // File format group [15:15]\r | |
| 135 | UINT32 Reserved1:5; // Reserved [20:16]\r | |
| 136 | UINT32 WriteBlPartial:1; // Partial blocks for write allowed [21:21]\r | |
| 137 | UINT32 WriteBlLen:4; // Max. write data block length [25:22]\r | |
| 138 | UINT32 R2WFactor:3; // Write speed factor [28:26]\r | |
| 139 | UINT32 Reserved2:2; // Manufacturer default ECC [30:29]\r | |
| 140 | UINT32 WpGrpEnable:1; // Write protect group enable [31:31]\r | |
| 141 | \r | |
| 142 | UINT32 WpGrpSize:7; // Write protect group size [38:32]\r | |
| 143 | UINT32 SectorSize:7; // Erase sector size [45:39]\r | |
| 144 | UINT32 EraseBlkEn:1; // Erase single block enable [46:46]\r | |
| 145 | UINT32 Reserved3:1; // Reserved [47:47]\r | |
| 146 | UINT32 CSizeLow:16; // Device size low 16 bits [63:48]\r | |
| 147 | \r | |
| 148 | UINT32 CSizeHigh:6; // Device size high 6 bits [69:64]\r | |
| 149 | UINT32 Reserved4:6; // Reserved [75:70]\r | |
| 150 | UINT32 DsrImp:1; // DSR implemented [76:76]\r | |
| 151 | UINT32 ReadBlkMisalign:1; // Read block misalignment [77:77]\r | |
| 152 | UINT32 WriteBlkMisalign:1; // Write block misalignment [78:78]\r | |
| 153 | UINT32 ReadBlPartial:1; // Partial blocks for read allowed [79:79]\r | |
| 154 | UINT32 ReadBlLen:4; // Max. read data block length [83:80]\r | |
| 155 | UINT32 Ccc:12; // Card command classes [95:84]\r | |
| 156 | \r | |
| 157 | UINT32 TranSpeed:8; // Max. data transfer rate [103:96]\r | |
| 158 | UINT32 Nsac:8; // Data read access-time in CLK cycles (NSAC*100) [111:104]\r | |
| 159 | UINT32 Taac:8; // Data read access-time [119:112]\r | |
| 160 | UINT32 Reserved5:6; // Reserved [125:120]\r | |
| 161 | UINT32 CsdStructure:2; // CSD structure [127:126]\r | |
| 162 | } SD_CSD2;\r | |
| 163 | \r | |
| 164 | typedef struct {\r | |
| 165 | UINT32 Reserved; // Reserved [31:0]\r | |
| 166 | \r | |
| 167 | UINT32 CmdSupport:4; // Command Support bits [35:32]\r | |
| 168 | UINT32 Reserved1:6; // Reserved [41:36]\r | |
| 169 | UINT32 SdSpec4:1; // Spec. Version 4.00 or higher [42:42]\r | |
| 170 | UINT32 ExSecurity:4; // Extended Security Support [46:43]\r | |
| 171 | UINT32 SdSpec3:1; // Spec. Version 3.00 or higher [47:47]\r | |
| 172 | UINT32 SdBusWidths:4; // DAT Bus widths supported [51:48]\r | |
| 173 | UINT32 SdSecurity:3; // CPRM security support [54:52]\r | |
| 174 | UINT32 DataStatAfterErase:1; // Data status after erases [55]\r | |
| 175 | UINT32 SdSpec:4; // SD Memory Card Spec. Version [59:56]\r | |
| 176 | UINT32 ScrStructure:4; // SCR Structure [63:60]\r | |
| 177 | } SD_SCR;\r | |
| 178 | \r | |
| 179 | #pragma pack()\r | |
| 180 | \r | |
| 181 | #endif\r |