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1/** @file\r
2 Service Processor Management Interface (SPMI) ACPI table definition from\r
3 Intelligent Platform Management Interface Specification Second Generation.\r
4\r
5 Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>\r
9344f092 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7\r
8 @par Revision Reference:\r
9 - Intelligent Platform Management Interface Specification Second Generation\r
10 v2.0 Revision 1.1, Dated October 2013.\r
11 https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/ipmi-intelligent-platform-mgt-interface-spec-2nd-gen-v2-0-spec-update.pdf\r
12**/\r
2f88bd3a 13\r
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14#ifndef _SERVICE_PROCESSOR_MANAGEMENT_INTERFACE_TABLE_H_\r
15#define _SERVICE_PROCESSOR_MANAGEMENT_INTERFACE_TABLE_H_\r
16\r
17#include <IndustryStandard/Acpi.h>\r
18\r
19#pragma pack(1)\r
20\r
21///\r
22/// Definition for the device identification information used by the Service\r
23/// Processor Management Interface Description Table\r
24///\r
25typedef union {\r
26 ///\r
27 /// For PCI IPMI device\r
28 ///\r
29 struct {\r
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30 UINT8 SegmentGroup;\r
31 UINT8 Bus;\r
32 UINT8 Device;\r
33 UINT8 Function;\r
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34 } Pci;\r
35 ///\r
36 /// For non-PCI IPMI device, the ACPI _UID value of the device\r
37 ///\r
2f88bd3a 38 UINT32 Uid;\r
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39} EFI_ACPI_SERVICE_PROCESSOR_MANAGEMENT_INTERFACE_TABLE_DEVICE_ID;\r
40\r
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41///\r
42/// Definition for Service Processor Management Interface Description Table\r
43///\r
44typedef struct {\r
2f88bd3a 45 EFI_ACPI_DESCRIPTION_HEADER Header;\r
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46 ///\r
47 /// Indicates the type of IPMI interface.\r
48 ///\r
2f88bd3a 49 UINT8 InterfaceType;\r
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50 ///\r
51 /// This field must always be 01h to be compatible with any software that\r
52 /// implements previous versions of this spec.\r
53 ///\r
2f88bd3a 54 UINT8 Reserved1;\r
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55 ///\r
56 /// Identifies the IPMI specification revision, in BCD format.\r
57 ///\r
2f88bd3a 58 UINT16 SpecificationRevision;\r
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59 ///\r
60 /// Interrupt type(s) used by the interface.\r
61 ///\r
2f88bd3a 62 UINT8 InterruptType;\r
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63 ///\r
64 /// The bit assignment of the SCI interrupt within the GPEx_STS register of a\r
65 /// GPE described if the FADT that the interface triggers.\r
66 ///\r
2f88bd3a 67 UINT8 Gpe;\r
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68 ///\r
69 /// Reserved, must be 00h.\r
70 ///\r
2f88bd3a 71 UINT8 Reserved2;\r
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72 ///\r
73 /// PCI Device Flag.\r
74 ///\r
2f88bd3a 75 UINT8 PciDeviceFlag;\r
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76 ///\r
77 /// The I/O APIC or I/O SAPIC Global System Interrupt used by the interface.\r
78 ///\r
2f88bd3a 79 UINT32 GlobalSystemInterrupt;\r
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80 ///\r
81 /// The base address of the interface register set described using the\r
82 /// Generic Address Structure (GAS, See [ACPI 2.0] for the definition).\r
83 ///\r
2f88bd3a 84 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE BaseAddress;\r
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85 ///\r
86 /// Device identification information.\r
87 ///\r
88 EFI_ACPI_SERVICE_PROCESSOR_MANAGEMENT_INTERFACE_TABLE_DEVICE_ID DeviceId;\r
89 ///\r
90 /// This field must always be null (0x00) to be compatible with any software\r
91 /// that implements previous versions of this spec.\r
92 ///\r
2f88bd3a 93 UINT8 Reserved3;\r
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94} EFI_ACPI_SERVICE_PROCESSOR_MANAGEMENT_INTERFACE_TABLE;\r
95\r
96#pragma pack()\r
97\r
98#endif\r