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a7ed1e2e | 1 | /** @file\r |
7ddba202 | 2 | Industry Standard Definitions of SMBIOS Table Specification v2.7.1\r |
a7ed1e2e | 3 | \r |
f9ed6c93 | 4 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r |
af2dc6a7 | 5 | This program and the accompanying materials are licensed and made available under \r |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r | |
7 | The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
a7ed1e2e | 12 | \r |
a7ed1e2e | 13 | **/\r |
14 | \r | |
15 | #ifndef __SMBIOS_STANDARD_H__\r | |
16 | #define __SMBIOS_STANDARD_H__\r | |
98cb9ae8 | 17 | \r |
f2d0889f | 18 | ///\r |
19 | /// Reference SMBIOS 2.6, chapter 3.1.2.\r | |
20 | /// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r | |
21 | /// use by this specification.\r | |
22 | ///\r | |
23 | #define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r | |
24 | \r | |
7ddba202 SZ |
25 | ///\r |
26 | /// Reference SMBIOS 2.7, chapter 6.1.2.\r | |
27 | /// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r | |
28 | /// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r | |
29 | /// This number is not used for any other purpose by the SMBIOS specification.\r | |
30 | ///\r | |
31 | #define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r | |
32 | \r | |
f2d0889f | 33 | ///\r |
af2dc6a7 | 34 | /// Reference SMBIOS 2.6, chapter 3.1.3.\r |
35 | /// Each text string is limited to 64 significant characters due to system MIF limitations.\r | |
7ddba202 SZ |
36 | /// Reference SMBIOS 2.7, chapter 6.1.3.\r |
37 | /// It will have no limit on the length of each individual text string.\r | |
f2d0889f | 38 | ///\r |
39 | #define SMBIOS_STRING_MAX_LENGTH 64\r | |
40 | \r | |
41 | ///\r | |
42 | /// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r | |
43 | /// Upper-level software that interprets the SMBIOS structure-table should bypass an \r | |
44 | /// Inactive structure just like a structure type that the software does not recognize.\r | |
45 | ///\r | |
46 | #define SMBIOS_TYPE_INACTIVE 0x007E \r | |
47 | \r | |
48 | ///\r | |
49 | /// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r | |
50 | /// The end-of-table indicator is used in the last physical structure in a table\r | |
51 | ///\r | |
52 | #define SMBIOS_TYPE_END_OF_TABLE 0x007F\r | |
53 | \r | |
4135253b | 54 | ///\r |
af2dc6a7 | 55 | /// Smbios Table Entry Point Structure.\r |
4135253b | 56 | ///\r |
766f4bc1 | 57 | #pragma pack(1)\r |
a7ed1e2e | 58 | typedef struct {\r |
59 | UINT8 AnchorString[4];\r | |
60 | UINT8 EntryPointStructureChecksum;\r | |
61 | UINT8 EntryPointLength;\r | |
62 | UINT8 MajorVersion;\r | |
63 | UINT8 MinorVersion;\r | |
64 | UINT16 MaxStructureSize;\r | |
65 | UINT8 EntryPointRevision;\r | |
66 | UINT8 FormattedArea[5];\r | |
67 | UINT8 IntermediateAnchorString[5];\r | |
68 | UINT8 IntermediateChecksum;\r | |
69 | UINT16 TableLength;\r | |
70 | UINT32 TableAddress;\r | |
71 | UINT16 NumberOfSmbiosStructures;\r | |
72 | UINT8 SmbiosBcdRevision;\r | |
73 | } SMBIOS_TABLE_ENTRY_POINT;\r | |
74 | \r | |
ec8432e5 | 75 | ///\r |
af2dc6a7 | 76 | /// The Smbios structure header.\r |
ec8432e5 | 77 | ///\r |
a7ed1e2e | 78 | typedef struct {\r |
79 | UINT8 Type;\r | |
80 | UINT8 Length;\r | |
81 | UINT16 Handle;\r | |
82 | } SMBIOS_STRUCTURE;\r | |
83 | \r | |
bf7ea009 | 84 | ///\r |
85 | /// String Number for a Null terminated string, 00h stands for no string available.\r | |
86 | ///\r | |
61ce5861 | 87 | typedef UINT8 SMBIOS_TABLE_STRING;\r |
88 | \r | |
98cb9ae8 | 89 | ///\r |
7ddba202 SZ |
90 | /// BIOS Characteristics\r |
91 | /// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r | |
98cb9ae8 | 92 | ///\r |
93 | typedef struct {\r | |
af2dc6a7 | 94 | UINT32 Reserved :2; ///< Bits 0-1.\r |
7ddba202 SZ |
95 | UINT32 Unknown :1;\r |
96 | UINT32 BiosCharacteristicsNotSupported :1;\r | |
97 | UINT32 IsaIsSupported :1;\r | |
98cb9ae8 | 98 | UINT32 McaIsSupported :1;\r |
99 | UINT32 EisaIsSupported :1;\r | |
100 | UINT32 PciIsSupported :1;\r | |
101 | UINT32 PcmciaIsSupported :1;\r | |
102 | UINT32 PlugAndPlayIsSupported :1;\r | |
103 | UINT32 ApmIsSupported :1;\r | |
104 | UINT32 BiosIsUpgradable :1;\r | |
105 | UINT32 BiosShadowingAllowed :1;\r | |
106 | UINT32 VlVesaIsSupported :1;\r | |
107 | UINT32 EscdSupportIsAvailable :1;\r | |
108 | UINT32 BootFromCdIsSupported :1;\r | |
109 | UINT32 SelectableBootIsSupported :1;\r | |
110 | UINT32 RomBiosIsSocketed :1;\r | |
111 | UINT32 BootFromPcmciaIsSupported :1;\r | |
112 | UINT32 EDDSpecificationIsSupported :1;\r | |
113 | UINT32 JapaneseNecFloppyIsSupported :1;\r | |
114 | UINT32 JapaneseToshibaFloppyIsSupported :1;\r | |
115 | UINT32 Floppy525_360IsSupported :1;\r | |
116 | UINT32 Floppy525_12IsSupported :1;\r | |
117 | UINT32 Floppy35_720IsSupported :1;\r | |
118 | UINT32 Floppy35_288IsSupported :1;\r | |
119 | UINT32 PrintScreenIsSupported :1;\r | |
120 | UINT32 Keyboard8042IsSupported :1;\r | |
121 | UINT32 SerialIsSupported :1;\r | |
122 | UINT32 PrinterIsSupported :1;\r | |
123 | UINT32 CgaMonoIsSupported :1;\r | |
124 | UINT32 NecPc98 :1;\r | |
6800ac83 | 125 | UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r |
126 | ///< and bits 48-63 reserved for System Vendor. \r | |
98cb9ae8 | 127 | } MISC_BIOS_CHARACTERISTICS;\r |
128 | \r | |
129 | ///\r | |
7ddba202 SZ |
130 | /// BIOS Characteristics Extension Byte 1.\r |
131 | /// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r | |
132 | /// within the BIOS Information structure.\r | |
98cb9ae8 | 133 | ///\r |
134 | typedef struct {\r | |
135 | UINT8 AcpiIsSupported :1;\r | |
7ddba202 SZ |
136 | UINT8 UsbLegacyIsSupported :1;\r |
137 | UINT8 AgpIsSupported :1;\r | |
119c1688 | 138 | UINT8 I2OBootIsSupported :1;\r |
98cb9ae8 | 139 | UINT8 Ls120BootIsSupported :1;\r |
140 | UINT8 AtapiZipDriveBootIsSupported :1;\r | |
141 | UINT8 Boot1394IsSupported :1;\r | |
142 | UINT8 SmartBatteryIsSupported :1;\r | |
143 | } MBCE_BIOS_RESERVED;\r | |
144 | \r | |
145 | ///\r | |
af2dc6a7 | 146 | /// BIOS Characteristics Extension Byte 2.\r |
7ddba202 | 147 | /// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r |
98cb9ae8 | 148 | /// within the BIOS Information structure.\r |
149 | ///\r | |
150 | typedef struct {\r | |
151 | UINT8 BiosBootSpecIsSupported :1;\r | |
7ddba202 SZ |
152 | UINT8 FunctionKeyNetworkBootIsSupported :1;\r |
153 | UINT8 TargetContentDistributionEnabled :1;\r | |
154 | UINT8 UefiSpecificationSupported :1;\r | |
155 | UINT8 VirtualMachineSupported :1;\r | |
156 | UINT8 ExtensionByte2Reserved :3;\r | |
98cb9ae8 | 157 | } MBCE_SYSTEM_RESERVED;\r |
158 | \r | |
159 | ///\r | |
af2dc6a7 | 160 | /// BIOS Characteristics Extension Bytes.\r |
98cb9ae8 | 161 | ///\r |
162 | typedef struct {\r | |
163 | MBCE_BIOS_RESERVED BiosReserved;\r | |
164 | MBCE_SYSTEM_RESERVED SystemReserved;\r | |
98cb9ae8 | 165 | } MISC_BIOS_CHARACTERISTICS_EXTENSION;\r |
166 | \r | |
4135253b | 167 | ///\r |
af2dc6a7 | 168 | /// BIOS Information (Type 0).\r |
4135253b | 169 | ///\r |
61ce5861 | 170 | typedef struct {\r |
98cb9ae8 | 171 | SMBIOS_STRUCTURE Hdr;\r |
172 | SMBIOS_TABLE_STRING Vendor;\r | |
173 | SMBIOS_TABLE_STRING BiosVersion;\r | |
174 | UINT16 BiosSegment;\r | |
175 | SMBIOS_TABLE_STRING BiosReleaseDate;\r | |
176 | UINT8 BiosSize;\r | |
177 | MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r | |
178 | UINT8 BIOSCharacteristicsExtensionBytes[2];\r | |
179 | UINT8 SystemBiosMajorRelease;\r | |
180 | UINT8 SystemBiosMinorRelease;\r | |
181 | UINT8 EmbeddedControllerFirmwareMajorRelease;\r | |
182 | UINT8 EmbeddedControllerFirmwareMinorRelease;\r | |
61ce5861 | 183 | } SMBIOS_TABLE_TYPE0;\r |
184 | \r | |
98cb9ae8 | 185 | ///\r |
af2dc6a7 | 186 | /// System Wake-up Type.\r |
98cb9ae8 | 187 | ///\r |
188 | typedef enum { \r | |
189 | SystemWakeupTypeReserved = 0x00,\r | |
190 | SystemWakeupTypeOther = 0x01,\r | |
191 | SystemWakeupTypeUnknown = 0x02,\r | |
192 | SystemWakeupTypeApmTimer = 0x03,\r | |
193 | SystemWakeupTypeModemRing = 0x04,\r | |
194 | SystemWakeupTypeLanRemote = 0x05,\r | |
195 | SystemWakeupTypePowerSwitch = 0x06,\r | |
196 | SystemWakeupTypePciPme = 0x07,\r | |
197 | SystemWakeupTypeAcPowerRestored = 0x08\r | |
198 | } MISC_SYSTEM_WAKEUP_TYPE;\r | |
199 | \r | |
4135253b | 200 | ///\r |
af2dc6a7 | 201 | /// System Information (Type 1).\r |
98cb9ae8 | 202 | /// \r |
203 | /// The information in this structure defines attributes of the overall system and is \r | |
204 | /// intended to be associated with the Component ID group of the system's MIF.\r | |
205 | /// An SMBIOS implementation is associated with a single system instance and contains \r | |
206 | /// one and only one System Information (Type 1) structure.\r | |
4135253b | 207 | ///\r |
61ce5861 | 208 | typedef struct {\r |
98cb9ae8 | 209 | SMBIOS_STRUCTURE Hdr;\r |
210 | SMBIOS_TABLE_STRING Manufacturer;\r | |
211 | SMBIOS_TABLE_STRING ProductName;\r | |
212 | SMBIOS_TABLE_STRING Version;\r | |
213 | SMBIOS_TABLE_STRING SerialNumber;\r | |
214 | GUID Uuid;\r | |
af2dc6a7 | 215 | UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r |
98cb9ae8 | 216 | SMBIOS_TABLE_STRING SKUNumber;\r |
217 | SMBIOS_TABLE_STRING Family;\r | |
61ce5861 | 218 | } SMBIOS_TABLE_TYPE1;\r |
219 | \r | |
98cb9ae8 | 220 | ///\r |
af2dc6a7 | 221 | /// Base Board - Feature Flags. \r |
98cb9ae8 | 222 | ///\r |
223 | typedef struct {\r | |
224 | UINT8 Motherboard :1;\r | |
225 | UINT8 RequiresDaughterCard :1;\r | |
226 | UINT8 Removable :1;\r | |
227 | UINT8 Replaceable :1;\r | |
228 | UINT8 HotSwappable :1;\r | |
229 | UINT8 Reserved :3;\r | |
230 | } BASE_BOARD_FEATURE_FLAGS;\r | |
231 | \r | |
232 | ///\r | |
af2dc6a7 | 233 | /// Base Board - Board Type.\r |
98cb9ae8 | 234 | ///\r |
235 | typedef enum { \r | |
236 | BaseBoardTypeUnknown = 0x1,\r | |
237 | BaseBoardTypeOther = 0x2,\r | |
238 | BaseBoardTypeServerBlade = 0x3,\r | |
239 | BaseBoardTypeConnectivitySwitch = 0x4,\r | |
240 | BaseBoardTypeSystemManagementModule = 0x5,\r | |
241 | BaseBoardTypeProcessorModule = 0x6,\r | |
242 | BaseBoardTypeIOModule = 0x7,\r | |
243 | BaseBoardTypeMemoryModule = 0x8,\r | |
244 | BaseBoardTypeDaughterBoard = 0x9,\r | |
245 | BaseBoardTypeMotherBoard = 0xA,\r | |
246 | BaseBoardTypeProcessorMemoryModule = 0xB,\r | |
247 | BaseBoardTypeProcessorIOModule = 0xC,\r | |
248 | BaseBoardTypeInterconnectBoard = 0xD\r | |
249 | } BASE_BOARD_TYPE;\r | |
250 | \r | |
4135253b | 251 | ///\r |
af2dc6a7 | 252 | /// Base Board (or Module) Information (Type 2).\r |
4135253b | 253 | ///\r |
1f9f8414 | 254 | /// The information in this structure defines attributes of a system baseboard - \r |
98cb9ae8 | 255 | /// for example a motherboard, planar, or server blade or other standard system module.\r |
256 | ///\r | |
61ce5861 | 257 | typedef struct {\r |
98cb9ae8 | 258 | SMBIOS_STRUCTURE Hdr;\r |
259 | SMBIOS_TABLE_STRING Manufacturer;\r | |
260 | SMBIOS_TABLE_STRING ProductName;\r | |
261 | SMBIOS_TABLE_STRING Version;\r | |
262 | SMBIOS_TABLE_STRING SerialNumber;\r | |
263 | SMBIOS_TABLE_STRING AssetTag;\r | |
264 | BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r | |
265 | SMBIOS_TABLE_STRING LocationInChassis;\r | |
266 | UINT16 ChassisHandle;\r | |
af2dc6a7 | 267 | UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r |
98cb9ae8 | 268 | UINT8 NumberOfContainedObjectHandles;\r |
269 | UINT16 ContainedObjectHandles[1];\r | |
61ce5861 | 270 | } SMBIOS_TABLE_TYPE2;\r |
271 | \r | |
98cb9ae8 | 272 | ///\r |
273 | /// System Enclosure or Chassis Types\r | |
274 | ///\r | |
275 | typedef enum { \r | |
276 | MiscChassisTypeOther = 0x01,\r | |
277 | MiscChassisTypeUnknown = 0x02,\r | |
278 | MiscChassisTypeDeskTop = 0x03,\r | |
279 | MiscChassisTypeLowProfileDesktop = 0x04,\r | |
280 | MiscChassisTypePizzaBox = 0x05,\r | |
281 | MiscChassisTypeMiniTower = 0x06,\r | |
282 | MiscChassisTypeTower = 0x07,\r | |
283 | MiscChassisTypePortable = 0x08,\r | |
284 | MiscChassisTypeLapTop = 0x09,\r | |
285 | MiscChassisTypeNotebook = 0x0A,\r | |
286 | MiscChassisTypeHandHeld = 0x0B,\r | |
287 | MiscChassisTypeDockingStation = 0x0C,\r | |
288 | MiscChassisTypeAllInOne = 0x0D,\r | |
289 | MiscChassisTypeSubNotebook = 0x0E,\r | |
290 | MiscChassisTypeSpaceSaving = 0x0F,\r | |
291 | MiscChassisTypeLunchBox = 0x10,\r | |
292 | MiscChassisTypeMainServerChassis = 0x11,\r | |
293 | MiscChassisTypeExpansionChassis = 0x12,\r | |
294 | MiscChassisTypeSubChassis = 0x13,\r | |
295 | MiscChassisTypeBusExpansionChassis = 0x14,\r | |
296 | MiscChassisTypePeripheralChassis = 0x15,\r | |
297 | MiscChassisTypeRaidChassis = 0x16,\r | |
298 | MiscChassisTypeRackMountChassis = 0x17,\r | |
299 | MiscChassisTypeSealedCasePc = 0x18,\r | |
300 | MiscChassisMultiSystemChassis = 0x19,\r | |
301 | MiscChassisCompactPCI = 0x1A,\r | |
302 | MiscChassisAdvancedTCA = 0x1B,\r | |
303 | MiscChassisBlade = 0x1C,\r | |
304 | MiscChassisBladeEnclosure = 0x1D\r | |
305 | } MISC_CHASSIS_TYPE;\r | |
306 | \r | |
307 | ///\r | |
af2dc6a7 | 308 | /// System Enclosure or Chassis States .\r |
98cb9ae8 | 309 | ///\r |
310 | typedef enum { \r | |
311 | ChassisStateOther = 0x01,\r | |
312 | ChassisStateUnknown = 0x02,\r | |
313 | ChassisStateSafe = 0x03,\r | |
314 | ChassisStateWarning = 0x04,\r | |
315 | ChassisStateCritical = 0x05,\r | |
316 | ChassisStateNonRecoverable = 0x06\r | |
317 | } MISC_CHASSIS_STATE;\r | |
318 | \r | |
319 | ///\r | |
af2dc6a7 | 320 | /// System Enclosure or Chassis Security Status.\r |
98cb9ae8 | 321 | ///\r |
322 | typedef enum { \r | |
323 | ChassisSecurityStatusOther = 0x01,\r | |
324 | ChassisSecurityStatusUnknown = 0x02,\r | |
325 | ChassisSecurityStatusNone = 0x03,\r | |
326 | ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r | |
327 | ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r | |
328 | } MISC_CHASSIS_SECURITY_STATE;\r | |
329 | \r | |
bf7ea009 | 330 | ///\r |
331 | /// Contained Element record\r | |
332 | ///\r | |
61ce5861 | 333 | typedef struct {\r |
334 | UINT8 ContainedElementType;\r | |
335 | UINT8 ContainedElementMinimum;\r | |
336 | UINT8 ContainedElementMaximum;\r | |
337 | } CONTAINED_ELEMENT;\r | |
338 | \r | |
98cb9ae8 | 339 | \r |
4135253b | 340 | ///\r |
af2dc6a7 | 341 | /// System Enclosure or Chassis (Type 3).\r |
4135253b | 342 | ///\r |
98cb9ae8 | 343 | /// The information in this structure defines attributes of the system's mechanical enclosure(s). \r |
344 | /// For example, if a system included a separate enclosure for its peripheral devices, \r | |
345 | /// two structures would be returned: one for the main, system enclosure and the second for\r | |
346 | /// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r | |
347 | /// support the population of the CIM_Chassis class. \r | |
348 | ///\r | |
61ce5861 | 349 | typedef struct {\r |
98cb9ae8 | 350 | SMBIOS_STRUCTURE Hdr;\r |
351 | SMBIOS_TABLE_STRING Manufacturer;\r | |
352 | UINT8 Type;\r | |
353 | SMBIOS_TABLE_STRING Version;\r | |
354 | SMBIOS_TABLE_STRING SerialNumber;\r | |
355 | SMBIOS_TABLE_STRING AssetTag;\r | |
af2dc6a7 | 356 | UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r |
357 | UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
358 | UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r | |
359 | UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r | |
98cb9ae8 | 360 | UINT8 OemDefined[4];\r |
361 | UINT8 Height;\r | |
362 | UINT8 NumberofPowerCords;\r | |
363 | UINT8 ContainedElementCount;\r | |
364 | UINT8 ContainedElementRecordLength;\r | |
365 | CONTAINED_ELEMENT ContainedElements[1];\r | |
61ce5861 | 366 | } SMBIOS_TABLE_TYPE3;\r |
367 | \r | |
98cb9ae8 | 368 | ///\r |
af2dc6a7 | 369 | /// Processor Information - Processor Type.\r |
98cb9ae8 | 370 | ///\r |
371 | typedef enum {\r | |
372 | ProcessorOther = 0x01,\r | |
373 | ProcessorUnknown = 0x02,\r | |
374 | CentralProcessor = 0x03,\r | |
375 | MathProcessor = 0x04,\r | |
376 | DspProcessor = 0x05,\r | |
377 | VideoProcessor = 0x06\r | |
378 | } PROCESSOR_TYPE_DATA;\r | |
379 | \r | |
380 | ///\r | |
af2dc6a7 | 381 | /// Processor Information - Processor Family.\r |
98cb9ae8 | 382 | ///\r |
383 | typedef enum {\r | |
384 | ProcessorFamilyOther = 0x01, \r | |
385 | ProcessorFamilyUnknown = 0x02,\r | |
386 | ProcessorFamily8086 = 0x03, \r | |
387 | ProcessorFamily80286 = 0x04,\r | |
388 | ProcessorFamilyIntel386 = 0x05, \r | |
389 | ProcessorFamilyIntel486 = 0x06,\r | |
390 | ProcessorFamily8087 = 0x07,\r | |
391 | ProcessorFamily80287 = 0x08,\r | |
392 | ProcessorFamily80387 = 0x09, \r | |
393 | ProcessorFamily80487 = 0x0A,\r | |
394 | ProcessorFamilyPentium = 0x0B, \r | |
395 | ProcessorFamilyPentiumPro = 0x0C,\r | |
396 | ProcessorFamilyPentiumII = 0x0D,\r | |
397 | ProcessorFamilyPentiumMMX = 0x0E,\r | |
398 | ProcessorFamilyCeleron = 0x0F,\r | |
399 | ProcessorFamilyPentiumIIXeon = 0x10,\r | |
400 | ProcessorFamilyPentiumIII = 0x11, \r | |
401 | ProcessorFamilyM1 = 0x12,\r | |
402 | ProcessorFamilyM2 = 0x13,\r | |
119c1688 SZ |
403 | ProcessorFamilyIntelCeleronM = 0x14,\r |
404 | ProcessorFamilyIntelPentium4Ht = 0x15,\r | |
98cb9ae8 | 405 | ProcessorFamilyAmdDuron = 0x18,\r |
406 | ProcessorFamilyK5 = 0x19, \r | |
407 | ProcessorFamilyK6 = 0x1A,\r | |
408 | ProcessorFamilyK6_2 = 0x1B,\r | |
409 | ProcessorFamilyK6_3 = 0x1C,\r | |
410 | ProcessorFamilyAmdAthlon = 0x1D,\r | |
411 | ProcessorFamilyAmd29000 = 0x1E,\r | |
412 | ProcessorFamilyK6_2Plus = 0x1F,\r | |
413 | ProcessorFamilyPowerPC = 0x20,\r | |
414 | ProcessorFamilyPowerPC601 = 0x21,\r | |
415 | ProcessorFamilyPowerPC603 = 0x22,\r | |
416 | ProcessorFamilyPowerPC603Plus = 0x23,\r | |
417 | ProcessorFamilyPowerPC604 = 0x24,\r | |
418 | ProcessorFamilyPowerPC620 = 0x25,\r | |
419 | ProcessorFamilyPowerPCx704 = 0x26,\r | |
420 | ProcessorFamilyPowerPC750 = 0x27,\r | |
3507ab19 | 421 | ProcessorFamilyIntelCoreDuo = 0x28,\r |
422 | ProcessorFamilyIntelCoreDuoMobile = 0x29,\r | |
423 | ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r | |
424 | ProcessorFamilyIntelAtom = 0x2B,\r | |
98cb9ae8 | 425 | ProcessorFamilyAlpha3 = 0x30,\r |
426 | ProcessorFamilyAlpha21064 = 0x31,\r | |
427 | ProcessorFamilyAlpha21066 = 0x32,\r | |
428 | ProcessorFamilyAlpha21164 = 0x33,\r | |
429 | ProcessorFamilyAlpha21164PC = 0x34,\r | |
430 | ProcessorFamilyAlpha21164a = 0x35,\r | |
431 | ProcessorFamilyAlpha21264 = 0x36,\r | |
432 | ProcessorFamilyAlpha21364 = 0x37,\r | |
7ddba202 SZ |
433 | ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r |
434 | ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r | |
435 | ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r | |
436 | ProcessorFamilyAmdOpteron6100Series = 0x3B,\r | |
437 | ProcessorFamilyAmdOpteron4100Series = 0x3C,\r | |
438 | ProcessorFamilyAmdOpteron6200Series = 0x3D,\r | |
439 | ProcessorFamilyAmdOpteron4200Series = 0x3E,\r | |
98cb9ae8 | 440 | ProcessorFamilyMips = 0x40,\r |
441 | ProcessorFamilyMIPSR4000 = 0x41,\r | |
442 | ProcessorFamilyMIPSR4200 = 0x42,\r | |
443 | ProcessorFamilyMIPSR4400 = 0x43,\r | |
444 | ProcessorFamilyMIPSR4600 = 0x44,\r | |
445 | ProcessorFamilyMIPSR10000 = 0x45,\r | |
7ddba202 SZ |
446 | ProcessorFamilyAmdCSeries = 0x46,\r |
447 | ProcessorFamilyAmdESeries = 0x47,\r | |
448 | ProcessorFamilyAmdSSeries = 0x48,\r | |
449 | ProcessorFamilyAmdGSeries = 0x49,\r | |
98cb9ae8 | 450 | ProcessorFamilySparc = 0x50,\r |
451 | ProcessorFamilySuperSparc = 0x51,\r | |
452 | ProcessorFamilymicroSparcII = 0x52,\r | |
453 | ProcessorFamilymicroSparcIIep = 0x53,\r | |
454 | ProcessorFamilyUltraSparc = 0x54,\r | |
455 | ProcessorFamilyUltraSparcII = 0x55,\r | |
456 | ProcessorFamilyUltraSparcIIi = 0x56,\r | |
457 | ProcessorFamilyUltraSparcIII = 0x57,\r | |
458 | ProcessorFamilyUltraSparcIIIi = 0x58,\r | |
459 | ProcessorFamily68040 = 0x60,\r | |
460 | ProcessorFamily68xxx = 0x61,\r | |
461 | ProcessorFamily68000 = 0x62,\r | |
462 | ProcessorFamily68010 = 0x63,\r | |
463 | ProcessorFamily68020 = 0x64,\r | |
464 | ProcessorFamily68030 = 0x65,\r | |
465 | ProcessorFamilyHobbit = 0x70,\r | |
466 | ProcessorFamilyCrusoeTM5000 = 0x78,\r | |
467 | ProcessorFamilyCrusoeTM3000 = 0x79,\r | |
468 | ProcessorFamilyEfficeonTM8000 = 0x7A,\r | |
469 | ProcessorFamilyWeitek = 0x80,\r | |
470 | ProcessorFamilyItanium = 0x82,\r | |
471 | ProcessorFamilyAmdAthlon64 = 0x83,\r | |
472 | ProcessorFamilyAmdOpteron = 0x84,\r | |
473 | ProcessorFamilyAmdSempron = 0x85,\r | |
474 | ProcessorFamilyAmdTurion64Mobile = 0x86,\r | |
475 | ProcessorFamilyDualCoreAmdOpteron = 0x87,\r | |
476 | ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r | |
477 | ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r | |
3507ab19 | 478 | ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r |
479 | ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r | |
480 | ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r | |
481 | ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r | |
482 | ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r | |
483 | ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r | |
98cb9ae8 | 484 | ProcessorFamilyPARISC = 0x90,\r |
485 | ProcessorFamilyPaRisc8500 = 0x91,\r | |
486 | ProcessorFamilyPaRisc8000 = 0x92,\r | |
487 | ProcessorFamilyPaRisc7300LC = 0x93,\r | |
488 | ProcessorFamilyPaRisc7200 = 0x94,\r | |
489 | ProcessorFamilyPaRisc7100LC = 0x95,\r | |
490 | ProcessorFamilyPaRisc7100 = 0x96,\r | |
491 | ProcessorFamilyV30 = 0xA0,\r | |
3507ab19 | 492 | ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r |
493 | ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r | |
494 | ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r | |
495 | ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r | |
496 | ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r | |
497 | ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r | |
498 | ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r | |
499 | ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r | |
500 | ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r | |
501 | ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r | |
502 | ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r | |
503 | ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r | |
504 | ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r | |
505 | ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r | |
506 | ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r | |
98cb9ae8 | 507 | ProcessorFamilyPentiumIIIXeon = 0xB0,\r |
508 | ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r | |
509 | ProcessorFamilyPentium4 = 0xB2,\r | |
510 | ProcessorFamilyIntelXeon = 0xB3,\r | |
511 | ProcessorFamilyAS400 = 0xB4,\r | |
512 | ProcessorFamilyIntelXeonMP = 0xB5,\r | |
513 | ProcessorFamilyAMDAthlonXP = 0xB6,\r | |
514 | ProcessorFamilyAMDAthlonMP = 0xB7,\r | |
515 | ProcessorFamilyIntelItanium2 = 0xB8,\r | |
516 | ProcessorFamilyIntelPentiumM = 0xB9,\r | |
517 | ProcessorFamilyIntelCeleronD = 0xBA,\r | |
518 | ProcessorFamilyIntelPentiumD = 0xBB,\r | |
519 | ProcessorFamilyIntelPentiumEx = 0xBC,\r | |
6800ac83 | 520 | ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value\r |
98cb9ae8 | 521 | ProcessorFamilyReserved = 0xBE,\r |
522 | ProcessorFamilyIntelCore2 = 0xBF,\r | |
3507ab19 | 523 | ProcessorFamilyIntelCore2Solo = 0xC0,\r |
524 | ProcessorFamilyIntelCore2Extreme = 0xC1,\r | |
525 | ProcessorFamilyIntelCore2Quad = 0xC2,\r | |
526 | ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r | |
527 | ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r | |
528 | ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r | |
529 | ProcessorFamilyIntelCoreI7 = 0xC6,\r | |
530 | ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r | |
98cb9ae8 | 531 | ProcessorFamilyIBM390 = 0xC8,\r |
532 | ProcessorFamilyG4 = 0xC9,\r | |
533 | ProcessorFamilyG5 = 0xCA,\r | |
534 | ProcessorFamilyG6 = 0xCB,\r | |
535 | ProcessorFamilyzArchitectur = 0xCC,\r | |
7ddba202 SZ |
536 | ProcessorFamilyIntelCoreI5 = 0xCD,\r |
537 | ProcessorFamilyIntelCoreI3 = 0xCE,\r | |
98cb9ae8 | 538 | ProcessorFamilyViaC7M = 0xD2,\r |
539 | ProcessorFamilyViaC7D = 0xD3,\r | |
540 | ProcessorFamilyViaC7 = 0xD4,\r | |
541 | ProcessorFamilyViaEden = 0xD5,\r | |
3507ab19 | 542 | ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r |
543 | ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r | |
544 | ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r | |
7ddba202 | 545 | ProcessorFamilyViaNano = 0xD9,\r |
3507ab19 | 546 | ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r |
547 | ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r | |
548 | ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r | |
549 | ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r | |
550 | ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r | |
7ddba202 | 551 | ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r |
3507ab19 | 552 | ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r |
553 | ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r | |
554 | ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r | |
555 | ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r | |
556 | ProcessorFamilyAmdAthlonDualCore = 0xEA,\r | |
557 | ProcessorFamilyAmdSempronSI = 0xEB,\r | |
7ddba202 SZ |
558 | ProcessorFamilyAmdPhenomII = 0xEC,\r |
559 | ProcessorFamilyAmdAthlonII = 0xED,\r | |
560 | ProcessorFamilySixCoreAmdOpteron = 0xEE,\r | |
561 | ProcessorFamilyAmdSempronM = 0xEF,\r | |
98cb9ae8 | 562 | ProcessorFamilyi860 = 0xFA,\r |
563 | ProcessorFamilyi960 = 0xFB,\r | |
564 | ProcessorFamilyIndicatorFamily2 = 0xFE,\r | |
565 | ProcessorFamilyReserved1 = 0xFF\r | |
566 | } PROCESSOR_FAMILY_DATA;\r | |
567 | \r | |
f9ed6c93 YL |
568 | ///\r |
569 | /// Processor Information2 - Processor Family2.\r | |
570 | ///\r | |
571 | typedef enum {\r | |
572 | ProcessorFamilySH3 = 0x0104,\r | |
573 | ProcessorFamilySH4 = 0x0105,\r | |
574 | ProcessorFamilyARM = 0x0118,\r | |
575 | ProcessorFamilyStrongARM = 0x0119,\r | |
576 | ProcessorFamily6x86 = 0x012C,\r | |
577 | ProcessorFamilyMediaGX = 0x012D,\r | |
578 | ProcessorFamilyMII = 0x012E,\r | |
579 | ProcessorFamilyWinChip = 0x0140,\r | |
580 | ProcessorFamilyDSP = 0x015E,\r | |
581 | ProcessorFamilyVideoProcessor = 0x01F4\r | |
582 | } PROCESSOR_FAMILY2_DATA;\r | |
583 | \r | |
98cb9ae8 | 584 | ///\r |
af2dc6a7 | 585 | /// Processor Information - Voltage. \r |
98cb9ae8 | 586 | ///\r |
587 | typedef struct {\r | |
6800ac83 | 588 | UINT8 ProcessorVoltageCapability5V :1; \r |
589 | UINT8 ProcessorVoltageCapability3_3V :1; \r | |
590 | UINT8 ProcessorVoltageCapability2_9V :1; \r | |
591 | UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r | |
592 | UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r | |
593 | UINT8 ProcessorVoltageIndicateLegacy :1;\r | |
98cb9ae8 | 594 | } PROCESSOR_VOLTAGE;\r |
595 | \r | |
596 | ///\r | |
af2dc6a7 | 597 | /// Processor Information - Processor Upgrade.\r |
98cb9ae8 | 598 | ///\r |
599 | typedef enum {\r | |
600 | ProcessorUpgradeOther = 0x01,\r | |
601 | ProcessorUpgradeUnknown = 0x02,\r | |
602 | ProcessorUpgradeDaughterBoard = 0x03,\r | |
603 | ProcessorUpgradeZIFSocket = 0x04,\r | |
af2dc6a7 | 604 | ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r |
98cb9ae8 | 605 | ProcessorUpgradeNone = 0x06,\r |
606 | ProcessorUpgradeLIFSocket = 0x07,\r | |
607 | ProcessorUpgradeSlot1 = 0x08,\r | |
608 | ProcessorUpgradeSlot2 = 0x09,\r | |
609 | ProcessorUpgrade370PinSocket = 0x0A,\r | |
610 | ProcessorUpgradeSlotA = 0x0B,\r | |
611 | ProcessorUpgradeSlotM = 0x0C,\r | |
612 | ProcessorUpgradeSocket423 = 0x0D,\r | |
af2dc6a7 | 613 | ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r |
98cb9ae8 | 614 | ProcessorUpgradeSocket478 = 0x0F,\r |
615 | ProcessorUpgradeSocket754 = 0x10,\r | |
616 | ProcessorUpgradeSocket940 = 0x11,\r | |
617 | ProcessorUpgradeSocket939 = 0x12,\r | |
618 | ProcessorUpgradeSocketmPGA604 = 0x13,\r | |
619 | ProcessorUpgradeSocketLGA771 = 0x14,\r | |
620 | ProcessorUpgradeSocketLGA775 = 0x15,\r | |
621 | ProcessorUpgradeSocketS1 = 0x16,\r | |
622 | ProcessorUpgradeAM2 = 0x17,\r | |
3507ab19 | 623 | ProcessorUpgradeF1207 = 0x18,\r |
7ddba202 SZ |
624 | ProcessorSocketLGA1366 = 0x19,\r |
625 | ProcessorUpgradeSocketG34 = 0x1A,\r | |
626 | ProcessorUpgradeSocketAM3 = 0x1B,\r | |
627 | ProcessorUpgradeSocketC32 = 0x1C,\r | |
628 | ProcessorUpgradeSocketLGA1156 = 0x1D,\r | |
629 | ProcessorUpgradeSocketLGA1567 = 0x1E,\r | |
630 | ProcessorUpgradeSocketPGA988A = 0x1F,\r | |
631 | ProcessorUpgradeSocketBGA1288 = 0x20,\r | |
632 | ProcessorUpgradeSocketrPGA988B = 0x21,\r | |
633 | ProcessorUpgradeSocketBGA1023 = 0x22,\r | |
634 | ProcessorUpgradeSocketBGA1224 = 0x23,\r | |
635 | ProcessorUpgradeSocketBGA1155 = 0x24,\r | |
636 | ProcessorUpgradeSocketLGA1356 = 0x25,\r | |
637 | ProcessorUpgradeSocketLGA2011 = 0x26,\r | |
638 | ProcessorUpgradeSocketFS1 = 0x27,\r | |
639 | ProcessorUpgradeSocketFS2 = 0x28,\r | |
640 | ProcessorUpgradeSocketFM1 = 0x29,\r | |
641 | ProcessorUpgradeSocketFM2 = 0x2A\r | |
98cb9ae8 | 642 | } PROCESSOR_UPGRADE;\r |
643 | \r | |
644 | ///\r | |
645 | /// Processor ID Field Description\r | |
646 | ///\r | |
647 | typedef struct {\r | |
648 | UINT32 ProcessorSteppingId:4;\r | |
649 | UINT32 ProcessorModel: 4;\r | |
650 | UINT32 ProcessorFamily: 4;\r | |
651 | UINT32 ProcessorType: 2;\r | |
652 | UINT32 ProcessorReserved1: 2;\r | |
653 | UINT32 ProcessorXModel: 4;\r | |
654 | UINT32 ProcessorXFamily: 8;\r | |
655 | UINT32 ProcessorReserved2: 4;\r | |
656 | } PROCESSOR_SIGNATURE;\r | |
657 | \r | |
98cb9ae8 | 658 | typedef struct {\r |
659 | UINT32 ProcessorFpu :1;\r | |
660 | UINT32 ProcessorVme :1;\r | |
661 | UINT32 ProcessorDe :1;\r | |
662 | UINT32 ProcessorPse :1;\r | |
663 | UINT32 ProcessorTsc :1;\r | |
664 | UINT32 ProcessorMsr :1;\r | |
665 | UINT32 ProcessorPae :1;\r | |
666 | UINT32 ProcessorMce :1;\r | |
667 | UINT32 ProcessorCx8 :1;\r | |
668 | UINT32 ProcessorApic :1;\r | |
669 | UINT32 ProcessorReserved1 :1;\r | |
670 | UINT32 ProcessorSep :1;\r | |
671 | UINT32 ProcessorMtrr :1;\r | |
672 | UINT32 ProcessorPge :1;\r | |
673 | UINT32 ProcessorMca :1;\r | |
674 | UINT32 ProcessorCmov :1;\r | |
675 | UINT32 ProcessorPat :1;\r | |
676 | UINT32 ProcessorPse36 :1;\r | |
677 | UINT32 ProcessorPsn :1;\r | |
678 | UINT32 ProcessorClfsh :1;\r | |
679 | UINT32 ProcessorReserved2 :1;\r | |
680 | UINT32 ProcessorDs :1;\r | |
681 | UINT32 ProcessorAcpi :1;\r | |
682 | UINT32 ProcessorMmx :1;\r | |
683 | UINT32 ProcessorFxsr :1;\r | |
684 | UINT32 ProcessorSse :1;\r | |
685 | UINT32 ProcessorSse2 :1;\r | |
686 | UINT32 ProcessorSs :1;\r | |
687 | UINT32 ProcessorReserved3 :1;\r | |
688 | UINT32 ProcessorTm :1;\r | |
689 | UINT32 ProcessorReserved4 :2;\r | |
690 | } PROCESSOR_FEATURE_FLAGS;\r | |
691 | \r | |
692 | typedef struct {\r | |
693 | PROCESSOR_SIGNATURE Signature;\r | |
98cb9ae8 | 694 | PROCESSOR_FEATURE_FLAGS FeatureFlags;\r |
6800ac83 | 695 | } PROCESSOR_ID_DATA;\r |
98cb9ae8 | 696 | \r |
4135253b | 697 | ///\r |
af2dc6a7 | 698 | /// Processor Information (Type 4).\r |
4135253b | 699 | ///\r |
98cb9ae8 | 700 | /// The information in this structure defines the attributes of a single processor; \r |
701 | /// a separate structure instance is provided for each system processor socket/slot. \r | |
702 | /// For example, a system with an IntelDX2 processor would have a single \r | |
af2dc6a7 | 703 | /// structure instance, while a system with an IntelSX2 processor would have a structure\r |
704 | /// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r | |
98cb9ae8 | 705 | ///\r |
61ce5861 | 706 | typedef struct { \r |
707 | SMBIOS_STRUCTURE Hdr;\r | |
2d5e30ef | 708 | SMBIOS_TABLE_STRING Socket;\r |
af2dc6a7 | 709 | UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r |
710 | UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r | |
61ce5861 | 711 | SMBIOS_TABLE_STRING ProcessorManufacture;\r |
98cb9ae8 | 712 | PROCESSOR_ID_DATA ProcessorId;\r |
61ce5861 | 713 | SMBIOS_TABLE_STRING ProcessorVersion;\r |
98cb9ae8 | 714 | PROCESSOR_VOLTAGE Voltage;\r |
61ce5861 | 715 | UINT16 ExternalClock;\r |
716 | UINT16 MaxSpeed;\r | |
717 | UINT16 CurrentSpeed;\r | |
718 | UINT8 Status;\r | |
af2dc6a7 | 719 | UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r |
61ce5861 | 720 | UINT16 L1CacheHandle;\r |
721 | UINT16 L2CacheHandle;\r | |
722 | UINT16 L3CacheHandle;\r | |
723 | SMBIOS_TABLE_STRING SerialNumber;\r | |
724 | SMBIOS_TABLE_STRING AssetTag;\r | |
725 | SMBIOS_TABLE_STRING PartNumber;\r | |
726 | //\r | |
727 | // Add for smbios 2.5\r | |
728 | //\r | |
729 | UINT8 CoreCount;\r | |
730 | UINT8 EnabledCoreCount;\r | |
731 | UINT8 ThreadCount;\r | |
732 | UINT16 ProcessorCharacteristics;\r | |
733 | //\r | |
734 | // Add for smbios 2.6\r | |
735 | //\r | |
736 | UINT16 ProcessorFamily2;\r | |
737 | } SMBIOS_TABLE_TYPE4;\r | |
738 | \r | |
98cb9ae8 | 739 | ///\r |
af2dc6a7 | 740 | /// Memory Controller Error Detecting Method.\r |
98cb9ae8 | 741 | ///\r |
742 | typedef enum { \r | |
743 | ErrorDetectingMethodOther = 0x01,\r | |
744 | ErrorDetectingMethodUnknown = 0x02,\r | |
745 | ErrorDetectingMethodNone = 0x03,\r | |
746 | ErrorDetectingMethodParity = 0x04,\r | |
747 | ErrorDetectingMethod32Ecc = 0x05,\r | |
748 | ErrorDetectingMethod64Ecc = 0x06,\r | |
749 | ErrorDetectingMethod128Ecc = 0x07,\r | |
750 | ErrorDetectingMethodCrc = 0x08\r | |
751 | } MEMORY_ERROR_DETECT_METHOD;\r | |
752 | \r | |
753 | ///\r | |
af2dc6a7 | 754 | /// Memory Controller Error Correcting Capability.\r |
98cb9ae8 | 755 | ///\r |
756 | typedef struct {\r | |
757 | UINT8 Other :1;\r | |
758 | UINT8 Unknown :1;\r | |
759 | UINT8 None :1;\r | |
760 | UINT8 SingleBitErrorCorrect :1;\r | |
761 | UINT8 DoubleBitErrorCorrect :1;\r | |
762 | UINT8 ErrorScrubbing :1;\r | |
763 | UINT8 Reserved :2;\r | |
764 | } MEMORY_ERROR_CORRECT_CAPABILITY;\r | |
765 | \r | |
766 | ///\r | |
af2dc6a7 | 767 | /// Memory Controller Information - Interleave Support.\r |
98cb9ae8 | 768 | ///\r |
769 | typedef enum { \r | |
770 | MemoryInterleaveOther = 0x01,\r | |
771 | MemoryInterleaveUnknown = 0x02,\r | |
772 | MemoryInterleaveOneWay = 0x03,\r | |
773 | MemoryInterleaveTwoWay = 0x04,\r | |
774 | MemoryInterleaveFourWay = 0x05,\r | |
775 | MemoryInterleaveEightWay = 0x06,\r | |
776 | MemoryInterleaveSixteenWay = 0x07\r | |
777 | } MEMORY_SUPPORT_INTERLEAVE_TYPE;\r | |
778 | \r | |
779 | ///\r | |
af2dc6a7 | 780 | /// Memory Controller Information - Memory Speeds.\r |
98cb9ae8 | 781 | ///\r |
782 | typedef struct {\r | |
783 | UINT16 Other :1;\r | |
784 | UINT16 Unknown :1;\r | |
785 | UINT16 SeventyNs:1;\r | |
786 | UINT16 SixtyNs :1;\r | |
787 | UINT16 FiftyNs :1;\r | |
788 | UINT16 Reserved :11;\r | |
789 | } MEMORY_SPEED_TYPE;\r | |
790 | \r | |
4135253b | 791 | ///\r |
af2dc6a7 | 792 | /// Memory Controller Information (Type 5, Obsolete).\r |
4135253b | 793 | ///\r |
98cb9ae8 | 794 | /// The information in this structure defines the attributes of the system's memory controller(s) \r |
795 | /// and the supported attributes of any memory-modules present in the sockets controlled by \r | |
796 | /// this controller. \r | |
797 | /// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r | |
af2dc6a7 | 798 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 799 | /// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r |
800 | /// choose to implement both memory description types to allow existing DMI browsers\r | |
801 | /// to properly display the system's memory attributes.\r | |
802 | ///\r | |
61ce5861 | 803 | typedef struct {\r |
98cb9ae8 | 804 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 805 | UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r |
98cb9ae8 | 806 | MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r |
af2dc6a7 | 807 | UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r |
808 | UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r | |
98cb9ae8 | 809 | UINT8 MaxMemoryModuleSize;\r |
810 | MEMORY_SPEED_TYPE SupportSpeed;\r | |
811 | UINT16 SupportMemoryType;\r | |
812 | UINT8 MemoryModuleVoltage;\r | |
813 | UINT8 AssociatedMemorySlotNum;\r | |
814 | UINT16 MemoryModuleConfigHandles[1];\r | |
61ce5861 | 815 | } SMBIOS_TABLE_TYPE5;\r |
816 | \r | |
98cb9ae8 | 817 | ///\r |
818 | /// Memory Module Information - Memory Types\r | |
819 | ///\r | |
820 | typedef struct {\r | |
821 | UINT16 Other :1;\r | |
822 | UINT16 Unknown :1;\r | |
823 | UINT16 Standard :1;\r | |
824 | UINT16 FastPageMode:1;\r | |
b4ab47ec | 825 | UINT16 Edo :1;\r |
98cb9ae8 | 826 | UINT16 Parity :1;\r |
b4ab47ec | 827 | UINT16 Ecc :1;\r |
828 | UINT16 Simm :1;\r | |
829 | UINT16 Dimm :1;\r | |
98cb9ae8 | 830 | UINT16 BurstEdo :1;\r |
b4ab47ec | 831 | UINT16 Sdram :1;\r |
98cb9ae8 | 832 | UINT16 Reserved :5;\r |
833 | } MEMORY_CURRENT_TYPE;\r | |
834 | \r | |
835 | ///\r | |
af2dc6a7 | 836 | /// Memory Module Information - Memory Size.\r |
98cb9ae8 | 837 | ///\r |
838 | typedef struct {\r | |
6800ac83 | 839 | UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r |
98cb9ae8 | 840 | UINT8 SingleOrDoubleBank :1;\r |
841 | } MEMORY_INSTALLED_ENABLED_SIZE;\r | |
842 | \r | |
4135253b | 843 | ///\r |
844 | /// Memory Module Information (Type 6, Obsolete)\r | |
845 | ///\r | |
98cb9ae8 | 846 | /// One Memory Module Information structure is included for each memory-module socket \r |
847 | /// in the system. The structure describes the speed, type, size, and error status\r | |
848 | /// of each system memory module. The supported attributes of each module are described \r | |
849 | /// by the "owning" Memory Controller Information structure. \r | |
850 | /// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r | |
af2dc6a7 | 851 | /// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r |
98cb9ae8 | 852 | /// and Memory Device (Type 17) structures should be used instead.\r |
853 | ///\r | |
61ce5861 | 854 | typedef struct {\r |
98cb9ae8 | 855 | SMBIOS_STRUCTURE Hdr;\r |
856 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
857 | UINT8 BankConnections;\r | |
858 | UINT8 CurrentSpeed;\r | |
859 | MEMORY_CURRENT_TYPE CurrentMemoryType;\r | |
860 | MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r | |
861 | MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r | |
862 | UINT8 ErrorStatus;\r | |
61ce5861 | 863 | } SMBIOS_TABLE_TYPE6;\r |
864 | \r | |
98cb9ae8 | 865 | ///\r |
af2dc6a7 | 866 | /// Cache Information - SRAM Type.\r |
98cb9ae8 | 867 | ///\r |
868 | typedef struct {\r | |
869 | UINT16 Other :1;\r | |
870 | UINT16 Unknown :1;\r | |
871 | UINT16 NonBurst :1;\r | |
872 | UINT16 Burst :1;\r | |
873 | UINT16 PipelineBurst :1;\r | |
98cb9ae8 | 874 | UINT16 Synchronous :1;\r |
53d90f04 | 875 | UINT16 Asynchronous :1;\r |
98cb9ae8 | 876 | UINT16 Reserved :9;\r |
877 | } CACHE_SRAM_TYPE_DATA;\r | |
878 | \r | |
879 | ///\r | |
af2dc6a7 | 880 | /// Cache Information - Error Correction Type.\r |
98cb9ae8 | 881 | ///\r |
882 | typedef enum {\r | |
883 | CacheErrorOther = 0x01,\r | |
884 | CacheErrorUnknown = 0x02,\r | |
885 | CacheErrorNone = 0x03,\r | |
886 | CacheErrorParity = 0x04,\r | |
6800ac83 | 887 | CacheErrorSingleBit = 0x05, ///< ECC\r |
888 | CacheErrorMultiBit = 0x06 ///< ECC\r | |
98cb9ae8 | 889 | } CACHE_ERROR_TYPE_DATA;\r |
890 | \r | |
891 | ///\r | |
af2dc6a7 | 892 | /// Cache Information - System Cache Type. \r |
98cb9ae8 | 893 | ///\r |
894 | typedef enum {\r | |
895 | CacheTypeOther = 0x01,\r | |
896 | CacheTypeUnknown = 0x02,\r | |
897 | CacheTypeInstruction = 0x03,\r | |
898 | CacheTypeData = 0x04,\r | |
899 | CacheTypeUnified = 0x05\r | |
900 | } CACHE_TYPE_DATA;\r | |
901 | \r | |
902 | ///\r | |
af2dc6a7 | 903 | /// Cache Information - Associativity. \r |
98cb9ae8 | 904 | ///\r |
905 | typedef enum {\r | |
906 | CacheAssociativityOther = 0x01,\r | |
907 | CacheAssociativityUnknown = 0x02,\r | |
908 | CacheAssociativityDirectMapped = 0x03,\r | |
909 | CacheAssociativity2Way = 0x04,\r | |
910 | CacheAssociativity4Way = 0x05,\r | |
911 | CacheAssociativityFully = 0x06,\r | |
912 | CacheAssociativity8Way = 0x07,\r | |
913 | CacheAssociativity16Way = 0x08,\r | |
3507ab19 | 914 | CacheAssociativity12Way = 0x09,\r |
915 | CacheAssociativity24Way = 0x0A,\r | |
916 | CacheAssociativity32Way = 0x0B,\r | |
917 | CacheAssociativity48Way = 0x0C,\r | |
7ddba202 SZ |
918 | CacheAssociativity64Way = 0x0D,\r |
919 | CacheAssociativity20Way = 0x0E\r | |
98cb9ae8 | 920 | } CACHE_ASSOCIATIVITY_DATA;\r |
921 | \r | |
4135253b | 922 | ///\r |
af2dc6a7 | 923 | /// Cache Information (Type 7).\r |
4135253b | 924 | ///\r |
af2dc6a7 | 925 | /// The information in this structure defines the attributes of CPU cache device in the system. \r |
98cb9ae8 | 926 | /// One structure is specified for each such device, whether the device is internal to\r |
927 | /// or external to the CPU module. Cache modules can be associated with a processor structure\r | |
af2dc6a7 | 928 | /// in one or two ways, depending on the SMBIOS version.\r |
98cb9ae8 | 929 | ///\r |
61ce5861 | 930 | typedef struct {\r |
98cb9ae8 | 931 | SMBIOS_STRUCTURE Hdr;\r |
932 | SMBIOS_TABLE_STRING SocketDesignation;\r | |
933 | UINT16 CacheConfiguration;\r | |
934 | UINT16 MaximumCacheSize;\r | |
935 | UINT16 InstalledSize;\r | |
936 | CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r | |
937 | CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r | |
938 | UINT8 CacheSpeed;\r | |
af2dc6a7 | 939 | UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r |
940 | UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r | |
941 | UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r | |
61ce5861 | 942 | } SMBIOS_TABLE_TYPE7;\r |
943 | \r | |
98cb9ae8 | 944 | ///\r |
af2dc6a7 | 945 | /// Port Connector Information - Connector Types. \r |
98cb9ae8 | 946 | ///\r |
947 | typedef enum {\r | |
948 | PortConnectorTypeNone = 0x00,\r | |
949 | PortConnectorTypeCentronics = 0x01,\r | |
950 | PortConnectorTypeMiniCentronics = 0x02,\r | |
951 | PortConnectorTypeProprietary = 0x03,\r | |
952 | PortConnectorTypeDB25Male = 0x04,\r | |
953 | PortConnectorTypeDB25Female = 0x05,\r | |
954 | PortConnectorTypeDB15Male = 0x06,\r | |
955 | PortConnectorTypeDB15Female = 0x07,\r | |
956 | PortConnectorTypeDB9Male = 0x08,\r | |
957 | PortConnectorTypeDB9Female = 0x09,\r | |
958 | PortConnectorTypeRJ11 = 0x0A,\r | |
959 | PortConnectorTypeRJ45 = 0x0B,\r | |
960 | PortConnectorType50PinMiniScsi = 0x0C,\r | |
961 | PortConnectorTypeMiniDin = 0x0D,\r | |
119c1688 | 962 | PortConnectorTypeMicroDin = 0x0E,\r |
98cb9ae8 | 963 | PortConnectorTypePS2 = 0x0F,\r |
964 | PortConnectorTypeInfrared = 0x10,\r | |
965 | PortConnectorTypeHpHil = 0x11,\r | |
966 | PortConnectorTypeUsb = 0x12,\r | |
967 | PortConnectorTypeSsaScsi = 0x13,\r | |
968 | PortConnectorTypeCircularDin8Male = 0x14,\r | |
969 | PortConnectorTypeCircularDin8Female = 0x15,\r | |
970 | PortConnectorTypeOnboardIde = 0x16,\r | |
971 | PortConnectorTypeOnboardFloppy = 0x17,\r | |
972 | PortConnectorType9PinDualInline = 0x18,\r | |
973 | PortConnectorType25PinDualInline = 0x19,\r | |
974 | PortConnectorType50PinDualInline = 0x1A,\r | |
975 | PortConnectorType68PinDualInline = 0x1B,\r | |
976 | PortConnectorTypeOnboardSoundInput = 0x1C,\r | |
977 | PortConnectorTypeMiniCentronicsType14 = 0x1D,\r | |
978 | PortConnectorTypeMiniCentronicsType26 = 0x1E,\r | |
979 | PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r | |
980 | PortConnectorTypeBNC = 0x20,\r | |
981 | PortConnectorType1394 = 0x21,\r | |
119c1688 | 982 | PortConnectorTypeSasSata = 0x22,\r |
98cb9ae8 | 983 | PortConnectorTypePC98 = 0xA0,\r |
984 | PortConnectorTypePC98Hireso = 0xA1,\r | |
985 | PortConnectorTypePCH98 = 0xA2,\r | |
986 | PortConnectorTypePC98Note = 0xA3,\r | |
987 | PortConnectorTypePC98Full = 0xA4,\r | |
988 | PortConnectorTypeOther = 0xFF\r | |
989 | } MISC_PORT_CONNECTOR_TYPE;\r | |
990 | \r | |
991 | ///\r | |
992 | /// Port Connector Information - Port Types \r | |
993 | ///\r | |
994 | typedef enum {\r | |
995 | PortTypeNone = 0x00,\r | |
996 | PortTypeParallelXtAtCompatible = 0x01,\r | |
997 | PortTypeParallelPortPs2 = 0x02,\r | |
998 | PortTypeParallelPortEcp = 0x03,\r | |
999 | PortTypeParallelPortEpp = 0x04,\r | |
1000 | PortTypeParallelPortEcpEpp = 0x05,\r | |
1001 | PortTypeSerialXtAtCompatible = 0x06,\r | |
1002 | PortTypeSerial16450Compatible = 0x07,\r | |
1003 | PortTypeSerial16550Compatible = 0x08,\r | |
1004 | PortTypeSerial16550ACompatible = 0x09,\r | |
1005 | PortTypeScsi = 0x0A,\r | |
1006 | PortTypeMidi = 0x0B,\r | |
1007 | PortTypeJoyStick = 0x0C,\r | |
1008 | PortTypeKeyboard = 0x0D,\r | |
1009 | PortTypeMouse = 0x0E,\r | |
1010 | PortTypeSsaScsi = 0x0F,\r | |
1011 | PortTypeUsb = 0x10,\r | |
1012 | PortTypeFireWire = 0x11,\r | |
1013 | PortTypePcmciaTypeI = 0x12,\r | |
1014 | PortTypePcmciaTypeII = 0x13,\r | |
1015 | PortTypePcmciaTypeIII = 0x14,\r | |
1016 | PortTypeCardBus = 0x15,\r | |
1017 | PortTypeAccessBusPort = 0x16,\r | |
1018 | PortTypeScsiII = 0x17,\r | |
1019 | PortTypeScsiWide = 0x18,\r | |
1020 | PortTypePC98 = 0x19,\r | |
1021 | PortTypePC98Hireso = 0x1A,\r | |
1022 | PortTypePCH98 = 0x1B,\r | |
1023 | PortTypeVideoPort = 0x1C,\r | |
1024 | PortTypeAudioPort = 0x1D,\r | |
1025 | PortTypeModemPort = 0x1E,\r | |
1026 | PortTypeNetworkPort = 0x1F,\r | |
1027 | PortType8251Compatible = 0xA0,\r | |
1028 | PortType8251FifoCompatible = 0xA1,\r | |
1029 | PortTypeOther = 0xFF\r | |
1030 | } MISC_PORT_TYPE;\r | |
1031 | \r | |
4135253b | 1032 | ///\r |
af2dc6a7 | 1033 | /// Port Connector Information (Type 8).\r |
4135253b | 1034 | ///\r |
98cb9ae8 | 1035 | /// The information in this structure defines the attributes of a system port connector, \r |
1f9f8414 | 1036 | /// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r |
98cb9ae8 | 1037 | /// are provided. One structure is present for each port provided by the system.\r |
1038 | ///\r | |
61ce5861 | 1039 | typedef struct {\r |
98cb9ae8 | 1040 | SMBIOS_STRUCTURE Hdr;\r |
1041 | SMBIOS_TABLE_STRING InternalReferenceDesignator;\r | |
af2dc6a7 | 1042 | UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
98cb9ae8 | 1043 | SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r |
af2dc6a7 | 1044 | UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r |
1045 | UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r | |
61ce5861 | 1046 | } SMBIOS_TABLE_TYPE8;\r |
1047 | \r | |
98cb9ae8 | 1048 | ///\r |
1049 | /// System Slots - Slot Type\r | |
1050 | ///\r | |
1051 | typedef enum {\r | |
1052 | SlotTypeOther = 0x01,\r | |
1053 | SlotTypeUnknown = 0x02,\r | |
1054 | SlotTypeIsa = 0x03,\r | |
1055 | SlotTypeMca = 0x04,\r | |
1056 | SlotTypeEisa = 0x05,\r | |
1057 | SlotTypePci = 0x06,\r | |
1058 | SlotTypePcmcia = 0x07,\r | |
1059 | SlotTypeVlVesa = 0x08,\r | |
1060 | SlotTypeProprietary = 0x09,\r | |
1061 | SlotTypeProcessorCardSlot = 0x0A,\r | |
1062 | SlotTypeProprietaryMemoryCardSlot = 0x0B,\r | |
1063 | SlotTypeIORiserCardSlot = 0x0C,\r | |
1064 | SlotTypeNuBus = 0x0D,\r | |
1065 | SlotTypePci66MhzCapable = 0x0E,\r | |
1066 | SlotTypeAgp = 0x0F,\r | |
1067 | SlotTypeApg2X = 0x10,\r | |
1068 | SlotTypeAgp4X = 0x11,\r | |
1069 | SlotTypePciX = 0x12,\r | |
1070 | SlotTypeAgp4x = 0x13,\r | |
1071 | SlotTypePC98C20 = 0xA0,\r | |
1072 | SlotTypePC98C24 = 0xA1,\r | |
1073 | SlotTypePC98E = 0xA2,\r | |
1074 | SlotTypePC98LocalBus = 0xA3,\r | |
1075 | SlotTypePC98Card = 0xA4,\r | |
1076 | SlotTypePciExpress = 0xA5,\r | |
1077 | SlotTypePciExpressX1 = 0xA6,\r | |
1078 | SlotTypePciExpressX2 = 0xA7,\r | |
1079 | SlotTypePciExpressX4 = 0xA8,\r | |
1080 | SlotTypePciExpressX8 = 0xA9,\r | |
3507ab19 | 1081 | SlotTypePciExpressX16 = 0xAA,\r |
1082 | SlotTypePciExpressGen2 = 0xAB,\r | |
1083 | SlotTypePciExpressGen2X1 = 0xAC,\r | |
1084 | SlotTypePciExpressGen2X2 = 0xAD,\r | |
1085 | SlotTypePciExpressGen2X4 = 0xAE,\r | |
1086 | SlotTypePciExpressGen2X8 = 0xAF,\r | |
7ddba202 SZ |
1087 | SlotTypePciExpressGen2X16 = 0xB0,\r |
1088 | SlotTypePciExpressGen3 = 0xB1,\r | |
1089 | SlotTypePciExpressGen3X1 = 0xB2,\r | |
1090 | SlotTypePciExpressGen3X2 = 0xB3,\r | |
1091 | SlotTypePciExpressGen3X4 = 0xB4,\r | |
1092 | SlotTypePciExpressGen3X8 = 0xB5,\r | |
1093 | SlotTypePciExpressGen3X16 = 0xB6\r | |
98cb9ae8 | 1094 | } MISC_SLOT_TYPE;\r |
1095 | \r | |
1096 | ///\r | |
af2dc6a7 | 1097 | /// System Slots - Slot Data Bus Width.\r |
98cb9ae8 | 1098 | ///\r |
1099 | typedef enum {\r | |
1100 | SlotDataBusWidthOther = 0x01,\r | |
1101 | SlotDataBusWidthUnknown = 0x02,\r | |
1102 | SlotDataBusWidth8Bit = 0x03,\r | |
1103 | SlotDataBusWidth16Bit = 0x04,\r | |
1104 | SlotDataBusWidth32Bit = 0x05,\r | |
1105 | SlotDataBusWidth64Bit = 0x06,\r | |
1106 | SlotDataBusWidth128Bit = 0x07,\r | |
6800ac83 | 1107 | SlotDataBusWidth1X = 0x08, ///< Or X1\r |
1108 | SlotDataBusWidth2X = 0x09, ///< Or X2\r | |
1109 | SlotDataBusWidth4X = 0x0A, ///< Or X4\r | |
1110 | SlotDataBusWidth8X = 0x0B, ///< Or X8\r | |
1111 | SlotDataBusWidth12X = 0x0C, ///< Or X12\r | |
1112 | SlotDataBusWidth16X = 0x0D, ///< Or X16\r | |
1113 | SlotDataBusWidth32X = 0x0E ///< Or X32\r | |
98cb9ae8 | 1114 | } MISC_SLOT_DATA_BUS_WIDTH;\r |
1115 | \r | |
1116 | ///\r | |
af2dc6a7 | 1117 | /// System Slots - Current Usage.\r |
98cb9ae8 | 1118 | ///\r |
1119 | typedef enum {\r | |
1120 | SlotUsageOther = 0x01,\r | |
1121 | SlotUsageUnknown = 0x02,\r | |
1122 | SlotUsageAvailable = 0x03,\r | |
1123 | SlotUsageInUse = 0x04\r | |
1124 | } MISC_SLOT_USAGE;\r | |
1125 | \r | |
1126 | ///\r | |
af2dc6a7 | 1127 | /// System Slots - Slot Length. \r |
98cb9ae8 | 1128 | ///\r |
1129 | typedef enum {\r | |
1130 | SlotLengthOther = 0x01,\r | |
1131 | SlotLengthUnknown = 0x02,\r | |
1132 | SlotLengthShort = 0x03,\r | |
1133 | SlotLengthLong = 0x04\r | |
1134 | } MISC_SLOT_LENGTH;\r | |
1135 | \r | |
1136 | ///\r | |
af2dc6a7 | 1137 | /// System Slots - Slot Characteristics 1. \r |
98cb9ae8 | 1138 | ///\r |
1139 | typedef struct {\r | |
1140 | UINT8 CharacteristicsUnknown :1;\r | |
1141 | UINT8 Provides50Volts :1;\r | |
1142 | UINT8 Provides33Volts :1;\r | |
1143 | UINT8 SharedSlot :1;\r | |
1144 | UINT8 PcCard16Supported :1;\r | |
1145 | UINT8 CardBusSupported :1;\r | |
1146 | UINT8 ZoomVideoSupported :1;\r | |
1147 | UINT8 ModemRingResumeSupported:1;\r | |
1148 | } MISC_SLOT_CHARACTERISTICS1;\r | |
1149 | ///\r | |
af2dc6a7 | 1150 | /// System Slots - Slot Characteristics 2. \r |
98cb9ae8 | 1151 | ///\r |
1152 | typedef struct {\r | |
1153 | UINT8 PmeSignalSupported :1;\r | |
1154 | UINT8 HotPlugDevicesSupported :1;\r | |
1155 | UINT8 SmbusSignalSupported :1;\r | |
6800ac83 | 1156 | UINT8 Reserved :5; ///< Set to 0.\r |
98cb9ae8 | 1157 | } MISC_SLOT_CHARACTERISTICS2;\r |
1158 | \r | |
4135253b | 1159 | ///\r |
1160 | /// System Slots (Type 9)\r | |
1161 | ///\r | |
98cb9ae8 | 1162 | /// The information in this structure defines the attributes of a system slot. \r |
1163 | /// One structure is provided for each slot in the system.\r | |
1164 | ///\r | |
1165 | ///\r | |
61ce5861 | 1166 | typedef struct {\r |
98cb9ae8 | 1167 | SMBIOS_STRUCTURE Hdr;\r |
1168 | SMBIOS_TABLE_STRING SlotDesignation;\r | |
af2dc6a7 | 1169 | UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r |
1170 | UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r | |
1171 | UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r | |
1172 | UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r | |
98cb9ae8 | 1173 | UINT16 SlotID;\r |
1174 | MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r | |
1175 | MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r | |
61ce5861 | 1176 | //\r |
1177 | // Add for smbios 2.6\r | |
1178 | //\r | |
98cb9ae8 | 1179 | UINT16 SegmentGroupNum;\r |
1180 | UINT8 BusNum;\r | |
1181 | UINT8 DevFuncNum;\r | |
61ce5861 | 1182 | } SMBIOS_TABLE_TYPE9;\r |
1183 | \r | |
98cb9ae8 | 1184 | ///\r |
af2dc6a7 | 1185 | /// On Board Devices Information - Device Types. \r |
98cb9ae8 | 1186 | ///\r |
1187 | typedef enum {\r | |
1188 | OnBoardDeviceTypeOther = 0x01,\r | |
1189 | OnBoardDeviceTypeUnknown = 0x02,\r | |
1190 | OnBoardDeviceTypeVideo = 0x03,\r | |
1191 | OnBoardDeviceTypeScsiController = 0x04,\r | |
1192 | OnBoardDeviceTypeEthernet = 0x05,\r | |
1193 | OnBoardDeviceTypeTokenRing = 0x06,\r | |
119c1688 SZ |
1194 | OnBoardDeviceTypeSound = 0x07,\r |
1195 | OnBoardDeviceTypePATAController = 0x08,\r | |
1196 | OnBoardDeviceTypeSATAController = 0x09,\r | |
1197 | OnBoardDeviceTypeSASController = 0x0A\r | |
98cb9ae8 | 1198 | } MISC_ONBOARD_DEVICE_TYPE;\r |
1199 | \r | |
bf7ea009 | 1200 | ///\r |
1201 | /// Device Item Entry\r | |
1202 | ///\r | |
61ce5861 | 1203 | typedef struct {\r |
af2dc6a7 | 1204 | UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r |
1205 | ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r | |
98cb9ae8 | 1206 | SMBIOS_TABLE_STRING DescriptionString;\r |
61ce5861 | 1207 | } DEVICE_STRUCT;\r |
1208 | \r | |
4135253b | 1209 | ///\r |
af2dc6a7 | 1210 | /// On Board Devices Information (Type 10, obsolete).\r |
4135253b | 1211 | ///\r |
98cb9ae8 | 1212 | /// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r |
1213 | /// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r | |
1214 | /// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r | |
1215 | /// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r | |
1216 | /// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r | |
1217 | /// has some level of control over the enabling of the associated device for use by the system.\r | |
1218 | ///\r | |
61ce5861 | 1219 | typedef struct {\r |
1220 | SMBIOS_STRUCTURE Hdr;\r | |
1221 | DEVICE_STRUCT Device[1];\r | |
1222 | } SMBIOS_TABLE_TYPE10;\r | |
1223 | \r | |
4135253b | 1224 | ///\r |
af2dc6a7 | 1225 | /// OEM Strings (Type 11).\r |
98cb9ae8 | 1226 | /// This structure contains free form strings defined by the OEM. Examples of this are: \r |
1227 | /// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r | |
4135253b | 1228 | ///\r |
61ce5861 | 1229 | typedef struct {\r |
1230 | SMBIOS_STRUCTURE Hdr;\r | |
1231 | UINT8 StringCount;\r | |
1232 | } SMBIOS_TABLE_TYPE11;\r | |
1233 | \r | |
4135253b | 1234 | ///\r |
af2dc6a7 | 1235 | /// System Configuration Options (Type 12).\r |
4135253b | 1236 | ///\r |
98cb9ae8 | 1237 | /// This structure contains information required to configure the base board's Jumpers and Switches. \r |
1238 | ///\r | |
61ce5861 | 1239 | typedef struct {\r |
1240 | SMBIOS_STRUCTURE Hdr;\r | |
1241 | UINT8 StringCount;\r | |
1242 | } SMBIOS_TABLE_TYPE12;\r | |
1243 | \r | |
98cb9ae8 | 1244 | \r |
4135253b | 1245 | ///\r |
af2dc6a7 | 1246 | /// BIOS Language Information (Type 13).\r |
4135253b | 1247 | ///\r |
98cb9ae8 | 1248 | /// The information in this structure defines the installable language attributes of the BIOS. \r |
1249 | /// \r | |
61ce5861 | 1250 | typedef struct {\r |
1251 | SMBIOS_STRUCTURE Hdr;\r | |
1252 | UINT8 InstallableLanguages;\r | |
1253 | UINT8 Flags;\r | |
fbfa4a1d | 1254 | UINT8 Reserved[15];\r |
61ce5861 | 1255 | SMBIOS_TABLE_STRING CurrentLanguages;\r |
1256 | } SMBIOS_TABLE_TYPE13;\r | |
1257 | \r | |
119c1688 SZ |
1258 | ///\r |
1259 | /// Group Item Entry\r | |
1260 | ///\r | |
1261 | typedef struct {\r | |
1262 | UINT8 ItemType;\r | |
1263 | UINT16 ItemHandle;\r | |
1264 | } GROUP_STRUCT;\r | |
1265 | \r | |
1266 | ///\r | |
1267 | /// Group Associations (Type 14).\r | |
1268 | ///\r | |
1269 | /// The Group Associations structure is provided for OEMs who want to specify \r | |
1270 | /// the arrangement or hierarchy of certain components (including other Group Associations) \r | |
1271 | /// within the system. \r | |
1272 | ///\r | |
1273 | typedef struct {\r | |
1274 | SMBIOS_STRUCTURE Hdr;\r | |
1275 | SMBIOS_TABLE_STRING GroupName;\r | |
1276 | GROUP_STRUCT Group[1];\r | |
1277 | } SMBIOS_TABLE_TYPE14;\r | |
1278 | \r | |
98cb9ae8 | 1279 | ///\r |
af2dc6a7 | 1280 | /// System Event Log - Event Log Types.\r |
98cb9ae8 | 1281 | /// \r |
1282 | typedef enum {\r | |
1283 | EventLogTypeReserved = 0x00,\r | |
1284 | EventLogTypeSingleBitECC = 0x01,\r | |
1285 | EventLogTypeMultiBitECC = 0x02,\r | |
1286 | EventLogTypeParityMemErr = 0x03,\r | |
1287 | EventLogTypeBusTimeOut = 0x04,\r | |
1288 | EventLogTypeIOChannelCheck = 0x05,\r | |
1289 | EventLogTypeSoftwareNMI = 0x06,\r | |
1290 | EventLogTypePOSTMemResize = 0x07,\r | |
1291 | EventLogTypePOSTErr = 0x08,\r | |
1292 | EventLogTypePCIParityErr = 0x09,\r | |
1293 | EventLogTypePCISystemErr = 0x0A,\r | |
1294 | EventLogTypeCPUFailure = 0x0B,\r | |
1295 | EventLogTypeEISATimeOut = 0x0C,\r | |
1296 | EventLogTypeMemLogDisabled = 0x0D,\r | |
1297 | EventLogTypeLoggingDisabled = 0x0E,\r | |
1298 | EventLogTypeSysLimitExce = 0x10,\r | |
1299 | EventLogTypeAsyncHWTimer = 0x11,\r | |
1300 | EventLogTypeSysConfigInfo = 0x12,\r | |
1301 | EventLogTypeHDInfo = 0x13,\r | |
1302 | EventLogTypeSysReconfig = 0x14,\r | |
1303 | EventLogTypeUncorrectCPUErr = 0x15,\r | |
1304 | EventLogTypeAreaResetAndClr = 0x16,\r | |
1305 | EventLogTypeSystemBoot = 0x17,\r | |
6800ac83 | 1306 | EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r |
1307 | EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r | |
98cb9ae8 | 1308 | EventLogTypeEndOfLog = 0xFF\r |
1309 | } EVENT_LOG_TYPE_DATA;\r | |
1310 | \r | |
1311 | ///\r | |
af2dc6a7 | 1312 | /// System Event Log - Variable Data Format Types. \r |
98cb9ae8 | 1313 | /// \r |
1314 | typedef enum {\r | |
1315 | EventLogVariableNone = 0x00,\r | |
1316 | EventLogVariableHandle = 0x01,\r | |
1317 | EventLogVariableMutilEvent = 0x02,\r | |
1318 | EventLogVariableMutilEventHandle = 0x03,\r | |
1319 | EventLogVariablePOSTResultBitmap = 0x04,\r | |
1320 | EventLogVariableSysManagementType = 0x05,\r | |
1321 | EventLogVariableMutliEventSysManagmentType = 0x06, \r | |
1322 | EventLogVariableUnused = 0x07,\r | |
1323 | EventLogVariableOEMAssigned = 0x80\r | |
55deb978 | 1324 | } EVENT_LOG_VARIABLE_DATA;\r |
98cb9ae8 | 1325 | \r |
98cb9ae8 | 1326 | ///\r |
1327 | /// Event Log Type Descriptors\r | |
1328 | ///\r | |
1329 | typedef struct {\r | |
af2dc6a7 | 1330 | UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r |
98cb9ae8 | 1331 | UINT8 DataFormatType;\r |
1332 | } EVENT_LOG_TYPE;\r | |
1333 | \r | |
4135253b | 1334 | ///\r |
af2dc6a7 | 1335 | /// System Event Log (Type 15).\r |
4135253b | 1336 | ///\r |
98cb9ae8 | 1337 | /// The presence of this structure within the SMBIOS data returned for a system indicates \r |
1338 | /// that the system supports an event log. An event log is a fixed-length area within a \r | |
1339 | /// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r | |
1340 | /// record, followed by one or more variable-length log records. \r | |
1341 | ///\r | |
61ce5861 | 1342 | typedef struct {\r |
1343 | SMBIOS_STRUCTURE Hdr;\r | |
1344 | UINT16 LogAreaLength;\r | |
1345 | UINT16 LogHeaderStartOffset;\r | |
1346 | UINT16 LogDataStartOffset;\r | |
1347 | UINT8 AccessMethod;\r | |
1348 | UINT8 LogStatus;\r | |
1349 | UINT32 LogChangeToken;\r | |
1350 | UINT32 AccessMethodAddress;\r | |
1351 | UINT8 LogHeaderFormat;\r | |
1352 | UINT8 NumberOfSupportedLogTypeDescriptors;\r | |
1353 | UINT8 LengthOfLogTypeDescriptor;\r | |
1354 | EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r | |
1355 | } SMBIOS_TABLE_TYPE15;\r | |
1356 | \r | |
98cb9ae8 | 1357 | ///\r |
af2dc6a7 | 1358 | /// Physical Memory Array - Location.\r |
98cb9ae8 | 1359 | ///\r |
1360 | typedef enum {\r | |
1361 | MemoryArrayLocationOther = 0x01,\r | |
1362 | MemoryArrayLocationUnknown = 0x02,\r | |
1363 | MemoryArrayLocationSystemBoard = 0x03,\r | |
1364 | MemoryArrayLocationIsaAddonCard = 0x04,\r | |
1365 | MemoryArrayLocationEisaAddonCard = 0x05,\r | |
1366 | MemoryArrayLocationPciAddonCard = 0x06,\r | |
1367 | MemoryArrayLocationMcaAddonCard = 0x07,\r | |
1368 | MemoryArrayLocationPcmciaAddonCard = 0x08,\r | |
1369 | MemoryArrayLocationProprietaryAddonCard = 0x09,\r | |
1370 | MemoryArrayLocationNuBus = 0x0A,\r | |
1371 | MemoryArrayLocationPc98C20AddonCard = 0xA0,\r | |
1372 | MemoryArrayLocationPc98C24AddonCard = 0xA1,\r | |
1373 | MemoryArrayLocationPc98EAddonCard = 0xA2,\r | |
1374 | MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r | |
1375 | } MEMORY_ARRAY_LOCATION;\r | |
1376 | \r | |
1377 | ///\r | |
af2dc6a7 | 1378 | /// Physical Memory Array - Use.\r |
98cb9ae8 | 1379 | ///\r |
1380 | typedef enum {\r | |
1381 | MemoryArrayUseOther = 0x01,\r | |
1382 | MemoryArrayUseUnknown = 0x02,\r | |
1383 | MemoryArrayUseSystemMemory = 0x03,\r | |
1384 | MemoryArrayUseVideoMemory = 0x04,\r | |
1385 | MemoryArrayUseFlashMemory = 0x05,\r | |
1386 | MemoryArrayUseNonVolatileRam = 0x06,\r | |
1387 | MemoryArrayUseCacheMemory = 0x07\r | |
1388 | } MEMORY_ARRAY_USE;\r | |
1389 | \r | |
1390 | ///\r | |
af2dc6a7 | 1391 | /// Physical Memory Array - Error Correction Types. \r |
98cb9ae8 | 1392 | ///\r |
1393 | typedef enum {\r | |
1394 | MemoryErrorCorrectionOther = 0x01,\r | |
1395 | MemoryErrorCorrectionUnknown = 0x02,\r | |
1396 | MemoryErrorCorrectionNone = 0x03,\r | |
1397 | MemoryErrorCorrectionParity = 0x04,\r | |
1398 | MemoryErrorCorrectionSingleBitEcc = 0x05,\r | |
1399 | MemoryErrorCorrectionMultiBitEcc = 0x06,\r | |
1400 | MemoryErrorCorrectionCrc = 0x07\r | |
1401 | } MEMORY_ERROR_CORRECTION;\r | |
1402 | \r | |
4135253b | 1403 | ///\r |
af2dc6a7 | 1404 | /// Physical Memory Array (Type 16).\r |
4135253b | 1405 | ///\r |
98cb9ae8 | 1406 | /// This structure describes a collection of memory devices that operate \r |
1407 | /// together to form a memory address space. \r | |
1408 | ///\r | |
61ce5861 | 1409 | typedef struct {\r |
98cb9ae8 | 1410 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1411 | UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r |
1412 | UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r | |
1413 | UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r | |
98cb9ae8 | 1414 | UINT32 MaximumCapacity;\r |
1415 | UINT16 MemoryErrorInformationHandle;\r | |
1416 | UINT16 NumberOfMemoryDevices;\r | |
7ddba202 SZ |
1417 | //\r |
1418 | // Add for smbios 2.7\r | |
1419 | //\r | |
1420 | UINT64 ExtendedMaximumCapacity;\r | |
61ce5861 | 1421 | } SMBIOS_TABLE_TYPE16;\r |
1422 | \r | |
98cb9ae8 | 1423 | ///\r |
af2dc6a7 | 1424 | /// Memory Device - Form Factor.\r |
98cb9ae8 | 1425 | ///\r |
1426 | typedef enum {\r | |
1427 | MemoryFormFactorOther = 0x01,\r | |
1428 | MemoryFormFactorUnknown = 0x02,\r | |
1429 | MemoryFormFactorSimm = 0x03,\r | |
1430 | MemoryFormFactorSip = 0x04,\r | |
1431 | MemoryFormFactorChip = 0x05,\r | |
1432 | MemoryFormFactorDip = 0x06,\r | |
1433 | MemoryFormFactorZip = 0x07,\r | |
1434 | MemoryFormFactorProprietaryCard = 0x08,\r | |
1435 | MemoryFormFactorDimm = 0x09,\r | |
1436 | MemoryFormFactorTsop = 0x0A,\r | |
1437 | MemoryFormFactorRowOfChips = 0x0B,\r | |
1438 | MemoryFormFactorRimm = 0x0C,\r | |
1439 | MemoryFormFactorSodimm = 0x0D,\r | |
1440 | MemoryFormFactorSrimm = 0x0E,\r | |
1441 | MemoryFormFactorFbDimm = 0x0F\r | |
1442 | } MEMORY_FORM_FACTOR;\r | |
1443 | \r | |
1444 | ///\r | |
1445 | /// Memory Device - Type\r | |
1446 | ///\r | |
1447 | typedef enum {\r | |
1448 | MemoryTypeOther = 0x01,\r | |
1449 | MemoryTypeUnknown = 0x02,\r | |
1450 | MemoryTypeDram = 0x03,\r | |
1451 | MemoryTypeEdram = 0x04,\r | |
1452 | MemoryTypeVram = 0x05,\r | |
1453 | MemoryTypeSram = 0x06,\r | |
1454 | MemoryTypeRam = 0x07,\r | |
1455 | MemoryTypeRom = 0x08,\r | |
1456 | MemoryTypeFlash = 0x09,\r | |
1457 | MemoryTypeEeprom = 0x0A,\r | |
1458 | MemoryTypeFeprom = 0x0B,\r | |
1459 | MemoryTypeEprom = 0x0C,\r | |
1460 | MemoryTypeCdram = 0x0D,\r | |
1461 | MemoryType3Dram = 0x0E,\r | |
1462 | MemoryTypeSdram = 0x0F,\r | |
1463 | MemoryTypeSgram = 0x10,\r | |
1464 | MemoryTypeRdram = 0x11,\r | |
1465 | MemoryTypeDdr = 0x12,\r | |
1466 | MemoryTypeDdr2 = 0x13,\r | |
3507ab19 | 1467 | MemoryTypeDdr2FbDimm = 0x14,\r |
1468 | MemoryTypeDdr3 = 0x18,\r | |
1469 | MemoryTypeFbd2 = 0x19\r | |
98cb9ae8 | 1470 | } MEMORY_DEVICE_TYPE;\r |
1471 | \r | |
1472 | typedef struct {\r | |
1473 | UINT16 Reserved :1;\r | |
1474 | UINT16 Other :1;\r | |
1475 | UINT16 Unknown :1;\r | |
1476 | UINT16 FastPaged :1;\r | |
1477 | UINT16 StaticColumn :1;\r | |
1478 | UINT16 PseudoStatic :1;\r | |
1479 | UINT16 Rambus :1;\r | |
1480 | UINT16 Synchronous :1;\r | |
1481 | UINT16 Cmos :1;\r | |
1482 | UINT16 Edo :1;\r | |
1483 | UINT16 WindowDram :1;\r | |
1484 | UINT16 CacheDram :1;\r | |
1485 | UINT16 Nonvolatile :1;\r | |
7ddba202 SZ |
1486 | UINT16 Registered :1;\r |
1487 | UINT16 Unbuffered :1;\r | |
1488 | UINT16 Reserved1 :1;\r | |
98cb9ae8 | 1489 | } MEMORY_DEVICE_TYPE_DETAIL;\r |
1490 | \r | |
4135253b | 1491 | ///\r |
af2dc6a7 | 1492 | /// Memory Device (Type 17).\r |
4135253b | 1493 | ///\r |
98cb9ae8 | 1494 | /// This structure describes a single memory device that is part of \r |
1495 | /// a larger Physical Memory Array (Type 16).\r | |
1496 | /// Note: If a system includes memory-device sockets, the SMBIOS implementation \r | |
af2dc6a7 | 1497 | /// includes a Memory Device structure instance for each slot, whether or not the \r |
98cb9ae8 | 1498 | /// socket is currently populated.\r |
1499 | ///\r | |
61ce5861 | 1500 | typedef struct {\r |
98cb9ae8 | 1501 | SMBIOS_STRUCTURE Hdr;\r |
1502 | UINT16 MemoryArrayHandle;\r | |
1503 | UINT16 MemoryErrorInformationHandle;\r | |
1504 | UINT16 TotalWidth;\r | |
1505 | UINT16 DataWidth;\r | |
1506 | UINT16 Size;\r | |
af2dc6a7 | 1507 | UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r |
98cb9ae8 | 1508 | UINT8 DeviceSet;\r |
1509 | SMBIOS_TABLE_STRING DeviceLocator;\r | |
1510 | SMBIOS_TABLE_STRING BankLocator;\r | |
af2dc6a7 | 1511 | UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r |
98cb9ae8 | 1512 | MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r |
1513 | UINT16 Speed;\r | |
1514 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1515 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1516 | SMBIOS_TABLE_STRING AssetTag;\r | |
1517 | SMBIOS_TABLE_STRING PartNumber;\r | |
61ce5861 | 1518 | //\r |
1519 | // Add for smbios 2.6\r | |
1520 | // \r | |
7ddba202 SZ |
1521 | UINT8 Attributes;\r |
1522 | //\r | |
1523 | // Add for smbios 2.7\r | |
1524 | //\r | |
1525 | UINT32 ExtendedSize;\r | |
1526 | UINT16 ConfiguredMemoryClockSpeed;\r | |
61ce5861 | 1527 | } SMBIOS_TABLE_TYPE17;\r |
1528 | \r | |
98cb9ae8 | 1529 | ///\r |
af2dc6a7 | 1530 | /// 32-bit Memory Error Information - Error Type. \r |
98cb9ae8 | 1531 | ///\r |
1532 | typedef enum { \r | |
1533 | MemoryErrorOther = 0x01,\r | |
1534 | MemoryErrorUnknown = 0x02,\r | |
1535 | MemoryErrorOk = 0x03,\r | |
1536 | MemoryErrorBadRead = 0x04,\r | |
1537 | MemoryErrorParity = 0x05,\r | |
1538 | MemoryErrorSigleBit = 0x06,\r | |
1539 | MemoryErrorDoubleBit = 0x07,\r | |
1540 | MemoryErrorMultiBit = 0x08,\r | |
1541 | MemoryErrorNibble = 0x09,\r | |
1542 | MemoryErrorChecksum = 0x0A,\r | |
1543 | MemoryErrorCrc = 0x0B,\r | |
1544 | MemoryErrorCorrectSingleBit = 0x0C,\r | |
1545 | MemoryErrorCorrected = 0x0D,\r | |
1546 | MemoryErrorUnCorrectable = 0x0E\r | |
1547 | } MEMORY_ERROR_TYPE;\r | |
1548 | \r | |
1549 | ///\r | |
af2dc6a7 | 1550 | /// 32-bit Memory Error Information - Error Granularity. \r |
98cb9ae8 | 1551 | ///\r |
1552 | typedef enum { \r | |
1553 | MemoryGranularityOther = 0x01,\r | |
1554 | MemoryGranularityOtherUnknown = 0x02,\r | |
1555 | MemoryGranularityDeviceLevel = 0x03,\r | |
1556 | MemoryGranularityMemPartitionLevel = 0x04\r | |
1557 | } MEMORY_ERROR_GRANULARITY;\r | |
1558 | \r | |
1559 | ///\r | |
af2dc6a7 | 1560 | /// 32-bit Memory Error Information - Error Operation. \r |
98cb9ae8 | 1561 | ///\r |
1562 | typedef enum { \r | |
1563 | MemoryErrorOperationOther = 0x01,\r | |
1564 | MemoryErrorOperationUnknown = 0x02,\r | |
1565 | MemoryErrorOperationRead = 0x03,\r | |
1566 | MemoryErrorOperationWrite = 0x04,\r | |
1567 | MemoryErrorOperationPartialWrite = 0x05\r | |
1568 | } MEMORY_ERROR_OPERATION;\r | |
1569 | \r | |
4135253b | 1570 | ///\r |
af2dc6a7 | 1571 | /// 32-bit Memory Error Information (Type 18).\r |
98cb9ae8 | 1572 | /// \r |
1573 | /// This structure identifies the specifics of an error that might be detected \r | |
1574 | /// within a Physical Memory Array.\r | |
4135253b | 1575 | ///\r |
61ce5861 | 1576 | typedef struct {\r |
98cb9ae8 | 1577 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1578 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
1579 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
1580 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 1581 | UINT32 VendorSyndrome;\r |
1582 | UINT32 MemoryArrayErrorAddress;\r | |
1583 | UINT32 DeviceErrorAddress;\r | |
1584 | UINT32 ErrorResolution;\r | |
61ce5861 | 1585 | } SMBIOS_TABLE_TYPE18;\r |
1586 | \r | |
4135253b | 1587 | ///\r |
af2dc6a7 | 1588 | /// Memory Array Mapped Address (Type 19).\r |
4135253b | 1589 | ///\r |
98cb9ae8 | 1590 | /// This structure provides the address mapping for a Physical Memory Array. \r |
1591 | /// One structure is present for each contiguous address range described.\r | |
1592 | ///\r | |
61ce5861 | 1593 | typedef struct {\r |
1594 | SMBIOS_STRUCTURE Hdr;\r | |
1595 | UINT32 StartingAddress;\r | |
1596 | UINT32 EndingAddress;\r | |
1597 | UINT16 MemoryArrayHandle;\r | |
1598 | UINT8 PartitionWidth;\r | |
7ddba202 SZ |
1599 | //\r |
1600 | // Add for smbios 2.7\r | |
1601 | //\r | |
1602 | UINT64 ExtendedStartingAddress;\r | |
1603 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1604 | } SMBIOS_TABLE_TYPE19;\r |
1605 | \r | |
4135253b | 1606 | ///\r |
af2dc6a7 | 1607 | /// Memory Device Mapped Address (Type 20).\r |
4135253b | 1608 | ///\r |
98cb9ae8 | 1609 | /// This structure maps memory address space usually to a device-level granularity. \r |
1610 | /// One structure is present for each contiguous address range described. \r | |
1611 | ///\r | |
61ce5861 | 1612 | typedef struct {\r |
1613 | SMBIOS_STRUCTURE Hdr;\r | |
1614 | UINT32 StartingAddress;\r | |
1615 | UINT32 EndingAddress;\r | |
1616 | UINT16 MemoryDeviceHandle;\r | |
1617 | UINT16 MemoryArrayMappedAddressHandle;\r | |
1618 | UINT8 PartitionRowPosition;\r | |
1619 | UINT8 InterleavePosition;\r | |
1620 | UINT8 InterleavedDataDepth;\r | |
7ddba202 SZ |
1621 | //\r |
1622 | // Add for smbios 2.7\r | |
1623 | //\r | |
1624 | UINT64 ExtendedStartingAddress;\r | |
1625 | UINT64 ExtendedEndingAddress;\r | |
61ce5861 | 1626 | } SMBIOS_TABLE_TYPE20;\r |
1627 | \r | |
98cb9ae8 | 1628 | ///\r |
1629 | /// Built-in Pointing Device - Type\r | |
1630 | ///\r | |
1631 | typedef enum {\r | |
1632 | PointingDeviceTypeOther = 0x01,\r | |
1633 | PointingDeviceTypeUnknown = 0x02,\r | |
1634 | PointingDeviceTypeMouse = 0x03,\r | |
1635 | PointingDeviceTypeTrackBall = 0x04,\r | |
1636 | PointingDeviceTypeTrackPoint = 0x05,\r | |
1637 | PointingDeviceTypeGlidePoint = 0x06,\r | |
1638 | PointingDeviceTouchPad = 0x07,\r | |
1639 | PointingDeviceTouchScreen = 0x08,\r | |
1640 | PointingDeviceOpticalSensor = 0x09\r | |
1641 | } BUILTIN_POINTING_DEVICE_TYPE;\r | |
1642 | \r | |
1643 | ///\r | |
af2dc6a7 | 1644 | /// Built-in Pointing Device - Interface.\r |
98cb9ae8 | 1645 | ///\r |
1646 | typedef enum {\r | |
1647 | PointingDeviceInterfaceOther = 0x01,\r | |
1648 | PointingDeviceInterfaceUnknown = 0x02,\r | |
1649 | PointingDeviceInterfaceSerial = 0x03,\r | |
1650 | PointingDeviceInterfacePs2 = 0x04,\r | |
1651 | PointingDeviceInterfaceInfrared = 0x05,\r | |
1652 | PointingDeviceInterfaceHpHil = 0x06,\r | |
1653 | PointingDeviceInterfaceBusMouse = 0x07,\r | |
1654 | PointingDeviceInterfaceADB = 0x08,\r | |
1655 | PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r | |
1656 | PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r | |
1657 | PointingDeviceInterfaceUsb = 0xA2\r | |
1658 | } BUILTIN_POINTING_DEVICE_INTERFACE;\r | |
1659 | \r | |
4135253b | 1660 | ///\r |
af2dc6a7 | 1661 | /// Built-in Pointing Device (Type 21).\r |
4135253b | 1662 | ///\r |
98cb9ae8 | 1663 | /// This structure describes the attributes of the built-in pointing device for the \r |
af2dc6a7 | 1664 | /// system. The presence of this structure does not imply that the built-in\r |
98cb9ae8 | 1665 | /// pointing device is active for the system's use! \r |
1666 | ///\r | |
61ce5861 | 1667 | typedef struct {\r |
98cb9ae8 | 1668 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1669 | UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r |
1670 | UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r | |
98cb9ae8 | 1671 | UINT8 NumberOfButtons;\r |
61ce5861 | 1672 | } SMBIOS_TABLE_TYPE21;\r |
1673 | \r | |
98cb9ae8 | 1674 | ///\r |
1675 | /// Portable Battery - Device Chemistry\r | |
1676 | ///\r | |
1677 | typedef enum { \r | |
1678 | PortableBatteryDeviceChemistryOther = 0x01,\r | |
1679 | PortableBatteryDeviceChemistryUnknown = 0x02,\r | |
1680 | PortableBatteryDeviceChemistryLeadAcid = 0x03,\r | |
1681 | PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r | |
1682 | PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r | |
1683 | PortableBatteryDeviceChemistryLithiumIon = 0x06,\r | |
1684 | PortableBatteryDeviceChemistryZincAir = 0x07,\r | |
1685 | PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r | |
1686 | } PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r | |
1687 | \r | |
4135253b | 1688 | ///\r |
af2dc6a7 | 1689 | /// Portable Battery (Type 22).\r |
4135253b | 1690 | ///\r |
98cb9ae8 | 1691 | /// This structure describes the attributes of the portable battery(s) for the system. \r |
1692 | /// The structure contains the static attributes for the group. Each structure describes \r | |
1f9f8414 | 1693 | /// a single battery pack's attributes.\r |
98cb9ae8 | 1694 | ///\r |
61ce5861 | 1695 | typedef struct {\r |
98cb9ae8 | 1696 | SMBIOS_STRUCTURE Hdr;\r |
1697 | SMBIOS_TABLE_STRING Location;\r | |
1698 | SMBIOS_TABLE_STRING Manufacturer;\r | |
1699 | SMBIOS_TABLE_STRING ManufactureDate;\r | |
1700 | SMBIOS_TABLE_STRING SerialNumber;\r | |
1701 | SMBIOS_TABLE_STRING DeviceName;\r | |
af2dc6a7 | 1702 | UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r |
98cb9ae8 | 1703 | UINT16 DeviceCapacity;\r |
1704 | UINT16 DesignVoltage;\r | |
1705 | SMBIOS_TABLE_STRING SBDSVersionNumber;\r | |
1706 | UINT8 MaximumErrorInBatteryData;\r | |
1707 | UINT16 SBDSSerialNumber;\r | |
1708 | UINT16 SBDSManufactureDate;\r | |
1709 | SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r | |
1710 | UINT8 DesignCapacityMultiplier;\r | |
1711 | UINT32 OEMSpecific;\r | |
61ce5861 | 1712 | } SMBIOS_TABLE_TYPE22;\r |
1713 | \r | |
4135253b | 1714 | ///\r |
1715 | /// System Reset (Type 23)\r | |
1716 | ///\r | |
98cb9ae8 | 1717 | /// This structure describes whether Automatic System Reset functions enabled (Status). \r |
1718 | /// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r | |
1719 | /// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r | |
1720 | /// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r | |
1721 | /// the system will re-boot according to the Boot Option at Limit. \r | |
1722 | ///\r | |
61ce5861 | 1723 | typedef struct {\r |
1724 | SMBIOS_STRUCTURE Hdr;\r | |
1725 | UINT8 Capabilities;\r | |
1726 | UINT16 ResetCount;\r | |
1727 | UINT16 ResetLimit;\r | |
1728 | UINT16 TimerInterval;\r | |
1729 | UINT16 Timeout;\r | |
1730 | } SMBIOS_TABLE_TYPE23;\r | |
1731 | \r | |
4135253b | 1732 | ///\r |
af2dc6a7 | 1733 | /// Hardware Security (Type 24).\r |
4135253b | 1734 | ///\r |
98cb9ae8 | 1735 | /// This structure describes the system-wide hardware security settings. \r |
1736 | ///\r | |
61ce5861 | 1737 | typedef struct {\r |
1738 | SMBIOS_STRUCTURE Hdr;\r | |
1739 | UINT8 HardwareSecuritySettings;\r | |
1740 | } SMBIOS_TABLE_TYPE24;\r | |
1741 | \r | |
4135253b | 1742 | ///\r |
af2dc6a7 | 1743 | /// System Power Controls (Type 25).\r |
4135253b | 1744 | ///\r |
98cb9ae8 | 1745 | /// This structure describes the attributes for controlling the main power supply to the system. \r |
1746 | /// Software that interprets this structure uses the month, day, hour, minute, and second values \r | |
1747 | /// to determine the number of seconds until the next power-on of the system. The presence of \r | |
1748 | /// this structure implies that a timed power-on facility is available for the system. \r | |
1749 | ///\r | |
61ce5861 | 1750 | typedef struct {\r |
1751 | SMBIOS_STRUCTURE Hdr;\r | |
1752 | UINT8 NextScheduledPowerOnMonth;\r | |
1753 | UINT8 NextScheduledPowerOnDayOfMonth;\r | |
1754 | UINT8 NextScheduledPowerOnHour;\r | |
1755 | UINT8 NextScheduledPowerOnMinute;\r | |
1756 | UINT8 NextScheduledPowerOnSecond;\r | |
1757 | } SMBIOS_TABLE_TYPE25;\r | |
1758 | \r | |
98cb9ae8 | 1759 | ///\r |
af2dc6a7 | 1760 | /// Voltage Probe - Location and Status.\r |
98cb9ae8 | 1761 | ///\r |
1762 | typedef struct {\r | |
1763 | UINT8 VoltageProbeSite :5;\r | |
1764 | UINT8 VoltageProbeStatus :3;\r | |
1765 | } MISC_VOLTAGE_PROBE_LOCATION;\r | |
1766 | \r | |
4135253b | 1767 | ///\r |
1768 | /// Voltage Probe (Type 26)\r | |
1769 | ///\r | |
98cb9ae8 | 1770 | /// This describes the attributes for a voltage probe in the system. \r |
1771 | /// Each structure describes a single voltage probe.\r | |
1772 | ///\r | |
61ce5861 | 1773 | typedef struct {\r |
98cb9ae8 | 1774 | SMBIOS_STRUCTURE Hdr;\r |
1775 | SMBIOS_TABLE_STRING Description;\r | |
1776 | MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r | |
1777 | UINT16 MaximumValue;\r | |
1778 | UINT16 MinimumValue;\r | |
1779 | UINT16 Resolution;\r | |
1780 | UINT16 Tolerance;\r | |
1781 | UINT16 Accuracy;\r | |
1782 | UINT32 OEMDefined;\r | |
1783 | UINT16 NominalValue;\r | |
61ce5861 | 1784 | } SMBIOS_TABLE_TYPE26;\r |
1785 | \r | |
98cb9ae8 | 1786 | ///\r |
af2dc6a7 | 1787 | /// Cooling Device - Device Type and Status.\r |
98cb9ae8 | 1788 | ///\r |
1789 | typedef struct {\r | |
1790 | UINT8 CoolingDevice :5;\r | |
1791 | UINT8 CoolingDeviceStatus :3;\r | |
1792 | } MISC_COOLING_DEVICE_TYPE;\r | |
1793 | \r | |
4135253b | 1794 | ///\r |
1795 | /// Cooling Device (Type 27)\r | |
1796 | ///\r | |
98cb9ae8 | 1797 | /// This structure describes the attributes for a cooling device in the system. \r |
1798 | /// Each structure describes a single cooling device. \r | |
1799 | /// \r | |
61ce5861 | 1800 | typedef struct {\r |
98cb9ae8 | 1801 | SMBIOS_STRUCTURE Hdr;\r |
1802 | UINT16 TemperatureProbeHandle;\r | |
1803 | MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r | |
1804 | UINT8 CoolingUnitGroup;\r | |
1805 | UINT32 OEMDefined;\r | |
1806 | UINT16 NominalSpeed;\r | |
7ddba202 SZ |
1807 | //\r |
1808 | // Add for smbios 2.7\r | |
1809 | //\r | |
1810 | SMBIOS_TABLE_STRING Description;\r | |
61ce5861 | 1811 | } SMBIOS_TABLE_TYPE27;\r |
1812 | \r | |
98cb9ae8 | 1813 | ///\r |
af2dc6a7 | 1814 | /// Temperature Probe - Location and Status.\r |
98cb9ae8 | 1815 | ///\r |
1816 | typedef struct {\r | |
1817 | UINT8 TemperatureProbeSite :5;\r | |
1818 | UINT8 TemperatureProbeStatus :3;\r | |
1819 | } MISC_TEMPERATURE_PROBE_LOCATION;\r | |
1820 | \r | |
4135253b | 1821 | ///\r |
af2dc6a7 | 1822 | /// Temperature Probe (Type 28).\r |
4135253b | 1823 | ///\r |
98cb9ae8 | 1824 | /// This structure describes the attributes for a temperature probe in the system. \r |
1825 | /// Each structure describes a single temperature probe. \r | |
1826 | ///\r | |
61ce5861 | 1827 | typedef struct {\r |
98cb9ae8 | 1828 | SMBIOS_STRUCTURE Hdr;\r |
1829 | SMBIOS_TABLE_STRING Description;\r | |
1830 | MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r | |
1831 | UINT16 MaximumValue;\r | |
1832 | UINT16 MinimumValue;\r | |
1833 | UINT16 Resolution;\r | |
1834 | UINT16 Tolerance;\r | |
1835 | UINT16 Accuracy;\r | |
1836 | UINT32 OEMDefined;\r | |
1837 | UINT16 NominalValue;\r | |
61ce5861 | 1838 | } SMBIOS_TABLE_TYPE28;\r |
1839 | \r | |
98cb9ae8 | 1840 | ///\r |
af2dc6a7 | 1841 | /// Electrical Current Probe - Location and Status.\r |
98cb9ae8 | 1842 | ///\r |
1843 | typedef struct {\r | |
1844 | UINT8 ElectricalCurrentProbeSite :5;\r | |
1845 | UINT8 ElectricalCurrentProbeStatus :3;\r | |
1846 | } MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r | |
1847 | \r | |
4135253b | 1848 | ///\r |
af2dc6a7 | 1849 | /// Electrical Current Probe (Type 29).\r |
4135253b | 1850 | ///\r |
98cb9ae8 | 1851 | /// This structure describes the attributes for an electrical current probe in the system.\r |
1852 | /// Each structure describes a single electrical current probe. \r | |
1853 | ///\r | |
61ce5861 | 1854 | typedef struct {\r |
98cb9ae8 | 1855 | SMBIOS_STRUCTURE Hdr;\r |
1856 | SMBIOS_TABLE_STRING Description;\r | |
1857 | MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r | |
1858 | UINT16 MaximumValue;\r | |
1859 | UINT16 MinimumValue;\r | |
1860 | UINT16 Resolution;\r | |
1861 | UINT16 Tolerance;\r | |
1862 | UINT16 Accuracy;\r | |
1863 | UINT32 OEMDefined;\r | |
1864 | UINT16 NominalValue;\r | |
61ce5861 | 1865 | } SMBIOS_TABLE_TYPE29;\r |
1866 | \r | |
4135253b | 1867 | ///\r |
af2dc6a7 | 1868 | /// Out-of-Band Remote Access (Type 30).\r |
4135253b | 1869 | ///\r |
98cb9ae8 | 1870 | /// This structure describes the attributes and policy settings of a hardware facility \r |
1871 | /// that may be used to gain remote access to a hardware system when the operating system \r | |
1872 | /// is not available due to power-down status, hardware failures, or boot failures. \r | |
1873 | ///\r | |
61ce5861 | 1874 | typedef struct {\r |
1875 | SMBIOS_STRUCTURE Hdr;\r | |
1876 | SMBIOS_TABLE_STRING ManufacturerName;\r | |
1877 | UINT8 Connections;\r | |
1878 | } SMBIOS_TABLE_TYPE30;\r | |
1879 | \r | |
4135253b | 1880 | ///\r |
af2dc6a7 | 1881 | /// Boot Integrity Services (BIS) Entry Point (Type 31).\r |
4135253b | 1882 | ///\r |
98cb9ae8 | 1883 | /// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r |
1884 | /// \r | |
61ce5861 | 1885 | typedef struct {\r |
1886 | SMBIOS_STRUCTURE Hdr;\r | |
1887 | UINT8 Checksum;\r | |
1888 | UINT8 Reserved1;\r | |
1889 | UINT16 Reserved2;\r | |
1890 | UINT32 BisEntry16;\r | |
1891 | UINT32 BisEntry32;\r | |
1892 | UINT64 Reserved3;\r | |
1893 | UINT32 Reserved4;\r | |
1894 | } SMBIOS_TABLE_TYPE31;\r | |
1895 | \r | |
98cb9ae8 | 1896 | ///\r |
af2dc6a7 | 1897 | /// System Boot Information - System Boot Status.\r |
98cb9ae8 | 1898 | ///\r |
1899 | typedef enum {\r | |
1900 | BootInformationStatusNoError = 0x00,\r | |
1901 | BootInformationStatusNoBootableMedia = 0x01,\r | |
1902 | BootInformationStatusNormalOSFailedLoading = 0x02,\r | |
1903 | BootInformationStatusFirmwareDetectedFailure = 0x03,\r | |
1904 | BootInformationStatusOSDetectedFailure = 0x04,\r | |
1905 | BootInformationStatusUserRequestedBoot = 0x05,\r | |
1906 | BootInformationStatusSystemSecurityViolation = 0x06,\r | |
1907 | BootInformationStatusPreviousRequestedImage = 0x07,\r | |
1908 | BootInformationStatusWatchdogTimerExpired = 0x08,\r | |
1909 | BootInformationStatusStartReserved = 0x09,\r | |
1910 | BootInformationStatusStartOemSpecific = 0x80,\r | |
1911 | BootInformationStatusStartProductSpecific = 0xC0\r | |
1912 | } MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r | |
1913 | \r | |
4135253b | 1914 | ///\r |
af2dc6a7 | 1915 | /// System Boot Information (Type 32).\r |
4135253b | 1916 | ///\r |
98cb9ae8 | 1917 | /// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r |
1918 | /// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r | |
1919 | /// application via this structure. When used in the PXE environment, for example, \r | |
1920 | /// this code identifies the reason the PXE was initiated and can be used by boot-image \r | |
1f9f8414 | 1921 | /// software to further automate an enterprise's PXE sessions. For example, an enterprise \r |
98cb9ae8 | 1922 | /// could choose to automatically download a hardware-diagnostic image to a client whose \r |
1923 | /// reason code indicated either a firmware- or operating system-detected hardware failure.\r | |
1924 | ///\r | |
61ce5861 | 1925 | typedef struct {\r |
98cb9ae8 | 1926 | SMBIOS_STRUCTURE Hdr;\r |
1927 | UINT8 Reserved[6];\r | |
af2dc6a7 | 1928 | UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r |
61ce5861 | 1929 | } SMBIOS_TABLE_TYPE32;\r |
1930 | \r | |
4135253b | 1931 | ///\r |
af2dc6a7 | 1932 | /// 64-bit Memory Error Information (Type 33).\r |
4135253b | 1933 | ///\r |
98cb9ae8 | 1934 | /// This structure describes an error within a Physical Memory Array, \r |
1935 | /// when the error address is above 4G (0xFFFFFFFF).\r | |
1936 | /// \r | |
61ce5861 | 1937 | typedef struct {\r |
98cb9ae8 | 1938 | SMBIOS_STRUCTURE Hdr;\r |
af2dc6a7 | 1939 | UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r |
1940 | UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r | |
1941 | UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r | |
98cb9ae8 | 1942 | UINT32 VendorSyndrome;\r |
1943 | UINT64 MemoryArrayErrorAddress;\r | |
1944 | UINT64 DeviceErrorAddress;\r | |
1945 | UINT32 ErrorResolution;\r | |
61ce5861 | 1946 | } SMBIOS_TABLE_TYPE33;\r |
1947 | \r | |
98cb9ae8 | 1948 | ///\r |
af2dc6a7 | 1949 | /// Management Device - Type. \r |
98cb9ae8 | 1950 | ///\r |
1951 | typedef enum {\r | |
1952 | ManagementDeviceTypeOther = 0x01,\r | |
1953 | ManagementDeviceTypeUnknown = 0x02,\r | |
1954 | ManagementDeviceTypeLm75 = 0x03,\r | |
1955 | ManagementDeviceTypeLm78 = 0x04,\r | |
1956 | ManagementDeviceTypeLm79 = 0x05,\r | |
1957 | ManagementDeviceTypeLm80 = 0x06,\r | |
1958 | ManagementDeviceTypeLm81 = 0x07,\r | |
1959 | ManagementDeviceTypeAdm9240 = 0x08,\r | |
1960 | ManagementDeviceTypeDs1780 = 0x09,\r | |
1961 | ManagementDeviceTypeMaxim1617 = 0x0A,\r | |
1962 | ManagementDeviceTypeGl518Sm = 0x0B,\r | |
1963 | ManagementDeviceTypeW83781D = 0x0C,\r | |
1964 | ManagementDeviceTypeHt82H791 = 0x0D\r | |
1965 | } MISC_MANAGEMENT_DEVICE_TYPE;\r | |
1966 | \r | |
1967 | ///\r | |
af2dc6a7 | 1968 | /// Management Device - Address Type. \r |
98cb9ae8 | 1969 | ///\r |
1970 | typedef enum {\r | |
1971 | ManagementDeviceAddressTypeOther = 0x01,\r | |
1972 | ManagementDeviceAddressTypeUnknown = 0x02,\r | |
1973 | ManagementDeviceAddressTypeIOPort = 0x03,\r | |
1974 | ManagementDeviceAddressTypeMemory = 0x04,\r | |
1975 | ManagementDeviceAddressTypeSmbus = 0x05\r | |
1976 | } MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r | |
1977 | \r | |
4135253b | 1978 | ///\r |
af2dc6a7 | 1979 | /// Management Device (Type 34).\r |
4135253b | 1980 | ///\r |
98cb9ae8 | 1981 | /// The information in this structure defines the attributes of a Management Device. \r |
1982 | /// A Management Device might control one or more fans or voltage, current, or temperature\r | |
1983 | /// probes as defined by one or more Management Device Component structures.\r | |
1984 | ///\r | |
61ce5861 | 1985 | typedef struct {\r |
98cb9ae8 | 1986 | SMBIOS_STRUCTURE Hdr;\r |
1987 | SMBIOS_TABLE_STRING Description;\r | |
af2dc6a7 | 1988 | UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r |
98cb9ae8 | 1989 | UINT32 Address;\r |
af2dc6a7 | 1990 | UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r |
61ce5861 | 1991 | } SMBIOS_TABLE_TYPE34;\r |
1992 | \r | |
4135253b | 1993 | ///\r |
1994 | /// Management Device Component (Type 35)\r | |
1995 | ///\r | |
98cb9ae8 | 1996 | /// This structure associates a cooling device or environmental probe with structures \r |
1997 | /// that define the controlling hardware device and (optionally) the component's thresholds. \r | |
1998 | ///\r | |
61ce5861 | 1999 | typedef struct {\r |
2000 | SMBIOS_STRUCTURE Hdr;\r | |
2001 | SMBIOS_TABLE_STRING Description;\r | |
2002 | UINT16 ManagementDeviceHandle;\r | |
2003 | UINT16 ComponentHandle;\r | |
2004 | UINT16 ThresholdHandle;\r | |
2005 | } SMBIOS_TABLE_TYPE35;\r | |
2006 | \r | |
4135253b | 2007 | ///\r |
af2dc6a7 | 2008 | /// Management Device Threshold Data (Type 36).\r |
4135253b | 2009 | ///\r |
98cb9ae8 | 2010 | /// The information in this structure defines threshold information for \r |
2011 | /// a component (probe or cooling-unit) contained within a Management Device. \r | |
2012 | ///\r | |
61ce5861 | 2013 | typedef struct {\r |
2014 | SMBIOS_STRUCTURE Hdr;\r | |
2015 | UINT16 LowerThresholdNonCritical;\r | |
2016 | UINT16 UpperThresholdNonCritical;\r | |
2017 | UINT16 LowerThresholdCritical;\r | |
2018 | UINT16 UpperThresholdCritical;\r | |
2019 | UINT16 LowerThresholdNonRecoverable;\r | |
2020 | UINT16 UpperThresholdNonRecoverable;\r | |
2021 | } SMBIOS_TABLE_TYPE36;\r | |
2022 | \r | |
bf7ea009 | 2023 | ///\r |
af2dc6a7 | 2024 | /// Memory Channel Entry.\r |
bf7ea009 | 2025 | ///\r |
61ce5861 | 2026 | typedef struct {\r |
2027 | UINT8 DeviceLoad;\r | |
2028 | UINT16 DeviceHandle;\r | |
2029 | } MEMORY_DEVICE;\r | |
2030 | \r | |
98cb9ae8 | 2031 | ///\r |
af2dc6a7 | 2032 | /// Memory Channel - Channel Type.\r |
98cb9ae8 | 2033 | ///\r |
2034 | typedef enum {\r | |
2035 | MemoryChannelTypeOther = 0x01,\r | |
2036 | MemoryChannelTypeUnknown = 0x02,\r | |
2037 | MemoryChannelTypeRambus = 0x03,\r | |
2038 | MemoryChannelTypeSyncLink = 0x04\r | |
2039 | } MEMORY_CHANNEL_TYPE;\r | |
2040 | \r | |
4135253b | 2041 | ///\r |
2042 | /// Memory Channel (Type 37)\r | |
2043 | ///\r | |
98cb9ae8 | 2044 | /// The information in this structure provides the correlation between a Memory Channel\r |
af2dc6a7 | 2045 | /// and its associated Memory Devices. Each device presents one or more loads to the channel. \r |
2046 | /// The sum of all device loads cannot exceed the channel's defined maximum.\r | |
98cb9ae8 | 2047 | ///\r |
61ce5861 | 2048 | typedef struct {\r |
2049 | SMBIOS_STRUCTURE Hdr;\r | |
2050 | UINT8 ChannelType;\r | |
2051 | UINT8 MaximumChannelLoad;\r | |
2052 | UINT8 MemoryDeviceCount;\r | |
2053 | MEMORY_DEVICE MemoryDevice[1];\r | |
2054 | } SMBIOS_TABLE_TYPE37;\r | |
2055 | \r | |
98cb9ae8 | 2056 | ///\r |
2057 | /// IPMI Device Information - BMC Interface Type\r | |
2058 | ///\r | |
2059 | typedef enum {\r | |
2060 | IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r | |
af2dc6a7 | 2061 | IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r |
2062 | IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r | |
2063 | IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r | |
98cb9ae8 | 2064 | IPMIDeviceInfoInterfaceTypeReserved = 0x04\r |
2065 | } BMC_INTERFACE_TYPE;\r | |
2066 | \r | |
4135253b | 2067 | ///\r |
af2dc6a7 | 2068 | /// IPMI Device Information (Type 38).\r |
4135253b | 2069 | ///\r |
7ddba202 | 2070 | /// The information in this structure defines the attributes of an\r |
98cb9ae8 | 2071 | /// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r |
7ddba202 SZ |
2072 | ///\r |
2073 | /// The Type 42 structure can also be used to describe a physical management controller\r | |
2074 | /// host interface and one or more protocols that share that interface. If IPMI is not\r | |
2075 | /// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r | |
2076 | /// Providing Type 38 is recommended for backward compatibility.\r | |
2077 | ///\r | |
61ce5861 | 2078 | typedef struct {\r |
2079 | SMBIOS_STRUCTURE Hdr;\r | |
af2dc6a7 | 2080 | UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r |
61ce5861 | 2081 | UINT8 IPMISpecificationRevision;\r |
2082 | UINT8 I2CSlaveAddress;\r | |
2083 | UINT8 NVStorageDeviceAddress;\r | |
2084 | UINT64 BaseAddress;\r | |
2085 | UINT8 BaseAddressModifier_InterruptInfo;\r | |
2086 | UINT8 InterruptNumber;\r | |
2087 | } SMBIOS_TABLE_TYPE38;\r | |
2088 | \r | |
98cb9ae8 | 2089 | ///\r |
af2dc6a7 | 2090 | /// System Power Supply - Power Supply Characteristics.\r |
98cb9ae8 | 2091 | ///\r |
2092 | typedef struct {\r | |
2093 | UINT16 PowerSupplyHotReplaceable:1;\r | |
2094 | UINT16 PowerSupplyPresent :1;\r | |
2095 | UINT16 PowerSupplyUnplugged :1;\r | |
2096 | UINT16 InputVoltageRangeSwitch :4;\r | |
2097 | UINT16 PowerSupplyStatus :3;\r | |
2098 | UINT16 PowerSupplyType :4;\r | |
2099 | UINT16 Reserved :2;\r | |
2100 | } SYS_POWER_SUPPLY_CHARACTERISTICS;\r | |
2101 | \r | |
4135253b | 2102 | ///\r |
af2dc6a7 | 2103 | /// System Power Supply (Type 39).\r |
4135253b | 2104 | ///\r |
7ddba202 SZ |
2105 | /// This structure identifies attributes of a system power supply. One instance\r |
2106 | /// of this record is present for each possible power supply in a system.\r | |
98cb9ae8 | 2107 | ///\r |
61ce5861 | 2108 | typedef struct {\r |
98cb9ae8 | 2109 | SMBIOS_STRUCTURE Hdr;\r |
2110 | UINT8 PowerUnitGroup;\r | |
2111 | SMBIOS_TABLE_STRING Location;\r | |
2112 | SMBIOS_TABLE_STRING DeviceName;\r | |
2113 | SMBIOS_TABLE_STRING Manufacturer;\r | |
2114 | SMBIOS_TABLE_STRING SerialNumber;\r | |
2115 | SMBIOS_TABLE_STRING AssetTagNumber;\r | |
2116 | SMBIOS_TABLE_STRING ModelPartNumber;\r | |
2117 | SMBIOS_TABLE_STRING RevisionLevel;\r | |
2118 | UINT16 MaxPowerCapacity;\r | |
2119 | SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r | |
2120 | UINT16 InputVoltageProbeHandle;\r | |
2121 | UINT16 CoolingDeviceHandle;\r | |
2122 | UINT16 InputCurrentProbeHandle;\r | |
61ce5861 | 2123 | } SMBIOS_TABLE_TYPE39;\r |
2124 | \r | |
bf7ea009 | 2125 | ///\r |
af2dc6a7 | 2126 | /// Additional Information Entry Format. \r |
bf7ea009 | 2127 | ///\r |
61ce5861 | 2128 | typedef struct { \r |
2129 | UINT8 EntryLength; \r | |
2130 | UINT16 ReferencedHandle;\r | |
2131 | UINT8 ReferencedOffset;\r | |
2132 | SMBIOS_TABLE_STRING EntryString;\r | |
2133 | UINT8 Value[1];\r | |
2134 | }ADDITIONAL_INFORMATION_ENTRY;\r | |
2135 | \r | |
4135253b | 2136 | ///\r |
af2dc6a7 | 2137 | /// Additional Information (Type 40).\r |
4135253b | 2138 | ///\r |
98cb9ae8 | 2139 | /// This structure is intended to provide additional information for handling unspecified \r |
2140 | /// enumerated values and interim field updates in another structure. \r | |
2141 | ///\r | |
61ce5861 | 2142 | typedef struct {\r |
2143 | SMBIOS_STRUCTURE Hdr;\r | |
2144 | UINT8 NumberOfAdditionalInformationEntries;\r | |
2145 | ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r | |
2146 | } SMBIOS_TABLE_TYPE40;\r | |
2147 | \r | |
98cb9ae8 | 2148 | ///\r |
af2dc6a7 | 2149 | /// Onboard Devices Extended Information - Onboard Device Types.\r |
98cb9ae8 | 2150 | ///\r |
2151 | typedef enum{\r | |
2152 | OnBoardDeviceExtendedTypeOther = 0x01,\r | |
2153 | OnBoardDeviceExtendedTypeUnknown = 0x02,\r | |
2154 | OnBoardDeviceExtendedTypeVideo = 0x03,\r | |
2155 | OnBoardDeviceExtendedTypeScsiController = 0x04,\r | |
2156 | OnBoardDeviceExtendedTypeEthernet = 0x05,\r | |
2157 | OnBoardDeviceExtendedTypeTokenRing = 0x06,\r | |
2158 | OnBoardDeviceExtendedTypeSound = 0x07,\r | |
2159 | OnBoardDeviceExtendedTypePATAController = 0x08,\r | |
2160 | OnBoardDeviceExtendedTypeSATAController = 0x09,\r | |
2161 | OnBoardDeviceExtendedTypeSASController = 0x0A\r | |
2162 | } ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r | |
2163 | \r | |
4135253b | 2164 | ///\r |
af2dc6a7 | 2165 | /// Onboard Devices Extended Information (Type 41).\r |
4135253b | 2166 | ///\r |
98cb9ae8 | 2167 | /// The information in this structure defines the attributes of devices that \r |
2168 | /// are onboard (soldered onto) a system element, usually the baseboard. \r | |
2169 | /// In general, an entry in this table implies that the BIOS has some level of \r | |
2170 | /// control over the enabling of the associated device for use by the system. \r | |
2171 | ///\r | |
61ce5861 | 2172 | typedef struct {\r |
98cb9ae8 | 2173 | SMBIOS_STRUCTURE Hdr;\r |
2174 | SMBIOS_TABLE_STRING ReferenceDesignation;\r | |
af2dc6a7 | 2175 | UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r |
98cb9ae8 | 2176 | UINT8 DeviceTypeInstance;\r |
2177 | UINT16 SegmentGroupNum;\r | |
2178 | UINT8 BusNum;\r | |
7ddba202 | 2179 | UINT8 DevFuncNum;\r |
61ce5861 | 2180 | } SMBIOS_TABLE_TYPE41;\r |
2181 | \r | |
7ddba202 SZ |
2182 | ///\r |
2183 | /// Management Controller Host Interface (Type 42).\r | |
2184 | ///\r | |
2185 | /// The information in this structure defines the attributes of a Management\r | |
2186 | /// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r | |
2187 | ///\r | |
2188 | /// Type 42 should be used for management controller host interfaces that use protocols\r | |
2189 | /// other than IPMI or that use multiple protocols on a single host interface type.\r | |
2190 | ///\r | |
2191 | /// This structure should also be provided if IPMI is shared with other protocols\r | |
2192 | /// over the same interface hardware. If IPMI is not shared with other protocols,\r | |
2193 | /// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r | |
2194 | /// recommended for backward compatibility. The structures are not required to\r | |
2195 | /// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r | |
2196 | /// simultaneously to provide backward compatibility with IPMI applications or drivers\r | |
2197 | /// that do not yet recognize the Type 42 structure.\r | |
2198 | ///\r | |
2199 | typedef struct {\r | |
2200 | SMBIOS_STRUCTURE Hdr;\r | |
2201 | UINT8 InterfaceType;\r | |
2202 | UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r | |
2203 | } SMBIOS_TABLE_TYPE42;\r | |
2204 | \r | |
4135253b | 2205 | ///\r |
2206 | /// Inactive (Type 126)\r | |
2207 | ///\r | |
61ce5861 | 2208 | typedef struct {\r |
2209 | SMBIOS_STRUCTURE Hdr;\r | |
2210 | } SMBIOS_TABLE_TYPE126;\r | |
2211 | \r | |
4135253b | 2212 | ///\r |
2213 | /// End-of-Table (Type 127)\r | |
2214 | ///\r | |
61ce5861 | 2215 | typedef struct {\r |
2216 | SMBIOS_STRUCTURE Hdr;\r | |
2217 | } SMBIOS_TABLE_TYPE127;\r | |
2218 | \r | |
4135253b | 2219 | ///\r |
af2dc6a7 | 2220 | /// Union of all the possible SMBIOS record types.\r |
4135253b | 2221 | ///\r |
61ce5861 | 2222 | typedef union {\r |
2223 | SMBIOS_STRUCTURE *Hdr;\r | |
2224 | SMBIOS_TABLE_TYPE0 *Type0;\r | |
2225 | SMBIOS_TABLE_TYPE1 *Type1;\r | |
2226 | SMBIOS_TABLE_TYPE2 *Type2;\r | |
2227 | SMBIOS_TABLE_TYPE3 *Type3;\r | |
2228 | SMBIOS_TABLE_TYPE4 *Type4;\r | |
2229 | SMBIOS_TABLE_TYPE5 *Type5;\r | |
2230 | SMBIOS_TABLE_TYPE6 *Type6;\r | |
2231 | SMBIOS_TABLE_TYPE7 *Type7;\r | |
2232 | SMBIOS_TABLE_TYPE8 *Type8;\r | |
2233 | SMBIOS_TABLE_TYPE9 *Type9;\r | |
2234 | SMBIOS_TABLE_TYPE10 *Type10;\r | |
2235 | SMBIOS_TABLE_TYPE11 *Type11;\r | |
2236 | SMBIOS_TABLE_TYPE12 *Type12;\r | |
2237 | SMBIOS_TABLE_TYPE13 *Type13;\r | |
2238 | SMBIOS_TABLE_TYPE14 *Type14;\r | |
2239 | SMBIOS_TABLE_TYPE15 *Type15;\r | |
2240 | SMBIOS_TABLE_TYPE16 *Type16;\r | |
2241 | SMBIOS_TABLE_TYPE17 *Type17;\r | |
2242 | SMBIOS_TABLE_TYPE18 *Type18;\r | |
2243 | SMBIOS_TABLE_TYPE19 *Type19;\r | |
2244 | SMBIOS_TABLE_TYPE20 *Type20;\r | |
2245 | SMBIOS_TABLE_TYPE21 *Type21;\r | |
2246 | SMBIOS_TABLE_TYPE22 *Type22;\r | |
2247 | SMBIOS_TABLE_TYPE23 *Type23;\r | |
2248 | SMBIOS_TABLE_TYPE24 *Type24;\r | |
2249 | SMBIOS_TABLE_TYPE25 *Type25;\r | |
2250 | SMBIOS_TABLE_TYPE26 *Type26;\r | |
2251 | SMBIOS_TABLE_TYPE27 *Type27;\r | |
2252 | SMBIOS_TABLE_TYPE28 *Type28;\r | |
2253 | SMBIOS_TABLE_TYPE29 *Type29;\r | |
2254 | SMBIOS_TABLE_TYPE30 *Type30;\r | |
2255 | SMBIOS_TABLE_TYPE31 *Type31;\r | |
2256 | SMBIOS_TABLE_TYPE32 *Type32;\r | |
2257 | SMBIOS_TABLE_TYPE33 *Type33;\r | |
2258 | SMBIOS_TABLE_TYPE34 *Type34;\r | |
2259 | SMBIOS_TABLE_TYPE35 *Type35;\r | |
2260 | SMBIOS_TABLE_TYPE36 *Type36;\r | |
2261 | SMBIOS_TABLE_TYPE37 *Type37;\r | |
2262 | SMBIOS_TABLE_TYPE38 *Type38;\r | |
2263 | SMBIOS_TABLE_TYPE39 *Type39;\r | |
2264 | SMBIOS_TABLE_TYPE40 *Type40;\r | |
2265 | SMBIOS_TABLE_TYPE41 *Type41;\r | |
884f9295 | 2266 | SMBIOS_TABLE_TYPE42 *Type42;\r |
61ce5861 | 2267 | SMBIOS_TABLE_TYPE126 *Type126;\r |
2268 | SMBIOS_TABLE_TYPE127 *Type127;\r | |
2269 | UINT8 *Raw;\r | |
2270 | } SMBIOS_STRUCTURE_POINTER;\r | |
2271 | \r | |
766f4bc1 | 2272 | #pragma pack()\r |
2273 | \r | |
a7ed1e2e | 2274 | #endif\r |