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a7ed1e2e 1/** @file\r
3507ab19 2 Industry Standard Definitions of SMBIOS Table Specification v2.6.1\r
a7ed1e2e 3\r
9df063a0 4Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
af2dc6a7 5This program and the accompanying materials are licensed and made available under \r
6the terms and conditions of the BSD License that accompanies this distribution. \r
7The full text of the license may be found at\r
8http://opensource.org/licenses/bsd-license.php. \r
9 \r
10THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
a7ed1e2e 12\r
a7ed1e2e 13**/\r
14\r
15#ifndef __SMBIOS_STANDARD_H__\r
16#define __SMBIOS_STANDARD_H__\r
98cb9ae8 17\r
f2d0889f 18///\r
19/// Reference SMBIOS 2.6, chapter 3.1.2.\r
20/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
21/// use by this specification.\r
22///\r
23#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
24\r
25///\r
af2dc6a7 26/// Reference SMBIOS 2.6, chapter 3.1.3.\r
27/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
f2d0889f 28///\r
29#define SMBIOS_STRING_MAX_LENGTH 64\r
30\r
31///\r
32/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
33/// Upper-level software that interprets the SMBIOS structure-table should bypass an \r
34/// Inactive structure just like a structure type that the software does not recognize.\r
35///\r
36#define SMBIOS_TYPE_INACTIVE 0x007E \r
37\r
38///\r
39/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
40/// The end-of-table indicator is used in the last physical structure in a table\r
41///\r
42#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
43\r
4135253b 44///\r
af2dc6a7 45/// Smbios Table Entry Point Structure.\r
4135253b 46///\r
766f4bc1 47#pragma pack(1)\r
a7ed1e2e 48typedef struct {\r
49 UINT8 AnchorString[4];\r
50 UINT8 EntryPointStructureChecksum;\r
51 UINT8 EntryPointLength;\r
52 UINT8 MajorVersion;\r
53 UINT8 MinorVersion;\r
54 UINT16 MaxStructureSize;\r
55 UINT8 EntryPointRevision;\r
56 UINT8 FormattedArea[5];\r
57 UINT8 IntermediateAnchorString[5];\r
58 UINT8 IntermediateChecksum;\r
59 UINT16 TableLength;\r
60 UINT32 TableAddress;\r
61 UINT16 NumberOfSmbiosStructures;\r
62 UINT8 SmbiosBcdRevision;\r
63} SMBIOS_TABLE_ENTRY_POINT;\r
64\r
ec8432e5 65///\r
af2dc6a7 66/// The Smbios structure header.\r
ec8432e5 67///\r
a7ed1e2e 68typedef struct {\r
69 UINT8 Type;\r
70 UINT8 Length;\r
71 UINT16 Handle;\r
72} SMBIOS_STRUCTURE;\r
73\r
bf7ea009 74///\r
75/// String Number for a Null terminated string, 00h stands for no string available.\r
76///\r
61ce5861 77typedef UINT8 SMBIOS_TABLE_STRING;\r
78\r
98cb9ae8 79///\r
80/// BIOS Characteristics \r
81/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc. \r
82///\r
83typedef struct {\r
af2dc6a7 84 UINT32 Reserved :2; ///< Bits 0-1.\r
98cb9ae8 85 UINT32 Unknown :1; \r
86 UINT32 BiosCharacteristicsNotSupported :1; \r
87 UINT32 IsaIsSupported :1; \r
88 UINT32 McaIsSupported :1;\r
89 UINT32 EisaIsSupported :1;\r
90 UINT32 PciIsSupported :1;\r
91 UINT32 PcmciaIsSupported :1;\r
92 UINT32 PlugAndPlayIsSupported :1;\r
93 UINT32 ApmIsSupported :1;\r
94 UINT32 BiosIsUpgradable :1;\r
95 UINT32 BiosShadowingAllowed :1;\r
96 UINT32 VlVesaIsSupported :1;\r
97 UINT32 EscdSupportIsAvailable :1;\r
98 UINT32 BootFromCdIsSupported :1;\r
99 UINT32 SelectableBootIsSupported :1;\r
100 UINT32 RomBiosIsSocketed :1;\r
101 UINT32 BootFromPcmciaIsSupported :1;\r
102 UINT32 EDDSpecificationIsSupported :1;\r
103 UINT32 JapaneseNecFloppyIsSupported :1;\r
104 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
105 UINT32 Floppy525_360IsSupported :1;\r
106 UINT32 Floppy525_12IsSupported :1;\r
107 UINT32 Floppy35_720IsSupported :1;\r
108 UINT32 Floppy35_288IsSupported :1;\r
109 UINT32 PrintScreenIsSupported :1;\r
110 UINT32 Keyboard8042IsSupported :1;\r
111 UINT32 SerialIsSupported :1;\r
112 UINT32 PrinterIsSupported :1;\r
113 UINT32 CgaMonoIsSupported :1;\r
114 UINT32 NecPc98 :1;\r
6800ac83 115 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
116 ///< and bits 48-63 reserved for System Vendor. \r
98cb9ae8 117} MISC_BIOS_CHARACTERISTICS;\r
118\r
119///\r
af2dc6a7 120/// BIOS Characteristics Extension Byte 1 .\r
98cb9ae8 121/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h \r
122/// within the BIOS Information structure.\r
123///\r
124typedef struct {\r
125 UINT8 AcpiIsSupported :1;\r
126 UINT8 UsbLegacyIsSupported :1; \r
127 UINT8 AgpIsSupported :1; \r
128 UINT8 I20BootIsSupported :1;\r
129 UINT8 Ls120BootIsSupported :1;\r
130 UINT8 AtapiZipDriveBootIsSupported :1;\r
131 UINT8 Boot1394IsSupported :1;\r
132 UINT8 SmartBatteryIsSupported :1;\r
133} MBCE_BIOS_RESERVED;\r
134\r
135///\r
af2dc6a7 136/// BIOS Characteristics Extension Byte 2.\r
98cb9ae8 137/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h \r
138/// within the BIOS Information structure.\r
139///\r
140typedef struct {\r
141 UINT8 BiosBootSpecIsSupported :1;\r
142 UINT8 FunctionKeyNetworkBootIsSupported :1; \r
143 UINT8 TargetContentDistributionEnabled :1; \r
6800ac83 144 UINT8 ExtensionByte2Reserved :1;\r
98cb9ae8 145} MBCE_SYSTEM_RESERVED;\r
146\r
147///\r
af2dc6a7 148/// BIOS Characteristics Extension Bytes.\r
98cb9ae8 149///\r
150typedef struct {\r
151 MBCE_BIOS_RESERVED BiosReserved;\r
152 MBCE_SYSTEM_RESERVED SystemReserved;\r
153 UINT8 Reserved;\r
154} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
155\r
4135253b 156///\r
af2dc6a7 157/// BIOS Information (Type 0).\r
4135253b 158///\r
61ce5861 159typedef struct {\r
98cb9ae8 160 SMBIOS_STRUCTURE Hdr;\r
161 SMBIOS_TABLE_STRING Vendor;\r
162 SMBIOS_TABLE_STRING BiosVersion;\r
163 UINT16 BiosSegment;\r
164 SMBIOS_TABLE_STRING BiosReleaseDate;\r
165 UINT8 BiosSize;\r
166 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
167 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
168 UINT8 SystemBiosMajorRelease;\r
169 UINT8 SystemBiosMinorRelease;\r
170 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
171 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
61ce5861 172} SMBIOS_TABLE_TYPE0;\r
173\r
98cb9ae8 174///\r
af2dc6a7 175/// System Wake-up Type.\r
98cb9ae8 176///\r
177typedef enum { \r
178 SystemWakeupTypeReserved = 0x00,\r
179 SystemWakeupTypeOther = 0x01,\r
180 SystemWakeupTypeUnknown = 0x02,\r
181 SystemWakeupTypeApmTimer = 0x03,\r
182 SystemWakeupTypeModemRing = 0x04,\r
183 SystemWakeupTypeLanRemote = 0x05,\r
184 SystemWakeupTypePowerSwitch = 0x06,\r
185 SystemWakeupTypePciPme = 0x07,\r
186 SystemWakeupTypeAcPowerRestored = 0x08\r
187} MISC_SYSTEM_WAKEUP_TYPE;\r
188\r
4135253b 189///\r
af2dc6a7 190/// System Information (Type 1).\r
98cb9ae8 191/// \r
192/// The information in this structure defines attributes of the overall system and is \r
193/// intended to be associated with the Component ID group of the system's MIF.\r
194/// An SMBIOS implementation is associated with a single system instance and contains \r
195/// one and only one System Information (Type 1) structure.\r
4135253b 196///\r
61ce5861 197typedef struct {\r
98cb9ae8 198 SMBIOS_STRUCTURE Hdr;\r
199 SMBIOS_TABLE_STRING Manufacturer;\r
200 SMBIOS_TABLE_STRING ProductName;\r
201 SMBIOS_TABLE_STRING Version;\r
202 SMBIOS_TABLE_STRING SerialNumber;\r
203 GUID Uuid;\r
af2dc6a7 204 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
98cb9ae8 205 SMBIOS_TABLE_STRING SKUNumber;\r
206 SMBIOS_TABLE_STRING Family;\r
61ce5861 207} SMBIOS_TABLE_TYPE1;\r
208\r
98cb9ae8 209///\r
af2dc6a7 210/// Base Board - Feature Flags. \r
98cb9ae8 211///\r
212typedef struct {\r
213 UINT8 Motherboard :1;\r
214 UINT8 RequiresDaughterCard :1;\r
215 UINT8 Removable :1;\r
216 UINT8 Replaceable :1;\r
217 UINT8 HotSwappable :1;\r
218 UINT8 Reserved :3;\r
219} BASE_BOARD_FEATURE_FLAGS;\r
220\r
221///\r
af2dc6a7 222/// Base Board - Board Type.\r
98cb9ae8 223///\r
224typedef enum { \r
225 BaseBoardTypeUnknown = 0x1,\r
226 BaseBoardTypeOther = 0x2,\r
227 BaseBoardTypeServerBlade = 0x3,\r
228 BaseBoardTypeConnectivitySwitch = 0x4,\r
229 BaseBoardTypeSystemManagementModule = 0x5,\r
230 BaseBoardTypeProcessorModule = 0x6,\r
231 BaseBoardTypeIOModule = 0x7,\r
232 BaseBoardTypeMemoryModule = 0x8,\r
233 BaseBoardTypeDaughterBoard = 0x9,\r
234 BaseBoardTypeMotherBoard = 0xA,\r
235 BaseBoardTypeProcessorMemoryModule = 0xB,\r
236 BaseBoardTypeProcessorIOModule = 0xC,\r
237 BaseBoardTypeInterconnectBoard = 0xD\r
238} BASE_BOARD_TYPE;\r
239\r
4135253b 240///\r
af2dc6a7 241/// Base Board (or Module) Information (Type 2).\r
4135253b 242///\r
1f9f8414 243/// The information in this structure defines attributes of a system baseboard - \r
98cb9ae8 244/// for example a motherboard, planar, or server blade or other standard system module.\r
245///\r
61ce5861 246typedef struct {\r
98cb9ae8 247 SMBIOS_STRUCTURE Hdr;\r
248 SMBIOS_TABLE_STRING Manufacturer;\r
249 SMBIOS_TABLE_STRING ProductName;\r
250 SMBIOS_TABLE_STRING Version;\r
251 SMBIOS_TABLE_STRING SerialNumber;\r
252 SMBIOS_TABLE_STRING AssetTag;\r
253 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
254 SMBIOS_TABLE_STRING LocationInChassis;\r
255 UINT16 ChassisHandle;\r
af2dc6a7 256 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
98cb9ae8 257 UINT8 NumberOfContainedObjectHandles;\r
258 UINT16 ContainedObjectHandles[1];\r
61ce5861 259} SMBIOS_TABLE_TYPE2;\r
260\r
98cb9ae8 261///\r
262/// System Enclosure or Chassis Types\r
263///\r
264typedef enum { \r
265 MiscChassisTypeOther = 0x01,\r
266 MiscChassisTypeUnknown = 0x02,\r
267 MiscChassisTypeDeskTop = 0x03,\r
268 MiscChassisTypeLowProfileDesktop = 0x04,\r
269 MiscChassisTypePizzaBox = 0x05,\r
270 MiscChassisTypeMiniTower = 0x06,\r
271 MiscChassisTypeTower = 0x07,\r
272 MiscChassisTypePortable = 0x08,\r
273 MiscChassisTypeLapTop = 0x09,\r
274 MiscChassisTypeNotebook = 0x0A,\r
275 MiscChassisTypeHandHeld = 0x0B,\r
276 MiscChassisTypeDockingStation = 0x0C,\r
277 MiscChassisTypeAllInOne = 0x0D,\r
278 MiscChassisTypeSubNotebook = 0x0E,\r
279 MiscChassisTypeSpaceSaving = 0x0F,\r
280 MiscChassisTypeLunchBox = 0x10,\r
281 MiscChassisTypeMainServerChassis = 0x11,\r
282 MiscChassisTypeExpansionChassis = 0x12,\r
283 MiscChassisTypeSubChassis = 0x13,\r
284 MiscChassisTypeBusExpansionChassis = 0x14,\r
285 MiscChassisTypePeripheralChassis = 0x15,\r
286 MiscChassisTypeRaidChassis = 0x16,\r
287 MiscChassisTypeRackMountChassis = 0x17,\r
288 MiscChassisTypeSealedCasePc = 0x18,\r
289 MiscChassisMultiSystemChassis = 0x19,\r
290 MiscChassisCompactPCI = 0x1A,\r
291 MiscChassisAdvancedTCA = 0x1B,\r
292 MiscChassisBlade = 0x1C,\r
293 MiscChassisBladeEnclosure = 0x1D\r
294} MISC_CHASSIS_TYPE;\r
295\r
296///\r
af2dc6a7 297/// System Enclosure or Chassis States .\r
98cb9ae8 298///\r
299typedef enum { \r
300 ChassisStateOther = 0x01,\r
301 ChassisStateUnknown = 0x02,\r
302 ChassisStateSafe = 0x03,\r
303 ChassisStateWarning = 0x04,\r
304 ChassisStateCritical = 0x05,\r
305 ChassisStateNonRecoverable = 0x06\r
306} MISC_CHASSIS_STATE;\r
307\r
308///\r
af2dc6a7 309/// System Enclosure or Chassis Security Status.\r
98cb9ae8 310///\r
311typedef enum { \r
312 ChassisSecurityStatusOther = 0x01,\r
313 ChassisSecurityStatusUnknown = 0x02,\r
314 ChassisSecurityStatusNone = 0x03,\r
315 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
316 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
317} MISC_CHASSIS_SECURITY_STATE;\r
318\r
bf7ea009 319///\r
320/// Contained Element record\r
321///\r
61ce5861 322typedef struct {\r
323 UINT8 ContainedElementType;\r
324 UINT8 ContainedElementMinimum;\r
325 UINT8 ContainedElementMaximum;\r
326} CONTAINED_ELEMENT;\r
327\r
98cb9ae8 328\r
4135253b 329///\r
af2dc6a7 330/// System Enclosure or Chassis (Type 3).\r
4135253b 331///\r
98cb9ae8 332/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
333/// For example, if a system included a separate enclosure for its peripheral devices, \r
334/// two structures would be returned: one for the main, system enclosure and the second for\r
335/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
336/// support the population of the CIM_Chassis class. \r
337///\r
61ce5861 338typedef struct {\r
98cb9ae8 339 SMBIOS_STRUCTURE Hdr;\r
340 SMBIOS_TABLE_STRING Manufacturer;\r
341 UINT8 Type;\r
342 SMBIOS_TABLE_STRING Version;\r
343 SMBIOS_TABLE_STRING SerialNumber;\r
344 SMBIOS_TABLE_STRING AssetTag;\r
af2dc6a7 345 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
346 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
347 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
348 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
98cb9ae8 349 UINT8 OemDefined[4];\r
350 UINT8 Height;\r
351 UINT8 NumberofPowerCords;\r
352 UINT8 ContainedElementCount;\r
353 UINT8 ContainedElementRecordLength;\r
354 CONTAINED_ELEMENT ContainedElements[1];\r
61ce5861 355} SMBIOS_TABLE_TYPE3;\r
356\r
98cb9ae8 357///\r
af2dc6a7 358/// Processor Information - Processor Type.\r
98cb9ae8 359///\r
360typedef enum {\r
361 ProcessorOther = 0x01,\r
362 ProcessorUnknown = 0x02,\r
363 CentralProcessor = 0x03,\r
364 MathProcessor = 0x04,\r
365 DspProcessor = 0x05,\r
366 VideoProcessor = 0x06\r
367} PROCESSOR_TYPE_DATA;\r
368\r
369///\r
af2dc6a7 370/// Processor Information - Processor Family.\r
98cb9ae8 371///\r
372typedef enum {\r
373 ProcessorFamilyOther = 0x01, \r
374 ProcessorFamilyUnknown = 0x02,\r
375 ProcessorFamily8086 = 0x03, \r
376 ProcessorFamily80286 = 0x04,\r
377 ProcessorFamilyIntel386 = 0x05, \r
378 ProcessorFamilyIntel486 = 0x06,\r
379 ProcessorFamily8087 = 0x07,\r
380 ProcessorFamily80287 = 0x08,\r
381 ProcessorFamily80387 = 0x09, \r
382 ProcessorFamily80487 = 0x0A,\r
383 ProcessorFamilyPentium = 0x0B, \r
384 ProcessorFamilyPentiumPro = 0x0C,\r
385 ProcessorFamilyPentiumII = 0x0D,\r
386 ProcessorFamilyPentiumMMX = 0x0E,\r
387 ProcessorFamilyCeleron = 0x0F,\r
388 ProcessorFamilyPentiumIIXeon = 0x10,\r
389 ProcessorFamilyPentiumIII = 0x11, \r
390 ProcessorFamilyM1 = 0x12,\r
391 ProcessorFamilyM2 = 0x13,\r
392 ProcessorFamilyM1Reserved2 = 0x14,\r
393 ProcessorFamilyM1Reserved3 = 0x15,\r
394 ProcessorFamilyM1Reserved4 = 0x16,\r
395 ProcessorFamilyM1Reserved5 = 0x17,\r
396 ProcessorFamilyAmdDuron = 0x18,\r
397 ProcessorFamilyK5 = 0x19, \r
398 ProcessorFamilyK6 = 0x1A,\r
399 ProcessorFamilyK6_2 = 0x1B,\r
400 ProcessorFamilyK6_3 = 0x1C,\r
401 ProcessorFamilyAmdAthlon = 0x1D,\r
402 ProcessorFamilyAmd29000 = 0x1E,\r
403 ProcessorFamilyK6_2Plus = 0x1F,\r
404 ProcessorFamilyPowerPC = 0x20,\r
405 ProcessorFamilyPowerPC601 = 0x21,\r
406 ProcessorFamilyPowerPC603 = 0x22,\r
407 ProcessorFamilyPowerPC603Plus = 0x23,\r
408 ProcessorFamilyPowerPC604 = 0x24,\r
409 ProcessorFamilyPowerPC620 = 0x25,\r
410 ProcessorFamilyPowerPCx704 = 0x26,\r
411 ProcessorFamilyPowerPC750 = 0x27,\r
3507ab19 412 ProcessorFamilyIntelCoreDuo = 0x28,\r
413 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
414 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
415 ProcessorFamilyIntelAtom = 0x2B,\r
98cb9ae8 416 ProcessorFamilyAlpha3 = 0x30,\r
417 ProcessorFamilyAlpha21064 = 0x31,\r
418 ProcessorFamilyAlpha21066 = 0x32,\r
419 ProcessorFamilyAlpha21164 = 0x33,\r
420 ProcessorFamilyAlpha21164PC = 0x34,\r
421 ProcessorFamilyAlpha21164a = 0x35,\r
422 ProcessorFamilyAlpha21264 = 0x36,\r
423 ProcessorFamilyAlpha21364 = 0x37,\r
424 ProcessorFamilyMips = 0x40,\r
425 ProcessorFamilyMIPSR4000 = 0x41,\r
426 ProcessorFamilyMIPSR4200 = 0x42,\r
427 ProcessorFamilyMIPSR4400 = 0x43,\r
428 ProcessorFamilyMIPSR4600 = 0x44,\r
429 ProcessorFamilyMIPSR10000 = 0x45,\r
430 ProcessorFamilySparc = 0x50,\r
431 ProcessorFamilySuperSparc = 0x51,\r
432 ProcessorFamilymicroSparcII = 0x52,\r
433 ProcessorFamilymicroSparcIIep = 0x53,\r
434 ProcessorFamilyUltraSparc = 0x54,\r
435 ProcessorFamilyUltraSparcII = 0x55,\r
436 ProcessorFamilyUltraSparcIIi = 0x56,\r
437 ProcessorFamilyUltraSparcIII = 0x57,\r
438 ProcessorFamilyUltraSparcIIIi = 0x58,\r
439 ProcessorFamily68040 = 0x60,\r
440 ProcessorFamily68xxx = 0x61,\r
441 ProcessorFamily68000 = 0x62,\r
442 ProcessorFamily68010 = 0x63,\r
443 ProcessorFamily68020 = 0x64,\r
444 ProcessorFamily68030 = 0x65,\r
445 ProcessorFamilyHobbit = 0x70,\r
446 ProcessorFamilyCrusoeTM5000 = 0x78,\r
447 ProcessorFamilyCrusoeTM3000 = 0x79,\r
448 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
449 ProcessorFamilyWeitek = 0x80,\r
450 ProcessorFamilyItanium = 0x82,\r
451 ProcessorFamilyAmdAthlon64 = 0x83,\r
452 ProcessorFamilyAmdOpteron = 0x84,\r
453 ProcessorFamilyAmdSempron = 0x85,\r
454 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
455 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
456 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
457 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
3507ab19 458 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
459 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
460 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
461 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
462 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
463 ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r
98cb9ae8 464 ProcessorFamilyPARISC = 0x90,\r
465 ProcessorFamilyPaRisc8500 = 0x91,\r
466 ProcessorFamilyPaRisc8000 = 0x92,\r
467 ProcessorFamilyPaRisc7300LC = 0x93,\r
468 ProcessorFamilyPaRisc7200 = 0x94,\r
469 ProcessorFamilyPaRisc7100LC = 0x95,\r
470 ProcessorFamilyPaRisc7100 = 0x96,\r
471 ProcessorFamilyV30 = 0xA0,\r
3507ab19 472 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
473 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
474 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
475 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
476 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
477 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
478 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
479 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
480 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
481 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
482 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
483 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
484 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
485 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
486 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
98cb9ae8 487 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
488 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
489 ProcessorFamilyPentium4 = 0xB2,\r
490 ProcessorFamilyIntelXeon = 0xB3,\r
491 ProcessorFamilyAS400 = 0xB4,\r
492 ProcessorFamilyIntelXeonMP = 0xB5,\r
493 ProcessorFamilyAMDAthlonXP = 0xB6,\r
494 ProcessorFamilyAMDAthlonMP = 0xB7,\r
495 ProcessorFamilyIntelItanium2 = 0xB8,\r
496 ProcessorFamilyIntelPentiumM = 0xB9,\r
497 ProcessorFamilyIntelCeleronD = 0xBA,\r
498 ProcessorFamilyIntelPentiumD = 0xBB,\r
499 ProcessorFamilyIntelPentiumEx = 0xBC,\r
6800ac83 500 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 correct this value\r
98cb9ae8 501 ProcessorFamilyReserved = 0xBE,\r
502 ProcessorFamilyIntelCore2 = 0xBF,\r
3507ab19 503 ProcessorFamilyIntelCore2Solo = 0xC0,\r
504 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
505 ProcessorFamilyIntelCore2Quad = 0xC2,\r
506 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
507 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
508 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
509 ProcessorFamilyIntelCoreI7 = 0xC6,\r
510 ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r
98cb9ae8 511 ProcessorFamilyIBM390 = 0xC8,\r
512 ProcessorFamilyG4 = 0xC9,\r
513 ProcessorFamilyG5 = 0xCA,\r
514 ProcessorFamilyG6 = 0xCB,\r
515 ProcessorFamilyzArchitectur = 0xCC,\r
516 ProcessorFamilyViaC7M = 0xD2,\r
517 ProcessorFamilyViaC7D = 0xD3,\r
518 ProcessorFamilyViaC7 = 0xD4,\r
519 ProcessorFamilyViaEden = 0xD5,\r
3507ab19 520 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
521 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
522 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
523 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
524 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
525 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
526 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
527 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
528 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
529 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
530 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
531 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
532 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
533 ProcessorFamilyAmdSempronSI = 0xEB,\r
98cb9ae8 534 ProcessorFamilyi860 = 0xFA,\r
535 ProcessorFamilyi960 = 0xFB,\r
536 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
537 ProcessorFamilyReserved1 = 0xFF\r
538} PROCESSOR_FAMILY_DATA;\r
539\r
540///\r
af2dc6a7 541/// Processor Information - Voltage. \r
98cb9ae8 542///\r
543typedef struct {\r
6800ac83 544 UINT8 ProcessorVoltageCapability5V :1; \r
545 UINT8 ProcessorVoltageCapability3_3V :1; \r
546 UINT8 ProcessorVoltageCapability2_9V :1; \r
547 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
548 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
549 UINT8 ProcessorVoltageIndicateLegacy :1;\r
98cb9ae8 550} PROCESSOR_VOLTAGE;\r
551\r
552///\r
af2dc6a7 553/// Processor Information - Processor Upgrade.\r
98cb9ae8 554///\r
555typedef enum {\r
556 ProcessorUpgradeOther = 0x01,\r
557 ProcessorUpgradeUnknown = 0x02,\r
558 ProcessorUpgradeDaughterBoard = 0x03,\r
559 ProcessorUpgradeZIFSocket = 0x04,\r
af2dc6a7 560 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
98cb9ae8 561 ProcessorUpgradeNone = 0x06,\r
562 ProcessorUpgradeLIFSocket = 0x07,\r
563 ProcessorUpgradeSlot1 = 0x08,\r
564 ProcessorUpgradeSlot2 = 0x09,\r
565 ProcessorUpgrade370PinSocket = 0x0A,\r
566 ProcessorUpgradeSlotA = 0x0B,\r
567 ProcessorUpgradeSlotM = 0x0C,\r
568 ProcessorUpgradeSocket423 = 0x0D,\r
af2dc6a7 569 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
98cb9ae8 570 ProcessorUpgradeSocket478 = 0x0F,\r
571 ProcessorUpgradeSocket754 = 0x10,\r
572 ProcessorUpgradeSocket940 = 0x11,\r
573 ProcessorUpgradeSocket939 = 0x12,\r
574 ProcessorUpgradeSocketmPGA604 = 0x13,\r
575 ProcessorUpgradeSocketLGA771 = 0x14,\r
576 ProcessorUpgradeSocketLGA775 = 0x15,\r
577 ProcessorUpgradeSocketS1 = 0x16,\r
578 ProcessorUpgradeAM2 = 0x17,\r
3507ab19 579 ProcessorUpgradeF1207 = 0x18,\r
580 ProcessorSocketLGA1366 = 0x19\r
98cb9ae8 581} PROCESSOR_UPGRADE;\r
582\r
583///\r
584/// Processor ID Field Description\r
585///\r
586typedef struct {\r
587 UINT32 ProcessorSteppingId:4;\r
588 UINT32 ProcessorModel: 4;\r
589 UINT32 ProcessorFamily: 4;\r
590 UINT32 ProcessorType: 2;\r
591 UINT32 ProcessorReserved1: 2;\r
592 UINT32 ProcessorXModel: 4;\r
593 UINT32 ProcessorXFamily: 8;\r
594 UINT32 ProcessorReserved2: 4;\r
595} PROCESSOR_SIGNATURE;\r
596\r
98cb9ae8 597typedef struct {\r
598 UINT32 ProcessorFpu :1;\r
599 UINT32 ProcessorVme :1;\r
600 UINT32 ProcessorDe :1;\r
601 UINT32 ProcessorPse :1;\r
602 UINT32 ProcessorTsc :1;\r
603 UINT32 ProcessorMsr :1;\r
604 UINT32 ProcessorPae :1;\r
605 UINT32 ProcessorMce :1;\r
606 UINT32 ProcessorCx8 :1;\r
607 UINT32 ProcessorApic :1;\r
608 UINT32 ProcessorReserved1 :1;\r
609 UINT32 ProcessorSep :1;\r
610 UINT32 ProcessorMtrr :1;\r
611 UINT32 ProcessorPge :1;\r
612 UINT32 ProcessorMca :1;\r
613 UINT32 ProcessorCmov :1;\r
614 UINT32 ProcessorPat :1;\r
615 UINT32 ProcessorPse36 :1;\r
616 UINT32 ProcessorPsn :1;\r
617 UINT32 ProcessorClfsh :1;\r
618 UINT32 ProcessorReserved2 :1;\r
619 UINT32 ProcessorDs :1;\r
620 UINT32 ProcessorAcpi :1;\r
621 UINT32 ProcessorMmx :1;\r
622 UINT32 ProcessorFxsr :1;\r
623 UINT32 ProcessorSse :1;\r
624 UINT32 ProcessorSse2 :1;\r
625 UINT32 ProcessorSs :1;\r
626 UINT32 ProcessorReserved3 :1;\r
627 UINT32 ProcessorTm :1;\r
628 UINT32 ProcessorReserved4 :2;\r
629} PROCESSOR_FEATURE_FLAGS;\r
630\r
631typedef struct {\r
632 PROCESSOR_SIGNATURE Signature;\r
98cb9ae8 633 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
6800ac83 634} PROCESSOR_ID_DATA;\r
98cb9ae8 635\r
4135253b 636///\r
af2dc6a7 637/// Processor Information (Type 4).\r
4135253b 638///\r
98cb9ae8 639/// The information in this structure defines the attributes of a single processor; \r
640/// a separate structure instance is provided for each system processor socket/slot. \r
641/// For example, a system with an IntelDX2 processor would have a single \r
af2dc6a7 642/// structure instance, while a system with an IntelSX2 processor would have a structure\r
643/// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r
98cb9ae8 644///\r
61ce5861 645typedef struct { \r
646 SMBIOS_STRUCTURE Hdr;\r
2d5e30ef 647 SMBIOS_TABLE_STRING Socket;\r
af2dc6a7 648 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
649 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
61ce5861 650 SMBIOS_TABLE_STRING ProcessorManufacture;\r
98cb9ae8 651 PROCESSOR_ID_DATA ProcessorId;\r
61ce5861 652 SMBIOS_TABLE_STRING ProcessorVersion;\r
98cb9ae8 653 PROCESSOR_VOLTAGE Voltage;\r
61ce5861 654 UINT16 ExternalClock;\r
655 UINT16 MaxSpeed;\r
656 UINT16 CurrentSpeed;\r
657 UINT8 Status;\r
af2dc6a7 658 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
61ce5861 659 UINT16 L1CacheHandle;\r
660 UINT16 L2CacheHandle;\r
661 UINT16 L3CacheHandle;\r
662 SMBIOS_TABLE_STRING SerialNumber;\r
663 SMBIOS_TABLE_STRING AssetTag;\r
664 SMBIOS_TABLE_STRING PartNumber;\r
665 //\r
666 // Add for smbios 2.5\r
667 //\r
668 UINT8 CoreCount;\r
669 UINT8 EnabledCoreCount;\r
670 UINT8 ThreadCount;\r
671 UINT16 ProcessorCharacteristics;\r
672 //\r
673 // Add for smbios 2.6\r
674 //\r
675 UINT16 ProcessorFamily2;\r
676} SMBIOS_TABLE_TYPE4;\r
677\r
98cb9ae8 678///\r
af2dc6a7 679/// Memory Controller Error Detecting Method.\r
98cb9ae8 680///\r
681typedef enum { \r
682 ErrorDetectingMethodOther = 0x01,\r
683 ErrorDetectingMethodUnknown = 0x02,\r
684 ErrorDetectingMethodNone = 0x03,\r
685 ErrorDetectingMethodParity = 0x04,\r
686 ErrorDetectingMethod32Ecc = 0x05,\r
687 ErrorDetectingMethod64Ecc = 0x06,\r
688 ErrorDetectingMethod128Ecc = 0x07,\r
689 ErrorDetectingMethodCrc = 0x08\r
690} MEMORY_ERROR_DETECT_METHOD;\r
691\r
692///\r
af2dc6a7 693/// Memory Controller Error Correcting Capability.\r
98cb9ae8 694///\r
695typedef struct {\r
696 UINT8 Other :1;\r
697 UINT8 Unknown :1;\r
698 UINT8 None :1;\r
699 UINT8 SingleBitErrorCorrect :1;\r
700 UINT8 DoubleBitErrorCorrect :1;\r
701 UINT8 ErrorScrubbing :1;\r
702 UINT8 Reserved :2;\r
703} MEMORY_ERROR_CORRECT_CAPABILITY;\r
704\r
705///\r
af2dc6a7 706/// Memory Controller Information - Interleave Support.\r
98cb9ae8 707///\r
708typedef enum { \r
709 MemoryInterleaveOther = 0x01,\r
710 MemoryInterleaveUnknown = 0x02,\r
711 MemoryInterleaveOneWay = 0x03,\r
712 MemoryInterleaveTwoWay = 0x04,\r
713 MemoryInterleaveFourWay = 0x05,\r
714 MemoryInterleaveEightWay = 0x06,\r
715 MemoryInterleaveSixteenWay = 0x07\r
716} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
717\r
718///\r
af2dc6a7 719/// Memory Controller Information - Memory Speeds.\r
98cb9ae8 720///\r
721typedef struct {\r
722 UINT16 Other :1;\r
723 UINT16 Unknown :1;\r
724 UINT16 SeventyNs:1;\r
725 UINT16 SixtyNs :1;\r
726 UINT16 FiftyNs :1;\r
727 UINT16 Reserved :11;\r
728} MEMORY_SPEED_TYPE;\r
729\r
4135253b 730///\r
af2dc6a7 731/// Memory Controller Information (Type 5, Obsolete).\r
4135253b 732///\r
98cb9ae8 733/// The information in this structure defines the attributes of the system's memory controller(s) \r
734/// and the supported attributes of any memory-modules present in the sockets controlled by \r
735/// this controller. \r
736/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
af2dc6a7 737/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 738/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
739/// choose to implement both memory description types to allow existing DMI browsers\r
740/// to properly display the system's memory attributes.\r
741///\r
61ce5861 742typedef struct {\r
98cb9ae8 743 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 744 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
98cb9ae8 745 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
af2dc6a7 746 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
747 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r
98cb9ae8 748 UINT8 MaxMemoryModuleSize;\r
749 MEMORY_SPEED_TYPE SupportSpeed;\r
750 UINT16 SupportMemoryType;\r
751 UINT8 MemoryModuleVoltage;\r
752 UINT8 AssociatedMemorySlotNum;\r
753 UINT16 MemoryModuleConfigHandles[1];\r
61ce5861 754} SMBIOS_TABLE_TYPE5;\r
755\r
98cb9ae8 756///\r
757/// Memory Module Information - Memory Types\r
758///\r
759typedef struct {\r
760 UINT16 Other :1;\r
761 UINT16 Unknown :1;\r
762 UINT16 Standard :1;\r
763 UINT16 FastPageMode:1;\r
b4ab47ec 764 UINT16 Edo :1;\r
98cb9ae8 765 UINT16 Parity :1;\r
b4ab47ec 766 UINT16 Ecc :1;\r
767 UINT16 Simm :1;\r
768 UINT16 Dimm :1;\r
98cb9ae8 769 UINT16 BurstEdo :1;\r
b4ab47ec 770 UINT16 Sdram :1;\r
98cb9ae8 771 UINT16 Reserved :5;\r
772} MEMORY_CURRENT_TYPE;\r
773\r
774///\r
af2dc6a7 775/// Memory Module Information - Memory Size.\r
98cb9ae8 776///\r
777typedef struct {\r
6800ac83 778 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
98cb9ae8 779 UINT8 SingleOrDoubleBank :1;\r
780} MEMORY_INSTALLED_ENABLED_SIZE;\r
781\r
4135253b 782///\r
783/// Memory Module Information (Type 6, Obsolete)\r
784///\r
98cb9ae8 785/// One Memory Module Information structure is included for each memory-module socket \r
786/// in the system. The structure describes the speed, type, size, and error status\r
787/// of each system memory module. The supported attributes of each module are described \r
788/// by the "owning" Memory Controller Information structure. \r
789/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
af2dc6a7 790/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
98cb9ae8 791/// and Memory Device (Type 17) structures should be used instead.\r
792///\r
61ce5861 793typedef struct {\r
98cb9ae8 794 SMBIOS_STRUCTURE Hdr;\r
795 SMBIOS_TABLE_STRING SocketDesignation;\r
796 UINT8 BankConnections;\r
797 UINT8 CurrentSpeed;\r
798 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
799 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
800 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
801 UINT8 ErrorStatus;\r
61ce5861 802} SMBIOS_TABLE_TYPE6;\r
803\r
98cb9ae8 804///\r
af2dc6a7 805/// Cache Information - SRAM Type.\r
98cb9ae8 806///\r
807typedef struct {\r
808 UINT16 Other :1;\r
809 UINT16 Unknown :1;\r
810 UINT16 NonBurst :1;\r
811 UINT16 Burst :1;\r
812 UINT16 PipelineBurst :1;\r
813 UINT16 Asynchronous :1;\r
814 UINT16 Synchronous :1;\r
815 UINT16 Reserved :9;\r
816} CACHE_SRAM_TYPE_DATA;\r
817\r
818///\r
af2dc6a7 819/// Cache Information - Error Correction Type.\r
98cb9ae8 820///\r
821typedef enum {\r
822 CacheErrorOther = 0x01,\r
823 CacheErrorUnknown = 0x02,\r
824 CacheErrorNone = 0x03,\r
825 CacheErrorParity = 0x04,\r
6800ac83 826 CacheErrorSingleBit = 0x05, ///< ECC\r
827 CacheErrorMultiBit = 0x06 ///< ECC\r
98cb9ae8 828} CACHE_ERROR_TYPE_DATA;\r
829\r
830///\r
af2dc6a7 831/// Cache Information - System Cache Type. \r
98cb9ae8 832///\r
833typedef enum {\r
834 CacheTypeOther = 0x01,\r
835 CacheTypeUnknown = 0x02,\r
836 CacheTypeInstruction = 0x03,\r
837 CacheTypeData = 0x04,\r
838 CacheTypeUnified = 0x05\r
839} CACHE_TYPE_DATA;\r
840\r
841///\r
af2dc6a7 842/// Cache Information - Associativity. \r
98cb9ae8 843///\r
844typedef enum {\r
845 CacheAssociativityOther = 0x01,\r
846 CacheAssociativityUnknown = 0x02,\r
847 CacheAssociativityDirectMapped = 0x03,\r
848 CacheAssociativity2Way = 0x04,\r
849 CacheAssociativity4Way = 0x05,\r
850 CacheAssociativityFully = 0x06,\r
851 CacheAssociativity8Way = 0x07,\r
852 CacheAssociativity16Way = 0x08,\r
3507ab19 853 CacheAssociativity12Way = 0x09,\r
854 CacheAssociativity24Way = 0x0A,\r
855 CacheAssociativity32Way = 0x0B,\r
856 CacheAssociativity48Way = 0x0C,\r
857 CacheAssociativity64Way = 0x0D\r
98cb9ae8 858} CACHE_ASSOCIATIVITY_DATA;\r
859\r
4135253b 860///\r
af2dc6a7 861/// Cache Information (Type 7).\r
4135253b 862///\r
af2dc6a7 863/// The information in this structure defines the attributes of CPU cache device in the system. \r
98cb9ae8 864/// One structure is specified for each such device, whether the device is internal to\r
865/// or external to the CPU module. Cache modules can be associated with a processor structure\r
af2dc6a7 866/// in one or two ways, depending on the SMBIOS version.\r
98cb9ae8 867///\r
61ce5861 868typedef struct {\r
98cb9ae8 869 SMBIOS_STRUCTURE Hdr;\r
870 SMBIOS_TABLE_STRING SocketDesignation;\r
871 UINT16 CacheConfiguration;\r
872 UINT16 MaximumCacheSize;\r
873 UINT16 InstalledSize;\r
874 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
875 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
876 UINT8 CacheSpeed;\r
af2dc6a7 877 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
878 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
879 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
61ce5861 880} SMBIOS_TABLE_TYPE7;\r
881\r
98cb9ae8 882///\r
af2dc6a7 883/// Port Connector Information - Connector Types. \r
98cb9ae8 884///\r
885typedef enum {\r
886 PortConnectorTypeNone = 0x00,\r
887 PortConnectorTypeCentronics = 0x01,\r
888 PortConnectorTypeMiniCentronics = 0x02,\r
889 PortConnectorTypeProprietary = 0x03,\r
890 PortConnectorTypeDB25Male = 0x04,\r
891 PortConnectorTypeDB25Female = 0x05,\r
892 PortConnectorTypeDB15Male = 0x06,\r
893 PortConnectorTypeDB15Female = 0x07,\r
894 PortConnectorTypeDB9Male = 0x08,\r
895 PortConnectorTypeDB9Female = 0x09,\r
896 PortConnectorTypeRJ11 = 0x0A,\r
897 PortConnectorTypeRJ45 = 0x0B,\r
898 PortConnectorType50PinMiniScsi = 0x0C,\r
899 PortConnectorTypeMiniDin = 0x0D,\r
900 PortConnectorTypeMicriDin = 0x0E,\r
901 PortConnectorTypePS2 = 0x0F,\r
902 PortConnectorTypeInfrared = 0x10,\r
903 PortConnectorTypeHpHil = 0x11,\r
904 PortConnectorTypeUsb = 0x12,\r
905 PortConnectorTypeSsaScsi = 0x13,\r
906 PortConnectorTypeCircularDin8Male = 0x14,\r
907 PortConnectorTypeCircularDin8Female = 0x15,\r
908 PortConnectorTypeOnboardIde = 0x16,\r
909 PortConnectorTypeOnboardFloppy = 0x17,\r
910 PortConnectorType9PinDualInline = 0x18,\r
911 PortConnectorType25PinDualInline = 0x19,\r
912 PortConnectorType50PinDualInline = 0x1A,\r
913 PortConnectorType68PinDualInline = 0x1B,\r
914 PortConnectorTypeOnboardSoundInput = 0x1C,\r
915 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
916 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
917 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
918 PortConnectorTypeBNC = 0x20,\r
919 PortConnectorType1394 = 0x21,\r
920 PortConnectorTypePC98 = 0xA0,\r
921 PortConnectorTypePC98Hireso = 0xA1,\r
922 PortConnectorTypePCH98 = 0xA2,\r
923 PortConnectorTypePC98Note = 0xA3,\r
924 PortConnectorTypePC98Full = 0xA4,\r
925 PortConnectorTypeOther = 0xFF\r
926} MISC_PORT_CONNECTOR_TYPE;\r
927\r
928///\r
929/// Port Connector Information - Port Types \r
930///\r
931typedef enum {\r
932 PortTypeNone = 0x00,\r
933 PortTypeParallelXtAtCompatible = 0x01,\r
934 PortTypeParallelPortPs2 = 0x02,\r
935 PortTypeParallelPortEcp = 0x03,\r
936 PortTypeParallelPortEpp = 0x04,\r
937 PortTypeParallelPortEcpEpp = 0x05,\r
938 PortTypeSerialXtAtCompatible = 0x06,\r
939 PortTypeSerial16450Compatible = 0x07,\r
940 PortTypeSerial16550Compatible = 0x08,\r
941 PortTypeSerial16550ACompatible = 0x09,\r
942 PortTypeScsi = 0x0A,\r
943 PortTypeMidi = 0x0B,\r
944 PortTypeJoyStick = 0x0C,\r
945 PortTypeKeyboard = 0x0D,\r
946 PortTypeMouse = 0x0E,\r
947 PortTypeSsaScsi = 0x0F,\r
948 PortTypeUsb = 0x10,\r
949 PortTypeFireWire = 0x11,\r
950 PortTypePcmciaTypeI = 0x12,\r
951 PortTypePcmciaTypeII = 0x13,\r
952 PortTypePcmciaTypeIII = 0x14,\r
953 PortTypeCardBus = 0x15,\r
954 PortTypeAccessBusPort = 0x16,\r
955 PortTypeScsiII = 0x17,\r
956 PortTypeScsiWide = 0x18,\r
957 PortTypePC98 = 0x19,\r
958 PortTypePC98Hireso = 0x1A,\r
959 PortTypePCH98 = 0x1B,\r
960 PortTypeVideoPort = 0x1C,\r
961 PortTypeAudioPort = 0x1D,\r
962 PortTypeModemPort = 0x1E,\r
963 PortTypeNetworkPort = 0x1F,\r
964 PortType8251Compatible = 0xA0,\r
965 PortType8251FifoCompatible = 0xA1,\r
966 PortTypeOther = 0xFF\r
967} MISC_PORT_TYPE;\r
968\r
4135253b 969///\r
af2dc6a7 970/// Port Connector Information (Type 8).\r
4135253b 971///\r
98cb9ae8 972/// The information in this structure defines the attributes of a system port connector, \r
1f9f8414 973/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
98cb9ae8 974/// are provided. One structure is present for each port provided by the system.\r
975///\r
61ce5861 976typedef struct {\r
98cb9ae8 977 SMBIOS_STRUCTURE Hdr;\r
978 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
af2dc6a7 979 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
98cb9ae8 980 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
af2dc6a7 981 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
982 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
61ce5861 983} SMBIOS_TABLE_TYPE8;\r
984\r
98cb9ae8 985///\r
986/// System Slots - Slot Type\r
987///\r
988typedef enum {\r
989 SlotTypeOther = 0x01,\r
990 SlotTypeUnknown = 0x02,\r
991 SlotTypeIsa = 0x03,\r
992 SlotTypeMca = 0x04,\r
993 SlotTypeEisa = 0x05,\r
994 SlotTypePci = 0x06,\r
995 SlotTypePcmcia = 0x07,\r
996 SlotTypeVlVesa = 0x08,\r
997 SlotTypeProprietary = 0x09,\r
998 SlotTypeProcessorCardSlot = 0x0A,\r
999 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1000 SlotTypeIORiserCardSlot = 0x0C,\r
1001 SlotTypeNuBus = 0x0D,\r
1002 SlotTypePci66MhzCapable = 0x0E,\r
1003 SlotTypeAgp = 0x0F,\r
1004 SlotTypeApg2X = 0x10,\r
1005 SlotTypeAgp4X = 0x11,\r
1006 SlotTypePciX = 0x12,\r
1007 SlotTypeAgp4x = 0x13,\r
1008 SlotTypePC98C20 = 0xA0,\r
1009 SlotTypePC98C24 = 0xA1,\r
1010 SlotTypePC98E = 0xA2,\r
1011 SlotTypePC98LocalBus = 0xA3,\r
1012 SlotTypePC98Card = 0xA4,\r
1013 SlotTypePciExpress = 0xA5,\r
1014 SlotTypePciExpressX1 = 0xA6,\r
1015 SlotTypePciExpressX2 = 0xA7,\r
1016 SlotTypePciExpressX4 = 0xA8,\r
1017 SlotTypePciExpressX8 = 0xA9,\r
3507ab19 1018 SlotTypePciExpressX16 = 0xAA,\r
1019 SlotTypePciExpressGen2 = 0xAB,\r
1020 SlotTypePciExpressGen2X1 = 0xAC,\r
1021 SlotTypePciExpressGen2X2 = 0xAD,\r
1022 SlotTypePciExpressGen2X4 = 0xAE,\r
1023 SlotTypePciExpressGen2X8 = 0xAF,\r
1024 SlotTypePciExpressGen2X16 = 0xB0\r
98cb9ae8 1025} MISC_SLOT_TYPE;\r
1026\r
1027///\r
af2dc6a7 1028/// System Slots - Slot Data Bus Width.\r
98cb9ae8 1029///\r
1030typedef enum {\r
1031 SlotDataBusWidthOther = 0x01,\r
1032 SlotDataBusWidthUnknown = 0x02,\r
1033 SlotDataBusWidth8Bit = 0x03,\r
1034 SlotDataBusWidth16Bit = 0x04,\r
1035 SlotDataBusWidth32Bit = 0x05,\r
1036 SlotDataBusWidth64Bit = 0x06,\r
1037 SlotDataBusWidth128Bit = 0x07,\r
6800ac83 1038 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1039 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1040 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1041 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1042 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1043 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1044 SlotDataBusWidth32X = 0x0E ///< Or X32\r
98cb9ae8 1045} MISC_SLOT_DATA_BUS_WIDTH;\r
1046\r
1047///\r
af2dc6a7 1048/// System Slots - Current Usage.\r
98cb9ae8 1049///\r
1050typedef enum {\r
1051 SlotUsageOther = 0x01,\r
1052 SlotUsageUnknown = 0x02,\r
1053 SlotUsageAvailable = 0x03,\r
1054 SlotUsageInUse = 0x04\r
1055} MISC_SLOT_USAGE;\r
1056\r
1057///\r
af2dc6a7 1058/// System Slots - Slot Length. \r
98cb9ae8 1059///\r
1060typedef enum {\r
1061 SlotLengthOther = 0x01,\r
1062 SlotLengthUnknown = 0x02,\r
1063 SlotLengthShort = 0x03,\r
1064 SlotLengthLong = 0x04\r
1065} MISC_SLOT_LENGTH;\r
1066\r
1067///\r
af2dc6a7 1068/// System Slots - Slot Characteristics 1. \r
98cb9ae8 1069///\r
1070typedef struct {\r
1071 UINT8 CharacteristicsUnknown :1;\r
1072 UINT8 Provides50Volts :1;\r
1073 UINT8 Provides33Volts :1;\r
1074 UINT8 SharedSlot :1;\r
1075 UINT8 PcCard16Supported :1;\r
1076 UINT8 CardBusSupported :1;\r
1077 UINT8 ZoomVideoSupported :1;\r
1078 UINT8 ModemRingResumeSupported:1;\r
1079} MISC_SLOT_CHARACTERISTICS1;\r
1080///\r
af2dc6a7 1081/// System Slots - Slot Characteristics 2. \r
98cb9ae8 1082///\r
1083typedef struct {\r
1084 UINT8 PmeSignalSupported :1;\r
1085 UINT8 HotPlugDevicesSupported :1;\r
1086 UINT8 SmbusSignalSupported :1;\r
6800ac83 1087 UINT8 Reserved :5; ///< Set to 0.\r
98cb9ae8 1088} MISC_SLOT_CHARACTERISTICS2;\r
1089\r
4135253b 1090///\r
1091/// System Slots (Type 9)\r
1092///\r
98cb9ae8 1093/// The information in this structure defines the attributes of a system slot. \r
1094/// One structure is provided for each slot in the system.\r
1095///\r
1096///\r
61ce5861 1097typedef struct {\r
98cb9ae8 1098 SMBIOS_STRUCTURE Hdr;\r
1099 SMBIOS_TABLE_STRING SlotDesignation;\r
af2dc6a7 1100 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1101 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1102 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1103 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
98cb9ae8 1104 UINT16 SlotID;\r
1105 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1106 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
61ce5861 1107 //\r
1108 // Add for smbios 2.6\r
1109 //\r
98cb9ae8 1110 UINT16 SegmentGroupNum;\r
1111 UINT8 BusNum;\r
1112 UINT8 DevFuncNum;\r
61ce5861 1113} SMBIOS_TABLE_TYPE9;\r
1114\r
98cb9ae8 1115///\r
af2dc6a7 1116/// On Board Devices Information - Device Types. \r
98cb9ae8 1117///\r
1118typedef enum {\r
1119 OnBoardDeviceTypeOther = 0x01,\r
1120 OnBoardDeviceTypeUnknown = 0x02,\r
1121 OnBoardDeviceTypeVideo = 0x03,\r
1122 OnBoardDeviceTypeScsiController = 0x04,\r
1123 OnBoardDeviceTypeEthernet = 0x05,\r
1124 OnBoardDeviceTypeTokenRing = 0x06,\r
1125 OnBoardDeviceTypeSound = 0x07\r
1126} MISC_ONBOARD_DEVICE_TYPE;\r
1127\r
bf7ea009 1128///\r
1129/// Device Item Entry\r
1130///\r
61ce5861 1131typedef struct {\r
af2dc6a7 1132 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1133 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
98cb9ae8 1134 SMBIOS_TABLE_STRING DescriptionString;\r
61ce5861 1135} DEVICE_STRUCT;\r
1136\r
4135253b 1137///\r
af2dc6a7 1138/// On Board Devices Information (Type 10, obsolete).\r
4135253b 1139///\r
98cb9ae8 1140/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
1141/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
1142/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
1143/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
1144/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1145/// has some level of control over the enabling of the associated device for use by the system.\r
1146///\r
61ce5861 1147typedef struct {\r
1148 SMBIOS_STRUCTURE Hdr;\r
1149 DEVICE_STRUCT Device[1];\r
1150} SMBIOS_TABLE_TYPE10;\r
1151\r
4135253b 1152///\r
af2dc6a7 1153/// OEM Strings (Type 11).\r
98cb9ae8 1154/// This structure contains free form strings defined by the OEM. Examples of this are: \r
1155/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
4135253b 1156///\r
61ce5861 1157typedef struct {\r
1158 SMBIOS_STRUCTURE Hdr;\r
1159 UINT8 StringCount;\r
1160} SMBIOS_TABLE_TYPE11;\r
1161\r
4135253b 1162///\r
af2dc6a7 1163/// System Configuration Options (Type 12).\r
4135253b 1164///\r
98cb9ae8 1165/// This structure contains information required to configure the base board's Jumpers and Switches. \r
1166///\r
61ce5861 1167typedef struct {\r
1168 SMBIOS_STRUCTURE Hdr;\r
1169 UINT8 StringCount;\r
1170} SMBIOS_TABLE_TYPE12;\r
1171\r
98cb9ae8 1172\r
4135253b 1173///\r
af2dc6a7 1174/// BIOS Language Information (Type 13).\r
4135253b 1175///\r
98cb9ae8 1176/// The information in this structure defines the installable language attributes of the BIOS. \r
1177/// \r
61ce5861 1178typedef struct {\r
1179 SMBIOS_STRUCTURE Hdr;\r
1180 UINT8 InstallableLanguages;\r
1181 UINT8 Flags;\r
fbfa4a1d 1182 UINT8 Reserved[15];\r
61ce5861 1183 SMBIOS_TABLE_STRING CurrentLanguages;\r
1184} SMBIOS_TABLE_TYPE13;\r
1185\r
98cb9ae8 1186///\r
af2dc6a7 1187/// System Event Log - Event Log Types.\r
98cb9ae8 1188/// \r
1189typedef enum {\r
1190 EventLogTypeReserved = 0x00,\r
1191 EventLogTypeSingleBitECC = 0x01,\r
1192 EventLogTypeMultiBitECC = 0x02,\r
1193 EventLogTypeParityMemErr = 0x03,\r
1194 EventLogTypeBusTimeOut = 0x04,\r
1195 EventLogTypeIOChannelCheck = 0x05,\r
1196 EventLogTypeSoftwareNMI = 0x06,\r
1197 EventLogTypePOSTMemResize = 0x07,\r
1198 EventLogTypePOSTErr = 0x08,\r
1199 EventLogTypePCIParityErr = 0x09,\r
1200 EventLogTypePCISystemErr = 0x0A,\r
1201 EventLogTypeCPUFailure = 0x0B,\r
1202 EventLogTypeEISATimeOut = 0x0C,\r
1203 EventLogTypeMemLogDisabled = 0x0D,\r
1204 EventLogTypeLoggingDisabled = 0x0E,\r
1205 EventLogTypeSysLimitExce = 0x10,\r
1206 EventLogTypeAsyncHWTimer = 0x11,\r
1207 EventLogTypeSysConfigInfo = 0x12,\r
1208 EventLogTypeHDInfo = 0x13,\r
1209 EventLogTypeSysReconfig = 0x14,\r
1210 EventLogTypeUncorrectCPUErr = 0x15,\r
1211 EventLogTypeAreaResetAndClr = 0x16,\r
1212 EventLogTypeSystemBoot = 0x17,\r
6800ac83 1213 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1214 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
98cb9ae8 1215 EventLogTypeEndOfLog = 0xFF\r
1216} EVENT_LOG_TYPE_DATA;\r
1217\r
1218///\r
af2dc6a7 1219/// System Event Log - Variable Data Format Types. \r
98cb9ae8 1220/// \r
1221typedef enum {\r
1222 EventLogVariableNone = 0x00,\r
1223 EventLogVariableHandle = 0x01,\r
1224 EventLogVariableMutilEvent = 0x02,\r
1225 EventLogVariableMutilEventHandle = 0x03,\r
1226 EventLogVariablePOSTResultBitmap = 0x04,\r
1227 EventLogVariableSysManagementType = 0x05,\r
1228 EventLogVariableMutliEventSysManagmentType = 0x06, \r
1229 EventLogVariableUnused = 0x07,\r
1230 EventLogVariableOEMAssigned = 0x80\r
55deb978 1231} EVENT_LOG_VARIABLE_DATA;\r
98cb9ae8 1232\r
bf7ea009 1233///\r
1234/// Group Item Entry\r
1235///\r
61ce5861 1236typedef struct {\r
1237 UINT8 ItemType;\r
1238 UINT16 ItemHandle;\r
1239} GROUP_STRUCT;\r
1240\r
98cb9ae8 1241///\r
1242/// Event Log Type Descriptors\r
1243///\r
1244typedef struct {\r
af2dc6a7 1245 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
98cb9ae8 1246 UINT8 DataFormatType;\r
1247} EVENT_LOG_TYPE;\r
1248\r
4135253b 1249///\r
af2dc6a7 1250/// Group Associations (Type 14).\r
4135253b 1251///\r
98cb9ae8 1252/// The Group Associations structure is provided for OEMs who want to specify \r
1253/// the arrangement or hierarchy of certain components (including other Group Associations) \r
1254/// within the system. \r
1255///\r
61ce5861 1256typedef struct {\r
1257 SMBIOS_STRUCTURE Hdr;\r
1258 SMBIOS_TABLE_STRING GroupName;\r
1259 GROUP_STRUCT Group[1];\r
1260} SMBIOS_TABLE_TYPE14;\r
1261\r
4135253b 1262///\r
af2dc6a7 1263/// System Event Log (Type 15).\r
4135253b 1264///\r
98cb9ae8 1265/// The presence of this structure within the SMBIOS data returned for a system indicates \r
1266/// that the system supports an event log. An event log is a fixed-length area within a \r
1267/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
1268/// record, followed by one or more variable-length log records. \r
1269///\r
61ce5861 1270typedef struct {\r
1271 SMBIOS_STRUCTURE Hdr;\r
1272 UINT16 LogAreaLength;\r
1273 UINT16 LogHeaderStartOffset;\r
1274 UINT16 LogDataStartOffset;\r
1275 UINT8 AccessMethod;\r
1276 UINT8 LogStatus;\r
1277 UINT32 LogChangeToken;\r
1278 UINT32 AccessMethodAddress;\r
1279 UINT8 LogHeaderFormat;\r
1280 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1281 UINT8 LengthOfLogTypeDescriptor;\r
1282 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1283} SMBIOS_TABLE_TYPE15;\r
1284\r
98cb9ae8 1285///\r
af2dc6a7 1286/// Physical Memory Array - Location.\r
98cb9ae8 1287///\r
1288typedef enum {\r
1289 MemoryArrayLocationOther = 0x01,\r
1290 MemoryArrayLocationUnknown = 0x02,\r
1291 MemoryArrayLocationSystemBoard = 0x03,\r
1292 MemoryArrayLocationIsaAddonCard = 0x04,\r
1293 MemoryArrayLocationEisaAddonCard = 0x05,\r
1294 MemoryArrayLocationPciAddonCard = 0x06,\r
1295 MemoryArrayLocationMcaAddonCard = 0x07,\r
1296 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1297 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1298 MemoryArrayLocationNuBus = 0x0A,\r
1299 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1300 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1301 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1302 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1303} MEMORY_ARRAY_LOCATION;\r
1304\r
1305///\r
af2dc6a7 1306/// Physical Memory Array - Use.\r
98cb9ae8 1307///\r
1308typedef enum {\r
1309 MemoryArrayUseOther = 0x01,\r
1310 MemoryArrayUseUnknown = 0x02,\r
1311 MemoryArrayUseSystemMemory = 0x03,\r
1312 MemoryArrayUseVideoMemory = 0x04,\r
1313 MemoryArrayUseFlashMemory = 0x05,\r
1314 MemoryArrayUseNonVolatileRam = 0x06,\r
1315 MemoryArrayUseCacheMemory = 0x07\r
1316} MEMORY_ARRAY_USE;\r
1317\r
1318///\r
af2dc6a7 1319/// Physical Memory Array - Error Correction Types. \r
98cb9ae8 1320///\r
1321typedef enum {\r
1322 MemoryErrorCorrectionOther = 0x01,\r
1323 MemoryErrorCorrectionUnknown = 0x02,\r
1324 MemoryErrorCorrectionNone = 0x03,\r
1325 MemoryErrorCorrectionParity = 0x04,\r
1326 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1327 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1328 MemoryErrorCorrectionCrc = 0x07\r
1329} MEMORY_ERROR_CORRECTION;\r
1330\r
4135253b 1331///\r
af2dc6a7 1332/// Physical Memory Array (Type 16).\r
4135253b 1333///\r
98cb9ae8 1334/// This structure describes a collection of memory devices that operate \r
1335/// together to form a memory address space. \r
1336///\r
61ce5861 1337typedef struct {\r
98cb9ae8 1338 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1339 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1340 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1341 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
98cb9ae8 1342 UINT32 MaximumCapacity;\r
1343 UINT16 MemoryErrorInformationHandle;\r
1344 UINT16 NumberOfMemoryDevices;\r
61ce5861 1345} SMBIOS_TABLE_TYPE16;\r
1346\r
98cb9ae8 1347///\r
af2dc6a7 1348/// Memory Device - Form Factor.\r
98cb9ae8 1349///\r
1350typedef enum {\r
1351 MemoryFormFactorOther = 0x01,\r
1352 MemoryFormFactorUnknown = 0x02,\r
1353 MemoryFormFactorSimm = 0x03,\r
1354 MemoryFormFactorSip = 0x04,\r
1355 MemoryFormFactorChip = 0x05,\r
1356 MemoryFormFactorDip = 0x06,\r
1357 MemoryFormFactorZip = 0x07,\r
1358 MemoryFormFactorProprietaryCard = 0x08,\r
1359 MemoryFormFactorDimm = 0x09,\r
1360 MemoryFormFactorTsop = 0x0A,\r
1361 MemoryFormFactorRowOfChips = 0x0B,\r
1362 MemoryFormFactorRimm = 0x0C,\r
1363 MemoryFormFactorSodimm = 0x0D,\r
1364 MemoryFormFactorSrimm = 0x0E,\r
1365 MemoryFormFactorFbDimm = 0x0F\r
1366} MEMORY_FORM_FACTOR;\r
1367\r
1368///\r
1369/// Memory Device - Type\r
1370///\r
1371typedef enum {\r
1372 MemoryTypeOther = 0x01,\r
1373 MemoryTypeUnknown = 0x02,\r
1374 MemoryTypeDram = 0x03,\r
1375 MemoryTypeEdram = 0x04,\r
1376 MemoryTypeVram = 0x05,\r
1377 MemoryTypeSram = 0x06,\r
1378 MemoryTypeRam = 0x07,\r
1379 MemoryTypeRom = 0x08,\r
1380 MemoryTypeFlash = 0x09,\r
1381 MemoryTypeEeprom = 0x0A,\r
1382 MemoryTypeFeprom = 0x0B,\r
1383 MemoryTypeEprom = 0x0C,\r
1384 MemoryTypeCdram = 0x0D,\r
1385 MemoryType3Dram = 0x0E,\r
1386 MemoryTypeSdram = 0x0F,\r
1387 MemoryTypeSgram = 0x10,\r
1388 MemoryTypeRdram = 0x11,\r
1389 MemoryTypeDdr = 0x12,\r
1390 MemoryTypeDdr2 = 0x13,\r
3507ab19 1391 MemoryTypeDdr2FbDimm = 0x14,\r
1392 MemoryTypeDdr3 = 0x18,\r
1393 MemoryTypeFbd2 = 0x19\r
98cb9ae8 1394} MEMORY_DEVICE_TYPE;\r
1395\r
1396typedef struct {\r
1397 UINT16 Reserved :1;\r
1398 UINT16 Other :1;\r
1399 UINT16 Unknown :1;\r
1400 UINT16 FastPaged :1;\r
1401 UINT16 StaticColumn :1;\r
1402 UINT16 PseudoStatic :1;\r
1403 UINT16 Rambus :1;\r
1404 UINT16 Synchronous :1;\r
1405 UINT16 Cmos :1;\r
1406 UINT16 Edo :1;\r
1407 UINT16 WindowDram :1;\r
1408 UINT16 CacheDram :1;\r
1409 UINT16 Nonvolatile :1;\r
1410 UINT16 Reserved1 :3;\r
1411} MEMORY_DEVICE_TYPE_DETAIL;\r
1412\r
4135253b 1413///\r
af2dc6a7 1414/// Memory Device (Type 17).\r
4135253b 1415///\r
98cb9ae8 1416/// This structure describes a single memory device that is part of \r
1417/// a larger Physical Memory Array (Type 16).\r
1418/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
af2dc6a7 1419/// includes a Memory Device structure instance for each slot, whether or not the \r
98cb9ae8 1420/// socket is currently populated.\r
1421///\r
61ce5861 1422typedef struct {\r
98cb9ae8 1423 SMBIOS_STRUCTURE Hdr;\r
1424 UINT16 MemoryArrayHandle;\r
1425 UINT16 MemoryErrorInformationHandle;\r
1426 UINT16 TotalWidth;\r
1427 UINT16 DataWidth;\r
1428 UINT16 Size;\r
af2dc6a7 1429 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
98cb9ae8 1430 UINT8 DeviceSet;\r
1431 SMBIOS_TABLE_STRING DeviceLocator;\r
1432 SMBIOS_TABLE_STRING BankLocator;\r
af2dc6a7 1433 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
98cb9ae8 1434 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1435 UINT16 Speed;\r
1436 SMBIOS_TABLE_STRING Manufacturer;\r
1437 SMBIOS_TABLE_STRING SerialNumber;\r
1438 SMBIOS_TABLE_STRING AssetTag;\r
1439 SMBIOS_TABLE_STRING PartNumber;\r
61ce5861 1440 //\r
1441 // Add for smbios 2.6\r
1442 // \r
1443 UINT8 Attributes;\r
1444} SMBIOS_TABLE_TYPE17;\r
1445\r
98cb9ae8 1446///\r
af2dc6a7 1447/// 32-bit Memory Error Information - Error Type. \r
98cb9ae8 1448///\r
1449typedef enum { \r
1450 MemoryErrorOther = 0x01,\r
1451 MemoryErrorUnknown = 0x02,\r
1452 MemoryErrorOk = 0x03,\r
1453 MemoryErrorBadRead = 0x04,\r
1454 MemoryErrorParity = 0x05,\r
1455 MemoryErrorSigleBit = 0x06,\r
1456 MemoryErrorDoubleBit = 0x07,\r
1457 MemoryErrorMultiBit = 0x08,\r
1458 MemoryErrorNibble = 0x09,\r
1459 MemoryErrorChecksum = 0x0A,\r
1460 MemoryErrorCrc = 0x0B,\r
1461 MemoryErrorCorrectSingleBit = 0x0C,\r
1462 MemoryErrorCorrected = 0x0D,\r
1463 MemoryErrorUnCorrectable = 0x0E\r
1464} MEMORY_ERROR_TYPE;\r
1465\r
1466///\r
af2dc6a7 1467/// 32-bit Memory Error Information - Error Granularity. \r
98cb9ae8 1468///\r
1469typedef enum { \r
1470 MemoryGranularityOther = 0x01,\r
1471 MemoryGranularityOtherUnknown = 0x02,\r
1472 MemoryGranularityDeviceLevel = 0x03,\r
1473 MemoryGranularityMemPartitionLevel = 0x04\r
1474} MEMORY_ERROR_GRANULARITY;\r
1475\r
1476///\r
af2dc6a7 1477/// 32-bit Memory Error Information - Error Operation. \r
98cb9ae8 1478///\r
1479typedef enum { \r
1480 MemoryErrorOperationOther = 0x01,\r
1481 MemoryErrorOperationUnknown = 0x02,\r
1482 MemoryErrorOperationRead = 0x03,\r
1483 MemoryErrorOperationWrite = 0x04,\r
1484 MemoryErrorOperationPartialWrite = 0x05\r
1485} MEMORY_ERROR_OPERATION;\r
1486\r
4135253b 1487///\r
af2dc6a7 1488/// 32-bit Memory Error Information (Type 18).\r
98cb9ae8 1489/// \r
1490/// This structure identifies the specifics of an error that might be detected \r
1491/// within a Physical Memory Array.\r
4135253b 1492///\r
61ce5861 1493typedef struct {\r
98cb9ae8 1494 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1495 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1496 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1497 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 1498 UINT32 VendorSyndrome;\r
1499 UINT32 MemoryArrayErrorAddress;\r
1500 UINT32 DeviceErrorAddress;\r
1501 UINT32 ErrorResolution;\r
61ce5861 1502} SMBIOS_TABLE_TYPE18;\r
1503\r
4135253b 1504///\r
af2dc6a7 1505/// Memory Array Mapped Address (Type 19).\r
4135253b 1506///\r
98cb9ae8 1507/// This structure provides the address mapping for a Physical Memory Array. \r
1508/// One structure is present for each contiguous address range described.\r
1509///\r
61ce5861 1510typedef struct {\r
1511 SMBIOS_STRUCTURE Hdr;\r
1512 UINT32 StartingAddress;\r
1513 UINT32 EndingAddress;\r
1514 UINT16 MemoryArrayHandle;\r
1515 UINT8 PartitionWidth;\r
1516} SMBIOS_TABLE_TYPE19;\r
1517\r
4135253b 1518///\r
af2dc6a7 1519/// Memory Device Mapped Address (Type 20).\r
4135253b 1520///\r
98cb9ae8 1521/// This structure maps memory address space usually to a device-level granularity. \r
1522/// One structure is present for each contiguous address range described. \r
1523///\r
61ce5861 1524typedef struct {\r
1525 SMBIOS_STRUCTURE Hdr;\r
1526 UINT32 StartingAddress;\r
1527 UINT32 EndingAddress;\r
1528 UINT16 MemoryDeviceHandle;\r
1529 UINT16 MemoryArrayMappedAddressHandle;\r
1530 UINT8 PartitionRowPosition;\r
1531 UINT8 InterleavePosition;\r
1532 UINT8 InterleavedDataDepth;\r
1533} SMBIOS_TABLE_TYPE20;\r
1534\r
98cb9ae8 1535///\r
1536/// Built-in Pointing Device - Type\r
1537///\r
1538typedef enum {\r
1539 PointingDeviceTypeOther = 0x01,\r
1540 PointingDeviceTypeUnknown = 0x02,\r
1541 PointingDeviceTypeMouse = 0x03,\r
1542 PointingDeviceTypeTrackBall = 0x04,\r
1543 PointingDeviceTypeTrackPoint = 0x05,\r
1544 PointingDeviceTypeGlidePoint = 0x06,\r
1545 PointingDeviceTouchPad = 0x07,\r
1546 PointingDeviceTouchScreen = 0x08,\r
1547 PointingDeviceOpticalSensor = 0x09\r
1548} BUILTIN_POINTING_DEVICE_TYPE;\r
1549\r
1550///\r
af2dc6a7 1551/// Built-in Pointing Device - Interface.\r
98cb9ae8 1552///\r
1553typedef enum {\r
1554 PointingDeviceInterfaceOther = 0x01,\r
1555 PointingDeviceInterfaceUnknown = 0x02,\r
1556 PointingDeviceInterfaceSerial = 0x03,\r
1557 PointingDeviceInterfacePs2 = 0x04,\r
1558 PointingDeviceInterfaceInfrared = 0x05,\r
1559 PointingDeviceInterfaceHpHil = 0x06,\r
1560 PointingDeviceInterfaceBusMouse = 0x07,\r
1561 PointingDeviceInterfaceADB = 0x08,\r
1562 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1563 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1564 PointingDeviceInterfaceUsb = 0xA2\r
1565} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1566\r
4135253b 1567///\r
af2dc6a7 1568/// Built-in Pointing Device (Type 21).\r
4135253b 1569///\r
98cb9ae8 1570/// This structure describes the attributes of the built-in pointing device for the \r
af2dc6a7 1571/// system. The presence of this structure does not imply that the built-in\r
98cb9ae8 1572/// pointing device is active for the system's use! \r
1573///\r
61ce5861 1574typedef struct {\r
98cb9ae8 1575 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1576 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
1577 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
98cb9ae8 1578 UINT8 NumberOfButtons;\r
61ce5861 1579} SMBIOS_TABLE_TYPE21;\r
1580\r
98cb9ae8 1581///\r
1582/// Portable Battery - Device Chemistry\r
1583///\r
1584typedef enum { \r
1585 PortableBatteryDeviceChemistryOther = 0x01,\r
1586 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1587 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1588 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1589 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1590 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1591 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1592 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1593} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1594\r
4135253b 1595///\r
af2dc6a7 1596/// Portable Battery (Type 22).\r
4135253b 1597///\r
98cb9ae8 1598/// This structure describes the attributes of the portable battery(s) for the system. \r
1599/// The structure contains the static attributes for the group. Each structure describes \r
1f9f8414 1600/// a single battery pack's attributes.\r
98cb9ae8 1601///\r
61ce5861 1602typedef struct {\r
98cb9ae8 1603 SMBIOS_STRUCTURE Hdr;\r
1604 SMBIOS_TABLE_STRING Location;\r
1605 SMBIOS_TABLE_STRING Manufacturer;\r
1606 SMBIOS_TABLE_STRING ManufactureDate;\r
1607 SMBIOS_TABLE_STRING SerialNumber;\r
1608 SMBIOS_TABLE_STRING DeviceName;\r
af2dc6a7 1609 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
98cb9ae8 1610 UINT16 DeviceCapacity;\r
1611 UINT16 DesignVoltage;\r
1612 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1613 UINT8 MaximumErrorInBatteryData;\r
1614 UINT16 SBDSSerialNumber;\r
1615 UINT16 SBDSManufactureDate;\r
1616 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1617 UINT8 DesignCapacityMultiplier;\r
1618 UINT32 OEMSpecific;\r
61ce5861 1619} SMBIOS_TABLE_TYPE22;\r
1620\r
4135253b 1621///\r
1622/// System Reset (Type 23)\r
1623///\r
98cb9ae8 1624/// This structure describes whether Automatic System Reset functions enabled (Status). \r
1625/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1626/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
1627/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
1628/// the system will re-boot according to the Boot Option at Limit. \r
1629///\r
61ce5861 1630typedef struct {\r
1631 SMBIOS_STRUCTURE Hdr;\r
1632 UINT8 Capabilities;\r
1633 UINT16 ResetCount;\r
1634 UINT16 ResetLimit;\r
1635 UINT16 TimerInterval;\r
1636 UINT16 Timeout;\r
1637} SMBIOS_TABLE_TYPE23;\r
1638\r
4135253b 1639///\r
af2dc6a7 1640/// Hardware Security (Type 24).\r
4135253b 1641///\r
98cb9ae8 1642/// This structure describes the system-wide hardware security settings. \r
1643///\r
61ce5861 1644typedef struct {\r
1645 SMBIOS_STRUCTURE Hdr;\r
1646 UINT8 HardwareSecuritySettings;\r
1647} SMBIOS_TABLE_TYPE24;\r
1648\r
4135253b 1649///\r
af2dc6a7 1650/// System Power Controls (Type 25).\r
4135253b 1651///\r
98cb9ae8 1652/// This structure describes the attributes for controlling the main power supply to the system. \r
1653/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
1654/// to determine the number of seconds until the next power-on of the system. The presence of \r
1655/// this structure implies that a timed power-on facility is available for the system. \r
1656///\r
61ce5861 1657typedef struct {\r
1658 SMBIOS_STRUCTURE Hdr;\r
1659 UINT8 NextScheduledPowerOnMonth;\r
1660 UINT8 NextScheduledPowerOnDayOfMonth;\r
1661 UINT8 NextScheduledPowerOnHour;\r
1662 UINT8 NextScheduledPowerOnMinute;\r
1663 UINT8 NextScheduledPowerOnSecond;\r
1664} SMBIOS_TABLE_TYPE25;\r
1665\r
98cb9ae8 1666///\r
af2dc6a7 1667/// Voltage Probe - Location and Status.\r
98cb9ae8 1668///\r
1669typedef struct {\r
1670 UINT8 VoltageProbeSite :5;\r
1671 UINT8 VoltageProbeStatus :3;\r
1672} MISC_VOLTAGE_PROBE_LOCATION;\r
1673\r
4135253b 1674///\r
1675/// Voltage Probe (Type 26)\r
1676///\r
98cb9ae8 1677/// This describes the attributes for a voltage probe in the system. \r
1678/// Each structure describes a single voltage probe.\r
1679///\r
61ce5861 1680typedef struct {\r
98cb9ae8 1681 SMBIOS_STRUCTURE Hdr;\r
1682 SMBIOS_TABLE_STRING Description;\r
1683 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1684 UINT16 MaximumValue;\r
1685 UINT16 MinimumValue;\r
1686 UINT16 Resolution;\r
1687 UINT16 Tolerance;\r
1688 UINT16 Accuracy;\r
1689 UINT32 OEMDefined;\r
1690 UINT16 NominalValue;\r
61ce5861 1691} SMBIOS_TABLE_TYPE26;\r
1692\r
98cb9ae8 1693///\r
af2dc6a7 1694/// Cooling Device - Device Type and Status.\r
98cb9ae8 1695///\r
1696typedef struct {\r
1697 UINT8 CoolingDevice :5;\r
1698 UINT8 CoolingDeviceStatus :3;\r
1699} MISC_COOLING_DEVICE_TYPE;\r
1700\r
4135253b 1701///\r
1702/// Cooling Device (Type 27)\r
1703///\r
98cb9ae8 1704/// This structure describes the attributes for a cooling device in the system. \r
1705/// Each structure describes a single cooling device. \r
1706/// \r
61ce5861 1707typedef struct {\r
98cb9ae8 1708 SMBIOS_STRUCTURE Hdr;\r
1709 UINT16 TemperatureProbeHandle;\r
1710 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
1711 UINT8 CoolingUnitGroup;\r
1712 UINT32 OEMDefined;\r
1713 UINT16 NominalSpeed;\r
61ce5861 1714} SMBIOS_TABLE_TYPE27;\r
1715\r
98cb9ae8 1716///\r
af2dc6a7 1717/// Temperature Probe - Location and Status.\r
98cb9ae8 1718///\r
1719typedef struct {\r
1720 UINT8 TemperatureProbeSite :5;\r
1721 UINT8 TemperatureProbeStatus :3;\r
1722} MISC_TEMPERATURE_PROBE_LOCATION;\r
1723\r
4135253b 1724///\r
af2dc6a7 1725/// Temperature Probe (Type 28).\r
4135253b 1726///\r
98cb9ae8 1727/// This structure describes the attributes for a temperature probe in the system. \r
1728/// Each structure describes a single temperature probe. \r
1729///\r
61ce5861 1730typedef struct {\r
98cb9ae8 1731 SMBIOS_STRUCTURE Hdr;\r
1732 SMBIOS_TABLE_STRING Description;\r
1733 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
1734 UINT16 MaximumValue;\r
1735 UINT16 MinimumValue;\r
1736 UINT16 Resolution;\r
1737 UINT16 Tolerance;\r
1738 UINT16 Accuracy;\r
1739 UINT32 OEMDefined;\r
1740 UINT16 NominalValue;\r
61ce5861 1741} SMBIOS_TABLE_TYPE28;\r
1742\r
98cb9ae8 1743///\r
af2dc6a7 1744/// Electrical Current Probe - Location and Status.\r
98cb9ae8 1745///\r
1746typedef struct {\r
1747 UINT8 ElectricalCurrentProbeSite :5;\r
1748 UINT8 ElectricalCurrentProbeStatus :3;\r
1749} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
1750\r
4135253b 1751///\r
af2dc6a7 1752/// Electrical Current Probe (Type 29).\r
4135253b 1753///\r
98cb9ae8 1754/// This structure describes the attributes for an electrical current probe in the system.\r
1755/// Each structure describes a single electrical current probe. \r
1756///\r
61ce5861 1757typedef struct {\r
98cb9ae8 1758 SMBIOS_STRUCTURE Hdr;\r
1759 SMBIOS_TABLE_STRING Description;\r
1760 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
1761 UINT16 MaximumValue;\r
1762 UINT16 MinimumValue;\r
1763 UINT16 Resolution;\r
1764 UINT16 Tolerance;\r
1765 UINT16 Accuracy;\r
1766 UINT32 OEMDefined;\r
1767 UINT16 NominalValue;\r
61ce5861 1768} SMBIOS_TABLE_TYPE29;\r
1769\r
4135253b 1770///\r
af2dc6a7 1771/// Out-of-Band Remote Access (Type 30).\r
4135253b 1772///\r
98cb9ae8 1773/// This structure describes the attributes and policy settings of a hardware facility \r
1774/// that may be used to gain remote access to a hardware system when the operating system \r
1775/// is not available due to power-down status, hardware failures, or boot failures. \r
1776///\r
61ce5861 1777typedef struct {\r
1778 SMBIOS_STRUCTURE Hdr;\r
1779 SMBIOS_TABLE_STRING ManufacturerName;\r
1780 UINT8 Connections;\r
1781} SMBIOS_TABLE_TYPE30;\r
1782\r
4135253b 1783///\r
af2dc6a7 1784/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
4135253b 1785///\r
98cb9ae8 1786/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
1787/// \r
61ce5861 1788typedef struct {\r
1789 SMBIOS_STRUCTURE Hdr;\r
1790 UINT8 Checksum;\r
1791 UINT8 Reserved1;\r
1792 UINT16 Reserved2;\r
1793 UINT32 BisEntry16;\r
1794 UINT32 BisEntry32;\r
1795 UINT64 Reserved3;\r
1796 UINT32 Reserved4;\r
1797} SMBIOS_TABLE_TYPE31;\r
1798\r
98cb9ae8 1799///\r
af2dc6a7 1800/// System Boot Information - System Boot Status.\r
98cb9ae8 1801///\r
1802typedef enum {\r
1803 BootInformationStatusNoError = 0x00,\r
1804 BootInformationStatusNoBootableMedia = 0x01,\r
1805 BootInformationStatusNormalOSFailedLoading = 0x02,\r
1806 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
1807 BootInformationStatusOSDetectedFailure = 0x04,\r
1808 BootInformationStatusUserRequestedBoot = 0x05,\r
1809 BootInformationStatusSystemSecurityViolation = 0x06,\r
1810 BootInformationStatusPreviousRequestedImage = 0x07,\r
1811 BootInformationStatusWatchdogTimerExpired = 0x08,\r
1812 BootInformationStatusStartReserved = 0x09,\r
1813 BootInformationStatusStartOemSpecific = 0x80,\r
1814 BootInformationStatusStartProductSpecific = 0xC0\r
1815} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
1816\r
4135253b 1817///\r
af2dc6a7 1818/// System Boot Information (Type 32).\r
4135253b 1819///\r
98cb9ae8 1820/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
1821/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
1822/// application via this structure. When used in the PXE environment, for example, \r
1823/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
1f9f8414 1824/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
98cb9ae8 1825/// could choose to automatically download a hardware-diagnostic image to a client whose \r
1826/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
1827///\r
61ce5861 1828typedef struct {\r
98cb9ae8 1829 SMBIOS_STRUCTURE Hdr;\r
1830 UINT8 Reserved[6];\r
af2dc6a7 1831 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
61ce5861 1832} SMBIOS_TABLE_TYPE32;\r
1833\r
4135253b 1834///\r
af2dc6a7 1835/// 64-bit Memory Error Information (Type 33).\r
4135253b 1836///\r
98cb9ae8 1837/// This structure describes an error within a Physical Memory Array, \r
1838/// when the error address is above 4G (0xFFFFFFFF).\r
1839/// \r
61ce5861 1840typedef struct {\r
98cb9ae8 1841 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1842 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1843 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1844 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
98cb9ae8 1845 UINT32 VendorSyndrome;\r
1846 UINT64 MemoryArrayErrorAddress;\r
1847 UINT64 DeviceErrorAddress;\r
1848 UINT32 ErrorResolution;\r
61ce5861 1849} SMBIOS_TABLE_TYPE33;\r
1850\r
98cb9ae8 1851///\r
af2dc6a7 1852/// Management Device - Type. \r
98cb9ae8 1853///\r
1854typedef enum {\r
1855 ManagementDeviceTypeOther = 0x01,\r
1856 ManagementDeviceTypeUnknown = 0x02,\r
1857 ManagementDeviceTypeLm75 = 0x03,\r
1858 ManagementDeviceTypeLm78 = 0x04,\r
1859 ManagementDeviceTypeLm79 = 0x05,\r
1860 ManagementDeviceTypeLm80 = 0x06,\r
1861 ManagementDeviceTypeLm81 = 0x07,\r
1862 ManagementDeviceTypeAdm9240 = 0x08,\r
1863 ManagementDeviceTypeDs1780 = 0x09,\r
1864 ManagementDeviceTypeMaxim1617 = 0x0A,\r
1865 ManagementDeviceTypeGl518Sm = 0x0B,\r
1866 ManagementDeviceTypeW83781D = 0x0C,\r
1867 ManagementDeviceTypeHt82H791 = 0x0D\r
1868} MISC_MANAGEMENT_DEVICE_TYPE;\r
1869\r
1870///\r
af2dc6a7 1871/// Management Device - Address Type. \r
98cb9ae8 1872///\r
1873typedef enum {\r
1874 ManagementDeviceAddressTypeOther = 0x01,\r
1875 ManagementDeviceAddressTypeUnknown = 0x02,\r
1876 ManagementDeviceAddressTypeIOPort = 0x03,\r
1877 ManagementDeviceAddressTypeMemory = 0x04,\r
1878 ManagementDeviceAddressTypeSmbus = 0x05\r
1879} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
1880\r
4135253b 1881///\r
af2dc6a7 1882/// Management Device (Type 34).\r
4135253b 1883///\r
98cb9ae8 1884/// The information in this structure defines the attributes of a Management Device. \r
1885/// A Management Device might control one or more fans or voltage, current, or temperature\r
1886/// probes as defined by one or more Management Device Component structures.\r
1887///\r
61ce5861 1888typedef struct {\r
98cb9ae8 1889 SMBIOS_STRUCTURE Hdr;\r
1890 SMBIOS_TABLE_STRING Description;\r
af2dc6a7 1891 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
98cb9ae8 1892 UINT32 Address;\r
af2dc6a7 1893 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
61ce5861 1894} SMBIOS_TABLE_TYPE34;\r
1895\r
4135253b 1896///\r
1897/// Management Device Component (Type 35)\r
1898///\r
98cb9ae8 1899/// This structure associates a cooling device or environmental probe with structures \r
1900/// that define the controlling hardware device and (optionally) the component's thresholds. \r
1901///\r
61ce5861 1902typedef struct {\r
1903 SMBIOS_STRUCTURE Hdr;\r
1904 SMBIOS_TABLE_STRING Description;\r
1905 UINT16 ManagementDeviceHandle;\r
1906 UINT16 ComponentHandle;\r
1907 UINT16 ThresholdHandle;\r
1908} SMBIOS_TABLE_TYPE35;\r
1909\r
4135253b 1910///\r
af2dc6a7 1911/// Management Device Threshold Data (Type 36).\r
4135253b 1912///\r
98cb9ae8 1913/// The information in this structure defines threshold information for \r
1914/// a component (probe or cooling-unit) contained within a Management Device. \r
1915///\r
61ce5861 1916typedef struct {\r
1917 SMBIOS_STRUCTURE Hdr;\r
1918 UINT16 LowerThresholdNonCritical;\r
1919 UINT16 UpperThresholdNonCritical;\r
1920 UINT16 LowerThresholdCritical;\r
1921 UINT16 UpperThresholdCritical;\r
1922 UINT16 LowerThresholdNonRecoverable;\r
1923 UINT16 UpperThresholdNonRecoverable;\r
1924} SMBIOS_TABLE_TYPE36;\r
1925\r
bf7ea009 1926///\r
af2dc6a7 1927/// Memory Channel Entry.\r
bf7ea009 1928///\r
61ce5861 1929typedef struct {\r
1930 UINT8 DeviceLoad;\r
1931 UINT16 DeviceHandle;\r
1932} MEMORY_DEVICE;\r
1933\r
98cb9ae8 1934///\r
af2dc6a7 1935/// Memory Channel - Channel Type.\r
98cb9ae8 1936///\r
1937typedef enum {\r
1938 MemoryChannelTypeOther = 0x01,\r
1939 MemoryChannelTypeUnknown = 0x02,\r
1940 MemoryChannelTypeRambus = 0x03,\r
1941 MemoryChannelTypeSyncLink = 0x04\r
1942} MEMORY_CHANNEL_TYPE;\r
1943\r
4135253b 1944///\r
1945/// Memory Channel (Type 37)\r
1946///\r
98cb9ae8 1947/// The information in this structure provides the correlation between a Memory Channel\r
af2dc6a7 1948/// and its associated Memory Devices. Each device presents one or more loads to the channel. \r
1949/// The sum of all device loads cannot exceed the channel's defined maximum.\r
98cb9ae8 1950///\r
61ce5861 1951typedef struct {\r
1952 SMBIOS_STRUCTURE Hdr;\r
1953 UINT8 ChannelType;\r
1954 UINT8 MaximumChannelLoad;\r
1955 UINT8 MemoryDeviceCount;\r
1956 MEMORY_DEVICE MemoryDevice[1];\r
1957} SMBIOS_TABLE_TYPE37;\r
1958\r
98cb9ae8 1959///\r
1960/// IPMI Device Information - BMC Interface Type\r
1961///\r
1962typedef enum {\r
1963 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
af2dc6a7 1964 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
1965 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
1966 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
98cb9ae8 1967 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
1968} BMC_INTERFACE_TYPE;\r
1969\r
4135253b 1970///\r
af2dc6a7 1971/// IPMI Device Information (Type 38).\r
4135253b 1972///\r
98cb9ae8 1973/// The information in this structure defines the attributes of an \r
1974/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
1975/// \r
61ce5861 1976typedef struct {\r
1977 SMBIOS_STRUCTURE Hdr;\r
af2dc6a7 1978 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
61ce5861 1979 UINT8 IPMISpecificationRevision;\r
1980 UINT8 I2CSlaveAddress;\r
1981 UINT8 NVStorageDeviceAddress;\r
1982 UINT64 BaseAddress;\r
1983 UINT8 BaseAddressModifier_InterruptInfo;\r
1984 UINT8 InterruptNumber;\r
1985} SMBIOS_TABLE_TYPE38;\r
1986\r
98cb9ae8 1987///\r
af2dc6a7 1988/// System Power Supply - Power Supply Characteristics.\r
98cb9ae8 1989///\r
1990typedef struct {\r
1991 UINT16 PowerSupplyHotReplaceable:1;\r
1992 UINT16 PowerSupplyPresent :1;\r
1993 UINT16 PowerSupplyUnplugged :1;\r
1994 UINT16 InputVoltageRangeSwitch :4;\r
1995 UINT16 PowerSupplyStatus :3;\r
1996 UINT16 PowerSupplyType :4;\r
1997 UINT16 Reserved :2;\r
1998} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
1999\r
4135253b 2000///\r
af2dc6a7 2001/// System Power Supply (Type 39).\r
4135253b 2002///\r
98cb9ae8 2003/// This structure identifies attributes of a system power supply. One instance\r
2004/// of this record is present for each possible power supply in a system. \r
2005///\r
61ce5861 2006typedef struct {\r
98cb9ae8 2007 SMBIOS_STRUCTURE Hdr;\r
2008 UINT8 PowerUnitGroup;\r
2009 SMBIOS_TABLE_STRING Location;\r
2010 SMBIOS_TABLE_STRING DeviceName;\r
2011 SMBIOS_TABLE_STRING Manufacturer;\r
2012 SMBIOS_TABLE_STRING SerialNumber;\r
2013 SMBIOS_TABLE_STRING AssetTagNumber;\r
2014 SMBIOS_TABLE_STRING ModelPartNumber;\r
2015 SMBIOS_TABLE_STRING RevisionLevel;\r
2016 UINT16 MaxPowerCapacity;\r
2017 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2018 UINT16 InputVoltageProbeHandle;\r
2019 UINT16 CoolingDeviceHandle;\r
2020 UINT16 InputCurrentProbeHandle;\r
61ce5861 2021} SMBIOS_TABLE_TYPE39;\r
2022\r
bf7ea009 2023///\r
af2dc6a7 2024/// Additional Information Entry Format. \r
bf7ea009 2025///\r
61ce5861 2026typedef struct { \r
2027 UINT8 EntryLength; \r
2028 UINT16 ReferencedHandle;\r
2029 UINT8 ReferencedOffset;\r
2030 SMBIOS_TABLE_STRING EntryString;\r
2031 UINT8 Value[1];\r
2032}ADDITIONAL_INFORMATION_ENTRY;\r
2033\r
4135253b 2034///\r
af2dc6a7 2035/// Additional Information (Type 40).\r
4135253b 2036///\r
98cb9ae8 2037/// This structure is intended to provide additional information for handling unspecified \r
2038/// enumerated values and interim field updates in another structure. \r
2039///\r
61ce5861 2040typedef struct {\r
2041 SMBIOS_STRUCTURE Hdr;\r
2042 UINT8 NumberOfAdditionalInformationEntries;\r
2043 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
2044} SMBIOS_TABLE_TYPE40;\r
2045\r
98cb9ae8 2046///\r
af2dc6a7 2047/// Onboard Devices Extended Information - Onboard Device Types.\r
98cb9ae8 2048///\r
2049typedef enum{\r
2050 OnBoardDeviceExtendedTypeOther = 0x01,\r
2051 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2052 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2053 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2054 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2055 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2056 OnBoardDeviceExtendedTypeSound = 0x07,\r
2057 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2058 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2059 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2060} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2061\r
4135253b 2062///\r
af2dc6a7 2063/// Onboard Devices Extended Information (Type 41).\r
4135253b 2064///\r
98cb9ae8 2065/// The information in this structure defines the attributes of devices that \r
2066/// are onboard (soldered onto) a system element, usually the baseboard. \r
2067/// In general, an entry in this table implies that the BIOS has some level of \r
2068/// control over the enabling of the associated device for use by the system. \r
2069///\r
61ce5861 2070typedef struct {\r
98cb9ae8 2071 SMBIOS_STRUCTURE Hdr;\r
2072 SMBIOS_TABLE_STRING ReferenceDesignation;\r
af2dc6a7 2073 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
98cb9ae8 2074 UINT8 DeviceTypeInstance;\r
2075 UINT16 SegmentGroupNum;\r
2076 UINT8 BusNum;\r
2077 UINT8 DevFuncNum; \r
61ce5861 2078} SMBIOS_TABLE_TYPE41;\r
2079\r
4135253b 2080///\r
2081/// Inactive (Type 126)\r
2082///\r
61ce5861 2083typedef struct {\r
2084 SMBIOS_STRUCTURE Hdr;\r
2085} SMBIOS_TABLE_TYPE126;\r
2086\r
4135253b 2087///\r
2088/// End-of-Table (Type 127)\r
2089///\r
61ce5861 2090typedef struct {\r
2091 SMBIOS_STRUCTURE Hdr;\r
2092} SMBIOS_TABLE_TYPE127;\r
2093\r
4135253b 2094///\r
af2dc6a7 2095/// Union of all the possible SMBIOS record types.\r
4135253b 2096///\r
61ce5861 2097typedef union {\r
2098 SMBIOS_STRUCTURE *Hdr;\r
2099 SMBIOS_TABLE_TYPE0 *Type0;\r
2100 SMBIOS_TABLE_TYPE1 *Type1;\r
2101 SMBIOS_TABLE_TYPE2 *Type2;\r
2102 SMBIOS_TABLE_TYPE3 *Type3;\r
2103 SMBIOS_TABLE_TYPE4 *Type4;\r
2104 SMBIOS_TABLE_TYPE5 *Type5;\r
2105 SMBIOS_TABLE_TYPE6 *Type6;\r
2106 SMBIOS_TABLE_TYPE7 *Type7;\r
2107 SMBIOS_TABLE_TYPE8 *Type8;\r
2108 SMBIOS_TABLE_TYPE9 *Type9;\r
2109 SMBIOS_TABLE_TYPE10 *Type10;\r
2110 SMBIOS_TABLE_TYPE11 *Type11;\r
2111 SMBIOS_TABLE_TYPE12 *Type12;\r
2112 SMBIOS_TABLE_TYPE13 *Type13;\r
2113 SMBIOS_TABLE_TYPE14 *Type14;\r
2114 SMBIOS_TABLE_TYPE15 *Type15;\r
2115 SMBIOS_TABLE_TYPE16 *Type16;\r
2116 SMBIOS_TABLE_TYPE17 *Type17;\r
2117 SMBIOS_TABLE_TYPE18 *Type18;\r
2118 SMBIOS_TABLE_TYPE19 *Type19;\r
2119 SMBIOS_TABLE_TYPE20 *Type20;\r
2120 SMBIOS_TABLE_TYPE21 *Type21;\r
2121 SMBIOS_TABLE_TYPE22 *Type22;\r
2122 SMBIOS_TABLE_TYPE23 *Type23;\r
2123 SMBIOS_TABLE_TYPE24 *Type24;\r
2124 SMBIOS_TABLE_TYPE25 *Type25;\r
2125 SMBIOS_TABLE_TYPE26 *Type26;\r
2126 SMBIOS_TABLE_TYPE27 *Type27;\r
2127 SMBIOS_TABLE_TYPE28 *Type28;\r
2128 SMBIOS_TABLE_TYPE29 *Type29;\r
2129 SMBIOS_TABLE_TYPE30 *Type30;\r
2130 SMBIOS_TABLE_TYPE31 *Type31;\r
2131 SMBIOS_TABLE_TYPE32 *Type32;\r
2132 SMBIOS_TABLE_TYPE33 *Type33;\r
2133 SMBIOS_TABLE_TYPE34 *Type34;\r
2134 SMBIOS_TABLE_TYPE35 *Type35;\r
2135 SMBIOS_TABLE_TYPE36 *Type36;\r
2136 SMBIOS_TABLE_TYPE37 *Type37;\r
2137 SMBIOS_TABLE_TYPE38 *Type38;\r
2138 SMBIOS_TABLE_TYPE39 *Type39;\r
2139 SMBIOS_TABLE_TYPE40 *Type40;\r
2140 SMBIOS_TABLE_TYPE41 *Type41;\r
2141 SMBIOS_TABLE_TYPE126 *Type126;\r
2142 SMBIOS_TABLE_TYPE127 *Type127;\r
2143 UINT8 *Raw;\r
2144} SMBIOS_STRUCTURE_POINTER;\r
2145\r
766f4bc1 2146#pragma pack()\r
2147\r
a7ed1e2e 2148#endif\r
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