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Add EFI_DELIVERY_MODE to SalApi.h
[mirror_edk2.git] / MdePkg / Include / Ipf / SalApi.h
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878ddf1f 1/** @file\r
2 Main SAL API's defined in SAL 3.0 specification. \r
3\r
4 Copyright (c) 2006, Intel Corporation \r
5 All rights reserved. This program and the accompanying materials \r
6 are licensed and made available under the terms and conditions of the BSD License \r
7 which accompanies this distribution. The full text of the license may be found at \r
8 http://opensource.org/licenses/bsd-license.php \r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
12\r
13 Module Name: SalApi.h\r
14\r
15**/\r
16\r
17#ifndef __SAL_API_H__\r
18#define __SAL_API_H__\r
19\r
20typedef UINTN EFI_SAL_STATUS;\r
21\r
22//\r
23// EFI_SAL_STATUS defines\r
24//\r
25#define EFI_SAL_SUCCESS ((EFI_SAL_STATUS) 0)\r
26#define EFI_SAL_MORE_RECORDS ((EFI_SAL_STATUS) 3)\r
27#define EFI_SAL_NOT_IMPLEMENTED ((EFI_SAL_STATUS) - 1)\r
28#define EFI_SAL_INVALID_ARGUMENT ((EFI_SAL_STATUS) - 2)\r
29#define EFI_SAL_ERROR ((EFI_SAL_STATUS) - 3)\r
30#define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)\r
31#define EFI_SAL_NO_INFORMATION ((EFI_SAL_STATUS) - 5)\r
32#define EFI_SAL_NOT_ENOUGH_SCRATCH ((EFI_SAL_STATUS) - 9)\r
33\r
7ac2bbc1 34//\r
35// Delivery Mode of IPF CPU.\r
36//\r
37typedef enum {\r
38 EFI_DELIVERY_MODE_INT,\r
39 EFI_DELIVERY_MODE_MPreserved1,\r
40 EFI_DELIVERY_MODE_PMI,\r
41 EFI_DELIVERY_MODE_MPreserved2,\r
42 EFI_DELIVERY_MODE_NMI,\r
43 EFI_DELIVERY_MODE_INIT,\r
44 EFI_DELIVERY_MODE_MPreserved3,\r
45 EFI_DELIVERY_MODE_ExtINT\r
46} EFI_DELIVERY_MODE;\r
47\r
878ddf1f 48//\r
49// Return values from SAL\r
50//\r
51typedef struct {\r
52 EFI_SAL_STATUS Status; // register r8\r
53 UINTN r9;\r
54 UINTN r10;\r
55 UINTN r11;\r
56} SAL_RETURN_REGS;\r
57\r
58typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)\r
59 (\r
60 IN UINT64 FunctionId,\r
61 IN UINT64 Arg2,\r
62 IN UINT64 Arg3,\r
63 IN UINT64 Arg4,\r
64 IN UINT64 Arg5,\r
65 IN UINT64 Arg6,\r
66 IN UINT64 Arg7,\r
67 IN UINT64 Arg8\r
68 );\r
69\r
70//\r
71// SAL Procedure FunctionId definition\r
72//\r
73#define EFI_SAL_SET_VECTORS 0x01000000\r
74#define EFI_SAL_GET_STATE_INFO 0x01000001\r
75#define EFI_SAL_GET_STATE_INFO_SIZE 0x01000002\r
76#define EFI_SAL_CLEAR_STATE_INFO 0x01000003\r
77#define EFI_SAL_MC_RENDEZ 0x01000004\r
78#define EFI_SAL_MC_SET_PARAMS 0x01000005\r
79#define EFI_SAL_REGISTER_PHYSICAL_ADDR 0x01000006\r
80#define EFI_SAL_CACHE_FLUSH 0x01000008\r
81#define EFI_SAL_CACHE_INIT 0x01000009\r
82#define EFI_SAL_PCI_CONFIG_READ 0x01000010\r
83#define EFI_SAL_PCI_CONFIG_WRITE 0x01000011\r
84#define EFI_SAL_FREQ_BASE 0x01000012\r
85#define EFI_SAL_UPDATE_PAL 0x01000020\r
86\r
87#define EFI_SAL_FUNCTION_ID_MASK 0x0000ffff\r
88#define EFI_SAL_MAX_SAL_FUNCTION_ID 0x00000021\r
89\r
90//\r
91// SAL Procedure parameter definitions\r
92// Not much point in using typedefs or enums because all params\r
93// are UINT64 and the entry point is common\r
94//\r
95// EFI_SAL_SET_VECTORS\r
96//\r
97#define EFI_SAL_SET_MCA_VECTOR 0x0\r
98#define EFI_SAL_SET_INIT_VECTOR 0x1\r
99#define EFI_SAL_SET_BOOT_RENDEZ_VECTOR 0x2\r
100\r
101typedef struct {\r
102 UINT64 Length : 32;\r
103 UINT64 ChecksumValid : 1;\r
104 UINT64 Reserved1 : 7;\r
105 UINT64 ByteChecksum : 8;\r
106 UINT64 Reserved2 : 16;\r
107} SAL_SET_VECTORS_CS_N;\r
108\r
109//\r
110// EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,\r
111// EFI_SAL_CLEAR_STATE_INFO\r
112//\r
113#define EFI_SAL_MCA_STATE_INFO 0x0\r
114#define EFI_SAL_INIT_STATE_INFO 0x1\r
115#define EFI_SAL_CMC_STATE_INFO 0x2\r
116#define EFI_SAL_CP_STATE_INFO 0x3\r
117\r
118//\r
119// EFI_SAL_MC_SET_PARAMS\r
120//\r
121#define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1\r
122#define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2\r
123#define EFI_SAL_MC_SET_CPE_PARAM 0x3\r
124\r
125#define EFI_SAL_MC_SET_INTR_PARAM 0x1\r
126#define EFI_SAL_MC_SET_MEM_PARAM 0x2\r
127\r
128//\r
129// EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR\r
130//\r
131#define EFI_SAL_REGISTER_PAL_ADDR 0x0\r
132\r
133//\r
134// EFI_SAL_CACHE_FLUSH\r
135//\r
136#define EFI_SAL_FLUSH_I_CACHE 0x01\r
137#define EFI_SAL_FLUSH_D_CACHE 0x02\r
138#define EFI_SAL_FLUSH_BOTH_CACHE 0x03\r
139#define EFI_SAL_FLUSH_MAKE_COHERENT 0x04\r
140\r
141//\r
142// EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE\r
143//\r
144#define EFI_SAL_PCI_CONFIG_ONE_BYTE 0x1\r
145#define EFI_SAL_PCI_CONFIG_TWO_BYTES 0x2\r
146#define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4\r
147\r
148typedef struct {\r
149 UINT64 Register : 8;\r
150 UINT64 Function : 3;\r
151 UINT64 Device : 5;\r
152 UINT64 Bus : 8;\r
153 UINT64 Segment : 8;\r
154 UINT64 Reserved : 32;\r
155} SAL_PCI_ADDRESS;\r
156\r
157//\r
158// EFI_SAL_FREQ_BASE\r
159//\r
160#define EFI_SAL_CPU_INPUT_FREQ_BASE 0x0\r
161#define EFI_SAL_PLATFORM_IT_FREQ_BASE 0x1\r
162#define EFI_SAL_PLATFORM_RTC_FREQ_BASE 0x2\r
163\r
164//\r
165// EFI_SAL_UPDATE_PAL\r
166//\r
167#define EFI_SAL_UPDATE_BAD_PAL_VERSION ((UINT64) -1)\r
168#define EFI_SAL_UPDATE_PAL_AUTH_FAIL ((UINT64) -2)\r
169#define EFI_SAL_UPDATE_PAL_BAD_TYPE ((UINT64) -3)\r
170#define EFI_SAL_UPDATE_PAL_READONLY ((UINT64) -4)\r
171#define EFI_SAL_UPDATE_PAL_WRITE_FAIL ((UINT64) -10)\r
172#define EFI_SAL_UPDATE_PAL_ERASE_FAIL ((UINT64) -11)\r
173#define EFI_SAL_UPDATE_PAL_READ_FAIL ((UINT64) -12)\r
174#define EFI_SAL_UPDATE_PAL_CANT_FIT ((UINT64) -13)\r
175\r
176typedef struct {\r
177 UINT32 Size;\r
178 UINT32 MmddyyyyDate;\r
179 UINT16 Version;\r
180 UINT8 Type;\r
181 UINT8 Reserved[5];\r
182 UINT64 FwVendorId;\r
183} SAL_UPDATE_PAL_DATA_BLOCK;\r
184\r
185typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {\r
186 struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;\r
187 struct SAL_UPDATE_PAL_DATA_BLOCK *DataBlock;\r
188 UINT8 StoreChecksum;\r
189 UINT8 Reserved[15];\r
190} SAL_UPDATE_PAL_INFO_BLOCK;\r
191\r
192//\r
193// SAL System Table Definitions\r
194//\r
195#pragma pack(1)\r
196typedef struct {\r
197 UINT32 Signature;\r
198 UINT32 Length;\r
199 UINT16 SalRevision;\r
200 UINT16 EntryCount;\r
201 UINT8 CheckSum;\r
202 UINT8 Reserved[7];\r
203 UINT16 SalAVersion;\r
204 UINT16 SalBVersion;\r
205 UINT8 OemId[32];\r
206 UINT8 ProductId[32];\r
207 UINT8 Reserved2[8];\r
208} SAL_SYSTEM_TABLE_HEADER;\r
209#pragma pack()\r
210\r
211#define EFI_SAL_ST_HEADER_SIGNATURE "SST_"\r
212#define EFI_SAL_REVISION 0x0300\r
213//\r
214// SAL System Types\r
215//\r
216#define EFI_SAL_ST_ENTRY_POINT 0\r
217#define EFI_SAL_ST_MEMORY_DESCRIPTOR 1\r
218#define EFI_SAL_ST_PLATFORM_FEATURES 2\r
219#define EFI_SAL_ST_TR_USAGE 3\r
220#define EFI_SAL_ST_PTC 4\r
221#define EFI_SAL_ST_AP_WAKEUP 5\r
222\r
223#pragma pack(1)\r
224typedef struct {\r
225 UINT8 Type; // Type == 0\r
226 UINT8 Reserved[7];\r
227 UINT64 PalProcEntry;\r
228 UINT64 SalProcEntry;\r
229 UINT64 SalGlobalDataPointer;\r
230 UINT64 Reserved2[2];\r
231} SAL_ST_ENTRY_POINT_DESCRIPTOR;\r
232\r
233//\r
234// Not needed for Itanium-based OS boot\r
235//\r
236typedef struct {\r
237 UINT8 Type; // Type == 1\r
238 UINT8 NeedVirtualRegistration;\r
239 UINT8 MemoryAttributes;\r
240 UINT8 PageAccessRights;\r
241 UINT8 SupportedAttributes;\r
242 UINT8 Reserved;\r
243 UINT8 MemoryType;\r
244 UINT8 MemoryUsage;\r
245 UINT64 PhysicalMemoryAddress;\r
246 UINT32 Length;\r
247 UINT32 Reserved1;\r
248 UINT64 OemReserved;\r
249} SAL_ST_MEMORY_DESCRIPTOR_ENTRY;\r
250\r
251#pragma pack()\r
252//\r
253// Memory Attributes\r
254//\r
255#define SAL_MDT_ATTRIB_WB 0x00\r
256//\r
257// #define SAL_MDT_ATTRIB_UC 0x02\r
258//\r
259#define SAL_MDT_ATTRIB_UC 0x04\r
260#define SAL_MDT_ATTRIB_UCE 0x05\r
261#define SAL_MDT_ATTRIB_WC 0x06\r
262\r
263//\r
264// Supported memory Attributes\r
265//\r
266#define SAL_MDT_SUPPORT_WB 0x1\r
267#define SAL_MDT_SUPPORT_UC 0x2\r
268#define SAL_MDT_SUPPORT_UCE 0x4\r
269#define SAL_MDT_SUPPORT_WC 0x8\r
270\r
271//\r
272// Virtual address registration\r
273//\r
274#define SAL_MDT_NO_VA 0x00\r
275#define SAL_MDT_NEED_VA 0x01\r
276//\r
277// MemoryType info\r
278//\r
279#define SAL_REGULAR_MEMORY 0x0000\r
280#define SAL_MMIO_MAPPING 0x0001\r
281#define SAL_SAPIC_IPI_BLOCK 0x0002\r
282#define SAL_IO_PORT_MAPPING 0x0003\r
283#define SAL_FIRMWARE_MEMORY 0x0004\r
284#define SAL_BLACK_HOLE 0x000A\r
285//\r
286// Memory Usage info\r
287//\r
288#define SAL_MDT_USAGE_UNSPECIFIED 0x00\r
289#define SAL_PAL_CODE 0x01\r
290#define SAL_BOOTSERVICE_CODE 0x02\r
291#define SAL_BOOTSERVICE_DATA 0x03\r
292#define SAL_RUNTIMESERVICE_CODE 0x04\r
293#define SAL_RUNTIMESERVICE_DATA 0x05\r
294#define SAL_IA32_OPTIONROM 0x06\r
295#define SAL_IA32_SYSTEMROM 0x07\r
296#define SAL_PMI_CODE 0x0a\r
297#define SAL_PMI_DATA 0x0b\r
298\r
299#pragma pack(1)\r
300typedef struct {\r
301 UINT8 Type; // Type == 2\r
302 UINT8 PlatformFeatures;\r
303 UINT8 Reserved[14];\r
304} SAL_ST_PLATFORM_FEATURES;\r
305#pragma pack()\r
306\r
307#define SAL_PLAT_FEAT_BUS_LOCK 0x01\r
308#define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02\r
309#define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04\r
310\r
311#pragma pack(1)\r
312typedef struct {\r
313 UINT8 Type; // Type == 3\r
314 UINT8 TRType;\r
315 UINT8 TRNumber;\r
316 UINT8 Reserved[5];\r
317 UINT64 VirtualAddress;\r
318 UINT64 EncodedPageSize;\r
319 UINT64 Reserved1;\r
320} SAL_ST_TR_DECRIPTOR;\r
321#pragma pack()\r
322\r
323#define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00\r
324#define EFI_SAL_ST_TR_USAGE_DATA 01\r
325\r
326#pragma pack(1)\r
327typedef struct {\r
328 UINT64 NumberOfProcessors;\r
329 UINT64 LocalIDRegister;\r
330} SAL_COHERENCE_DOMAIN_INFO;\r
331#pragma pack()\r
332\r
333#pragma pack(1)\r
334typedef struct {\r
335 UINT8 Type; // Type == 4\r
336 UINT8 Reserved[3];\r
337 UINT32 NumberOfDomains;\r
338 SAL_COHERENCE_DOMAIN_INFO *DomainInformation;\r
339} SAL_ST_CACHE_COHERENCE_DECRIPTOR;\r
340#pragma pack()\r
341\r
342#pragma pack(1)\r
343typedef struct {\r
344 UINT8 Type; // Type == 5\r
345 UINT8 WakeUpType;\r
346 UINT8 Reserved[6];\r
347 UINT64 ExternalInterruptVector;\r
348} SAL_ST_AP_WAKEUP_DECRIPTOR;\r
349#pragma pack()\r
350//\r
351// FIT Entry\r
352//\r
353#define EFI_SAL_FIT_ENTRY_PTR (0x100000000 - 32) // 4GB - 24\r
354#define EFI_SAL_FIT_PALA_ENTRY (0x100000000 - 48) // 4GB - 32\r
355#define EFI_SAL_FIT_PALB_TYPE 01\r
356\r
357typedef struct {\r
358 UINT64 Address;\r
359 UINT8 Size[3];\r
360 UINT8 Reserved;\r
361 UINT16 Revision;\r
362 UINT8 Type : 7;\r
363 UINT8 CheckSumValid : 1;\r
364 UINT8 CheckSum;\r
365} EFI_SAL_FIT_ENTRY;\r
366\r
367//\r
368// SAL Common Record Header\r
369//\r
370typedef struct {\r
371 UINT16 Length;\r
372 UINT8 Data[1024];\r
373} SAL_OEM_DATA;\r
374\r
375typedef struct {\r
376 UINT8 Seconds;\r
377 UINT8 Minutes;\r
378 UINT8 Hours;\r
379 UINT8 Reserved;\r
380 UINT8 Day;\r
381 UINT8 Month;\r
382 UINT8 Year;\r
383 UINT8 Century;\r
384} SAL_TIME_STAMP;\r
385\r
386typedef struct {\r
387 UINT64 RecordId;\r
388 UINT16 Revision;\r
389 UINT8 ErrorSeverity;\r
390 UINT8 ValidationBits;\r
391 UINT32 RecordLength;\r
392 SAL_TIME_STAMP TimeStamp;\r
393 UINT8 OemPlatformId[16];\r
394} SAL_RECORD_HEADER;\r
395\r
396typedef struct {\r
397 EFI_GUID Guid;\r
398 UINT16 Revision;\r
399 UINT8 ErrorRecoveryInfo;\r
400 UINT8 Reserved;\r
401 UINT32 SectionLength;\r
402} SAL_SEC_HEADER;\r
403\r
404//\r
405// SAL Processor Record\r
406//\r
407#define SAL_PROCESSOR_ERROR_RECORD_INFO \\r
408 { \\r
409 0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
410 }\r
411\r
412#define CHECK_INFO_VALID_BIT_MASK 0x1\r
413#define REQUESTOR_ID_VALID_BIT_MASK 0x2\r
414#define RESPONDER_ID_VALID_BIT_MASK 0x4\r
415#define TARGER_ID_VALID_BIT_MASK 0x8\r
416#define PRECISE_IP_VALID_BIT_MASK 0x10\r
417\r
418typedef struct {\r
419 UINT64 InfoValid : 1;\r
420 UINT64 ReqValid : 1;\r
421 UINT64 RespValid : 1;\r
422 UINT64 TargetValid : 1;\r
423 UINT64 IpValid : 1;\r
424 UINT64 Reserved : 59;\r
425 UINT64 Info;\r
426 UINT64 Req;\r
427 UINT64 Resp;\r
428 UINT64 Target;\r
429 UINT64 Ip;\r
430} MOD_ERROR_INFO;\r
431\r
432typedef struct {\r
433 UINT8 CpuidInfo[40];\r
434 UINT8 Reserved;\r
435} CPUID_INFO;\r
436\r
437typedef struct {\r
438 UINT64 FrLow;\r
439 UINT64 FrHigh;\r
440} FR_STRUCT;\r
441\r
442#define MIN_STATE_VALID_BIT_MASK 0x1\r
443#define BR_VALID_BIT_MASK 0x2\r
444#define CR_VALID_BIT_MASK 0x4\r
445#define AR_VALID_BIT_MASK 0x8\r
446#define RR_VALID_BIT_MASK 0x10\r
447#define FR_VALID_BIT_MASK 0x20\r
448\r
449typedef struct {\r
450 UINT64 ValidFieldBits;\r
451 UINT8 MinStateInfo[1024];\r
452 UINT64 Br[8];\r
453 UINT64 Cr[128];\r
454 UINT64 Ar[128];\r
455 UINT64 Rr[8];\r
456 FR_STRUCT Fr[128];\r
457} PSI_STATIC_STRUCT;\r
458\r
459#define PROC_ERROR_MAP_VALID_BIT_MASK 0x1\r
460#define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2\r
461#define PROC_CR_LID_VALID_BIT_MASK 0x4\r
462#define PROC_STATIC_STRUCT_VALID_BIT_MASK 0x8\r
463#define CPU_INFO_VALID_BIT_MASK 0x1000000\r
464\r
465typedef struct {\r
466 SAL_SEC_HEADER SectionHeader;\r
467 UINT64 ValidationBits;\r
468 UINT64 ProcErrorMap;\r
469 UINT64 ProcStateParameter;\r
470 UINT64 ProcCrLid;\r
471 MOD_ERROR_INFO CacheError[15];\r
472 MOD_ERROR_INFO TlbError[15];\r
473 MOD_ERROR_INFO BusError[15];\r
474 MOD_ERROR_INFO RegFileCheck[15];\r
475 MOD_ERROR_INFO MsCheck[15];\r
476 CPUID_INFO CpuInfo;\r
477 PSI_STATIC_STRUCT PsiValidData;\r
478} SAL_PROCESSOR_ERROR_RECORD;\r
479\r
480//\r
481// Sal Platform memory Error Record\r
482//\r
483#define SAL_MEMORY_ERROR_RECORD_INFO \\r
484 { \\r
485 0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
486 }\r
487\r
488#define MEMORY_ERROR_STATUS_VALID_BIT_MASK 0x1\r
489#define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK 0x2\r
490#define MEMORY_ADDR_BIT_MASK 0x4\r
491#define MEMORY_NODE_VALID_BIT_MASK 0x8\r
492#define MEMORY_CARD_VALID_BIT_MASK 0x10\r
493#define MEMORY_MODULE_VALID_BIT_MASK 0x20\r
494#define MEMORY_BANK_VALID_BIT_MASK 0x40\r
495#define MEMORY_DEVICE_VALID_BIT_MASK 0x80\r
496#define MEMORY_ROW_VALID_BIT_MASK 0x100\r
497#define MEMORY_COLUMN_VALID_BIT_MASK 0x200\r
498#define MEMORY_BIT_POSITION_VALID_BIT_MASK 0x400\r
499#define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x800\r
500#define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x1000\r
501#define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK 0x2000\r
502#define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK 0x4000\r
503#define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK 0x8000\r
504#define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x10000\r
505\r
506typedef struct {\r
507 SAL_SEC_HEADER SectionHeader;\r
508 UINT64 ValidationBits;\r
509 UINT64 MemErrorStatus;\r
510 UINT64 MemPhysicalAddress;\r
511 UINT64 MemPhysicalAddressMask;\r
512 UINT16 MemNode;\r
513 UINT16 MemCard;\r
514 UINT16 MemModule;\r
515 UINT16 MemBank;\r
516 UINT16 MemDevice;\r
517 UINT16 MemRow;\r
518 UINT16 MemColumn;\r
519 UINT16 MemBitPosition;\r
520 UINT64 ModRequestorId;\r
521 UINT64 ModResponderId;\r
522 UINT64 ModTargetId;\r
523 UINT64 BusSpecificData;\r
524 UINT8 MemPlatformOemId[16];\r
525} SAL_MEMORY_ERROR_RECORD;\r
526\r
527//\r
528// PCI BUS Errors\r
529//\r
530#define SAL_PCI_BUS_ERROR_RECORD_INFO \\r
531 { \\r
532 0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
533 }\r
534\r
535#define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK 0x1\r
536#define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK 0x2\r
537#define PCI_BUS_ID_VALID_BIT_MASK 0x4\r
538#define PCI_BUS_ADDRESS_VALID_BIT_MASK 0x8\r
539#define PCI_BUS_DATA_VALID_BIT_MASK 0x10\r
540#define PCI_BUS_CMD_VALID_BIT_MASK 0x20\r
541#define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK 0x40\r
542#define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK 0x80\r
543#define PCI_BUS_TARGET_VALID_BIT_MASK 0x100\r
544#define PCI_BUS_OEM_ID_VALID_BIT_MASK 0x200\r
545#define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK 0x400\r
546\r
547typedef struct {\r
548 UINT8 BusNumber;\r
549 UINT8 SegmentNumber;\r
550} PCI_BUS_ID;\r
551\r
552typedef struct {\r
553 SAL_SEC_HEADER SectionHeader;\r
554 UINT64 ValidationBits;\r
555 UINT64 PciBusErrorStatus;\r
556 UINT16 PciBusErrorType;\r
557 PCI_BUS_ID PciBusId;\r
558 UINT32 Reserved;\r
559 UINT64 PciBusAddress;\r
560 UINT64 PciBusData;\r
561 UINT64 PciBusCommand;\r
562 UINT64 PciBusRequestorId;\r
563 UINT64 PciBusResponderId;\r
564 UINT64 PciBusTargetId;\r
565 UINT8 PciBusOemId[16];\r
566} SAL_PCI_BUS_ERROR_RECORD;\r
567\r
568//\r
569// PCI Component Errors\r
570//\r
571#define SAL_PCI_COMP_ERROR_RECORD_INFO \\r
572 { \\r
573 0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
574 }\r
575\r
576#define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK 0x1\r
577#define PCI_COMP_INFO_VALID_BIT_MASK 0x2\r
578#define PCI_COMP_MEM_NUM_VALID_BIT_MASK 0x4\r
579#define PCI_COMP_IO_NUM_VALID_BIT_MASK 0x8\r
580#define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK 0x10\r
581#define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20\r
582\r
583typedef struct {\r
584 UINT16 VendorId;\r
585 UINT16 DeviceId;\r
586 UINT8 ClassCode[3];\r
587 UINT8 FunctionNumber;\r
588 UINT8 DeviceNumber;\r
589 UINT8 BusNumber;\r
590 UINT8 SegmentNumber;\r
591 UINT8 Reserved[5];\r
592} PCI_COMP_INFO;\r
593\r
594typedef struct {\r
595 SAL_SEC_HEADER SectionHeader;\r
596 UINT64 ValidationBits;\r
597 UINT64 PciComponentErrorStatus;\r
598 PCI_COMP_INFO PciComponentInfo;\r
599 UINT32 PciComponentMemNum;\r
600 UINT32 PciComponentIoNum;\r
601 UINT8 PciBusOemId[16];\r
602} SAL_PCI_COMPONENT_ERROR_RECORD;\r
603\r
604//\r
605// Sal Device Errors Info.\r
606//\r
607#define SAL_DEVICE_ERROR_RECORD_INFO \\r
608 { \\r
609 0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
610 }\r
611\r
612#define SEL_RECORD_ID_VALID_BIT_MASK 0x1;\r
613#define SEL_RECORD_TYPE_VALID_BIT_MASK 0x2;\r
614#define SEL_GENERATOR_ID_VALID_BIT_MASK 0x4;\r
615#define SEL_EVM_REV_VALID_BIT_MASK 0x8;\r
616#define SEL_SENSOR_TYPE_VALID_BIT_MASK 0x10;\r
617#define SEL_SENSOR_NUM_VALID_BIT_MASK 0x20;\r
618#define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;\r
619#define SEL_EVENT_DATA1_VALID_BIT_MASK 0x80;\r
620#define SEL_EVENT_DATA2_VALID_BIT_MASK 0x100;\r
621#define SEL_EVENT_DATA3_VALID_BIT_MASK 0x200;\r
622\r
623typedef struct {\r
624 SAL_SEC_HEADER SectionHeader;\r
625 UINT64 ValidationBits;\r
626 UINT16 SelRecordId;\r
627 UINT8 SelRecordType;\r
628 UINT32 TimeStamp;\r
629 UINT16 GeneratorId;\r
630 UINT8 EvmRevision;\r
631 UINT8 SensorType;\r
632 UINT8 SensorNum;\r
633 UINT8 EventDirType;\r
634 UINT8 Data1;\r
635 UINT8 Data2;\r
636 UINT8 Data3;\r
637} SAL_DEVICE_ERROR_RECORD;\r
638\r
639//\r
640// Sal SMBIOS Device Errors Info.\r
641//\r
642#define SAL_SMBIOS_ERROR_RECORD_INFO \\r
643 { \\r
644 0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
645 }\r
646\r
647#define SMBIOS_EVENT_TYPE_VALID_BIT_MASK 0x1\r
648#define SMBIOS_LENGTH_VALID_BIT_MASK 0x2\r
649#define SMBIOS_TIME_STAMP_VALID_BIT_MASK 0x4\r
650#define SMBIOS_DATA_VALID_BIT_MASK 0x8\r
651\r
652typedef struct {\r
653 SAL_SEC_HEADER SectionHeader;\r
654 UINT64 ValidationBits;\r
655 UINT8 SmbiosEventType;\r
656 UINT8 SmbiosLength;\r
657 UINT8 SmbiosBcdTimeStamp[6];\r
658} SAL_SMBIOS_DEVICE_ERROR_RECORD;\r
659\r
660//\r
661// Sal Platform Specific Errors Info.\r
662//\r
663#define SAL_PLATFORM_ERROR_RECORD_INFO \\r
664 { \\r
665 0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \\r
666 }\r
667\r
668#define PLATFORM_ERROR_STATUS_VALID_BIT_MASK 0x1\r
669#define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x2\r
670#define PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x4\r
671#define PLATFORM_TARGET_VALID_BIT_MASK 0x8\r
672#define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK 0x10\r
673#define PLATFORM_OEM_ID_VALID_BIT_MASK 0x20\r
674#define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40\r
675#define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80\r
676\r
677typedef struct {\r
678 SAL_SEC_HEADER SectionHeader;\r
679 UINT64 ValidationBits;\r
680 UINT64 PlatformErrorStatus;\r
681 UINT64 PlatformRequestorId;\r
682 UINT64 PlatformResponderId;\r
683 UINT64 PlatformTargetId;\r
684 UINT64 PlatformBusSpecificData;\r
685 UINT8 OemComponentId[16];\r
686} SAL_PLATFORM_SPECIFIC_ERROR_RECORD;\r
687\r
688//\r
689// Union of all the possible Sal Record Types\r
690//\r
691typedef union {\r
692 SAL_RECORD_HEADER *RecordHeader;\r
693 SAL_PROCESSOR_ERROR_RECORD *SalProcessorRecord;\r
694 SAL_PCI_BUS_ERROR_RECORD *SalPciBusRecord;\r
695 SAL_PCI_COMPONENT_ERROR_RECORD *SalPciComponentRecord;\r
696 SAL_DEVICE_ERROR_RECORD *ImpiRecord;\r
697 SAL_SMBIOS_DEVICE_ERROR_RECORD *SmbiosRecord;\r
698 SAL_PLATFORM_SPECIFIC_ERROR_RECORD *PlatformRecord;\r
699 SAL_MEMORY_ERROR_RECORD *MemoryRecord;\r
700 UINT8 *Raw;\r
701} SAL_ERROR_RECORDS_POINTERS;\r
702\r
703#pragma pack()\r
704\r
705#endif\r
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