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1 | /** @file\r |
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2 | Memory-only library functions with no library constructor/destructor\r |
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3 | \r |
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4 | Copyright (c) 2006, Intel Corporation\r |
5 | All rights reserved. This program and the accompanying materials\r |
6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r |
8 | http://opensource.org/licenses/bsd-license.php\r |
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9 | \r |
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10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
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12 | \r |
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13 | Module Name: BaseLib.h\r |
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14 | \r |
15 | **/\r |
16 | \r |
17 | #ifndef __BASE_LIB__\r |
18 | #define __BASE_LIB__\r |
19 | \r |
20 | //\r |
21 | // Definitions for architecture specific types\r |
22 | // These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER\r |
23 | //\r |
24 | \r |
25 | //\r |
26 | // SPIN_LOCK\r |
27 | //\r |
28 | typedef UINTN SPIN_LOCK;\r |
29 | \r |
30 | #if defined (MDE_CPU_IA32)\r |
31 | //\r |
32 | // IA32 context buffer used by SetJump() and LongJump()\r |
33 | //\r |
34 | typedef struct {\r |
35 | UINT32 Ebx;\r |
36 | UINT32 Esi;\r |
37 | UINT32 Edi;\r |
38 | UINT32 Ebp;\r |
39 | UINT32 Esp;\r |
40 | UINT32 Eip;\r |
41 | } BASE_LIBRARY_JUMP_BUFFER;\r |
42 | \r |
43 | #elif defined (MDE_CPU_IPF)\r |
44 | //\r |
45 | // IPF context buffer used by SetJump() and LongJump()\r |
46 | //\r |
47 | typedef struct {\r |
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48 | UINT64 F2[2];\r |
49 | UINT64 F3[2];\r |
50 | UINT64 F4[2];\r |
51 | UINT64 F5[2];\r |
52 | UINT64 F16[2];\r |
53 | UINT64 F17[2];\r |
54 | UINT64 F18[2];\r |
55 | UINT64 F19[2];\r |
56 | UINT64 F20[2];\r |
57 | UINT64 F21[2];\r |
58 | UINT64 F22[2];\r |
59 | UINT64 F23[2];\r |
60 | UINT64 F24[2];\r |
61 | UINT64 F25[2];\r |
62 | UINT64 F26[2];\r |
63 | UINT64 F27[2];\r |
64 | UINT64 F28[2];\r |
65 | UINT64 F29[2];\r |
66 | UINT64 F30[2];\r |
67 | UINT64 F31[2];\r |
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68 | UINT64 R4;\r |
69 | UINT64 R5;\r |
70 | UINT64 R6;\r |
71 | UINT64 R7;\r |
72 | UINT64 SP;\r |
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73 | UINT64 BR0;\r |
74 | UINT64 BR1;\r |
75 | UINT64 BR2;\r |
76 | UINT64 BR3;\r |
77 | UINT64 BR4;\r |
78 | UINT64 BR5;\r |
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79 | UINT64 InitialUNAT;\r |
80 | UINT64 AfterSpillUNAT;\r |
81 | UINT64 PFS;\r |
82 | UINT64 BSP;\r |
83 | UINT64 Predicates;\r |
84 | UINT64 LoopCount;\r |
85 | UINT64 FPSR;\r |
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86 | } BASE_LIBRARY_JUMP_BUFFER;\r |
87 | \r |
88 | #elif defined (MDE_CPU_X64)\r |
89 | //\r |
90 | // X64 context buffer used by SetJump() and LongJump()\r |
91 | //\r |
92 | typedef struct {\r |
93 | UINT64 Rbx;\r |
94 | UINT64 Rsp;\r |
95 | UINT64 Rbp;\r |
96 | UINT64 Rdi;\r |
97 | UINT64 Rsi;\r |
98 | UINT64 R12;\r |
99 | UINT64 R13;\r |
100 | UINT64 R14;\r |
101 | UINT64 R15;\r |
102 | UINT64 Rip;\r |
103 | } BASE_LIBRARY_JUMP_BUFFER;\r |
104 | \r |
105 | #elif defined (MDE_CPU_EBC)\r |
106 | //\r |
107 | // EBC context buffer used by SetJump() and LongJump()\r |
108 | //\r |
109 | typedef struct {\r |
110 | UINT64 R0;\r |
111 | UINT64 R1;\r |
112 | UINT64 R2;\r |
113 | UINT64 R3;\r |
114 | UINT64 IP;\r |
115 | } BASE_LIBRARY_JUMP_BUFFER;\r |
116 | \r |
117 | #else\r |
118 | #error Unknown Processor Type\r |
119 | #endif\r |
120 | \r |
121 | //\r |
122 | // String Services\r |
123 | //\r |
124 | \r |
125 | /**\r |
126 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r |
127 | string and returns the new Unicode string.\r |
128 | \r |
129 | This function copies the contents of the Unicode string Source to the Unicode\r |
130 | string Destination, and returns Destination. If Source and Destination\r |
131 | overlap, then the results are undefined.\r |
132 | \r |
133 | If Destination is NULL, then ASSERT().\r |
134 | If Source is NULL, then ASSERT().\r |
135 | If Source and Destination overlap, then ASSERT().\r |
136 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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137 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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138 | Null-terminator, then ASSERT().\r |
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139 | \r |
140 | @param Destination Pointer to a Null-terminated Unicode string.\r |
141 | @param Source Pointer to a Null-terminated Unicode string.\r |
142 | \r |
143 | @return Destiantion\r |
144 | \r |
145 | **/\r |
146 | CHAR16 *\r |
147 | EFIAPI\r |
148 | StrCpy (\r |
149 | OUT CHAR16 *Destination,\r |
150 | IN CONST CHAR16 *Source\r |
151 | );\r |
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152 | /**\r |
153 | Copies one Null-terminated Unicode string with a maximum length to another\r |
154 | Null-terminated Unicode string with a maximum length and returns the new\r |
155 | Unicode string.\r |
156 | \r |
157 | This function copies the contents of the Unicode string Source to the Unicode\r |
158 | string Destination, and returns Destination. At most, Length Unicode\r |
159 | characters are copied from Source to Destination. If Length is 0, then\r |
160 | Destination is returned unmodified. If Length is greater that the number of\r |
161 | Unicode characters in Source, then Destination is padded with Null Unicode\r |
162 | characters. If Source and Destination overlap, then the results are\r |
163 | undefined.\r |
164 | \r |
165 | If Destination is NULL, then ASSERT().\r |
166 | If Source is NULL, then ASSERT().\r |
167 | If Source and Destination overlap, then ASSERT().\r |
168 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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169 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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170 | Null-terminator, then ASSERT().\r |
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171 | \r |
172 | @param Destination Pointer to a Null-terminated Unicode string.\r |
173 | @param Source Pointer to a Null-terminated Unicode string.\r |
174 | @param Length Maximum number of Unicode characters to copy.\r |
175 | \r |
176 | @return Destination\r |
177 | \r |
178 | **/\r |
179 | CHAR16 *\r |
180 | EFIAPI\r |
181 | StrnCpy (\r |
182 | OUT CHAR16 *Destination,\r |
183 | IN CONST CHAR16 *Source,\r |
184 | IN UINTN Length\r |
185 | );\r |
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186 | /**\r |
187 | Returns the length of a Null-terminated Unicode string.\r |
188 | \r |
189 | This function returns the number of Unicode characters in the Null-terminated\r |
190 | Unicode string specified by String.\r |
191 | \r |
192 | If String is NULL, then ASSERT().\r |
193 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r |
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194 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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195 | Null-terminator, then ASSERT().\r |
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196 | \r |
197 | @param String Pointer to a Null-terminated Unicode string.\r |
198 | \r |
199 | @return The length of String.\r |
200 | \r |
201 | **/\r |
202 | UINTN\r |
203 | EFIAPI\r |
204 | StrLen (\r |
205 | IN CONST CHAR16 *String\r |
206 | );\r |
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207 | /**\r |
208 | Returns the size of a Null-terminated Unicode string in bytes, including the\r |
209 | Null terminator.\r |
210 | \r |
211 | This function returns the size, in bytes, of the Null-terminated Unicode\r |
212 | string specified by String.\r |
213 | \r |
214 | If String is NULL, then ASSERT().\r |
215 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r |
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216 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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217 | Null-terminator, then ASSERT().\r |
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218 | \r |
219 | @param String Pointer to a Null-terminated Unicode string.\r |
220 | \r |
221 | @return The size of String.\r |
222 | \r |
223 | **/\r |
224 | UINTN\r |
225 | EFIAPI\r |
226 | StrSize (\r |
227 | IN CONST CHAR16 *String\r |
228 | );\r |
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229 | /**\r |
230 | Compares two Null-terminated Unicode strings, and returns the difference\r |
231 | between the first mismatched Unicode characters.\r |
232 | \r |
233 | This function compares the Null-terminated Unicode string FirstString to the\r |
234 | Null-terminated Unicode string SecondString. If FirstString is identical to\r |
235 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r |
236 | mismatched Unicode character in SecondString subtracted from the first\r |
237 | mismatched Unicode character in FirstString.\r |
238 | \r |
239 | If FirstString is NULL, then ASSERT().\r |
240 | If SecondString is NULL, then ASSERT().\r |
241 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r |
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242 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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243 | Null-terminator, then ASSERT().\r |
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244 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r |
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245 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
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246 | Null-terminator, then ASSERT().\r |
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247 | \r |
248 | @param FirstString Pointer to a Null-terminated Unicode string.\r |
249 | @param SecondString Pointer to a Null-terminated Unicode string.\r |
250 | \r |
251 | @retval 0 FirstString is identical to SecondString.\r |
252 | @retval !=0 FirstString is not identical to SecondString.\r |
253 | \r |
254 | **/\r |
255 | INTN\r |
256 | EFIAPI\r |
257 | StrCmp (\r |
258 | IN CONST CHAR16 *FirstString,\r |
259 | IN CONST CHAR16 *SecondString\r |
260 | );\r |
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261 | /**\r |
262 | Compares two Null-terminated Unicode strings with maximum lengths, and\r |
263 | returns the difference between the first mismatched Unicode characters.\r |
264 | \r |
265 | This function compares the Null-terminated Unicode string FirstString to the\r |
266 | Null-terminated Unicode string SecondString. At most, Length Unicode\r |
267 | characters will be compared. If Length is 0, then 0 is returned. If\r |
268 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r |
269 | value returned is the first mismatched Unicode character in SecondString\r |
270 | subtracted from the first mismatched Unicode character in FirstString.\r |
271 | \r |
272 | If FirstString is NULL, then ASSERT().\r |
273 | If SecondString is NULL, then ASSERT().\r |
274 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r |
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275 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
276 | Null-terminator, then ASSERT().\r |
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277 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r |
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278 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
279 | Null-terminator, then ASSERT().\r |
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280 | \r |
281 | @param FirstString Pointer to a Null-terminated Unicode string.\r |
282 | @param SecondString Pointer to a Null-terminated Unicode string.\r |
283 | @param Length Maximum number of Unicode characters to compare.\r |
284 | \r |
285 | @retval 0 FirstString is identical to SecondString.\r |
286 | @retval !=0 FirstString is not identical to SecondString.\r |
287 | \r |
288 | **/\r |
289 | INTN\r |
290 | EFIAPI\r |
291 | StrnCmp (\r |
292 | IN CONST CHAR16 *FirstString,\r |
293 | IN CONST CHAR16 *SecondString,\r |
294 | IN UINTN Length\r |
295 | );\r |
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296 | /**\r |
297 | Concatenates one Null-terminated Unicode string to another Null-terminated\r |
298 | Unicode string, and returns the concatenated Unicode string.\r |
299 | \r |
300 | This function concatenates two Null-terminated Unicode strings. The contents\r |
301 | of Null-terminated Unicode string Source are concatenated to the end of\r |
302 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r |
303 | Unicode String is returned. If Source and Destination overlap, then the\r |
304 | results are undefined.\r |
305 | \r |
306 | If Destination is NULL, then ASSERT().\r |
307 | If Source is NULL, then ASSERT().\r |
308 | If Source and Destination overlap, then ASSERT().\r |
309 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
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310 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
311 | Null-terminator, then ASSERT().\r |
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312 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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313 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
314 | Null-terminator, then ASSERT().\r |
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315 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r |
316 | and Source results in a Unicode string with more than\r |
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317 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
318 | Null-terminator, then ASSERT().\r |
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319 | \r |
320 | @param Destination Pointer to a Null-terminated Unicode string.\r |
321 | @param Source Pointer to a Null-terminated Unicode string.\r |
322 | \r |
323 | @return Destination\r |
324 | \r |
325 | **/\r |
326 | CHAR16 *\r |
327 | EFIAPI\r |
328 | StrCat (\r |
329 | IN OUT CHAR16 *Destination,\r |
330 | IN CONST CHAR16 *Source\r |
331 | );\r |
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332 | /**\r |
333 | Concatenates one Null-terminated Unicode string with a maximum length to the\r |
334 | end of another Null-terminated Unicode string, and returns the concatenated\r |
335 | Unicode string.\r |
336 | \r |
337 | This function concatenates two Null-terminated Unicode strings. The contents\r |
338 | of Null-terminated Unicode string Source are concatenated to the end of\r |
339 | Null-terminated Unicode string Destination, and Destination is returned. At\r |
340 | most, Length Unicode characters are concatenated from Source to the end of\r |
341 | Destination, and Destination is always Null-terminated. If Length is 0, then\r |
342 | Destination is returned unmodified. If Source and Destination overlap, then\r |
343 | the results are undefined.\r |
344 | \r |
345 | If Destination is NULL, then ASSERT().\r |
346 | If Source is NULL, then ASSERT().\r |
347 | If Source and Destination overlap, then ASSERT().\r |
348 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
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349 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r |
350 | Null-terminator, then ASSERT().\r |
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351 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
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352 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
353 | Null-terminator, then ASSERT().\r |
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354 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r |
355 | and Source results in a Unicode string with more than\r |
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356 | PcdMaximumUnicodeStringLength Unicode characters not including the\r |
357 | Null-terminator, then ASSERT().\r |
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358 | \r |
359 | @param Destination Pointer to a Null-terminated Unicode string.\r |
360 | @param Source Pointer to a Null-terminated Unicode string.\r |
361 | @param Length Maximum number of Unicode characters to concatenate from\r |
362 | Source.\r |
363 | \r |
364 | @return Destination\r |
365 | \r |
366 | **/\r |
367 | CHAR16 *\r |
368 | EFIAPI\r |
369 | StrnCat (\r |
370 | IN OUT CHAR16 *Destination,\r |
371 | IN CONST CHAR16 *Source,\r |
372 | IN UINTN Length\r |
373 | );\r |
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374 | /**\r |
375 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r |
376 | string and returns the new ASCII string.\r |
377 | \r |
378 | This function copies the contents of the ASCII string Source to the ASCII\r |
379 | string Destination, and returns Destination. If Source and Destination\r |
380 | overlap, then the results are undefined.\r |
381 | \r |
382 | If Destination is NULL, then ASSERT().\r |
383 | If Source is NULL, then ASSERT().\r |
384 | If Source and Destination overlap, then ASSERT().\r |
385 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r |
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386 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
387 | then ASSERT().\r |
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388 | \r |
389 | @param Destination Pointer to a Null-terminated ASCII string.\r |
390 | @param Source Pointer to a Null-terminated ASCII string.\r |
391 | \r |
392 | @return Destination\r |
393 | \r |
394 | **/\r |
395 | CHAR8 *\r |
396 | EFIAPI\r |
397 | AsciiStrCpy (\r |
398 | OUT CHAR8 *Destination,\r |
399 | IN CONST CHAR8 *Source\r |
400 | );\r |
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401 | /**\r |
402 | Copies one Null-terminated ASCII string with a maximum length to another\r |
403 | Null-terminated ASCII string with a maximum length and returns the new ASCII\r |
404 | string.\r |
405 | \r |
406 | This function copies the contents of the ASCII string Source to the ASCII\r |
407 | string Destination, and returns Destination. At most, Length ASCII characters\r |
408 | are copied from Source to Destination. If Length is 0, then Destination is\r |
409 | returned unmodified. If Length is greater that the number of ASCII characters\r |
410 | in Source, then Destination is padded with Null ASCII characters. If Source\r |
411 | and Destination overlap, then the results are undefined.\r |
412 | \r |
413 | If Destination is NULL, then ASSERT().\r |
414 | If Source is NULL, then ASSERT().\r |
415 | If Source and Destination overlap, then ASSERT().\r |
416 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
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417 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
418 | then ASSERT().\r |
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419 | \r |
420 | @param Destination Pointer to a Null-terminated ASCII string.\r |
421 | @param Source Pointer to a Null-terminated ASCII string.\r |
422 | @param Length Maximum number of ASCII characters to copy.\r |
423 | \r |
424 | @return Destination\r |
425 | \r |
426 | **/\r |
427 | CHAR8 *\r |
428 | EFIAPI\r |
429 | AsciiStrnCpy (\r |
430 | OUT CHAR8 *Destination,\r |
431 | IN CONST CHAR8 *Source,\r |
432 | IN UINTN Length\r |
433 | );\r |
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434 | /**\r |
435 | Returns the length of a Null-terminated ASCII string.\r |
436 | \r |
437 | This function returns the number of ASCII characters in the Null-terminated\r |
438 | ASCII string specified by String.\r |
439 | \r |
440 | If String is NULL, then ASSERT().\r |
441 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r |
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442 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
443 | then ASSERT().\r |
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444 | \r |
445 | @param String Pointer to a Null-terminated ASCII string.\r |
446 | \r |
447 | @return The length of String.\r |
448 | \r |
449 | **/\r |
450 | UINTN\r |
451 | EFIAPI\r |
452 | AsciiStrLen (\r |
453 | IN CONST CHAR8 *String\r |
454 | );\r |
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455 | /**\r |
456 | Returns the size of a Null-terminated ASCII string in bytes, including the\r |
457 | Null terminator.\r |
458 | \r |
459 | This function returns the size, in bytes, of the Null-terminated ASCII string\r |
460 | specified by String.\r |
461 | \r |
462 | If String is NULL, then ASSERT().\r |
463 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r |
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464 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
465 | then ASSERT().\r |
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466 | \r |
467 | @param String Pointer to a Null-terminated ASCII string.\r |
468 | \r |
469 | @return The size of String.\r |
470 | \r |
471 | **/\r |
472 | UINTN\r |
473 | EFIAPI\r |
474 | AsciiStrSize (\r |
475 | IN CONST CHAR8 *String\r |
476 | );\r |
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477 | /**\r |
478 | Compares two Null-terminated ASCII strings, and returns the difference\r |
479 | between the first mismatched ASCII characters.\r |
480 | \r |
481 | This function compares the Null-terminated ASCII string FirstString to the\r |
482 | Null-terminated ASCII string SecondString. If FirstString is identical to\r |
483 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r |
484 | mismatched ASCII character in SecondString subtracted from the first\r |
485 | mismatched ASCII character in FirstString.\r |
486 | \r |
487 | If FirstString is NULL, then ASSERT().\r |
488 | If SecondString is NULL, then ASSERT().\r |
489 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r |
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490 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
491 | then ASSERT().\r |
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492 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r |
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493 | than PcdMaximumAsciiStringLength ASCII characters not including the\r |
494 | Null-terminator, then ASSERT().\r |
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495 | \r |
496 | @param FirstString Pointer to a Null-terminated ASCII string.\r |
497 | @param SecondString Pointer to a Null-terminated ASCII string.\r |
498 | \r |
499 | @retval 0 FirstString is identical to SecondString.\r |
500 | @retval !=0 FirstString is not identical to SecondString.\r |
501 | \r |
502 | **/\r |
503 | INTN\r |
504 | EFIAPI\r |
505 | AsciiStrCmp (\r |
506 | IN CONST CHAR8 *FirstString,\r |
507 | IN CONST CHAR8 *SecondString\r |
508 | );\r |
878ddf1f |
509 | /**\r |
510 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r |
511 | and returns the difference between the first mismatched ASCII characters.\r |
512 | \r |
513 | This function performs a case insensitive comparison of the Null-terminated\r |
514 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r |
515 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r |
516 | value returned is the first mismatched lower case ASCII character in\r |
517 | SecondString subtracted from the first mismatched lower case ASCII character\r |
518 | in FirstString.\r |
519 | \r |
520 | If FirstString is NULL, then ASSERT().\r |
521 | If SecondString is NULL, then ASSERT().\r |
522 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r |
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523 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
524 | then ASSERT().\r |
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525 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r |
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526 | than PcdMaximumAsciiStringLength ASCII characters not including the\r |
527 | Null-terminator, then ASSERT().\r |
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528 | \r |
529 | @param FirstString Pointer to a Null-terminated ASCII string.\r |
530 | @param SecondString Pointer to a Null-terminated ASCII string.\r |
531 | \r |
532 | @retval 0 FirstString is identical to SecondString using case insensitive\r |
533 | comparisons.\r |
534 | @retval !=0 FirstString is not identical to SecondString using case\r |
535 | insensitive comparisons.\r |
536 | \r |
537 | **/\r |
538 | INTN\r |
539 | EFIAPI\r |
540 | AsciiStriCmp (\r |
541 | IN CONST CHAR8 *FirstString,\r |
542 | IN CONST CHAR8 *SecondString\r |
543 | );\r |
878ddf1f |
544 | /**\r |
545 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r |
546 | the difference between the first mismatched ASCII characters.\r |
547 | \r |
548 | This function compares the Null-terminated ASCII string FirstString to the\r |
549 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r |
550 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r |
551 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r |
552 | is the first mismatched ASCII character in SecondString subtracted from the\r |
553 | first mismatched ASCII character in FirstString.\r |
554 | \r |
555 | If FirstString is NULL, then ASSERT().\r |
556 | If SecondString is NULL, then ASSERT().\r |
557 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r |
30817eb4 |
558 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
559 | then ASSERT().\r |
560 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more than\r |
561 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
562 | then ASSERT().\r |
878ddf1f |
563 | \r |
564 | @param FirstString Pointer to a Null-terminated ASCII string.\r |
565 | @param SecondString Pointer to a Null-terminated ASCII string.\r |
566 | \r |
567 | @retval 0 FirstString is identical to SecondString.\r |
568 | @retval !=0 FirstString is not identical to SecondString.\r |
569 | \r |
570 | **/\r |
571 | INTN\r |
572 | EFIAPI\r |
573 | AsciiStrnCmp (\r |
574 | IN CONST CHAR8 *FirstString,\r |
575 | IN CONST CHAR8 *SecondString,\r |
576 | IN UINTN Length\r |
577 | );\r |
878ddf1f |
578 | /**\r |
579 | Concatenates one Null-terminated ASCII string to another Null-terminated\r |
580 | ASCII string, and returns the concatenated ASCII string.\r |
581 | \r |
582 | This function concatenates two Null-terminated ASCII strings. The contents of\r |
583 | Null-terminated ASCII string Source are concatenated to the end of Null-\r |
584 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r |
585 | String is returned.\r |
586 | \r |
587 | If Destination is NULL, then ASSERT().\r |
588 | If Source is NULL, then ASSERT().\r |
589 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r |
30817eb4 |
590 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
591 | then ASSERT().\r |
878ddf1f |
592 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r |
30817eb4 |
593 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
594 | then ASSERT().\r |
878ddf1f |
595 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r |
596 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r |
597 | ASCII characters, then ASSERT().\r |
598 | \r |
599 | @param Destination Pointer to a Null-terminated ASCII string.\r |
600 | @param Source Pointer to a Null-terminated ASCII string.\r |
601 | \r |
602 | @return Destination\r |
603 | \r |
604 | **/\r |
605 | CHAR8 *\r |
606 | EFIAPI\r |
607 | AsciiStrCat (\r |
30817eb4 |
608 | IN OUT CHAR8 *Destination,\r |
609 | IN CONST CHAR8 *Source\r |
878ddf1f |
610 | );\r |
878ddf1f |
611 | /**\r |
612 | Concatenates one Null-terminated ASCII string with a maximum length to the\r |
613 | end of another Null-terminated ASCII string, and returns the concatenated\r |
614 | ASCII string.\r |
615 | \r |
616 | This function concatenates two Null-terminated ASCII strings. The contents\r |
617 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r |
618 | terminated ASCII string Destination, and Destination is returned. At most,\r |
619 | Length ASCII characters are concatenated from Source to the end of\r |
620 | Destination, and Destination is always Null-terminated. If Length is 0, then\r |
621 | Destination is returned unmodified. If Source and Destination overlap, then\r |
622 | the results are undefined.\r |
623 | \r |
624 | If Destination is NULL, then ASSERT().\r |
625 | If Source is NULL, then ASSERT().\r |
626 | If Source and Destination overlap, then ASSERT().\r |
30817eb4 |
627 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
628 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
629 | then ASSERT().\r |
878ddf1f |
630 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
30817eb4 |
631 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r |
632 | then ASSERT().\r |
878ddf1f |
633 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r |
634 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r |
30817eb4 |
635 | ASCII characters not including the Null-terminator, then ASSERT().\r |
878ddf1f |
636 | \r |
637 | @param Destination Pointer to a Null-terminated ASCII string.\r |
638 | @param Source Pointer to a Null-terminated ASCII string.\r |
639 | @param Length Maximum number of ASCII characters to concatenate from\r |
640 | Source.\r |
641 | \r |
642 | @return Destination\r |
643 | \r |
644 | **/\r |
645 | CHAR8 *\r |
646 | EFIAPI\r |
647 | AsciiStrnCat (\r |
648 | IN OUT CHAR8 *Destination,\r |
649 | IN CONST CHAR8 *Source,\r |
650 | IN UINTN Length\r |
651 | );\r |
dee4740a |
652 | /**\r |
653 | Converts an 8-bit value to an 8-bit BCD value.\r |
654 | \r |
655 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r |
656 | returned.\r |
657 | \r |
658 | If Value >= 100, then ASSERT().\r |
659 | \r |
660 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r |
661 | \r |
662 | @return The BCD value\r |
663 | \r |
664 | **/\r |
665 | UINT8\r |
666 | EFIAPI\r |
667 | DecimalToBcd8 (\r |
668 | IN UINT8 Value\r |
669 | );\r |
670 | \r |
671 | /**\r |
672 | Converts an 8-bit BCD value to an 8-bit value.\r |
673 | \r |
674 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r |
675 | value is returned.\r |
676 | \r |
677 | If Value >= 0xA0, then ASSERT().\r |
678 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r |
679 | \r |
680 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r |
681 | \r |
682 | @return The 8-bit value is returned.\r |
683 | \r |
684 | **/\r |
685 | UINT8\r |
686 | EFIAPI\r |
687 | BcdToDecimal8 (\r |
688 | IN UINT8 Value\r |
689 | );\r |
690 | \r |
878ddf1f |
691 | //\r |
692 | // LIST_ENTRY definition\r |
693 | //\r |
694 | typedef struct _LIST_ENTRY LIST_ENTRY;\r |
695 | \r |
696 | struct _LIST_ENTRY {\r |
697 | LIST_ENTRY *ForwardLink;\r |
698 | LIST_ENTRY *BackLink;\r |
699 | };\r |
700 | \r |
701 | //\r |
702 | // Linked List Functions and Macros\r |
703 | //\r |
704 | \r |
705 | /**\r |
706 | Initializes the head node of a doubly linked list that is declared as a\r |
707 | global variable in a module.\r |
708 | \r |
709 | Initializes the forward and backward links of a new linked list. After\r |
710 | initializing a linked list with this macro, the other linked list functions\r |
711 | may be used to add and remove nodes from the linked list. This macro results\r |
712 | in smaller executables by initializing the linked list in the data section,\r |
713 | instead if calling the InitializeListHead() function to perform the\r |
714 | equivalent operation.\r |
715 | \r |
716 | @param ListHead The head note of a list to initiailize.\r |
717 | \r |
718 | **/\r |
719 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead}\r |
720 | \r |
721 | /**\r |
722 | Initializes the head node of a doubly linked list, and returns the pointer to\r |
723 | the head node of the doubly linked list.\r |
724 | \r |
725 | Initializes the forward and backward links of a new linked list. After\r |
726 | initializing a linked list with this function, the other linked list\r |
727 | functions may be used to add and remove nodes from the linked list. It is up\r |
728 | to the caller of this function to allocate the memory for ListHead.\r |
729 | \r |
730 | If ListHead is NULL, then ASSERT().\r |
731 | \r |
732 | @param ListHead A pointer to the head node of a new doubly linked list.\r |
733 | \r |
734 | @return ListHead\r |
735 | \r |
736 | **/\r |
737 | LIST_ENTRY *\r |
738 | EFIAPI\r |
739 | InitializeListHead (\r |
740 | IN LIST_ENTRY *ListHead\r |
741 | );\r |
742 | \r |
743 | /**\r |
744 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r |
745 | to the head node of the doubly linked list.\r |
746 | \r |
747 | Adds the node Entry at the beginning of the doubly linked list denoted by\r |
748 | ListHead, and returns ListHead.\r |
749 | \r |
750 | If ListHead is NULL, then ASSERT().\r |
751 | If Entry is NULL, then ASSERT().\r |
752 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r |
30817eb4 |
753 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
db8f40e2 |
754 | of nodes in ListHead, including the ListHead node, is greater than or\r |
30817eb4 |
755 | equal to PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
756 | \r |
757 | @param ListHead A pointer to the head node of a doubly linked list.\r |
758 | @param Entry A pointer to a node that is to be inserted at the beginning\r |
759 | of a doubly linked list.\r |
760 | \r |
761 | @return ListHead\r |
762 | \r |
763 | **/\r |
764 | LIST_ENTRY *\r |
765 | EFIAPI\r |
766 | InsertHeadList (\r |
767 | IN LIST_ENTRY *ListHead,\r |
768 | IN LIST_ENTRY *Entry\r |
769 | );\r |
770 | \r |
771 | /**\r |
772 | Adds a node to the end of a doubly linked list, and returns the pointer to\r |
773 | the head node of the doubly linked list.\r |
774 | \r |
775 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r |
776 | and returns ListHead.\r |
777 | \r |
778 | If ListHead is NULL, then ASSERT().\r |
779 | If Entry is NULL, then ASSERT().\r |
780 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r |
30817eb4 |
781 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
db8f40e2 |
782 | of nodes in ListHead, including the ListHead node, is greater than or\r |
30817eb4 |
783 | equal to PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
784 | \r |
785 | @param ListHead A pointer to the head node of a doubly linked list.\r |
786 | @param Entry A pointer to a node that is to be added at the end of the\r |
787 | doubly linked list.\r |
788 | \r |
789 | @return ListHead\r |
790 | \r |
791 | **/\r |
792 | LIST_ENTRY *\r |
793 | EFIAPI\r |
794 | InsertTailList (\r |
795 | IN LIST_ENTRY *ListHead,\r |
796 | IN LIST_ENTRY *Entry\r |
797 | );\r |
798 | \r |
799 | /**\r |
800 | Retrieves the first node of a doubly linked list.\r |
801 | \r |
802 | Returns the first node of a doubly linked list. List must have been\r |
803 | initialized with InitializeListHead(). If List is empty, then NULL is\r |
804 | returned.\r |
805 | \r |
806 | If List is NULL, then ASSERT().\r |
807 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
db8f40e2 |
808 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
809 | in List, including the List node, is greater than or equal to\r |
30817eb4 |
810 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
811 | \r |
812 | @param List A pointer to the head node of a doubly linked list.\r |
813 | \r |
814 | @return The first node of a doubly linked list.\r |
815 | @retval NULL The list is empty.\r |
816 | \r |
817 | **/\r |
818 | LIST_ENTRY *\r |
819 | EFIAPI\r |
820 | GetFirstNode (\r |
821 | IN CONST LIST_ENTRY *List\r |
822 | );\r |
823 | \r |
824 | /**\r |
825 | Retrieves the next node of a doubly linked list.\r |
826 | \r |
827 | Returns the node of a doubly linked list that follows Node. List must have\r |
828 | been initialized with InitializeListHead(). If List is empty, then List is\r |
829 | returned.\r |
830 | \r |
831 | If List is NULL, then ASSERT().\r |
832 | If Node is NULL, then ASSERT().\r |
833 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
834 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r |
835 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r |
836 | If Node is not a node in List, then ASSERT().\r |
837 | \r |
838 | @param List A pointer to the head node of a doubly linked list.\r |
839 | @param Node A pointer to a node in the doubly linked list.\r |
840 | \r |
841 | @return Pointer to the next node if one exists. Otherwise a null value which\r |
842 | is actually List is returned.\r |
843 | \r |
844 | **/\r |
845 | LIST_ENTRY *\r |
846 | EFIAPI\r |
847 | GetNextNode (\r |
848 | IN CONST LIST_ENTRY *List,\r |
849 | IN CONST LIST_ENTRY *Node\r |
850 | );\r |
851 | \r |
852 | /**\r |
853 | Checks to see if a doubly linked list is empty or not.\r |
854 | \r |
855 | Checks to see if the doubly linked list is empty. If the linked list contains\r |
856 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r |
857 | \r |
858 | If ListHead is NULL, then ASSERT().\r |
859 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r |
db8f40e2 |
860 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
861 | in List, including the List node, is greater than or equal to\r |
30817eb4 |
862 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
863 | \r |
864 | @param ListHead A pointer to the head node of a doubly linked list.\r |
865 | \r |
866 | @retval TRUE The linked list is empty.\r |
867 | @retval FALSE The linked list is not empty.\r |
868 | \r |
869 | **/\r |
870 | BOOLEAN\r |
871 | EFIAPI\r |
872 | IsListEmpty (\r |
873 | IN CONST LIST_ENTRY *ListHead\r |
874 | );\r |
875 | \r |
876 | /**\r |
877 | Determines if a node in a doubly linked list is null.\r |
878 | \r |
879 | Returns FALSE if Node is one of the nodes in the doubly linked list specified\r |
880 | by List. Otherwise, TRUE is returned. List must have been initialized with\r |
881 | InitializeListHead().\r |
882 | \r |
883 | If List is NULL, then ASSERT().\r |
884 | If Node is NULL, then ASSERT().\r |
885 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
db8f40e2 |
886 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
887 | in List, including the List node, is greater than or equal to\r |
30817eb4 |
888 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
889 | If Node is not a node in List and Node is not equal to List, then ASSERT().\r |
890 | \r |
891 | @param List A pointer to the head node of a doubly linked list.\r |
24e25d11 |
892 | @param Node A pointer to a node in the doubly linked list.\r |
878ddf1f |
893 | \r |
894 | @retval TRUE Node is one of the nodes in the doubly linked list.\r |
895 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r |
896 | \r |
897 | **/\r |
898 | BOOLEAN\r |
899 | EFIAPI\r |
900 | IsNull (\r |
901 | IN CONST LIST_ENTRY *List,\r |
902 | IN CONST LIST_ENTRY *Node\r |
903 | );\r |
904 | \r |
905 | /**\r |
906 | Determines if a node the last node in a doubly linked list.\r |
907 | \r |
908 | Returns TRUE if Node is the last node in the doubly linked list specified by\r |
909 | List. Otherwise, FALSE is returned. List must have been initialized with\r |
910 | InitializeListHead().\r |
911 | \r |
912 | If List is NULL, then ASSERT().\r |
913 | If Node is NULL, then ASSERT().\r |
914 | If List was not initialized with InitializeListHead(), then ASSERT().\r |
db8f40e2 |
915 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
916 | in List, including the List node, is greater than or equal to\r |
30817eb4 |
917 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
918 | If Node is not a node in List, then ASSERT().\r |
919 | \r |
920 | @param List A pointer to the head node of a doubly linked list.\r |
24e25d11 |
921 | @param Node A pointer to a node in the doubly linked list.\r |
878ddf1f |
922 | \r |
923 | @retval TRUE Node is the last node in the linked list.\r |
924 | @retval FALSE Node is not the last node in the linked list.\r |
925 | \r |
926 | **/\r |
927 | BOOLEAN\r |
928 | EFIAPI\r |
929 | IsNodeAtEnd (\r |
930 | IN CONST LIST_ENTRY *List,\r |
931 | IN CONST LIST_ENTRY *Node\r |
932 | );\r |
933 | \r |
934 | /**\r |
935 | Swaps the location of two nodes in a doubly linked list, and returns the\r |
936 | first node after the swap.\r |
937 | \r |
938 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r |
939 | Otherwise, the location of the FirstEntry node is swapped with the location\r |
940 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r |
941 | same double linked list as FirstEntry and that double linked list must have\r |
942 | been initialized with InitializeListHead(). SecondEntry is returned after the\r |
943 | nodes are swapped.\r |
944 | \r |
945 | If FirstEntry is NULL, then ASSERT().\r |
946 | If SecondEntry is NULL, then ASSERT().\r |
947 | If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r |
30817eb4 |
948 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
949 | linked list containing the FirstEntry and SecondEntry nodes, including\r |
db8f40e2 |
950 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r |
30817eb4 |
951 | PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
952 | \r |
953 | @param FirstEntry A pointer to a node in a linked list.\r |
954 | @param SecondEntry A pointer to another node in the same linked list.\r |
955 | \r |
956 | **/\r |
957 | LIST_ENTRY *\r |
958 | EFIAPI\r |
959 | SwapListEntries (\r |
960 | IN LIST_ENTRY *FirstEntry,\r |
961 | IN LIST_ENTRY *SecondEntry\r |
962 | );\r |
963 | \r |
964 | /**\r |
965 | Removes a node from a doubly linked list, and returns the node that follows\r |
966 | the removed node.\r |
967 | \r |
968 | Removes the node Entry from a doubly linked list. It is up to the caller of\r |
969 | this function to release the memory used by this node if that is required. On\r |
970 | exit, the node following Entry in the doubly linked list is returned. If\r |
971 | Entry is the only node in the linked list, then the head node of the linked\r |
972 | list is returned.\r |
973 | \r |
974 | If Entry is NULL, then ASSERT().\r |
975 | If Entry is the head node of an empty list, then ASSERT().\r |
db8f40e2 |
976 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
977 | linked list containing Entry, including the Entry node, is greater than\r |
30817eb4 |
978 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r |
878ddf1f |
979 | \r |
980 | @param Entry A pointer to a node in a linked list\r |
981 | \r |
982 | @return Entry\r |
983 | \r |
984 | **/\r |
985 | LIST_ENTRY *\r |
986 | EFIAPI\r |
987 | RemoveEntryList (\r |
988 | IN CONST LIST_ENTRY *Entry\r |
989 | );\r |
990 | \r |
991 | //\r |
992 | // Math Services\r |
993 | //\r |
994 | \r |
995 | /**\r |
996 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r |
997 | with zeros. The shifted value is returned.\r |
998 | \r |
999 | This function shifts the 64-bit value Operand to the left by Count bits. The\r |
1000 | low Count bits are set to zero. The shifted value is returned.\r |
1001 | \r |
1002 | If Count is greater than 63, then ASSERT().\r |
1003 | \r |
1004 | @param Operand The 64-bit operand to shift left.\r |
1005 | @param Count The number of bits to shift left.\r |
1006 | \r |
1007 | @return Operand << Count\r |
1008 | \r |
1009 | **/\r |
1010 | UINT64\r |
1011 | EFIAPI\r |
1012 | LShiftU64 (\r |
1013 | IN UINT64 Operand,\r |
1014 | IN UINTN Count\r |
1015 | );\r |
1016 | \r |
1017 | /**\r |
1018 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r |
1019 | filled with zeros. The shifted value is returned.\r |
1020 | \r |
1021 | This function shifts the 64-bit value Operand to the right by Count bits. The\r |
1022 | high Count bits are set to zero. The shifted value is returned.\r |
1023 | \r |
1024 | If Count is greater than 63, then ASSERT().\r |
1025 | \r |
1026 | @param Operand The 64-bit operand to shift right.\r |
1027 | @param Count The number of bits to shift right.\r |
1028 | \r |
1029 | @return Operand >> Count\r |
1030 | \r |
1031 | **/\r |
1032 | UINT64\r |
1033 | EFIAPI\r |
1034 | RShiftU64 (\r |
1035 | IN UINT64 Operand,\r |
1036 | IN UINTN Count\r |
1037 | );\r |
1038 | \r |
1039 | /**\r |
1040 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r |
1041 | with original integer's bit 63. The shifted value is returned.\r |
1042 | \r |
1043 | This function shifts the 64-bit value Operand to the right by Count bits. The\r |
1044 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r |
1045 | \r |
1046 | If Count is greater than 63, then ASSERT().\r |
1047 | \r |
1048 | @param Operand The 64-bit operand to shift right.\r |
1049 | @param Count The number of bits to shift right.\r |
1050 | \r |
1051 | @return Operand >> Count\r |
1052 | \r |
1053 | **/\r |
1054 | UINT64\r |
1055 | EFIAPI\r |
1056 | ARShiftU64 (\r |
1057 | IN UINT64 Operand,\r |
1058 | IN UINTN Count\r |
1059 | );\r |
1060 | \r |
1061 | /**\r |
1062 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r |
1063 | with the high bits that were rotated.\r |
1064 | \r |
1065 | This function rotates the 32-bit value Operand to the left by Count bits. The\r |
1066 | low Count bits are fill with the high Count bits of Operand. The rotated\r |
1067 | value is returned.\r |
1068 | \r |
1069 | If Count is greater than 31, then ASSERT().\r |
1070 | \r |
1071 | @param Operand The 32-bit operand to rotate left.\r |
1072 | @param Count The number of bits to rotate left.\r |
1073 | \r |
1074 | @return Operand <<< Count\r |
1075 | \r |
1076 | **/\r |
1077 | UINT32\r |
1078 | EFIAPI\r |
1079 | LRotU32 (\r |
1080 | IN UINT32 Operand,\r |
1081 | IN UINTN Count\r |
1082 | );\r |
1083 | \r |
1084 | /**\r |
1085 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r |
1086 | with the low bits that were rotated.\r |
1087 | \r |
1088 | This function rotates the 32-bit value Operand to the right by Count bits.\r |
1089 | The high Count bits are fill with the low Count bits of Operand. The rotated\r |
1090 | value is returned.\r |
1091 | \r |
1092 | If Count is greater than 31, then ASSERT().\r |
1093 | \r |
1094 | @param Operand The 32-bit operand to rotate right.\r |
1095 | @param Count The number of bits to rotate right.\r |
1096 | \r |
1097 | @return Operand >>> Count\r |
1098 | \r |
1099 | **/\r |
1100 | UINT32\r |
1101 | EFIAPI\r |
1102 | RRotU32 (\r |
1103 | IN UINT32 Operand,\r |
1104 | IN UINTN Count\r |
1105 | );\r |
1106 | \r |
1107 | /**\r |
1108 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r |
1109 | with the high bits that were rotated.\r |
1110 | \r |
1111 | This function rotates the 64-bit value Operand to the left by Count bits. The\r |
1112 | low Count bits are fill with the high Count bits of Operand. The rotated\r |
1113 | value is returned.\r |
1114 | \r |
1115 | If Count is greater than 63, then ASSERT().\r |
1116 | \r |
1117 | @param Operand The 64-bit operand to rotate left.\r |
1118 | @param Count The number of bits to rotate left.\r |
1119 | \r |
1120 | @return Operand <<< Count\r |
1121 | \r |
1122 | **/\r |
1123 | UINT64\r |
1124 | EFIAPI\r |
1125 | LRotU64 (\r |
1126 | IN UINT64 Operand,\r |
1127 | IN UINTN Count\r |
1128 | );\r |
1129 | \r |
1130 | /**\r |
1131 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r |
1132 | with the high low bits that were rotated.\r |
1133 | \r |
1134 | This function rotates the 64-bit value Operand to the right by Count bits.\r |
1135 | The high Count bits are fill with the low Count bits of Operand. The rotated\r |
1136 | value is returned.\r |
1137 | \r |
1138 | If Count is greater than 63, then ASSERT().\r |
1139 | \r |
1140 | @param Operand The 64-bit operand to rotate right.\r |
1141 | @param Count The number of bits to rotate right.\r |
1142 | \r |
1143 | @return Operand >>> Count\r |
1144 | \r |
1145 | **/\r |
1146 | UINT64\r |
1147 | EFIAPI\r |
1148 | RRotU64 (\r |
1149 | IN UINT64 Operand,\r |
1150 | IN UINTN Count\r |
1151 | );\r |
1152 | \r |
1153 | /**\r |
1154 | Returns the bit position of the lowest bit set in a 32-bit value.\r |
1155 | \r |
1156 | This function computes the bit position of the lowest bit set in the 32-bit\r |
1157 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
1158 | Otherwise, a value between 0 and 31 is returned.\r |
1159 | \r |
1160 | @param Operand The 32-bit operand to evaluate.\r |
1161 | \r |
1162 | @return Position of the lowest bit set in Operand if found.\r |
1163 | @retval -1 Operand is zero.\r |
1164 | \r |
1165 | **/\r |
1166 | INTN\r |
1167 | EFIAPI\r |
1168 | LowBitSet32 (\r |
1169 | IN UINT32 Operand\r |
1170 | );\r |
1171 | \r |
1172 | /**\r |
1173 | Returns the bit position of the lowest bit set in a 64-bit value.\r |
1174 | \r |
1175 | This function computes the bit position of the lowest bit set in the 64-bit\r |
1176 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
1177 | Otherwise, a value between 0 and 63 is returned.\r |
1178 | \r |
1179 | @param Operand The 64-bit operand to evaluate.\r |
1180 | \r |
1181 | @return Position of the lowest bit set in Operand if found.\r |
1182 | @retval -1 Operand is zero.\r |
1183 | \r |
1184 | **/\r |
1185 | INTN\r |
1186 | EFIAPI\r |
1187 | LowBitSet64 (\r |
1188 | IN UINT64 Operand\r |
1189 | );\r |
1190 | \r |
1191 | /**\r |
1192 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r |
1193 | to log2(x).\r |
1194 | \r |
1195 | This function computes the bit position of the highest bit set in the 32-bit\r |
1196 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
1197 | Otherwise, a value between 0 and 31 is returned.\r |
1198 | \r |
1199 | @param Operand The 32-bit operand to evaluate.\r |
1200 | \r |
1201 | @return Position of the highest bit set in Operand if found.\r |
1202 | @retval -1 Operand is zero.\r |
1203 | \r |
1204 | **/\r |
1205 | INTN\r |
1206 | EFIAPI\r |
1207 | HighBitSet32 (\r |
1208 | IN UINT32 Operand\r |
1209 | );\r |
1210 | \r |
1211 | /**\r |
1212 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r |
1213 | to log2(x).\r |
1214 | \r |
1215 | This function computes the bit position of the highest bit set in the 64-bit\r |
1216 | value specified by Operand. If Operand is zero, then -1 is returned.\r |
1217 | Otherwise, a value between 0 and 63 is returned.\r |
1218 | \r |
1219 | @param Operand The 64-bit operand to evaluate.\r |
1220 | \r |
1221 | @return Position of the highest bit set in Operand if found.\r |
1222 | @retval -1 Operand is zero.\r |
1223 | \r |
1224 | **/\r |
1225 | INTN\r |
1226 | EFIAPI\r |
1227 | HighBitSet64 (\r |
1228 | IN UINT64 Operand\r |
1229 | );\r |
1230 | \r |
1231 | /**\r |
1232 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r |
1233 | 1 << HighBitSet32(x).\r |
1234 | \r |
1235 | This function computes the value of the highest bit set in the 32-bit value\r |
1236 | specified by Operand. If Operand is zero, then zero is returned.\r |
1237 | \r |
1238 | @param Operand The 32-bit operand to evaluate.\r |
1239 | \r |
1240 | @return 1 << HighBitSet32(Operand)\r |
1241 | @retval 0 Operand is zero.\r |
1242 | \r |
1243 | **/\r |
1244 | UINT32\r |
1245 | EFIAPI\r |
1246 | GetPowerOfTwo32 (\r |
1247 | IN UINT32 Operand\r |
1248 | );\r |
1249 | \r |
1250 | /**\r |
1251 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r |
1252 | 1 << HighBitSet64(x).\r |
1253 | \r |
1254 | This function computes the value of the highest bit set in the 64-bit value\r |
1255 | specified by Operand. If Operand is zero, then zero is returned.\r |
1256 | \r |
1257 | @param Operand The 64-bit operand to evaluate.\r |
1258 | \r |
1259 | @return 1 << HighBitSet64(Operand)\r |
1260 | @retval 0 Operand is zero.\r |
1261 | \r |
1262 | **/\r |
1263 | UINT64\r |
1264 | EFIAPI\r |
1265 | GetPowerOfTwo64 (\r |
1266 | IN UINT64 Operand\r |
1267 | );\r |
1268 | \r |
1269 | /**\r |
1270 | Switches the endianess of a 16-bit integer.\r |
1271 | \r |
1272 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r |
1273 | from little endian to big endian or vice versa. The byte swapped value is\r |
1274 | returned.\r |
1275 | \r |
1276 | @param Operand A 16-bit unsigned value.\r |
1277 | \r |
1278 | @return The byte swaped Operand.\r |
1279 | \r |
1280 | **/\r |
1281 | UINT16\r |
1282 | EFIAPI\r |
1283 | SwapBytes16 (\r |
1284 | IN UINT16 Value\r |
1285 | );\r |
1286 | \r |
1287 | /**\r |
1288 | Switches the endianess of a 32-bit integer.\r |
1289 | \r |
1290 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r |
1291 | from little endian to big endian or vice versa. The byte swapped value is\r |
1292 | returned.\r |
1293 | \r |
1294 | @param Operand A 32-bit unsigned value.\r |
1295 | \r |
1296 | @return The byte swaped Operand.\r |
1297 | \r |
1298 | **/\r |
1299 | UINT32\r |
1300 | EFIAPI\r |
1301 | SwapBytes32 (\r |
1302 | IN UINT32 Value\r |
1303 | );\r |
1304 | \r |
1305 | /**\r |
1306 | Switches the endianess of a 64-bit integer.\r |
1307 | \r |
1308 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r |
1309 | from little endian to big endian or vice versa. The byte swapped value is\r |
1310 | returned.\r |
1311 | \r |
1312 | @param Operand A 64-bit unsigned value.\r |
1313 | \r |
1314 | @return The byte swaped Operand.\r |
1315 | \r |
1316 | **/\r |
1317 | UINT64\r |
1318 | EFIAPI\r |
1319 | SwapBytes64 (\r |
1320 | IN UINT64 Value\r |
1321 | );\r |
1322 | \r |
1323 | /**\r |
1324 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r |
1325 | generates a 64-bit unsigned result.\r |
1326 | \r |
1327 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r |
1328 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r |
1329 | bit unsigned result is returned.\r |
1330 | \r |
1331 | If the result overflows, then ASSERT().\r |
1332 | \r |
1333 | @param Multiplicand A 64-bit unsigned value.\r |
1334 | @param Multiplier A 32-bit unsigned value.\r |
1335 | \r |
1336 | @return Multiplicand * Multiplier\r |
1337 | \r |
1338 | **/\r |
1339 | UINT64\r |
1340 | EFIAPI\r |
1341 | MultU64x32 (\r |
1342 | IN UINT64 Multiplicand,\r |
1343 | IN UINT32 Multiplier\r |
1344 | );\r |
1345 | \r |
1346 | /**\r |
1347 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r |
1348 | generates a 64-bit unsigned result.\r |
1349 | \r |
1350 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r |
1351 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r |
1352 | bit unsigned result is returned.\r |
1353 | \r |
1354 | If the result overflows, then ASSERT().\r |
1355 | \r |
1356 | @param Multiplicand A 64-bit unsigned value.\r |
1357 | @param Multiplier A 64-bit unsigned value.\r |
1358 | \r |
1359 | @return Multiplicand * Multiplier\r |
1360 | \r |
1361 | **/\r |
1362 | UINT64\r |
1363 | EFIAPI\r |
1364 | MultU64x64 (\r |
1365 | IN UINT64 Multiplicand,\r |
1366 | IN UINT64 Multiplier\r |
1367 | );\r |
1368 | \r |
1369 | /**\r |
1370 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r |
1371 | 64-bit signed result.\r |
1372 | \r |
1373 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r |
1374 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r |
1375 | signed result is returned.\r |
1376 | \r |
1377 | If the result overflows, then ASSERT().\r |
1378 | \r |
1379 | @param Multiplicand A 64-bit signed value.\r |
1380 | @param Multiplier A 64-bit signed value.\r |
1381 | \r |
1382 | @return Multiplicand * Multiplier\r |
1383 | \r |
1384 | **/\r |
1385 | INT64\r |
1386 | EFIAPI\r |
1387 | MultS64x64 (\r |
1388 | IN INT64 Multiplicand,\r |
1389 | IN INT64 Multiplier\r |
1390 | );\r |
1391 | \r |
1392 | /**\r |
1393 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r |
1394 | a 64-bit unsigned result.\r |
1395 | \r |
1396 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r |
1397 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r |
1398 | function returns the 64-bit unsigned quotient.\r |
1399 | \r |
1400 | If Divisor is 0, then ASSERT().\r |
1401 | \r |
1402 | @param Dividend A 64-bit unsigned value.\r |
1403 | @param Divisor A 32-bit unsigned value.\r |
1404 | \r |
1405 | @return Dividend / Divisor\r |
1406 | \r |
1407 | **/\r |
1408 | UINT64\r |
1409 | EFIAPI\r |
1410 | DivU64x32 (\r |
1411 | IN UINT64 Dividend,\r |
1412 | IN UINT32 Divisor\r |
1413 | );\r |
1414 | \r |
1415 | /**\r |
1416 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r |
1417 | a 32-bit unsigned remainder.\r |
1418 | \r |
1419 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r |
1420 | unsigned value Divisor and generates a 32-bit remainder. This function\r |
1421 | returns the 32-bit unsigned remainder.\r |
1422 | \r |
1423 | If Divisor is 0, then ASSERT().\r |
1424 | \r |
1425 | @param Dividend A 64-bit unsigned value.\r |
1426 | @param Divisor A 32-bit unsigned value.\r |
1427 | \r |
1428 | @return Dividend % Divisor\r |
1429 | \r |
1430 | **/\r |
1431 | UINT32\r |
1432 | EFIAPI\r |
1433 | ModU64x32 (\r |
1434 | IN UINT64 Dividend,\r |
1435 | IN UINT32 Divisor\r |
1436 | );\r |
1437 | \r |
1438 | /**\r |
1439 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r |
1440 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r |
1441 | \r |
1442 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r |
1443 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r |
1444 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r |
1445 | This function returns the 64-bit unsigned quotient.\r |
1446 | \r |
1447 | If Divisor is 0, then ASSERT().\r |
1448 | \r |
1449 | @param Dividend A 64-bit unsigned value.\r |
1450 | @param Divisor A 32-bit unsigned value.\r |
1451 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r |
1452 | optional and may be NULL.\r |
1453 | \r |
1454 | @return Dividend / Divisor\r |
1455 | \r |
1456 | **/\r |
1457 | UINT64\r |
1458 | EFIAPI\r |
1459 | DivU64x32Remainder (\r |
1460 | IN UINT64 Dividend,\r |
1461 | IN UINT32 Divisor,\r |
1462 | OUT UINT32 *Remainder OPTIONAL\r |
1463 | );\r |
1464 | \r |
1465 | /**\r |
1466 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r |
1467 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r |
1468 | \r |
1469 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r |
1470 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r |
1471 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r |
1472 | This function returns the 64-bit unsigned quotient.\r |
1473 | \r |
1474 | If Divisor is 0, then ASSERT().\r |
1475 | \r |
1476 | @param Dividend A 64-bit unsigned value.\r |
1477 | @param Divisor A 64-bit unsigned value.\r |
1478 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r |
1479 | optional and may be NULL.\r |
1480 | \r |
1481 | @return Dividend / Divisor\r |
1482 | \r |
1483 | **/\r |
1484 | UINT64\r |
1485 | EFIAPI\r |
1486 | DivU64x64Remainder (\r |
1487 | IN UINT64 Dividend,\r |
1488 | IN UINT64 Divisor,\r |
1489 | OUT UINT64 *Remainder OPTIONAL\r |
1490 | );\r |
1491 | \r |
1492 | /**\r |
1493 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r |
1494 | 64-bit signed result and a optional 64-bit signed remainder.\r |
1495 | \r |
1496 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r |
1497 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r |
1498 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r |
1499 | function returns the 64-bit signed quotient.\r |
1500 | \r |
1501 | If Divisor is 0, then ASSERT().\r |
1502 | \r |
1503 | @param Dividend A 64-bit signed value.\r |
1504 | @param Divisor A 64-bit signed value.\r |
1505 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r |
1506 | optional and may be NULL.\r |
1507 | \r |
1508 | @return Dividend / Divisor\r |
1509 | \r |
1510 | **/\r |
1511 | INT64\r |
1512 | EFIAPI\r |
1513 | DivS64x64Remainder (\r |
1514 | IN INT64 Dividend,\r |
1515 | IN INT64 Divisor,\r |
1516 | OUT INT64 *Remainder OPTIONAL\r |
1517 | );\r |
1518 | \r |
1519 | /**\r |
1520 | Reads a 16-bit value from memory that may be unaligned.\r |
1521 | \r |
1522 | This function returns the 16-bit value pointed to by Buffer. The function\r |
1523 | guarantees that the read operation does not produce an alignment fault.\r |
1524 | \r |
1525 | If the Buffer is NULL, then ASSERT().\r |
1526 | \r |
1527 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
1528 | \r |
1529 | @return *Uint16\r |
1530 | \r |
1531 | **/\r |
1532 | UINT16\r |
1533 | EFIAPI\r |
1534 | ReadUnaligned16 (\r |
1535 | IN CONST UINT16 *Uint16\r |
1536 | );\r |
1537 | \r |
1538 | /**\r |
1539 | Writes a 16-bit value to memory that may be unaligned.\r |
1540 | \r |
1541 | This function writes the 16-bit value specified by Value to Buffer. Value is\r |
1542 | returned. The function guarantees that the write operation does not produce\r |
1543 | an alignment fault.\r |
1544 | \r |
1545 | If the Buffer is NULL, then ASSERT().\r |
1546 | \r |
1547 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
1548 | @param Value 16-bit value to write to Buffer.\r |
1549 | \r |
1550 | @return Value\r |
1551 | \r |
1552 | **/\r |
1553 | UINT16\r |
1554 | EFIAPI\r |
1555 | WriteUnaligned16 (\r |
1556 | OUT UINT16 *Uint16,\r |
1557 | IN UINT16 Value\r |
1558 | );\r |
1559 | \r |
1560 | /**\r |
1561 | Reads a 24-bit value from memory that may be unaligned.\r |
1562 | \r |
1563 | This function returns the 24-bit value pointed to by Buffer. The function\r |
1564 | guarantees that the read operation does not produce an alignment fault.\r |
1565 | \r |
1566 | If the Buffer is NULL, then ASSERT().\r |
1567 | \r |
1568 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r |
1569 | \r |
1570 | @return The value read.\r |
1571 | \r |
1572 | **/\r |
1573 | UINT32\r |
1574 | EFIAPI\r |
1575 | ReadUnaligned24 (\r |
1576 | IN CONST UINT32 *Buffer\r |
1577 | );\r |
1578 | \r |
1579 | /**\r |
1580 | Writes a 24-bit value to memory that may be unaligned.\r |
1581 | \r |
1582 | This function writes the 24-bit value specified by Value to Buffer. Value is\r |
1583 | returned. The function guarantees that the write operation does not produce\r |
1584 | an alignment fault.\r |
1585 | \r |
1586 | If the Buffer is NULL, then ASSERT().\r |
1587 | \r |
1588 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r |
1589 | @param Value 24-bit value to write to Buffer.\r |
1590 | \r |
1591 | @return The value written.\r |
1592 | \r |
1593 | **/\r |
1594 | UINT32\r |
1595 | EFIAPI\r |
1596 | WriteUnaligned24 (\r |
1597 | OUT UINT32 *Buffer,\r |
1598 | IN UINT32 Value\r |
1599 | );\r |
1600 | \r |
1601 | /**\r |
1602 | Reads a 32-bit value from memory that may be unaligned.\r |
1603 | \r |
1604 | This function returns the 32-bit value pointed to by Buffer. The function\r |
1605 | guarantees that the read operation does not produce an alignment fault.\r |
1606 | \r |
1607 | If the Buffer is NULL, then ASSERT().\r |
1608 | \r |
1609 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
1610 | \r |
1611 | @return *Uint32\r |
1612 | \r |
1613 | **/\r |
1614 | UINT32\r |
1615 | EFIAPI\r |
1616 | ReadUnaligned32 (\r |
1617 | IN CONST UINT32 *Uint32\r |
1618 | );\r |
1619 | \r |
1620 | /**\r |
1621 | Writes a 32-bit value to memory that may be unaligned.\r |
1622 | \r |
1623 | This function writes the 32-bit value specified by Value to Buffer. Value is\r |
1624 | returned. The function guarantees that the write operation does not produce\r |
1625 | an alignment fault.\r |
1626 | \r |
1627 | If the Buffer is NULL, then ASSERT().\r |
1628 | \r |
1629 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
1630 | @param Value 32-bit value to write to Buffer.\r |
1631 | \r |
1632 | @return Value\r |
1633 | \r |
1634 | **/\r |
1635 | UINT32\r |
1636 | EFIAPI\r |
1637 | WriteUnaligned32 (\r |
1638 | OUT UINT32 *Uint32,\r |
1639 | IN UINT32 Value\r |
1640 | );\r |
1641 | \r |
1642 | /**\r |
1643 | Reads a 64-bit value from memory that may be unaligned.\r |
1644 | \r |
1645 | This function returns the 64-bit value pointed to by Buffer. The function\r |
1646 | guarantees that the read operation does not produce an alignment fault.\r |
1647 | \r |
1648 | If the Buffer is NULL, then ASSERT().\r |
1649 | \r |
1650 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
1651 | \r |
1652 | @return *Uint64\r |
1653 | \r |
1654 | **/\r |
1655 | UINT64\r |
1656 | EFIAPI\r |
1657 | ReadUnaligned64 (\r |
1658 | IN CONST UINT64 *Uint64\r |
1659 | );\r |
1660 | \r |
1661 | /**\r |
1662 | Writes a 64-bit value to memory that may be unaligned.\r |
1663 | \r |
1664 | This function writes the 64-bit value specified by Value to Buffer. Value is\r |
1665 | returned. The function guarantees that the write operation does not produce\r |
1666 | an alignment fault.\r |
1667 | \r |
1668 | If the Buffer is NULL, then ASSERT().\r |
1669 | \r |
1670 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
1671 | @param Value 64-bit value to write to Buffer.\r |
1672 | \r |
1673 | @return Value\r |
1674 | \r |
1675 | **/\r |
1676 | UINT64\r |
1677 | EFIAPI\r |
1678 | WriteUnaligned64 (\r |
1679 | OUT UINT64 *Uint64,\r |
1680 | IN UINT64 Value\r |
1681 | );\r |
1682 | \r |
1683 | //\r |
1684 | // Bit Field Functions\r |
1685 | //\r |
1686 | \r |
1687 | /**\r |
1688 | Returns a bit field from an 8-bit value.\r |
1689 | \r |
1690 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
1691 | \r |
1692 | If 8-bit operations are not supported, then ASSERT().\r |
1693 | If StartBit is greater than 7, then ASSERT().\r |
1694 | If EndBit is greater than 7, then ASSERT().\r |
0ffa1286 |
1695 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1696 | \r |
1697 | @param Operand Operand on which to perform the bitfield operation.\r |
1698 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1699 | Range 0..7.\r |
1700 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1701 | Range 0..7.\r |
1702 | \r |
1703 | @return The bit field read.\r |
1704 | \r |
1705 | **/\r |
1706 | UINT8\r |
1707 | EFIAPI\r |
1708 | BitFieldRead8 (\r |
1709 | IN UINT8 Operand,\r |
1710 | IN UINTN StartBit,\r |
1711 | IN UINTN EndBit\r |
1712 | );\r |
1713 | \r |
1714 | /**\r |
1715 | Writes a bit field to an 8-bit value, and returns the result.\r |
1716 | \r |
1717 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
1718 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r |
1719 | returned.\r |
1720 | \r |
1721 | If 8-bit operations are not supported, then ASSERT().\r |
1722 | If StartBit is greater than 7, then ASSERT().\r |
1723 | If EndBit is greater than 7, then ASSERT().\r |
0ffa1286 |
1724 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1725 | \r |
1726 | @param Operand Operand on which to perform the bitfield operation.\r |
1727 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1728 | Range 0..7.\r |
1729 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1730 | Range 0..7.\r |
1731 | @param Value New value of the bit field.\r |
1732 | \r |
1733 | @return The new 8-bit value.\r |
1734 | \r |
1735 | **/\r |
1736 | UINT8\r |
1737 | EFIAPI\r |
1738 | BitFieldWrite8 (\r |
1739 | IN UINT8 Operand,\r |
1740 | IN UINTN StartBit,\r |
1741 | IN UINTN EndBit,\r |
1742 | IN UINT8 Value\r |
1743 | );\r |
1744 | \r |
1745 | /**\r |
1746 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r |
1747 | result.\r |
1748 | \r |
1749 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
1750 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
1751 | Operand are preserved. The new 8-bit value is returned.\r |
1752 | \r |
1753 | If 8-bit operations are not supported, then ASSERT().\r |
1754 | If StartBit is greater than 7, then ASSERT().\r |
1755 | If EndBit is greater than 7, then ASSERT().\r |
0ffa1286 |
1756 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1757 | \r |
1758 | @param Operand Operand on which to perform the bitfield operation.\r |
1759 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1760 | Range 0..7.\r |
1761 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1762 | Range 0..7.\r |
1763 | @param OrData The value to OR with the read value from the value\r |
1764 | \r |
1765 | @return The new 8-bit value.\r |
1766 | \r |
1767 | **/\r |
1768 | UINT8\r |
1769 | EFIAPI\r |
1770 | BitFieldOr8 (\r |
1771 | IN UINT8 Operand,\r |
1772 | IN UINTN StartBit,\r |
1773 | IN UINTN EndBit,\r |
1774 | IN UINT8 OrData\r |
1775 | );\r |
1776 | \r |
1777 | /**\r |
1778 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r |
1779 | the result.\r |
1780 | \r |
1781 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
1782 | in Operand and the value specified by AndData. All other bits in Operand are\r |
1783 | preserved. The new 8-bit value is returned.\r |
1784 | \r |
1785 | If 8-bit operations are not supported, then ASSERT().\r |
1786 | If StartBit is greater than 7, then ASSERT().\r |
1787 | If EndBit is greater than 7, then ASSERT().\r |
0ffa1286 |
1788 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1789 | \r |
1790 | @param Operand Operand on which to perform the bitfield operation.\r |
1791 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1792 | Range 0..7.\r |
1793 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1794 | Range 0..7.\r |
1795 | @param AndData The value to AND with the read value from the value.\r |
1796 | \r |
1797 | @return The new 8-bit value.\r |
1798 | \r |
1799 | **/\r |
1800 | UINT8\r |
1801 | EFIAPI\r |
1802 | BitFieldAnd8 (\r |
1803 | IN UINT8 Operand,\r |
1804 | IN UINTN StartBit,\r |
1805 | IN UINTN EndBit,\r |
1806 | IN UINT8 AndData\r |
1807 | );\r |
1808 | \r |
1809 | /**\r |
1810 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r |
1811 | bitwise OR, and returns the result.\r |
1812 | \r |
1813 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
1814 | in Operand and the value specified by AndData, followed by a bitwise\r |
1815 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
1816 | preserved. The new 8-bit value is returned.\r |
1817 | \r |
1818 | If 8-bit operations are not supported, then ASSERT().\r |
1819 | If StartBit is greater than 7, then ASSERT().\r |
1820 | If EndBit is greater than 7, then ASSERT().\r |
0ffa1286 |
1821 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1822 | \r |
1823 | @param Operand Operand on which to perform the bitfield operation.\r |
1824 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1825 | Range 0..7.\r |
1826 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1827 | Range 0..7.\r |
1828 | @param AndData The value to AND with the read value from the value.\r |
1829 | @param OrData The value to OR with the result of the AND operation.\r |
1830 | \r |
1831 | @return The new 8-bit value.\r |
1832 | \r |
1833 | **/\r |
1834 | UINT8\r |
1835 | EFIAPI\r |
1836 | BitFieldAndThenOr8 (\r |
1837 | IN UINT8 Operand,\r |
1838 | IN UINTN StartBit,\r |
1839 | IN UINTN EndBit,\r |
1840 | IN UINT8 AndData,\r |
1841 | IN UINT8 OrData\r |
1842 | );\r |
1843 | \r |
1844 | /**\r |
1845 | Returns a bit field from a 16-bit value.\r |
1846 | \r |
1847 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
1848 | \r |
1849 | If 16-bit operations are not supported, then ASSERT().\r |
1850 | If StartBit is greater than 15, then ASSERT().\r |
1851 | If EndBit is greater than 15, then ASSERT().\r |
0ffa1286 |
1852 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1853 | \r |
1854 | @param Operand Operand on which to perform the bitfield operation.\r |
1855 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1856 | Range 0..15.\r |
1857 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1858 | Range 0..15.\r |
1859 | \r |
1860 | @return The bit field read.\r |
1861 | \r |
1862 | **/\r |
1863 | UINT16\r |
1864 | EFIAPI\r |
1865 | BitFieldRead16 (\r |
1866 | IN UINT16 Operand,\r |
1867 | IN UINTN StartBit,\r |
1868 | IN UINTN EndBit\r |
1869 | );\r |
1870 | \r |
1871 | /**\r |
1872 | Writes a bit field to a 16-bit value, and returns the result.\r |
1873 | \r |
1874 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
1875 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r |
1876 | returned.\r |
1877 | \r |
1878 | If 16-bit operations are not supported, then ASSERT().\r |
1879 | If StartBit is greater than 15, then ASSERT().\r |
1880 | If EndBit is greater than 15, then ASSERT().\r |
0ffa1286 |
1881 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1882 | \r |
1883 | @param Operand Operand on which to perform the bitfield operation.\r |
1884 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1885 | Range 0..15.\r |
1886 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1887 | Range 0..15.\r |
1888 | @param Value New value of the bit field.\r |
1889 | \r |
1890 | @return The new 16-bit value.\r |
1891 | \r |
1892 | **/\r |
1893 | UINT16\r |
1894 | EFIAPI\r |
1895 | BitFieldWrite16 (\r |
1896 | IN UINT16 Operand,\r |
1897 | IN UINTN StartBit,\r |
1898 | IN UINTN EndBit,\r |
1899 | IN UINT16 Value\r |
1900 | );\r |
1901 | \r |
1902 | /**\r |
1903 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r |
1904 | result.\r |
1905 | \r |
1906 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
1907 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
1908 | Operand are preserved. The new 16-bit value is returned.\r |
1909 | \r |
1910 | If 16-bit operations are not supported, then ASSERT().\r |
1911 | If StartBit is greater than 15, then ASSERT().\r |
1912 | If EndBit is greater than 15, then ASSERT().\r |
0ffa1286 |
1913 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1914 | \r |
1915 | @param Operand Operand on which to perform the bitfield operation.\r |
1916 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1917 | Range 0..15.\r |
1918 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1919 | Range 0..15.\r |
1920 | @param OrData The value to OR with the read value from the value\r |
1921 | \r |
1922 | @return The new 16-bit value.\r |
1923 | \r |
1924 | **/\r |
1925 | UINT16\r |
1926 | EFIAPI\r |
1927 | BitFieldOr16 (\r |
1928 | IN UINT16 Operand,\r |
1929 | IN UINTN StartBit,\r |
1930 | IN UINTN EndBit,\r |
1931 | IN UINT16 OrData\r |
1932 | );\r |
1933 | \r |
1934 | /**\r |
1935 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r |
1936 | the result.\r |
1937 | \r |
1938 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
1939 | in Operand and the value specified by AndData. All other bits in Operand are\r |
1940 | preserved. The new 16-bit value is returned.\r |
1941 | \r |
1942 | If 16-bit operations are not supported, then ASSERT().\r |
1943 | If StartBit is greater than 15, then ASSERT().\r |
1944 | If EndBit is greater than 15, then ASSERT().\r |
0ffa1286 |
1945 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1946 | \r |
1947 | @param Operand Operand on which to perform the bitfield operation.\r |
1948 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1949 | Range 0..15.\r |
1950 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1951 | Range 0..15.\r |
1952 | @param AndData The value to AND with the read value from the value\r |
1953 | \r |
1954 | @return The new 16-bit value.\r |
1955 | \r |
1956 | **/\r |
1957 | UINT16\r |
1958 | EFIAPI\r |
1959 | BitFieldAnd16 (\r |
1960 | IN UINT16 Operand,\r |
1961 | IN UINTN StartBit,\r |
1962 | IN UINTN EndBit,\r |
1963 | IN UINT16 AndData\r |
1964 | );\r |
1965 | \r |
1966 | /**\r |
1967 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r |
1968 | bitwise OR, and returns the result.\r |
1969 | \r |
1970 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
1971 | in Operand and the value specified by AndData, followed by a bitwise\r |
1972 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
1973 | preserved. The new 16-bit value is returned.\r |
1974 | \r |
1975 | If 16-bit operations are not supported, then ASSERT().\r |
1976 | If StartBit is greater than 15, then ASSERT().\r |
1977 | If EndBit is greater than 15, then ASSERT().\r |
0ffa1286 |
1978 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
1979 | \r |
1980 | @param Operand Operand on which to perform the bitfield operation.\r |
1981 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
1982 | Range 0..15.\r |
1983 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
1984 | Range 0..15.\r |
1985 | @param AndData The value to AND with the read value from the value.\r |
1986 | @param OrData The value to OR with the result of the AND operation.\r |
1987 | \r |
1988 | @return The new 16-bit value.\r |
1989 | \r |
1990 | **/\r |
1991 | UINT16\r |
1992 | EFIAPI\r |
1993 | BitFieldAndThenOr16 (\r |
1994 | IN UINT16 Operand,\r |
1995 | IN UINTN StartBit,\r |
1996 | IN UINTN EndBit,\r |
1997 | IN UINT16 AndData,\r |
1998 | IN UINT16 OrData\r |
1999 | );\r |
2000 | \r |
2001 | /**\r |
2002 | Returns a bit field from a 32-bit value.\r |
2003 | \r |
2004 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
2005 | \r |
2006 | If 32-bit operations are not supported, then ASSERT().\r |
2007 | If StartBit is greater than 31, then ASSERT().\r |
2008 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
2009 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2010 | \r |
2011 | @param Operand Operand on which to perform the bitfield operation.\r |
2012 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2013 | Range 0..31.\r |
2014 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2015 | Range 0..31.\r |
2016 | \r |
2017 | @return The bit field read.\r |
2018 | \r |
2019 | **/\r |
2020 | UINT32\r |
2021 | EFIAPI\r |
2022 | BitFieldRead32 (\r |
2023 | IN UINT32 Operand,\r |
2024 | IN UINTN StartBit,\r |
2025 | IN UINTN EndBit\r |
2026 | );\r |
2027 | \r |
2028 | /**\r |
2029 | Writes a bit field to a 32-bit value, and returns the result.\r |
2030 | \r |
2031 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
2032 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r |
2033 | returned.\r |
2034 | \r |
2035 | If 32-bit operations are not supported, then ASSERT().\r |
2036 | If StartBit is greater than 31, then ASSERT().\r |
2037 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
2038 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2039 | \r |
2040 | @param Operand Operand on which to perform the bitfield operation.\r |
2041 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2042 | Range 0..31.\r |
2043 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2044 | Range 0..31.\r |
2045 | @param Value New value of the bit field.\r |
2046 | \r |
2047 | @return The new 32-bit value.\r |
2048 | \r |
2049 | **/\r |
2050 | UINT32\r |
2051 | EFIAPI\r |
2052 | BitFieldWrite32 (\r |
2053 | IN UINT32 Operand,\r |
2054 | IN UINTN StartBit,\r |
2055 | IN UINTN EndBit,\r |
2056 | IN UINT32 Value\r |
2057 | );\r |
2058 | \r |
2059 | /**\r |
2060 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r |
2061 | result.\r |
2062 | \r |
2063 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
2064 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2065 | Operand are preserved. The new 32-bit value is returned.\r |
2066 | \r |
2067 | If 32-bit operations are not supported, then ASSERT().\r |
2068 | If StartBit is greater than 31, then ASSERT().\r |
2069 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
2070 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2071 | \r |
2072 | @param Operand Operand on which to perform the bitfield operation.\r |
2073 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2074 | Range 0..31.\r |
2075 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2076 | Range 0..31.\r |
2077 | @param OrData The value to OR with the read value from the value\r |
2078 | \r |
2079 | @return The new 32-bit value.\r |
2080 | \r |
2081 | **/\r |
2082 | UINT32\r |
2083 | EFIAPI\r |
2084 | BitFieldOr32 (\r |
2085 | IN UINT32 Operand,\r |
2086 | IN UINTN StartBit,\r |
2087 | IN UINTN EndBit,\r |
2088 | IN UINT32 OrData\r |
2089 | );\r |
2090 | \r |
2091 | /**\r |
2092 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r |
2093 | the result.\r |
2094 | \r |
2095 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
2096 | in Operand and the value specified by AndData. All other bits in Operand are\r |
2097 | preserved. The new 32-bit value is returned.\r |
2098 | \r |
2099 | If 32-bit operations are not supported, then ASSERT().\r |
2100 | If StartBit is greater than 31, then ASSERT().\r |
2101 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
2102 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2103 | \r |
2104 | @param Operand Operand on which to perform the bitfield operation.\r |
2105 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2106 | Range 0..31.\r |
2107 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2108 | Range 0..31.\r |
2109 | @param AndData The value to AND with the read value from the value\r |
2110 | \r |
2111 | @return The new 32-bit value.\r |
2112 | \r |
2113 | **/\r |
2114 | UINT32\r |
2115 | EFIAPI\r |
2116 | BitFieldAnd32 (\r |
2117 | IN UINT32 Operand,\r |
2118 | IN UINTN StartBit,\r |
2119 | IN UINTN EndBit,\r |
2120 | IN UINT32 AndData\r |
2121 | );\r |
2122 | \r |
2123 | /**\r |
2124 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r |
2125 | bitwise OR, and returns the result.\r |
2126 | \r |
2127 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
2128 | in Operand and the value specified by AndData, followed by a bitwise\r |
2129 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
2130 | preserved. The new 32-bit value is returned.\r |
2131 | \r |
2132 | If 32-bit operations are not supported, then ASSERT().\r |
2133 | If StartBit is greater than 31, then ASSERT().\r |
2134 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
2135 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2136 | \r |
2137 | @param Operand Operand on which to perform the bitfield operation.\r |
2138 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2139 | Range 0..31.\r |
2140 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2141 | Range 0..31.\r |
2142 | @param AndData The value to AND with the read value from the value.\r |
2143 | @param OrData The value to OR with the result of the AND operation.\r |
2144 | \r |
2145 | @return The new 32-bit value.\r |
2146 | \r |
2147 | **/\r |
2148 | UINT32\r |
2149 | EFIAPI\r |
2150 | BitFieldAndThenOr32 (\r |
2151 | IN UINT32 Operand,\r |
2152 | IN UINTN StartBit,\r |
2153 | IN UINTN EndBit,\r |
2154 | IN UINT32 AndData,\r |
2155 | IN UINT32 OrData\r |
2156 | );\r |
2157 | \r |
2158 | /**\r |
2159 | Returns a bit field from a 64-bit value.\r |
2160 | \r |
2161 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r |
2162 | \r |
2163 | If 64-bit operations are not supported, then ASSERT().\r |
2164 | If StartBit is greater than 63, then ASSERT().\r |
2165 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
2166 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2167 | \r |
2168 | @param Operand Operand on which to perform the bitfield operation.\r |
2169 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2170 | Range 0..63.\r |
2171 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2172 | Range 0..63.\r |
2173 | \r |
2174 | @return The bit field read.\r |
2175 | \r |
2176 | **/\r |
2177 | UINT64\r |
2178 | EFIAPI\r |
2179 | BitFieldRead64 (\r |
2180 | IN UINT64 Operand,\r |
2181 | IN UINTN StartBit,\r |
2182 | IN UINTN EndBit\r |
2183 | );\r |
2184 | \r |
2185 | /**\r |
2186 | Writes a bit field to a 64-bit value, and returns the result.\r |
2187 | \r |
2188 | Writes Value to the bit field specified by the StartBit and the EndBit in\r |
2189 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r |
2190 | returned.\r |
2191 | \r |
2192 | If 64-bit operations are not supported, then ASSERT().\r |
2193 | If StartBit is greater than 63, then ASSERT().\r |
2194 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
2195 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2196 | \r |
2197 | @param Operand Operand on which to perform the bitfield operation.\r |
2198 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2199 | Range 0..63.\r |
2200 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2201 | Range 0..63.\r |
2202 | @param Value New value of the bit field.\r |
2203 | \r |
2204 | @return The new 64-bit value.\r |
2205 | \r |
2206 | **/\r |
2207 | UINT64\r |
2208 | EFIAPI\r |
2209 | BitFieldWrite64 (\r |
2210 | IN UINT64 Operand,\r |
2211 | IN UINTN StartBit,\r |
2212 | IN UINTN EndBit,\r |
2213 | IN UINT64 Value\r |
2214 | );\r |
2215 | \r |
2216 | /**\r |
2217 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r |
2218 | result.\r |
2219 | \r |
2220 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r |
2221 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2222 | Operand are preserved. The new 64-bit value is returned.\r |
2223 | \r |
2224 | If 64-bit operations are not supported, then ASSERT().\r |
2225 | If StartBit is greater than 63, then ASSERT().\r |
2226 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
2227 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2228 | \r |
2229 | @param Operand Operand on which to perform the bitfield operation.\r |
2230 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2231 | Range 0..63.\r |
2232 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2233 | Range 0..63.\r |
2234 | @param OrData The value to OR with the read value from the value\r |
2235 | \r |
2236 | @return The new 64-bit value.\r |
2237 | \r |
2238 | **/\r |
2239 | UINT64\r |
2240 | EFIAPI\r |
2241 | BitFieldOr64 (\r |
2242 | IN UINT64 Operand,\r |
2243 | IN UINTN StartBit,\r |
2244 | IN UINTN EndBit,\r |
2245 | IN UINT64 OrData\r |
2246 | );\r |
2247 | \r |
2248 | /**\r |
2249 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r |
2250 | the result.\r |
2251 | \r |
2252 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
2253 | in Operand and the value specified by AndData. All other bits in Operand are\r |
2254 | preserved. The new 64-bit value is returned.\r |
2255 | \r |
2256 | If 64-bit operations are not supported, then ASSERT().\r |
2257 | If StartBit is greater than 63, then ASSERT().\r |
2258 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
2259 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2260 | \r |
2261 | @param Operand Operand on which to perform the bitfield operation.\r |
2262 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2263 | Range 0..63.\r |
2264 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2265 | Range 0..63.\r |
2266 | @param AndData The value to AND with the read value from the value\r |
2267 | \r |
2268 | @return The new 64-bit value.\r |
2269 | \r |
2270 | **/\r |
2271 | UINT64\r |
2272 | EFIAPI\r |
2273 | BitFieldAnd64 (\r |
2274 | IN UINT64 Operand,\r |
2275 | IN UINTN StartBit,\r |
2276 | IN UINTN EndBit,\r |
2277 | IN UINT64 AndData\r |
2278 | );\r |
2279 | \r |
2280 | /**\r |
2281 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r |
2282 | bitwise OR, and returns the result.\r |
2283 | \r |
2284 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r |
2285 | in Operand and the value specified by AndData, followed by a bitwise\r |
2286 | inclusive OR with value specified by OrData. All other bits in Operand are\r |
2287 | preserved. The new 64-bit value is returned.\r |
2288 | \r |
2289 | If 64-bit operations are not supported, then ASSERT().\r |
2290 | If StartBit is greater than 63, then ASSERT().\r |
2291 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
2292 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
2293 | \r |
2294 | @param Operand Operand on which to perform the bitfield operation.\r |
2295 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
2296 | Range 0..63.\r |
2297 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
2298 | Range 0..63.\r |
2299 | @param AndData The value to AND with the read value from the value.\r |
2300 | @param OrData The value to OR with the result of the AND operation.\r |
2301 | \r |
2302 | @return The new 64-bit value.\r |
2303 | \r |
2304 | **/\r |
2305 | UINT64\r |
2306 | EFIAPI\r |
2307 | BitFieldAndThenOr64 (\r |
2308 | IN UINT64 Operand,\r |
2309 | IN UINTN StartBit,\r |
2310 | IN UINTN EndBit,\r |
2311 | IN UINT64 AndData,\r |
2312 | IN UINT64 OrData\r |
2313 | );\r |
2314 | \r |
2315 | //\r |
2316 | // Base Library Synchronization Functions\r |
2317 | //\r |
2318 | \r |
2319 | /**\r |
2320 | Retrieves the architecture specific spin lock alignment requirements for\r |
2321 | optimal spin lock performance.\r |
2322 | \r |
2323 | This function retrieves the spin lock alignment requirements for optimal\r |
2324 | performance on a given CPU architecture. The spin lock alignment must be a\r |
2325 | power of two and is returned by this function. If there are no alignment\r |
2326 | requirements, then 1 must be returned. The spin lock synchronization\r |
2327 | functions must function correctly if the spin lock size and alignment values\r |
2328 | returned by this function are not used at all. These values are hints to the\r |
2329 | consumers of the spin lock synchronization functions to obtain optimal spin\r |
2330 | lock performance.\r |
2331 | \r |
2332 | @return The architecture specific spin lock alignment.\r |
2333 | \r |
2334 | **/\r |
2335 | UINTN\r |
2336 | EFIAPI\r |
2337 | GetSpinLockProperties (\r |
2338 | VOID\r |
2339 | );\r |
2340 | \r |
2341 | /**\r |
2342 | Initializes a spin lock to the released state and returns the spin lock.\r |
2343 | \r |
2344 | This function initializes the spin lock specified by SpinLock to the released\r |
2345 | state, and returns SpinLock. Optimal performance can be achieved by calling\r |
2346 | GetSpinLockProperties() to determine the size and alignment requirements for\r |
2347 | SpinLock.\r |
2348 | \r |
2349 | If SpinLock is NULL, then ASSERT().\r |
2350 | \r |
2351 | @param SpinLock A pointer to the spin lock to initialize to the released\r |
2352 | state.\r |
2353 | \r |
2354 | @return SpinLock\r |
2355 | \r |
2356 | **/\r |
2357 | SPIN_LOCK *\r |
2358 | EFIAPI\r |
2359 | InitializeSpinLock (\r |
2360 | IN SPIN_LOCK *SpinLock\r |
2361 | );\r |
2362 | \r |
2363 | /**\r |
2364 | Waits until a spin lock can be placed in the acquired state.\r |
2365 | \r |
2366 | This function checks the state of the spin lock specified by SpinLock. If\r |
2367 | SpinLock is in the released state, then this function places SpinLock in the\r |
2368 | acquired state and returns SpinLock. Otherwise, this function waits\r |
2369 | indefinitely for the spin lock to be released, and then places it in the\r |
2370 | acquired state and returns SpinLock. All state transitions of SpinLock must\r |
2371 | be performed using MP safe mechanisms.\r |
2372 | \r |
2373 | If SpinLock is NULL, then ASSERT().\r |
2374 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r |
2375 | If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r |
2376 | PcdSpinLockTimeout microseconds, then ASSERT().\r |
2377 | \r |
2378 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r |
2379 | \r |
2380 | @return SpinLock\r |
2381 | \r |
2382 | **/\r |
2383 | SPIN_LOCK *\r |
2384 | EFIAPI\r |
2385 | AcquireSpinLock (\r |
2386 | IN SPIN_LOCK *SpinLock\r |
2387 | );\r |
2388 | \r |
2389 | /**\r |
2390 | Attempts to place a spin lock in the acquired state.\r |
2391 | \r |
2392 | This function checks the state of the spin lock specified by SpinLock. If\r |
2393 | SpinLock is in the released state, then this function places SpinLock in the\r |
2394 | acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r |
2395 | transitions of SpinLock must be performed using MP safe mechanisms.\r |
2396 | \r |
2397 | If SpinLock is NULL, then ASSERT().\r |
2398 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r |
2399 | \r |
2400 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r |
2401 | \r |
2402 | @retval TRUE SpinLock was placed in the acquired state.\r |
2403 | @retval FALSE SpinLock could not be acquired.\r |
2404 | \r |
2405 | **/\r |
2406 | BOOLEAN\r |
2407 | EFIAPI\r |
2408 | AcquireSpinLockOrFail (\r |
2409 | IN SPIN_LOCK *SpinLock\r |
2410 | );\r |
2411 | \r |
2412 | /**\r |
2413 | Releases a spin lock.\r |
2414 | \r |
2415 | This function places the spin lock specified by SpinLock in the release state\r |
2416 | and returns SpinLock.\r |
2417 | \r |
2418 | If SpinLock is NULL, then ASSERT().\r |
2419 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r |
2420 | \r |
2421 | @param SpinLock A pointer to the spin lock to release.\r |
2422 | \r |
2423 | @return SpinLock\r |
2424 | \r |
2425 | **/\r |
2426 | SPIN_LOCK *\r |
2427 | EFIAPI\r |
2428 | ReleaseSpinLock (\r |
2429 | IN SPIN_LOCK *SpinLock\r |
2430 | );\r |
2431 | \r |
2432 | /**\r |
2433 | Performs an atomic increment of an 32-bit unsigned integer.\r |
2434 | \r |
2435 | Performs an atomic increment of the 32-bit unsigned integer specified by\r |
2436 | Value and returns the incremented value. The increment operation must be\r |
2437 | performed using MP safe mechanisms. The state of the return value is not\r |
2438 | guaranteed to be MP safe.\r |
2439 | \r |
2440 | If Value is NULL, then ASSERT().\r |
2441 | \r |
2442 | @param Value A pointer to the 32-bit value to increment.\r |
2443 | \r |
2444 | @return The incremented value.\r |
2445 | \r |
2446 | **/\r |
2447 | UINT32\r |
2448 | EFIAPI\r |
2449 | InterlockedIncrement (\r |
2450 | IN UINT32 *Value\r |
2451 | );\r |
2452 | \r |
2453 | /**\r |
2454 | Performs an atomic decrement of an 32-bit unsigned integer.\r |
2455 | \r |
2456 | Performs an atomic decrement of the 32-bit unsigned integer specified by\r |
2457 | Value and returns the decremented value. The decrement operation must be\r |
2458 | performed using MP safe mechanisms. The state of the return value is not\r |
2459 | guaranteed to be MP safe.\r |
2460 | \r |
2461 | If Value is NULL, then ASSERT().\r |
2462 | \r |
2463 | @param Value A pointer to the 32-bit value to decrement.\r |
2464 | \r |
2465 | @return The decremented value.\r |
2466 | \r |
2467 | **/\r |
2468 | UINT32\r |
2469 | EFIAPI\r |
2470 | InterlockedDecrement (\r |
2471 | IN UINT32 *Value\r |
2472 | );\r |
2473 | \r |
2474 | /**\r |
2475 | Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r |
2476 | \r |
1ea5ca46 |
2477 | Performs an atomic compare exchange operation on the 32-bit unsigned integer\r |
2478 | specified by Value. If Value is equal to CompareValue, then Value is set to \r |
2479 | ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,\r |
2480 | then Value is returned. The compare exchange operation must be performed using \r |
2481 | MP safe mechanisms.\r |
2482 | \r |
2483 | If Value is NULL, then ASSERT().\r |
2484 | \r |
878ddf1f |
2485 | @param Value A pointer to the 32-bit value for the compare exchange\r |
2486 | operation.\r |
2487 | @param CompareValue 32-bit value used in compare operation.\r |
2488 | @param ExchangeValue 32-bit value used in exchange operation.\r |
2489 | \r |
2490 | @return The original *Value before exchange.\r |
2491 | \r |
2492 | **/\r |
2493 | UINT32\r |
2494 | EFIAPI\r |
2495 | InterlockedCompareExchange32 (\r |
0ffa1286 |
2496 | IN OUT UINT32 *Value,\r |
878ddf1f |
2497 | IN UINT32 CompareValue,\r |
2498 | IN UINT32 ExchangeValue\r |
2499 | );\r |
2500 | \r |
2501 | /**\r |
2502 | Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r |
2503 | \r |
1ea5ca46 |
2504 | Performs an atomic compare exchange operation on the 64-bit unsigned integer specified \r |
2505 | by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and \r |
2506 | CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. \r |
2507 | The compare exchange operation must be performed using MP safe mechanisms.\r |
2508 | \r |
2509 | If Value is NULL, then ASSERT().\r |
2510 | \r |
878ddf1f |
2511 | @param Value A pointer to the 64-bit value for the compare exchange\r |
2512 | operation.\r |
2513 | @param CompareValue 64-bit value used in compare operation.\r |
2514 | @param ExchangeValue 64-bit value used in exchange operation.\r |
2515 | \r |
2516 | @return The original *Value before exchange.\r |
2517 | \r |
2518 | **/\r |
2519 | UINT64\r |
2520 | EFIAPI\r |
2521 | InterlockedCompareExchange64 (\r |
0ffa1286 |
2522 | IN OUT UINT64 *Value,\r |
878ddf1f |
2523 | IN UINT64 CompareValue,\r |
2524 | IN UINT64 ExchangeValue\r |
2525 | );\r |
2526 | \r |
2527 | /**\r |
2528 | Performs an atomic compare exchange operation on a pointer value.\r |
2529 | \r |
2530 | Performs an atomic compare exchange operation on the pointer value specified\r |
2531 | by Value. If Value is equal to CompareValue, then Value is set to\r |
2532 | ExchangeValue and CompareValue is returned. If Value is not equal to\r |
2533 | CompareValue, then Value is returned. The compare exchange operation must be\r |
2534 | performed using MP safe mechanisms.\r |
2535 | \r |
2536 | If Value is NULL, then ASSERT().\r |
2537 | \r |
2538 | @param Value A pointer to the pointer value for the compare exchange\r |
2539 | operation.\r |
2540 | @param CompareValue Pointer value used in compare operation.\r |
2541 | @param ExchangeValue Pointer value used in exchange operation.\r |
2542 | \r |
2543 | **/\r |
2544 | VOID *\r |
2545 | EFIAPI\r |
2546 | InterlockedCompareExchangePointer (\r |
0ffa1286 |
2547 | IN OUT VOID **Value,\r |
878ddf1f |
2548 | IN VOID *CompareValue,\r |
2549 | IN VOID *ExchangeValue\r |
2550 | );\r |
2551 | \r |
2552 | //\r |
2553 | // Base Library CPU Functions\r |
2554 | //\r |
2555 | typedef\r |
2556 | VOID\r |
2557 | (EFIAPI *SWITCH_STACK_ENTRY_POINT) (\r |
2558 | IN VOID *Context1, OPTIONAL\r |
2559 | IN VOID *Context2 OPTIONAL\r |
2560 | );\r |
2561 | \r |
2562 | /**\r |
2563 | Used to serialize load and store operations.\r |
2564 | \r |
2565 | All loads and stores that proceed calls to this function are guaranteed to be\r |
2566 | globally visible when this function returns.\r |
2567 | \r |
2568 | **/\r |
2569 | VOID\r |
2570 | EFIAPI\r |
2571 | MemoryFence (\r |
2572 | VOID\r |
2573 | );\r |
2574 | \r |
2575 | /**\r |
2576 | Saves the current CPU context that can be restored with a call to LongJump()\r |
2577 | and returns 0.\r |
2578 | \r |
2579 | Saves the current CPU context in the buffer specified by JumpBuffer and\r |
2580 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r |
2581 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r |
2582 | \r |
2583 | If JumpBuffer is NULL, then ASSERT().\r |
1ea5ca46 |
2584 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
878ddf1f |
2585 | \r |
2586 | @param JumpBuffer A pointer to CPU context buffer.\r |
2587 | \r |
2588 | @retval 0 Indicates a return from SetJump().\r |
2589 | \r |
2590 | **/\r |
2591 | UINTN\r |
2592 | EFIAPI\r |
2593 | SetJump (\r |
2594 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r |
2595 | );\r |
2596 | \r |
2597 | /**\r |
2598 | Restores the CPU context that was saved with SetJump().\r |
2599 | \r |
2600 | Restores the CPU context from the buffer specified by JumpBuffer. This\r |
2601 | function never returns to the caller. Instead is resumes execution based on\r |
2602 | the state of JumpBuffer.\r |
2603 | \r |
2604 | If JumpBuffer is NULL, then ASSERT().\r |
1ea5ca46 |
2605 | For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
878ddf1f |
2606 | If Value is 0, then ASSERT().\r |
2607 | \r |
2608 | @param JumpBuffer A pointer to CPU context buffer.\r |
2609 | @param Value The value to return when the SetJump() context is\r |
2610 | restored and must be non-zero.\r |
2611 | \r |
2612 | **/\r |
2613 | VOID\r |
2614 | EFIAPI\r |
2615 | LongJump (\r |
2616 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r |
2617 | IN UINTN Value\r |
2618 | );\r |
2619 | \r |
2620 | /**\r |
2621 | Enables CPU interrupts.\r |
2622 | \r |
2623 | Enables CPU interrupts.\r |
2624 | \r |
2625 | **/\r |
2626 | VOID\r |
2627 | EFIAPI\r |
2628 | EnableInterrupts (\r |
2629 | VOID\r |
2630 | );\r |
2631 | \r |
2632 | /**\r |
2633 | Disables CPU interrupts.\r |
2634 | \r |
2635 | Disables CPU interrupts.\r |
2636 | \r |
2637 | **/\r |
2638 | VOID\r |
2639 | EFIAPI\r |
2640 | DisableInterrupts (\r |
2641 | VOID\r |
2642 | );\r |
2643 | \r |
2644 | /**\r |
2645 | Disables CPU interrupts and returns the interrupt state prior to the disable\r |
2646 | operation.\r |
2647 | \r |
2648 | Disables CPU interrupts and returns the interrupt state prior to the disable\r |
2649 | operation.\r |
2650 | \r |
2651 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
2652 | @retval FALSE CPU interrupts were disabled on entry to this call.\r |
2653 | \r |
2654 | **/\r |
2655 | BOOLEAN\r |
2656 | EFIAPI\r |
2657 | SaveAndDisableInterrupts (\r |
2658 | VOID\r |
2659 | );\r |
2660 | \r |
2661 | /**\r |
2662 | Enables CPU interrupts for the smallest window required to capture any\r |
2663 | pending interrupts.\r |
2664 | \r |
2665 | Enables CPU interrupts for the smallest window required to capture any\r |
2666 | pending interrupts.\r |
2667 | \r |
2668 | **/\r |
2669 | VOID\r |
2670 | EFIAPI\r |
2671 | EnableDisableInterrupts (\r |
2672 | VOID\r |
2673 | );\r |
2674 | \r |
2675 | /**\r |
2676 | Retrieves the current CPU interrupt state.\r |
2677 | \r |
2678 | Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r |
2679 | currently enabled. Otherwise returns FALSE.\r |
2680 | \r |
2681 | @retval TRUE CPU interrupts are enabled.\r |
2682 | @retval FALSE CPU interrupts are disabled.\r |
2683 | \r |
2684 | **/\r |
2685 | BOOLEAN\r |
2686 | EFIAPI\r |
2687 | GetInterruptState (\r |
2688 | VOID\r |
2689 | );\r |
2690 | \r |
2691 | /**\r |
2692 | Set the current CPU interrupt state.\r |
2693 | \r |
2694 | Sets the current CPU interrupt state to the state specified by\r |
2695 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r |
2696 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r |
2697 | returned.\r |
2698 | \r |
2699 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r |
2700 | interrupts should be disabled.\r |
2701 | \r |
2702 | @return InterruptState\r |
2703 | \r |
2704 | **/\r |
2705 | BOOLEAN\r |
2706 | EFIAPI\r |
2707 | SetInterruptState (\r |
2708 | IN BOOLEAN InterruptState\r |
2709 | );\r |
2710 | \r |
2711 | /**\r |
2712 | Places the CPU in a sleep state until an interrupt is received.\r |
2713 | \r |
2714 | Places the CPU in a sleep state until an interrupt is received. If interrupts\r |
2715 | are disabled prior to calling this function, then the CPU will be placed in a\r |
2716 | sleep state indefinitely.\r |
2717 | \r |
2718 | **/\r |
2719 | VOID\r |
2720 | EFIAPI\r |
2721 | CpuSleep (\r |
2722 | VOID\r |
2723 | );\r |
2724 | \r |
2725 | /**\r |
2726 | Requests CPU to pause for a short period of time.\r |
2727 | \r |
2728 | Requests CPU to pause for a short period of time. Typically used in MP\r |
2729 | systems to prevent memory starvation while waiting for a spin lock.\r |
2730 | \r |
2731 | **/\r |
2732 | VOID\r |
2733 | EFIAPI\r |
2734 | CpuPause (\r |
2735 | VOID\r |
2736 | );\r |
2737 | \r |
2738 | /**\r |
2739 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r |
2740 | \r |
2741 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r |
2742 | \r |
2743 | **/\r |
2744 | VOID\r |
2745 | EFIAPI\r |
2746 | CpuFlushTlb (\r |
2747 | VOID\r |
2748 | );\r |
2749 | \r |
2750 | /**\r |
2751 | Transfers control to a function starting with a new stack.\r |
2752 | \r |
2753 | Transfers control to the function specified by EntryPoint using the new stack\r |
2754 | specified by NewStack and passing in the parameters specified by Context1 and\r |
2755 | Context2. Context1 and Context2 are optional and may be NULL. The function\r |
2756 | EntryPoint must never return.\r |
2757 | \r |
2758 | If EntryPoint is NULL, then ASSERT().\r |
2759 | If NewStack is NULL, then ASSERT().\r |
2760 | \r |
2761 | @param EntryPoint A pointer to function to call with the new stack.\r |
2762 | @param Context1 A pointer to the context to pass into the EntryPoint\r |
2763 | function.\r |
2764 | @param Context2 A pointer to the context to pass into the EntryPoint\r |
2765 | function.\r |
2766 | @param NewStack A pointer to the new stack to use for the EntryPoint\r |
2767 | function.\r |
2768 | \r |
2769 | **/\r |
2770 | VOID\r |
2771 | EFIAPI\r |
2772 | SwitchStack (\r |
2773 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r |
2774 | IN VOID *Context1, OPTIONAL\r |
2775 | IN VOID *Context2, OPTIONAL\r |
2776 | IN VOID *NewStack\r |
2777 | );\r |
2778 | \r |
2779 | /**\r |
2780 | Generates a breakpoint on the CPU.\r |
2781 | \r |
2782 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r |
2783 | that code can resume normal execution after the breakpoint.\r |
2784 | \r |
2785 | **/\r |
2786 | VOID\r |
2787 | EFIAPI\r |
2788 | CpuBreakpoint (\r |
2789 | VOID\r |
2790 | );\r |
2791 | \r |
2792 | /**\r |
2793 | Executes an infinite loop.\r |
2794 | \r |
2795 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r |
2796 | past the loop and the code that follows the loop must execute properly. This\r |
2797 | implies that the infinite loop must not cause the code that follow it to be\r |
2798 | optimized away.\r |
2799 | \r |
2800 | **/\r |
2801 | VOID\r |
2802 | EFIAPI\r |
2803 | CpuDeadLoop (\r |
2804 | VOID\r |
2805 | );\r |
2806 | \r |
2807 | //\r |
2808 | // IA32 and X64 Specific Functions\r |
2809 | //\r |
2810 | //\r |
2811 | // Byte packed structure for 16-bit Real Mode EFLAGS\r |
2812 | //\r |
2813 | typedef union {\r |
2814 | struct {\r |
2815 | UINT32 CF:1; // Carry Flag\r |
2816 | UINT32 Reserved_0:1; // Reserved\r |
2817 | UINT32 PF:1; // Parity Flag\r |
2818 | UINT32 Reserved_1:1; // Reserved\r |
2819 | UINT32 AF:1; // Auxiliary Carry Flag\r |
2820 | UINT32 Reserved_2:1; // Reserved\r |
2821 | UINT32 ZF:1; // Zero Flag\r |
2822 | UINT32 SF:1; // Sign Flag\r |
2823 | UINT32 TF:1; // Trap Flag\r |
2824 | UINT32 IF:1; // Interrupt Enable Flag\r |
2825 | UINT32 DF:1; // Direction Flag\r |
2826 | UINT32 OF:1; // Overflow Flag\r |
2827 | UINT32 IOPL:2; // I/O Privilege Level\r |
2828 | UINT32 NT:1; // Nested Task\r |
2829 | UINT32 Reserved_3:1; // Reserved\r |
2830 | } Bits;\r |
2831 | UINT16 Uint16;\r |
2832 | } IA32_FLAGS16;\r |
2833 | \r |
2834 | //\r |
2835 | // Byte packed structure for EFLAGS/RFLAGS\r |
2836 | // 32-bits on IA-32\r |
2837 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r |
2838 | //\r |
2839 | typedef union {\r |
2840 | struct {\r |
2841 | UINT32 CF:1; // Carry Flag\r |
2842 | UINT32 Reserved_0:1; // Reserved\r |
2843 | UINT32 PF:1; // Parity Flag\r |
2844 | UINT32 Reserved_1:1; // Reserved\r |
2845 | UINT32 AF:1; // Auxiliary Carry Flag\r |
2846 | UINT32 Reserved_2:1; // Reserved\r |
2847 | UINT32 ZF:1; // Zero Flag\r |
2848 | UINT32 SF:1; // Sign Flag\r |
2849 | UINT32 TF:1; // Trap Flag\r |
2850 | UINT32 IF:1; // Interrupt Enable Flag\r |
2851 | UINT32 DF:1; // Direction Flag\r |
2852 | UINT32 OF:1; // Overflow Flag\r |
2853 | UINT32 IOPL:2; // I/O Privilege Level\r |
2854 | UINT32 NT:1; // Nested Task\r |
2855 | UINT32 Reserved_3:1; // Reserved\r |
2856 | UINT32 RF:1; // Resume Flag\r |
2857 | UINT32 VM:1; // Virtual 8086 Mode\r |
2858 | UINT32 AC:1; // Alignment Check\r |
2859 | UINT32 VIF:1; // Virtual Interrupt Flag\r |
2860 | UINT32 VIP:1; // Virtual Interrupt Pending\r |
2861 | UINT32 ID:1; // ID Flag\r |
2862 | UINT32 Reserved_4:10; // Reserved\r |
2863 | } Bits;\r |
2864 | UINTN UintN;\r |
2865 | } IA32_EFLAGS32;\r |
2866 | \r |
2867 | //\r |
2868 | // Byte packed structure for Control Register 0 (CR0)\r |
2869 | // 32-bits on IA-32\r |
2870 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r |
2871 | //\r |
2872 | typedef union {\r |
2873 | struct {\r |
2874 | UINT32 PE:1; // Protection Enable\r |
2875 | UINT32 MP:1; // Monitor Coprocessor\r |
2876 | UINT32 EM:1; // Emulation\r |
2877 | UINT32 TS:1; // Task Switched\r |
2878 | UINT32 ET:1; // Extension Type\r |
2879 | UINT32 NE:1; // Numeric Error\r |
2880 | UINT32 Reserved_0:10; // Reserved\r |
2881 | UINT32 WP:1; // Write Protect\r |
2882 | UINT32 Reserved_1:1; // Reserved\r |
2883 | UINT32 AM:1; // Alignment Mask\r |
2884 | UINT32 Reserved_2:10; // Reserved\r |
2885 | UINT32 NW:1; // Mot Write-through\r |
2886 | UINT32 CD:1; // Cache Disable\r |
2887 | UINT32 PG:1; // Paging\r |
2888 | } Bits;\r |
2889 | UINTN UintN;\r |
2890 | } IA32_CR0;\r |
2891 | \r |
2892 | //\r |
2893 | // Byte packed structure for Control Register 4 (CR4)\r |
2894 | // 32-bits on IA-32\r |
2895 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r |
2896 | //\r |
2897 | typedef union {\r |
2898 | struct {\r |
2899 | UINT32 VME:1; // Virtual-8086 Mode Extensions\r |
2900 | UINT32 PVI:1; // Protected-Mode Virtual Interrupts\r |
2901 | UINT32 TSD:1; // Time Stamp Disable\r |
2902 | UINT32 DE:1; // Debugging Extensions\r |
2903 | UINT32 PSE:1; // Page Size Extensions\r |
2904 | UINT32 PAE:1; // Physical Address Extension\r |
2905 | UINT32 MCE:1; // Machine Check Enable\r |
2906 | UINT32 PGE:1; // Page Global Enable\r |
2907 | UINT32 PCE:1; // Performance Monitoring Counter\r |
2908 | // Enable\r |
2909 | UINT32 OSFXSR:1; // Operating System Support for\r |
2910 | // FXSAVE and FXRSTOR instructions\r |
2911 | UINT32 OSXMMEXCPT:1; // Operating System Support for\r |
2912 | // Unmasked SIMD Floating Point\r |
2913 | // Exceptions\r |
2914 | UINT32 Reserved_0:2; // Reserved\r |
2915 | UINT32 VMXE:1; // VMX Enable\r |
2916 | UINT32 Reserved_1:18; // Reseved\r |
2917 | } Bits;\r |
2918 | UINTN UintN;\r |
2919 | } IA32_CR4;\r |
2920 | \r |
2921 | //\r |
2922 | // Byte packed structure for an IDTR, GDTR, LDTR descriptor\r |
4cbd2175 |
2923 | /// @bug How to make this structure byte-packed in a compiler independent way?\r |
878ddf1f |
2924 | //\r |
db8f40e2 |
2925 | #pragma pack (1)\r |
878ddf1f |
2926 | typedef struct {\r |
2927 | UINT16 Limit;\r |
2928 | UINTN Base;\r |
2929 | } IA32_DESCRIPTOR;\r |
db8f40e2 |
2930 | #pragma pack ()\r |
878ddf1f |
2931 | \r |
2932 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r |
2933 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r |
2934 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r |
2935 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r |
2936 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r |
2937 | \r |
2938 | //\r |
2939 | // Byte packed structure for an Interrupt Gate Descriptor\r |
2940 | //\r |
2941 | typedef union {\r |
2942 | struct {\r |
2943 | UINT32 OffsetLow:16; // Offset bits 15..0\r |
2944 | UINT32 Selector:16; // Selector\r |
2945 | UINT32 Reserved_0:8; // Reserved\r |
2946 | UINT32 GateType:8; // Gate Type. See #defines above\r |
2947 | UINT32 OffsetHigh:16; // Offset bits 31..16\r |
2948 | } Bits;\r |
2949 | UINT64 Uint64;\r |
2950 | } IA32_IDT_GATE_DESCRIPTOR;\r |
2951 | \r |
2952 | //\r |
2953 | // Byte packed structure for an FP/SSE/SSE2 context\r |
2954 | //\r |
2955 | typedef struct {\r |
2956 | UINT8 Buffer[512];\r |
2957 | } IA32_FX_BUFFER;\r |
2958 | \r |
2959 | //\r |
2960 | // Structures for the 16-bit real mode thunks\r |
2961 | //\r |
2962 | typedef struct {\r |
2963 | UINT32 Reserved1;\r |
2964 | UINT32 Reserved2;\r |
2965 | UINT32 Reserved3;\r |
2966 | UINT32 Reserved4;\r |
2967 | UINT8 BL;\r |
2968 | UINT8 BH;\r |
2969 | UINT16 Reserved5;\r |
2970 | UINT8 DL;\r |
2971 | UINT8 DH;\r |
2972 | UINT16 Reserved6;\r |
2973 | UINT8 CL;\r |
2974 | UINT8 CH;\r |
2975 | UINT16 Reserved7;\r |
2976 | UINT8 AL;\r |
2977 | UINT8 AH;\r |
2978 | UINT16 Reserved8;\r |
2979 | } IA32_BYTE_REGS;\r |
2980 | \r |
2981 | typedef struct {\r |
2982 | UINT16 DI;\r |
2983 | UINT16 Reserved1;\r |
2984 | UINT16 SI;\r |
2985 | UINT16 Reserved2;\r |
2986 | UINT16 BP;\r |
2987 | UINT16 Reserved3;\r |
2988 | UINT16 SP;\r |
2989 | UINT16 Reserved4;\r |
2990 | UINT16 BX;\r |
2991 | UINT16 Reserved5;\r |
2992 | UINT16 DX;\r |
2993 | UINT16 Reserved6;\r |
2994 | UINT16 CX;\r |
2995 | UINT16 Reserved7;\r |
2996 | UINT16 AX;\r |
2997 | UINT16 Reserved8;\r |
2998 | } IA32_WORD_REGS;\r |
2999 | \r |
3000 | typedef struct {\r |
3001 | UINT32 EDI;\r |
3002 | UINT32 ESI;\r |
3003 | UINT32 EBP;\r |
3004 | UINT32 ESP;\r |
3005 | UINT32 EBX;\r |
3006 | UINT32 EDX;\r |
3007 | UINT32 ECX;\r |
3008 | UINT32 EAX;\r |
3009 | UINT16 DS;\r |
3010 | UINT16 ES;\r |
3011 | UINT16 FS;\r |
3012 | UINT16 GS;\r |
3013 | IA32_EFLAGS32 EFLAGS;\r |
3014 | UINT32 Eip;\r |
3015 | UINT16 CS;\r |
3016 | UINT16 SS;\r |
3017 | } IA32_DWORD_REGS;\r |
3018 | \r |
3019 | typedef union {\r |
3020 | IA32_DWORD_REGS E;\r |
3021 | IA32_WORD_REGS X;\r |
3022 | IA32_BYTE_REGS H;\r |
3023 | } IA32_REGISTER_SET;\r |
3024 | \r |
3025 | //\r |
3026 | // Byte packed structure for an 16-bit real mode thunks\r |
3027 | //\r |
3028 | typedef struct {\r |
97d92bda |
3029 | IA32_REGISTER_SET *RealModeState;\r |
878ddf1f |
3030 | VOID *RealModeBuffer;\r |
97d92bda |
3031 | UINT32 RealModeBufferSize;\r |
3032 | UINT32 ThunkAttributes;\r |
878ddf1f |
3033 | } THUNK_CONTEXT;\r |
3034 | \r |
97d92bda |
3035 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r |
3036 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r |
3037 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r |
3038 | \r |
878ddf1f |
3039 | /**\r |
3040 | Retrieves CPUID information.\r |
3041 | \r |
3042 | Executes the CPUID instruction with EAX set to the value specified by Index.\r |
3043 | This function always returns Index.\r |
3044 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r |
3045 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r |
3046 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r |
3047 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r |
3048 | This function is only available on IA-32 and X64.\r |
3049 | \r |
3050 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r |
3051 | instruction.\r |
3052 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r |
3053 | instruction. This is an optional parameter that may be NULL.\r |
3054 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r |
3055 | instruction. This is an optional parameter that may be NULL.\r |
3056 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r |
3057 | instruction. This is an optional parameter that may be NULL.\r |
3058 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r |
3059 | instruction. This is an optional parameter that may be NULL.\r |
3060 | \r |
3061 | @return Index\r |
3062 | \r |
3063 | **/\r |
3064 | UINT32\r |
3065 | EFIAPI\r |
3066 | AsmCpuid (\r |
3067 | IN UINT32 Index,\r |
3068 | OUT UINT32 *Eax, OPTIONAL\r |
3069 | OUT UINT32 *Ebx, OPTIONAL\r |
3070 | OUT UINT32 *Ecx, OPTIONAL\r |
3071 | OUT UINT32 *Edx OPTIONAL\r |
3072 | );\r |
3073 | \r |
dee4740a |
3074 | /**\r |
3075 | Retrieves CPUID information using an extended leaf identifier.\r |
3076 | \r |
3077 | Executes the CPUID instruction with EAX set to the value specified by Index\r |
3078 | and ECX set to the value specified by SubIndex. This function always returns\r |
3079 | Index. This function is only available on IA-32 and x64.\r |
3080 | \r |
3081 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r |
3082 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r |
3083 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r |
3084 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r |
3085 | \r |
3086 | @param Index The 32-bit value to load into EAX prior to invoking the\r |
3087 | CPUID instruction.\r |
3088 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r |
3089 | CPUID instruction.\r |
3090 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r |
3091 | instruction. This is an optional parameter that may be\r |
3092 | NULL.\r |
3093 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r |
3094 | instruction. This is an optional parameter that may be\r |
3095 | NULL.\r |
3096 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r |
3097 | instruction. This is an optional parameter that may be\r |
3098 | NULL.\r |
3099 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r |
3100 | instruction. This is an optional parameter that may be\r |
3101 | NULL.\r |
3102 | \r |
3103 | @return Index\r |
3104 | \r |
3105 | **/\r |
3106 | UINT32\r |
3107 | EFIAPI\r |
3108 | AsmCpuidEx (\r |
3109 | IN UINT32 Index,\r |
3110 | IN UINT32 SubIndex,\r |
3111 | OUT UINT32 *Eax, OPTIONAL\r |
3112 | OUT UINT32 *Ebx, OPTIONAL\r |
3113 | OUT UINT32 *Ecx, OPTIONAL\r |
3114 | OUT UINT32 *Edx OPTIONAL\r |
3115 | );\r |
3116 | \r |
878ddf1f |
3117 | /**\r |
3118 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r |
3119 | \r |
3120 | Reads and returns the lower 32-bits of the MSR specified by Index.\r |
3121 | No parameter checking is performed on Index, and some Index values may cause\r |
3122 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r |
3123 | caller must set up exception handlers to catch the exceptions. This function\r |
3124 | is only available on IA-32 and X64.\r |
3125 | \r |
3126 | @param Index The 32-bit MSR index to read.\r |
3127 | \r |
3128 | @return The lower 32 bits of the MSR identified by Index.\r |
3129 | \r |
3130 | **/\r |
3131 | UINT32\r |
3132 | EFIAPI\r |
3133 | AsmReadMsr32 (\r |
3134 | IN UINT32 Index\r |
3135 | );\r |
3136 | \r |
3137 | /**\r |
3138 | Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).\r |
3139 | \r |
3140 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r |
3141 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r |
3142 | the MSR is returned. No parameter checking is performed on Index or Value,\r |
3143 | and some of these may cause CPU exceptions. The caller must either guarantee\r |
3144 | that Index and Value are valid, or the caller must establish proper exception\r |
3145 | handlers. This function is only available on IA-32 and X64.\r |
3146 | \r |
3147 | @param Index The 32-bit MSR index to write.\r |
3148 | @param Value The 32-bit value to write to the MSR.\r |
3149 | \r |
3150 | @return Value\r |
3151 | \r |
3152 | **/\r |
3153 | UINT32\r |
3154 | EFIAPI\r |
3155 | AsmWriteMsr32 (\r |
3156 | IN UINT32 Index,\r |
3157 | IN UINT32 Value\r |
3158 | );\r |
3159 | \r |
3160 | /**\r |
3161 | Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r |
3162 | writes the result back to the 64-bit MSR.\r |
3163 | \r |
3164 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
3165 | between the lower 32-bits of the read result and the value specified by\r |
3166 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r |
3167 | 32-bits of the value written to the MSR is returned. No parameter checking is\r |
3168 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r |
3169 | caller must either guarantee that Index and OrData are valid, or the caller\r |
3170 | must establish proper exception handlers. This function is only available on\r |
3171 | IA-32 and X64.\r |
3172 | \r |
3173 | @param Index The 32-bit MSR index to write.\r |
3174 | @param OrData The value to OR with the read value from the MSR.\r |
3175 | \r |
3176 | @return The lower 32-bit value written to the MSR.\r |
3177 | \r |
3178 | **/\r |
3179 | UINT32\r |
3180 | EFIAPI\r |
3181 | AsmMsrOr32 (\r |
3182 | IN UINT32 Index,\r |
3183 | IN UINT32 OrData\r |
3184 | );\r |
3185 | \r |
3186 | /**\r |
3187 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r |
3188 | the result back to the 64-bit MSR.\r |
3189 | \r |
3190 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
3191 | lower 32-bits of the read result and the value specified by AndData, and\r |
3192 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r |
3193 | the value written to the MSR is returned. No parameter checking is performed\r |
3194 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r |
3195 | must either guarantee that Index and AndData are valid, or the caller must\r |
3196 | establish proper exception handlers. This function is only available on IA-32\r |
3197 | and X64.\r |
3198 | \r |
3199 | @param Index The 32-bit MSR index to write.\r |
3200 | @param AndData The value to AND with the read value from the MSR.\r |
3201 | \r |
3202 | @return The lower 32-bit value written to the MSR.\r |
3203 | \r |
3204 | **/\r |
3205 | UINT32\r |
3206 | EFIAPI\r |
3207 | AsmMsrAnd32 (\r |
3208 | IN UINT32 Index,\r |
3209 | IN UINT32 AndData\r |
3210 | );\r |
3211 | \r |
3212 | /**\r |
3213 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r |
3214 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
3215 | \r |
3216 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
3217 | lower 32-bits of the read result and the value specified by AndData\r |
3218 | preserving the upper 32-bits, performs a bitwise inclusive OR between the\r |
3219 | result of the AND operation and the value specified by OrData, and writes the\r |
3220 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r |
3221 | written to the MSR is returned. No parameter checking is performed on Index,\r |
3222 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r |
3223 | must either guarantee that Index, AndData, and OrData are valid, or the\r |
3224 | caller must establish proper exception handlers. This function is only\r |
3225 | available on IA-32 and X64.\r |
3226 | \r |
3227 | @param Index The 32-bit MSR index to write.\r |
3228 | @param AndData The value to AND with the read value from the MSR.\r |
3229 | @param OrData The value to OR with the result of the AND operation.\r |
3230 | \r |
3231 | @return The lower 32-bit value written to the MSR.\r |
3232 | \r |
3233 | **/\r |
3234 | UINT32\r |
3235 | EFIAPI\r |
3236 | AsmMsrAndThenOr32 (\r |
3237 | IN UINT32 Index,\r |
3238 | IN UINT32 AndData,\r |
3239 | IN UINT32 OrData\r |
3240 | );\r |
3241 | \r |
3242 | /**\r |
3243 | Reads a bit field of an MSR.\r |
3244 | \r |
3245 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r |
3246 | specified by the StartBit and the EndBit. The value of the bit field is\r |
3247 | returned. The caller must either guarantee that Index is valid, or the caller\r |
3248 | must set up exception handlers to catch the exceptions. This function is only\r |
3249 | available on IA-32 and X64.\r |
3250 | \r |
3251 | If StartBit is greater than 31, then ASSERT().\r |
3252 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
3253 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3254 | \r |
3255 | @param Index The 32-bit MSR index to read.\r |
3256 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3257 | Range 0..31.\r |
3258 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3259 | Range 0..31.\r |
3260 | \r |
3261 | @return The bit field read from the MSR.\r |
3262 | \r |
3263 | **/\r |
3264 | UINT32\r |
3265 | EFIAPI\r |
3266 | AsmMsrBitFieldRead32 (\r |
3267 | IN UINT32 Index,\r |
3268 | IN UINTN StartBit,\r |
3269 | IN UINTN EndBit\r |
3270 | );\r |
3271 | \r |
3272 | /**\r |
3273 | Writes a bit field to an MSR.\r |
3274 | \r |
3275 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
3276 | field is specified by the StartBit and the EndBit. All other bits in the\r |
3277 | destination MSR are preserved. The lower 32-bits of the MSR written is\r |
3278 | returned. Extra left bits in Value are stripped. The caller must either\r |
3279 | guarantee that Index and the data written is valid, or the caller must set up\r |
3280 | exception handlers to catch the exceptions. This function is only available\r |
3281 | on IA-32 and X64.\r |
3282 | \r |
3283 | If StartBit is greater than 31, then ASSERT().\r |
3284 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
3285 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3286 | \r |
3287 | @param Index The 32-bit MSR index to write.\r |
3288 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3289 | Range 0..31.\r |
3290 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3291 | Range 0..31.\r |
3292 | @param Value New value of the bit field.\r |
3293 | \r |
3294 | @return The lower 32-bit of the value written to the MSR.\r |
3295 | \r |
3296 | **/\r |
3297 | UINT32\r |
3298 | EFIAPI\r |
3299 | AsmMsrBitFieldWrite32 (\r |
3300 | IN UINT32 Index,\r |
3301 | IN UINTN StartBit,\r |
3302 | IN UINTN EndBit,\r |
3303 | IN UINT32 Value\r |
3304 | );\r |
3305 | \r |
3306 | /**\r |
3307 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r |
3308 | result back to the bit field in the 64-bit MSR.\r |
3309 | \r |
3310 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
3311 | between the read result and the value specified by OrData, and writes the\r |
3312 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r |
3313 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r |
3314 | caller must either guarantee that Index and the data written is valid, or\r |
3315 | the caller must set up exception handlers to catch the exceptions. This\r |
3316 | function is only available on IA-32 and X64.\r |
3317 | \r |
3318 | If StartBit is greater than 31, then ASSERT().\r |
3319 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
3320 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3321 | \r |
3322 | @param Index The 32-bit MSR index to write.\r |
3323 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3324 | Range 0..31.\r |
3325 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3326 | Range 0..31.\r |
3327 | @param OrData The value to OR with the read value from the MSR.\r |
3328 | \r |
3329 | @return The lower 32-bit of the value written to the MSR.\r |
3330 | \r |
3331 | **/\r |
3332 | UINT32\r |
3333 | EFIAPI\r |
3334 | AsmMsrBitFieldOr32 (\r |
3335 | IN UINT32 Index,\r |
3336 | IN UINTN StartBit,\r |
3337 | IN UINTN EndBit,\r |
3338 | IN UINT32 OrData\r |
3339 | );\r |
3340 | \r |
3341 | /**\r |
3342 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r |
3343 | result back to the bit field in the 64-bit MSR.\r |
3344 | \r |
3345 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
3346 | read result and the value specified by AndData, and writes the result to the\r |
3347 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r |
3348 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r |
3349 | either guarantee that Index and the data written is valid, or the caller must\r |
3350 | set up exception handlers to catch the exceptions. This function is only\r |
3351 | available on IA-32 and X64.\r |
3352 | \r |
3353 | If StartBit is greater than 31, then ASSERT().\r |
3354 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
3355 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3356 | \r |
3357 | @param Index The 32-bit MSR index to write.\r |
3358 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3359 | Range 0..31.\r |
3360 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3361 | Range 0..31.\r |
3362 | @param AndData The value to AND with the read value from the MSR.\r |
3363 | \r |
3364 | @return The lower 32-bit of the value written to the MSR.\r |
3365 | \r |
3366 | **/\r |
3367 | UINT32\r |
3368 | EFIAPI\r |
3369 | AsmMsrBitFieldAnd32 (\r |
3370 | IN UINT32 Index,\r |
3371 | IN UINTN StartBit,\r |
3372 | IN UINTN EndBit,\r |
3373 | IN UINT32 AndData\r |
3374 | );\r |
3375 | \r |
3376 | /**\r |
3377 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r |
3378 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
3379 | 64-bit MSR.\r |
3380 | \r |
3381 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r |
3382 | bitwise inclusive OR between the read result and the value specified by\r |
3383 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
3384 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r |
3385 | in both AndData and OrData are stripped. The caller must either guarantee\r |
3386 | that Index and the data written is valid, or the caller must set up exception\r |
3387 | handlers to catch the exceptions. This function is only available on IA-32\r |
3388 | and X64.\r |
3389 | \r |
3390 | If StartBit is greater than 31, then ASSERT().\r |
3391 | If EndBit is greater than 31, then ASSERT().\r |
0ffa1286 |
3392 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3393 | \r |
3394 | @param Index The 32-bit MSR index to write.\r |
3395 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3396 | Range 0..31.\r |
3397 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3398 | Range 0..31.\r |
3399 | @param AndData The value to AND with the read value from the MSR.\r |
3400 | @param OrData The value to OR with the result of the AND operation.\r |
3401 | \r |
3402 | @return The lower 32-bit of the value written to the MSR.\r |
3403 | \r |
3404 | **/\r |
3405 | UINT32\r |
3406 | EFIAPI\r |
3407 | AsmMsrBitFieldAndThenOr32 (\r |
3408 | IN UINT32 Index,\r |
3409 | IN UINTN StartBit,\r |
3410 | IN UINTN EndBit,\r |
3411 | IN UINT32 AndData,\r |
3412 | IN UINT32 OrData\r |
3413 | );\r |
3414 | \r |
3415 | /**\r |
3416 | Returns a 64-bit Machine Specific Register(MSR).\r |
3417 | \r |
3418 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r |
3419 | performed on Index, and some Index values may cause CPU exceptions. The\r |
3420 | caller must either guarantee that Index is valid, or the caller must set up\r |
3421 | exception handlers to catch the exceptions. This function is only available\r |
3422 | on IA-32 and X64.\r |
3423 | \r |
3424 | @param Index The 32-bit MSR index to read.\r |
3425 | \r |
3426 | @return The value of the MSR identified by Index.\r |
3427 | \r |
3428 | **/\r |
3429 | UINT64\r |
3430 | EFIAPI\r |
3431 | AsmReadMsr64 (\r |
3432 | IN UINT32 Index\r |
3433 | );\r |
3434 | \r |
3435 | /**\r |
3436 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r |
3437 | value.\r |
3438 | \r |
3439 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r |
3440 | 64-bit value written to the MSR is returned. No parameter checking is\r |
3441 | performed on Index or Value, and some of these may cause CPU exceptions. The\r |
3442 | caller must either guarantee that Index and Value are valid, or the caller\r |
3443 | must establish proper exception handlers. This function is only available on\r |
3444 | IA-32 and X64.\r |
3445 | \r |
3446 | @param Index The 32-bit MSR index to write.\r |
3447 | @param Value The 64-bit value to write to the MSR.\r |
3448 | \r |
3449 | @return Value\r |
3450 | \r |
3451 | **/\r |
3452 | UINT64\r |
3453 | EFIAPI\r |
3454 | AsmWriteMsr64 (\r |
3455 | IN UINT32 Index,\r |
3456 | IN UINT64 Value\r |
3457 | );\r |
3458 | \r |
3459 | /**\r |
3460 | Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r |
3461 | back to the 64-bit MSR.\r |
3462 | \r |
3463 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
3464 | between the read result and the value specified by OrData, and writes the\r |
3465 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r |
3466 | returned. No parameter checking is performed on Index or OrData, and some of\r |
3467 | these may cause CPU exceptions. The caller must either guarantee that Index\r |
3468 | and OrData are valid, or the caller must establish proper exception handlers.\r |
3469 | This function is only available on IA-32 and X64.\r |
3470 | \r |
3471 | @param Index The 32-bit MSR index to write.\r |
3472 | @param OrData The value to OR with the read value from the MSR.\r |
3473 | \r |
3474 | @return The value written back to the MSR.\r |
3475 | \r |
3476 | **/\r |
3477 | UINT64\r |
3478 | EFIAPI\r |
3479 | AsmMsrOr64 (\r |
3480 | IN UINT32 Index,\r |
3481 | IN UINT64 OrData\r |
3482 | );\r |
3483 | \r |
3484 | /**\r |
3485 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r |
3486 | 64-bit MSR.\r |
3487 | \r |
3488 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
3489 | read result and the value specified by OrData, and writes the result to the\r |
3490 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r |
3491 | parameter checking is performed on Index or OrData, and some of these may\r |
3492 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r |
3493 | are valid, or the caller must establish proper exception handlers. This\r |
3494 | function is only available on IA-32 and X64.\r |
3495 | \r |
3496 | @param Index The 32-bit MSR index to write.\r |
3497 | @param AndData The value to AND with the read value from the MSR.\r |
3498 | \r |
3499 | @return The value written back to the MSR.\r |
3500 | \r |
3501 | **/\r |
3502 | UINT64\r |
3503 | EFIAPI\r |
3504 | AsmMsrAnd64 (\r |
3505 | IN UINT32 Index,\r |
3506 | IN UINT64 AndData\r |
3507 | );\r |
3508 | \r |
3509 | /**\r |
3510 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r |
3511 | OR, and writes the result back to the 64-bit MSR.\r |
3512 | \r |
3513 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r |
3514 | result and the value specified by AndData, performs a bitwise inclusive OR\r |
3515 | between the result of the AND operation and the value specified by OrData,\r |
3516 | and writes the result to the 64-bit MSR specified by Index. The value written\r |
3517 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r |
3518 | or OrData, and some of these may cause CPU exceptions. The caller must either\r |
3519 | guarantee that Index, AndData, and OrData are valid, or the caller must\r |
3520 | establish proper exception handlers. This function is only available on IA-32\r |
3521 | and X64.\r |
3522 | \r |
3523 | @param Index The 32-bit MSR index to write.\r |
3524 | @param AndData The value to AND with the read value from the MSR.\r |
3525 | @param OrData The value to OR with the result of the AND operation.\r |
3526 | \r |
3527 | @return The value written back to the MSR.\r |
3528 | \r |
3529 | **/\r |
3530 | UINT64\r |
3531 | EFIAPI\r |
3532 | AsmMsrAndThenOr64 (\r |
3533 | IN UINT32 Index,\r |
3534 | IN UINT64 AndData,\r |
3535 | IN UINT64 OrData\r |
3536 | );\r |
3537 | \r |
3538 | /**\r |
3539 | Reads a bit field of an MSR.\r |
3540 | \r |
3541 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r |
3542 | StartBit and the EndBit. The value of the bit field is returned. The caller\r |
3543 | must either guarantee that Index is valid, or the caller must set up\r |
3544 | exception handlers to catch the exceptions. This function is only available\r |
3545 | on IA-32 and X64.\r |
3546 | \r |
3547 | If StartBit is greater than 63, then ASSERT().\r |
3548 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
3549 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3550 | \r |
3551 | @param Index The 32-bit MSR index to read.\r |
3552 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3553 | Range 0..63.\r |
3554 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3555 | Range 0..63.\r |
3556 | \r |
3557 | @return The value read from the MSR.\r |
3558 | \r |
3559 | **/\r |
3560 | UINT64\r |
3561 | EFIAPI\r |
3562 | AsmMsrBitFieldRead64 (\r |
3563 | IN UINT32 Index,\r |
3564 | IN UINTN StartBit,\r |
3565 | IN UINTN EndBit\r |
3566 | );\r |
3567 | \r |
3568 | /**\r |
3569 | Writes a bit field to an MSR.\r |
3570 | \r |
3571 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r |
3572 | the StartBit and the EndBit. All other bits in the destination MSR are\r |
3573 | preserved. The MSR written is returned. Extra left bits in Value are\r |
3574 | stripped. The caller must either guarantee that Index and the data written is\r |
3575 | valid, or the caller must set up exception handlers to catch the exceptions.\r |
3576 | This function is only available on IA-32 and X64.\r |
3577 | \r |
3578 | If StartBit is greater than 63, then ASSERT().\r |
3579 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
3580 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3581 | \r |
3582 | @param Index The 32-bit MSR index to write.\r |
3583 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3584 | Range 0..63.\r |
3585 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3586 | Range 0..63.\r |
3587 | @param Value New value of the bit field.\r |
3588 | \r |
3589 | @return The value written back to the MSR.\r |
3590 | \r |
3591 | **/\r |
3592 | UINT64\r |
3593 | EFIAPI\r |
3594 | AsmMsrBitFieldWrite64 (\r |
3595 | IN UINT32 Index,\r |
3596 | IN UINTN StartBit,\r |
3597 | IN UINTN EndBit,\r |
3598 | IN UINT64 Value\r |
3599 | );\r |
3600 | \r |
3601 | /**\r |
3602 | Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r |
3603 | writes the result back to the bit field in the 64-bit MSR.\r |
3604 | \r |
3605 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r |
3606 | between the read result and the value specified by OrData, and writes the\r |
3607 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r |
3608 | returned. Extra left bits in OrData are stripped. The caller must either\r |
3609 | guarantee that Index and the data written is valid, or the caller must set up\r |
3610 | exception handlers to catch the exceptions. This function is only available\r |
3611 | on IA-32 and X64.\r |
3612 | \r |
3613 | If StartBit is greater than 63, then ASSERT().\r |
3614 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
3615 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3616 | \r |
3617 | @param Index The 32-bit MSR index to write.\r |
3618 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3619 | Range 0..63.\r |
3620 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3621 | Range 0..63.\r |
3622 | @param OrData The value to OR with the read value from the bit field.\r |
3623 | \r |
3624 | @return The value written back to the MSR.\r |
3625 | \r |
3626 | **/\r |
3627 | UINT64\r |
3628 | EFIAPI\r |
3629 | AsmMsrBitFieldOr64 (\r |
3630 | IN UINT32 Index,\r |
3631 | IN UINTN StartBit,\r |
3632 | IN UINTN EndBit,\r |
3633 | IN UINT64 OrData\r |
3634 | );\r |
3635 | \r |
3636 | /**\r |
3637 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r |
3638 | result back to the bit field in the 64-bit MSR.\r |
3639 | \r |
3640 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r |
3641 | read result and the value specified by AndData, and writes the result to the\r |
3642 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r |
3643 | Extra left bits in AndData are stripped. The caller must either guarantee\r |
3644 | that Index and the data written is valid, or the caller must set up exception\r |
3645 | handlers to catch the exceptions. This function is only available on IA-32\r |
3646 | and X64.\r |
3647 | \r |
3648 | If StartBit is greater than 63, then ASSERT().\r |
3649 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
3650 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3651 | \r |
3652 | @param Index The 32-bit MSR index to write.\r |
3653 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3654 | Range 0..63.\r |
3655 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3656 | Range 0..63.\r |
3657 | @param AndData The value to AND with the read value from the bit field.\r |
3658 | \r |
3659 | @return The value written back to the MSR.\r |
3660 | \r |
3661 | **/\r |
3662 | UINT64\r |
3663 | EFIAPI\r |
3664 | AsmMsrBitFieldAnd64 (\r |
3665 | IN UINT32 Index,\r |
3666 | IN UINTN StartBit,\r |
3667 | IN UINTN EndBit,\r |
3668 | IN UINT64 AndData\r |
3669 | );\r |
3670 | \r |
3671 | /**\r |
3672 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r |
3673 | bitwise inclusive OR, and writes the result back to the bit field in the\r |
3674 | 64-bit MSR.\r |
3675 | \r |
3676 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r |
3677 | a bitwise inclusive OR between the read result and the value specified by\r |
3678 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
3679 | value written to the MSR is returned. Extra left bits in both AndData and\r |
3680 | OrData are stripped. The caller must either guarantee that Index and the data\r |
3681 | written is valid, or the caller must set up exception handlers to catch the\r |
3682 | exceptions. This function is only available on IA-32 and X64.\r |
3683 | \r |
3684 | If StartBit is greater than 63, then ASSERT().\r |
3685 | If EndBit is greater than 63, then ASSERT().\r |
0ffa1286 |
3686 | If EndBit is less than StartBit, then ASSERT().\r |
878ddf1f |
3687 | \r |
3688 | @param Index The 32-bit MSR index to write.\r |
3689 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
3690 | Range 0..63.\r |
3691 | @param EndBit The ordinal of the most significant bit in the bit field.\r |
3692 | Range 0..63.\r |
3693 | @param AndData The value to AND with the read value from the bit field.\r |
3694 | @param OrData The value to OR with the result of the AND operation.\r |
3695 | \r |
3696 | @return The value written back to the MSR.\r |
3697 | \r |
3698 | **/\r |
3699 | UINT64\r |
3700 | EFIAPI\r |
3701 | AsmMsrBitFieldAndThenOr64 (\r |
3702 | IN UINT32 Index,\r |
3703 | IN UINTN StartBit,\r |
3704 | IN UINTN EndBit,\r |
3705 | IN UINT64 AndData,\r |
3706 | IN UINT64 OrData\r |
3707 | );\r |
3708 | \r |
3709 | /**\r |
3710 | Reads the current value of the EFLAGS register.\r |
3711 | \r |
3712 | Reads and returns the current value of the EFLAGS register. This function is\r |
3713 | only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r |
3714 | 64-bit value on X64.\r |
3715 | \r |
3716 | @return EFLAGS on IA-32 or RFLAGS on X64.\r |
3717 | \r |
3718 | **/\r |
3719 | UINTN\r |
3720 | EFIAPI\r |
3721 | AsmReadEflags (\r |
3722 | VOID\r |
3723 | );\r |
3724 | \r |
3725 | /**\r |
3726 | Reads the current value of the Control Register 0 (CR0).\r |
3727 | \r |
3728 | Reads and returns the current value of CR0. This function is only available\r |
3729 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3730 | X64.\r |
3731 | \r |
3732 | @return The value of the Control Register 0 (CR0).\r |
3733 | \r |
3734 | **/\r |
3735 | UINTN\r |
3736 | EFIAPI\r |
3737 | AsmReadCr0 (\r |
3738 | VOID\r |
3739 | );\r |
3740 | \r |
3741 | /**\r |
3742 | Reads the current value of the Control Register 2 (CR2).\r |
3743 | \r |
3744 | Reads and returns the current value of CR2. This function is only available\r |
3745 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3746 | X64.\r |
3747 | \r |
3748 | @return The value of the Control Register 2 (CR2).\r |
3749 | \r |
3750 | **/\r |
3751 | UINTN\r |
3752 | EFIAPI\r |
3753 | AsmReadCr2 (\r |
3754 | VOID\r |
3755 | );\r |
3756 | \r |
3757 | /**\r |
3758 | Reads the current value of the Control Register 3 (CR3).\r |
3759 | \r |
3760 | Reads and returns the current value of CR3. This function is only available\r |
3761 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3762 | X64.\r |
3763 | \r |
3764 | @return The value of the Control Register 3 (CR3).\r |
3765 | \r |
3766 | **/\r |
3767 | UINTN\r |
3768 | EFIAPI\r |
3769 | AsmReadCr3 (\r |
3770 | VOID\r |
3771 | );\r |
3772 | \r |
3773 | /**\r |
3774 | Reads the current value of the Control Register 4 (CR4).\r |
3775 | \r |
3776 | Reads and returns the current value of CR4. This function is only available\r |
3777 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3778 | X64.\r |
3779 | \r |
3780 | @return The value of the Control Register 4 (CR4).\r |
3781 | \r |
3782 | **/\r |
3783 | UINTN\r |
3784 | EFIAPI\r |
3785 | AsmReadCr4 (\r |
3786 | VOID\r |
3787 | );\r |
3788 | \r |
3789 | /**\r |
3790 | Writes a value to Control Register 0 (CR0).\r |
3791 | \r |
3792 | Writes and returns a new value to CR0. This function is only available on\r |
3793 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
3794 | \r |
3795 | @param Cr0 The value to write to CR0.\r |
3796 | \r |
3797 | @return The value written to CR0.\r |
3798 | \r |
3799 | **/\r |
3800 | UINTN\r |
3801 | EFIAPI\r |
3802 | AsmWriteCr0 (\r |
3803 | UINTN Cr0\r |
3804 | );\r |
3805 | \r |
3806 | /**\r |
3807 | Writes a value to Control Register 2 (CR2).\r |
3808 | \r |
3809 | Writes and returns a new value to CR2. This function is only available on\r |
3810 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
3811 | \r |
3812 | @param Cr2 The value to write to CR2.\r |
3813 | \r |
3814 | @return The value written to CR2.\r |
3815 | \r |
3816 | **/\r |
3817 | UINTN\r |
3818 | EFIAPI\r |
3819 | AsmWriteCr2 (\r |
3820 | UINTN Cr2\r |
3821 | );\r |
3822 | \r |
3823 | /**\r |
3824 | Writes a value to Control Register 3 (CR3).\r |
3825 | \r |
3826 | Writes and returns a new value to CR3. This function is only available on\r |
3827 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
3828 | \r |
3829 | @param Cr3 The value to write to CR3.\r |
3830 | \r |
3831 | @return The value written to CR3.\r |
3832 | \r |
3833 | **/\r |
3834 | UINTN\r |
3835 | EFIAPI\r |
3836 | AsmWriteCr3 (\r |
3837 | UINTN Cr3\r |
3838 | );\r |
3839 | \r |
3840 | /**\r |
3841 | Writes a value to Control Register 4 (CR4).\r |
3842 | \r |
3843 | Writes and returns a new value to CR4. This function is only available on\r |
3844 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
3845 | \r |
3846 | @param Cr4 The value to write to CR4.\r |
3847 | \r |
3848 | @return The value written to CR4.\r |
3849 | \r |
3850 | **/\r |
3851 | UINTN\r |
3852 | EFIAPI\r |
3853 | AsmWriteCr4 (\r |
3854 | UINTN Cr4\r |
3855 | );\r |
3856 | \r |
3857 | /**\r |
3858 | Reads the current value of Debug Register 0 (DR0).\r |
3859 | \r |
3860 | Reads and returns the current value of DR0. This function is only available\r |
3861 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3862 | X64.\r |
3863 | \r |
3864 | @return The value of Debug Register 0 (DR0).\r |
3865 | \r |
3866 | **/\r |
3867 | UINTN\r |
3868 | EFIAPI\r |
3869 | AsmReadDr0 (\r |
3870 | VOID\r |
3871 | );\r |
3872 | \r |
3873 | /**\r |
3874 | Reads the current value of Debug Register 1 (DR1).\r |
3875 | \r |
3876 | Reads and returns the current value of DR1. This function is only available\r |
3877 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3878 | X64.\r |
3879 | \r |
3880 | @return The value of Debug Register 1 (DR1).\r |
3881 | \r |
3882 | **/\r |
3883 | UINTN\r |
3884 | EFIAPI\r |
3885 | AsmReadDr1 (\r |
3886 | VOID\r |
3887 | );\r |
3888 | \r |
3889 | /**\r |
3890 | Reads the current value of Debug Register 2 (DR2).\r |
3891 | \r |
3892 | Reads and returns the current value of DR2. This function is only available\r |
3893 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3894 | X64.\r |
3895 | \r |
3896 | @return The value of Debug Register 2 (DR2).\r |
3897 | \r |
3898 | **/\r |
3899 | UINTN\r |
3900 | EFIAPI\r |
3901 | AsmReadDr2 (\r |
3902 | VOID\r |
3903 | );\r |
3904 | \r |
3905 | /**\r |
3906 | Reads the current value of Debug Register 3 (DR3).\r |
3907 | \r |
3908 | Reads and returns the current value of DR3. This function is only available\r |
3909 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3910 | X64.\r |
3911 | \r |
3912 | @return The value of Debug Register 3 (DR3).\r |
3913 | \r |
3914 | **/\r |
3915 | UINTN\r |
3916 | EFIAPI\r |
3917 | AsmReadDr3 (\r |
3918 | VOID\r |
3919 | );\r |
3920 | \r |
3921 | /**\r |
3922 | Reads the current value of Debug Register 4 (DR4).\r |
3923 | \r |
3924 | Reads and returns the current value of DR4. This function is only available\r |
3925 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3926 | X64.\r |
3927 | \r |
3928 | @return The value of Debug Register 4 (DR4).\r |
3929 | \r |
3930 | **/\r |
3931 | UINTN\r |
3932 | EFIAPI\r |
3933 | AsmReadDr4 (\r |
3934 | VOID\r |
3935 | );\r |
3936 | \r |
3937 | /**\r |
3938 | Reads the current value of Debug Register 5 (DR5).\r |
3939 | \r |
3940 | Reads and returns the current value of DR5. This function is only available\r |
3941 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3942 | X64.\r |
3943 | \r |
3944 | @return The value of Debug Register 5 (DR5).\r |
3945 | \r |
3946 | **/\r |
3947 | UINTN\r |
3948 | EFIAPI\r |
3949 | AsmReadDr5 (\r |
3950 | VOID\r |
3951 | );\r |
3952 | \r |
3953 | /**\r |
3954 | Reads the current value of Debug Register 6 (DR6).\r |
3955 | \r |
3956 | Reads and returns the current value of DR6. This function is only available\r |
3957 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3958 | X64.\r |
3959 | \r |
3960 | @return The value of Debug Register 6 (DR6).\r |
3961 | \r |
3962 | **/\r |
3963 | UINTN\r |
3964 | EFIAPI\r |
3965 | AsmReadDr6 (\r |
3966 | VOID\r |
3967 | );\r |
3968 | \r |
3969 | /**\r |
3970 | Reads the current value of Debug Register 7 (DR7).\r |
3971 | \r |
3972 | Reads and returns the current value of DR7. This function is only available\r |
3973 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
3974 | X64.\r |
3975 | \r |
3976 | @return The value of Debug Register 7 (DR7).\r |
3977 | \r |
3978 | **/\r |
3979 | UINTN\r |
3980 | EFIAPI\r |
3981 | AsmReadDr7 (\r |
3982 | VOID\r |
3983 | );\r |
3984 | \r |
3985 | /**\r |
3986 | Writes a value to Debug Register 0 (DR0).\r |
3987 | \r |
3988 | Writes and returns a new value to DR0. This function is only available on\r |
3989 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
3990 | \r |
3991 | @param Dr0 The value to write to Dr0.\r |
3992 | \r |
3993 | @return The value written to Debug Register 0 (DR0).\r |
3994 | \r |
3995 | **/\r |
3996 | UINTN\r |
3997 | EFIAPI\r |
3998 | AsmWriteDr0 (\r |
3999 | UINTN Dr0\r |
4000 | );\r |
4001 | \r |
4002 | /**\r |
4003 | Writes a value to Debug Register 1 (DR1).\r |
4004 | \r |
4005 | Writes and returns a new value to DR1. This function is only available on\r |
4006 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
4007 | \r |
4008 | @param Dr1 The value to write to Dr1.\r |
4009 | \r |
4010 | @return The value written to Debug Register 1 (DR1).\r |
4011 | \r |
4012 | **/\r |
4013 | UINTN\r |
4014 | EFIAPI\r |
4015 | AsmWriteDr1 (\r |
4016 | UINTN Dr1\r |
4017 | );\r |
4018 | \r |
4019 | /**\r |
4020 | Writes a value to Debug Register 2 (DR2).\r |
4021 | \r |
4022 | Writes and returns a new value to DR2. This function is only available on\r |
4023 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
4024 | \r |
4025 | @param Dr2 The value to write to Dr2.\r |
4026 | \r |
4027 | @return The value written to Debug Register 2 (DR2).\r |
4028 | \r |
4029 | **/\r |
4030 | UINTN\r |
4031 | EFIAPI\r |
4032 | AsmWriteDr2 (\r |
4033 | UINTN Dr2\r |
4034 | );\r |
4035 | \r |
4036 | /**\r |
4037 | Writes a value to Debug Register 3 (DR3).\r |
4038 | \r |
4039 | Writes and returns a new value to DR3. This function is only available on\r |
4040 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
4041 | \r |
4042 | @param Dr3 The value to write to Dr3.\r |
4043 | \r |
4044 | @return The value written to Debug Register 3 (DR3).\r |
4045 | \r |
4046 | **/\r |
4047 | UINTN\r |
4048 | EFIAPI\r |
4049 | AsmWriteDr3 (\r |
4050 | UINTN Dr3\r |
4051 | );\r |
4052 | \r |
4053 | /**\r |
4054 | Writes a value to Debug Register 4 (DR4).\r |
4055 | \r |
4056 | Writes and returns a new value to DR4. This function is only available on\r |
4057 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
4058 | \r |
4059 | @param Dr4 The value to write to Dr4.\r |
4060 | \r |
4061 | @return The value written to Debug Register 4 (DR4).\r |
4062 | \r |
4063 | **/\r |
4064 | UINTN\r |
4065 | EFIAPI\r |
4066 | AsmWriteDr4 (\r |
4067 | UINTN Dr4\r |
4068 | );\r |
4069 | \r |
4070 | /**\r |
4071 | Writes a value to Debug Register 5 (DR5).\r |
4072 | \r |
4073 | Writes and returns a new value to DR5. This function is only available on\r |
4074 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
4075 | \r |
4076 | @param Dr5 The value to write to Dr5.\r |
4077 | \r |
4078 | @return The value written to Debug Register 5 (DR5).\r |
4079 | \r |
4080 | **/\r |
4081 | UINTN\r |
4082 | EFIAPI\r |
4083 | AsmWriteDr5 (\r |
4084 | UINTN Dr5\r |
4085 | );\r |
4086 | \r |
4087 | /**\r |
4088 | Writes a value to Debug Register 6 (DR6).\r |
4089 | \r |
4090 | Writes and returns a new value to DR6. This function is only available on\r |
4091 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
4092 | \r |
4093 | @param Dr6 The value to write to Dr6.\r |
4094 | \r |
4095 | @return The value written to Debug Register 6 (DR6).\r |
4096 | \r |
4097 | **/\r |
4098 | UINTN\r |
4099 | EFIAPI\r |
4100 | AsmWriteDr6 (\r |
4101 | UINTN Dr6\r |
4102 | );\r |
4103 | \r |
4104 | /**\r |
4105 | Writes a value to Debug Register 7 (DR7).\r |
4106 | \r |
4107 | Writes and returns a new value to DR7. This function is only available on\r |
4108 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r |
4109 | \r |
4110 | @param Dr7 The value to write to Dr7.\r |
4111 | \r |
4112 | @return The value written to Debug Register 7 (DR7).\r |
4113 | \r |
4114 | **/\r |
4115 | UINTN\r |
4116 | EFIAPI\r |
4117 | AsmWriteDr7 (\r |
4118 | UINTN Dr7\r |
4119 | );\r |
4120 | \r |
4121 | /**\r |
4122 | Reads the current value of Code Segment Register (CS).\r |
4123 | \r |
4124 | Reads and returns the current value of CS. This function is only available on\r |
4125 | IA-32 and X64.\r |
4126 | \r |
4127 | @return The current value of CS.\r |
4128 | \r |
4129 | **/\r |
4130 | UINT16\r |
4131 | EFIAPI\r |
4132 | AsmReadCs (\r |
4133 | VOID\r |
4134 | );\r |
4135 | \r |
4136 | /**\r |
4137 | Reads the current value of Data Segment Register (DS).\r |
4138 | \r |
4139 | Reads and returns the current value of DS. This function is only available on\r |
4140 | IA-32 and X64.\r |
4141 | \r |
4142 | @return The current value of DS.\r |
4143 | \r |
4144 | **/\r |
4145 | UINT16\r |
4146 | EFIAPI\r |
4147 | AsmReadDs (\r |
4148 | VOID\r |
4149 | );\r |
4150 | \r |
4151 | /**\r |
4152 | Reads the current value of Extra Segment Register (ES).\r |
4153 | \r |
4154 | Reads and returns the current value of ES. This function is only available on\r |
4155 | IA-32 and X64.\r |
4156 | \r |
4157 | @return The current value of ES.\r |
4158 | \r |
4159 | **/\r |
4160 | UINT16\r |
4161 | EFIAPI\r |
4162 | AsmReadEs (\r |
4163 | VOID\r |
4164 | );\r |
4165 | \r |
4166 | /**\r |
4167 | Reads the current value of FS Data Segment Register (FS).\r |
4168 | \r |
4169 | Reads and returns the current value of FS. This function is only available on\r |
4170 | IA-32 and X64.\r |
4171 | \r |
4172 | @return The current value of FS.\r |
4173 | \r |
4174 | **/\r |
4175 | UINT16\r |
4176 | EFIAPI\r |
4177 | AsmReadFs (\r |
4178 | VOID\r |
4179 | );\r |
4180 | \r |
4181 | /**\r |
4182 | Reads the current value of GS Data Segment Register (GS).\r |
4183 | \r |
4184 | Reads and returns the current value of GS. This function is only available on\r |
4185 | IA-32 and X64.\r |
4186 | \r |
4187 | @return The current value of GS.\r |
4188 | \r |
4189 | **/\r |
4190 | UINT16\r |
4191 | EFIAPI\r |
4192 | AsmReadGs (\r |
4193 | VOID\r |
4194 | );\r |
4195 | \r |
4196 | /**\r |
4197 | Reads the current value of Stack Segment Register (SS).\r |
4198 | \r |
4199 | Reads and returns the current value of SS. This function is only available on\r |
4200 | IA-32 and X64.\r |
4201 | \r |
4202 | @return The current value of SS.\r |
4203 | \r |
4204 | **/\r |
4205 | UINT16\r |
4206 | EFIAPI\r |
4207 | AsmReadSs (\r |
4208 | VOID\r |
4209 | );\r |
4210 | \r |
4211 | /**\r |
4212 | Reads the current value of Task Register (TR).\r |
4213 | \r |
4214 | Reads and returns the current value of TR. This function is only available on\r |
4215 | IA-32 and X64.\r |
4216 | \r |
4217 | @return The current value of TR.\r |
4218 | \r |
4219 | **/\r |
4220 | UINT16\r |
4221 | EFIAPI\r |
4222 | AsmReadTr (\r |
4223 | VOID\r |
4224 | );\r |
4225 | \r |
4226 | /**\r |
4227 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r |
4228 | \r |
4229 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r |
4230 | function is only available on IA-32 and X64.\r |
4231 | \r |
4232 | If Gdtr is NULL, then ASSERT().\r |
4233 | \r |
4234 | @param Gdtr Pointer to a GDTR descriptor.\r |
4235 | \r |
4236 | **/\r |
4237 | VOID\r |
4238 | EFIAPI\r |
4239 | AsmReadGdtr (\r |
4240 | OUT IA32_DESCRIPTOR *Gdtr\r |
4241 | );\r |
4242 | \r |
4243 | /**\r |
4244 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r |
4245 | \r |
4246 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r |
4247 | only available on IA-32 and X64.\r |
4248 | \r |
4249 | If Gdtr is NULL, then ASSERT().\r |
4250 | \r |
4251 | @param Gdtr Pointer to a GDTR descriptor.\r |
4252 | \r |
4253 | **/\r |
4254 | VOID\r |
4255 | EFIAPI\r |
4256 | AsmWriteGdtr (\r |
4257 | IN CONST IA32_DESCRIPTOR *Gdtr\r |
4258 | );\r |
4259 | \r |
4260 | /**\r |
4261 | Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r |
4262 | \r |
4263 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r |
4264 | function is only available on IA-32 and X64.\r |
4265 | \r |
4266 | If Idtr is NULL, then ASSERT().\r |
4267 | \r |
4268 | @param Idtr Pointer to a IDTR descriptor.\r |
4269 | \r |
4270 | **/\r |
4271 | VOID\r |
4272 | EFIAPI\r |
4273 | AsmReadIdtr (\r |
4274 | OUT IA32_DESCRIPTOR *Idtr\r |
4275 | );\r |
4276 | \r |
4277 | /**\r |
4278 | Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r |
4279 | \r |
4280 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r |
4281 | only available on IA-32 and X64.\r |
4282 | \r |
4283 | If Idtr is NULL, then ASSERT().\r |
4284 | \r |
4285 | @param Idtr Pointer to a IDTR descriptor.\r |
4286 | \r |
4287 | **/\r |
4288 | VOID\r |
4289 | EFIAPI\r |
4290 | AsmWriteIdtr (\r |
4291 | IN CONST IA32_DESCRIPTOR *Idtr\r |
4292 | );\r |
4293 | \r |
4294 | /**\r |
4295 | Reads the current Local Descriptor Table Register(LDTR) selector.\r |
4296 | \r |
4297 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r |
4298 | only available on IA-32 and X64.\r |
4299 | \r |
4300 | @return The current selector of LDT.\r |
4301 | \r |
4302 | **/\r |
4303 | UINT16\r |
4304 | EFIAPI\r |
4305 | AsmReadLdtr (\r |
4306 | VOID\r |
4307 | );\r |
4308 | \r |
4309 | /**\r |
4310 | Writes the current Local Descriptor Table Register (GDTR) selector.\r |
4311 | \r |
4312 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r |
4313 | only available on IA-32 and X64.\r |
4314 | \r |
4315 | @param Ldtr 16-bit LDTR selector value.\r |
4316 | \r |
4317 | **/\r |
4318 | VOID\r |
4319 | EFIAPI\r |
4320 | AsmWriteLdtr (\r |
4321 | IN UINT16 Ldtr\r |
4322 | );\r |
4323 | \r |
4324 | /**\r |
4325 | Save the current floating point/SSE/SSE2 context to a buffer.\r |
4326 | \r |
4327 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r |
4328 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r |
4329 | available on IA-32 and X64.\r |
4330 | \r |
4331 | If Buffer is NULL, then ASSERT().\r |
4332 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r |
4333 | \r |
4334 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
4335 | \r |
4336 | **/\r |
4337 | VOID\r |
4338 | EFIAPI\r |
4339 | AsmFxSave (\r |
4340 | OUT IA32_FX_BUFFER *Buffer\r |
4341 | );\r |
4342 | \r |
4343 | /**\r |
4344 | Restores the current floating point/SSE/SSE2 context from a buffer.\r |
4345 | \r |
4346 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r |
4347 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r |
4348 | only available on IA-32 and X64.\r |
4349 | \r |
4350 | If Buffer is NULL, then ASSERT().\r |
4351 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r |
4352 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r |
4353 | \r |
4354 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
4355 | \r |
4356 | **/\r |
4357 | VOID\r |
4358 | EFIAPI\r |
4359 | AsmFxRestore (\r |
4360 | IN CONST IA32_FX_BUFFER *Buffer\r |
4361 | );\r |
4362 | \r |
4363 | /**\r |
4364 | Reads the current value of 64-bit MMX Register #0 (MM0).\r |
4365 | \r |
4366 | Reads and returns the current value of MM0. This function is only available\r |
4367 | on IA-32 and X64.\r |
4368 | \r |
4369 | @return The current value of MM0.\r |
4370 | \r |
4371 | **/\r |
4372 | UINT64\r |
4373 | EFIAPI\r |
4374 | AsmReadMm0 (\r |
4375 | VOID\r |
4376 | );\r |
4377 | \r |
4378 | /**\r |
4379 | Reads the current value of 64-bit MMX Register #1 (MM1).\r |
4380 | \r |
4381 | Reads and returns the current value of MM1. This function is only available\r |
4382 | on IA-32 and X64.\r |
4383 | \r |
4384 | @return The current value of MM1.\r |
4385 | \r |
4386 | **/\r |
4387 | UINT64\r |
4388 | EFIAPI\r |
4389 | AsmReadMm1 (\r |
4390 | VOID\r |
4391 | );\r |
4392 | \r |
4393 | /**\r |
4394 | Reads the current value of 64-bit MMX Register #2 (MM2).\r |
4395 | \r |
4396 | Reads and returns the current value of MM2. This function is only available\r |
4397 | on IA-32 and X64.\r |
4398 | \r |
4399 | @return The current value of MM2.\r |
4400 | \r |
4401 | **/\r |
4402 | UINT64\r |
4403 | EFIAPI\r |
4404 | AsmReadMm2 (\r |
4405 | VOID\r |
4406 | );\r |
4407 | \r |
4408 | /**\r |
4409 | Reads the current value of 64-bit MMX Register #3 (MM3).\r |
4410 | \r |
4411 | Reads and returns the current value of MM3. This function is only available\r |
4412 | on IA-32 and X64.\r |
4413 | \r |
4414 | @return The current value of MM3.\r |
4415 | \r |
4416 | **/\r |
4417 | UINT64\r |
4418 | EFIAPI\r |
4419 | AsmReadMm3 (\r |
4420 | VOID\r |
4421 | );\r |
4422 | \r |
4423 | /**\r |
4424 | Reads the current value of 64-bit MMX Register #4 (MM4).\r |
4425 | \r |
4426 | Reads and returns the current value of MM4. This function is only available\r |
4427 | on IA-32 and X64.\r |
4428 | \r |
4429 | @return The current value of MM4.\r |
4430 | \r |
4431 | **/\r |
4432 | UINT64\r |
4433 | EFIAPI\r |
4434 | AsmReadMm4 (\r |
4435 | VOID\r |
4436 | );\r |
4437 | \r |
4438 | /**\r |
4439 | Reads the current value of 64-bit MMX Register #5 (MM5).\r |
4440 | \r |
4441 | Reads and returns the current value of MM5. This function is only available\r |
4442 | on IA-32 and X64.\r |
4443 | \r |
4444 | @return The current value of MM5.\r |
4445 | \r |
4446 | **/\r |
4447 | UINT64\r |
4448 | EFIAPI\r |
4449 | AsmReadMm5 (\r |
4450 | VOID\r |
4451 | );\r |
4452 | \r |
4453 | /**\r |
4454 | Reads the current value of 64-bit MMX Register #6 (MM6).\r |
4455 | \r |
4456 | Reads and returns the current value of MM6. This function is only available\r |
4457 | on IA-32 and X64.\r |
4458 | \r |
4459 | @return The current value of MM6.\r |
4460 | \r |
4461 | **/\r |
4462 | UINT64\r |
4463 | EFIAPI\r |
4464 | AsmReadMm6 (\r |
4465 | VOID\r |
4466 | );\r |
4467 | \r |
4468 | /**\r |
4469 | Reads the current value of 64-bit MMX Register #7 (MM7).\r |
4470 | \r |
4471 | Reads and returns the current value of MM7. This function is only available\r |
4472 | on IA-32 and X64.\r |
4473 | \r |
4474 | @return The current value of MM7.\r |
4475 | \r |
4476 | **/\r |
4477 | UINT64\r |
4478 | EFIAPI\r |
4479 | AsmReadMm7 (\r |
4480 | VOID\r |
4481 | );\r |
4482 | \r |
4483 | /**\r |
4484 | Writes the current value of 64-bit MMX Register #0 (MM0).\r |
4485 | \r |
4486 | Writes the current value of MM0. This function is only available on IA32 and\r |
4487 | X64.\r |
4488 | \r |
4489 | @param Value The 64-bit value to write to MM0.\r |
4490 | \r |
4491 | **/\r |
4492 | VOID\r |
4493 | EFIAPI\r |
4494 | AsmWriteMm0 (\r |
4495 | IN UINT64 Value\r |
4496 | );\r |
4497 | \r |
4498 | /**\r |
4499 | Writes the current value of 64-bit MMX Register #1 (MM1).\r |
4500 | \r |
4501 | Writes the current value of MM1. This function is only available on IA32 and\r |
4502 | X64.\r |
4503 | \r |
4504 | @param Value The 64-bit value to write to MM1.\r |
4505 | \r |
4506 | **/\r |
4507 | VOID\r |
4508 | EFIAPI\r |
4509 | AsmWriteMm1 (\r |
4510 | IN UINT64 Value\r |
4511 | );\r |
4512 | \r |
4513 | /**\r |
4514 | Writes the current value of 64-bit MMX Register #2 (MM2).\r |
4515 | \r |
4516 | Writes the current value of MM2. This function is only available on IA32 and\r |
4517 | X64.\r |
4518 | \r |
4519 | @param Value The 64-bit value to write to MM2.\r |
4520 | \r |
4521 | **/\r |
4522 | VOID\r |
4523 | EFIAPI\r |
4524 | AsmWriteMm2 (\r |
4525 | IN UINT64 Value\r |
4526 | );\r |
4527 | \r |
4528 | /**\r |
4529 | Writes the current value of 64-bit MMX Register #3 (MM3).\r |
4530 | \r |
4531 | Writes the current value of MM3. This function is only available on IA32 and\r |
4532 | X64.\r |
4533 | \r |
4534 | @param Value The 64-bit value to write to MM3.\r |
4535 | \r |
4536 | **/\r |
4537 | VOID\r |
4538 | EFIAPI\r |
4539 | AsmWriteMm3 (\r |
4540 | IN UINT64 Value\r |
4541 | );\r |
4542 | \r |
4543 | /**\r |
4544 | Writes the current value of 64-bit MMX Register #4 (MM4).\r |
4545 | \r |
4546 | Writes the current value of MM4. This function is only available on IA32 and\r |
4547 | X64.\r |
4548 | \r |
4549 | @param Value The 64-bit value to write to MM4.\r |
4550 | \r |
4551 | **/\r |
4552 | VOID\r |
4553 | EFIAPI\r |
4554 | AsmWriteMm4 (\r |
4555 | IN UINT64 Value\r |
4556 | );\r |
4557 | \r |
4558 | /**\r |
4559 | Writes the current value of 64-bit MMX Register #5 (MM5).\r |
4560 | \r |
4561 | Writes the current value of MM5. This function is only available on IA32 and\r |
4562 | X64.\r |
4563 | \r |
4564 | @param Value The 64-bit value to write to MM5.\r |
4565 | \r |
4566 | **/\r |
4567 | VOID\r |
4568 | EFIAPI\r |
4569 | AsmWriteMm5 (\r |
4570 | IN UINT64 Value\r |
4571 | );\r |
4572 | \r |
4573 | /**\r |
4574 | Writes the current value of 64-bit MMX Register #6 (MM6).\r |
4575 | \r |
4576 | Writes the current value of MM6. This function is only available on IA32 and\r |
4577 | X64.\r |
4578 | \r |
4579 | @param Value The 64-bit value to write to MM6.\r |
4580 | \r |
4581 | **/\r |
4582 | VOID\r |
4583 | EFIAPI\r |
4584 | AsmWriteMm6 (\r |
4585 | IN UINT64 Value\r |
4586 | );\r |
4587 | \r |
4588 | /**\r |
4589 | Writes the current value of 64-bit MMX Register #7 (MM7).\r |
4590 | \r |
4591 | Writes the current value of MM7. This function is only available on IA32 and\r |
4592 | X64.\r |
4593 | \r |
4594 | @param Value The 64-bit value to write to MM7.\r |
4595 | \r |
4596 | **/\r |
4597 | VOID\r |
4598 | EFIAPI\r |
4599 | AsmWriteMm7 (\r |
4600 | IN UINT64 Value\r |
4601 | );\r |
4602 | \r |
4603 | /**\r |
4604 | Reads the current value of Time Stamp Counter (TSC).\r |
4605 | \r |
4606 | Reads and returns the current value of TSC. This function is only available\r |
4607 | on IA-32 and X64.\r |
4608 | \r |
4609 | @return The current value of TSC\r |
4610 | \r |
4611 | **/\r |
4612 | UINT64\r |
4613 | EFIAPI\r |
4614 | AsmReadTsc (\r |
4615 | VOID\r |
4616 | );\r |
4617 | \r |
4618 | /**\r |
4619 | Reads the current value of a Performance Counter (PMC).\r |
4620 | \r |
4621 | Reads and returns the current value of performance counter specified by\r |
4622 | Index. This function is only available on IA-32 and X64.\r |
4623 | \r |
4624 | @param Index The 32-bit Performance Counter index to read.\r |
4625 | \r |
4626 | @return The value of the PMC specified by Index.\r |
4627 | \r |
4628 | **/\r |
4629 | UINT64\r |
4630 | EFIAPI\r |
4631 | AsmReadPmc (\r |
4632 | IN UINT32 Index\r |
4633 | );\r |
4634 | \r |
4635 | /**\r |
4636 | Sets up a monitor buffer that is used by AsmMwait().\r |
4637 | \r |
4638 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r |
4639 | and Edx. Returns Eax. This function is only available on IA-32 and X64.\r |
4640 | \r |
4641 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r |
4642 | instruction.\r |
4643 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r |
4644 | instruction.\r |
4645 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r |
4646 | instruction.\r |
4647 | \r |
4648 | @return Eax\r |
4649 | \r |
4650 | **/\r |
4651 | UINTN\r |
4652 | EFIAPI\r |
4653 | AsmMonitor (\r |
4654 | IN UINTN Eax,\r |
4655 | IN UINTN Ecx,\r |
4656 | IN UINTN Edx\r |
4657 | );\r |
4658 | \r |
4659 | /**\r |
4660 | Executes an MWAIT instruction.\r |
4661 | \r |
4662 | Executes an MWAIT instruction with the register state specified by Eax and\r |
4663 | Ecx. Returns Eax. This function is only available on IA-32 and X64.\r |
4664 | \r |
4665 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r |
4666 | instruction.\r |
4667 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r |
4668 | instruction.\r |
4669 | \r |
4670 | @return Eax\r |
4671 | \r |
4672 | **/\r |
4673 | UINTN\r |
4674 | EFIAPI\r |
4675 | AsmMwait (\r |
4676 | IN UINTN Eax,\r |
4677 | IN UINTN Ecx\r |
4678 | );\r |
4679 | \r |
4680 | /**\r |
4681 | Executes a WBINVD instruction.\r |
4682 | \r |
4683 | Executes a WBINVD instruction. This function is only available on IA-32 and\r |
4684 | X64.\r |
4685 | \r |
4686 | **/\r |
4687 | VOID\r |
4688 | EFIAPI\r |
4689 | AsmWbinvd (\r |
4690 | VOID\r |
4691 | );\r |
4692 | \r |
4693 | /**\r |
4694 | Executes a INVD instruction.\r |
4695 | \r |
4696 | Executes a INVD instruction. This function is only available on IA-32 and\r |
4697 | X64.\r |
4698 | \r |
4699 | **/\r |
4700 | VOID\r |
4701 | EFIAPI\r |
4702 | AsmInvd (\r |
4703 | VOID\r |
4704 | );\r |
4705 | \r |
4706 | /**\r |
4707 | Flushes a cache line from all the instruction and data caches within the\r |
4708 | coherency domain of the CPU.\r |
4709 | \r |
4710 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r |
4711 | This function is only available on IA-32 and X64.\r |
4712 | \r |
4713 | @param LinearAddress The address of the cache line to flush. If the CPU is\r |
4714 | in a physical addressing mode, then LinearAddress is a\r |
4715 | physical address. If the CPU is in a virtual\r |
4716 | addressing mode, then LinearAddress is a virtual\r |
4717 | address.\r |
4718 | \r |
4719 | @return LinearAddress\r |
4720 | **/\r |
4721 | VOID *\r |
4722 | EFIAPI\r |
4723 | AsmFlushCacheLine (\r |
4724 | IN VOID *LinearAddress\r |
4725 | );\r |
4726 | \r |
4727 | /**\r |
4728 | Enables the 32-bit paging mode on the CPU.\r |
4729 | \r |
4730 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r |
4731 | must be properly initialized prior to calling this service. This function\r |
4732 | assumes the current execution mode is 32-bit protected mode. This function is\r |
4733 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r |
4734 | transferred to the function specified by EntryPoint using the new stack\r |
4735 | specified by NewStack and passing in the parameters specified by Context1 and\r |
4736 | Context2. Context1 and Context2 are optional and may be NULL. The function\r |
4737 | EntryPoint must never return.\r |
4738 | \r |
4739 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r |
4740 | If EntryPoint is NULL, then ASSERT().\r |
4741 | If NewStack is NULL, then ASSERT().\r |
4742 | \r |
4743 | There are a number of constraints that must be followed before calling this\r |
4744 | function:\r |
4745 | 1) Interrupts must be disabled.\r |
4746 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r |
4747 | means all descriptors must have a base of 0 and a limit of 4GB.\r |
4748 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r |
4749 | descriptors.\r |
4750 | 4) CR3 must point to valid page tables that will be used once the transition\r |
4751 | is complete, and those page tables must guarantee that the pages for this\r |
4752 | function and the stack are identity mapped.\r |
4753 | \r |
4754 | @param EntryPoint A pointer to function to call with the new stack after\r |
4755 | paging is enabled.\r |
4756 | @param Context1 A pointer to the context to pass into the EntryPoint\r |
4757 | function as the first parameter after paging is enabled.\r |
4758 | @param Context2 A pointer to the context to pass into the EntryPoint\r |
4759 | function as the second parameter after paging is enabled.\r |
4760 | @param NewStack A pointer to the new stack to use for the EntryPoint\r |
4761 | function after paging is enabled.\r |
4762 | \r |
4763 | **/\r |
4764 | VOID\r |
4765 | EFIAPI\r |
4766 | AsmEnablePaging32 (\r |
4767 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r |
4768 | IN VOID *Context1, OPTIONAL\r |
4769 | IN VOID *Context2, OPTIONAL\r |
4770 | IN VOID *NewStack\r |
4771 | );\r |
4772 | \r |
4773 | /**\r |
4774 | Disables the 32-bit paging mode on the CPU.\r |
4775 | \r |
4776 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r |
4777 | mode. This function assumes the current execution mode is 32-paged protected\r |
4778 | mode. This function is only available on IA-32. After the 32-bit paging mode\r |
4779 | is disabled, control is transferred to the function specified by EntryPoint\r |
4780 | using the new stack specified by NewStack and passing in the parameters\r |
4781 | specified by Context1 and Context2. Context1 and Context2 are optional and\r |
4782 | may be NULL. The function EntryPoint must never return.\r |
4783 | \r |
4784 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r |
4785 | If EntryPoint is NULL, then ASSERT().\r |
4786 | If NewStack is NULL, then ASSERT().\r |
4787 | \r |
4788 | There are a number of constraints that must be followed before calling this\r |
4789 | function:\r |
4790 | 1) Interrupts must be disabled.\r |
4791 | 2) The caller must be in 32-bit paged mode.\r |
4792 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r |
4793 | 4) CR3 must point to valid page tables that guarantee that the pages for\r |
4794 | this function and the stack are identity mapped.\r |
4795 | \r |
4796 | @param EntryPoint A pointer to function to call with the new stack after\r |
4797 | paging is disabled.\r |
4798 | @param Context1 A pointer to the context to pass into the EntryPoint\r |
4799 | function as the first parameter after paging is disabled.\r |
4800 | @param Context2 A pointer to the context to pass into the EntryPoint\r |
4801 | function as the second parameter after paging is\r |
4802 | disabled.\r |
4803 | @param NewStack A pointer to the new stack to use for the EntryPoint\r |
4804 | function after paging is disabled.\r |
4805 | \r |
4806 | **/\r |
4807 | VOID\r |
4808 | EFIAPI\r |
4809 | AsmDisablePaging32 (\r |
4810 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r |
4811 | IN VOID *Context1, OPTIONAL\r |
4812 | IN VOID *Context2, OPTIONAL\r |
4813 | IN VOID *NewStack\r |
4814 | );\r |
4815 | \r |
4816 | /**\r |
4817 | Enables the 64-bit paging mode on the CPU.\r |
4818 | \r |
4819 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r |
4820 | must be properly initialized prior to calling this service. This function\r |
4821 | assumes the current execution mode is 32-bit protected mode with flat\r |
4822 | descriptors. This function is only available on IA-32. After the 64-bit\r |
4823 | paging mode is enabled, control is transferred to the function specified by\r |
4824 | EntryPoint using the new stack specified by NewStack and passing in the\r |
4825 | parameters specified by Context1 and Context2. Context1 and Context2 are\r |
4826 | optional and may be 0. The function EntryPoint must never return.\r |
4827 | \r |
4828 | If the current execution mode is not 32-bit protected mode with flat\r |
4829 | descriptors, then ASSERT().\r |
4830 | If EntryPoint is 0, then ASSERT().\r |
4831 | If NewStack is 0, then ASSERT().\r |
4832 | \r |
4833 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
4834 | is called. The descriptor in the GDT that this selector\r |
4835 | references must be setup for long mode.\r |
4836 | @param EntryPoint The 64-bit virtual address of the function to call with\r |
4837 | the new stack after paging is enabled.\r |
4838 | @param Context1 The 64-bit virtual address of the context to pass into\r |
4839 | the EntryPoint function as the first parameter after\r |
4840 | paging is enabled.\r |
4841 | @param Context2 The 64-bit virtual address of the context to pass into\r |
4842 | the EntryPoint function as the second parameter after\r |
4843 | paging is enabled.\r |
4844 | @param NewStack The 64-bit virtual address of the new stack to use for\r |
4845 | the EntryPoint function after paging is enabled.\r |
4846 | \r |
4847 | **/\r |
4848 | VOID\r |
4849 | EFIAPI\r |
4850 | AsmEnablePaging64 (\r |
4851 | IN UINT16 CodeSelector,\r |
4852 | IN UINT64 EntryPoint,\r |
4853 | IN UINT64 Context1, OPTIONAL\r |
4854 | IN UINT64 Context2, OPTIONAL\r |
4855 | IN UINT64 NewStack\r |
4856 | );\r |
4857 | \r |
4858 | /**\r |
4859 | Disables the 64-bit paging mode on the CPU.\r |
4860 | \r |
4861 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r |
4862 | mode. This function assumes the current execution mode is 64-paging mode.\r |
4863 | This function is only available on X64. After the 64-bit paging mode is\r |
4864 | disabled, control is transferred to the function specified by EntryPoint\r |
4865 | using the new stack specified by NewStack and passing in the parameters\r |
4866 | specified by Context1 and Context2. Context1 and Context2 are optional and\r |
4867 | may be 0. The function EntryPoint must never return.\r |
4868 | \r |
4869 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r |
4870 | If EntryPoint is 0, then ASSERT().\r |
4871 | If NewStack is 0, then ASSERT().\r |
4872 | \r |
4873 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
4874 | is called. The descriptor in the GDT that this selector\r |
4875 | references must be setup for 32-bit protected mode.\r |
4876 | @param EntryPoint The 64-bit virtual address of the function to call with\r |
4877 | the new stack after paging is disabled.\r |
4878 | @param Context1 The 64-bit virtual address of the context to pass into\r |
4879 | the EntryPoint function as the first parameter after\r |
4880 | paging is disabled.\r |
4881 | @param Context2 The 64-bit virtual address of the context to pass into\r |
4882 | the EntryPoint function as the second parameter after\r |
4883 | paging is disabled.\r |
4884 | @param NewStack The 64-bit virtual address of the new stack to use for\r |
4885 | the EntryPoint function after paging is disabled.\r |
4886 | \r |
4887 | **/\r |
4888 | VOID\r |
4889 | EFIAPI\r |
4890 | AsmDisablePaging64 (\r |
4891 | IN UINT16 CodeSelector,\r |
4892 | IN UINT32 EntryPoint,\r |
4893 | IN UINT32 Context1, OPTIONAL\r |
4894 | IN UINT32 Context2, OPTIONAL\r |
4895 | IN UINT32 NewStack\r |
4896 | );\r |
4897 | \r |
4898 | //\r |
4899 | // 16-bit thunking services\r |
4900 | //\r |
4901 | \r |
97d92bda |
4902 | /**\r |
4903 | Retrieves the properties for 16-bit thunk functions.\r |
4904 | \r |
4905 | Computes the size of the buffer and stack below 1MB required to use the\r |
4906 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r |
4907 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r |
4908 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r |
4909 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r |
4910 | of bytes that need to be passed to the 16-bit real mode code.\r |
4911 | \r |
4912 | If RealModeBufferSize is NULL, then ASSERT().\r |
4913 | If ExtraStackSize is NULL, then ASSERT().\r |
4914 | \r |
4915 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r |
4916 | required to use the 16-bit thunk functions.\r |
4917 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r |
4918 | that the 16-bit thunk functions require for\r |
4919 | temporary storage in the transition to and from\r |
4920 | 16-bit real mode.\r |
4921 | \r |
4922 | **/\r |
4923 | VOID\r |
4924 | EFIAPI\r |
4925 | AsmGetThunk16Properties (\r |
4926 | OUT UINT32 *RealModeBufferSize,\r |
4927 | OUT UINT32 *ExtraStackSize\r |
4928 | );\r |
4929 | \r |
878ddf1f |
4930 | /**\r |
4931 | Prepares all structures a code required to use AsmThunk16().\r |
4932 | \r |
4933 | Prepares all structures and code required to use AsmThunk16().\r |
4934 | \r |
4935 | If ThunkContext is NULL, then ASSERT().\r |
4936 | \r |
4937 | @param ThunkContext A pointer to the context structure that describes the\r |
4938 | 16-bit real mode code to call.\r |
4939 | \r |
4940 | **/\r |
4941 | VOID\r |
4942 | EFIAPI\r |
4943 | AsmPrepareThunk16 (\r |
4944 | OUT THUNK_CONTEXT *ThunkContext\r |
4945 | );\r |
4946 | \r |
4947 | /**\r |
4948 | Transfers control to a 16-bit real mode entry point and returns the results.\r |
4949 | \r |
4950 | Transfers control to a 16-bit real mode entry point and returns the results.\r |
4951 | AsmPrepareThunk16() must be called with ThunkContext before this function is\r |
4952 | used.\r |
4953 | \r |
4954 | If ThunkContext is NULL, then ASSERT().\r |
4955 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r |
4956 | \r |
4957 | @param ThunkContext A pointer to the context structure that describes the\r |
4958 | 16-bit real mode code to call.\r |
4959 | \r |
4960 | **/\r |
4961 | VOID\r |
4962 | EFIAPI\r |
4963 | AsmThunk16 (\r |
4964 | IN OUT THUNK_CONTEXT *ThunkContext\r |
4965 | );\r |
4966 | \r |
4967 | /**\r |
4968 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r |
4969 | control to a 16-bit real mode entry point, and returns the results.\r |
4970 | \r |
4971 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r |
4972 | control to a 16-bit real mode entry point, and returns the results. If the\r |
4973 | caller only need to perform a single 16-bit real mode thunk, then this\r |
4974 | service should be used. If the caller intends to make more than one 16-bit\r |
4975 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r |
4976 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r |
4977 | \r |
4978 | If ThunkContext is NULL, then ASSERT().\r |
4979 | \r |
4980 | @param ThunkContext A pointer to the context structure that describes the\r |
4981 | 16-bit real mode code to call.\r |
4982 | \r |
4983 | **/\r |
4984 | VOID\r |
4985 | EFIAPI\r |
4986 | AsmPrepareAndThunk16 (\r |
4987 | IN OUT THUNK_CONTEXT *ThunkContext\r |
4988 | );\r |
4989 | \r |
4990 | #endif\r |