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ac644614 | 1 | /** @file\r |
50a64e5b | 2 | Provides string functions, linked list functions, math functions, synchronization\r |
1a2f870c | 3 | functions, and CPU architecture-specific functions.\r |
ac644614 | 4 | \r |
2fe241a2 | 5 | Copyright (c) 2006 - 2008, Intel Corporation<BR>\r |
50a64e5b | 6 | All rights reserved. This program and the accompanying materials\r |
7 | are licensed and made available under the terms and conditions of the BSD License\r | |
8 | which accompanies this distribution. The full text of the license may be found at\r | |
9 | http://opensource.org/licenses/bsd-license.php\r | |
ac644614 | 10 | \r |
50a64e5b | 11 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
12 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
ac644614 | 13 | \r |
14 | **/\r | |
15 | \r | |
16 | #ifndef __BASE_LIB__\r | |
17 | #define __BASE_LIB__\r | |
18 | \r | |
1106ffe1 | 19 | //\r |
1a2f870c | 20 | // Definitions for architecture-specific types\r |
1106ffe1 | 21 | //\r |
ac644614 | 22 | #if defined (MDE_CPU_IA32)\r |
fc30687f | 23 | ///\r |
1a2f870c | 24 | /// IA-32 architecture context buffer used by SetJump() and LongJump()\r |
fc30687f | 25 | ///\r |
ac644614 | 26 | typedef struct {\r |
27 | UINT32 Ebx;\r | |
28 | UINT32 Esi;\r | |
29 | UINT32 Edi;\r | |
30 | UINT32 Ebp;\r | |
31 | UINT32 Esp;\r | |
32 | UINT32 Eip;\r | |
33 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
34 | \r | |
35 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
36 | \r | |
aa4df547 | 37 | #endif // defined (MDE_CPU_IA32)\r |
38 | \r | |
39 | #if defined (MDE_CPU_IPF)\r | |
ac644614 | 40 | \r |
fc30687f | 41 | ///\r |
1a2f870c | 42 | /// Itanium architecture context buffer used by SetJump() and LongJump()\r |
fc30687f | 43 | ///\r |
ac644614 | 44 | typedef struct {\r |
45 | UINT64 F2[2];\r | |
46 | UINT64 F3[2];\r | |
47 | UINT64 F4[2];\r | |
48 | UINT64 F5[2];\r | |
49 | UINT64 F16[2];\r | |
50 | UINT64 F17[2];\r | |
51 | UINT64 F18[2];\r | |
52 | UINT64 F19[2];\r | |
53 | UINT64 F20[2];\r | |
54 | UINT64 F21[2];\r | |
55 | UINT64 F22[2];\r | |
56 | UINT64 F23[2];\r | |
57 | UINT64 F24[2];\r | |
58 | UINT64 F25[2];\r | |
59 | UINT64 F26[2];\r | |
60 | UINT64 F27[2];\r | |
61 | UINT64 F28[2];\r | |
62 | UINT64 F29[2];\r | |
63 | UINT64 F30[2];\r | |
64 | UINT64 F31[2];\r | |
65 | UINT64 R4;\r | |
66 | UINT64 R5;\r | |
67 | UINT64 R6;\r | |
68 | UINT64 R7;\r | |
69 | UINT64 SP;\r | |
70 | UINT64 BR0;\r | |
71 | UINT64 BR1;\r | |
72 | UINT64 BR2;\r | |
73 | UINT64 BR3;\r | |
74 | UINT64 BR4;\r | |
75 | UINT64 BR5;\r | |
76 | UINT64 InitialUNAT;\r | |
77 | UINT64 AfterSpillUNAT;\r | |
78 | UINT64 PFS;\r | |
79 | UINT64 BSP;\r | |
80 | UINT64 Predicates;\r | |
81 | UINT64 LoopCount;\r | |
82 | UINT64 FPSR;\r | |
83 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
84 | \r | |
85 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
86 | \r | |
aa4df547 | 87 | #endif // defined (MDE_CPU_IPF)\r |
88 | \r | |
89 | #if defined (MDE_CPU_X64)\r | |
fc30687f | 90 | ///\r |
1a2f870c | 91 | /// x64 architecture context buffer used by SetJump() and LongJump()\r |
fc30687f | 92 | ///\r |
ac644614 | 93 | typedef struct {\r |
94 | UINT64 Rbx;\r | |
95 | UINT64 Rsp;\r | |
96 | UINT64 Rbp;\r | |
97 | UINT64 Rdi;\r | |
98 | UINT64 Rsi;\r | |
99 | UINT64 R12;\r | |
100 | UINT64 R13;\r | |
101 | UINT64 R14;\r | |
102 | UINT64 R15;\r | |
103 | UINT64 Rip;\r | |
9b9641c6 | 104 | UINT64 MxCsr;\r |
105 | UINT8 XmmBuffer[160]; ///< XMM6-XMM15\r | |
ac644614 | 106 | } BASE_LIBRARY_JUMP_BUFFER;\r |
107 | \r | |
108 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
109 | \r | |
aa4df547 | 110 | #endif // defined (MDE_CPU_X64)\r |
111 | \r | |
112 | #if defined (MDE_CPU_EBC)\r | |
fc30687f | 113 | ///\r |
114 | /// EBC context buffer used by SetJump() and LongJump()\r | |
115 | ///\r | |
ac644614 | 116 | typedef struct {\r |
117 | UINT64 R0;\r | |
118 | UINT64 R1;\r | |
119 | UINT64 R2;\r | |
120 | UINT64 R3;\r | |
121 | UINT64 IP;\r | |
122 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
123 | \r | |
124 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
125 | \r | |
aa4df547 | 126 | #endif // defined (MDE_CPU_EBC)\r |
ac644614 | 127 | \r |
128 | //\r | |
129 | // String Services\r | |
130 | //\r | |
131 | \r | |
132 | /**\r | |
133 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
134 | string and returns the new Unicode string.\r | |
135 | \r | |
136 | This function copies the contents of the Unicode string Source to the Unicode\r | |
137 | string Destination, and returns Destination. If Source and Destination\r | |
138 | overlap, then the results are undefined.\r | |
139 | \r | |
140 | If Destination is NULL, then ASSERT().\r | |
141 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
142 | If Source is NULL, then ASSERT().\r | |
143 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
144 | If Source and Destination overlap, then ASSERT().\r | |
145 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
146 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
147 | Null-terminator, then ASSERT().\r | |
148 | \r | |
149 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
150 | @param Source Pointer to a Null-terminated Unicode string.\r | |
151 | \r | |
9aa049d9 | 152 | @return Destination.\r |
ac644614 | 153 | \r |
154 | **/\r | |
155 | CHAR16 *\r | |
156 | EFIAPI\r | |
157 | StrCpy (\r | |
158 | OUT CHAR16 *Destination,\r | |
159 | IN CONST CHAR16 *Source\r | |
160 | );\r | |
161 | \r | |
162 | \r | |
163 | /**\r | |
17f695ed | 164 | Copies up to a specified length from one Null-terminated Unicode string to \r |
165 | another Null-terminated Unicode string and returns the new Unicode string.\r | |
ac644614 | 166 | \r |
167 | This function copies the contents of the Unicode string Source to the Unicode\r | |
168 | string Destination, and returns Destination. At most, Length Unicode\r | |
169 | characters are copied from Source to Destination. If Length is 0, then\r | |
170 | Destination is returned unmodified. If Length is greater that the number of\r | |
171 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
172 | characters. If Source and Destination overlap, then the results are\r | |
173 | undefined.\r | |
174 | \r | |
175 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
176 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
177 | If Length > 0 and Source is NULL, then ASSERT().\r | |
77f863ee | 178 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 179 | If Source and Destination overlap, then ASSERT().\r |
50c247fd | 180 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
181 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 182 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
50c247fd | 183 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r |
184 | then ASSERT().\r | |
ac644614 | 185 | \r |
186 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
187 | @param Source Pointer to a Null-terminated Unicode string.\r | |
188 | @param Length Maximum number of Unicode characters to copy.\r | |
189 | \r | |
9aa049d9 | 190 | @return Destination.\r |
ac644614 | 191 | \r |
192 | **/\r | |
193 | CHAR16 *\r | |
194 | EFIAPI\r | |
195 | StrnCpy (\r | |
196 | OUT CHAR16 *Destination,\r | |
197 | IN CONST CHAR16 *Source,\r | |
198 | IN UINTN Length\r | |
199 | );\r | |
200 | \r | |
201 | \r | |
202 | /**\r | |
203 | Returns the length of a Null-terminated Unicode string.\r | |
204 | \r | |
205 | This function returns the number of Unicode characters in the Null-terminated\r | |
206 | Unicode string specified by String.\r | |
207 | \r | |
208 | If String is NULL, then ASSERT().\r | |
209 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
210 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
211 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
212 | Null-terminator, then ASSERT().\r | |
213 | \r | |
214 | @param String Pointer to a Null-terminated Unicode string.\r | |
215 | \r | |
216 | @return The length of String.\r | |
217 | \r | |
218 | **/\r | |
219 | UINTN\r | |
220 | EFIAPI\r | |
221 | StrLen (\r | |
222 | IN CONST CHAR16 *String\r | |
223 | );\r | |
224 | \r | |
225 | \r | |
226 | /**\r | |
227 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
228 | Null terminator.\r | |
229 | \r | |
17f695ed | 230 | This function returns the size, in bytes, of the Null-terminated Unicode string \r |
231 | specified by String.\r | |
ac644614 | 232 | \r |
233 | If String is NULL, then ASSERT().\r | |
234 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
235 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
236 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
237 | Null-terminator, then ASSERT().\r | |
238 | \r | |
239 | @param String Pointer to a Null-terminated Unicode string.\r | |
240 | \r | |
241 | @return The size of String.\r | |
242 | \r | |
243 | **/\r | |
244 | UINTN\r | |
245 | EFIAPI\r | |
246 | StrSize (\r | |
247 | IN CONST CHAR16 *String\r | |
248 | );\r | |
249 | \r | |
250 | \r | |
251 | /**\r | |
252 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
253 | between the first mismatched Unicode characters.\r | |
254 | \r | |
255 | This function compares the Null-terminated Unicode string FirstString to the\r | |
256 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
257 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
258 | mismatched Unicode character in SecondString subtracted from the first\r | |
259 | mismatched Unicode character in FirstString.\r | |
260 | \r | |
261 | If FirstString is NULL, then ASSERT().\r | |
262 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
263 | If SecondString is NULL, then ASSERT().\r | |
264 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
265 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
266 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
267 | Null-terminator, then ASSERT().\r | |
268 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
269 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
270 | Null-terminator, then ASSERT().\r | |
271 | \r | |
272 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
273 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
274 | \r | |
1106ffe1 | 275 | @retval 0 FirstString is identical to SecondString.\r |
276 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 277 | \r |
278 | **/\r | |
279 | INTN\r | |
280 | EFIAPI\r | |
281 | StrCmp (\r | |
282 | IN CONST CHAR16 *FirstString,\r | |
283 | IN CONST CHAR16 *SecondString\r | |
284 | );\r | |
285 | \r | |
286 | \r | |
287 | /**\r | |
17f695ed | 288 | Compares up to a specified length the contents of two Null-terminated Unicode strings,\r |
289 | and returns the difference between the first mismatched Unicode characters.\r | |
290 | \r | |
ac644614 | 291 | This function compares the Null-terminated Unicode string FirstString to the\r |
292 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
293 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
294 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
295 | value returned is the first mismatched Unicode character in SecondString\r | |
296 | subtracted from the first mismatched Unicode character in FirstString.\r | |
297 | \r | |
298 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
77f863ee | 299 | If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 300 | If Length > 0 and SecondString is NULL, then ASSERT().\r |
77f863ee | 301 | If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r |
50c247fd | 302 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r |
303 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
304 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r | |
305 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
306 | then ASSERT().\r | |
307 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r | |
308 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
309 | then ASSERT().\r | |
ac644614 | 310 | \r |
311 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
312 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
313 | @param Length Maximum number of Unicode characters to compare.\r | |
314 | \r | |
1106ffe1 | 315 | @retval 0 FirstString is identical to SecondString.\r |
316 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 317 | \r |
318 | **/\r | |
319 | INTN\r | |
320 | EFIAPI\r | |
321 | StrnCmp (\r | |
322 | IN CONST CHAR16 *FirstString,\r | |
323 | IN CONST CHAR16 *SecondString,\r | |
324 | IN UINTN Length\r | |
325 | );\r | |
326 | \r | |
327 | \r | |
328 | /**\r | |
329 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
330 | Unicode string, and returns the concatenated Unicode string.\r | |
331 | \r | |
332 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
333 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
334 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
335 | Unicode String is returned. If Source and Destination overlap, then the\r | |
336 | results are undefined.\r | |
337 | \r | |
338 | If Destination is NULL, then ASSERT().\r | |
77f863ee | 339 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 340 | If Source is NULL, then ASSERT().\r |
77f863ee | 341 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 342 | If Source and Destination overlap, then ASSERT().\r |
343 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
344 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
345 | Null-terminator, then ASSERT().\r | |
346 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
347 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
348 | Null-terminator, then ASSERT().\r | |
349 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
350 | and Source results in a Unicode string with more than\r | |
351 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
352 | Null-terminator, then ASSERT().\r | |
353 | \r | |
354 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
355 | @param Source Pointer to a Null-terminated Unicode string.\r | |
356 | \r | |
9aa049d9 | 357 | @return Destination.\r |
ac644614 | 358 | \r |
359 | **/\r | |
360 | CHAR16 *\r | |
361 | EFIAPI\r | |
362 | StrCat (\r | |
363 | IN OUT CHAR16 *Destination,\r | |
364 | IN CONST CHAR16 *Source\r | |
365 | );\r | |
366 | \r | |
367 | \r | |
368 | /**\r | |
17f695ed | 369 | Concatenates up to a specified length one Null-terminated Unicode to the end \r |
370 | of another Null-terminated Unicode string, and returns the concatenated \r | |
ac644614 | 371 | Unicode string.\r |
372 | \r | |
373 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
374 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
375 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
376 | most, Length Unicode characters are concatenated from Source to the end of\r | |
377 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
378 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
379 | the results are undefined.\r | |
380 | \r | |
381 | If Destination is NULL, then ASSERT().\r | |
382 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
383 | If Length > 0 and Source is NULL, then ASSERT().\r | |
384 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
385 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 386 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
387 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 388 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
50c247fd | 389 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 390 | Null-terminator, then ASSERT().\r |
391 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
50c247fd | 392 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 393 | Null-terminator, then ASSERT().\r |
394 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
50c247fd | 395 | and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r |
396 | Unicode characters, not including the Null-terminator, then ASSERT().\r | |
ac644614 | 397 | \r |
398 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
399 | @param Source Pointer to a Null-terminated Unicode string.\r | |
400 | @param Length Maximum number of Unicode characters to concatenate from\r | |
401 | Source.\r | |
402 | \r | |
9aa049d9 | 403 | @return Destination.\r |
ac644614 | 404 | \r |
405 | **/\r | |
406 | CHAR16 *\r | |
407 | EFIAPI\r | |
408 | StrnCat (\r | |
409 | IN OUT CHAR16 *Destination,\r | |
410 | IN CONST CHAR16 *Source,\r | |
411 | IN UINTN Length\r | |
412 | );\r | |
413 | \r | |
414 | /**\r | |
9aa049d9 | 415 | Returns the first occurrence of a Null-terminated Unicode sub-string\r |
ac644614 | 416 | in a Null-terminated Unicode string.\r |
417 | \r | |
418 | This function scans the contents of the Null-terminated Unicode string\r | |
419 | specified by String and returns the first occurrence of SearchString.\r | |
420 | If SearchString is not found in String, then NULL is returned. If\r | |
421 | the length of SearchString is zero, then String is\r | |
422 | returned.\r | |
423 | \r | |
424 | If String is NULL, then ASSERT().\r | |
425 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
426 | If SearchString is NULL, then ASSERT().\r | |
427 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
428 | \r | |
429 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r | |
430 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
431 | characters not including the Null-terminator, then ASSERT().\r | |
432 | \r | |
17f695ed | 433 | @param String Pointer to a Null-terminated Unicode string.\r |
434 | @param SearchString Pointer to a Null-terminated Unicode string to search for.\r | |
ac644614 | 435 | \r |
436 | @retval NULL If the SearchString does not appear in String.\r | |
1106ffe1 | 437 | @return others If there is a match.\r |
ac644614 | 438 | \r |
439 | **/\r | |
440 | CHAR16 *\r | |
441 | EFIAPI\r | |
442 | StrStr (\r | |
17f695ed | 443 | IN CONST CHAR16 *String,\r |
444 | IN CONST CHAR16 *SearchString\r | |
ac644614 | 445 | );\r |
446 | \r | |
447 | /**\r | |
448 | Convert a Null-terminated Unicode decimal string to a value of\r | |
449 | type UINTN.\r | |
450 | \r | |
451 | This function returns a value of type UINTN by interpreting the contents\r | |
452 | of the Unicode string specified by String as a decimal number. The format\r | |
453 | of the input Unicode string String is:\r | |
454 | \r | |
455 | [spaces] [decimal digits].\r | |
456 | \r | |
457 | The valid decimal digit character is in the range [0-9]. The\r | |
458 | function will ignore the pad space, which includes spaces or\r | |
459 | tab characters, before [decimal digits]. The running zero in the\r | |
460 | beginning of [decimal digits] will be ignored. Then, the function\r | |
461 | stops at the first character that is a not a valid decimal character\r | |
462 | or a Null-terminator, whichever one comes first.\r | |
463 | \r | |
464 | If String is NULL, then ASSERT().\r | |
465 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
466 | If String has only pad spaces, then 0 is returned.\r | |
467 | If String has no pad spaces or valid decimal digits,\r | |
468 | then 0 is returned.\r | |
469 | If the number represented by String overflows according\r | |
470 | to the range defined by UINTN, then ASSERT().\r | |
471 | \r | |
472 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
473 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
474 | the Null-terminator, then ASSERT().\r | |
475 | \r | |
17f695ed | 476 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 477 | \r |
38bbd3d9 | 478 | @retval Value translated from String.\r |
ac644614 | 479 | \r |
480 | **/\r | |
481 | UINTN\r | |
482 | EFIAPI\r | |
483 | StrDecimalToUintn (\r | |
17f695ed | 484 | IN CONST CHAR16 *String\r |
ac644614 | 485 | );\r |
486 | \r | |
487 | /**\r | |
488 | Convert a Null-terminated Unicode decimal string to a value of\r | |
489 | type UINT64.\r | |
490 | \r | |
491 | This function returns a value of type UINT64 by interpreting the contents\r | |
492 | of the Unicode string specified by String as a decimal number. The format\r | |
493 | of the input Unicode string String is:\r | |
494 | \r | |
495 | [spaces] [decimal digits].\r | |
496 | \r | |
497 | The valid decimal digit character is in the range [0-9]. The\r | |
498 | function will ignore the pad space, which includes spaces or\r | |
499 | tab characters, before [decimal digits]. The running zero in the\r | |
500 | beginning of [decimal digits] will be ignored. Then, the function\r | |
501 | stops at the first character that is a not a valid decimal character\r | |
502 | or a Null-terminator, whichever one comes first.\r | |
503 | \r | |
504 | If String is NULL, then ASSERT().\r | |
505 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
506 | If String has only pad spaces, then 0 is returned.\r | |
507 | If String has no pad spaces or valid decimal digits,\r | |
508 | then 0 is returned.\r | |
509 | If the number represented by String overflows according\r | |
510 | to the range defined by UINT64, then ASSERT().\r | |
511 | \r | |
512 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
513 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
514 | the Null-terminator, then ASSERT().\r | |
515 | \r | |
17f695ed | 516 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 517 | \r |
38bbd3d9 | 518 | @retval Value translated from String.\r |
ac644614 | 519 | \r |
520 | **/\r | |
521 | UINT64\r | |
522 | EFIAPI\r | |
523 | StrDecimalToUint64 (\r | |
17f695ed | 524 | IN CONST CHAR16 *String\r |
ac644614 | 525 | );\r |
526 | \r | |
527 | \r | |
528 | /**\r | |
529 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
530 | \r | |
531 | This function returns a value of type UINTN by interpreting the contents\r | |
532 | of the Unicode string specified by String as a hexadecimal number.\r | |
533 | The format of the input Unicode string String is:\r | |
534 | \r | |
535 | [spaces][zeros][x][hexadecimal digits].\r | |
536 | \r | |
537 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
538 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
539 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
540 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
541 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
542 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
543 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
544 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
545 | \r | |
546 | If String is NULL, then ASSERT().\r | |
547 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
548 | If String has only pad spaces, then zero is returned.\r | |
549 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
550 | then zero is returned.\r | |
551 | If the number represented by String overflows according to the range defined by\r | |
552 | UINTN, then ASSERT().\r | |
553 | \r | |
554 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
555 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
556 | then ASSERT().\r | |
557 | \r | |
17f695ed | 558 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 559 | \r |
38bbd3d9 | 560 | @retval Value translated from String.\r |
ac644614 | 561 | \r |
562 | **/\r | |
563 | UINTN\r | |
564 | EFIAPI\r | |
565 | StrHexToUintn (\r | |
17f695ed | 566 | IN CONST CHAR16 *String\r |
ac644614 | 567 | );\r |
568 | \r | |
569 | \r | |
570 | /**\r | |
571 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
572 | \r | |
573 | This function returns a value of type UINT64 by interpreting the contents\r | |
574 | of the Unicode string specified by String as a hexadecimal number.\r | |
575 | The format of the input Unicode string String is\r | |
576 | \r | |
577 | [spaces][zeros][x][hexadecimal digits].\r | |
578 | \r | |
579 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
580 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
581 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
582 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
583 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
584 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
585 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
586 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
587 | \r | |
588 | If String is NULL, then ASSERT().\r | |
589 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
590 | If String has only pad spaces, then zero is returned.\r | |
591 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
592 | then zero is returned.\r | |
593 | If the number represented by String overflows according to the range defined by\r | |
594 | UINT64, then ASSERT().\r | |
595 | \r | |
596 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
597 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
598 | then ASSERT().\r | |
599 | \r | |
17f695ed | 600 | @param String Pointer to a Null-terminated Unicode string.\r |
ac644614 | 601 | \r |
38bbd3d9 | 602 | @retval Value translated from String.\r |
ac644614 | 603 | \r |
604 | **/\r | |
605 | UINT64\r | |
606 | EFIAPI\r | |
607 | StrHexToUint64 (\r | |
17f695ed | 608 | IN CONST CHAR16 *String\r |
ac644614 | 609 | );\r |
610 | \r | |
ac644614 | 611 | /**\r |
17f695ed | 612 | Convert a Null-terminated Unicode string to a Null-terminated\r |
ac644614 | 613 | ASCII string and returns the ASCII string.\r |
614 | \r | |
615 | This function converts the content of the Unicode string Source\r | |
616 | to the ASCII string Destination by copying the lower 8 bits of\r | |
617 | each Unicode character. It returns Destination.\r | |
618 | \r | |
619 | If any Unicode characters in Source contain non-zero value in\r | |
620 | the upper 8 bits, then ASSERT().\r | |
621 | \r | |
622 | If Destination is NULL, then ASSERT().\r | |
623 | If Source is NULL, then ASSERT().\r | |
624 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
625 | If Source and Destination overlap, then ASSERT().\r | |
626 | \r | |
627 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
628 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
629 | the Null-terminator, then ASSERT().\r | |
630 | \r | |
631 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
632 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
633 | Null-terminator, then ASSERT().\r | |
634 | \r | |
635 | @param Source Pointer to a Null-terminated Unicode string.\r | |
636 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
637 | \r | |
9aa049d9 | 638 | @return Destination.\r |
ac644614 | 639 | \r |
640 | **/\r | |
641 | CHAR8 *\r | |
642 | EFIAPI\r | |
643 | UnicodeStrToAsciiStr (\r | |
17f695ed | 644 | IN CONST CHAR16 *Source,\r |
645 | OUT CHAR8 *Destination\r | |
ac644614 | 646 | );\r |
647 | \r | |
648 | \r | |
649 | /**\r | |
650 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
651 | string and returns the new ASCII string.\r | |
652 | \r | |
653 | This function copies the contents of the ASCII string Source to the ASCII\r | |
654 | string Destination, and returns Destination. If Source and Destination\r | |
655 | overlap, then the results are undefined.\r | |
656 | \r | |
657 | If Destination is NULL, then ASSERT().\r | |
658 | If Source is NULL, then ASSERT().\r | |
659 | If Source and Destination overlap, then ASSERT().\r | |
660 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
661 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
662 | then ASSERT().\r | |
663 | \r | |
664 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
665 | @param Source Pointer to a Null-terminated ASCII string.\r | |
666 | \r | |
667 | @return Destination\r | |
668 | \r | |
669 | **/\r | |
670 | CHAR8 *\r | |
671 | EFIAPI\r | |
672 | AsciiStrCpy (\r | |
673 | OUT CHAR8 *Destination,\r | |
674 | IN CONST CHAR8 *Source\r | |
675 | );\r | |
676 | \r | |
677 | \r | |
678 | /**\r | |
17f695ed | 679 | Copies up to a specified length one Null-terminated ASCII string to another \r |
680 | Null-terminated ASCII string and returns the new ASCII string.\r | |
ac644614 | 681 | \r |
682 | This function copies the contents of the ASCII string Source to the ASCII\r | |
683 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
684 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
685 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
686 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
687 | and Destination overlap, then the results are undefined.\r | |
688 | \r | |
689 | If Destination is NULL, then ASSERT().\r | |
690 | If Source is NULL, then ASSERT().\r | |
691 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 692 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
693 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 694 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
50c247fd | 695 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 696 | then ASSERT().\r |
697 | \r | |
698 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
699 | @param Source Pointer to a Null-terminated ASCII string.\r | |
700 | @param Length Maximum number of ASCII characters to copy.\r | |
701 | \r | |
702 | @return Destination\r | |
703 | \r | |
704 | **/\r | |
705 | CHAR8 *\r | |
706 | EFIAPI\r | |
707 | AsciiStrnCpy (\r | |
708 | OUT CHAR8 *Destination,\r | |
709 | IN CONST CHAR8 *Source,\r | |
710 | IN UINTN Length\r | |
711 | );\r | |
712 | \r | |
713 | \r | |
714 | /**\r | |
715 | Returns the length of a Null-terminated ASCII string.\r | |
716 | \r | |
717 | This function returns the number of ASCII characters in the Null-terminated\r | |
718 | ASCII string specified by String.\r | |
719 | \r | |
720 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
721 | If Length > 0 and Source is NULL, then ASSERT().\r | |
722 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
723 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
724 | then ASSERT().\r | |
725 | \r | |
726 | @param String Pointer to a Null-terminated ASCII string.\r | |
727 | \r | |
728 | @return The length of String.\r | |
729 | \r | |
730 | **/\r | |
731 | UINTN\r | |
732 | EFIAPI\r | |
733 | AsciiStrLen (\r | |
734 | IN CONST CHAR8 *String\r | |
735 | );\r | |
736 | \r | |
737 | \r | |
738 | /**\r | |
739 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
740 | Null terminator.\r | |
741 | \r | |
742 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
743 | specified by String.\r | |
744 | \r | |
745 | If String is NULL, then ASSERT().\r | |
746 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
747 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
748 | then ASSERT().\r | |
749 | \r | |
750 | @param String Pointer to a Null-terminated ASCII string.\r | |
751 | \r | |
752 | @return The size of String.\r | |
753 | \r | |
754 | **/\r | |
755 | UINTN\r | |
756 | EFIAPI\r | |
757 | AsciiStrSize (\r | |
758 | IN CONST CHAR8 *String\r | |
759 | );\r | |
760 | \r | |
761 | \r | |
762 | /**\r | |
763 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
764 | between the first mismatched ASCII characters.\r | |
765 | \r | |
766 | This function compares the Null-terminated ASCII string FirstString to the\r | |
767 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
768 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
769 | mismatched ASCII character in SecondString subtracted from the first\r | |
770 | mismatched ASCII character in FirstString.\r | |
771 | \r | |
772 | If FirstString is NULL, then ASSERT().\r | |
773 | If SecondString is NULL, then ASSERT().\r | |
774 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
775 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
776 | then ASSERT().\r | |
777 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
778 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
779 | Null-terminator, then ASSERT().\r | |
780 | \r | |
781 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
782 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
783 | \r | |
17f695ed | 784 | @retval ==0 FirstString is identical to SecondString.\r |
785 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 786 | \r |
787 | **/\r | |
788 | INTN\r | |
789 | EFIAPI\r | |
790 | AsciiStrCmp (\r | |
791 | IN CONST CHAR8 *FirstString,\r | |
792 | IN CONST CHAR8 *SecondString\r | |
793 | );\r | |
794 | \r | |
795 | \r | |
796 | /**\r | |
797 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
798 | and returns the difference between the first mismatched ASCII characters.\r | |
799 | \r | |
800 | This function performs a case insensitive comparison of the Null-terminated\r | |
801 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
802 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
803 | value returned is the first mismatched lower case ASCII character in\r | |
804 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
805 | in FirstString.\r | |
806 | \r | |
807 | If FirstString is NULL, then ASSERT().\r | |
808 | If SecondString is NULL, then ASSERT().\r | |
809 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
810 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
811 | then ASSERT().\r | |
812 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
813 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
814 | Null-terminator, then ASSERT().\r | |
815 | \r | |
816 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
817 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
818 | \r | |
17f695ed | 819 | @retval ==0 FirstString is identical to SecondString using case insensitive\r |
1106ffe1 | 820 | comparisons.\r |
17f695ed | 821 | @retval !=0 FirstString is not identical to SecondString using case\r |
1106ffe1 | 822 | insensitive comparisons.\r |
ac644614 | 823 | \r |
824 | **/\r | |
825 | INTN\r | |
826 | EFIAPI\r | |
827 | AsciiStriCmp (\r | |
828 | IN CONST CHAR8 *FirstString,\r | |
829 | IN CONST CHAR8 *SecondString\r | |
830 | );\r | |
831 | \r | |
832 | \r | |
833 | /**\r | |
834 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
835 | the difference between the first mismatched ASCII characters.\r | |
836 | \r | |
837 | This function compares the Null-terminated ASCII string FirstString to the\r | |
838 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
839 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
840 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
841 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
842 | first mismatched ASCII character in FirstString.\r | |
843 | \r | |
844 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
845 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
50c247fd | 846 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
847 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
848 | If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r | |
849 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 850 | then ASSERT().\r |
50c247fd | 851 | If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r |
852 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 853 | then ASSERT().\r |
854 | \r | |
855 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
856 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
857 | @param Length Maximum number of ASCII characters for compare.\r | |
858 | \r | |
17f695ed | 859 | @retval ==0 FirstString is identical to SecondString.\r |
860 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 861 | \r |
862 | **/\r | |
863 | INTN\r | |
864 | EFIAPI\r | |
865 | AsciiStrnCmp (\r | |
866 | IN CONST CHAR8 *FirstString,\r | |
867 | IN CONST CHAR8 *SecondString,\r | |
868 | IN UINTN Length\r | |
869 | );\r | |
870 | \r | |
871 | \r | |
872 | /**\r | |
873 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
874 | ASCII string, and returns the concatenated ASCII string.\r | |
875 | \r | |
876 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
877 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
878 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
879 | String is returned.\r | |
880 | \r | |
881 | If Destination is NULL, then ASSERT().\r | |
882 | If Source is NULL, then ASSERT().\r | |
883 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
884 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
885 | then ASSERT().\r | |
886 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
887 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
888 | then ASSERT().\r | |
889 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
890 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
891 | ASCII characters, then ASSERT().\r | |
892 | \r | |
893 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
894 | @param Source Pointer to a Null-terminated ASCII string.\r | |
895 | \r | |
896 | @return Destination\r | |
897 | \r | |
898 | **/\r | |
899 | CHAR8 *\r | |
900 | EFIAPI\r | |
901 | AsciiStrCat (\r | |
902 | IN OUT CHAR8 *Destination,\r | |
903 | IN CONST CHAR8 *Source\r | |
904 | );\r | |
905 | \r | |
906 | \r | |
907 | /**\r | |
17f695ed | 908 | Concatenates up to a specified length one Null-terminated ASCII string to \r |
909 | the end of another Null-terminated ASCII string, and returns the \r | |
910 | concatenated ASCII string.\r | |
ac644614 | 911 | \r |
912 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
913 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
914 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
915 | Length ASCII characters are concatenated from Source to the end of\r | |
916 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
917 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
918 | the results are undefined.\r | |
919 | \r | |
920 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
921 | If Length > 0 and Source is NULL, then ASSERT().\r | |
922 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 923 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r |
924 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 925 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
50c247fd | 926 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 927 | then ASSERT().\r |
928 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
50c247fd | 929 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 930 | then ASSERT().\r |
931 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
932 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
50c247fd | 933 | ASCII characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 934 | \r |
935 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
936 | @param Source Pointer to a Null-terminated ASCII string.\r | |
937 | @param Length Maximum number of ASCII characters to concatenate from\r | |
938 | Source.\r | |
939 | \r | |
940 | @return Destination\r | |
941 | \r | |
942 | **/\r | |
943 | CHAR8 *\r | |
944 | EFIAPI\r | |
945 | AsciiStrnCat (\r | |
946 | IN OUT CHAR8 *Destination,\r | |
947 | IN CONST CHAR8 *Source,\r | |
948 | IN UINTN Length\r | |
949 | );\r | |
950 | \r | |
951 | \r | |
952 | /**\r | |
9aa049d9 | 953 | Returns the first occurrence of a Null-terminated ASCII sub-string\r |
ac644614 | 954 | in a Null-terminated ASCII string.\r |
955 | \r | |
956 | This function scans the contents of the ASCII string specified by String\r | |
957 | and returns the first occurrence of SearchString. If SearchString is not\r | |
958 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
959 | then String is returned.\r | |
960 | \r | |
961 | If String is NULL, then ASSERT().\r | |
962 | If SearchString is NULL, then ASSERT().\r | |
963 | \r | |
964 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r | |
965 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
966 | not including the Null-terminator, then ASSERT().\r | |
967 | \r | |
1106ffe1 | 968 | @param String Pointer to a Null-terminated ASCII string.\r |
969 | @param SearchString Pointer to a Null-terminated ASCII string to search for.\r | |
ac644614 | 970 | \r |
971 | @retval NULL If the SearchString does not appear in String.\r | |
17f695ed | 972 | @retval others If there is a match return the first occurrence of SearchingString.\r |
9aa049d9 | 973 | If the length of SearchString is zero,return String.\r |
ac644614 | 974 | \r |
975 | **/\r | |
976 | CHAR8 *\r | |
977 | EFIAPI\r | |
978 | AsciiStrStr (\r | |
17f695ed | 979 | IN CONST CHAR8 *String,\r |
980 | IN CONST CHAR8 *SearchString\r | |
ac644614 | 981 | );\r |
982 | \r | |
983 | \r | |
984 | /**\r | |
985 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
986 | UINTN.\r | |
987 | \r | |
988 | This function returns a value of type UINTN by interpreting the contents\r | |
989 | of the ASCII string String as a decimal number. The format of the input\r | |
990 | ASCII string String is:\r | |
991 | \r | |
992 | [spaces] [decimal digits].\r | |
993 | \r | |
994 | The valid decimal digit character is in the range [0-9]. The function will\r | |
995 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
996 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
997 | function stops at the first character that is a not a valid decimal character or\r | |
998 | Null-terminator, whichever on comes first.\r | |
999 | \r | |
1000 | If String has only pad spaces, then 0 is returned.\r | |
1001 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1002 | If the number represented by String overflows according to the range defined by\r | |
1003 | UINTN, then ASSERT().\r | |
1004 | If String is NULL, then ASSERT().\r | |
1005 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1006 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1007 | then ASSERT().\r | |
1008 | \r | |
17f695ed | 1009 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1010 | \r |
38bbd3d9 | 1011 | @retval Value translated from String.\r |
ac644614 | 1012 | \r |
1013 | **/\r | |
1014 | UINTN\r | |
1015 | EFIAPI\r | |
1016 | AsciiStrDecimalToUintn (\r | |
1017 | IN CONST CHAR8 *String\r | |
1018 | );\r | |
1019 | \r | |
1020 | \r | |
1021 | /**\r | |
1022 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1023 | UINT64.\r | |
1024 | \r | |
1025 | This function returns a value of type UINT64 by interpreting the contents\r | |
1026 | of the ASCII string String as a decimal number. The format of the input\r | |
1027 | ASCII string String is:\r | |
1028 | \r | |
1029 | [spaces] [decimal digits].\r | |
1030 | \r | |
1031 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1032 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1033 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1034 | function stops at the first character that is a not a valid decimal character or\r | |
1035 | Null-terminator, whichever on comes first.\r | |
1036 | \r | |
1037 | If String has only pad spaces, then 0 is returned.\r | |
1038 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1039 | If the number represented by String overflows according to the range defined by\r | |
1040 | UINT64, then ASSERT().\r | |
1041 | If String is NULL, then ASSERT().\r | |
1042 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1043 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1044 | then ASSERT().\r | |
1045 | \r | |
17f695ed | 1046 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1047 | \r |
38bbd3d9 | 1048 | @retval Value translated from String.\r |
ac644614 | 1049 | \r |
1050 | **/\r | |
1051 | UINT64\r | |
1052 | EFIAPI\r | |
1053 | AsciiStrDecimalToUint64 (\r | |
17f695ed | 1054 | IN CONST CHAR8 *String\r |
ac644614 | 1055 | );\r |
1056 | \r | |
1057 | \r | |
1058 | /**\r | |
1059 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
1060 | \r | |
1061 | This function returns a value of type UINTN by interpreting the contents of\r | |
1062 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1063 | string String is:\r | |
1064 | \r | |
1065 | [spaces][zeros][x][hexadecimal digits].\r | |
1066 | \r | |
1067 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1068 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1069 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1070 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1071 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1072 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1073 | digit. Then, the function stops at the first character that is a not a valid\r | |
1074 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1075 | \r | |
1076 | If String has only pad spaces, then 0 is returned.\r | |
1077 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1078 | 0 is returned.\r | |
1079 | \r | |
1080 | If the number represented by String overflows according to the range defined by UINTN,\r | |
1081 | then ASSERT().\r | |
1082 | If String is NULL, then ASSERT().\r | |
1083 | If PcdMaximumAsciiStringLength is not zero,\r | |
1084 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1085 | the Null-terminator, then ASSERT().\r | |
1086 | \r | |
17f695ed | 1087 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1088 | \r |
38bbd3d9 | 1089 | @retval Value translated from String.\r |
ac644614 | 1090 | \r |
1091 | **/\r | |
1092 | UINTN\r | |
1093 | EFIAPI\r | |
1094 | AsciiStrHexToUintn (\r | |
17f695ed | 1095 | IN CONST CHAR8 *String\r |
ac644614 | 1096 | );\r |
1097 | \r | |
1098 | \r | |
1099 | /**\r | |
1100 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
1101 | \r | |
1102 | This function returns a value of type UINT64 by interpreting the contents of\r | |
1103 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1104 | string String is:\r | |
1105 | \r | |
1106 | [spaces][zeros][x][hexadecimal digits].\r | |
1107 | \r | |
1108 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1109 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1110 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1111 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1112 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1113 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1114 | digit. Then, the function stops at the first character that is a not a valid\r | |
1115 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1116 | \r | |
1117 | If String has only pad spaces, then 0 is returned.\r | |
1118 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1119 | 0 is returned.\r | |
1120 | \r | |
1121 | If the number represented by String overflows according to the range defined by UINT64,\r | |
1122 | then ASSERT().\r | |
1123 | If String is NULL, then ASSERT().\r | |
1124 | If PcdMaximumAsciiStringLength is not zero,\r | |
1125 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1126 | the Null-terminator, then ASSERT().\r | |
1127 | \r | |
17f695ed | 1128 | @param String Pointer to a Null-terminated ASCII string.\r |
ac644614 | 1129 | \r |
38bbd3d9 | 1130 | @retval Value translated from String.\r |
ac644614 | 1131 | \r |
1132 | **/\r | |
1133 | UINT64\r | |
1134 | EFIAPI\r | |
1135 | AsciiStrHexToUint64 (\r | |
17f695ed | 1136 | IN CONST CHAR8 *String\r |
ac644614 | 1137 | );\r |
1138 | \r | |
1139 | \r | |
1140 | /**\r | |
1141 | Convert one Null-terminated ASCII string to a Null-terminated\r | |
1142 | Unicode string and returns the Unicode string.\r | |
1143 | \r | |
1144 | This function converts the contents of the ASCII string Source to the Unicode\r | |
1145 | string Destination, and returns Destination. The function terminates the\r | |
1146 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
1147 | The caller is responsible to make sure Destination points to a buffer with size\r | |
1148 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r | |
1149 | \r | |
1150 | If Destination is NULL, then ASSERT().\r | |
1151 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
1152 | If Source is NULL, then ASSERT().\r | |
1153 | If Source and Destination overlap, then ASSERT().\r | |
1154 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
1155 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1156 | then ASSERT().\r | |
1157 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
1158 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
1159 | Null-terminator, then ASSERT().\r | |
1160 | \r | |
1161 | @param Source Pointer to a Null-terminated ASCII string.\r | |
1162 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
1163 | \r | |
9aa049d9 | 1164 | @return Destination.\r |
ac644614 | 1165 | \r |
1166 | **/\r | |
1167 | CHAR16 *\r | |
1168 | EFIAPI\r | |
1169 | AsciiStrToUnicodeStr (\r | |
17f695ed | 1170 | IN CONST CHAR8 *Source,\r |
1171 | OUT CHAR16 *Destination\r | |
ac644614 | 1172 | );\r |
1173 | \r | |
1174 | \r | |
1175 | /**\r | |
1176 | Converts an 8-bit value to an 8-bit BCD value.\r | |
1177 | \r | |
1178 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
1179 | returned.\r | |
1180 | \r | |
1181 | If Value >= 100, then ASSERT().\r | |
1182 | \r | |
1183 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
1184 | \r | |
9aa049d9 | 1185 | @return The BCD value.\r |
ac644614 | 1186 | \r |
1187 | **/\r | |
1188 | UINT8\r | |
1189 | EFIAPI\r | |
1190 | DecimalToBcd8 (\r | |
1191 | IN UINT8 Value\r | |
1192 | );\r | |
1193 | \r | |
1194 | \r | |
1195 | /**\r | |
1196 | Converts an 8-bit BCD value to an 8-bit value.\r | |
1197 | \r | |
1198 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
1199 | value is returned.\r | |
1200 | \r | |
1201 | If Value >= 0xA0, then ASSERT().\r | |
1202 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
1203 | \r | |
1204 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
1205 | \r | |
1206 | @return The 8-bit value is returned.\r | |
1207 | \r | |
1208 | **/\r | |
1209 | UINT8\r | |
1210 | EFIAPI\r | |
1211 | BcdToDecimal8 (\r | |
1212 | IN UINT8 Value\r | |
1213 | );\r | |
1214 | \r | |
1215 | \r | |
1216 | //\r | |
1217 | // Linked List Functions and Macros\r | |
1218 | //\r | |
1219 | \r | |
1220 | /**\r | |
1221 | Initializes the head node of a doubly linked list that is declared as a\r | |
1222 | global variable in a module.\r | |
1223 | \r | |
1224 | Initializes the forward and backward links of a new linked list. After\r | |
1225 | initializing a linked list with this macro, the other linked list functions\r | |
1226 | may be used to add and remove nodes from the linked list. This macro results\r | |
1227 | in smaller executables by initializing the linked list in the data section,\r | |
1228 | instead if calling the InitializeListHead() function to perform the\r | |
1229 | equivalent operation.\r | |
1230 | \r | |
77f863ee | 1231 | @param ListHead The head note of a list to initialize.\r |
ac644614 | 1232 | \r |
1233 | **/\r | |
17f695ed | 1234 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r |
ac644614 | 1235 | \r |
1236 | \r | |
1237 | /**\r | |
1238 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
1239 | the head node of the doubly linked list.\r | |
1240 | \r | |
1241 | Initializes the forward and backward links of a new linked list. After\r | |
1242 | initializing a linked list with this function, the other linked list\r | |
1243 | functions may be used to add and remove nodes from the linked list. It is up\r | |
1244 | to the caller of this function to allocate the memory for ListHead.\r | |
1245 | \r | |
1246 | If ListHead is NULL, then ASSERT().\r | |
1247 | \r | |
1248 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
1249 | \r | |
1250 | @return ListHead\r | |
1251 | \r | |
1252 | **/\r | |
1253 | LIST_ENTRY *\r | |
1254 | EFIAPI\r | |
1255 | InitializeListHead (\r | |
aa0583c7 | 1256 | IN OUT LIST_ENTRY *ListHead\r |
ac644614 | 1257 | );\r |
1258 | \r | |
1259 | \r | |
1260 | /**\r | |
1261 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
1262 | to the head node of the doubly linked list.\r | |
1263 | \r | |
1264 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
1265 | ListHead, and returns ListHead.\r | |
1266 | \r | |
1267 | If ListHead is NULL, then ASSERT().\r | |
1268 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1269 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1270 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1271 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
1272 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1273 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1274 | \r | |
1275 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1276 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
1277 | of a doubly linked list.\r | |
1278 | \r | |
1279 | @return ListHead\r | |
1280 | \r | |
1281 | **/\r | |
1282 | LIST_ENTRY *\r | |
1283 | EFIAPI\r | |
1284 | InsertHeadList (\r | |
aa0583c7 | 1285 | IN OUT LIST_ENTRY *ListHead,\r |
1286 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1287 | );\r |
1288 | \r | |
1289 | \r | |
1290 | /**\r | |
1291 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
1292 | the head node of the doubly linked list.\r | |
1293 | \r | |
1294 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
1295 | and returns ListHead.\r | |
1296 | \r | |
1297 | If ListHead is NULL, then ASSERT().\r | |
1298 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1299 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1300 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1301 | If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r |
1302 | of nodes in ListHead, including the ListHead node, is greater than or\r | |
1303 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1304 | \r | |
1305 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1306 | @param Entry A pointer to a node that is to be added at the end of the\r | |
1307 | doubly linked list.\r | |
1308 | \r | |
1309 | @return ListHead\r | |
1310 | \r | |
1311 | **/\r | |
1312 | LIST_ENTRY *\r | |
1313 | EFIAPI\r | |
1314 | InsertTailList (\r | |
aa0583c7 | 1315 | IN OUT LIST_ENTRY *ListHead,\r |
1316 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1317 | );\r |
1318 | \r | |
1319 | \r | |
1320 | /**\r | |
1321 | Retrieves the first node of a doubly linked list.\r | |
1322 | \r | |
17f695ed | 1323 | Returns the first node of a doubly linked list. List must have been \r |
1324 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r | |
1325 | If List is empty, then List is returned.\r | |
ac644614 | 1326 | \r |
1327 | If List is NULL, then ASSERT().\r | |
17f695ed | 1328 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1329 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1330 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1331 | in List, including the List node, is greater than or equal to\r | |
1332 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1333 | \r | |
1334 | @param List A pointer to the head node of a doubly linked list.\r | |
1335 | \r | |
1336 | @return The first node of a doubly linked list.\r | |
1337 | @retval NULL The list is empty.\r | |
1338 | \r | |
1339 | **/\r | |
1340 | LIST_ENTRY *\r | |
1341 | EFIAPI\r | |
1342 | GetFirstNode (\r | |
1343 | IN CONST LIST_ENTRY *List\r | |
1344 | );\r | |
1345 | \r | |
1346 | \r | |
1347 | /**\r | |
1348 | Retrieves the next node of a doubly linked list.\r | |
1349 | \r | |
17f695ed | 1350 | Returns the node of a doubly linked list that follows Node. \r |
1351 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1352 | or InitializeListHead(). If List is empty, then List is returned.\r | |
ac644614 | 1353 | \r |
1354 | If List is NULL, then ASSERT().\r | |
1355 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1356 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1357 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1358 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r |
1359 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
1360 | If Node is not a node in List, then ASSERT().\r | |
1361 | \r | |
1362 | @param List A pointer to the head node of a doubly linked list.\r | |
1363 | @param Node A pointer to a node in the doubly linked list.\r | |
1364 | \r | |
1365 | @return Pointer to the next node if one exists. Otherwise a null value which\r | |
1366 | is actually List is returned.\r | |
1367 | \r | |
1368 | **/\r | |
1369 | LIST_ENTRY *\r | |
1370 | EFIAPI\r | |
1371 | GetNextNode (\r | |
1372 | IN CONST LIST_ENTRY *List,\r | |
1373 | IN CONST LIST_ENTRY *Node\r | |
1374 | );\r | |
1375 | \r | |
1376 | \r | |
1377 | /**\r | |
1378 | Checks to see if a doubly linked list is empty or not.\r | |
1379 | \r | |
1380 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
1381 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
1382 | \r | |
1383 | If ListHead is NULL, then ASSERT().\r | |
17f695ed | 1384 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1385 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1386 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1387 | in List, including the List node, is greater than or equal to\r | |
1388 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1389 | \r | |
1390 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1391 | \r | |
1392 | @retval TRUE The linked list is empty.\r | |
1393 | @retval FALSE The linked list is not empty.\r | |
1394 | \r | |
1395 | **/\r | |
1396 | BOOLEAN\r | |
1397 | EFIAPI\r | |
1398 | IsListEmpty (\r | |
1399 | IN CONST LIST_ENTRY *ListHead\r | |
1400 | );\r | |
1401 | \r | |
1402 | \r | |
1403 | /**\r | |
aa0583c7 | 1404 | Determines if a node in a doubly linked list is the head node of a the same\r |
1405 | doubly linked list. This function is typically used to terminate a loop that\r | |
1406 | traverses all the nodes in a doubly linked list starting with the head node.\r | |
ac644614 | 1407 | \r |
aa0583c7 | 1408 | Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r |
1409 | nodes in the doubly linked list specified by List. List must have been\r | |
17f695ed | 1410 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1411 | \r |
1412 | If List is NULL, then ASSERT().\r | |
1413 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1414 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r |
1415 | then ASSERT().\r | |
ac644614 | 1416 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1417 | in List, including the List node, is greater than or equal to\r | |
1418 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1419 | If Node is not a node in List and Node is not equal to List, then ASSERT().\r | |
1420 | \r | |
1421 | @param List A pointer to the head node of a doubly linked list.\r | |
1422 | @param Node A pointer to a node in the doubly linked list.\r | |
1423 | \r | |
1424 | @retval TRUE Node is one of the nodes in the doubly linked list.\r | |
1425 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r | |
1426 | \r | |
1427 | **/\r | |
1428 | BOOLEAN\r | |
1429 | EFIAPI\r | |
1430 | IsNull (\r | |
1431 | IN CONST LIST_ENTRY *List,\r | |
1432 | IN CONST LIST_ENTRY *Node\r | |
1433 | );\r | |
1434 | \r | |
1435 | \r | |
1436 | /**\r | |
1437 | Determines if a node the last node in a doubly linked list.\r | |
1438 | \r | |
1439 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
1440 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
17f695ed | 1441 | INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1442 | \r |
1443 | If List is NULL, then ASSERT().\r | |
1444 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1445 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1446 | InitializeListHead(), then ASSERT().\r | |
ac644614 | 1447 | If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r |
1448 | in List, including the List node, is greater than or equal to\r | |
1449 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1450 | If Node is not a node in List, then ASSERT().\r | |
1451 | \r | |
1452 | @param List A pointer to the head node of a doubly linked list.\r | |
1453 | @param Node A pointer to a node in the doubly linked list.\r | |
1454 | \r | |
1455 | @retval TRUE Node is the last node in the linked list.\r | |
1456 | @retval FALSE Node is not the last node in the linked list.\r | |
1457 | \r | |
1458 | **/\r | |
1459 | BOOLEAN\r | |
1460 | EFIAPI\r | |
1461 | IsNodeAtEnd (\r | |
1462 | IN CONST LIST_ENTRY *List,\r | |
1463 | IN CONST LIST_ENTRY *Node\r | |
1464 | );\r | |
1465 | \r | |
1466 | \r | |
1467 | /**\r | |
1468 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
1469 | first node after the swap.\r | |
1470 | \r | |
1471 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
1472 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
1473 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
1474 | same double linked list as FirstEntry and that double linked list must have\r | |
17f695ed | 1475 | been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r |
1476 | SecondEntry is returned after the nodes are swapped.\r | |
ac644614 | 1477 | \r |
1478 | If FirstEntry is NULL, then ASSERT().\r | |
1479 | If SecondEntry is NULL, then ASSERT().\r | |
1480 | If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r | |
1481 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1482 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
1483 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
1484 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1485 | \r | |
1486 | @param FirstEntry A pointer to a node in a linked list.\r | |
1487 | @param SecondEntry A pointer to another node in the same linked list.\r | |
38bbd3d9 | 1488 | \r |
9aa049d9 | 1489 | @return SecondEntry.\r |
ac644614 | 1490 | \r |
1491 | **/\r | |
1492 | LIST_ENTRY *\r | |
1493 | EFIAPI\r | |
1494 | SwapListEntries (\r | |
aa0583c7 | 1495 | IN OUT LIST_ENTRY *FirstEntry,\r |
1496 | IN OUT LIST_ENTRY *SecondEntry\r | |
ac644614 | 1497 | );\r |
1498 | \r | |
1499 | \r | |
1500 | /**\r | |
1501 | Removes a node from a doubly linked list, and returns the node that follows\r | |
1502 | the removed node.\r | |
1503 | \r | |
1504 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
1505 | this function to release the memory used by this node if that is required. On\r | |
1506 | exit, the node following Entry in the doubly linked list is returned. If\r | |
1507 | Entry is the only node in the linked list, then the head node of the linked\r | |
1508 | list is returned.\r | |
1509 | \r | |
1510 | If Entry is NULL, then ASSERT().\r | |
1511 | If Entry is the head node of an empty list, then ASSERT().\r | |
1512 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1513 | linked list containing Entry, including the Entry node, is greater than\r | |
1514 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1515 | \r | |
9aa049d9 | 1516 | @param Entry A pointer to a node in a linked list.\r |
ac644614 | 1517 | \r |
9aa049d9 | 1518 | @return Entry.\r |
ac644614 | 1519 | \r |
1520 | **/\r | |
1521 | LIST_ENTRY *\r | |
1522 | EFIAPI\r | |
1523 | RemoveEntryList (\r | |
1524 | IN CONST LIST_ENTRY *Entry\r | |
1525 | );\r | |
1526 | \r | |
1527 | //\r | |
1528 | // Math Services\r | |
1529 | //\r | |
1530 | \r | |
1531 | /**\r | |
1532 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
1533 | with zeros. The shifted value is returned.\r | |
1534 | \r | |
1535 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
1536 | low Count bits are set to zero. The shifted value is returned.\r | |
1537 | \r | |
1538 | If Count is greater than 63, then ASSERT().\r | |
1539 | \r | |
1540 | @param Operand The 64-bit operand to shift left.\r | |
1541 | @param Count The number of bits to shift left.\r | |
1542 | \r | |
9aa049d9 | 1543 | @return Operand << Count.\r |
ac644614 | 1544 | \r |
1545 | **/\r | |
1546 | UINT64\r | |
1547 | EFIAPI\r | |
1548 | LShiftU64 (\r | |
1549 | IN UINT64 Operand,\r | |
1550 | IN UINTN Count\r | |
1551 | );\r | |
1552 | \r | |
1553 | \r | |
1554 | /**\r | |
1555 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
1556 | filled with zeros. The shifted value is returned.\r | |
1557 | \r | |
1558 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1559 | high Count bits are set to zero. The shifted value is returned.\r | |
1560 | \r | |
1561 | If Count is greater than 63, then ASSERT().\r | |
1562 | \r | |
1563 | @param Operand The 64-bit operand to shift right.\r | |
1564 | @param Count The number of bits to shift right.\r | |
1565 | \r | |
1566 | @return Operand >> Count\r | |
1567 | \r | |
1568 | **/\r | |
1569 | UINT64\r | |
1570 | EFIAPI\r | |
1571 | RShiftU64 (\r | |
1572 | IN UINT64 Operand,\r | |
1573 | IN UINTN Count\r | |
1574 | );\r | |
1575 | \r | |
1576 | \r | |
1577 | /**\r | |
1578 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
1579 | with original integer's bit 63. The shifted value is returned.\r | |
1580 | \r | |
1581 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1582 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
1583 | \r | |
1584 | If Count is greater than 63, then ASSERT().\r | |
1585 | \r | |
1586 | @param Operand The 64-bit operand to shift right.\r | |
1587 | @param Count The number of bits to shift right.\r | |
1588 | \r | |
1589 | @return Operand >> Count\r | |
1590 | \r | |
1591 | **/\r | |
1592 | UINT64\r | |
1593 | EFIAPI\r | |
1594 | ARShiftU64 (\r | |
1595 | IN UINT64 Operand,\r | |
1596 | IN UINTN Count\r | |
1597 | );\r | |
1598 | \r | |
1599 | \r | |
1600 | /**\r | |
1601 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
1602 | with the high bits that were rotated.\r | |
1603 | \r | |
1604 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
1605 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1606 | value is returned.\r | |
1607 | \r | |
1608 | If Count is greater than 31, then ASSERT().\r | |
1609 | \r | |
1610 | @param Operand The 32-bit operand to rotate left.\r | |
1611 | @param Count The number of bits to rotate left.\r | |
1612 | \r | |
17f695ed | 1613 | @return Operand << Count\r |
ac644614 | 1614 | \r |
1615 | **/\r | |
1616 | UINT32\r | |
1617 | EFIAPI\r | |
1618 | LRotU32 (\r | |
1619 | IN UINT32 Operand,\r | |
1620 | IN UINTN Count\r | |
1621 | );\r | |
1622 | \r | |
1623 | \r | |
1624 | /**\r | |
1625 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
1626 | with the low bits that were rotated.\r | |
1627 | \r | |
1628 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
1629 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1630 | value is returned.\r | |
1631 | \r | |
1632 | If Count is greater than 31, then ASSERT().\r | |
1633 | \r | |
1634 | @param Operand The 32-bit operand to rotate right.\r | |
1635 | @param Count The number of bits to rotate right.\r | |
1636 | \r | |
2fe241a2 | 1637 | @return Operand >> Count\r |
ac644614 | 1638 | \r |
1639 | **/\r | |
1640 | UINT32\r | |
1641 | EFIAPI\r | |
1642 | RRotU32 (\r | |
1643 | IN UINT32 Operand,\r | |
1644 | IN UINTN Count\r | |
1645 | );\r | |
1646 | \r | |
1647 | \r | |
1648 | /**\r | |
1649 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
1650 | with the high bits that were rotated.\r | |
1651 | \r | |
1652 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
1653 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1654 | value is returned.\r | |
1655 | \r | |
1656 | If Count is greater than 63, then ASSERT().\r | |
1657 | \r | |
1658 | @param Operand The 64-bit operand to rotate left.\r | |
1659 | @param Count The number of bits to rotate left.\r | |
1660 | \r | |
17f695ed | 1661 | @return Operand << Count\r |
ac644614 | 1662 | \r |
1663 | **/\r | |
1664 | UINT64\r | |
1665 | EFIAPI\r | |
1666 | LRotU64 (\r | |
1667 | IN UINT64 Operand,\r | |
1668 | IN UINTN Count\r | |
1669 | );\r | |
1670 | \r | |
1671 | \r | |
1672 | /**\r | |
1673 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
1674 | with the high low bits that were rotated.\r | |
1675 | \r | |
1676 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
1677 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1678 | value is returned.\r | |
1679 | \r | |
1680 | If Count is greater than 63, then ASSERT().\r | |
1681 | \r | |
1682 | @param Operand The 64-bit operand to rotate right.\r | |
1683 | @param Count The number of bits to rotate right.\r | |
1684 | \r | |
17f695ed | 1685 | @return Operand >> Count\r |
ac644614 | 1686 | \r |
1687 | **/\r | |
1688 | UINT64\r | |
1689 | EFIAPI\r | |
1690 | RRotU64 (\r | |
1691 | IN UINT64 Operand,\r | |
1692 | IN UINTN Count\r | |
1693 | );\r | |
1694 | \r | |
1695 | \r | |
1696 | /**\r | |
1697 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
1698 | \r | |
1699 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
1700 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1701 | Otherwise, a value between 0 and 31 is returned.\r | |
1702 | \r | |
1703 | @param Operand The 32-bit operand to evaluate.\r | |
1704 | \r | |
9aa049d9 | 1705 | @retval 0..31 The lowest bit set in Operand was found.\r |
17f695ed | 1706 | @retval -1 Operand is zero.\r |
ac644614 | 1707 | \r |
1708 | **/\r | |
1709 | INTN\r | |
1710 | EFIAPI\r | |
1711 | LowBitSet32 (\r | |
1712 | IN UINT32 Operand\r | |
1713 | );\r | |
1714 | \r | |
1715 | \r | |
1716 | /**\r | |
1717 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
1718 | \r | |
1719 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
1720 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1721 | Otherwise, a value between 0 and 63 is returned.\r | |
1722 | \r | |
1723 | @param Operand The 64-bit operand to evaluate.\r | |
1724 | \r | |
9aa049d9 | 1725 | @retval 0..63 The lowest bit set in Operand was found.\r |
17f695ed | 1726 | @retval -1 Operand is zero.\r |
1727 | \r | |
ac644614 | 1728 | \r |
1729 | **/\r | |
1730 | INTN\r | |
1731 | EFIAPI\r | |
1732 | LowBitSet64 (\r | |
1733 | IN UINT64 Operand\r | |
1734 | );\r | |
1735 | \r | |
1736 | \r | |
1737 | /**\r | |
1738 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
1739 | to log2(x).\r | |
1740 | \r | |
1741 | This function computes the bit position of the highest bit set in the 32-bit\r | |
1742 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1743 | Otherwise, a value between 0 and 31 is returned.\r | |
1744 | \r | |
1745 | @param Operand The 32-bit operand to evaluate.\r | |
1746 | \r | |
9aa049d9 | 1747 | @retval 0..31 Position of the highest bit set in Operand if found.\r |
17f695ed | 1748 | @retval -1 Operand is zero.\r |
ac644614 | 1749 | \r |
1750 | **/\r | |
1751 | INTN\r | |
1752 | EFIAPI\r | |
1753 | HighBitSet32 (\r | |
1754 | IN UINT32 Operand\r | |
1755 | );\r | |
1756 | \r | |
1757 | \r | |
1758 | /**\r | |
1759 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
1760 | to log2(x).\r | |
1761 | \r | |
1762 | This function computes the bit position of the highest bit set in the 64-bit\r | |
1763 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1764 | Otherwise, a value between 0 and 63 is returned.\r | |
1765 | \r | |
1766 | @param Operand The 64-bit operand to evaluate.\r | |
1767 | \r | |
9aa049d9 | 1768 | @retval 0..63 Position of the highest bit set in Operand if found.\r |
17f695ed | 1769 | @retval -1 Operand is zero.\r |
ac644614 | 1770 | \r |
1771 | **/\r | |
1772 | INTN\r | |
1773 | EFIAPI\r | |
1774 | HighBitSet64 (\r | |
1775 | IN UINT64 Operand\r | |
1776 | );\r | |
1777 | \r | |
1778 | \r | |
1779 | /**\r | |
1780 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
17f695ed | 1781 | 1 << log2(x).\r |
ac644614 | 1782 | \r |
1783 | This function computes the value of the highest bit set in the 32-bit value\r | |
1784 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1785 | \r | |
1786 | @param Operand The 32-bit operand to evaluate.\r | |
1787 | \r | |
1788 | @return 1 << HighBitSet32(Operand)\r | |
1789 | @retval 0 Operand is zero.\r | |
1790 | \r | |
1791 | **/\r | |
1792 | UINT32\r | |
1793 | EFIAPI\r | |
1794 | GetPowerOfTwo32 (\r | |
1795 | IN UINT32 Operand\r | |
1796 | );\r | |
1797 | \r | |
1798 | \r | |
1799 | /**\r | |
1800 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
17f695ed | 1801 | 1 << log2(x).\r |
ac644614 | 1802 | \r |
1803 | This function computes the value of the highest bit set in the 64-bit value\r | |
1804 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1805 | \r | |
1806 | @param Operand The 64-bit operand to evaluate.\r | |
1807 | \r | |
1808 | @return 1 << HighBitSet64(Operand)\r | |
1809 | @retval 0 Operand is zero.\r | |
1810 | \r | |
1811 | **/\r | |
1812 | UINT64\r | |
1813 | EFIAPI\r | |
1814 | GetPowerOfTwo64 (\r | |
1815 | IN UINT64 Operand\r | |
1816 | );\r | |
1817 | \r | |
1818 | \r | |
1819 | /**\r | |
1820 | Switches the endianess of a 16-bit integer.\r | |
1821 | \r | |
1822 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
1823 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1824 | returned.\r | |
1825 | \r | |
2a53dabf | 1826 | @param Value A 16-bit unsigned value.\r |
ac644614 | 1827 | \r |
efb23117 | 1828 | @return The byte swapped Value.\r |
ac644614 | 1829 | \r |
1830 | **/\r | |
1831 | UINT16\r | |
1832 | EFIAPI\r | |
1833 | SwapBytes16 (\r | |
1834 | IN UINT16 Value\r | |
1835 | );\r | |
1836 | \r | |
1837 | \r | |
1838 | /**\r | |
1839 | Switches the endianess of a 32-bit integer.\r | |
1840 | \r | |
1841 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
1842 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1843 | returned.\r | |
1844 | \r | |
2a53dabf | 1845 | @param Value A 32-bit unsigned value.\r |
ac644614 | 1846 | \r |
efb23117 | 1847 | @return The byte swapped Value.\r |
ac644614 | 1848 | \r |
1849 | **/\r | |
1850 | UINT32\r | |
1851 | EFIAPI\r | |
1852 | SwapBytes32 (\r | |
1853 | IN UINT32 Value\r | |
1854 | );\r | |
1855 | \r | |
1856 | \r | |
1857 | /**\r | |
1858 | Switches the endianess of a 64-bit integer.\r | |
1859 | \r | |
1860 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
1861 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1862 | returned.\r | |
1863 | \r | |
2a53dabf | 1864 | @param Value A 64-bit unsigned value.\r |
ac644614 | 1865 | \r |
efb23117 | 1866 | @return The byte swapped Value.\r |
ac644614 | 1867 | \r |
1868 | **/\r | |
1869 | UINT64\r | |
1870 | EFIAPI\r | |
1871 | SwapBytes64 (\r | |
1872 | IN UINT64 Value\r | |
1873 | );\r | |
1874 | \r | |
1875 | \r | |
1876 | /**\r | |
1877 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
1878 | generates a 64-bit unsigned result.\r | |
1879 | \r | |
1880 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
1881 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1882 | bit unsigned result is returned.\r | |
1883 | \r | |
ac644614 | 1884 | @param Multiplicand A 64-bit unsigned value.\r |
1885 | @param Multiplier A 32-bit unsigned value.\r | |
1886 | \r | |
1887 | @return Multiplicand * Multiplier\r | |
1888 | \r | |
1889 | **/\r | |
1890 | UINT64\r | |
1891 | EFIAPI\r | |
1892 | MultU64x32 (\r | |
1893 | IN UINT64 Multiplicand,\r | |
1894 | IN UINT32 Multiplier\r | |
1895 | );\r | |
1896 | \r | |
1897 | \r | |
1898 | /**\r | |
1899 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
1900 | generates a 64-bit unsigned result.\r | |
1901 | \r | |
1902 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
1903 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1904 | bit unsigned result is returned.\r | |
1905 | \r | |
ac644614 | 1906 | @param Multiplicand A 64-bit unsigned value.\r |
1907 | @param Multiplier A 64-bit unsigned value.\r | |
1908 | \r | |
1909 | @return Multiplicand * Multiplier\r | |
1910 | \r | |
1911 | **/\r | |
1912 | UINT64\r | |
1913 | EFIAPI\r | |
1914 | MultU64x64 (\r | |
1915 | IN UINT64 Multiplicand,\r | |
1916 | IN UINT64 Multiplier\r | |
1917 | );\r | |
1918 | \r | |
1919 | \r | |
1920 | /**\r | |
1921 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
1922 | 64-bit signed result.\r | |
1923 | \r | |
1924 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
1925 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
1926 | signed result is returned.\r | |
1927 | \r | |
ac644614 | 1928 | @param Multiplicand A 64-bit signed value.\r |
1929 | @param Multiplier A 64-bit signed value.\r | |
1930 | \r | |
1931 | @return Multiplicand * Multiplier\r | |
1932 | \r | |
1933 | **/\r | |
1934 | INT64\r | |
1935 | EFIAPI\r | |
1936 | MultS64x64 (\r | |
1937 | IN INT64 Multiplicand,\r | |
1938 | IN INT64 Multiplier\r | |
1939 | );\r | |
1940 | \r | |
1941 | \r | |
1942 | /**\r | |
1943 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1944 | a 64-bit unsigned result.\r | |
1945 | \r | |
1946 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1947 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
1948 | function returns the 64-bit unsigned quotient.\r | |
1949 | \r | |
1950 | If Divisor is 0, then ASSERT().\r | |
1951 | \r | |
1952 | @param Dividend A 64-bit unsigned value.\r | |
1953 | @param Divisor A 32-bit unsigned value.\r | |
1954 | \r | |
1955 | @return Dividend / Divisor\r | |
1956 | \r | |
1957 | **/\r | |
1958 | UINT64\r | |
1959 | EFIAPI\r | |
1960 | DivU64x32 (\r | |
1961 | IN UINT64 Dividend,\r | |
1962 | IN UINT32 Divisor\r | |
1963 | );\r | |
1964 | \r | |
1965 | \r | |
1966 | /**\r | |
1967 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1968 | a 32-bit unsigned remainder.\r | |
1969 | \r | |
1970 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1971 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
1972 | returns the 32-bit unsigned remainder.\r | |
1973 | \r | |
1974 | If Divisor is 0, then ASSERT().\r | |
1975 | \r | |
1976 | @param Dividend A 64-bit unsigned value.\r | |
1977 | @param Divisor A 32-bit unsigned value.\r | |
1978 | \r | |
1979 | @return Dividend % Divisor\r | |
1980 | \r | |
1981 | **/\r | |
1982 | UINT32\r | |
1983 | EFIAPI\r | |
1984 | ModU64x32 (\r | |
1985 | IN UINT64 Dividend,\r | |
1986 | IN UINT32 Divisor\r | |
1987 | );\r | |
1988 | \r | |
1989 | \r | |
1990 | /**\r | |
1991 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1992 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
1993 | \r | |
1994 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1995 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
1996 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
1997 | This function returns the 64-bit unsigned quotient.\r | |
1998 | \r | |
1999 | If Divisor is 0, then ASSERT().\r | |
2000 | \r | |
2001 | @param Dividend A 64-bit unsigned value.\r | |
2002 | @param Divisor A 32-bit unsigned value.\r | |
2003 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
2004 | optional and may be NULL.\r | |
2005 | \r | |
2006 | @return Dividend / Divisor\r | |
2007 | \r | |
2008 | **/\r | |
2009 | UINT64\r | |
2010 | EFIAPI\r | |
2011 | DivU64x32Remainder (\r | |
2012 | IN UINT64 Dividend,\r | |
2013 | IN UINT32 Divisor,\r | |
2014 | OUT UINT32 *Remainder OPTIONAL\r | |
2015 | );\r | |
2016 | \r | |
2017 | \r | |
2018 | /**\r | |
2019 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
2020 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
2021 | \r | |
2022 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
2023 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2024 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
2025 | This function returns the 64-bit unsigned quotient.\r | |
2026 | \r | |
2027 | If Divisor is 0, then ASSERT().\r | |
2028 | \r | |
2029 | @param Dividend A 64-bit unsigned value.\r | |
2030 | @param Divisor A 64-bit unsigned value.\r | |
2031 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
2032 | optional and may be NULL.\r | |
2033 | \r | |
2034 | @return Dividend / Divisor\r | |
2035 | \r | |
2036 | **/\r | |
2037 | UINT64\r | |
2038 | EFIAPI\r | |
2039 | DivU64x64Remainder (\r | |
2040 | IN UINT64 Dividend,\r | |
2041 | IN UINT64 Divisor,\r | |
2042 | OUT UINT64 *Remainder OPTIONAL\r | |
2043 | );\r | |
2044 | \r | |
2045 | \r | |
2046 | /**\r | |
2047 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2048 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
2049 | \r | |
2050 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
2051 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
2052 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
2053 | function returns the 64-bit signed quotient.\r | |
2054 | \r | |
9aa049d9 | 2055 | It is the caller's responsibility to not call this function with a Divisor of 0.\r |
17f695ed | 2056 | If Divisor is 0, then the quotient and remainder should be assumed to be \r |
2057 | the largest negative integer.\r | |
2058 | \r | |
ac644614 | 2059 | If Divisor is 0, then ASSERT().\r |
2060 | \r | |
2061 | @param Dividend A 64-bit signed value.\r | |
2062 | @param Divisor A 64-bit signed value.\r | |
2063 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
2064 | optional and may be NULL.\r | |
2065 | \r | |
2066 | @return Dividend / Divisor\r | |
2067 | \r | |
2068 | **/\r | |
2069 | INT64\r | |
2070 | EFIAPI\r | |
2071 | DivS64x64Remainder (\r | |
2072 | IN INT64 Dividend,\r | |
2073 | IN INT64 Divisor,\r | |
2074 | OUT INT64 *Remainder OPTIONAL\r | |
2075 | );\r | |
2076 | \r | |
2077 | \r | |
2078 | /**\r | |
2079 | Reads a 16-bit value from memory that may be unaligned.\r | |
2080 | \r | |
2081 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
2082 | guarantees that the read operation does not produce an alignment fault.\r | |
2083 | \r | |
2084 | If the Buffer is NULL, then ASSERT().\r | |
2085 | \r | |
5385a579 | 2086 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2087 | \r |
5385a579 | 2088 | @return The 16-bit value read from Buffer.\r |
ac644614 | 2089 | \r |
2090 | **/\r | |
2091 | UINT16\r | |
2092 | EFIAPI\r | |
2093 | ReadUnaligned16 (\r | |
5385a579 | 2094 | IN CONST UINT16 *Buffer\r |
ac644614 | 2095 | );\r |
2096 | \r | |
2097 | \r | |
2098 | /**\r | |
2099 | Writes a 16-bit value to memory that may be unaligned.\r | |
2100 | \r | |
2101 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
2102 | returned. The function guarantees that the write operation does not produce\r | |
2103 | an alignment fault.\r | |
2104 | \r | |
2105 | If the Buffer is NULL, then ASSERT().\r | |
2106 | \r | |
5385a579 | 2107 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2108 | @param Value 16-bit value to write to Buffer.\r |
2109 | \r | |
5385a579 | 2110 | @return The 16-bit value to write to Buffer.\r |
ac644614 | 2111 | \r |
2112 | **/\r | |
2113 | UINT16\r | |
2114 | EFIAPI\r | |
2115 | WriteUnaligned16 (\r | |
5385a579 | 2116 | OUT UINT16 *Buffer,\r |
2117 | IN UINT16 Value\r | |
ac644614 | 2118 | );\r |
2119 | \r | |
2120 | \r | |
2121 | /**\r | |
2122 | Reads a 24-bit value from memory that may be unaligned.\r | |
2123 | \r | |
2124 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
2125 | guarantees that the read operation does not produce an alignment fault.\r | |
2126 | \r | |
2127 | If the Buffer is NULL, then ASSERT().\r | |
2128 | \r | |
2129 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
2130 | \r | |
5385a579 | 2131 | @return The 24-bit value read from Buffer.\r |
ac644614 | 2132 | \r |
2133 | **/\r | |
2134 | UINT32\r | |
2135 | EFIAPI\r | |
2136 | ReadUnaligned24 (\r | |
5385a579 | 2137 | IN CONST UINT32 *Buffer\r |
ac644614 | 2138 | );\r |
2139 | \r | |
2140 | \r | |
2141 | /**\r | |
2142 | Writes a 24-bit value to memory that may be unaligned.\r | |
2143 | \r | |
2144 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
2145 | returned. The function guarantees that the write operation does not produce\r | |
2146 | an alignment fault.\r | |
2147 | \r | |
2148 | If the Buffer is NULL, then ASSERT().\r | |
2149 | \r | |
2150 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
2151 | @param Value 24-bit value to write to Buffer.\r | |
2152 | \r | |
5385a579 | 2153 | @return The 24-bit value to write to Buffer.\r |
ac644614 | 2154 | \r |
2155 | **/\r | |
2156 | UINT32\r | |
2157 | EFIAPI\r | |
2158 | WriteUnaligned24 (\r | |
5385a579 | 2159 | OUT UINT32 *Buffer,\r |
2160 | IN UINT32 Value\r | |
ac644614 | 2161 | );\r |
2162 | \r | |
2163 | \r | |
2164 | /**\r | |
2165 | Reads a 32-bit value from memory that may be unaligned.\r | |
2166 | \r | |
2167 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
2168 | guarantees that the read operation does not produce an alignment fault.\r | |
2169 | \r | |
2170 | If the Buffer is NULL, then ASSERT().\r | |
2171 | \r | |
5385a579 | 2172 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2173 | \r |
5385a579 | 2174 | @return The 32-bit value read from Buffer.\r |
ac644614 | 2175 | \r |
2176 | **/\r | |
2177 | UINT32\r | |
2178 | EFIAPI\r | |
2179 | ReadUnaligned32 (\r | |
5385a579 | 2180 | IN CONST UINT32 *Buffer\r |
ac644614 | 2181 | );\r |
2182 | \r | |
2183 | \r | |
2184 | /**\r | |
2185 | Writes a 32-bit value to memory that may be unaligned.\r | |
2186 | \r | |
2187 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
2188 | returned. The function guarantees that the write operation does not produce\r | |
2189 | an alignment fault.\r | |
2190 | \r | |
2191 | If the Buffer is NULL, then ASSERT().\r | |
2192 | \r | |
5385a579 | 2193 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2194 | @param Value 32-bit value to write to Buffer.\r |
2195 | \r | |
5385a579 | 2196 | @return The 32-bit value to write to Buffer.\r |
ac644614 | 2197 | \r |
2198 | **/\r | |
2199 | UINT32\r | |
2200 | EFIAPI\r | |
2201 | WriteUnaligned32 (\r | |
5385a579 | 2202 | OUT UINT32 *Buffer,\r |
2203 | IN UINT32 Value\r | |
ac644614 | 2204 | );\r |
2205 | \r | |
2206 | \r | |
2207 | /**\r | |
2208 | Reads a 64-bit value from memory that may be unaligned.\r | |
2209 | \r | |
2210 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
2211 | guarantees that the read operation does not produce an alignment fault.\r | |
2212 | \r | |
2213 | If the Buffer is NULL, then ASSERT().\r | |
2214 | \r | |
5385a579 | 2215 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2216 | \r |
5385a579 | 2217 | @return The 64-bit value read from Buffer.\r |
ac644614 | 2218 | \r |
2219 | **/\r | |
2220 | UINT64\r | |
2221 | EFIAPI\r | |
2222 | ReadUnaligned64 (\r | |
5385a579 | 2223 | IN CONST UINT64 *Buffer\r |
ac644614 | 2224 | );\r |
2225 | \r | |
2226 | \r | |
2227 | /**\r | |
2228 | Writes a 64-bit value to memory that may be unaligned.\r | |
2229 | \r | |
2230 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
2231 | returned. The function guarantees that the write operation does not produce\r | |
2232 | an alignment fault.\r | |
2233 | \r | |
2234 | If the Buffer is NULL, then ASSERT().\r | |
2235 | \r | |
5385a579 | 2236 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2237 | @param Value 64-bit value to write to Buffer.\r |
2238 | \r | |
5385a579 | 2239 | @return The 64-bit value to write to Buffer.\r |
ac644614 | 2240 | \r |
2241 | **/\r | |
2242 | UINT64\r | |
2243 | EFIAPI\r | |
2244 | WriteUnaligned64 (\r | |
5385a579 | 2245 | OUT UINT64 *Buffer,\r |
2246 | IN UINT64 Value\r | |
ac644614 | 2247 | );\r |
2248 | \r | |
2249 | \r | |
2250 | //\r | |
2251 | // Bit Field Functions\r | |
2252 | //\r | |
2253 | \r | |
2254 | /**\r | |
2255 | Returns a bit field from an 8-bit value.\r | |
2256 | \r | |
2257 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2258 | \r | |
2259 | If 8-bit operations are not supported, then ASSERT().\r | |
2260 | If StartBit is greater than 7, then ASSERT().\r | |
2261 | If EndBit is greater than 7, then ASSERT().\r | |
2262 | If EndBit is less than StartBit, then ASSERT().\r | |
2263 | \r | |
2264 | @param Operand Operand on which to perform the bitfield operation.\r | |
2265 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2266 | Range 0..7.\r | |
2267 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2268 | Range 0..7.\r | |
2269 | \r | |
2270 | @return The bit field read.\r | |
2271 | \r | |
2272 | **/\r | |
2273 | UINT8\r | |
2274 | EFIAPI\r | |
2275 | BitFieldRead8 (\r | |
2276 | IN UINT8 Operand,\r | |
2277 | IN UINTN StartBit,\r | |
2278 | IN UINTN EndBit\r | |
2279 | );\r | |
2280 | \r | |
2281 | \r | |
2282 | /**\r | |
2283 | Writes a bit field to an 8-bit value, and returns the result.\r | |
2284 | \r | |
2285 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2286 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
2287 | returned.\r | |
2288 | \r | |
2289 | If 8-bit operations are not supported, then ASSERT().\r | |
2290 | If StartBit is greater than 7, then ASSERT().\r | |
2291 | If EndBit is greater than 7, then ASSERT().\r | |
2292 | If EndBit is less than StartBit, then ASSERT().\r | |
2293 | \r | |
2294 | @param Operand Operand on which to perform the bitfield operation.\r | |
2295 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2296 | Range 0..7.\r | |
2297 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2298 | Range 0..7.\r | |
2299 | @param Value New value of the bit field.\r | |
2300 | \r | |
2301 | @return The new 8-bit value.\r | |
2302 | \r | |
2303 | **/\r | |
2304 | UINT8\r | |
2305 | EFIAPI\r | |
2306 | BitFieldWrite8 (\r | |
2307 | IN UINT8 Operand,\r | |
2308 | IN UINTN StartBit,\r | |
2309 | IN UINTN EndBit,\r | |
2310 | IN UINT8 Value\r | |
2311 | );\r | |
2312 | \r | |
2313 | \r | |
2314 | /**\r | |
2315 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
2316 | result.\r | |
2317 | \r | |
62991af2 | 2318 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2319 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2320 | Operand are preserved. The new 8-bit value is returned.\r | |
2321 | \r | |
2322 | If 8-bit operations are not supported, then ASSERT().\r | |
2323 | If StartBit is greater than 7, then ASSERT().\r | |
2324 | If EndBit is greater than 7, then ASSERT().\r | |
2325 | If EndBit is less than StartBit, then ASSERT().\r | |
2326 | \r | |
2327 | @param Operand Operand on which to perform the bitfield operation.\r | |
2328 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2329 | Range 0..7.\r | |
2330 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2331 | Range 0..7.\r | |
2332 | @param OrData The value to OR with the read value from the value\r | |
2333 | \r | |
2334 | @return The new 8-bit value.\r | |
2335 | \r | |
2336 | **/\r | |
2337 | UINT8\r | |
2338 | EFIAPI\r | |
2339 | BitFieldOr8 (\r | |
2340 | IN UINT8 Operand,\r | |
2341 | IN UINTN StartBit,\r | |
2342 | IN UINTN EndBit,\r | |
2343 | IN UINT8 OrData\r | |
2344 | );\r | |
2345 | \r | |
2346 | \r | |
2347 | /**\r | |
2348 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
2349 | the result.\r | |
2350 | \r | |
2351 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2352 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2353 | preserved. The new 8-bit value is returned.\r | |
2354 | \r | |
2355 | If 8-bit operations are not supported, then ASSERT().\r | |
2356 | If StartBit is greater than 7, then ASSERT().\r | |
2357 | If EndBit is greater than 7, then ASSERT().\r | |
2358 | If EndBit is less than StartBit, then ASSERT().\r | |
2359 | \r | |
2360 | @param Operand Operand on which to perform the bitfield operation.\r | |
2361 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2362 | Range 0..7.\r | |
2363 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2364 | Range 0..7.\r | |
2365 | @param AndData The value to AND with the read value from the value.\r | |
2366 | \r | |
2367 | @return The new 8-bit value.\r | |
2368 | \r | |
2369 | **/\r | |
2370 | UINT8\r | |
2371 | EFIAPI\r | |
2372 | BitFieldAnd8 (\r | |
2373 | IN UINT8 Operand,\r | |
2374 | IN UINTN StartBit,\r | |
2375 | IN UINTN EndBit,\r | |
2376 | IN UINT8 AndData\r | |
2377 | );\r | |
2378 | \r | |
2379 | \r | |
2380 | /**\r | |
2381 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
2382 | bitwise OR, and returns the result.\r | |
2383 | \r | |
2384 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2385 | in Operand and the value specified by AndData, followed by a bitwise \r |
2386 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2387 | preserved. The new 8-bit value is returned.\r |
2388 | \r | |
2389 | If 8-bit operations are not supported, then ASSERT().\r | |
2390 | If StartBit is greater than 7, then ASSERT().\r | |
2391 | If EndBit is greater than 7, then ASSERT().\r | |
2392 | If EndBit is less than StartBit, then ASSERT().\r | |
2393 | \r | |
2394 | @param Operand Operand on which to perform the bitfield operation.\r | |
2395 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2396 | Range 0..7.\r | |
2397 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2398 | Range 0..7.\r | |
2399 | @param AndData The value to AND with the read value from the value.\r | |
2400 | @param OrData The value to OR with the result of the AND operation.\r | |
2401 | \r | |
2402 | @return The new 8-bit value.\r | |
2403 | \r | |
2404 | **/\r | |
2405 | UINT8\r | |
2406 | EFIAPI\r | |
2407 | BitFieldAndThenOr8 (\r | |
2408 | IN UINT8 Operand,\r | |
2409 | IN UINTN StartBit,\r | |
2410 | IN UINTN EndBit,\r | |
2411 | IN UINT8 AndData,\r | |
2412 | IN UINT8 OrData\r | |
2413 | );\r | |
2414 | \r | |
2415 | \r | |
2416 | /**\r | |
2417 | Returns a bit field from a 16-bit value.\r | |
2418 | \r | |
2419 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2420 | \r | |
2421 | If 16-bit operations are not supported, then ASSERT().\r | |
2422 | If StartBit is greater than 15, then ASSERT().\r | |
2423 | If EndBit is greater than 15, then ASSERT().\r | |
2424 | If EndBit is less than StartBit, then ASSERT().\r | |
2425 | \r | |
2426 | @param Operand Operand on which to perform the bitfield operation.\r | |
2427 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2428 | Range 0..15.\r | |
2429 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2430 | Range 0..15.\r | |
2431 | \r | |
2432 | @return The bit field read.\r | |
2433 | \r | |
2434 | **/\r | |
2435 | UINT16\r | |
2436 | EFIAPI\r | |
2437 | BitFieldRead16 (\r | |
2438 | IN UINT16 Operand,\r | |
2439 | IN UINTN StartBit,\r | |
2440 | IN UINTN EndBit\r | |
2441 | );\r | |
2442 | \r | |
2443 | \r | |
2444 | /**\r | |
2445 | Writes a bit field to a 16-bit value, and returns the result.\r | |
2446 | \r | |
2447 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2448 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
2449 | returned.\r | |
2450 | \r | |
2451 | If 16-bit operations are not supported, then ASSERT().\r | |
2452 | If StartBit is greater than 15, then ASSERT().\r | |
2453 | If EndBit is greater than 15, then ASSERT().\r | |
2454 | If EndBit is less than StartBit, then ASSERT().\r | |
2455 | \r | |
2456 | @param Operand Operand on which to perform the bitfield operation.\r | |
2457 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2458 | Range 0..15.\r | |
2459 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2460 | Range 0..15.\r | |
2461 | @param Value New value of the bit field.\r | |
2462 | \r | |
2463 | @return The new 16-bit value.\r | |
2464 | \r | |
2465 | **/\r | |
2466 | UINT16\r | |
2467 | EFIAPI\r | |
2468 | BitFieldWrite16 (\r | |
2469 | IN UINT16 Operand,\r | |
2470 | IN UINTN StartBit,\r | |
2471 | IN UINTN EndBit,\r | |
2472 | IN UINT16 Value\r | |
2473 | );\r | |
2474 | \r | |
2475 | \r | |
2476 | /**\r | |
2477 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
2478 | result.\r | |
2479 | \r | |
62991af2 | 2480 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2481 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2482 | Operand are preserved. The new 16-bit value is returned.\r | |
2483 | \r | |
2484 | If 16-bit operations are not supported, then ASSERT().\r | |
2485 | If StartBit is greater than 15, then ASSERT().\r | |
2486 | If EndBit is greater than 15, then ASSERT().\r | |
2487 | If EndBit is less than StartBit, then ASSERT().\r | |
2488 | \r | |
2489 | @param Operand Operand on which to perform the bitfield operation.\r | |
2490 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2491 | Range 0..15.\r | |
2492 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2493 | Range 0..15.\r | |
2494 | @param OrData The value to OR with the read value from the value\r | |
2495 | \r | |
2496 | @return The new 16-bit value.\r | |
2497 | \r | |
2498 | **/\r | |
2499 | UINT16\r | |
2500 | EFIAPI\r | |
2501 | BitFieldOr16 (\r | |
2502 | IN UINT16 Operand,\r | |
2503 | IN UINTN StartBit,\r | |
2504 | IN UINTN EndBit,\r | |
2505 | IN UINT16 OrData\r | |
2506 | );\r | |
2507 | \r | |
2508 | \r | |
2509 | /**\r | |
2510 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
2511 | the result.\r | |
2512 | \r | |
2513 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2514 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2515 | preserved. The new 16-bit value is returned.\r | |
2516 | \r | |
2517 | If 16-bit operations are not supported, then ASSERT().\r | |
2518 | If StartBit is greater than 15, then ASSERT().\r | |
2519 | If EndBit is greater than 15, then ASSERT().\r | |
2520 | If EndBit is less than StartBit, then ASSERT().\r | |
2521 | \r | |
2522 | @param Operand Operand on which to perform the bitfield operation.\r | |
2523 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2524 | Range 0..15.\r | |
2525 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2526 | Range 0..15.\r | |
2527 | @param AndData The value to AND with the read value from the value\r | |
2528 | \r | |
2529 | @return The new 16-bit value.\r | |
2530 | \r | |
2531 | **/\r | |
2532 | UINT16\r | |
2533 | EFIAPI\r | |
2534 | BitFieldAnd16 (\r | |
2535 | IN UINT16 Operand,\r | |
2536 | IN UINTN StartBit,\r | |
2537 | IN UINTN EndBit,\r | |
2538 | IN UINT16 AndData\r | |
2539 | );\r | |
2540 | \r | |
2541 | \r | |
2542 | /**\r | |
2543 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
2544 | bitwise OR, and returns the result.\r | |
2545 | \r | |
2546 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2547 | in Operand and the value specified by AndData, followed by a bitwise \r |
2548 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2549 | preserved. The new 16-bit value is returned.\r |
2550 | \r | |
2551 | If 16-bit operations are not supported, then ASSERT().\r | |
2552 | If StartBit is greater than 15, then ASSERT().\r | |
2553 | If EndBit is greater than 15, then ASSERT().\r | |
2554 | If EndBit is less than StartBit, then ASSERT().\r | |
2555 | \r | |
2556 | @param Operand Operand on which to perform the bitfield operation.\r | |
2557 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2558 | Range 0..15.\r | |
2559 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2560 | Range 0..15.\r | |
2561 | @param AndData The value to AND with the read value from the value.\r | |
2562 | @param OrData The value to OR with the result of the AND operation.\r | |
2563 | \r | |
2564 | @return The new 16-bit value.\r | |
2565 | \r | |
2566 | **/\r | |
2567 | UINT16\r | |
2568 | EFIAPI\r | |
2569 | BitFieldAndThenOr16 (\r | |
2570 | IN UINT16 Operand,\r | |
2571 | IN UINTN StartBit,\r | |
2572 | IN UINTN EndBit,\r | |
2573 | IN UINT16 AndData,\r | |
2574 | IN UINT16 OrData\r | |
2575 | );\r | |
2576 | \r | |
2577 | \r | |
2578 | /**\r | |
2579 | Returns a bit field from a 32-bit value.\r | |
2580 | \r | |
2581 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2582 | \r | |
2583 | If 32-bit operations are not supported, then ASSERT().\r | |
2584 | If StartBit is greater than 31, then ASSERT().\r | |
2585 | If EndBit is greater than 31, then ASSERT().\r | |
2586 | If EndBit is less than StartBit, then ASSERT().\r | |
2587 | \r | |
2588 | @param Operand Operand on which to perform the bitfield operation.\r | |
2589 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2590 | Range 0..31.\r | |
2591 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2592 | Range 0..31.\r | |
2593 | \r | |
2594 | @return The bit field read.\r | |
2595 | \r | |
2596 | **/\r | |
2597 | UINT32\r | |
2598 | EFIAPI\r | |
2599 | BitFieldRead32 (\r | |
2600 | IN UINT32 Operand,\r | |
2601 | IN UINTN StartBit,\r | |
2602 | IN UINTN EndBit\r | |
2603 | );\r | |
2604 | \r | |
2605 | \r | |
2606 | /**\r | |
2607 | Writes a bit field to a 32-bit value, and returns the result.\r | |
2608 | \r | |
2609 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2610 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
2611 | returned.\r | |
2612 | \r | |
2613 | If 32-bit operations are not supported, then ASSERT().\r | |
2614 | If StartBit is greater than 31, then ASSERT().\r | |
2615 | If EndBit is greater than 31, then ASSERT().\r | |
2616 | If EndBit is less than StartBit, then ASSERT().\r | |
2617 | \r | |
2618 | @param Operand Operand on which to perform the bitfield operation.\r | |
2619 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2620 | Range 0..31.\r | |
2621 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2622 | Range 0..31.\r | |
2623 | @param Value New value of the bit field.\r | |
2624 | \r | |
2625 | @return The new 32-bit value.\r | |
2626 | \r | |
2627 | **/\r | |
2628 | UINT32\r | |
2629 | EFIAPI\r | |
2630 | BitFieldWrite32 (\r | |
2631 | IN UINT32 Operand,\r | |
2632 | IN UINTN StartBit,\r | |
2633 | IN UINTN EndBit,\r | |
2634 | IN UINT32 Value\r | |
2635 | );\r | |
2636 | \r | |
2637 | \r | |
2638 | /**\r | |
2639 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
2640 | result.\r | |
2641 | \r | |
62991af2 | 2642 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2643 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2644 | Operand are preserved. The new 32-bit value is returned.\r | |
2645 | \r | |
2646 | If 32-bit operations are not supported, then ASSERT().\r | |
2647 | If StartBit is greater than 31, then ASSERT().\r | |
2648 | If EndBit is greater than 31, then ASSERT().\r | |
2649 | If EndBit is less than StartBit, then ASSERT().\r | |
2650 | \r | |
2651 | @param Operand Operand on which to perform the bitfield operation.\r | |
2652 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2653 | Range 0..31.\r | |
2654 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2655 | Range 0..31.\r | |
2656 | @param OrData The value to OR with the read value from the value\r | |
2657 | \r | |
2658 | @return The new 32-bit value.\r | |
2659 | \r | |
2660 | **/\r | |
2661 | UINT32\r | |
2662 | EFIAPI\r | |
2663 | BitFieldOr32 (\r | |
2664 | IN UINT32 Operand,\r | |
2665 | IN UINTN StartBit,\r | |
2666 | IN UINTN EndBit,\r | |
2667 | IN UINT32 OrData\r | |
2668 | );\r | |
2669 | \r | |
2670 | \r | |
2671 | /**\r | |
2672 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
2673 | the result.\r | |
2674 | \r | |
2675 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2676 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2677 | preserved. The new 32-bit value is returned.\r | |
2678 | \r | |
2679 | If 32-bit operations are not supported, then ASSERT().\r | |
2680 | If StartBit is greater than 31, then ASSERT().\r | |
2681 | If EndBit is greater than 31, then ASSERT().\r | |
2682 | If EndBit is less than StartBit, then ASSERT().\r | |
2683 | \r | |
2684 | @param Operand Operand on which to perform the bitfield operation.\r | |
2685 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2686 | Range 0..31.\r | |
2687 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2688 | Range 0..31.\r | |
2689 | @param AndData The value to AND with the read value from the value\r | |
2690 | \r | |
2691 | @return The new 32-bit value.\r | |
2692 | \r | |
2693 | **/\r | |
2694 | UINT32\r | |
2695 | EFIAPI\r | |
2696 | BitFieldAnd32 (\r | |
2697 | IN UINT32 Operand,\r | |
2698 | IN UINTN StartBit,\r | |
2699 | IN UINTN EndBit,\r | |
2700 | IN UINT32 AndData\r | |
2701 | );\r | |
2702 | \r | |
2703 | \r | |
2704 | /**\r | |
2705 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
2706 | bitwise OR, and returns the result.\r | |
2707 | \r | |
2708 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2709 | in Operand and the value specified by AndData, followed by a bitwise \r |
2710 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2711 | preserved. The new 32-bit value is returned.\r |
2712 | \r | |
2713 | If 32-bit operations are not supported, then ASSERT().\r | |
2714 | If StartBit is greater than 31, then ASSERT().\r | |
2715 | If EndBit is greater than 31, then ASSERT().\r | |
2716 | If EndBit is less than StartBit, then ASSERT().\r | |
2717 | \r | |
2718 | @param Operand Operand on which to perform the bitfield operation.\r | |
2719 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2720 | Range 0..31.\r | |
2721 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2722 | Range 0..31.\r | |
2723 | @param AndData The value to AND with the read value from the value.\r | |
2724 | @param OrData The value to OR with the result of the AND operation.\r | |
2725 | \r | |
2726 | @return The new 32-bit value.\r | |
2727 | \r | |
2728 | **/\r | |
2729 | UINT32\r | |
2730 | EFIAPI\r | |
2731 | BitFieldAndThenOr32 (\r | |
2732 | IN UINT32 Operand,\r | |
2733 | IN UINTN StartBit,\r | |
2734 | IN UINTN EndBit,\r | |
2735 | IN UINT32 AndData,\r | |
2736 | IN UINT32 OrData\r | |
2737 | );\r | |
2738 | \r | |
2739 | \r | |
2740 | /**\r | |
2741 | Returns a bit field from a 64-bit value.\r | |
2742 | \r | |
2743 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2744 | \r | |
2745 | If 64-bit operations are not supported, then ASSERT().\r | |
2746 | If StartBit is greater than 63, then ASSERT().\r | |
2747 | If EndBit is greater than 63, then ASSERT().\r | |
2748 | If EndBit is less than StartBit, then ASSERT().\r | |
2749 | \r | |
2750 | @param Operand Operand on which to perform the bitfield operation.\r | |
2751 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2752 | Range 0..63.\r | |
2753 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2754 | Range 0..63.\r | |
2755 | \r | |
2756 | @return The bit field read.\r | |
2757 | \r | |
2758 | **/\r | |
2759 | UINT64\r | |
2760 | EFIAPI\r | |
2761 | BitFieldRead64 (\r | |
2762 | IN UINT64 Operand,\r | |
2763 | IN UINTN StartBit,\r | |
2764 | IN UINTN EndBit\r | |
2765 | );\r | |
2766 | \r | |
2767 | \r | |
2768 | /**\r | |
2769 | Writes a bit field to a 64-bit value, and returns the result.\r | |
2770 | \r | |
2771 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2772 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
2773 | returned.\r | |
2774 | \r | |
2775 | If 64-bit operations are not supported, then ASSERT().\r | |
2776 | If StartBit is greater than 63, then ASSERT().\r | |
2777 | If EndBit is greater than 63, then ASSERT().\r | |
2778 | If EndBit is less than StartBit, then ASSERT().\r | |
2779 | \r | |
2780 | @param Operand Operand on which to perform the bitfield operation.\r | |
2781 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2782 | Range 0..63.\r | |
2783 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2784 | Range 0..63.\r | |
2785 | @param Value New value of the bit field.\r | |
2786 | \r | |
2787 | @return The new 64-bit value.\r | |
2788 | \r | |
2789 | **/\r | |
2790 | UINT64\r | |
2791 | EFIAPI\r | |
2792 | BitFieldWrite64 (\r | |
2793 | IN UINT64 Operand,\r | |
2794 | IN UINTN StartBit,\r | |
2795 | IN UINTN EndBit,\r | |
2796 | IN UINT64 Value\r | |
2797 | );\r | |
2798 | \r | |
2799 | \r | |
2800 | /**\r | |
2801 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
2802 | result.\r | |
2803 | \r | |
62991af2 | 2804 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2805 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2806 | Operand are preserved. The new 64-bit value is returned.\r | |
2807 | \r | |
2808 | If 64-bit operations are not supported, then ASSERT().\r | |
2809 | If StartBit is greater than 63, then ASSERT().\r | |
2810 | If EndBit is greater than 63, then ASSERT().\r | |
2811 | If EndBit is less than StartBit, then ASSERT().\r | |
2812 | \r | |
2813 | @param Operand Operand on which to perform the bitfield operation.\r | |
2814 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2815 | Range 0..63.\r | |
2816 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2817 | Range 0..63.\r | |
2818 | @param OrData The value to OR with the read value from the value\r | |
2819 | \r | |
2820 | @return The new 64-bit value.\r | |
2821 | \r | |
2822 | **/\r | |
2823 | UINT64\r | |
2824 | EFIAPI\r | |
2825 | BitFieldOr64 (\r | |
2826 | IN UINT64 Operand,\r | |
2827 | IN UINTN StartBit,\r | |
2828 | IN UINTN EndBit,\r | |
2829 | IN UINT64 OrData\r | |
2830 | );\r | |
2831 | \r | |
2832 | \r | |
2833 | /**\r | |
2834 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
2835 | the result.\r | |
2836 | \r | |
2837 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2838 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2839 | preserved. The new 64-bit value is returned.\r | |
2840 | \r | |
2841 | If 64-bit operations are not supported, then ASSERT().\r | |
2842 | If StartBit is greater than 63, then ASSERT().\r | |
2843 | If EndBit is greater than 63, then ASSERT().\r | |
2844 | If EndBit is less than StartBit, then ASSERT().\r | |
2845 | \r | |
2846 | @param Operand Operand on which to perform the bitfield operation.\r | |
2847 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2848 | Range 0..63.\r | |
2849 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2850 | Range 0..63.\r | |
2851 | @param AndData The value to AND with the read value from the value\r | |
2852 | \r | |
2853 | @return The new 64-bit value.\r | |
2854 | \r | |
2855 | **/\r | |
2856 | UINT64\r | |
2857 | EFIAPI\r | |
2858 | BitFieldAnd64 (\r | |
2859 | IN UINT64 Operand,\r | |
2860 | IN UINTN StartBit,\r | |
2861 | IN UINTN EndBit,\r | |
2862 | IN UINT64 AndData\r | |
2863 | );\r | |
2864 | \r | |
2865 | \r | |
2866 | /**\r | |
2867 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
2868 | bitwise OR, and returns the result.\r | |
2869 | \r | |
2870 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2871 | in Operand and the value specified by AndData, followed by a bitwise \r |
2872 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2873 | preserved. The new 64-bit value is returned.\r |
2874 | \r | |
2875 | If 64-bit operations are not supported, then ASSERT().\r | |
2876 | If StartBit is greater than 63, then ASSERT().\r | |
2877 | If EndBit is greater than 63, then ASSERT().\r | |
2878 | If EndBit is less than StartBit, then ASSERT().\r | |
2879 | \r | |
2880 | @param Operand Operand on which to perform the bitfield operation.\r | |
2881 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2882 | Range 0..63.\r | |
2883 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2884 | Range 0..63.\r | |
2885 | @param AndData The value to AND with the read value from the value.\r | |
2886 | @param OrData The value to OR with the result of the AND operation.\r | |
2887 | \r | |
2888 | @return The new 64-bit value.\r | |
2889 | \r | |
2890 | **/\r | |
2891 | UINT64\r | |
2892 | EFIAPI\r | |
2893 | BitFieldAndThenOr64 (\r | |
2894 | IN UINT64 Operand,\r | |
2895 | IN UINTN StartBit,\r | |
2896 | IN UINTN EndBit,\r | |
2897 | IN UINT64 AndData,\r | |
2898 | IN UINT64 OrData\r | |
2899 | );\r | |
2900 | \r | |
ac644614 | 2901 | //\r |
2902 | // Base Library Checksum Functions\r | |
2903 | //\r | |
2904 | \r | |
2905 | /**\r | |
17f695ed | 2906 | Returns the sum of all elements in a buffer in unit of UINT8.\r |
ac644614 | 2907 | During calculation, the carry bits are dropped.\r |
2908 | \r | |
2909 | This function calculates the sum of all elements in a buffer\r | |
2910 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
2911 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
2912 | returned.\r | |
2913 | \r | |
2914 | If Buffer is NULL, then ASSERT().\r | |
2915 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
2916 | \r | |
1106ffe1 | 2917 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
17f695ed | 2918 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 2919 | \r |
2920 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
2921 | \r | |
2922 | **/\r | |
2923 | UINT8\r | |
2924 | EFIAPI\r | |
2925 | CalculateSum8 (\r | |
ee6c452c | 2926 | IN CONST UINT8 *Buffer,\r |
2927 | IN UINTN Length\r | |
ac644614 | 2928 | );\r |
2929 | \r | |
2930 | \r | |
2931 | /**\r | |
2932 | Returns the two's complement checksum of all elements in a buffer\r | |
2933 | of 8-bit values.\r | |
2934 | \r | |
2935 | This function first calculates the sum of the 8-bit values in the\r | |
2936 | buffer specified by Buffer and Length. The carry bits in the result\r | |
2937 | of addition are dropped. Then, the two's complement of the sum is\r | |
2938 | returned. If Length is 0, then 0 is returned.\r | |
2939 | \r | |
2940 | If Buffer is NULL, then ASSERT().\r | |
2941 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
2942 | \r | |
1106ffe1 | 2943 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
2944 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 2945 | \r |
ee6c452c | 2946 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 2947 | \r |
2948 | **/\r | |
2949 | UINT8\r | |
2950 | EFIAPI\r | |
2951 | CalculateCheckSum8 (\r | |
ee6c452c | 2952 | IN CONST UINT8 *Buffer,\r |
2953 | IN UINTN Length\r | |
ac644614 | 2954 | );\r |
2955 | \r | |
2956 | \r | |
2957 | /**\r | |
2958 | Returns the sum of all elements in a buffer of 16-bit values. During\r | |
2959 | calculation, the carry bits are dropped.\r | |
2960 | \r | |
2961 | This function calculates the sum of the 16-bit values in the buffer\r | |
2962 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
2963 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
2964 | \r | |
2965 | If Buffer is NULL, then ASSERT().\r | |
2966 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
2967 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
2968 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
2969 | \r | |
1106ffe1 | 2970 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
2971 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 2972 | \r |
2973 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
2974 | \r | |
2975 | **/\r | |
2976 | UINT16\r | |
2977 | EFIAPI\r | |
2978 | CalculateSum16 (\r | |
ee6c452c | 2979 | IN CONST UINT16 *Buffer,\r |
2980 | IN UINTN Length\r | |
ac644614 | 2981 | );\r |
2982 | \r | |
2983 | \r | |
2984 | /**\r | |
2985 | Returns the two's complement checksum of all elements in a buffer of\r | |
2986 | 16-bit values.\r | |
2987 | \r | |
2988 | This function first calculates the sum of the 16-bit values in the buffer\r | |
2989 | specified by Buffer and Length. The carry bits in the result of addition\r | |
2990 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
2991 | is 0, then 0 is returned.\r | |
2992 | \r | |
2993 | If Buffer is NULL, then ASSERT().\r | |
2994 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
2995 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
2996 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
2997 | \r | |
1106ffe1 | 2998 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
2999 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3000 | \r |
ee6c452c | 3001 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 3002 | \r |
3003 | **/\r | |
3004 | UINT16\r | |
3005 | EFIAPI\r | |
3006 | CalculateCheckSum16 (\r | |
ee6c452c | 3007 | IN CONST UINT16 *Buffer,\r |
3008 | IN UINTN Length\r | |
ac644614 | 3009 | );\r |
3010 | \r | |
3011 | \r | |
3012 | /**\r | |
17f695ed | 3013 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
ac644614 | 3014 | calculation, the carry bits are dropped.\r |
3015 | \r | |
3016 | This function calculates the sum of the 32-bit values in the buffer\r | |
3017 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
17f695ed | 3018 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r |
ac644614 | 3019 | \r |
3020 | If Buffer is NULL, then ASSERT().\r | |
3021 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3022 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3023 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3024 | \r | |
1106ffe1 | 3025 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
3026 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3027 | \r |
3028 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3029 | \r | |
3030 | **/\r | |
3031 | UINT32\r | |
3032 | EFIAPI\r | |
3033 | CalculateSum32 (\r | |
ee6c452c | 3034 | IN CONST UINT32 *Buffer,\r |
3035 | IN UINTN Length\r | |
ac644614 | 3036 | );\r |
3037 | \r | |
3038 | \r | |
3039 | /**\r | |
3040 | Returns the two's complement checksum of all elements in a buffer of\r | |
3041 | 32-bit values.\r | |
3042 | \r | |
3043 | This function first calculates the sum of the 32-bit values in the buffer\r | |
3044 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3045 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3046 | is 0, then 0 is returned.\r | |
3047 | \r | |
3048 | If Buffer is NULL, then ASSERT().\r | |
3049 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3050 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3051 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3052 | \r | |
1106ffe1 | 3053 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
3054 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3055 | \r |
ee6c452c | 3056 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 3057 | \r |
3058 | **/\r | |
3059 | UINT32\r | |
3060 | EFIAPI\r | |
3061 | CalculateCheckSum32 (\r | |
ee6c452c | 3062 | IN CONST UINT32 *Buffer,\r |
3063 | IN UINTN Length\r | |
ac644614 | 3064 | );\r |
3065 | \r | |
3066 | \r | |
3067 | /**\r | |
3068 | Returns the sum of all elements in a buffer of 64-bit values. During\r | |
3069 | calculation, the carry bits are dropped.\r | |
3070 | \r | |
3071 | This function calculates the sum of the 64-bit values in the buffer\r | |
3072 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3073 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
3074 | \r | |
3075 | If Buffer is NULL, then ASSERT().\r | |
3076 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3077 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3078 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3079 | \r | |
1106ffe1 | 3080 | @param Buffer Pointer to the buffer to carry out the sum operation.\r |
3081 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3082 | \r |
3083 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3084 | \r | |
3085 | **/\r | |
3086 | UINT64\r | |
3087 | EFIAPI\r | |
3088 | CalculateSum64 (\r | |
ee6c452c | 3089 | IN CONST UINT64 *Buffer,\r |
3090 | IN UINTN Length\r | |
ac644614 | 3091 | );\r |
3092 | \r | |
3093 | \r | |
3094 | /**\r | |
3095 | Returns the two's complement checksum of all elements in a buffer of\r | |
3096 | 64-bit values.\r | |
3097 | \r | |
3098 | This function first calculates the sum of the 64-bit values in the buffer\r | |
3099 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3100 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3101 | is 0, then 0 is returned.\r | |
3102 | \r | |
3103 | If Buffer is NULL, then ASSERT().\r | |
3104 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3105 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3106 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3107 | \r | |
1106ffe1 | 3108 | @param Buffer Pointer to the buffer to carry out the checksum operation.\r |
3109 | @param Length The size, in bytes, of Buffer.\r | |
ac644614 | 3110 | \r |
ee6c452c | 3111 | @return Checksum The 2's complement checksum of Buffer.\r |
ac644614 | 3112 | \r |
3113 | **/\r | |
3114 | UINT64\r | |
3115 | EFIAPI\r | |
3116 | CalculateCheckSum64 (\r | |
ee6c452c | 3117 | IN CONST UINT64 *Buffer,\r |
3118 | IN UINTN Length\r | |
ac644614 | 3119 | );\r |
3120 | \r | |
3121 | \r | |
d75f9fc2 | 3122 | //\r |
3123 | // Base Library CPU Functions\r | |
3124 | //\r | |
3125 | \r | |
3126 | /**\r | |
3127 | Function entry point used when a stack switch is requested with SwitchStack()\r | |
3128 | \r | |
3129 | @param Context1 Context1 parameter passed into SwitchStack().\r | |
3130 | @param Context2 Context2 parameter passed into SwitchStack().\r | |
3131 | \r | |
3132 | **/\r | |
ac644614 | 3133 | typedef\r |
3134 | VOID\r | |
9810cdd8 | 3135 | (EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r |
ac644614 | 3136 | IN VOID *Context1, OPTIONAL\r |
3137 | IN VOID *Context2 OPTIONAL\r | |
3138 | );\r | |
3139 | \r | |
3140 | \r | |
3141 | /**\r | |
3142 | Used to serialize load and store operations.\r | |
3143 | \r | |
3144 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
3145 | globally visible when this function returns.\r | |
3146 | \r | |
3147 | **/\r | |
3148 | VOID\r | |
3149 | EFIAPI\r | |
3150 | MemoryFence (\r | |
3151 | VOID\r | |
3152 | );\r | |
3153 | \r | |
3154 | \r | |
3155 | /**\r | |
3156 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
3157 | and returns 0.\r | |
3158 | \r | |
3159 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
3160 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
3161 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
3162 | \r | |
3163 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3164 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
17f695ed | 3165 | \r |
3166 | NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r | |
3167 | The same structure must never be used for more than one CPU architecture context.\r | |
3168 | For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r | |
3169 | SetJump()/LongJump() is not currently supported for the EBC processor type. \r | |
ac644614 | 3170 | \r |
3171 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3172 | \r | |
3173 | @retval 0 Indicates a return from SetJump().\r | |
3174 | \r | |
3175 | **/\r | |
3176 | UINTN\r | |
3177 | EFIAPI\r | |
3178 | SetJump (\r | |
3179 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
3180 | );\r | |
3181 | \r | |
3182 | \r | |
3183 | /**\r | |
3184 | Restores the CPU context that was saved with SetJump().\r | |
3185 | \r | |
3186 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
3187 | function never returns to the caller. Instead is resumes execution based on\r | |
3188 | the state of JumpBuffer.\r | |
3189 | \r | |
3190 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3191 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
ac644614 | 3192 | If Value is 0, then ASSERT().\r |
3193 | \r | |
3194 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3195 | @param Value The value to return when the SetJump() context is\r | |
3196 | restored and must be non-zero.\r | |
3197 | \r | |
3198 | **/\r | |
3199 | VOID\r | |
3200 | EFIAPI\r | |
3201 | LongJump (\r | |
3202 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
3203 | IN UINTN Value\r | |
3204 | );\r | |
3205 | \r | |
3206 | \r | |
3207 | /**\r | |
3208 | Enables CPU interrupts.\r | |
3209 | \r | |
ac644614 | 3210 | **/\r |
3211 | VOID\r | |
3212 | EFIAPI\r | |
3213 | EnableInterrupts (\r | |
3214 | VOID\r | |
3215 | );\r | |
3216 | \r | |
3217 | \r | |
3218 | /**\r | |
3219 | Disables CPU interrupts.\r | |
3220 | \r | |
ac644614 | 3221 | **/\r |
3222 | VOID\r | |
3223 | EFIAPI\r | |
3224 | DisableInterrupts (\r | |
3225 | VOID\r | |
3226 | );\r | |
3227 | \r | |
3228 | \r | |
3229 | /**\r | |
3230 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3231 | operation.\r | |
3232 | \r | |
ac644614 | 3233 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
3234 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
3235 | \r | |
3236 | **/\r | |
3237 | BOOLEAN\r | |
3238 | EFIAPI\r | |
3239 | SaveAndDisableInterrupts (\r | |
3240 | VOID\r | |
3241 | );\r | |
3242 | \r | |
3243 | \r | |
3244 | /**\r | |
3245 | Enables CPU interrupts for the smallest window required to capture any\r | |
3246 | pending interrupts.\r | |
3247 | \r | |
ac644614 | 3248 | **/\r |
3249 | VOID\r | |
3250 | EFIAPI\r | |
3251 | EnableDisableInterrupts (\r | |
3252 | VOID\r | |
3253 | );\r | |
3254 | \r | |
3255 | \r | |
3256 | /**\r | |
3257 | Retrieves the current CPU interrupt state.\r | |
3258 | \r | |
38bbd3d9 | 3259 | Returns TRUE is interrupts are currently enabled. Otherwise\r |
3260 | returns FALSE.\r | |
ac644614 | 3261 | \r |
3262 | @retval TRUE CPU interrupts are enabled.\r | |
3263 | @retval FALSE CPU interrupts are disabled.\r | |
3264 | \r | |
3265 | **/\r | |
3266 | BOOLEAN\r | |
3267 | EFIAPI\r | |
3268 | GetInterruptState (\r | |
3269 | VOID\r | |
3270 | );\r | |
3271 | \r | |
3272 | \r | |
3273 | /**\r | |
3274 | Set the current CPU interrupt state.\r | |
3275 | \r | |
3276 | Sets the current CPU interrupt state to the state specified by\r | |
3277 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
3278 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
3279 | returned.\r | |
3280 | \r | |
3281 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
3282 | interrupts should be disabled.\r | |
3283 | \r | |
3284 | @return InterruptState\r | |
3285 | \r | |
3286 | **/\r | |
3287 | BOOLEAN\r | |
3288 | EFIAPI\r | |
3289 | SetInterruptState (\r | |
3290 | IN BOOLEAN InterruptState\r | |
3291 | );\r | |
3292 | \r | |
3293 | \r | |
3294 | /**\r | |
3295 | Requests CPU to pause for a short period of time.\r | |
3296 | \r | |
3297 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
3298 | systems to prevent memory starvation while waiting for a spin lock.\r | |
3299 | \r | |
3300 | **/\r | |
3301 | VOID\r | |
3302 | EFIAPI\r | |
3303 | CpuPause (\r | |
3304 | VOID\r | |
3305 | );\r | |
3306 | \r | |
3307 | \r | |
3308 | /**\r | |
3309 | Transfers control to a function starting with a new stack.\r | |
3310 | \r | |
3311 | Transfers control to the function specified by EntryPoint using the\r | |
3312 | new stack specified by NewStack and passing in the parameters specified\r | |
3313 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
3314 | be NULL. The function EntryPoint must never return. This function\r | |
3315 | supports a variable number of arguments following the NewStack parameter.\r | |
1a2f870c | 3316 | These additional arguments are ignored on IA-32, x64, and EBC architectures.\r |
3317 | Itanium processors expect one additional parameter of type VOID * that specifies\r | |
ac644614 | 3318 | the new backing store pointer.\r |
3319 | \r | |
3320 | If EntryPoint is NULL, then ASSERT().\r | |
3321 | If NewStack is NULL, then ASSERT().\r | |
3322 | \r | |
3323 | @param EntryPoint A pointer to function to call with the new stack.\r | |
3324 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
3325 | function.\r | |
3326 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
3327 | function.\r | |
3328 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
3329 | function.\r | |
1a2f870c | 3330 | @param ... This variable argument list is ignored for IA-32, x64, and EBC architectures. \r |
3331 | For Itanium processors, this variable argument list is expected to contain \r | |
285010e7 | 3332 | a single parameter of type VOID * that specifies the new backing \r |
3333 | store pointer.\r | |
42eedea9 | 3334 | \r |
ac644614 | 3335 | \r |
3336 | **/\r | |
3337 | VOID\r | |
3338 | EFIAPI\r | |
3339 | SwitchStack (\r | |
3340 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
3341 | IN VOID *Context1, OPTIONAL\r | |
3342 | IN VOID *Context2, OPTIONAL\r | |
3343 | IN VOID *NewStack,\r | |
3344 | ...\r | |
3345 | );\r | |
3346 | \r | |
3347 | \r | |
3348 | /**\r | |
3349 | Generates a breakpoint on the CPU.\r | |
3350 | \r | |
3351 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
3352 | that code can resume normal execution after the breakpoint.\r | |
3353 | \r | |
3354 | **/\r | |
3355 | VOID\r | |
3356 | EFIAPI\r | |
3357 | CpuBreakpoint (\r | |
3358 | VOID\r | |
3359 | );\r | |
3360 | \r | |
3361 | \r | |
3362 | /**\r | |
3363 | Executes an infinite loop.\r | |
3364 | \r | |
3365 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
3366 | past the loop and the code that follows the loop must execute properly. This\r | |
3367 | implies that the infinite loop must not cause the code that follow it to be\r | |
3368 | optimized away.\r | |
3369 | \r | |
3370 | **/\r | |
3371 | VOID\r | |
3372 | EFIAPI\r | |
3373 | CpuDeadLoop (\r | |
3374 | VOID\r | |
3375 | );\r | |
2fe241a2 | 3376 | \r |
ac644614 | 3377 | #if defined (MDE_CPU_IPF)\r |
3378 | \r | |
3379 | /**\r | |
3380 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
3381 | CPU.\r | |
3382 | \r | |
cc39b88b | 3383 | Flushes the cache lines specified by Address and Length. If Address is not aligned \r |
3384 | on a cache line boundary, then entire cache line containing Address is flushed. \r | |
3385 | If Address + Length is not aligned on a cache line boundary, then the entire cache \r | |
3386 | line containing Address + Length - 1 is flushed. This function may choose to flush \r | |
3387 | the entire cache if that is more efficient than flushing the specified range. If \r | |
3388 | Length is 0, the no cache lines are flushed. Address is returned. \r | |
1a2f870c | 3389 | This function is only available on Itanium processors.\r |
ac644614 | 3390 | \r |
3391 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
3392 | \r | |
3393 | @param Address The base address of the instruction lines to invalidate. If\r | |
3394 | the CPU is in a physical addressing mode, then Address is a\r | |
3395 | physical address. If the CPU is in a virtual addressing mode,\r | |
3396 | then Address is a virtual address.\r | |
3397 | \r | |
3398 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
3399 | \r | |
cc39b88b | 3400 | @return Address.\r |
ac644614 | 3401 | \r |
3402 | **/\r | |
3403 | VOID *\r | |
3404 | EFIAPI\r | |
cc39b88b | 3405 | AsmFlushCacheRange (\r |
ac644614 | 3406 | IN VOID *Address,\r |
3407 | IN UINTN Length\r | |
3408 | );\r | |
3409 | \r | |
3410 | \r | |
3411 | /**\r | |
3412 | Executes a FC instruction\r | |
3413 | Executes a FC instruction on the cache line specified by Address.\r | |
3414 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r | |
1a2f870c | 3415 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3416 | \r |
ee6c452c | 3417 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3418 | \r |
3419 | @return The address of FC instruction executed.\r | |
3420 | \r | |
3421 | **/\r | |
3422 | UINT64\r | |
3423 | EFIAPI\r | |
3424 | AsmFc (\r | |
3425 | IN UINT64 Address\r | |
3426 | );\r | |
3427 | \r | |
3428 | \r | |
3429 | /**\r | |
3430 | Executes a FC.I instruction.\r | |
3431 | Executes a FC.I instruction on the cache line specified by Address.\r | |
3432 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r | |
1a2f870c | 3433 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3434 | \r |
ee6c452c | 3435 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3436 | \r |
3437 | @return The address of FC.I instruction executed.\r | |
3438 | \r | |
3439 | **/\r | |
3440 | UINT64\r | |
3441 | EFIAPI\r | |
3442 | AsmFci (\r | |
3443 | IN UINT64 Address\r | |
3444 | );\r | |
3445 | \r | |
3446 | \r | |
3447 | /**\r | |
3448 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
17f695ed | 3449 | \r |
3450 | Reads and returns the current value of Processor Identifier Register specified by Index. \r | |
ac644614 | 3451 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r |
3452 | registers) is determined by CPUID [3] bits {7:0}.\r | |
3453 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
3454 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
3455 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
1a2f870c | 3456 | catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3457 | \r |
ee6c452c | 3458 | @param Index The 8-bit Processor Identifier Register index to read.\r |
ac644614 | 3459 | \r |
3460 | @return The current value of Processor Identifier Register specified by Index.\r | |
3461 | \r | |
3462 | **/\r | |
3463 | UINT64\r | |
3464 | EFIAPI\r | |
3465 | AsmReadCpuid (\r | |
3466 | IN UINT8 Index\r | |
3467 | );\r | |
3468 | \r | |
3469 | \r | |
3470 | /**\r | |
3471 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
1a2f870c | 3472 | This function is only available on Itanium processors.\r |
ac644614 | 3473 | \r |
3474 | @return The current value of PSR.\r | |
3475 | \r | |
3476 | **/\r | |
3477 | UINT64\r | |
3478 | EFIAPI\r | |
3479 | AsmReadPsr (\r | |
3480 | VOID\r | |
3481 | );\r | |
3482 | \r | |
3483 | \r | |
3484 | /**\r | |
3485 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
22388319 | 3486 | \r |
ac644614 | 3487 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
22388319 | 3488 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r |
3489 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
1a2f870c | 3490 | fault handlers to catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3491 | \r |
ee6c452c | 3492 | @param Value The 64-bit value to write to PSR.\r |
ac644614 | 3493 | \r |
3494 | @return The 64-bit value written to the PSR.\r | |
3495 | \r | |
3496 | **/\r | |
3497 | UINT64\r | |
3498 | EFIAPI\r | |
3499 | AsmWritePsr (\r | |
3500 | IN UINT64 Value\r | |
3501 | );\r | |
3502 | \r | |
3503 | \r | |
3504 | /**\r | |
3505 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3506 | \r |
3507 | Reads and returns the current value of KR0. \r | |
1a2f870c | 3508 | This function is only available on Itanium processors.\r |
ac644614 | 3509 | \r |
3510 | @return The current value of KR0.\r | |
3511 | \r | |
3512 | **/\r | |
3513 | UINT64\r | |
3514 | EFIAPI\r | |
3515 | AsmReadKr0 (\r | |
3516 | VOID\r | |
3517 | );\r | |
3518 | \r | |
3519 | \r | |
3520 | /**\r | |
3521 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 3522 | \r |
3523 | Reads and returns the current value of KR1. \r | |
1a2f870c | 3524 | This function is only available on Itanium processors.\r |
ac644614 | 3525 | \r |
3526 | @return The current value of KR1.\r | |
3527 | \r | |
3528 | **/\r | |
3529 | UINT64\r | |
3530 | EFIAPI\r | |
3531 | AsmReadKr1 (\r | |
3532 | VOID\r | |
3533 | );\r | |
3534 | \r | |
3535 | \r | |
3536 | /**\r | |
3537 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 3538 | \r |
3539 | Reads and returns the current value of KR2. \r | |
1a2f870c | 3540 | This function is only available on Itanium processors.\r |
ac644614 | 3541 | \r |
3542 | @return The current value of KR2.\r | |
3543 | \r | |
3544 | **/\r | |
3545 | UINT64\r | |
3546 | EFIAPI\r | |
3547 | AsmReadKr2 (\r | |
3548 | VOID\r | |
3549 | );\r | |
3550 | \r | |
3551 | \r | |
3552 | /**\r | |
3553 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 3554 | \r |
3555 | Reads and returns the current value of KR3. \r | |
1a2f870c | 3556 | This function is only available on Itanium processors.\r |
ac644614 | 3557 | \r |
3558 | @return The current value of KR3.\r | |
3559 | \r | |
3560 | **/\r | |
3561 | UINT64\r | |
3562 | EFIAPI\r | |
3563 | AsmReadKr3 (\r | |
3564 | VOID\r | |
3565 | );\r | |
3566 | \r | |
3567 | \r | |
3568 | /**\r | |
3569 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
ac644614 | 3570 | \r |
2fe241a2 | 3571 | Reads and returns the current value of KR4. \r |
1a2f870c | 3572 | This function is only available on Itanium processors.\r |
2fe241a2 | 3573 | \r |
ac644614 | 3574 | @return The current value of KR4.\r |
3575 | \r | |
3576 | **/\r | |
3577 | UINT64\r | |
3578 | EFIAPI\r | |
3579 | AsmReadKr4 (\r | |
3580 | VOID\r | |
3581 | );\r | |
3582 | \r | |
3583 | \r | |
3584 | /**\r | |
3585 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 3586 | \r |
3587 | Reads and returns the current value of KR5. \r | |
1a2f870c | 3588 | This function is only available on Itanium processors.\r |
ac644614 | 3589 | \r |
3590 | @return The current value of KR5.\r | |
3591 | \r | |
3592 | **/\r | |
3593 | UINT64\r | |
3594 | EFIAPI\r | |
3595 | AsmReadKr5 (\r | |
3596 | VOID\r | |
3597 | );\r | |
3598 | \r | |
3599 | \r | |
3600 | /**\r | |
3601 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 3602 | \r |
3603 | Reads and returns the current value of KR6. \r | |
1a2f870c | 3604 | This function is only available on Itanium processors.\r |
ac644614 | 3605 | \r |
3606 | @return The current value of KR6.\r | |
3607 | \r | |
3608 | **/\r | |
3609 | UINT64\r | |
3610 | EFIAPI\r | |
3611 | AsmReadKr6 (\r | |
3612 | VOID\r | |
3613 | );\r | |
3614 | \r | |
3615 | \r | |
3616 | /**\r | |
3617 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 3618 | \r |
3619 | Reads and returns the current value of KR7. \r | |
1a2f870c | 3620 | This function is only available on Itanium processors.\r |
ac644614 | 3621 | \r |
3622 | @return The current value of KR7.\r | |
3623 | \r | |
3624 | **/\r | |
3625 | UINT64\r | |
3626 | EFIAPI\r | |
3627 | AsmReadKr7 (\r | |
3628 | VOID\r | |
3629 | );\r | |
3630 | \r | |
3631 | \r | |
3632 | /**\r | |
3633 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3634 | \r |
3635 | Writes the current value of KR0. The 64-bit value written to \r | |
1a2f870c | 3636 | the KR0 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3637 | \r |
ee6c452c | 3638 | @param Value The 64-bit value to write to KR0.\r |
ac644614 | 3639 | \r |
3640 | @return The 64-bit value written to the KR0.\r | |
3641 | \r | |
3642 | **/\r | |
3643 | UINT64\r | |
3644 | EFIAPI\r | |
3645 | AsmWriteKr0 (\r | |
3646 | IN UINT64 Value\r | |
3647 | );\r | |
3648 | \r | |
3649 | \r | |
3650 | /**\r | |
3651 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 3652 | \r |
3653 | Writes the current value of KR1. The 64-bit value written to \r | |
1a2f870c | 3654 | the KR1 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3655 | \r |
ee6c452c | 3656 | @param Value The 64-bit value to write to KR1.\r |
ac644614 | 3657 | \r |
3658 | @return The 64-bit value written to the KR1.\r | |
3659 | \r | |
3660 | **/\r | |
3661 | UINT64\r | |
3662 | EFIAPI\r | |
3663 | AsmWriteKr1 (\r | |
3664 | IN UINT64 Value\r | |
3665 | );\r | |
3666 | \r | |
3667 | \r | |
3668 | /**\r | |
3669 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 3670 | \r |
3671 | Writes the current value of KR2. The 64-bit value written to \r | |
1a2f870c | 3672 | the KR2 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3673 | \r |
ee6c452c | 3674 | @param Value The 64-bit value to write to KR2.\r |
ac644614 | 3675 | \r |
3676 | @return The 64-bit value written to the KR2.\r | |
3677 | \r | |
3678 | **/\r | |
3679 | UINT64\r | |
3680 | EFIAPI\r | |
3681 | AsmWriteKr2 (\r | |
3682 | IN UINT64 Value\r | |
3683 | );\r | |
3684 | \r | |
3685 | \r | |
3686 | /**\r | |
3687 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 3688 | \r |
3689 | Writes the current value of KR3. The 64-bit value written to \r | |
1a2f870c | 3690 | the KR3 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3691 | \r |
ee6c452c | 3692 | @param Value The 64-bit value to write to KR3.\r |
ac644614 | 3693 | \r |
3694 | @return The 64-bit value written to the KR3.\r | |
3695 | \r | |
3696 | **/\r | |
3697 | UINT64\r | |
3698 | EFIAPI\r | |
3699 | AsmWriteKr3 (\r | |
3700 | IN UINT64 Value\r | |
3701 | );\r | |
3702 | \r | |
3703 | \r | |
3704 | /**\r | |
3705 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
2fe241a2 | 3706 | \r |
3707 | Writes the current value of KR4. The 64-bit value written to \r | |
1a2f870c | 3708 | the KR4 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3709 | \r |
ee6c452c | 3710 | @param Value The 64-bit value to write to KR4.\r |
ac644614 | 3711 | \r |
3712 | @return The 64-bit value written to the KR4.\r | |
3713 | \r | |
3714 | **/\r | |
3715 | UINT64\r | |
3716 | EFIAPI\r | |
3717 | AsmWriteKr4 (\r | |
3718 | IN UINT64 Value\r | |
3719 | );\r | |
3720 | \r | |
3721 | \r | |
3722 | /**\r | |
3723 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 3724 | \r |
3725 | Writes the current value of KR5. The 64-bit value written to \r | |
1a2f870c | 3726 | the KR5 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3727 | \r |
ee6c452c | 3728 | @param Value The 64-bit value to write to KR5.\r |
ac644614 | 3729 | \r |
3730 | @return The 64-bit value written to the KR5.\r | |
3731 | \r | |
3732 | **/\r | |
3733 | UINT64\r | |
3734 | EFIAPI\r | |
3735 | AsmWriteKr5 (\r | |
3736 | IN UINT64 Value\r | |
3737 | );\r | |
3738 | \r | |
3739 | \r | |
3740 | /**\r | |
3741 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 3742 | \r |
3743 | Writes the current value of KR6. The 64-bit value written to \r | |
1a2f870c | 3744 | the KR6 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3745 | \r |
ee6c452c | 3746 | @param Value The 64-bit value to write to KR6.\r |
ac644614 | 3747 | \r |
3748 | @return The 64-bit value written to the KR6.\r | |
3749 | \r | |
3750 | **/\r | |
3751 | UINT64\r | |
3752 | EFIAPI\r | |
3753 | AsmWriteKr6 (\r | |
3754 | IN UINT64 Value\r | |
3755 | );\r | |
3756 | \r | |
3757 | \r | |
3758 | /**\r | |
3759 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 3760 | \r |
3761 | Writes the current value of KR7. The 64-bit value written to \r | |
1a2f870c | 3762 | the KR7 is returned. This function is only available on Itanium processors.\r |
ac644614 | 3763 | \r |
ee6c452c | 3764 | @param Value The 64-bit value to write to KR7.\r |
ac644614 | 3765 | \r |
3766 | @return The 64-bit value written to the KR7.\r | |
3767 | \r | |
3768 | **/\r | |
3769 | UINT64\r | |
3770 | EFIAPI\r | |
3771 | AsmWriteKr7 (\r | |
3772 | IN UINT64 Value\r | |
3773 | );\r | |
3774 | \r | |
3775 | \r | |
3776 | /**\r | |
3777 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 3778 | \r |
3779 | Reads and returns the current value of ITC.\r | |
1a2f870c | 3780 | This function is only available on Itanium processors.\r |
ac644614 | 3781 | \r |
3782 | @return The current value of ITC.\r | |
3783 | \r | |
3784 | **/\r | |
3785 | UINT64\r | |
3786 | EFIAPI\r | |
3787 | AsmReadItc (\r | |
3788 | VOID\r | |
3789 | );\r | |
3790 | \r | |
3791 | \r | |
3792 | /**\r | |
3793 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 3794 | \r |
3795 | Reads and returns the current value of ITV. \r | |
1a2f870c | 3796 | This function is only available on Itanium processors.\r |
ac644614 | 3797 | \r |
3798 | @return The current value of ITV.\r | |
3799 | \r | |
3800 | **/\r | |
3801 | UINT64\r | |
3802 | EFIAPI\r | |
3803 | AsmReadItv (\r | |
3804 | VOID\r | |
3805 | );\r | |
3806 | \r | |
3807 | \r | |
3808 | /**\r | |
3809 | Reads the current value of Interval Timer Match Register (ITM).\r | |
2fe241a2 | 3810 | \r |
3811 | Reads and returns the current value of ITM.\r | |
1a2f870c | 3812 | This function is only available on Itanium processors.\r |
ac644614 | 3813 | \r |
3814 | @return The current value of ITM.\r | |
3815 | **/\r | |
3816 | UINT64\r | |
3817 | EFIAPI\r | |
3818 | AsmReadItm (\r | |
3819 | VOID\r | |
3820 | );\r | |
3821 | \r | |
3822 | \r | |
3823 | /**\r | |
3824 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 3825 | \r |
3826 | Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r | |
1a2f870c | 3827 | This function is only available on Itanium processors.\r |
ac644614 | 3828 | \r |
ee6c452c | 3829 | @param Value The 64-bit value to write to ITC.\r |
ac644614 | 3830 | \r |
3831 | @return The 64-bit value written to the ITC.\r | |
3832 | \r | |
3833 | **/\r | |
3834 | UINT64\r | |
3835 | EFIAPI\r | |
3836 | AsmWriteItc (\r | |
3837 | IN UINT64 Value\r | |
3838 | );\r | |
3839 | \r | |
3840 | \r | |
3841 | /**\r | |
3842 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
2fe241a2 | 3843 | \r |
3844 | Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r | |
1a2f870c | 3845 | This function is only available on Itanium processors.\r |
ac644614 | 3846 | \r |
ee6c452c | 3847 | @param Value The 64-bit value to write to ITM.\r |
ac644614 | 3848 | \r |
3849 | @return The 64-bit value written to the ITM.\r | |
3850 | \r | |
3851 | **/\r | |
3852 | UINT64\r | |
3853 | EFIAPI\r | |
3854 | AsmWriteItm (\r | |
3855 | IN UINT64 Value\r | |
3856 | );\r | |
3857 | \r | |
3858 | \r | |
3859 | /**\r | |
3860 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 3861 | \r |
3862 | Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r | |
ac644614 | 3863 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
3864 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
3865 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
3866 | fault handlers to catch the faults.\r | |
1a2f870c | 3867 | This function is only available on Itanium processors.\r |
ac644614 | 3868 | \r |
ee6c452c | 3869 | @param Value The 64-bit value to write to ITV.\r |
ac644614 | 3870 | \r |
3871 | @return The 64-bit value written to the ITV.\r | |
3872 | \r | |
3873 | **/\r | |
3874 | UINT64\r | |
3875 | EFIAPI\r | |
3876 | AsmWriteItv (\r | |
3877 | IN UINT64 Value\r | |
3878 | );\r | |
3879 | \r | |
3880 | \r | |
3881 | /**\r | |
3882 | Reads the current value of Default Control Register (DCR).\r | |
2fe241a2 | 3883 | \r |
1a2f870c | 3884 | Reads and returns the current value of DCR. This function is only available on Itanium processors.\r |
ac644614 | 3885 | \r |
3886 | @return The current value of DCR.\r | |
3887 | \r | |
3888 | **/\r | |
3889 | UINT64\r | |
3890 | EFIAPI\r | |
3891 | AsmReadDcr (\r | |
3892 | VOID\r | |
3893 | );\r | |
3894 | \r | |
3895 | \r | |
3896 | /**\r | |
3897 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 3898 | \r |
1a2f870c | 3899 | Reads and returns the current value of IVA. This function is only available on Itanium processors.\r |
ac644614 | 3900 | \r |
3901 | @return The current value of IVA.\r | |
3902 | **/\r | |
3903 | UINT64\r | |
3904 | EFIAPI\r | |
3905 | AsmReadIva (\r | |
3906 | VOID\r | |
3907 | );\r | |
3908 | \r | |
3909 | \r | |
3910 | /**\r | |
3911 | Reads the current value of Page Table Address Register (PTA).\r | |
2fe241a2 | 3912 | \r |
1a2f870c | 3913 | Reads and returns the current value of PTA. This function is only available on Itanium processors.\r |
ac644614 | 3914 | \r |
3915 | @return The current value of PTA.\r | |
3916 | \r | |
3917 | **/\r | |
3918 | UINT64\r | |
3919 | EFIAPI\r | |
3920 | AsmReadPta (\r | |
3921 | VOID\r | |
3922 | );\r | |
3923 | \r | |
3924 | \r | |
3925 | /**\r | |
3926 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
2fe241a2 | 3927 | \r |
3928 | Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r | |
ac644614 | 3929 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
3930 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
3931 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
3932 | fault handlers to catch the faults.\r | |
1a2f870c | 3933 | This function is only available on Itanium processors.\r |
ac644614 | 3934 | \r |
ee6c452c | 3935 | @param Value The 64-bit value to write to DCR.\r |
ac644614 | 3936 | \r |
3937 | @return The 64-bit value written to the DCR.\r | |
3938 | \r | |
3939 | **/\r | |
3940 | UINT64\r | |
3941 | EFIAPI\r | |
3942 | AsmWriteDcr (\r | |
3943 | IN UINT64 Value\r | |
3944 | );\r | |
3945 | \r | |
3946 | \r | |
3947 | /**\r | |
3948 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 3949 | \r |
3950 | Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r | |
ac644614 | 3951 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r |
3952 | the low 15 bits of Value is ignored when written.\r | |
1a2f870c | 3953 | This function is only available on Itanium processors.\r |
ac644614 | 3954 | \r |
ee6c452c | 3955 | @param Value The 64-bit value to write to IVA.\r |
ac644614 | 3956 | \r |
3957 | @return The 64-bit value written to the IVA.\r | |
3958 | \r | |
3959 | **/\r | |
3960 | UINT64\r | |
3961 | EFIAPI\r | |
3962 | AsmWriteIva (\r | |
3963 | IN UINT64 Value\r | |
3964 | );\r | |
3965 | \r | |
3966 | \r | |
3967 | /**\r | |
3968 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
2fe241a2 | 3969 | \r |
3970 | Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r | |
ac644614 | 3971 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
3972 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
3973 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
3974 | fault handlers to catch the faults.\r | |
1a2f870c | 3975 | This function is only available on Itanium processors.\r |
ac644614 | 3976 | \r |
ee6c452c | 3977 | @param Value The 64-bit value to write to PTA.\r |
ac644614 | 3978 | \r |
3979 | @return The 64-bit value written to the PTA.\r | |
3980 | **/\r | |
3981 | UINT64\r | |
3982 | EFIAPI\r | |
3983 | AsmWritePta (\r | |
3984 | IN UINT64 Value\r | |
3985 | );\r | |
3986 | \r | |
3987 | \r | |
3988 | /**\r | |
3989 | Reads the current value of Local Interrupt ID Register (LID).\r | |
2fe241a2 | 3990 | \r |
1a2f870c | 3991 | Reads and returns the current value of LID. This function is only available on Itanium processors.\r |
ac644614 | 3992 | \r |
3993 | @return The current value of LID.\r | |
3994 | \r | |
3995 | **/\r | |
3996 | UINT64\r | |
3997 | EFIAPI\r | |
3998 | AsmReadLid (\r | |
3999 | VOID\r | |
4000 | );\r | |
4001 | \r | |
4002 | \r | |
4003 | /**\r | |
4004 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
2fe241a2 | 4005 | \r |
1a2f870c | 4006 | Reads and returns the current value of IVR. This function is only available on Itanium processors. \r |
ac644614 | 4007 | \r |
4008 | @return The current value of IVR.\r | |
4009 | \r | |
4010 | **/\r | |
4011 | UINT64\r | |
4012 | EFIAPI\r | |
4013 | AsmReadIvr (\r | |
4014 | VOID\r | |
4015 | );\r | |
4016 | \r | |
4017 | \r | |
4018 | /**\r | |
4019 | Reads the current value of Task Priority Register (TPR).\r | |
2fe241a2 | 4020 | \r |
1a2f870c | 4021 | Reads and returns the current value of TPR. This function is only available on Itanium processors. \r |
ac644614 | 4022 | \r |
4023 | @return The current value of TPR.\r | |
4024 | \r | |
4025 | **/\r | |
4026 | UINT64\r | |
4027 | EFIAPI\r | |
4028 | AsmReadTpr (\r | |
4029 | VOID\r | |
4030 | );\r | |
4031 | \r | |
4032 | \r | |
4033 | /**\r | |
4034 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
2fe241a2 | 4035 | \r |
1a2f870c | 4036 | Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r |
ac644614 | 4037 | \r |
4038 | @return The current value of IRR0.\r | |
4039 | \r | |
4040 | **/\r | |
4041 | UINT64\r | |
4042 | EFIAPI\r | |
4043 | AsmReadIrr0 (\r | |
4044 | VOID\r | |
4045 | );\r | |
4046 | \r | |
4047 | \r | |
4048 | /**\r | |
4049 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
2fe241a2 | 4050 | \r |
1a2f870c | 4051 | Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r |
ac644614 | 4052 | \r |
4053 | @return The current value of IRR1.\r | |
4054 | \r | |
4055 | **/\r | |
4056 | UINT64\r | |
4057 | EFIAPI\r | |
4058 | AsmReadIrr1 (\r | |
4059 | VOID\r | |
4060 | );\r | |
4061 | \r | |
4062 | \r | |
4063 | /**\r | |
4064 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
2fe241a2 | 4065 | \r |
1a2f870c | 4066 | Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r |
ac644614 | 4067 | \r |
4068 | @return The current value of IRR2.\r | |
4069 | \r | |
4070 | **/\r | |
4071 | UINT64\r | |
4072 | EFIAPI\r | |
4073 | AsmReadIrr2 (\r | |
4074 | VOID\r | |
4075 | );\r | |
4076 | \r | |
4077 | \r | |
4078 | /**\r | |
4079 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
2fe241a2 | 4080 | \r |
1a2f870c | 4081 | Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r |
ac644614 | 4082 | \r |
4083 | @return The current value of IRR3.\r | |
4084 | \r | |
4085 | **/\r | |
4086 | UINT64\r | |
4087 | EFIAPI\r | |
4088 | AsmReadIrr3 (\r | |
4089 | VOID\r | |
4090 | );\r | |
4091 | \r | |
4092 | \r | |
4093 | /**\r | |
4094 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4095 | \r |
1a2f870c | 4096 | Reads and returns the current value of PMV. This function is only available on Itanium processors. \r |
ac644614 | 4097 | \r |
4098 | @return The current value of PMV.\r | |
4099 | \r | |
4100 | **/\r | |
4101 | UINT64\r | |
4102 | EFIAPI\r | |
4103 | AsmReadPmv (\r | |
4104 | VOID\r | |
4105 | );\r | |
4106 | \r | |
4107 | \r | |
4108 | /**\r | |
4109 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4110 | \r |
1a2f870c | 4111 | Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r |
ac644614 | 4112 | \r |
4113 | @return The current value of CMCV.\r | |
4114 | \r | |
4115 | **/\r | |
4116 | UINT64\r | |
4117 | EFIAPI\r | |
4118 | AsmReadCmcv (\r | |
4119 | VOID\r | |
4120 | );\r | |
4121 | \r | |
4122 | \r | |
4123 | /**\r | |
4124 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4125 | \r |
1a2f870c | 4126 | Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r |
ac644614 | 4127 | \r |
4128 | @return The current value of LRR0.\r | |
4129 | \r | |
4130 | **/\r | |
4131 | UINT64\r | |
4132 | EFIAPI\r | |
4133 | AsmReadLrr0 (\r | |
4134 | VOID\r | |
4135 | );\r | |
4136 | \r | |
4137 | \r | |
4138 | /**\r | |
4139 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4140 | \r |
1a2f870c | 4141 | Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r |
ac644614 | 4142 | \r |
4143 | @return The current value of LRR1.\r | |
4144 | \r | |
4145 | **/\r | |
4146 | UINT64\r | |
4147 | EFIAPI\r | |
4148 | AsmReadLrr1 (\r | |
4149 | VOID\r | |
4150 | );\r | |
4151 | \r | |
4152 | \r | |
4153 | /**\r | |
4154 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4155 | \r |
4156 | Writes the current value of LID. The 64-bit value written to the LID is returned. \r | |
ac644614 | 4157 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4158 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
4159 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4160 | fault handlers to catch the faults.\r | |
1a2f870c | 4161 | This function is only available on Itanium processors.\r |
ac644614 | 4162 | \r |
ee6c452c | 4163 | @param Value The 64-bit value to write to LID.\r |
ac644614 | 4164 | \r |
4165 | @return The 64-bit value written to the LID.\r | |
4166 | \r | |
4167 | **/\r | |
4168 | UINT64\r | |
4169 | EFIAPI\r | |
4170 | AsmWriteLid (\r | |
4171 | IN UINT64 Value\r | |
4172 | );\r | |
4173 | \r | |
4174 | \r | |
4175 | /**\r | |
4176 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
2fe241a2 | 4177 | \r |
4178 | Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r | |
ac644614 | 4179 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4180 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
4181 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4182 | fault handlers to catch the faults.\r | |
1a2f870c | 4183 | This function is only available on Itanium processors.\r |
ac644614 | 4184 | \r |
ee6c452c | 4185 | @param Value The 64-bit value to write to TPR.\r |
ac644614 | 4186 | \r |
4187 | @return The 64-bit value written to the TPR.\r | |
4188 | \r | |
4189 | **/\r | |
4190 | UINT64\r | |
4191 | EFIAPI\r | |
4192 | AsmWriteTpr (\r | |
4193 | IN UINT64 Value\r | |
4194 | );\r | |
4195 | \r | |
4196 | \r | |
4197 | /**\r | |
4198 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
2fe241a2 | 4199 | \r |
1a2f870c | 4200 | Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r |
ac644614 | 4201 | \r |
4202 | **/\r | |
4203 | VOID\r | |
4204 | EFIAPI\r | |
4205 | AsmWriteEoi (\r | |
4206 | VOID\r | |
4207 | );\r | |
4208 | \r | |
4209 | \r | |
4210 | /**\r | |
4211 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4212 | \r |
4213 | Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r | |
ac644614 | 4214 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4215 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
4216 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4217 | fault handlers to catch the faults.\r | |
1a2f870c | 4218 | This function is only available on Itanium processors.\r |
ac644614 | 4219 | \r |
ee6c452c | 4220 | @param Value The 64-bit value to write to PMV.\r |
ac644614 | 4221 | \r |
4222 | @return The 64-bit value written to the PMV.\r | |
4223 | \r | |
4224 | **/\r | |
4225 | UINT64\r | |
4226 | EFIAPI\r | |
4227 | AsmWritePmv (\r | |
4228 | IN UINT64 Value\r | |
4229 | );\r | |
4230 | \r | |
4231 | \r | |
4232 | /**\r | |
4233 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4234 | \r |
4235 | Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r | |
ac644614 | 4236 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4237 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
4238 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4239 | fault handlers to catch the faults.\r | |
1a2f870c | 4240 | This function is only available on Itanium processors.\r |
ac644614 | 4241 | \r |
ee6c452c | 4242 | @param Value The 64-bit value to write to CMCV.\r |
ac644614 | 4243 | \r |
4244 | @return The 64-bit value written to the CMCV.\r | |
4245 | \r | |
4246 | **/\r | |
4247 | UINT64\r | |
4248 | EFIAPI\r | |
4249 | AsmWriteCmcv (\r | |
4250 | IN UINT64 Value\r | |
4251 | );\r | |
4252 | \r | |
4253 | \r | |
4254 | /**\r | |
4255 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4256 | \r |
4257 | Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r | |
ac644614 | 4258 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4259 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
4260 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4261 | fault handlers to catch the faults.\r | |
1a2f870c | 4262 | This function is only available on Itanium processors.\r |
ac644614 | 4263 | \r |
ee6c452c | 4264 | @param Value The 64-bit value to write to LRR0.\r |
ac644614 | 4265 | \r |
4266 | @return The 64-bit value written to the LRR0.\r | |
4267 | \r | |
4268 | **/\r | |
4269 | UINT64\r | |
4270 | EFIAPI\r | |
4271 | AsmWriteLrr0 (\r | |
4272 | IN UINT64 Value\r | |
4273 | );\r | |
4274 | \r | |
4275 | \r | |
4276 | /**\r | |
4277 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4278 | \r |
4279 | Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r | |
ac644614 | 4280 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4281 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
4282 | The caller must either guarantee that Value is valid, or the caller must\r | |
4283 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4284 | This function is only available on Itanium processors.\r |
ac644614 | 4285 | \r |
ee6c452c | 4286 | @param Value The 64-bit value to write to LRR1.\r |
ac644614 | 4287 | \r |
4288 | @return The 64-bit value written to the LRR1.\r | |
4289 | \r | |
4290 | **/\r | |
4291 | UINT64\r | |
4292 | EFIAPI\r | |
4293 | AsmWriteLrr1 (\r | |
4294 | IN UINT64 Value\r | |
4295 | );\r | |
4296 | \r | |
4297 | \r | |
4298 | /**\r | |
4299 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
4300 | \r | |
4301 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4302 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
4303 | breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r | |
4304 | on all processor models. Implemented registers are contiguous starting with\r | |
4305 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
4306 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4307 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4308 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4309 | This function is only available on Itanium processors.\r |
ac644614 | 4310 | \r |
ee6c452c | 4311 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r |
ac644614 | 4312 | \r |
4313 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
4314 | \r | |
4315 | **/\r | |
4316 | UINT64\r | |
4317 | EFIAPI\r | |
4318 | AsmReadIbr (\r | |
4319 | IN UINT8 Index\r | |
4320 | );\r | |
4321 | \r | |
4322 | \r | |
4323 | /**\r | |
4324 | Reads the current value of Data Breakpoint Register (DBR).\r | |
4325 | \r | |
4326 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4327 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
4328 | mask conditions. At least 4 data registers pairs are implemented on all processor\r | |
4329 | models. Implemented registers are contiguous starting with register 0.\r | |
4330 | No parameter checking is performed on Index. If the Index value is beyond\r | |
4331 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
4332 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
4333 | fault handlers to catch the faults.\r | |
1a2f870c | 4334 | This function is only available on Itanium processors.\r |
ac644614 | 4335 | \r |
ee6c452c | 4336 | @param Index The 8-bit Data Breakpoint Register index to read.\r |
ac644614 | 4337 | \r |
4338 | @return The current value of Data Breakpoint Register specified by Index.\r | |
4339 | \r | |
4340 | **/\r | |
4341 | UINT64\r | |
4342 | EFIAPI\r | |
4343 | AsmReadDbr (\r | |
4344 | IN UINT8 Index\r | |
4345 | );\r | |
4346 | \r | |
4347 | \r | |
4348 | /**\r | |
4349 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
4350 | \r | |
4351 | All processor implementations provide at least 4 performance counters\r | |
4352 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r | |
4353 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r | |
4354 | additional implementation-dependent PMC and PMD to increase the number of\r | |
4355 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4356 | register set is implementation dependent. No parameter checking is performed\r | |
4357 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
4358 | zero value will be returned.\r | |
1a2f870c | 4359 | This function is only available on Itanium processors.\r |
ac644614 | 4360 | \r |
ee6c452c | 4361 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r |
ac644614 | 4362 | \r |
2fe241a2 | 4363 | @return The current value of Performance Monitor Configuration Register\r |
4364 | specified by Index.\r | |
ac644614 | 4365 | \r |
4366 | **/\r | |
4367 | UINT64\r | |
4368 | EFIAPI\r | |
4369 | AsmReadPmc (\r | |
4370 | IN UINT8 Index\r | |
4371 | );\r | |
4372 | \r | |
4373 | \r | |
4374 | /**\r | |
4375 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
4376 | \r | |
4377 | All processor implementations provide at least 4 performance counters\r | |
4378 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
4379 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r | |
4380 | provide additional implementation-dependent PMC and PMD to increase the number\r | |
4381 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4382 | register set is implementation dependent. No parameter checking is performed\r | |
4383 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
4384 | zero value will be returned.\r | |
1a2f870c | 4385 | This function is only available on Itanium processors.\r |
ac644614 | 4386 | \r |
ee6c452c | 4387 | @param Index The 8-bit Performance Monitor Data Register index to read.\r |
ac644614 | 4388 | \r |
4389 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
4390 | \r | |
4391 | **/\r | |
4392 | UINT64\r | |
4393 | EFIAPI\r | |
4394 | AsmReadPmd (\r | |
4395 | IN UINT8 Index\r | |
4396 | );\r | |
4397 | \r | |
4398 | \r | |
4399 | /**\r | |
4400 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
4401 | \r | |
4402 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
4403 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4404 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
4405 | breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r | |
4406 | on all processor models. Implemented registers are contiguous starting with\r | |
4407 | register 0. No parameter checking is performed on Index. If the Index value\r | |
4408 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4409 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4410 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4411 | This function is only available on Itanium processors.\r |
ac644614 | 4412 | \r |
ee6c452c | 4413 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r |
4414 | @param Value The 64-bit value to write to IBR.\r | |
ac644614 | 4415 | \r |
4416 | @return The 64-bit value written to the IBR.\r | |
4417 | \r | |
4418 | **/\r | |
4419 | UINT64\r | |
4420 | EFIAPI\r | |
4421 | AsmWriteIbr (\r | |
4422 | IN UINT8 Index,\r | |
4423 | IN UINT64 Value\r | |
4424 | );\r | |
4425 | \r | |
4426 | \r | |
4427 | /**\r | |
4428 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
4429 | \r | |
4430 | Writes current value of Data Breakpoint Register specified by Index.\r | |
4431 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4432 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
4433 | mask conditions. At least 4 data registers pairs are implemented on all processor\r | |
4434 | models. Implemented registers are contiguous starting with register 0. No parameter\r | |
4435 | checking is performed on Index. If the Index value is beyond the implemented\r | |
4436 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
4437 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
4438 | catch the faults.\r | |
1a2f870c | 4439 | This function is only available on Itanium processors.\r |
ac644614 | 4440 | \r |
ee6c452c | 4441 | @param Index The 8-bit Data Breakpoint Register index to write.\r |
4442 | @param Value The 64-bit value to write to DBR.\r | |
ac644614 | 4443 | \r |
4444 | @return The 64-bit value written to the DBR.\r | |
4445 | \r | |
4446 | **/\r | |
4447 | UINT64\r | |
4448 | EFIAPI\r | |
4449 | AsmWriteDbr (\r | |
4450 | IN UINT8 Index,\r | |
4451 | IN UINT64 Value\r | |
4452 | );\r | |
4453 | \r | |
4454 | \r | |
4455 | /**\r | |
4456 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
4457 | \r | |
4458 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
4459 | All processor implementations provide at least 4 performance counters\r | |
4460 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status\r | |
4461 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r | |
4462 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
4463 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r | |
4464 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
4465 | beyond the implemented PMC register range, the write is ignored.\r | |
1a2f870c | 4466 | This function is only available on Itanium processors.\r |
ac644614 | 4467 | \r |
ee6c452c | 4468 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r |
4469 | @param Value The 64-bit value to write to PMC.\r | |
ac644614 | 4470 | \r |
4471 | @return The 64-bit value written to the PMC.\r | |
4472 | \r | |
4473 | **/\r | |
4474 | UINT64\r | |
4475 | EFIAPI\r | |
4476 | AsmWritePmc (\r | |
4477 | IN UINT8 Index,\r | |
4478 | IN UINT64 Value\r | |
4479 | );\r | |
4480 | \r | |
4481 | \r | |
4482 | /**\r | |
4483 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
4484 | \r | |
4485 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
4486 | All processor implementations provide at least 4 performance counters\r | |
4487 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r | |
4488 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r | |
4489 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
4490 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r | |
4491 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
4492 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
1a2f870c | 4493 | This function is only available on Itanium processors.\r |
ac644614 | 4494 | \r |
ee6c452c | 4495 | @param Index The 8-bit Performance Monitor Data Register index to write.\r |
4496 | @param Value The 64-bit value to write to PMD.\r | |
ac644614 | 4497 | \r |
4498 | @return The 64-bit value written to the PMD.\r | |
4499 | \r | |
4500 | **/\r | |
4501 | UINT64\r | |
4502 | EFIAPI\r | |
4503 | AsmWritePmd (\r | |
4504 | IN UINT8 Index,\r | |
4505 | IN UINT64 Value\r | |
4506 | );\r | |
4507 | \r | |
4508 | \r | |
4509 | /**\r | |
4510 | Reads the current value of 64-bit Global Pointer (GP).\r | |
4511 | \r | |
4512 | Reads and returns the current value of GP.\r | |
1a2f870c | 4513 | This function is only available on Itanium processors.\r |
ac644614 | 4514 | \r |
4515 | @return The current value of GP.\r | |
4516 | \r | |
4517 | **/\r | |
4518 | UINT64\r | |
4519 | EFIAPI\r | |
4520 | AsmReadGp (\r | |
4521 | VOID\r | |
4522 | );\r | |
4523 | \r | |
4524 | \r | |
4525 | /**\r | |
4526 | Write the current value of 64-bit Global Pointer (GP).\r | |
4527 | \r | |
4528 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
4529 | No parameter checking is performed on Value.\r | |
1a2f870c | 4530 | This function is only available on Itanium processors.\r |
ac644614 | 4531 | \r |
4532 | @param Value The 64-bit value to write to GP.\r | |
4533 | \r | |
4534 | @return The 64-bit value written to the GP.\r | |
4535 | \r | |
4536 | **/\r | |
4537 | UINT64\r | |
4538 | EFIAPI\r | |
4539 | AsmWriteGp (\r | |
4540 | IN UINT64 Value\r | |
4541 | );\r | |
4542 | \r | |
4543 | \r | |
4544 | /**\r | |
4545 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
4546 | \r | |
4547 | Reads and returns the current value of SP.\r | |
1a2f870c | 4548 | This function is only available on Itanium processors.\r |
ac644614 | 4549 | \r |
4550 | @return The current value of SP.\r | |
4551 | \r | |
4552 | **/\r | |
4553 | UINT64\r | |
4554 | EFIAPI\r | |
4555 | AsmReadSp (\r | |
4556 | VOID\r | |
4557 | );\r | |
4558 | \r | |
4559 | \r | |
aad6137d | 4560 | ///\r |
4561 | /// Valid Index value for AsmReadControlRegister()\r | |
4562 | ///\r | |
4563 | #define IPF_CONTROL_REGISTER_DCR 0\r | |
4564 | #define IPF_CONTROL_REGISTER_ITM 1\r | |
4565 | #define IPF_CONTROL_REGISTER_IVA 2\r | |
4566 | #define IPF_CONTROL_REGISTER_PTA 8\r | |
4567 | #define IPF_CONTROL_REGISTER_IPSR 16\r | |
4568 | #define IPF_CONTROL_REGISTER_ISR 17\r | |
4569 | #define IPF_CONTROL_REGISTER_IIP 19\r | |
4570 | #define IPF_CONTROL_REGISTER_IFA 20\r | |
4571 | #define IPF_CONTROL_REGISTER_ITIR 21\r | |
4572 | #define IPF_CONTROL_REGISTER_IIPA 22\r | |
4573 | #define IPF_CONTROL_REGISTER_IFS 23\r | |
4574 | #define IPF_CONTROL_REGISTER_IIM 24\r | |
4575 | #define IPF_CONTROL_REGISTER_IHA 25\r | |
4576 | #define IPF_CONTROL_REGISTER_LID 64\r | |
4577 | #define IPF_CONTROL_REGISTER_IVR 65\r | |
4578 | #define IPF_CONTROL_REGISTER_TPR 66\r | |
4579 | #define IPF_CONTROL_REGISTER_EOI 67\r | |
4580 | #define IPF_CONTROL_REGISTER_IRR0 68\r | |
4581 | #define IPF_CONTROL_REGISTER_IRR1 69\r | |
4582 | #define IPF_CONTROL_REGISTER_IRR2 70\r | |
4583 | #define IPF_CONTROL_REGISTER_IRR3 71\r | |
4584 | #define IPF_CONTROL_REGISTER_ITV 72\r | |
4585 | #define IPF_CONTROL_REGISTER_PMV 73\r | |
4586 | #define IPF_CONTROL_REGISTER_CMCV 74\r | |
4587 | #define IPF_CONTROL_REGISTER_LRR0 80\r | |
4588 | #define IPF_CONTROL_REGISTER_LRR1 81\r | |
4589 | \r | |
4590 | /**\r | |
4591 | Reads a 64-bit control register.\r | |
4592 | \r | |
4593 | Reads and returns the control register specified by Index. The valid Index valued are defined\r | |
4594 | above in "Related Definitions".\r | |
1a2f870c | 4595 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.\r |
aad6137d | 4596 | \r |
4597 | @param Index The index of the control register to read.\r | |
4598 | \r | |
4599 | @return The control register specified by Index.\r | |
4600 | \r | |
4601 | **/\r | |
4602 | UINT64\r | |
4603 | EFIAPI\r | |
4604 | AsmReadControlRegister (\r | |
4605 | IN UINT64 Index\r | |
4606 | );\r | |
4607 | \r | |
4608 | \r | |
4609 | ///\r | |
4610 | /// Valid Index value for AsmReadApplicationRegister()\r | |
4611 | ///\r | |
4612 | #define IPF_APPLICATION_REGISTER_K0 0\r | |
4613 | #define IPF_APPLICATION_REGISTER_K1 1\r | |
4614 | #define IPF_APPLICATION_REGISTER_K2 2\r | |
4615 | #define IPF_APPLICATION_REGISTER_K3 3\r | |
4616 | #define IPF_APPLICATION_REGISTER_K4 4\r | |
4617 | #define IPF_APPLICATION_REGISTER_K5 5\r | |
4618 | #define IPF_APPLICATION_REGISTER_K6 6\r | |
4619 | #define IPF_APPLICATION_REGISTER_K7 7\r | |
4620 | #define IPF_APPLICATION_REGISTER_RSC 16\r | |
4621 | #define IPF_APPLICATION_REGISTER_BSP 17\r | |
4622 | #define IPF_APPLICATION_REGISTER_BSPSTORE 18\r | |
4623 | #define IPF_APPLICATION_REGISTER_RNAT 19\r | |
4624 | #define IPF_APPLICATION_REGISTER_FCR 21\r | |
4625 | #define IPF_APPLICATION_REGISTER_EFLAG 24\r | |
4626 | #define IPF_APPLICATION_REGISTER_CSD 25\r | |
4627 | #define IPF_APPLICATION_REGISTER_SSD 26\r | |
4628 | #define IPF_APPLICATION_REGISTER_CFLG 27\r | |
4629 | #define IPF_APPLICATION_REGISTER_FSR 28\r | |
4630 | #define IPF_APPLICATION_REGISTER_FIR 29\r | |
4631 | #define IPF_APPLICATION_REGISTER_FDR 30\r | |
4632 | #define IPF_APPLICATION_REGISTER_CCV 32\r | |
4633 | #define IPF_APPLICATION_REGISTER_UNAT 36\r | |
4634 | #define IPF_APPLICATION_REGISTER_FPSR 40\r | |
4635 | #define IPF_APPLICATION_REGISTER_ITC 44\r | |
4636 | #define IPF_APPLICATION_REGISTER_PFS 64\r | |
4637 | #define IPF_APPLICATION_REGISTER_LC 65\r | |
4638 | #define IPF_APPLICATION_REGISTER_EC 66\r | |
4639 | \r | |
4640 | /**\r | |
4641 | Reads a 64-bit application register.\r | |
4642 | \r | |
4643 | Reads and returns the application register specified by Index. The valid Index valued are defined\r | |
4644 | above in "Related Definitions".\r | |
1a2f870c | 4645 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.\r |
aad6137d | 4646 | \r |
4647 | @param Index The index of the application register to read.\r | |
4648 | \r | |
4649 | @return The application register specified by Index.\r | |
4650 | \r | |
4651 | **/\r | |
4652 | UINT64\r | |
4653 | EFIAPI\r | |
4654 | AsmReadApplicationRegister (\r | |
4655 | IN UINT64 Index\r | |
4656 | );\r | |
4657 | \r | |
4658 | \r | |
59e0bb0c | 4659 | /**\r |
4660 | Reads the current value of a Machine Specific Register (MSR).\r | |
4661 | \r | |
4662 | Reads and returns the current value of the Machine Specific Register specified by Index. No\r | |
4663 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
4664 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
4665 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 4666 | only available on Itanium processors.\r |
59e0bb0c | 4667 | \r |
4668 | @param Index The 8-bit Machine Specific Register index to read.\r | |
4669 | \r | |
4670 | @return The current value of the Machine Specific Register specified by Index. \r | |
4671 | \r | |
4672 | **/\r | |
4673 | UINT64\r | |
4674 | EFIAPI\r | |
4675 | AsmReadMsr (\r | |
4676 | IN UINT8 Index \r | |
4677 | );\r | |
4678 | \r | |
4679 | \r | |
4680 | /**\r | |
4681 | Writes the current value of a Machine Specific Register (MSR).\r | |
4682 | \r | |
4683 | Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r | |
4684 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
4685 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
4686 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 4687 | only available on Itanium processors.\r |
59e0bb0c | 4688 | \r |
4689 | @param Index The 8-bit Machine Specific Register index to write.\r | |
4690 | @param Value The 64-bit value to write to the Machine Specific Register.\r | |
4691 | \r | |
4692 | @return The 64-bit value to write to the Machine Specific Register. \r | |
4693 | \r | |
4694 | **/\r | |
4695 | UINT64\r | |
4696 | EFIAPI\r | |
4697 | AsmWriteMsr (\r | |
4698 | IN UINT8 Index, \r | |
4699 | IN UINT64 Value \r | |
4700 | );\r | |
4701 | \r | |
4702 | \r | |
ac644614 | 4703 | /**\r |
4704 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
4705 | \r | |
4706 | Determines the current execution mode of the CPU.\r | |
4707 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
4708 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
4709 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
4710 | and -1 is returned.\r | |
1a2f870c | 4711 | This function is only available on Itanium processors.\r |
ac644614 | 4712 | \r |
17f695ed | 4713 | @retval 1 The CPU is in virtual mode.\r |
4714 | @retval 0 The CPU is in physical mode.\r | |
4715 | @retval -1 The CPU is in mixed mode.\r | |
ac644614 | 4716 | \r |
4717 | **/\r | |
4718 | INT64\r | |
4719 | EFIAPI\r | |
4720 | AsmCpuVirtual (\r | |
4721 | VOID\r | |
4722 | );\r | |
4723 | \r | |
4724 | \r | |
4725 | /**\r | |
4726 | Makes a PAL procedure call.\r | |
4727 | \r | |
4728 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
4729 | value this API will make static or stacked PAL call. The following table\r | |
4730 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
4731 | may be designated as required or optional. If a PAL procedure is specified\r | |
4732 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
4733 | Status field of the PAL_CALL_RETURN structure.\r | |
4734 | This indicates that the procedure is not present in this PAL implementation.\r | |
4735 | It is the caller's responsibility to check for this return code after calling\r | |
4736 | any optional PAL procedure.\r | |
4737 | No parameter checking is performed on the 5 input parameters, but there are\r | |
4738 | some common rules that the caller should follow when making a PAL call. Any\r | |
4739 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
4740 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
4741 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
4742 | argument return value may be returned or undefined result may occur during the\r | |
4743 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
4744 | PAL entry point then the system behavior is undefined. This function is only\r | |
1a2f870c | 4745 | available on Itanium processors.\r |
ac644614 | 4746 | \r |
ee6c452c | 4747 | @param PalEntryPoint The PAL procedure calls entry point.\r |
4748 | @param Index The PAL procedure Index number.\r | |
4749 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
4750 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
4751 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
ac644614 | 4752 | \r |
4753 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
4754 | \r | |
4755 | **/\r | |
4756 | PAL_CALL_RETURN\r | |
4757 | EFIAPI\r | |
4758 | AsmPalCall (\r | |
4759 | IN UINT64 PalEntryPoint,\r | |
4760 | IN UINT64 Index,\r | |
4761 | IN UINT64 Arg2,\r | |
4762 | IN UINT64 Arg3,\r | |
4763 | IN UINT64 Arg4\r | |
4764 | );\r | |
fd163050 | 4765 | #endif\r |
ac644614 | 4766 | \r |
fd163050 | 4767 | #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r |
1106ffe1 | 4768 | ///\r |
030cd1a2 | 4769 | /// IA32 and x64 Specific Functions\r |
1106ffe1 | 4770 | /// Byte packed structure for 16-bit Real Mode EFLAGS\r |
4771 | ///\r | |
ac644614 | 4772 | typedef union {\r |
4773 | struct {\r | |
2a53dabf LG |
4774 | UINT32 CF:1; ///< Carry Flag\r |
4775 | UINT32 Reserved_0:1; ///< Reserved\r | |
4776 | UINT32 PF:1; ///< Parity Flag\r | |
4777 | UINT32 Reserved_1:1; ///< Reserved\r | |
4778 | UINT32 AF:1; ///< Auxiliary Carry Flag\r | |
4779 | UINT32 Reserved_2:1; ///< Reserved\r | |
4780 | UINT32 ZF:1; ///< Zero Flag\r | |
4781 | UINT32 SF:1; ///< Sign Flag\r | |
4782 | UINT32 TF:1; ///< Trap Flag\r | |
4783 | UINT32 IF:1; ///< Interrupt Enable Flag\r | |
4784 | UINT32 DF:1; ///< Direction Flag\r | |
4785 | UINT32 OF:1; ///< Overflow Flag\r | |
4786 | UINT32 IOPL:2; ///< I/O Privilege Level\r | |
4787 | UINT32 NT:1; ///< Nested Task\r | |
4788 | UINT32 Reserved_3:1; ///< Reserved\r | |
ac644614 | 4789 | } Bits;\r |
4790 | UINT16 Uint16;\r | |
4791 | } IA32_FLAGS16;\r | |
4792 | \r | |
1106ffe1 | 4793 | ///\r |
4794 | /// Byte packed structure for EFLAGS/RFLAGS\r | |
4795 | /// 32-bits on IA-32\r | |
030cd1a2 | 4796 | /// 64-bits on x64. The upper 32-bits on x64 are reserved\r |
1106ffe1 | 4797 | ///\r |
ac644614 | 4798 | typedef union {\r |
4799 | struct {\r | |
2a53dabf LG |
4800 | UINT32 CF:1; ///< Carry Flag\r |
4801 | UINT32 Reserved_0:1; ///< Reserved\r | |
4802 | UINT32 PF:1; ///< Parity Flag\r | |
4803 | UINT32 Reserved_1:1; ///< Reserved\r | |
4804 | UINT32 AF:1; ///< Auxiliary Carry Flag\r | |
4805 | UINT32 Reserved_2:1; ///< Reserved\r | |
4806 | UINT32 ZF:1; ///< Zero Flag\r | |
4807 | UINT32 SF:1; ///< Sign Flag\r | |
4808 | UINT32 TF:1; ///< Trap Flag\r | |
4809 | UINT32 IF:1; ///< Interrupt Enable Flag\r | |
4810 | UINT32 DF:1; ///< Direction Flag\r | |
4811 | UINT32 OF:1; ///< Overflow Flag\r | |
4812 | UINT32 IOPL:2; ///< I/O Privilege Level\r | |
4813 | UINT32 NT:1; ///< Nested Task\r | |
4814 | UINT32 Reserved_3:1; ///< Reserved\r | |
4815 | UINT32 RF:1; ///< Resume Flag\r | |
4816 | UINT32 VM:1; ///< Virtual 8086 Mode\r | |
4817 | UINT32 AC:1; ///< Alignment Check\r | |
4818 | UINT32 VIF:1; ///< Virtual Interrupt Flag\r | |
4819 | UINT32 VIP:1; ///< Virtual Interrupt Pending\r | |
4820 | UINT32 ID:1; ///< ID Flag\r | |
4821 | UINT32 Reserved_4:10; ///< Reserved\r | |
ac644614 | 4822 | } Bits;\r |
4823 | UINTN UintN;\r | |
4824 | } IA32_EFLAGS32;\r | |
4825 | \r | |
1106ffe1 | 4826 | ///\r |
4827 | /// Byte packed structure for Control Register 0 (CR0)\r | |
4828 | /// 32-bits on IA-32\r | |
030cd1a2 | 4829 | /// 64-bits on x64. The upper 32-bits on x64 are reserved\r |
1106ffe1 | 4830 | ///\r |
ac644614 | 4831 | typedef union {\r |
4832 | struct {\r | |
2a53dabf LG |
4833 | UINT32 PE:1; ///< Protection Enable\r |
4834 | UINT32 MP:1; ///< Monitor Coprocessor\r | |
4835 | UINT32 EM:1; ///< Emulation\r | |
4836 | UINT32 TS:1; ///< Task Switched\r | |
4837 | UINT32 ET:1; ///< Extension Type\r | |
4838 | UINT32 NE:1; ///< Numeric Error\r | |
4839 | UINT32 Reserved_0:10; ///< Reserved\r | |
4840 | UINT32 WP:1; ///< Write Protect\r | |
4841 | UINT32 Reserved_1:1; ///< Reserved\r | |
4842 | UINT32 AM:1; ///< Alignment Mask\r | |
4843 | UINT32 Reserved_2:10; ///< Reserved\r | |
4844 | UINT32 NW:1; ///< Mot Write-through\r | |
4845 | UINT32 CD:1; ///< Cache Disable\r | |
4846 | UINT32 PG:1; ///< Paging\r | |
ac644614 | 4847 | } Bits;\r |
4848 | UINTN UintN;\r | |
4849 | } IA32_CR0;\r | |
4850 | \r | |
1106ffe1 | 4851 | ///\r |
4852 | /// Byte packed structure for Control Register 4 (CR4)\r | |
4853 | /// 32-bits on IA-32\r | |
030cd1a2 | 4854 | /// 64-bits on x64. The upper 32-bits on x64 are reserved\r |
1106ffe1 | 4855 | ///\r |
ac644614 | 4856 | typedef union {\r |
4857 | struct {\r | |
2a53dabf LG |
4858 | UINT32 VME:1; ///< Virtual-8086 Mode Extensions\r |
4859 | UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts\r | |
4860 | UINT32 TSD:1; ///< Time Stamp Disable\r | |
4861 | UINT32 DE:1; ///< Debugging Extensions\r | |
4862 | UINT32 PSE:1; ///< Page Size Extensions\r | |
4863 | UINT32 PAE:1; ///< Physical Address Extension\r | |
4864 | UINT32 MCE:1; ///< Machine Check Enable\r | |
4865 | UINT32 PGE:1; ///< Page Global Enable\r | |
4866 | UINT32 PCE:1; ///< Performance Monitoring Counter\r | |
4867 | ///< Enable\r | |
4868 | UINT32 OSFXSR:1; ///< Operating System Support for\r | |
4869 | ///< FXSAVE and FXRSTOR instructions\r | |
4870 | UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r | |
4871 | ///< Unmasked SIMD Floating Point\r | |
4872 | ///< Exceptions\r | |
4873 | UINT32 Reserved_0:2; ///< Reserved\r | |
4874 | UINT32 VMXE:1; ///< VMX Enable\r | |
77f863ee | 4875 | UINT32 Reserved_1:18; ///< Reserved\r |
ac644614 | 4876 | } Bits;\r |
4877 | UINTN UintN;\r | |
4878 | } IA32_CR4;\r | |
4879 | \r | |
1106ffe1 | 4880 | ///\r |
4881 | /// Byte packed structure for an IDTR, GDTR, LDTR descriptor\r | |
1106ffe1 | 4882 | ///\r |
ac644614 | 4883 | #pragma pack (1)\r |
4884 | typedef struct {\r | |
4885 | UINT16 Limit;\r | |
4886 | UINTN Base;\r | |
4887 | } IA32_DESCRIPTOR;\r | |
4888 | #pragma pack ()\r | |
4889 | \r | |
4890 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
4891 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
4892 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
4893 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
4894 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
4895 | \r | |
6f4aad3b | 4896 | \r |
4897 | #if defined (MDE_CPU_IA32)\r | |
1106ffe1 | 4898 | ///\r |
1a2f870c | 4899 | /// Byte packed structure for an IA-32 Interrupt Gate Descriptor\r |
1106ffe1 | 4900 | ///\r |
dc317713 | 4901 | typedef union {\r |
4902 | struct {\r | |
6f4aad3b | 4903 | UINT32 OffsetLow:16; ///< Offset bits 15..0\r |
4904 | UINT32 Selector:16; ///< Selector\r | |
4905 | UINT32 Reserved_0:8; ///< Reserved\r | |
4906 | UINT32 GateType:8; ///< Gate Type. See #defines above\r | |
4907 | UINT32 OffsetHigh:16; ///< Offset bits 31..16\r | |
dc317713 | 4908 | } Bits;\r |
4909 | UINT64 Uint64;\r | |
4910 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
4911 | \r | |
4912 | #endif\r | |
4913 | \r | |
4914 | #if defined (MDE_CPU_X64)\r | |
6f4aad3b | 4915 | ///\r |
4916 | /// Byte packed structure for an x64 Interrupt Gate Descriptor\r | |
4917 | ///\r | |
ac644614 | 4918 | typedef union {\r |
4919 | struct {\r | |
6f4aad3b | 4920 | UINT32 OffsetLow:16; ///< Offset bits 15..0\r |
4921 | UINT32 Selector:16; ///< Selector\r | |
4922 | UINT32 Reserved_0:8; ///< Reserved\r | |
4923 | UINT32 GateType:8; ///< Gate Type. See #defines above\r | |
4924 | UINT32 OffsetHigh:16; ///< Offset bits 31..16\r | |
4925 | UINT32 OffsetUpper:32; ///< Offset bits 63..32\r | |
4926 | UINT32 Reserved_1:32; ///< Reserved\r | |
ac644614 | 4927 | } Bits;\r |
6f4aad3b | 4928 | struct {\r |
4929 | UINT64 Uint64;\r | |
4930 | UINT64 Uint64_1;\r | |
4931 | } Uint128; \r | |
ac644614 | 4932 | } IA32_IDT_GATE_DESCRIPTOR;\r |
4933 | \r | |
dc317713 | 4934 | #endif\r |
4935 | \r | |
1106ffe1 | 4936 | ///\r |
4937 | /// Byte packed structure for an FP/SSE/SSE2 context\r | |
4938 | ///\r | |
ac644614 | 4939 | typedef struct {\r |
4940 | UINT8 Buffer[512];\r | |
4941 | } IA32_FX_BUFFER;\r | |
4942 | \r | |
1106ffe1 | 4943 | ///\r |
4944 | /// Structures for the 16-bit real mode thunks\r | |
4945 | ///\r | |
ac644614 | 4946 | typedef struct {\r |
4947 | UINT32 Reserved1;\r | |
4948 | UINT32 Reserved2;\r | |
4949 | UINT32 Reserved3;\r | |
4950 | UINT32 Reserved4;\r | |
4951 | UINT8 BL;\r | |
4952 | UINT8 BH;\r | |
4953 | UINT16 Reserved5;\r | |
4954 | UINT8 DL;\r | |
4955 | UINT8 DH;\r | |
4956 | UINT16 Reserved6;\r | |
4957 | UINT8 CL;\r | |
4958 | UINT8 CH;\r | |
4959 | UINT16 Reserved7;\r | |
4960 | UINT8 AL;\r | |
4961 | UINT8 AH;\r | |
4962 | UINT16 Reserved8;\r | |
4963 | } IA32_BYTE_REGS;\r | |
4964 | \r | |
4965 | typedef struct {\r | |
4966 | UINT16 DI;\r | |
4967 | UINT16 Reserved1;\r | |
4968 | UINT16 SI;\r | |
4969 | UINT16 Reserved2;\r | |
4970 | UINT16 BP;\r | |
4971 | UINT16 Reserved3;\r | |
4972 | UINT16 SP;\r | |
4973 | UINT16 Reserved4;\r | |
4974 | UINT16 BX;\r | |
4975 | UINT16 Reserved5;\r | |
4976 | UINT16 DX;\r | |
4977 | UINT16 Reserved6;\r | |
4978 | UINT16 CX;\r | |
4979 | UINT16 Reserved7;\r | |
4980 | UINT16 AX;\r | |
4981 | UINT16 Reserved8;\r | |
4982 | } IA32_WORD_REGS;\r | |
4983 | \r | |
4984 | typedef struct {\r | |
4985 | UINT32 EDI;\r | |
4986 | UINT32 ESI;\r | |
4987 | UINT32 EBP;\r | |
4988 | UINT32 ESP;\r | |
4989 | UINT32 EBX;\r | |
4990 | UINT32 EDX;\r | |
4991 | UINT32 ECX;\r | |
4992 | UINT32 EAX;\r | |
4993 | UINT16 DS;\r | |
4994 | UINT16 ES;\r | |
4995 | UINT16 FS;\r | |
4996 | UINT16 GS;\r | |
4997 | IA32_EFLAGS32 EFLAGS;\r | |
4998 | UINT32 Eip;\r | |
4999 | UINT16 CS;\r | |
5000 | UINT16 SS;\r | |
5001 | } IA32_DWORD_REGS;\r | |
5002 | \r | |
5003 | typedef union {\r | |
5004 | IA32_DWORD_REGS E;\r | |
5005 | IA32_WORD_REGS X;\r | |
5006 | IA32_BYTE_REGS H;\r | |
5007 | } IA32_REGISTER_SET;\r | |
5008 | \r | |
1106ffe1 | 5009 | ///\r |
5010 | /// Byte packed structure for an 16-bit real mode thunks\r | |
5011 | ///\r | |
ac644614 | 5012 | typedef struct {\r |
5013 | IA32_REGISTER_SET *RealModeState;\r | |
5014 | VOID *RealModeBuffer;\r | |
5015 | UINT32 RealModeBufferSize;\r | |
5016 | UINT32 ThunkAttributes;\r | |
5017 | } THUNK_CONTEXT;\r | |
5018 | \r | |
5019 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
5020 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
5021 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
5022 | \r | |
5023 | /**\r | |
5024 | Retrieves CPUID information.\r | |
5025 | \r | |
5026 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
5027 | This function always returns Index.\r | |
5028 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5029 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5030 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5031 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
030cd1a2 | 5032 | This function is only available on IA-32 and x64.\r |
ac644614 | 5033 | \r |
5034 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
5035 | instruction.\r | |
5036 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
5037 | instruction. This is an optional parameter that may be NULL.\r | |
5038 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
5039 | instruction. This is an optional parameter that may be NULL.\r | |
5040 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
5041 | instruction. This is an optional parameter that may be NULL.\r | |
5042 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
5043 | instruction. This is an optional parameter that may be NULL.\r | |
5044 | \r | |
2fe241a2 | 5045 | @return Index.\r |
ac644614 | 5046 | \r |
5047 | **/\r | |
5048 | UINT32\r | |
5049 | EFIAPI\r | |
5050 | AsmCpuid (\r | |
5051 | IN UINT32 Index,\r | |
5052 | OUT UINT32 *Eax, OPTIONAL\r | |
5053 | OUT UINT32 *Ebx, OPTIONAL\r | |
5054 | OUT UINT32 *Ecx, OPTIONAL\r | |
5055 | OUT UINT32 *Edx OPTIONAL\r | |
5056 | );\r | |
5057 | \r | |
5058 | \r | |
5059 | /**\r | |
5060 | Retrieves CPUID information using an extended leaf identifier.\r | |
5061 | \r | |
5062 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
5063 | and ECX set to the value specified by SubIndex. This function always returns\r | |
5064 | Index. This function is only available on IA-32 and x64.\r | |
5065 | \r | |
5066 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5067 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5068 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5069 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5070 | \r | |
5071 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
5072 | CPUID instruction.\r | |
5073 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
5074 | CPUID instruction.\r | |
5075 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
5076 | instruction. This is an optional parameter that may be\r | |
5077 | NULL.\r | |
5078 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
5079 | instruction. This is an optional parameter that may be\r | |
5080 | NULL.\r | |
5081 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
5082 | instruction. This is an optional parameter that may be\r | |
5083 | NULL.\r | |
5084 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
5085 | instruction. This is an optional parameter that may be\r | |
5086 | NULL.\r | |
5087 | \r | |
2fe241a2 | 5088 | @return Index.\r |
ac644614 | 5089 | \r |
5090 | **/\r | |
5091 | UINT32\r | |
5092 | EFIAPI\r | |
5093 | AsmCpuidEx (\r | |
5094 | IN UINT32 Index,\r | |
5095 | IN UINT32 SubIndex,\r | |
5096 | OUT UINT32 *Eax, OPTIONAL\r | |
5097 | OUT UINT32 *Ebx, OPTIONAL\r | |
5098 | OUT UINT32 *Ecx, OPTIONAL\r | |
5099 | OUT UINT32 *Edx OPTIONAL\r | |
5100 | );\r | |
5101 | \r | |
5102 | \r | |
be5f1614 | 5103 | /**\r |
5104 | Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r | |
5105 | \r | |
5106 | Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r | |
5107 | and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r | |
5108 | \r | |
5109 | **/\r | |
5110 | VOID\r | |
5111 | EFIAPI\r | |
5112 | AsmDisableCache (\r | |
5113 | VOID\r | |
5114 | );\r | |
5115 | \r | |
5116 | \r | |
5117 | /**\r | |
5118 | Perform a WBINVD and clear both the CD and NW bits of CR0.\r | |
5119 | \r | |
5120 | Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r | |
5121 | bits of CR0 to 0. This function is only available on IA-32 and x64.\r | |
5122 | \r | |
5123 | **/\r | |
5124 | VOID\r | |
5125 | EFIAPI\r | |
5126 | AsmEnableCache (\r | |
5127 | VOID\r | |
5128 | );\r | |
5129 | \r | |
5130 | \r | |
ac644614 | 5131 | /**\r |
5132 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
5133 | \r | |
5134 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
5135 | No parameter checking is performed on Index, and some Index values may cause\r | |
5136 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
5137 | caller must set up exception handlers to catch the exceptions. This function\r | |
030cd1a2 | 5138 | is only available on IA-32 and x64.\r |
ac644614 | 5139 | \r |
5140 | @param Index The 32-bit MSR index to read.\r | |
5141 | \r | |
5142 | @return The lower 32 bits of the MSR identified by Index.\r | |
5143 | \r | |
5144 | **/\r | |
5145 | UINT32\r | |
5146 | EFIAPI\r | |
5147 | AsmReadMsr32 (\r | |
5148 | IN UINT32 Index\r | |
5149 | );\r | |
5150 | \r | |
5151 | \r | |
5152 | /**\r | |
17f695ed | 5153 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
5154 | The upper 32-bits of the MSR are set to zero.\r | |
ac644614 | 5155 | \r |
5156 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
5157 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
5158 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
5159 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
5160 | that Index and Value are valid, or the caller must establish proper exception\r | |
030cd1a2 | 5161 | handlers. This function is only available on IA-32 and x64.\r |
ac644614 | 5162 | \r |
5163 | @param Index The 32-bit MSR index to write.\r | |
5164 | @param Value The 32-bit value to write to the MSR.\r | |
5165 | \r | |
5166 | @return Value\r | |
5167 | \r | |
5168 | **/\r | |
5169 | UINT32\r | |
5170 | EFIAPI\r | |
5171 | AsmWriteMsr32 (\r | |
5172 | IN UINT32 Index,\r | |
5173 | IN UINT32 Value\r | |
5174 | );\r | |
5175 | \r | |
5176 | \r | |
5177 | /**\r | |
62991af2 | 5178 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
ac644614 | 5179 | writes the result back to the 64-bit MSR.\r |
5180 | \r | |
62991af2 | 5181 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5182 | between the lower 32-bits of the read result and the value specified by\r |
5183 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
5184 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
5185 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
5186 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
5187 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5188 | IA-32 and x64.\r |
ac644614 | 5189 | \r |
5190 | @param Index The 32-bit MSR index to write.\r | |
5191 | @param OrData The value to OR with the read value from the MSR.\r | |
5192 | \r | |
5193 | @return The lower 32-bit value written to the MSR.\r | |
5194 | \r | |
5195 | **/\r | |
5196 | UINT32\r | |
5197 | EFIAPI\r | |
5198 | AsmMsrOr32 (\r | |
5199 | IN UINT32 Index,\r | |
5200 | IN UINT32 OrData\r | |
5201 | );\r | |
5202 | \r | |
5203 | \r | |
5204 | /**\r | |
5205 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
5206 | the result back to the 64-bit MSR.\r | |
5207 | \r | |
5208 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5209 | lower 32-bits of the read result and the value specified by AndData, and\r | |
5210 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
5211 | the value written to the MSR is returned. No parameter checking is performed\r | |
5212 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
5213 | must either guarantee that Index and AndData are valid, or the caller must\r | |
5214 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5215 | and x64.\r |
ac644614 | 5216 | \r |
5217 | @param Index The 32-bit MSR index to write.\r | |
5218 | @param AndData The value to AND with the read value from the MSR.\r | |
5219 | \r | |
5220 | @return The lower 32-bit value written to the MSR.\r | |
5221 | \r | |
5222 | **/\r | |
5223 | UINT32\r | |
5224 | EFIAPI\r | |
5225 | AsmMsrAnd32 (\r | |
5226 | IN UINT32 Index,\r | |
5227 | IN UINT32 AndData\r | |
5228 | );\r | |
5229 | \r | |
5230 | \r | |
5231 | /**\r | |
62991af2 | 5232 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
ac644614 | 5233 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
5234 | \r | |
5235 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5236 | lower 32-bits of the read result and the value specified by AndData\r | |
62991af2 | 5237 | preserving the upper 32-bits, performs a bitwise OR between the\r |
ac644614 | 5238 | result of the AND operation and the value specified by OrData, and writes the\r |
5239 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
5240 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
5241 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
5242 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
5243 | caller must establish proper exception handlers. This function is only\r | |
030cd1a2 | 5244 | available on IA-32 and x64.\r |
ac644614 | 5245 | \r |
5246 | @param Index The 32-bit MSR index to write.\r | |
5247 | @param AndData The value to AND with the read value from the MSR.\r | |
5248 | @param OrData The value to OR with the result of the AND operation.\r | |
5249 | \r | |
5250 | @return The lower 32-bit value written to the MSR.\r | |
5251 | \r | |
5252 | **/\r | |
5253 | UINT32\r | |
5254 | EFIAPI\r | |
5255 | AsmMsrAndThenOr32 (\r | |
5256 | IN UINT32 Index,\r | |
5257 | IN UINT32 AndData,\r | |
5258 | IN UINT32 OrData\r | |
5259 | );\r | |
5260 | \r | |
5261 | \r | |
5262 | /**\r | |
5263 | Reads a bit field of an MSR.\r | |
5264 | \r | |
5265 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
5266 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
5267 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
5268 | must set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5269 | available on IA-32 and x64.\r |
ac644614 | 5270 | \r |
5271 | If StartBit is greater than 31, then ASSERT().\r | |
5272 | If EndBit is greater than 31, then ASSERT().\r | |
5273 | If EndBit is less than StartBit, then ASSERT().\r | |
5274 | \r | |
5275 | @param Index The 32-bit MSR index to read.\r | |
5276 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5277 | Range 0..31.\r | |
5278 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5279 | Range 0..31.\r | |
5280 | \r | |
5281 | @return The bit field read from the MSR.\r | |
5282 | \r | |
5283 | **/\r | |
5284 | UINT32\r | |
5285 | EFIAPI\r | |
5286 | AsmMsrBitFieldRead32 (\r | |
5287 | IN UINT32 Index,\r | |
5288 | IN UINTN StartBit,\r | |
5289 | IN UINTN EndBit\r | |
5290 | );\r | |
5291 | \r | |
5292 | \r | |
5293 | /**\r | |
5294 | Writes a bit field to an MSR.\r | |
5295 | \r | |
2fe241a2 | 5296 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
ac644614 | 5297 | field is specified by the StartBit and the EndBit. All other bits in the\r |
5298 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
62991af2 | 5299 | returned. The caller must either guarantee that Index and the data written \r |
5300 | is valid, or the caller must set up exception handlers to catch the exceptions. \r | |
5301 | This function is only available on IA-32 and x64.\r | |
ac644614 | 5302 | \r |
5303 | If StartBit is greater than 31, then ASSERT().\r | |
5304 | If EndBit is greater than 31, then ASSERT().\r | |
5305 | If EndBit is less than StartBit, then ASSERT().\r | |
5306 | \r | |
5307 | @param Index The 32-bit MSR index to write.\r | |
5308 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5309 | Range 0..31.\r | |
5310 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5311 | Range 0..31.\r | |
5312 | @param Value New value of the bit field.\r | |
5313 | \r | |
5314 | @return The lower 32-bit of the value written to the MSR.\r | |
5315 | \r | |
5316 | **/\r | |
5317 | UINT32\r | |
5318 | EFIAPI\r | |
5319 | AsmMsrBitFieldWrite32 (\r | |
5320 | IN UINT32 Index,\r | |
5321 | IN UINTN StartBit,\r | |
5322 | IN UINTN EndBit,\r | |
5323 | IN UINT32 Value\r | |
5324 | );\r | |
5325 | \r | |
5326 | \r | |
5327 | /**\r | |
5328 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
5329 | result back to the bit field in the 64-bit MSR.\r | |
5330 | \r | |
62991af2 | 5331 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5332 | between the read result and the value specified by OrData, and writes the\r |
5333 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
5334 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
5335 | caller must either guarantee that Index and the data written is valid, or\r | |
5336 | the caller must set up exception handlers to catch the exceptions. This\r | |
030cd1a2 | 5337 | function is only available on IA-32 and x64.\r |
ac644614 | 5338 | \r |
5339 | If StartBit is greater than 31, then ASSERT().\r | |
5340 | If EndBit is greater than 31, then ASSERT().\r | |
5341 | If EndBit is less than StartBit, then ASSERT().\r | |
5342 | \r | |
5343 | @param Index The 32-bit MSR index to write.\r | |
5344 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5345 | Range 0..31.\r | |
5346 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5347 | Range 0..31.\r | |
5348 | @param OrData The value to OR with the read value from the MSR.\r | |
5349 | \r | |
5350 | @return The lower 32-bit of the value written to the MSR.\r | |
5351 | \r | |
5352 | **/\r | |
5353 | UINT32\r | |
5354 | EFIAPI\r | |
5355 | AsmMsrBitFieldOr32 (\r | |
5356 | IN UINT32 Index,\r | |
5357 | IN UINTN StartBit,\r | |
5358 | IN UINTN EndBit,\r | |
5359 | IN UINT32 OrData\r | |
5360 | );\r | |
5361 | \r | |
5362 | \r | |
5363 | /**\r | |
5364 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5365 | result back to the bit field in the 64-bit MSR.\r | |
5366 | \r | |
5367 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5368 | read result and the value specified by AndData, and writes the result to the\r | |
5369 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
5370 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
5371 | either guarantee that Index and the data written is valid, or the caller must\r | |
5372 | set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5373 | available on IA-32 and x64.\r |
ac644614 | 5374 | \r |
5375 | If StartBit is greater than 31, then ASSERT().\r | |
5376 | If EndBit is greater than 31, then ASSERT().\r | |
5377 | If EndBit is less than StartBit, then ASSERT().\r | |
5378 | \r | |
5379 | @param Index The 32-bit MSR index to write.\r | |
5380 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5381 | Range 0..31.\r | |
5382 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5383 | Range 0..31.\r | |
5384 | @param AndData The value to AND with the read value from the MSR.\r | |
5385 | \r | |
5386 | @return The lower 32-bit of the value written to the MSR.\r | |
5387 | \r | |
5388 | **/\r | |
5389 | UINT32\r | |
5390 | EFIAPI\r | |
5391 | AsmMsrBitFieldAnd32 (\r | |
5392 | IN UINT32 Index,\r | |
5393 | IN UINTN StartBit,\r | |
5394 | IN UINTN EndBit,\r | |
5395 | IN UINT32 AndData\r | |
5396 | );\r | |
5397 | \r | |
5398 | \r | |
5399 | /**\r | |
5400 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5401 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5402 | 64-bit MSR.\r |
5403 | \r | |
5404 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
62991af2 | 5405 | bitwise OR between the read result and the value specified by\r |
ac644614 | 5406 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5407 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
5408 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
5409 | that Index and the data written is valid, or the caller must set up exception\r | |
5410 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5411 | and x64.\r |
ac644614 | 5412 | \r |
5413 | If StartBit is greater than 31, then ASSERT().\r | |
5414 | If EndBit is greater than 31, then ASSERT().\r | |
5415 | If EndBit is less than StartBit, then ASSERT().\r | |
5416 | \r | |
5417 | @param Index The 32-bit MSR index to write.\r | |
5418 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5419 | Range 0..31.\r | |
5420 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5421 | Range 0..31.\r | |
5422 | @param AndData The value to AND with the read value from the MSR.\r | |
5423 | @param OrData The value to OR with the result of the AND operation.\r | |
5424 | \r | |
5425 | @return The lower 32-bit of the value written to the MSR.\r | |
5426 | \r | |
5427 | **/\r | |
5428 | UINT32\r | |
5429 | EFIAPI\r | |
5430 | AsmMsrBitFieldAndThenOr32 (\r | |
5431 | IN UINT32 Index,\r | |
5432 | IN UINTN StartBit,\r | |
5433 | IN UINTN EndBit,\r | |
5434 | IN UINT32 AndData,\r | |
5435 | IN UINT32 OrData\r | |
5436 | );\r | |
5437 | \r | |
5438 | \r | |
5439 | /**\r | |
5440 | Returns a 64-bit Machine Specific Register(MSR).\r | |
5441 | \r | |
5442 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
5443 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
5444 | caller must either guarantee that Index is valid, or the caller must set up\r | |
5445 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5446 | on IA-32 and x64.\r |
ac644614 | 5447 | \r |
5448 | @param Index The 32-bit MSR index to read.\r | |
5449 | \r | |
5450 | @return The value of the MSR identified by Index.\r | |
5451 | \r | |
5452 | **/\r | |
5453 | UINT64\r | |
5454 | EFIAPI\r | |
5455 | AsmReadMsr64 (\r | |
5456 | IN UINT32 Index\r | |
5457 | );\r | |
5458 | \r | |
5459 | \r | |
5460 | /**\r | |
5461 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
5462 | value.\r | |
5463 | \r | |
5464 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
5465 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
5466 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
5467 | caller must either guarantee that Index and Value are valid, or the caller\r | |
5468 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5469 | IA-32 and x64.\r |
ac644614 | 5470 | \r |
5471 | @param Index The 32-bit MSR index to write.\r | |
5472 | @param Value The 64-bit value to write to the MSR.\r | |
5473 | \r | |
5474 | @return Value\r | |
5475 | \r | |
5476 | **/\r | |
5477 | UINT64\r | |
5478 | EFIAPI\r | |
5479 | AsmWriteMsr64 (\r | |
5480 | IN UINT32 Index,\r | |
5481 | IN UINT64 Value\r | |
5482 | );\r | |
5483 | \r | |
5484 | \r | |
5485 | /**\r | |
62991af2 | 5486 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
ac644614 | 5487 | back to the 64-bit MSR.\r |
5488 | \r | |
62991af2 | 5489 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5490 | between the read result and the value specified by OrData, and writes the\r |
5491 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5492 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
5493 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
5494 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
030cd1a2 | 5495 | This function is only available on IA-32 and x64.\r |
ac644614 | 5496 | \r |
5497 | @param Index The 32-bit MSR index to write.\r | |
5498 | @param OrData The value to OR with the read value from the MSR.\r | |
5499 | \r | |
5500 | @return The value written back to the MSR.\r | |
5501 | \r | |
5502 | **/\r | |
5503 | UINT64\r | |
5504 | EFIAPI\r | |
5505 | AsmMsrOr64 (\r | |
5506 | IN UINT32 Index,\r | |
5507 | IN UINT64 OrData\r | |
5508 | );\r | |
5509 | \r | |
5510 | \r | |
5511 | /**\r | |
5512 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
5513 | 64-bit MSR.\r | |
5514 | \r | |
5515 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5516 | read result and the value specified by OrData, and writes the result to the\r | |
5517 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
5518 | parameter checking is performed on Index or OrData, and some of these may\r | |
5519 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
5520 | are valid, or the caller must establish proper exception handlers. This\r | |
030cd1a2 | 5521 | function is only available on IA-32 and x64.\r |
ac644614 | 5522 | \r |
5523 | @param Index The 32-bit MSR index to write.\r | |
5524 | @param AndData The value to AND with the read value from the MSR.\r | |
5525 | \r | |
5526 | @return The value written back to the MSR.\r | |
5527 | \r | |
5528 | **/\r | |
5529 | UINT64\r | |
5530 | EFIAPI\r | |
5531 | AsmMsrAnd64 (\r | |
5532 | IN UINT32 Index,\r | |
5533 | IN UINT64 AndData\r | |
5534 | );\r | |
5535 | \r | |
5536 | \r | |
5537 | /**\r | |
62991af2 | 5538 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r |
ac644614 | 5539 | OR, and writes the result back to the 64-bit MSR.\r |
5540 | \r | |
5541 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
62991af2 | 5542 | result and the value specified by AndData, performs a bitwise OR\r |
ac644614 | 5543 | between the result of the AND operation and the value specified by OrData,\r |
5544 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
5545 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
5546 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
5547 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
5548 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5549 | and x64.\r |
ac644614 | 5550 | \r |
5551 | @param Index The 32-bit MSR index to write.\r | |
5552 | @param AndData The value to AND with the read value from the MSR.\r | |
5553 | @param OrData The value to OR with the result of the AND operation.\r | |
5554 | \r | |
5555 | @return The value written back to the MSR.\r | |
5556 | \r | |
5557 | **/\r | |
5558 | UINT64\r | |
5559 | EFIAPI\r | |
5560 | AsmMsrAndThenOr64 (\r | |
5561 | IN UINT32 Index,\r | |
5562 | IN UINT64 AndData,\r | |
5563 | IN UINT64 OrData\r | |
5564 | );\r | |
5565 | \r | |
5566 | \r | |
5567 | /**\r | |
5568 | Reads a bit field of an MSR.\r | |
5569 | \r | |
5570 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
5571 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
5572 | must either guarantee that Index is valid, or the caller must set up\r | |
5573 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5574 | on IA-32 and x64.\r |
ac644614 | 5575 | \r |
5576 | If StartBit is greater than 63, then ASSERT().\r | |
5577 | If EndBit is greater than 63, then ASSERT().\r | |
5578 | If EndBit is less than StartBit, then ASSERT().\r | |
5579 | \r | |
5580 | @param Index The 32-bit MSR index to read.\r | |
5581 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5582 | Range 0..63.\r | |
5583 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5584 | Range 0..63.\r | |
5585 | \r | |
5586 | @return The value read from the MSR.\r | |
5587 | \r | |
5588 | **/\r | |
5589 | UINT64\r | |
5590 | EFIAPI\r | |
5591 | AsmMsrBitFieldRead64 (\r | |
5592 | IN UINT32 Index,\r | |
5593 | IN UINTN StartBit,\r | |
5594 | IN UINTN EndBit\r | |
5595 | );\r | |
5596 | \r | |
5597 | \r | |
5598 | /**\r | |
5599 | Writes a bit field to an MSR.\r | |
5600 | \r | |
5601 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
5602 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
62991af2 | 5603 | preserved. The MSR written is returned. The caller must either guarantee \r |
5604 | that Index and the data written is valid, or the caller must set up exception \r | |
5605 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r | |
ac644614 | 5606 | \r |
5607 | If StartBit is greater than 63, then ASSERT().\r | |
5608 | If EndBit is greater than 63, then ASSERT().\r | |
5609 | If EndBit is less than StartBit, then ASSERT().\r | |
5610 | \r | |
5611 | @param Index The 32-bit MSR index to write.\r | |
5612 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5613 | Range 0..63.\r | |
5614 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5615 | Range 0..63.\r | |
5616 | @param Value New value of the bit field.\r | |
5617 | \r | |
5618 | @return The value written back to the MSR.\r | |
5619 | \r | |
5620 | **/\r | |
5621 | UINT64\r | |
5622 | EFIAPI\r | |
5623 | AsmMsrBitFieldWrite64 (\r | |
5624 | IN UINT32 Index,\r | |
5625 | IN UINTN StartBit,\r | |
5626 | IN UINTN EndBit,\r | |
5627 | IN UINT64 Value\r | |
5628 | );\r | |
5629 | \r | |
5630 | \r | |
5631 | /**\r | |
62991af2 | 5632 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
ac644614 | 5633 | writes the result back to the bit field in the 64-bit MSR.\r |
5634 | \r | |
62991af2 | 5635 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5636 | between the read result and the value specified by OrData, and writes the\r |
5637 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5638 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
5639 | guarantee that Index and the data written is valid, or the caller must set up\r | |
5640 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5641 | on IA-32 and x64.\r |
ac644614 | 5642 | \r |
5643 | If StartBit is greater than 63, then ASSERT().\r | |
5644 | If EndBit is greater than 63, then ASSERT().\r | |
5645 | If EndBit is less than StartBit, then ASSERT().\r | |
5646 | \r | |
5647 | @param Index The 32-bit MSR index to write.\r | |
5648 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5649 | Range 0..63.\r | |
5650 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5651 | Range 0..63.\r | |
5652 | @param OrData The value to OR with the read value from the bit field.\r | |
5653 | \r | |
5654 | @return The value written back to the MSR.\r | |
5655 | \r | |
5656 | **/\r | |
5657 | UINT64\r | |
5658 | EFIAPI\r | |
5659 | AsmMsrBitFieldOr64 (\r | |
5660 | IN UINT32 Index,\r | |
5661 | IN UINTN StartBit,\r | |
5662 | IN UINTN EndBit,\r | |
5663 | IN UINT64 OrData\r | |
5664 | );\r | |
5665 | \r | |
5666 | \r | |
5667 | /**\r | |
5668 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5669 | result back to the bit field in the 64-bit MSR.\r | |
5670 | \r | |
5671 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5672 | read result and the value specified by AndData, and writes the result to the\r | |
5673 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
5674 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
5675 | that Index and the data written is valid, or the caller must set up exception\r | |
5676 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5677 | and x64.\r |
ac644614 | 5678 | \r |
5679 | If StartBit is greater than 63, then ASSERT().\r | |
5680 | If EndBit is greater than 63, then ASSERT().\r | |
5681 | If EndBit is less than StartBit, then ASSERT().\r | |
5682 | \r | |
5683 | @param Index The 32-bit MSR index to write.\r | |
5684 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5685 | Range 0..63.\r | |
5686 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5687 | Range 0..63.\r | |
5688 | @param AndData The value to AND with the read value from the bit field.\r | |
5689 | \r | |
5690 | @return The value written back to the MSR.\r | |
5691 | \r | |
5692 | **/\r | |
5693 | UINT64\r | |
5694 | EFIAPI\r | |
5695 | AsmMsrBitFieldAnd64 (\r | |
5696 | IN UINT32 Index,\r | |
5697 | IN UINTN StartBit,\r | |
5698 | IN UINTN EndBit,\r | |
5699 | IN UINT64 AndData\r | |
5700 | );\r | |
5701 | \r | |
5702 | \r | |
5703 | /**\r | |
5704 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5705 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5706 | 64-bit MSR.\r |
5707 | \r | |
5708 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
62991af2 | 5709 | a bitwise OR between the read result and the value specified by\r |
ac644614 | 5710 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5711 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
5712 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
5713 | written is valid, or the caller must set up exception handlers to catch the\r | |
030cd1a2 | 5714 | exceptions. This function is only available on IA-32 and x64.\r |
ac644614 | 5715 | \r |
5716 | If StartBit is greater than 63, then ASSERT().\r | |
5717 | If EndBit is greater than 63, then ASSERT().\r | |
5718 | If EndBit is less than StartBit, then ASSERT().\r | |
5719 | \r | |
5720 | @param Index The 32-bit MSR index to write.\r | |
5721 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5722 | Range 0..63.\r | |
5723 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5724 | Range 0..63.\r | |
5725 | @param AndData The value to AND with the read value from the bit field.\r | |
5726 | @param OrData The value to OR with the result of the AND operation.\r | |
5727 | \r | |
5728 | @return The value written back to the MSR.\r | |
5729 | \r | |
5730 | **/\r | |
5731 | UINT64\r | |
5732 | EFIAPI\r | |
5733 | AsmMsrBitFieldAndThenOr64 (\r | |
5734 | IN UINT32 Index,\r | |
5735 | IN UINTN StartBit,\r | |
5736 | IN UINTN EndBit,\r | |
5737 | IN UINT64 AndData,\r | |
5738 | IN UINT64 OrData\r | |
5739 | );\r | |
5740 | \r | |
5741 | \r | |
5742 | /**\r | |
5743 | Reads the current value of the EFLAGS register.\r | |
5744 | \r | |
5745 | Reads and returns the current value of the EFLAGS register. This function is\r | |
030cd1a2 | 5746 | only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r |
5747 | 64-bit value on x64.\r | |
ac644614 | 5748 | \r |
030cd1a2 | 5749 | @return EFLAGS on IA-32 or RFLAGS on x64.\r |
ac644614 | 5750 | \r |
5751 | **/\r | |
5752 | UINTN\r | |
5753 | EFIAPI\r | |
5754 | AsmReadEflags (\r | |
5755 | VOID\r | |
5756 | );\r | |
5757 | \r | |
5758 | \r | |
5759 | /**\r | |
5760 | Reads the current value of the Control Register 0 (CR0).\r | |
5761 | \r | |
5762 | Reads and returns the current value of CR0. This function is only available\r | |
030cd1a2 | 5763 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5764 | x64.\r | |
ac644614 | 5765 | \r |
5766 | @return The value of the Control Register 0 (CR0).\r | |
5767 | \r | |
5768 | **/\r | |
5769 | UINTN\r | |
5770 | EFIAPI\r | |
5771 | AsmReadCr0 (\r | |
5772 | VOID\r | |
5773 | );\r | |
5774 | \r | |
5775 | \r | |
5776 | /**\r | |
5777 | Reads the current value of the Control Register 2 (CR2).\r | |
5778 | \r | |
5779 | Reads and returns the current value of CR2. This function is only available\r | |
030cd1a2 | 5780 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5781 | x64.\r | |
ac644614 | 5782 | \r |
5783 | @return The value of the Control Register 2 (CR2).\r | |
5784 | \r | |
5785 | **/\r | |
5786 | UINTN\r | |
5787 | EFIAPI\r | |
5788 | AsmReadCr2 (\r | |
5789 | VOID\r | |
5790 | );\r | |
5791 | \r | |
5792 | \r | |
5793 | /**\r | |
5794 | Reads the current value of the Control Register 3 (CR3).\r | |
5795 | \r | |
5796 | Reads and returns the current value of CR3. This function is only available\r | |
030cd1a2 | 5797 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5798 | x64.\r | |
ac644614 | 5799 | \r |
5800 | @return The value of the Control Register 3 (CR3).\r | |
5801 | \r | |
5802 | **/\r | |
5803 | UINTN\r | |
5804 | EFIAPI\r | |
5805 | AsmReadCr3 (\r | |
5806 | VOID\r | |
5807 | );\r | |
5808 | \r | |
5809 | \r | |
5810 | /**\r | |
5811 | Reads the current value of the Control Register 4 (CR4).\r | |
5812 | \r | |
5813 | Reads and returns the current value of CR4. This function is only available\r | |
030cd1a2 | 5814 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5815 | x64.\r | |
ac644614 | 5816 | \r |
5817 | @return The value of the Control Register 4 (CR4).\r | |
5818 | \r | |
5819 | **/\r | |
5820 | UINTN\r | |
5821 | EFIAPI\r | |
5822 | AsmReadCr4 (\r | |
5823 | VOID\r | |
5824 | );\r | |
5825 | \r | |
5826 | \r | |
5827 | /**\r | |
5828 | Writes a value to Control Register 0 (CR0).\r | |
5829 | \r | |
5830 | Writes and returns a new value to CR0. This function is only available on\r | |
030cd1a2 | 5831 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5832 | \r |
5833 | @param Cr0 The value to write to CR0.\r | |
5834 | \r | |
5835 | @return The value written to CR0.\r | |
5836 | \r | |
5837 | **/\r | |
5838 | UINTN\r | |
5839 | EFIAPI\r | |
5840 | AsmWriteCr0 (\r | |
5841 | UINTN Cr0\r | |
5842 | );\r | |
5843 | \r | |
5844 | \r | |
5845 | /**\r | |
5846 | Writes a value to Control Register 2 (CR2).\r | |
5847 | \r | |
5848 | Writes and returns a new value to CR2. This function is only available on\r | |
030cd1a2 | 5849 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5850 | \r |
5851 | @param Cr2 The value to write to CR2.\r | |
5852 | \r | |
5853 | @return The value written to CR2.\r | |
5854 | \r | |
5855 | **/\r | |
5856 | UINTN\r | |
5857 | EFIAPI\r | |
5858 | AsmWriteCr2 (\r | |
5859 | UINTN Cr2\r | |
5860 | );\r | |
5861 | \r | |
5862 | \r | |
5863 | /**\r | |
5864 | Writes a value to Control Register 3 (CR3).\r | |
5865 | \r | |
5866 | Writes and returns a new value to CR3. This function is only available on\r | |
030cd1a2 | 5867 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5868 | \r |
5869 | @param Cr3 The value to write to CR3.\r | |
5870 | \r | |
5871 | @return The value written to CR3.\r | |
5872 | \r | |
5873 | **/\r | |
5874 | UINTN\r | |
5875 | EFIAPI\r | |
5876 | AsmWriteCr3 (\r | |
5877 | UINTN Cr3\r | |
5878 | );\r | |
5879 | \r | |
5880 | \r | |
5881 | /**\r | |
5882 | Writes a value to Control Register 4 (CR4).\r | |
5883 | \r | |
5884 | Writes and returns a new value to CR4. This function is only available on\r | |
030cd1a2 | 5885 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 5886 | \r |
5887 | @param Cr4 The value to write to CR4.\r | |
5888 | \r | |
5889 | @return The value written to CR4.\r | |
5890 | \r | |
5891 | **/\r | |
5892 | UINTN\r | |
5893 | EFIAPI\r | |
5894 | AsmWriteCr4 (\r | |
5895 | UINTN Cr4\r | |
5896 | );\r | |
5897 | \r | |
5898 | \r | |
5899 | /**\r | |
5900 | Reads the current value of Debug Register 0 (DR0).\r | |
5901 | \r | |
5902 | Reads and returns the current value of DR0. This function is only available\r | |
030cd1a2 | 5903 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5904 | x64.\r | |
ac644614 | 5905 | \r |
5906 | @return The value of Debug Register 0 (DR0).\r | |
5907 | \r | |
5908 | **/\r | |
5909 | UINTN\r | |
5910 | EFIAPI\r | |
5911 | AsmReadDr0 (\r | |
5912 | VOID\r | |
5913 | );\r | |
5914 | \r | |
5915 | \r | |
5916 | /**\r | |
5917 | Reads the current value of Debug Register 1 (DR1).\r | |
5918 | \r | |
5919 | Reads and returns the current value of DR1. This function is only available\r | |
030cd1a2 | 5920 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5921 | x64.\r | |
ac644614 | 5922 | \r |
5923 | @return The value of Debug Register 1 (DR1).\r | |
5924 | \r | |
5925 | **/\r | |
5926 | UINTN\r | |
5927 | EFIAPI\r | |
5928 | AsmReadDr1 (\r | |
5929 | VOID\r | |
5930 | );\r | |
5931 | \r | |
5932 | \r | |
5933 | /**\r | |
5934 | Reads the current value of Debug Register 2 (DR2).\r | |
5935 | \r | |
5936 | Reads and returns the current value of DR2. This function is only available\r | |
030cd1a2 | 5937 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5938 | x64.\r | |
ac644614 | 5939 | \r |
5940 | @return The value of Debug Register 2 (DR2).\r | |
5941 | \r | |
5942 | **/\r | |
5943 | UINTN\r | |
5944 | EFIAPI\r | |
5945 | AsmReadDr2 (\r | |
5946 | VOID\r | |
5947 | );\r | |
5948 | \r | |
5949 | \r | |
5950 | /**\r | |
5951 | Reads the current value of Debug Register 3 (DR3).\r | |
5952 | \r | |
5953 | Reads and returns the current value of DR3. This function is only available\r | |
030cd1a2 | 5954 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5955 | x64.\r | |
ac644614 | 5956 | \r |
5957 | @return The value of Debug Register 3 (DR3).\r | |
5958 | \r | |
5959 | **/\r | |
5960 | UINTN\r | |
5961 | EFIAPI\r | |
5962 | AsmReadDr3 (\r | |
5963 | VOID\r | |
5964 | );\r | |
5965 | \r | |
5966 | \r | |
5967 | /**\r | |
5968 | Reads the current value of Debug Register 4 (DR4).\r | |
5969 | \r | |
5970 | Reads and returns the current value of DR4. This function is only available\r | |
030cd1a2 | 5971 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5972 | x64.\r | |
ac644614 | 5973 | \r |
5974 | @return The value of Debug Register 4 (DR4).\r | |
5975 | \r | |
5976 | **/\r | |
5977 | UINTN\r | |
5978 | EFIAPI\r | |
5979 | AsmReadDr4 (\r | |
5980 | VOID\r | |
5981 | );\r | |
5982 | \r | |
5983 | \r | |
5984 | /**\r | |
5985 | Reads the current value of Debug Register 5 (DR5).\r | |
5986 | \r | |
5987 | Reads and returns the current value of DR5. This function is only available\r | |
030cd1a2 | 5988 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
5989 | x64.\r | |
ac644614 | 5990 | \r |
5991 | @return The value of Debug Register 5 (DR5).\r | |
5992 | \r | |
5993 | **/\r | |
5994 | UINTN\r | |
5995 | EFIAPI\r | |
5996 | AsmReadDr5 (\r | |
5997 | VOID\r | |
5998 | );\r | |
5999 | \r | |
6000 | \r | |
6001 | /**\r | |
6002 | Reads the current value of Debug Register 6 (DR6).\r | |
6003 | \r | |
6004 | Reads and returns the current value of DR6. This function is only available\r | |
030cd1a2 | 6005 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6006 | x64.\r | |
ac644614 | 6007 | \r |
6008 | @return The value of Debug Register 6 (DR6).\r | |
6009 | \r | |
6010 | **/\r | |
6011 | UINTN\r | |
6012 | EFIAPI\r | |
6013 | AsmReadDr6 (\r | |
6014 | VOID\r | |
6015 | );\r | |
6016 | \r | |
6017 | \r | |
6018 | /**\r | |
6019 | Reads the current value of Debug Register 7 (DR7).\r | |
6020 | \r | |
6021 | Reads and returns the current value of DR7. This function is only available\r | |
030cd1a2 | 6022 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6023 | x64.\r | |
ac644614 | 6024 | \r |
6025 | @return The value of Debug Register 7 (DR7).\r | |
6026 | \r | |
6027 | **/\r | |
6028 | UINTN\r | |
6029 | EFIAPI\r | |
6030 | AsmReadDr7 (\r | |
6031 | VOID\r | |
6032 | );\r | |
6033 | \r | |
6034 | \r | |
6035 | /**\r | |
6036 | Writes a value to Debug Register 0 (DR0).\r | |
6037 | \r | |
6038 | Writes and returns a new value to DR0. This function is only available on\r | |
030cd1a2 | 6039 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6040 | \r |
6041 | @param Dr0 The value to write to Dr0.\r | |
6042 | \r | |
6043 | @return The value written to Debug Register 0 (DR0).\r | |
6044 | \r | |
6045 | **/\r | |
6046 | UINTN\r | |
6047 | EFIAPI\r | |
6048 | AsmWriteDr0 (\r | |
6049 | UINTN Dr0\r | |
6050 | );\r | |
6051 | \r | |
6052 | \r | |
6053 | /**\r | |
6054 | Writes a value to Debug Register 1 (DR1).\r | |
6055 | \r | |
6056 | Writes and returns a new value to DR1. This function is only available on\r | |
030cd1a2 | 6057 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6058 | \r |
6059 | @param Dr1 The value to write to Dr1.\r | |
6060 | \r | |
6061 | @return The value written to Debug Register 1 (DR1).\r | |
6062 | \r | |
6063 | **/\r | |
6064 | UINTN\r | |
6065 | EFIAPI\r | |
6066 | AsmWriteDr1 (\r | |
6067 | UINTN Dr1\r | |
6068 | );\r | |
6069 | \r | |
6070 | \r | |
6071 | /**\r | |
6072 | Writes a value to Debug Register 2 (DR2).\r | |
6073 | \r | |
6074 | Writes and returns a new value to DR2. This function is only available on\r | |
030cd1a2 | 6075 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6076 | \r |
6077 | @param Dr2 The value to write to Dr2.\r | |
6078 | \r | |
6079 | @return The value written to Debug Register 2 (DR2).\r | |
6080 | \r | |
6081 | **/\r | |
6082 | UINTN\r | |
6083 | EFIAPI\r | |
6084 | AsmWriteDr2 (\r | |
6085 | UINTN Dr2\r | |
6086 | );\r | |
6087 | \r | |
6088 | \r | |
6089 | /**\r | |
6090 | Writes a value to Debug Register 3 (DR3).\r | |
6091 | \r | |
6092 | Writes and returns a new value to DR3. This function is only available on\r | |
030cd1a2 | 6093 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6094 | \r |
6095 | @param Dr3 The value to write to Dr3.\r | |
6096 | \r | |
6097 | @return The value written to Debug Register 3 (DR3).\r | |
6098 | \r | |
6099 | **/\r | |
6100 | UINTN\r | |
6101 | EFIAPI\r | |
6102 | AsmWriteDr3 (\r | |
6103 | UINTN Dr3\r | |
6104 | );\r | |
6105 | \r | |
6106 | \r | |
6107 | /**\r | |
6108 | Writes a value to Debug Register 4 (DR4).\r | |
6109 | \r | |
6110 | Writes and returns a new value to DR4. This function is only available on\r | |
030cd1a2 | 6111 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6112 | \r |
6113 | @param Dr4 The value to write to Dr4.\r | |
6114 | \r | |
6115 | @return The value written to Debug Register 4 (DR4).\r | |
6116 | \r | |
6117 | **/\r | |
6118 | UINTN\r | |
6119 | EFIAPI\r | |
6120 | AsmWriteDr4 (\r | |
6121 | UINTN Dr4\r | |
6122 | );\r | |
6123 | \r | |
6124 | \r | |
6125 | /**\r | |
6126 | Writes a value to Debug Register 5 (DR5).\r | |
6127 | \r | |
6128 | Writes and returns a new value to DR5. This function is only available on\r | |
030cd1a2 | 6129 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6130 | \r |
6131 | @param Dr5 The value to write to Dr5.\r | |
6132 | \r | |
6133 | @return The value written to Debug Register 5 (DR5).\r | |
6134 | \r | |
6135 | **/\r | |
6136 | UINTN\r | |
6137 | EFIAPI\r | |
6138 | AsmWriteDr5 (\r | |
6139 | UINTN Dr5\r | |
6140 | );\r | |
6141 | \r | |
6142 | \r | |
6143 | /**\r | |
6144 | Writes a value to Debug Register 6 (DR6).\r | |
6145 | \r | |
6146 | Writes and returns a new value to DR6. This function is only available on\r | |
030cd1a2 | 6147 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6148 | \r |
6149 | @param Dr6 The value to write to Dr6.\r | |
6150 | \r | |
6151 | @return The value written to Debug Register 6 (DR6).\r | |
6152 | \r | |
6153 | **/\r | |
6154 | UINTN\r | |
6155 | EFIAPI\r | |
6156 | AsmWriteDr6 (\r | |
6157 | UINTN Dr6\r | |
6158 | );\r | |
6159 | \r | |
6160 | \r | |
6161 | /**\r | |
6162 | Writes a value to Debug Register 7 (DR7).\r | |
6163 | \r | |
6164 | Writes and returns a new value to DR7. This function is only available on\r | |
030cd1a2 | 6165 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6166 | \r |
6167 | @param Dr7 The value to write to Dr7.\r | |
6168 | \r | |
6169 | @return The value written to Debug Register 7 (DR7).\r | |
6170 | \r | |
6171 | **/\r | |
6172 | UINTN\r | |
6173 | EFIAPI\r | |
6174 | AsmWriteDr7 (\r | |
6175 | UINTN Dr7\r | |
6176 | );\r | |
6177 | \r | |
6178 | \r | |
6179 | /**\r | |
6180 | Reads the current value of Code Segment Register (CS).\r | |
6181 | \r | |
6182 | Reads and returns the current value of CS. This function is only available on\r | |
030cd1a2 | 6183 | IA-32 and x64.\r |
ac644614 | 6184 | \r |
6185 | @return The current value of CS.\r | |
6186 | \r | |
6187 | **/\r | |
6188 | UINT16\r | |
6189 | EFIAPI\r | |
6190 | AsmReadCs (\r | |
6191 | VOID\r | |
6192 | );\r | |
6193 | \r | |
6194 | \r | |
6195 | /**\r | |
6196 | Reads the current value of Data Segment Register (DS).\r | |
6197 | \r | |
6198 | Reads and returns the current value of DS. This function is only available on\r | |
030cd1a2 | 6199 | IA-32 and x64.\r |
ac644614 | 6200 | \r |
6201 | @return The current value of DS.\r | |
6202 | \r | |
6203 | **/\r | |
6204 | UINT16\r | |
6205 | EFIAPI\r | |
6206 | AsmReadDs (\r | |
6207 | VOID\r | |
6208 | );\r | |
6209 | \r | |
6210 | \r | |
6211 | /**\r | |
6212 | Reads the current value of Extra Segment Register (ES).\r | |
6213 | \r | |
6214 | Reads and returns the current value of ES. This function is only available on\r | |
030cd1a2 | 6215 | IA-32 and x64.\r |
ac644614 | 6216 | \r |
6217 | @return The current value of ES.\r | |
6218 | \r | |
6219 | **/\r | |
6220 | UINT16\r | |
6221 | EFIAPI\r | |
6222 | AsmReadEs (\r | |
6223 | VOID\r | |
6224 | );\r | |
6225 | \r | |
6226 | \r | |
6227 | /**\r | |
6228 | Reads the current value of FS Data Segment Register (FS).\r | |
6229 | \r | |
6230 | Reads and returns the current value of FS. This function is only available on\r | |
030cd1a2 | 6231 | IA-32 and x64.\r |
ac644614 | 6232 | \r |
6233 | @return The current value of FS.\r | |
6234 | \r | |
6235 | **/\r | |
6236 | UINT16\r | |
6237 | EFIAPI\r | |
6238 | AsmReadFs (\r | |
6239 | VOID\r | |
6240 | );\r | |
6241 | \r | |
6242 | \r | |
6243 | /**\r | |
6244 | Reads the current value of GS Data Segment Register (GS).\r | |
6245 | \r | |
6246 | Reads and returns the current value of GS. This function is only available on\r | |
030cd1a2 | 6247 | IA-32 and x64.\r |
ac644614 | 6248 | \r |
6249 | @return The current value of GS.\r | |
6250 | \r | |
6251 | **/\r | |
6252 | UINT16\r | |
6253 | EFIAPI\r | |
6254 | AsmReadGs (\r | |
6255 | VOID\r | |
6256 | );\r | |
6257 | \r | |
6258 | \r | |
6259 | /**\r | |
6260 | Reads the current value of Stack Segment Register (SS).\r | |
6261 | \r | |
6262 | Reads and returns the current value of SS. This function is only available on\r | |
030cd1a2 | 6263 | IA-32 and x64.\r |
ac644614 | 6264 | \r |
6265 | @return The current value of SS.\r | |
6266 | \r | |
6267 | **/\r | |
6268 | UINT16\r | |
6269 | EFIAPI\r | |
6270 | AsmReadSs (\r | |
6271 | VOID\r | |
6272 | );\r | |
6273 | \r | |
6274 | \r | |
6275 | /**\r | |
6276 | Reads the current value of Task Register (TR).\r | |
6277 | \r | |
6278 | Reads and returns the current value of TR. This function is only available on\r | |
030cd1a2 | 6279 | IA-32 and x64.\r |
ac644614 | 6280 | \r |
6281 | @return The current value of TR.\r | |
6282 | \r | |
6283 | **/\r | |
6284 | UINT16\r | |
6285 | EFIAPI\r | |
6286 | AsmReadTr (\r | |
6287 | VOID\r | |
6288 | );\r | |
6289 | \r | |
6290 | \r | |
6291 | /**\r | |
6292 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
6293 | \r | |
6294 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
030cd1a2 | 6295 | function is only available on IA-32 and x64.\r |
ac644614 | 6296 | \r |
6297 | If Gdtr is NULL, then ASSERT().\r | |
6298 | \r | |
6299 | @param Gdtr Pointer to a GDTR descriptor.\r | |
6300 | \r | |
6301 | **/\r | |
6302 | VOID\r | |
6303 | EFIAPI\r | |
6304 | AsmReadGdtr (\r | |
6305 | OUT IA32_DESCRIPTOR *Gdtr\r | |
6306 | );\r | |
6307 | \r | |
6308 | \r | |
6309 | /**\r | |
6310 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
6311 | \r | |
6312 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
030cd1a2 | 6313 | only available on IA-32 and x64.\r |
ac644614 | 6314 | \r |
6315 | If Gdtr is NULL, then ASSERT().\r | |
6316 | \r | |
6317 | @param Gdtr Pointer to a GDTR descriptor.\r | |
6318 | \r | |
6319 | **/\r | |
6320 | VOID\r | |
6321 | EFIAPI\r | |
6322 | AsmWriteGdtr (\r | |
6323 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
6324 | );\r | |
6325 | \r | |
6326 | \r | |
6327 | /**\r | |
17f695ed | 6328 | Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6329 | \r |
6330 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
030cd1a2 | 6331 | function is only available on IA-32 and x64.\r |
ac644614 | 6332 | \r |
6333 | If Idtr is NULL, then ASSERT().\r | |
6334 | \r | |
6335 | @param Idtr Pointer to a IDTR descriptor.\r | |
6336 | \r | |
6337 | **/\r | |
6338 | VOID\r | |
6339 | EFIAPI\r | |
6340 | AsmReadIdtr (\r | |
6341 | OUT IA32_DESCRIPTOR *Idtr\r | |
6342 | );\r | |
6343 | \r | |
6344 | \r | |
6345 | /**\r | |
17f695ed | 6346 | Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6347 | \r |
6348 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
030cd1a2 | 6349 | only available on IA-32 and x64.\r |
ac644614 | 6350 | \r |
6351 | If Idtr is NULL, then ASSERT().\r | |
6352 | \r | |
6353 | @param Idtr Pointer to a IDTR descriptor.\r | |
6354 | \r | |
6355 | **/\r | |
6356 | VOID\r | |
6357 | EFIAPI\r | |
6358 | AsmWriteIdtr (\r | |
6359 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
6360 | );\r | |
6361 | \r | |
6362 | \r | |
6363 | /**\r | |
6364 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
6365 | \r | |
6366 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
030cd1a2 | 6367 | only available on IA-32 and x64.\r |
ac644614 | 6368 | \r |
6369 | @return The current selector of LDT.\r | |
6370 | \r | |
6371 | **/\r | |
6372 | UINT16\r | |
6373 | EFIAPI\r | |
6374 | AsmReadLdtr (\r | |
6375 | VOID\r | |
6376 | );\r | |
6377 | \r | |
6378 | \r | |
6379 | /**\r | |
17f695ed | 6380 | Writes the current Local Descriptor Table Register (LDTR) selector.\r |
ac644614 | 6381 | \r |
6382 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
030cd1a2 | 6383 | only available on IA-32 and x64.\r |
ac644614 | 6384 | \r |
6385 | @param Ldtr 16-bit LDTR selector value.\r | |
6386 | \r | |
6387 | **/\r | |
6388 | VOID\r | |
6389 | EFIAPI\r | |
6390 | AsmWriteLdtr (\r | |
6391 | IN UINT16 Ldtr\r | |
6392 | );\r | |
6393 | \r | |
6394 | \r | |
6395 | /**\r | |
6396 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
6397 | \r | |
6398 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
6399 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
030cd1a2 | 6400 | available on IA-32 and x64.\r |
ac644614 | 6401 | \r |
6402 | If Buffer is NULL, then ASSERT().\r | |
6403 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6404 | \r | |
6405 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
6406 | \r | |
6407 | **/\r | |
6408 | VOID\r | |
6409 | EFIAPI\r | |
6410 | AsmFxSave (\r | |
6411 | OUT IA32_FX_BUFFER *Buffer\r | |
6412 | );\r | |
6413 | \r | |
6414 | \r | |
6415 | /**\r | |
6416 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
6417 | \r | |
6418 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
6419 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
030cd1a2 | 6420 | only available on IA-32 and x64.\r |
ac644614 | 6421 | \r |
6422 | If Buffer is NULL, then ASSERT().\r | |
6423 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6424 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
6425 | \r | |
6426 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
6427 | \r | |
6428 | **/\r | |
6429 | VOID\r | |
6430 | EFIAPI\r | |
6431 | AsmFxRestore (\r | |
6432 | IN CONST IA32_FX_BUFFER *Buffer\r | |
6433 | );\r | |
6434 | \r | |
6435 | \r | |
6436 | /**\r | |
6437 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
6438 | \r | |
6439 | Reads and returns the current value of MM0. This function is only available\r | |
030cd1a2 | 6440 | on IA-32 and x64.\r |
ac644614 | 6441 | \r |
6442 | @return The current value of MM0.\r | |
6443 | \r | |
6444 | **/\r | |
6445 | UINT64\r | |
6446 | EFIAPI\r | |
6447 | AsmReadMm0 (\r | |
6448 | VOID\r | |
6449 | );\r | |
6450 | \r | |
6451 | \r | |
6452 | /**\r | |
6453 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
6454 | \r | |
6455 | Reads and returns the current value of MM1. This function is only available\r | |
030cd1a2 | 6456 | on IA-32 and x64.\r |
ac644614 | 6457 | \r |
6458 | @return The current value of MM1.\r | |
6459 | \r | |
6460 | **/\r | |
6461 | UINT64\r | |
6462 | EFIAPI\r | |
6463 | AsmReadMm1 (\r | |
6464 | VOID\r | |
6465 | );\r | |
6466 | \r | |
6467 | \r | |
6468 | /**\r | |
6469 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
6470 | \r | |
6471 | Reads and returns the current value of MM2. This function is only available\r | |
030cd1a2 | 6472 | on IA-32 and x64.\r |
ac644614 | 6473 | \r |
6474 | @return The current value of MM2.\r | |
6475 | \r | |
6476 | **/\r | |
6477 | UINT64\r | |
6478 | EFIAPI\r | |
6479 | AsmReadMm2 (\r | |
6480 | VOID\r | |
6481 | );\r | |
6482 | \r | |
6483 | \r | |
6484 | /**\r | |
6485 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
6486 | \r | |
6487 | Reads and returns the current value of MM3. This function is only available\r | |
030cd1a2 | 6488 | on IA-32 and x64.\r |
ac644614 | 6489 | \r |
6490 | @return The current value of MM3.\r | |
6491 | \r | |
6492 | **/\r | |
6493 | UINT64\r | |
6494 | EFIAPI\r | |
6495 | AsmReadMm3 (\r | |
6496 | VOID\r | |
6497 | );\r | |
6498 | \r | |
6499 | \r | |
6500 | /**\r | |
6501 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
6502 | \r | |
6503 | Reads and returns the current value of MM4. This function is only available\r | |
030cd1a2 | 6504 | on IA-32 and x64.\r |
ac644614 | 6505 | \r |
6506 | @return The current value of MM4.\r | |
6507 | \r | |
6508 | **/\r | |
6509 | UINT64\r | |
6510 | EFIAPI\r | |
6511 | AsmReadMm4 (\r | |
6512 | VOID\r | |
6513 | );\r | |
6514 | \r | |
6515 | \r | |
6516 | /**\r | |
6517 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
6518 | \r | |
6519 | Reads and returns the current value of MM5. This function is only available\r | |
030cd1a2 | 6520 | on IA-32 and x64.\r |
ac644614 | 6521 | \r |
6522 | @return The current value of MM5.\r | |
6523 | \r | |
6524 | **/\r | |
6525 | UINT64\r | |
6526 | EFIAPI\r | |
6527 | AsmReadMm5 (\r | |
6528 | VOID\r | |
6529 | );\r | |
6530 | \r | |
6531 | \r | |
6532 | /**\r | |
6533 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
6534 | \r | |
6535 | Reads and returns the current value of MM6. This function is only available\r | |
030cd1a2 | 6536 | on IA-32 and x64.\r |
ac644614 | 6537 | \r |
6538 | @return The current value of MM6.\r | |
6539 | \r | |
6540 | **/\r | |
6541 | UINT64\r | |
6542 | EFIAPI\r | |
6543 | AsmReadMm6 (\r | |
6544 | VOID\r | |
6545 | );\r | |
6546 | \r | |
6547 | \r | |
6548 | /**\r | |
6549 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
6550 | \r | |
6551 | Reads and returns the current value of MM7. This function is only available\r | |
030cd1a2 | 6552 | on IA-32 and x64.\r |
ac644614 | 6553 | \r |
6554 | @return The current value of MM7.\r | |
6555 | \r | |
6556 | **/\r | |
6557 | UINT64\r | |
6558 | EFIAPI\r | |
6559 | AsmReadMm7 (\r | |
6560 | VOID\r | |
6561 | );\r | |
6562 | \r | |
6563 | \r | |
6564 | /**\r | |
6565 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
6566 | \r | |
6567 | Writes the current value of MM0. This function is only available on IA32 and\r | |
030cd1a2 | 6568 | x64.\r |
ac644614 | 6569 | \r |
6570 | @param Value The 64-bit value to write to MM0.\r | |
6571 | \r | |
6572 | **/\r | |
6573 | VOID\r | |
6574 | EFIAPI\r | |
6575 | AsmWriteMm0 (\r | |
6576 | IN UINT64 Value\r | |
6577 | );\r | |
6578 | \r | |
6579 | \r | |
6580 | /**\r | |
6581 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
6582 | \r | |
6583 | Writes the current value of MM1. This function is only available on IA32 and\r | |
030cd1a2 | 6584 | x64.\r |
ac644614 | 6585 | \r |
6586 | @param Value The 64-bit value to write to MM1.\r | |
6587 | \r | |
6588 | **/\r | |
6589 | VOID\r | |
6590 | EFIAPI\r | |
6591 | AsmWriteMm1 (\r | |
6592 | IN UINT64 Value\r | |
6593 | );\r | |
6594 | \r | |
6595 | \r | |
6596 | /**\r | |
6597 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
6598 | \r | |
6599 | Writes the current value of MM2. This function is only available on IA32 and\r | |
030cd1a2 | 6600 | x64.\r |
ac644614 | 6601 | \r |
6602 | @param Value The 64-bit value to write to MM2.\r | |
6603 | \r | |
6604 | **/\r | |
6605 | VOID\r | |
6606 | EFIAPI\r | |
6607 | AsmWriteMm2 (\r | |
6608 | IN UINT64 Value\r | |
6609 | );\r | |
6610 | \r | |
6611 | \r | |
6612 | /**\r | |
6613 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
6614 | \r | |
6615 | Writes the current value of MM3. This function is only available on IA32 and\r | |
030cd1a2 | 6616 | x64.\r |
ac644614 | 6617 | \r |
6618 | @param Value The 64-bit value to write to MM3.\r | |
6619 | \r | |
6620 | **/\r | |
6621 | VOID\r | |
6622 | EFIAPI\r | |
6623 | AsmWriteMm3 (\r | |
6624 | IN UINT64 Value\r | |
6625 | );\r | |
6626 | \r | |
6627 | \r | |
6628 | /**\r | |
6629 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
6630 | \r | |
6631 | Writes the current value of MM4. This function is only available on IA32 and\r | |
030cd1a2 | 6632 | x64.\r |
ac644614 | 6633 | \r |
6634 | @param Value The 64-bit value to write to MM4.\r | |
6635 | \r | |
6636 | **/\r | |
6637 | VOID\r | |
6638 | EFIAPI\r | |
6639 | AsmWriteMm4 (\r | |
6640 | IN UINT64 Value\r | |
6641 | );\r | |
6642 | \r | |
6643 | \r | |
6644 | /**\r | |
6645 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
6646 | \r | |
6647 | Writes the current value of MM5. This function is only available on IA32 and\r | |
030cd1a2 | 6648 | x64.\r |
ac644614 | 6649 | \r |
6650 | @param Value The 64-bit value to write to MM5.\r | |
6651 | \r | |
6652 | **/\r | |
6653 | VOID\r | |
6654 | EFIAPI\r | |
6655 | AsmWriteMm5 (\r | |
6656 | IN UINT64 Value\r | |
6657 | );\r | |
6658 | \r | |
6659 | \r | |
6660 | /**\r | |
6661 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
6662 | \r | |
6663 | Writes the current value of MM6. This function is only available on IA32 and\r | |
030cd1a2 | 6664 | x64.\r |
ac644614 | 6665 | \r |
6666 | @param Value The 64-bit value to write to MM6.\r | |
6667 | \r | |
6668 | **/\r | |
6669 | VOID\r | |
6670 | EFIAPI\r | |
6671 | AsmWriteMm6 (\r | |
6672 | IN UINT64 Value\r | |
6673 | );\r | |
6674 | \r | |
6675 | \r | |
6676 | /**\r | |
6677 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
6678 | \r | |
6679 | Writes the current value of MM7. This function is only available on IA32 and\r | |
030cd1a2 | 6680 | x64.\r |
ac644614 | 6681 | \r |
6682 | @param Value The 64-bit value to write to MM7.\r | |
6683 | \r | |
6684 | **/\r | |
6685 | VOID\r | |
6686 | EFIAPI\r | |
6687 | AsmWriteMm7 (\r | |
6688 | IN UINT64 Value\r | |
6689 | );\r | |
6690 | \r | |
6691 | \r | |
6692 | /**\r | |
6693 | Reads the current value of Time Stamp Counter (TSC).\r | |
6694 | \r | |
6695 | Reads and returns the current value of TSC. This function is only available\r | |
030cd1a2 | 6696 | on IA-32 and x64.\r |
ac644614 | 6697 | \r |
6698 | @return The current value of TSC\r | |
6699 | \r | |
6700 | **/\r | |
6701 | UINT64\r | |
6702 | EFIAPI\r | |
6703 | AsmReadTsc (\r | |
6704 | VOID\r | |
6705 | );\r | |
6706 | \r | |
6707 | \r | |
6708 | /**\r | |
6709 | Reads the current value of a Performance Counter (PMC).\r | |
6710 | \r | |
6711 | Reads and returns the current value of performance counter specified by\r | |
030cd1a2 | 6712 | Index. This function is only available on IA-32 and x64.\r |
ac644614 | 6713 | \r |
6714 | @param Index The 32-bit Performance Counter index to read.\r | |
6715 | \r | |
6716 | @return The value of the PMC specified by Index.\r | |
6717 | \r | |
6718 | **/\r | |
6719 | UINT64\r | |
6720 | EFIAPI\r | |
6721 | AsmReadPmc (\r | |
6722 | IN UINT32 Index\r | |
6723 | );\r | |
6724 | \r | |
6725 | \r | |
6726 | /**\r | |
6727 | Sets up a monitor buffer that is used by AsmMwait().\r | |
6728 | \r | |
6729 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
030cd1a2 | 6730 | and Edx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 6731 | \r |
6732 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6733 | instruction.\r | |
6734 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6735 | instruction.\r | |
6736 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
6737 | instruction.\r | |
6738 | \r | |
6739 | @return Eax\r | |
6740 | \r | |
6741 | **/\r | |
6742 | UINTN\r | |
6743 | EFIAPI\r | |
6744 | AsmMonitor (\r | |
6745 | IN UINTN Eax,\r | |
6746 | IN UINTN Ecx,\r | |
6747 | IN UINTN Edx\r | |
6748 | );\r | |
6749 | \r | |
6750 | \r | |
6751 | /**\r | |
6752 | Executes an MWAIT instruction.\r | |
6753 | \r | |
6754 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
030cd1a2 | 6755 | Ecx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 6756 | \r |
6757 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
6758 | instruction.\r | |
6759 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
6760 | instruction.\r | |
6761 | \r | |
6762 | @return Eax\r | |
6763 | \r | |
6764 | **/\r | |
6765 | UINTN\r | |
6766 | EFIAPI\r | |
6767 | AsmMwait (\r | |
6768 | IN UINTN Eax,\r | |
6769 | IN UINTN Ecx\r | |
6770 | );\r | |
6771 | \r | |
6772 | \r | |
6773 | /**\r | |
6774 | Executes a WBINVD instruction.\r | |
6775 | \r | |
6776 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 6777 | x64.\r |
ac644614 | 6778 | \r |
6779 | **/\r | |
6780 | VOID\r | |
6781 | EFIAPI\r | |
6782 | AsmWbinvd (\r | |
6783 | VOID\r | |
6784 | );\r | |
6785 | \r | |
6786 | \r | |
6787 | /**\r | |
6788 | Executes a INVD instruction.\r | |
6789 | \r | |
6790 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 6791 | x64.\r |
ac644614 | 6792 | \r |
6793 | **/\r | |
6794 | VOID\r | |
6795 | EFIAPI\r | |
6796 | AsmInvd (\r | |
6797 | VOID\r | |
6798 | );\r | |
6799 | \r | |
6800 | \r | |
6801 | /**\r | |
6802 | Flushes a cache line from all the instruction and data caches within the\r | |
6803 | coherency domain of the CPU.\r | |
6804 | \r | |
6805 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
030cd1a2 | 6806 | This function is only available on IA-32 and x64.\r |
ac644614 | 6807 | \r |
6808 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
6809 | in a physical addressing mode, then LinearAddress is a\r | |
6810 | physical address. If the CPU is in a virtual\r | |
6811 | addressing mode, then LinearAddress is a virtual\r | |
6812 | address.\r | |
6813 | \r | |
6814 | @return LinearAddress\r | |
6815 | **/\r | |
6816 | VOID *\r | |
6817 | EFIAPI\r | |
6818 | AsmFlushCacheLine (\r | |
6819 | IN VOID *LinearAddress\r | |
6820 | );\r | |
6821 | \r | |
6822 | \r | |
6823 | /**\r | |
6824 | Enables the 32-bit paging mode on the CPU.\r | |
6825 | \r | |
6826 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
6827 | must be properly initialized prior to calling this service. This function\r | |
6828 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
6829 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
6830 | transferred to the function specified by EntryPoint using the new stack\r | |
6831 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
6832 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
6833 | EntryPoint must never return.\r | |
6834 | \r | |
6835 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
6836 | If EntryPoint is NULL, then ASSERT().\r | |
6837 | If NewStack is NULL, then ASSERT().\r | |
6838 | \r | |
6839 | There are a number of constraints that must be followed before calling this\r | |
6840 | function:\r | |
6841 | 1) Interrupts must be disabled.\r | |
6842 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
6843 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
6844 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
6845 | descriptors.\r | |
6846 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
6847 | is complete, and those page tables must guarantee that the pages for this\r | |
6848 | function and the stack are identity mapped.\r | |
6849 | \r | |
6850 | @param EntryPoint A pointer to function to call with the new stack after\r | |
6851 | paging is enabled.\r | |
6852 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
6853 | function as the first parameter after paging is enabled.\r | |
6854 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
6855 | function as the second parameter after paging is enabled.\r | |
6856 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
6857 | function after paging is enabled.\r | |
6858 | \r | |
6859 | **/\r | |
6860 | VOID\r | |
6861 | EFIAPI\r | |
6862 | AsmEnablePaging32 (\r | |
6863 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
6864 | IN VOID *Context1, OPTIONAL\r | |
6865 | IN VOID *Context2, OPTIONAL\r | |
6866 | IN VOID *NewStack\r | |
6867 | );\r | |
6868 | \r | |
6869 | \r | |
6870 | /**\r | |
6871 | Disables the 32-bit paging mode on the CPU.\r | |
6872 | \r | |
6873 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
6874 | mode. This function assumes the current execution mode is 32-paged protected\r | |
6875 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
6876 | is disabled, control is transferred to the function specified by EntryPoint\r | |
6877 | using the new stack specified by NewStack and passing in the parameters\r | |
6878 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
6879 | may be NULL. The function EntryPoint must never return.\r | |
6880 | \r | |
6881 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
6882 | If EntryPoint is NULL, then ASSERT().\r | |
6883 | If NewStack is NULL, then ASSERT().\r | |
6884 | \r | |
6885 | There are a number of constraints that must be followed before calling this\r | |
6886 | function:\r | |
6887 | 1) Interrupts must be disabled.\r | |
6888 | 2) The caller must be in 32-bit paged mode.\r | |
6889 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
6890 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
6891 | this function and the stack are identity mapped.\r | |
6892 | \r | |
6893 | @param EntryPoint A pointer to function to call with the new stack after\r | |
6894 | paging is disabled.\r | |
6895 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
6896 | function as the first parameter after paging is disabled.\r | |
6897 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
6898 | function as the second parameter after paging is\r | |
6899 | disabled.\r | |
6900 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
6901 | function after paging is disabled.\r | |
6902 | \r | |
6903 | **/\r | |
6904 | VOID\r | |
6905 | EFIAPI\r | |
6906 | AsmDisablePaging32 (\r | |
6907 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
6908 | IN VOID *Context1, OPTIONAL\r | |
6909 | IN VOID *Context2, OPTIONAL\r | |
6910 | IN VOID *NewStack\r | |
6911 | );\r | |
6912 | \r | |
6913 | \r | |
6914 | /**\r | |
6915 | Enables the 64-bit paging mode on the CPU.\r | |
6916 | \r | |
6917 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
6918 | must be properly initialized prior to calling this service. This function\r | |
6919 | assumes the current execution mode is 32-bit protected mode with flat\r | |
6920 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
6921 | paging mode is enabled, control is transferred to the function specified by\r | |
6922 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
6923 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
6924 | optional and may be 0. The function EntryPoint must never return.\r | |
6925 | \r | |
6926 | If the current execution mode is not 32-bit protected mode with flat\r | |
6927 | descriptors, then ASSERT().\r | |
6928 | If EntryPoint is 0, then ASSERT().\r | |
6929 | If NewStack is 0, then ASSERT().\r | |
6930 | \r | |
17f695ed | 6931 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 6932 | is called. The descriptor in the GDT that this selector\r |
6933 | references must be setup for long mode.\r | |
6934 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
6935 | the new stack after paging is enabled.\r | |
6936 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
6937 | the EntryPoint function as the first parameter after\r | |
6938 | paging is enabled.\r | |
6939 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
6940 | the EntryPoint function as the second parameter after\r | |
6941 | paging is enabled.\r | |
6942 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
6943 | the EntryPoint function after paging is enabled.\r | |
6944 | \r | |
6945 | **/\r | |
6946 | VOID\r | |
6947 | EFIAPI\r | |
6948 | AsmEnablePaging64 (\r | |
17f695ed | 6949 | IN UINT16 Cs,\r |
ac644614 | 6950 | IN UINT64 EntryPoint,\r |
6951 | IN UINT64 Context1, OPTIONAL\r | |
6952 | IN UINT64 Context2, OPTIONAL\r | |
6953 | IN UINT64 NewStack\r | |
6954 | );\r | |
6955 | \r | |
6956 | \r | |
6957 | /**\r | |
6958 | Disables the 64-bit paging mode on the CPU.\r | |
6959 | \r | |
6960 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
6961 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
030cd1a2 | 6962 | This function is only available on x64. After the 64-bit paging mode is\r |
ac644614 | 6963 | disabled, control is transferred to the function specified by EntryPoint\r |
6964 | using the new stack specified by NewStack and passing in the parameters\r | |
6965 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
6966 | may be 0. The function EntryPoint must never return.\r | |
6967 | \r | |
6968 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
6969 | If EntryPoint is 0, then ASSERT().\r | |
6970 | If NewStack is 0, then ASSERT().\r | |
6971 | \r | |
17f695ed | 6972 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 6973 | is called. The descriptor in the GDT that this selector\r |
6974 | references must be setup for 32-bit protected mode.\r | |
6975 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
6976 | the new stack after paging is disabled.\r | |
6977 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
6978 | the EntryPoint function as the first parameter after\r | |
6979 | paging is disabled.\r | |
6980 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
6981 | the EntryPoint function as the second parameter after\r | |
6982 | paging is disabled.\r | |
6983 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
6984 | the EntryPoint function after paging is disabled.\r | |
6985 | \r | |
6986 | **/\r | |
6987 | VOID\r | |
6988 | EFIAPI\r | |
6989 | AsmDisablePaging64 (\r | |
17f695ed | 6990 | IN UINT16 Cs,\r |
ac644614 | 6991 | IN UINT32 EntryPoint,\r |
6992 | IN UINT32 Context1, OPTIONAL\r | |
6993 | IN UINT32 Context2, OPTIONAL\r | |
6994 | IN UINT32 NewStack\r | |
6995 | );\r | |
6996 | \r | |
6997 | \r | |
6998 | //\r | |
6999 | // 16-bit thunking services\r | |
7000 | //\r | |
7001 | \r | |
7002 | /**\r | |
7003 | Retrieves the properties for 16-bit thunk functions.\r | |
7004 | \r | |
7005 | Computes the size of the buffer and stack below 1MB required to use the\r | |
7006 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
7007 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
7008 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
7009 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
7010 | of bytes that need to be passed to the 16-bit real mode code.\r | |
52fa075c | 7011 | \r |
ac644614 | 7012 | If RealModeBufferSize is NULL, then ASSERT().\r |
7013 | If ExtraStackSize is NULL, then ASSERT().\r | |
7014 | \r | |
7015 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
7016 | required to use the 16-bit thunk functions.\r | |
7017 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
7018 | that the 16-bit thunk functions require for\r | |
7019 | temporary storage in the transition to and from\r | |
7020 | 16-bit real mode.\r | |
7021 | \r | |
7022 | **/\r | |
7023 | VOID\r | |
7024 | EFIAPI\r | |
7025 | AsmGetThunk16Properties (\r | |
7026 | OUT UINT32 *RealModeBufferSize,\r | |
7027 | OUT UINT32 *ExtraStackSize\r | |
7028 | );\r | |
7029 | \r | |
7030 | \r | |
7031 | /**\r | |
7032 | Prepares all structures a code required to use AsmThunk16().\r | |
7033 | \r | |
7034 | Prepares all structures and code required to use AsmThunk16().\r | |
52fa075c | 7035 | \r |
8243b089 | 7036 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7037 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
ac644614 | 7038 | \r |
7039 | If ThunkContext is NULL, then ASSERT().\r | |
7040 | \r | |
7041 | @param ThunkContext A pointer to the context structure that describes the\r | |
7042 | 16-bit real mode code to call.\r | |
7043 | \r | |
7044 | **/\r | |
7045 | VOID\r | |
7046 | EFIAPI\r | |
7047 | AsmPrepareThunk16 (\r | |
7048 | OUT THUNK_CONTEXT *ThunkContext\r | |
7049 | );\r | |
7050 | \r | |
7051 | \r | |
7052 | /**\r | |
7053 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7054 | \r | |
7055 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
17f695ed | 7056 | AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r |
7057 | This function must be called with interrupts disabled.\r | |
7058 | \r | |
7059 | The register state from the RealModeState field of ThunkContext is restored just prior \r | |
7060 | to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r | |
7061 | which is used to set the interrupt state when a 16-bit real mode entry point is called.\r | |
7062 | Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r | |
7063 | The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r | |
7064 | the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r | |
7065 | The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r | |
7066 | so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r | |
7067 | and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r | |
7068 | point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r | |
7069 | after the RETF instruction is executed.\r | |
7070 | \r | |
7071 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7072 | or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r | |
7073 | the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r | |
7074 | \r | |
7075 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7076 | then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r | |
7077 | This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r | |
7078 | \r | |
7079 | If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r | |
7080 | is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r | |
7081 | \r | |
7082 | If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r | |
7083 | ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r | |
7084 | disable the A20 mask.\r | |
7085 | \r | |
7086 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r | |
7087 | ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r | |
7088 | then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7089 | \r | |
7090 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r | |
7091 | ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7092 | \r | |
ac644614 | 7093 | If ThunkContext is NULL, then ASSERT().\r |
7094 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
17f695ed | 7095 | If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r |
7096 | ThunkAttributes, then ASSERT().\r | |
ac644614 | 7097 | \r |
8243b089 | 7098 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7099 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
52fa075c | 7100 | \r |
ac644614 | 7101 | @param ThunkContext A pointer to the context structure that describes the\r |
7102 | 16-bit real mode code to call.\r | |
7103 | \r | |
7104 | **/\r | |
7105 | VOID\r | |
7106 | EFIAPI\r | |
7107 | AsmThunk16 (\r | |
7108 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7109 | );\r | |
7110 | \r | |
7111 | \r | |
7112 | /**\r | |
7113 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7114 | control to a 16-bit real mode entry point, and returns the results.\r | |
7115 | \r | |
7116 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7117 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
7118 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
7119 | service should be used. If the caller intends to make more than one 16-bit\r | |
7120 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
7121 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
7122 | \r | |
8243b089 | 7123 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7124 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
52fa075c | 7125 | \r |
17f695ed | 7126 | See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r |
ac644614 | 7127 | \r |
7128 | @param ThunkContext A pointer to the context structure that describes the\r | |
7129 | 16-bit real mode code to call.\r | |
7130 | \r | |
7131 | **/\r | |
7132 | VOID\r | |
7133 | EFIAPI\r | |
7134 | AsmPrepareAndThunk16 (\r | |
7135 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7136 | );\r | |
7137 | \r | |
ac644614 | 7138 | #endif\r |
e3a7917f | 7139 | #endif\r |
ac644614 | 7140 | \r |
7141 | \r |