projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| ac644614 | 1 | /** @file\r |
| 50a64e5b | 2 | Provides string functions, linked list functions, math functions, synchronization\r |
| 1a2f870c | 3 | functions, and CPU architecture-specific functions.\r |
| ac644614 | 4 | \r |
| c058d59f | 5 | Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r |
| 9df063a0 HT |
6 | Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
| 7 | This program and the accompanying materials\r | |
| 50a64e5b | 8 | are licensed and made available under the terms and conditions of the BSD License\r |
| 9 | which accompanies this distribution. The full text of the license may be found at\r | |
| af2dc6a7 | 10 | http://opensource.org/licenses/bsd-license.php.\r |
| ac644614 | 11 | \r |
| 50a64e5b | 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| 13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| ac644614 | 14 | \r |
| 15 | **/\r | |
| 16 | \r | |
| 17 | #ifndef __BASE_LIB__\r | |
| 18 | #define __BASE_LIB__\r | |
| 19 | \r | |
| 1106ffe1 | 20 | //\r |
| 1a2f870c | 21 | // Definitions for architecture-specific types\r |
| 1106ffe1 | 22 | //\r |
| ac644614 | 23 | #if defined (MDE_CPU_IA32)\r |
| fc30687f | 24 | ///\r |
| af2dc6a7 | 25 | /// The IA-32 architecture context buffer used by SetJump() and LongJump().\r |
| fc30687f | 26 | ///\r |
| ac644614 | 27 | typedef struct {\r |
| 28 | UINT32 Ebx;\r | |
| 29 | UINT32 Esi;\r | |
| 30 | UINT32 Edi;\r | |
| 31 | UINT32 Ebp;\r | |
| 32 | UINT32 Esp;\r | |
| 33 | UINT32 Eip;\r | |
| 34 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
| 35 | \r | |
| 36 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
| 37 | \r | |
| aa4df547 | 38 | #endif // defined (MDE_CPU_IA32)\r |
| 39 | \r | |
| 40 | #if defined (MDE_CPU_IPF)\r | |
| ac644614 | 41 | \r |
| fc30687f | 42 | ///\r |
| af2dc6a7 | 43 | /// The Itanium architecture context buffer used by SetJump() and LongJump().\r |
| fc30687f | 44 | ///\r |
| ac644614 | 45 | typedef struct {\r |
| 46 | UINT64 F2[2];\r | |
| 47 | UINT64 F3[2];\r | |
| 48 | UINT64 F4[2];\r | |
| 49 | UINT64 F5[2];\r | |
| 50 | UINT64 F16[2];\r | |
| 51 | UINT64 F17[2];\r | |
| 52 | UINT64 F18[2];\r | |
| 53 | UINT64 F19[2];\r | |
| 54 | UINT64 F20[2];\r | |
| 55 | UINT64 F21[2];\r | |
| 56 | UINT64 F22[2];\r | |
| 57 | UINT64 F23[2];\r | |
| 58 | UINT64 F24[2];\r | |
| 59 | UINT64 F25[2];\r | |
| 60 | UINT64 F26[2];\r | |
| 61 | UINT64 F27[2];\r | |
| 62 | UINT64 F28[2];\r | |
| 63 | UINT64 F29[2];\r | |
| 64 | UINT64 F30[2];\r | |
| 65 | UINT64 F31[2];\r | |
| 66 | UINT64 R4;\r | |
| 67 | UINT64 R5;\r | |
| 68 | UINT64 R6;\r | |
| 69 | UINT64 R7;\r | |
| 70 | UINT64 SP;\r | |
| 71 | UINT64 BR0;\r | |
| 72 | UINT64 BR1;\r | |
| 73 | UINT64 BR2;\r | |
| 74 | UINT64 BR3;\r | |
| 75 | UINT64 BR4;\r | |
| 76 | UINT64 BR5;\r | |
| 77 | UINT64 InitialUNAT;\r | |
| 78 | UINT64 AfterSpillUNAT;\r | |
| 79 | UINT64 PFS;\r | |
| 80 | UINT64 BSP;\r | |
| 81 | UINT64 Predicates;\r | |
| 82 | UINT64 LoopCount;\r | |
| 83 | UINT64 FPSR;\r | |
| 84 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
| 85 | \r | |
| 86 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
| 87 | \r | |
| aa4df547 | 88 | #endif // defined (MDE_CPU_IPF)\r |
| 89 | \r | |
| 90 | #if defined (MDE_CPU_X64)\r | |
| fc30687f | 91 | ///\r |
| af2dc6a7 | 92 | /// The x64 architecture context buffer used by SetJump() and LongJump().\r |
| fc30687f | 93 | ///\r |
| ac644614 | 94 | typedef struct {\r |
| 95 | UINT64 Rbx;\r | |
| 96 | UINT64 Rsp;\r | |
| 97 | UINT64 Rbp;\r | |
| 98 | UINT64 Rdi;\r | |
| 99 | UINT64 Rsi;\r | |
| 100 | UINT64 R12;\r | |
| 101 | UINT64 R13;\r | |
| 102 | UINT64 R14;\r | |
| 103 | UINT64 R15;\r | |
| 104 | UINT64 Rip;\r | |
| 9b9641c6 | 105 | UINT64 MxCsr;\r |
| af2dc6a7 | 106 | UINT8 XmmBuffer[160]; ///< XMM6-XMM15.\r |
| ac644614 | 107 | } BASE_LIBRARY_JUMP_BUFFER;\r |
| 108 | \r | |
| 109 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
| 110 | \r | |
| aa4df547 | 111 | #endif // defined (MDE_CPU_X64)\r |
| 112 | \r | |
| 113 | #if defined (MDE_CPU_EBC)\r | |
| fc30687f | 114 | ///\r |
| af2dc6a7 | 115 | /// The EBC context buffer used by SetJump() and LongJump().\r |
| fc30687f | 116 | ///\r |
| ac644614 | 117 | typedef struct {\r |
| 118 | UINT64 R0;\r | |
| 119 | UINT64 R1;\r | |
| 120 | UINT64 R2;\r | |
| 121 | UINT64 R3;\r | |
| 122 | UINT64 IP;\r | |
| 123 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
| 124 | \r | |
| 125 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
| 126 | \r | |
| aa4df547 | 127 | #endif // defined (MDE_CPU_EBC)\r |
| ac644614 | 128 | \r |
| ebd04fc2 | 129 | #if defined (MDE_CPU_ARM)\r |
| 130 | \r | |
| 131 | typedef struct {\r | |
| af2dc6a7 | 132 | UINT32 R3; ///< A copy of R13.\r |
| 01a54966 | 133 | UINT32 R4;\r |
| 134 | UINT32 R5;\r | |
| 135 | UINT32 R6;\r | |
| 136 | UINT32 R7;\r | |
| 137 | UINT32 R8;\r | |
| 138 | UINT32 R9;\r | |
| 139 | UINT32 R10;\r | |
| 140 | UINT32 R11;\r | |
| 141 | UINT32 R12;\r | |
| 142 | UINT32 R14;\r | |
| ebd04fc2 | 143 | } BASE_LIBRARY_JUMP_BUFFER;\r |
| 144 | \r | |
| 145 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
| 146 | \r | |
| 147 | #endif // defined (MDE_CPU_ARM)\r | |
| 148 | \r | |
| 807e2604 HL |
149 | #if defined (MDE_CPU_AARCH64)\r |
| 150 | typedef struct {\r | |
| 151 | // GP regs\r | |
| 152 | UINT64 X19;\r | |
| 153 | UINT64 X20;\r | |
| 154 | UINT64 X21;\r | |
| 155 | UINT64 X22;\r | |
| 156 | UINT64 X23;\r | |
| 157 | UINT64 X24;\r | |
| 158 | UINT64 X25;\r | |
| 159 | UINT64 X26;\r | |
| 160 | UINT64 X27;\r | |
| 161 | UINT64 X28;\r | |
| 162 | UINT64 FP;\r | |
| 163 | UINT64 LR;\r | |
| 164 | UINT64 IP0;\r | |
| 165 | \r | |
| 166 | // FP regs\r | |
| 167 | UINT64 D8;\r | |
| 168 | UINT64 D9;\r | |
| 169 | UINT64 D10;\r | |
| 170 | UINT64 D11;\r | |
| 171 | UINT64 D12;\r | |
| 172 | UINT64 D13;\r | |
| 173 | UINT64 D14;\r | |
| 174 | UINT64 D15;\r | |
| 175 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
| 176 | \r | |
| 177 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
| 178 | \r | |
| 179 | #endif // defined (MDE_CPU_AARCH64)\r | |
| 180 | \r | |
| 181 | \r | |
| ac644614 | 182 | //\r |
| 183 | // String Services\r | |
| 184 | //\r | |
| 185 | \r | |
| c058d59f JY |
186 | \r |
| 187 | /**\r | |
| 188 | Returns the length of a Null-terminated Unicode string.\r | |
| 189 | \r | |
| 190 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 191 | \r | |
| 192 | @param String A pointer to a Null-terminated Unicode string.\r | |
| 193 | @param MaxSize The maximum number of Destination Unicode\r | |
| 194 | char, including terminating null char.\r | |
| 195 | \r | |
| 196 | @retval 0 If String is NULL.\r | |
| 197 | @retval MaxSize If there is no null character in the first MaxSize characters of String.\r | |
| 198 | @return The number of characters that percede the terminating null character.\r | |
| 199 | \r | |
| 200 | **/\r | |
| 201 | UINTN\r | |
| 202 | EFIAPI\r | |
| 203 | StrnLenS (\r | |
| 204 | IN CONST CHAR16 *String,\r | |
| 205 | IN UINTN MaxSize\r | |
| 206 | );\r | |
| 207 | \r | |
| 208 | /**\r | |
| 209 | Copies the string pointed to by Source (including the terminating null char)\r | |
| 210 | to the array pointed to by Destination.\r | |
| 211 | \r | |
| 212 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 213 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 214 | \r | |
| 215 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
| 216 | @param DestMax The maximum number of Destination Unicode\r | |
| 217 | char, including terminating null char.\r | |
| 218 | @param Source A pointer to a Null-terminated Unicode string.\r | |
| 219 | \r | |
| 220 | @retval RETURN_SUCCESS String is copied.\r | |
| 221 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than StrLen(Source).\r | |
| 222 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 223 | If Source is NULL.\r | |
| 224 | If PcdMaximumUnicodeStringLength is not zero,\r | |
| 225 | and DestMax is greater than \r | |
| 226 | PcdMaximumUnicodeStringLength.\r | |
| 227 | If DestMax is 0.\r | |
| 228 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 229 | **/\r | |
| 230 | RETURN_STATUS\r | |
| 231 | EFIAPI\r | |
| 232 | StrCpyS (\r | |
| 233 | OUT CHAR16 *Destination,\r | |
| 234 | IN UINTN DestMax,\r | |
| 235 | IN CONST CHAR16 *Source\r | |
| 236 | );\r | |
| 237 | \r | |
| 238 | /**\r | |
| 239 | Copies not more than Length successive char from the string pointed to by\r | |
| 240 | Source to the array pointed to by Destination. If no null char is copied from\r | |
| 241 | Source, then Destination[Length] is always set to null.\r | |
| 242 | \r | |
| 243 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 244 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 245 | \r | |
| 246 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
| 247 | @param DestMax The maximum number of Destination Unicode\r | |
| 248 | char, including terminating null char.\r | |
| 249 | @param Source A pointer to a Null-terminated Unicode string.\r | |
| 250 | @param Length The maximum number of Unicode characters to copy.\r | |
| 251 | \r | |
| 252 | @retval RETURN_SUCCESS String is copied.\r | |
| 253 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r | |
| 254 | MIN(StrLen(Source), Length).\r | |
| 255 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 256 | If Source is NULL.\r | |
| 257 | If PcdMaximumUnicodeStringLength is not zero,\r | |
| 258 | and DestMax is greater than \r | |
| 259 | PcdMaximumUnicodeStringLength.\r | |
| 260 | If DestMax is 0.\r | |
| 261 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 262 | **/\r | |
| 263 | RETURN_STATUS\r | |
| 264 | EFIAPI\r | |
| 265 | StrnCpyS (\r | |
| 266 | OUT CHAR16 *Destination,\r | |
| 267 | IN UINTN DestMax,\r | |
| 268 | IN CONST CHAR16 *Source,\r | |
| 269 | IN UINTN Length\r | |
| 270 | );\r | |
| 271 | \r | |
| 272 | /**\r | |
| 273 | Appends a copy of the string pointed to by Source (including the terminating\r | |
| 274 | null char) to the end of the string pointed to by Destination.\r | |
| 275 | \r | |
| 276 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 277 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 278 | \r | |
| 279 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
| 280 | @param DestMax The maximum number of Destination Unicode\r | |
| 281 | char, including terminating null char.\r | |
| 282 | @param Source A pointer to a Null-terminated Unicode string.\r | |
| 283 | \r | |
| 284 | @retval RETURN_SUCCESS String is appended.\r | |
| 285 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r | |
| 286 | StrLen(Destination).\r | |
| 287 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
| 288 | greater than StrLen(Source).\r | |
| 289 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 290 | If Source is NULL.\r | |
| 291 | If PcdMaximumUnicodeStringLength is not zero,\r | |
| 292 | and DestMax is greater than \r | |
| 293 | PcdMaximumUnicodeStringLength.\r | |
| 294 | If DestMax is 0.\r | |
| 295 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 296 | **/\r | |
| 297 | RETURN_STATUS\r | |
| 298 | EFIAPI\r | |
| 299 | StrCatS (\r | |
| 300 | IN OUT CHAR16 *Destination,\r | |
| 301 | IN UINTN DestMax,\r | |
| 302 | IN CONST CHAR16 *Source\r | |
| 303 | );\r | |
| 304 | \r | |
| 305 | /**\r | |
| 306 | Appends not more than Length successive char from the string pointed to by\r | |
| 307 | Source to the end of the string pointed to by Destination. If no null char is\r | |
| 308 | copied from Source, then Destination[StrLen(Destination) + Length] is always\r | |
| 309 | set to null.\r | |
| 310 | \r | |
| 311 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 312 | If and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 313 | \r | |
| 314 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
| 315 | @param DestMax The maximum number of Destination Unicode\r | |
| 316 | char, including terminating null char.\r | |
| 317 | @param Source A pointer to a Null-terminated Unicode string.\r | |
| 318 | @param Length The maximum number of Unicode characters to copy.\r | |
| 319 | \r | |
| 320 | @retval RETURN_SUCCESS String is appended.\r | |
| 321 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r | |
| 322 | StrLen(Destination).\r | |
| 323 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
| 324 | greater than MIN(StrLen(Source), Length).\r | |
| 325 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 326 | If Source is NULL.\r | |
| 327 | If PcdMaximumUnicodeStringLength is not zero,\r | |
| 328 | and DestMax is greater than \r | |
| 329 | PcdMaximumUnicodeStringLength.\r | |
| 330 | If DestMax is 0.\r | |
| 331 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 332 | **/\r | |
| 333 | RETURN_STATUS\r | |
| 334 | EFIAPI\r | |
| 335 | StrnCatS (\r | |
| 336 | IN OUT CHAR16 *Destination,\r | |
| 337 | IN UINTN DestMax,\r | |
| 338 | IN CONST CHAR16 *Source,\r | |
| 339 | IN UINTN Length\r | |
| 340 | );\r | |
| 341 | \r | |
| 342 | /**\r | |
| 343 | Returns the length of a Null-terminated Ascii string.\r | |
| 344 | \r | |
| 345 | @param String A pointer to a Null-terminated Ascii string.\r | |
| 346 | @param MaxSize The maximum number of Destination Ascii\r | |
| 347 | char, including terminating null char.\r | |
| 348 | \r | |
| 349 | @retval 0 If String is NULL.\r | |
| 350 | @retval MaxSize If there is no null character in the first MaxSize characters of String.\r | |
| 351 | @return The number of characters that percede the terminating null character.\r | |
| 352 | \r | |
| 353 | **/\r | |
| 354 | UINTN\r | |
| 355 | EFIAPI\r | |
| 356 | AsciiStrnLenS (\r | |
| 357 | IN CONST CHAR8 *String,\r | |
| 358 | IN UINTN MaxSize\r | |
| 359 | );\r | |
| 360 | \r | |
| 361 | /**\r | |
| 362 | Copies the string pointed to by Source (including the terminating null char)\r | |
| 363 | to the array pointed to by Destination.\r | |
| 364 | \r | |
| 365 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
| 366 | @param DestMax The maximum number of Destination Ascii\r | |
| 367 | char, including terminating null char.\r | |
| 368 | @param Source A pointer to a Null-terminated Ascii string.\r | |
| 369 | \r | |
| 370 | @retval RETURN_SUCCESS String is copied.\r | |
| 371 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than StrLen(Source).\r | |
| 372 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 373 | If Source is NULL.\r | |
| 374 | If PcdMaximumAsciiStringLength is not zero,\r | |
| 375 | and DestMax is greater than \r | |
| 376 | PcdMaximumAsciiStringLength.\r | |
| 377 | If DestMax is 0.\r | |
| 378 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 379 | **/\r | |
| 380 | RETURN_STATUS\r | |
| 381 | EFIAPI\r | |
| 382 | AsciiStrCpyS (\r | |
| 383 | OUT CHAR8 *Destination,\r | |
| 384 | IN UINTN DestMax,\r | |
| 385 | IN CONST CHAR8 *Source\r | |
| 386 | );\r | |
| 387 | \r | |
| 388 | /**\r | |
| 389 | Copies not more than Length successive char from the string pointed to by\r | |
| 390 | Source to the array pointed to by Destination. If no null char is copied from\r | |
| 391 | Source, then Destination[Length] is always set to null.\r | |
| 392 | \r | |
| 393 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
| 394 | @param DestMax The maximum number of Destination Ascii\r | |
| 395 | char, including terminating null char.\r | |
| 396 | @param Source A pointer to a Null-terminated Ascii string.\r | |
| 397 | @param Length The maximum number of Ascii characters to copy.\r | |
| 398 | \r | |
| 399 | @retval RETURN_SUCCESS String is copied.\r | |
| 400 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r | |
| 401 | MIN(StrLen(Source), Length).\r | |
| 402 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 403 | If Source is NULL.\r | |
| 404 | If PcdMaximumAsciiStringLength is not zero,\r | |
| 405 | and DestMax is greater than \r | |
| 406 | PcdMaximumAsciiStringLength.\r | |
| 407 | If DestMax is 0.\r | |
| 408 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 409 | **/\r | |
| 410 | RETURN_STATUS\r | |
| 411 | EFIAPI\r | |
| 412 | AsciiStrnCpyS (\r | |
| 413 | OUT CHAR8 *Destination,\r | |
| 414 | IN UINTN DestMax,\r | |
| 415 | IN CONST CHAR8 *Source,\r | |
| 416 | IN UINTN Length\r | |
| 417 | );\r | |
| 418 | \r | |
| 419 | /**\r | |
| 420 | Appends a copy of the string pointed to by Source (including the terminating\r | |
| 421 | null char) to the end of the string pointed to by Destination.\r | |
| 422 | \r | |
| 423 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
| 424 | @param DestMax The maximum number of Destination Ascii\r | |
| 425 | char, including terminating null char.\r | |
| 426 | @param Source A pointer to a Null-terminated Ascii string.\r | |
| 427 | \r | |
| 428 | @retval RETURN_SUCCESS String is appended.\r | |
| 429 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r | |
| 430 | StrLen(Destination).\r | |
| 431 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
| 432 | greater than StrLen(Source).\r | |
| 433 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 434 | If Source is NULL.\r | |
| 435 | If PcdMaximumAsciiStringLength is not zero,\r | |
| 436 | and DestMax is greater than \r | |
| 437 | PcdMaximumAsciiStringLength.\r | |
| 438 | If DestMax is 0.\r | |
| 439 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 440 | **/\r | |
| 441 | RETURN_STATUS\r | |
| 442 | EFIAPI\r | |
| 443 | AsciiStrCatS (\r | |
| 444 | IN OUT CHAR8 *Destination,\r | |
| 445 | IN UINTN DestMax,\r | |
| 446 | IN CONST CHAR8 *Source\r | |
| 447 | );\r | |
| 448 | \r | |
| 449 | /**\r | |
| 450 | Appends not more than Length successive char from the string pointed to by\r | |
| 451 | Source to the end of the string pointed to by Destination. If no null char is\r | |
| 452 | copied from Source, then Destination[StrLen(Destination) + Length] is always\r | |
| 453 | set to null.\r | |
| 454 | \r | |
| 455 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
| 456 | @param DestMax The maximum number of Destination Ascii\r | |
| 457 | char, including terminating null char.\r | |
| 458 | @param Source A pointer to a Null-terminated Ascii string.\r | |
| 459 | @param Length The maximum number of Ascii characters to copy.\r | |
| 460 | \r | |
| 461 | @retval RETURN_SUCCESS String is appended.\r | |
| 462 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r | |
| 463 | StrLen(Destination).\r | |
| 464 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
| 465 | greater than MIN(StrLen(Source), Length).\r | |
| 466 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
| 467 | If Source is NULL.\r | |
| 468 | If PcdMaximumAsciiStringLength is not zero,\r | |
| 469 | and DestMax is greater than \r | |
| 470 | PcdMaximumAsciiStringLength.\r | |
| 471 | If DestMax is 0.\r | |
| 472 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
| 473 | **/\r | |
| 474 | RETURN_STATUS\r | |
| 475 | EFIAPI\r | |
| 476 | AsciiStrnCatS (\r | |
| 477 | IN OUT CHAR8 *Destination,\r | |
| 478 | IN UINTN DestMax,\r | |
| 479 | IN CONST CHAR8 *Source,\r | |
| 480 | IN UINTN Length\r | |
| 481 | );\r | |
| 482 | \r | |
| 483 | \r | |
| ac644614 | 484 | /**\r |
| 485 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
| 486 | string and returns the new Unicode string.\r | |
| 487 | \r | |
| 488 | This function copies the contents of the Unicode string Source to the Unicode\r | |
| 489 | string Destination, and returns Destination. If Source and Destination\r | |
| 490 | overlap, then the results are undefined.\r | |
| 491 | \r | |
| 492 | If Destination is NULL, then ASSERT().\r | |
| 493 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 494 | If Source is NULL, then ASSERT().\r | |
| 495 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 496 | If Source and Destination overlap, then ASSERT().\r | |
| 497 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
| 498 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
| 499 | Null-terminator, then ASSERT().\r | |
| 500 | \r | |
| af2dc6a7 | 501 | @param Destination The pointer to a Null-terminated Unicode string.\r |
| 502 | @param Source The pointer to a Null-terminated Unicode string.\r | |
| ac644614 | 503 | \r |
| 9aa049d9 | 504 | @return Destination.\r |
| ac644614 | 505 | \r |
| 506 | **/\r | |
| 507 | CHAR16 *\r | |
| 508 | EFIAPI\r | |
| 509 | StrCpy (\r | |
| 510 | OUT CHAR16 *Destination,\r | |
| 511 | IN CONST CHAR16 *Source\r | |
| 512 | );\r | |
| 513 | \r | |
| 514 | \r | |
| 515 | /**\r | |
| af2dc6a7 | 516 | Copies up to a specified length from one Null-terminated Unicode string to \r |
| 17f695ed | 517 | another Null-terminated Unicode string and returns the new Unicode string.\r |
| ac644614 | 518 | \r |
| 519 | This function copies the contents of the Unicode string Source to the Unicode\r | |
| 520 | string Destination, and returns Destination. At most, Length Unicode\r | |
| 521 | characters are copied from Source to Destination. If Length is 0, then\r | |
| 522 | Destination is returned unmodified. If Length is greater that the number of\r | |
| 523 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
| 524 | characters. If Source and Destination overlap, then the results are\r | |
| 525 | undefined.\r | |
| 526 | \r | |
| 527 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
| 528 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 529 | If Length > 0 and Source is NULL, then ASSERT().\r | |
| 77f863ee | 530 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r |
| ac644614 | 531 | If Source and Destination overlap, then ASSERT().\r |
| 50c247fd | 532 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
| 533 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
| ac644614 | 534 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
| 50c247fd | 535 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r |
| 536 | then ASSERT().\r | |
| ac644614 | 537 | \r |
| af2dc6a7 | 538 | @param Destination The pointer to a Null-terminated Unicode string.\r |
| 539 | @param Source The pointer to a Null-terminated Unicode string.\r | |
| 540 | @param Length The maximum number of Unicode characters to copy.\r | |
| ac644614 | 541 | \r |
| 9aa049d9 | 542 | @return Destination.\r |
| ac644614 | 543 | \r |
| 544 | **/\r | |
| 545 | CHAR16 *\r | |
| 546 | EFIAPI\r | |
| 547 | StrnCpy (\r | |
| 548 | OUT CHAR16 *Destination,\r | |
| 549 | IN CONST CHAR16 *Source,\r | |
| 550 | IN UINTN Length\r | |
| 551 | );\r | |
| 552 | \r | |
| 553 | \r | |
| 554 | /**\r | |
| 555 | Returns the length of a Null-terminated Unicode string.\r | |
| 556 | \r | |
| 557 | This function returns the number of Unicode characters in the Null-terminated\r | |
| 558 | Unicode string specified by String.\r | |
| 559 | \r | |
| 560 | If String is NULL, then ASSERT().\r | |
| 561 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 562 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
| 563 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
| 564 | Null-terminator, then ASSERT().\r | |
| 565 | \r | |
| 566 | @param String Pointer to a Null-terminated Unicode string.\r | |
| 567 | \r | |
| 568 | @return The length of String.\r | |
| 569 | \r | |
| 570 | **/\r | |
| 571 | UINTN\r | |
| 572 | EFIAPI\r | |
| 573 | StrLen (\r | |
| 574 | IN CONST CHAR16 *String\r | |
| 575 | );\r | |
| 576 | \r | |
| 577 | \r | |
| 578 | /**\r | |
| 579 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
| 580 | Null terminator.\r | |
| 581 | \r | |
| 17f695ed | 582 | This function returns the size, in bytes, of the Null-terminated Unicode string \r |
| 583 | specified by String.\r | |
| ac644614 | 584 | \r |
| 585 | If String is NULL, then ASSERT().\r | |
| 586 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 587 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
| 588 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
| 589 | Null-terminator, then ASSERT().\r | |
| 590 | \r | |
| af2dc6a7 | 591 | @param String The pointer to a Null-terminated Unicode string.\r |
| ac644614 | 592 | \r |
| 593 | @return The size of String.\r | |
| 594 | \r | |
| 595 | **/\r | |
| 596 | UINTN\r | |
| 597 | EFIAPI\r | |
| 598 | StrSize (\r | |
| 599 | IN CONST CHAR16 *String\r | |
| 600 | );\r | |
| 601 | \r | |
| 602 | \r | |
| 603 | /**\r | |
| 604 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
| 605 | between the first mismatched Unicode characters.\r | |
| 606 | \r | |
| 607 | This function compares the Null-terminated Unicode string FirstString to the\r | |
| 608 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
| 609 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
| 610 | mismatched Unicode character in SecondString subtracted from the first\r | |
| 611 | mismatched Unicode character in FirstString.\r | |
| 612 | \r | |
| 613 | If FirstString is NULL, then ASSERT().\r | |
| 614 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 615 | If SecondString is NULL, then ASSERT().\r | |
| 616 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 617 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
| 618 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
| 619 | Null-terminator, then ASSERT().\r | |
| 620 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
| af2dc6a7 | 621 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
| ac644614 | 622 | Null-terminator, then ASSERT().\r |
| 623 | \r | |
| af2dc6a7 | 624 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
| 625 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
| ac644614 | 626 | \r |
| 1106ffe1 | 627 | @retval 0 FirstString is identical to SecondString.\r |
| 628 | @return others FirstString is not identical to SecondString.\r | |
| ac644614 | 629 | \r |
| 630 | **/\r | |
| 631 | INTN\r | |
| 632 | EFIAPI\r | |
| 633 | StrCmp (\r | |
| 634 | IN CONST CHAR16 *FirstString,\r | |
| 635 | IN CONST CHAR16 *SecondString\r | |
| 636 | );\r | |
| 637 | \r | |
| 638 | \r | |
| 639 | /**\r | |
| 17f695ed | 640 | Compares up to a specified length the contents of two Null-terminated Unicode strings,\r |
| 641 | and returns the difference between the first mismatched Unicode characters.\r | |
| 642 | \r | |
| ac644614 | 643 | This function compares the Null-terminated Unicode string FirstString to the\r |
| 644 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
| 645 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
| 646 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
| 647 | value returned is the first mismatched Unicode character in SecondString\r | |
| 648 | subtracted from the first mismatched Unicode character in FirstString.\r | |
| 649 | \r | |
| 650 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
| 77f863ee | 651 | If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r |
| ac644614 | 652 | If Length > 0 and SecondString is NULL, then ASSERT().\r |
| 77f863ee | 653 | If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r |
| 50c247fd | 654 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r |
| 655 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
| 656 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r | |
| 657 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
| 658 | then ASSERT().\r | |
| 659 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r | |
| 660 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
| 661 | then ASSERT().\r | |
| ac644614 | 662 | \r |
| af2dc6a7 | 663 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
| 664 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
| 665 | @param Length The maximum number of Unicode characters to compare.\r | |
| ac644614 | 666 | \r |
| 1106ffe1 | 667 | @retval 0 FirstString is identical to SecondString.\r |
| 668 | @return others FirstString is not identical to SecondString.\r | |
| ac644614 | 669 | \r |
| 670 | **/\r | |
| 671 | INTN\r | |
| 672 | EFIAPI\r | |
| 673 | StrnCmp (\r | |
| 674 | IN CONST CHAR16 *FirstString,\r | |
| 675 | IN CONST CHAR16 *SecondString,\r | |
| 676 | IN UINTN Length\r | |
| 677 | );\r | |
| 678 | \r | |
| 679 | \r | |
| 680 | /**\r | |
| 681 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
| 682 | Unicode string, and returns the concatenated Unicode string.\r | |
| 683 | \r | |
| 684 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
| 685 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
| 686 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
| 687 | Unicode String is returned. If Source and Destination overlap, then the\r | |
| 688 | results are undefined.\r | |
| 689 | \r | |
| 690 | If Destination is NULL, then ASSERT().\r | |
| 77f863ee | 691 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r |
| ac644614 | 692 | If Source is NULL, then ASSERT().\r |
| 77f863ee | 693 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r |
| ac644614 | 694 | If Source and Destination overlap, then ASSERT().\r |
| 695 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
| af2dc6a7 | 696 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
| ac644614 | 697 | Null-terminator, then ASSERT().\r |
| 698 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
| af2dc6a7 | 699 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
| ac644614 | 700 | Null-terminator, then ASSERT().\r |
| 701 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
| 702 | and Source results in a Unicode string with more than\r | |
| af2dc6a7 | 703 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
| ac644614 | 704 | Null-terminator, then ASSERT().\r |
| 705 | \r | |
| af2dc6a7 | 706 | @param Destination The pointer to a Null-terminated Unicode string.\r |
| 707 | @param Source The pointer to a Null-terminated Unicode string.\r | |
| ac644614 | 708 | \r |
| 9aa049d9 | 709 | @return Destination.\r |
| ac644614 | 710 | \r |
| 711 | **/\r | |
| 712 | CHAR16 *\r | |
| 713 | EFIAPI\r | |
| 714 | StrCat (\r | |
| 715 | IN OUT CHAR16 *Destination,\r | |
| 716 | IN CONST CHAR16 *Source\r | |
| 717 | );\r | |
| 718 | \r | |
| 719 | \r | |
| 720 | /**\r | |
| 17f695ed | 721 | Concatenates up to a specified length one Null-terminated Unicode to the end \r |
| 722 | of another Null-terminated Unicode string, and returns the concatenated \r | |
| ac644614 | 723 | Unicode string.\r |
| 724 | \r | |
| 725 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
| 726 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
| 727 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
| 728 | most, Length Unicode characters are concatenated from Source to the end of\r | |
| 729 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
| 730 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
| 731 | the results are undefined.\r | |
| 732 | \r | |
| 733 | If Destination is NULL, then ASSERT().\r | |
| 734 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 735 | If Length > 0 and Source is NULL, then ASSERT().\r | |
| 736 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 737 | If Source and Destination overlap, then ASSERT().\r | |
| 50c247fd | 738 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
| 739 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
| ac644614 | 740 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
| 50c247fd | 741 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
| ac644614 | 742 | Null-terminator, then ASSERT().\r |
| 743 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
| 50c247fd | 744 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
| ac644614 | 745 | Null-terminator, then ASSERT().\r |
| 746 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
| 50c247fd | 747 | and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r |
| 748 | Unicode characters, not including the Null-terminator, then ASSERT().\r | |
| ac644614 | 749 | \r |
| af2dc6a7 | 750 | @param Destination The pointer to a Null-terminated Unicode string.\r |
| 751 | @param Source The pointer to a Null-terminated Unicode string.\r | |
| 752 | @param Length The maximum number of Unicode characters to concatenate from\r | |
| ac644614 | 753 | Source.\r |
| 754 | \r | |
| 9aa049d9 | 755 | @return Destination.\r |
| ac644614 | 756 | \r |
| 757 | **/\r | |
| 758 | CHAR16 *\r | |
| 759 | EFIAPI\r | |
| 760 | StrnCat (\r | |
| 761 | IN OUT CHAR16 *Destination,\r | |
| 762 | IN CONST CHAR16 *Source,\r | |
| 763 | IN UINTN Length\r | |
| 764 | );\r | |
| 765 | \r | |
| 766 | /**\r | |
| 9aa049d9 | 767 | Returns the first occurrence of a Null-terminated Unicode sub-string\r |
| ac644614 | 768 | in a Null-terminated Unicode string.\r |
| 769 | \r | |
| 770 | This function scans the contents of the Null-terminated Unicode string\r | |
| 771 | specified by String and returns the first occurrence of SearchString.\r | |
| 772 | If SearchString is not found in String, then NULL is returned. If\r | |
| af2dc6a7 | 773 | the length of SearchString is zero, then String is returned.\r |
| ac644614 | 774 | \r |
| 775 | If String is NULL, then ASSERT().\r | |
| 776 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 777 | If SearchString is NULL, then ASSERT().\r | |
| 778 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 779 | \r | |
| 780 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r | |
| 781 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
| af2dc6a7 | 782 | characters, not including the Null-terminator, then ASSERT().\r |
| ac644614 | 783 | \r |
| af2dc6a7 | 784 | @param String The pointer to a Null-terminated Unicode string.\r |
| 785 | @param SearchString The pointer to a Null-terminated Unicode string to search for.\r | |
| ac644614 | 786 | \r |
| 787 | @retval NULL If the SearchString does not appear in String.\r | |
| 1106ffe1 | 788 | @return others If there is a match.\r |
| ac644614 | 789 | \r |
| 790 | **/\r | |
| 791 | CHAR16 *\r | |
| 792 | EFIAPI\r | |
| 793 | StrStr (\r | |
| 17f695ed | 794 | IN CONST CHAR16 *String,\r |
| 795 | IN CONST CHAR16 *SearchString\r | |
| ac644614 | 796 | );\r |
| 797 | \r | |
| 798 | /**\r | |
| 799 | Convert a Null-terminated Unicode decimal string to a value of\r | |
| 800 | type UINTN.\r | |
| 801 | \r | |
| 802 | This function returns a value of type UINTN by interpreting the contents\r | |
| 803 | of the Unicode string specified by String as a decimal number. The format\r | |
| 804 | of the input Unicode string String is:\r | |
| 805 | \r | |
| 806 | [spaces] [decimal digits].\r | |
| 807 | \r | |
| 808 | The valid decimal digit character is in the range [0-9]. The\r | |
| 809 | function will ignore the pad space, which includes spaces or\r | |
| 810 | tab characters, before [decimal digits]. The running zero in the\r | |
| 811 | beginning of [decimal digits] will be ignored. Then, the function\r | |
| 812 | stops at the first character that is a not a valid decimal character\r | |
| 813 | or a Null-terminator, whichever one comes first.\r | |
| 814 | \r | |
| 815 | If String is NULL, then ASSERT().\r | |
| 816 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
| 817 | If String has only pad spaces, then 0 is returned.\r | |
| 818 | If String has no pad spaces or valid decimal digits,\r | |
| 819 | then 0 is returned.\r | |
| 820 | If the number represented by String overflows according\r | |
| 821 | to the range defined by UINTN, then ASSERT().\r | |
| 822 | \r | |
| 823 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
| 824 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
| 825 | the Null-terminator, then ASSERT().\r | |
| 826 | \r | |
| af2dc6a7 | 827 | @param String The pointer to a Null-terminated Unicode string.\r |
| ac644614 | 828 | \r |
| 38bbd3d9 | 829 | @retval Value translated from String.\r |
| ac644614 | 830 | \r |
| 831 | **/\r | |
| 832 | UINTN\r | |
| 833 | EFIAPI\r | |
| 834 | StrDecimalToUintn (\r | |
| 17f695ed | 835 | IN CONST CHAR16 *String\r |
| ac644614 | 836 | );\r |
| 837 | \r | |
| 838 | /**\r | |
| 839 | Convert a Null-terminated Unicode decimal string to a value of\r | |
| 840 | type UINT64.\r | |
| 841 | \r | |
| 842 | This function returns a value of type UINT64 by interpreting the contents\r | |
| 843 | of the Unicode string specified by String as a decimal number. The format\r | |
| 844 | of the input Unicode string String is:\r | |
| 845 | \r | |
| 846 | [spaces] [decimal digits].\r | |
| 847 | \r | |
| 848 | The valid decimal digit character is in the range [0-9]. The\r | |
| 849 | function will ignore the pad space, which includes spaces or\r | |
| 850 | tab characters, before [decimal digits]. The running zero in the\r | |
| 851 | beginning of [decimal digits] will be ignored. Then, the function\r | |
| 852 | stops at the first character that is a not a valid decimal character\r | |
| 853 | or a Null-terminator, whichever one comes first.\r | |
| 854 | \r | |
| 855 | If String is NULL, then ASSERT().\r | |
| 856 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
| 857 | If String has only pad spaces, then 0 is returned.\r | |
| 858 | If String has no pad spaces or valid decimal digits,\r | |
| 859 | then 0 is returned.\r | |
| 860 | If the number represented by String overflows according\r | |
| 861 | to the range defined by UINT64, then ASSERT().\r | |
| 862 | \r | |
| 863 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
| 864 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
| 865 | the Null-terminator, then ASSERT().\r | |
| 866 | \r | |
| af2dc6a7 | 867 | @param String The pointer to a Null-terminated Unicode string.\r |
| ac644614 | 868 | \r |
| 38bbd3d9 | 869 | @retval Value translated from String.\r |
| ac644614 | 870 | \r |
| 871 | **/\r | |
| 872 | UINT64\r | |
| 873 | EFIAPI\r | |
| 874 | StrDecimalToUint64 (\r | |
| 17f695ed | 875 | IN CONST CHAR16 *String\r |
| ac644614 | 876 | );\r |
| 877 | \r | |
| 878 | \r | |
| 879 | /**\r | |
| 880 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
| 881 | \r | |
| 882 | This function returns a value of type UINTN by interpreting the contents\r | |
| 883 | of the Unicode string specified by String as a hexadecimal number.\r | |
| 884 | The format of the input Unicode string String is:\r | |
| 885 | \r | |
| 886 | [spaces][zeros][x][hexadecimal digits].\r | |
| 887 | \r | |
| 888 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
| 889 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
| 890 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
| 891 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
| 892 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
| 893 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
| af2dc6a7 | 894 | first valid hexadecimal digit. Then, the function stops at the first character \r |
| 895 | that is a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
| ac644614 | 896 | \r |
| 897 | If String is NULL, then ASSERT().\r | |
| 898 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
| 899 | If String has only pad spaces, then zero is returned.\r | |
| 900 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
| 901 | then zero is returned.\r | |
| 902 | If the number represented by String overflows according to the range defined by\r | |
| 903 | UINTN, then ASSERT().\r | |
| 904 | \r | |
| 905 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
| 906 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
| 907 | then ASSERT().\r | |
| 908 | \r | |
| af2dc6a7 | 909 | @param String The pointer to a Null-terminated Unicode string.\r |
| ac644614 | 910 | \r |
| 38bbd3d9 | 911 | @retval Value translated from String.\r |
| ac644614 | 912 | \r |
| 913 | **/\r | |
| 914 | UINTN\r | |
| 915 | EFIAPI\r | |
| 916 | StrHexToUintn (\r | |
| 17f695ed | 917 | IN CONST CHAR16 *String\r |
| ac644614 | 918 | );\r |
| 919 | \r | |
| 920 | \r | |
| 921 | /**\r | |
| 922 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
| 923 | \r | |
| 924 | This function returns a value of type UINT64 by interpreting the contents\r | |
| 925 | of the Unicode string specified by String as a hexadecimal number.\r | |
| 926 | The format of the input Unicode string String is\r | |
| 927 | \r | |
| 928 | [spaces][zeros][x][hexadecimal digits].\r | |
| 929 | \r | |
| 930 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
| 931 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
| 932 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
| 933 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
| 934 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
| 935 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
| 936 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
| 937 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
| 938 | \r | |
| 939 | If String is NULL, then ASSERT().\r | |
| 940 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
| 941 | If String has only pad spaces, then zero is returned.\r | |
| 942 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
| 943 | then zero is returned.\r | |
| 944 | If the number represented by String overflows according to the range defined by\r | |
| 945 | UINT64, then ASSERT().\r | |
| 946 | \r | |
| 947 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
| 948 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
| 949 | then ASSERT().\r | |
| 950 | \r | |
| af2dc6a7 | 951 | @param String The pointer to a Null-terminated Unicode string.\r |
| ac644614 | 952 | \r |
| 38bbd3d9 | 953 | @retval Value translated from String.\r |
| ac644614 | 954 | \r |
| 955 | **/\r | |
| 956 | UINT64\r | |
| 957 | EFIAPI\r | |
| 958 | StrHexToUint64 (\r | |
| 17f695ed | 959 | IN CONST CHAR16 *String\r |
| ac644614 | 960 | );\r |
| 961 | \r | |
| ac644614 | 962 | /**\r |
| 17f695ed | 963 | Convert a Null-terminated Unicode string to a Null-terminated\r |
| ac644614 | 964 | ASCII string and returns the ASCII string.\r |
| 965 | \r | |
| 966 | This function converts the content of the Unicode string Source\r | |
| 967 | to the ASCII string Destination by copying the lower 8 bits of\r | |
| 968 | each Unicode character. It returns Destination.\r | |
| 969 | \r | |
| d3e0289c | 970 | The caller is responsible to make sure Destination points to a buffer with size\r |
| 971 | equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.\r | |
| 972 | \r | |
| ac644614 | 973 | If any Unicode characters in Source contain non-zero value in\r |
| 974 | the upper 8 bits, then ASSERT().\r | |
| 975 | \r | |
| 976 | If Destination is NULL, then ASSERT().\r | |
| 977 | If Source is NULL, then ASSERT().\r | |
| 978 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 979 | If Source and Destination overlap, then ASSERT().\r | |
| 980 | \r | |
| 981 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
| 982 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
| 983 | the Null-terminator, then ASSERT().\r | |
| 984 | \r | |
| 985 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
| 986 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
| 987 | Null-terminator, then ASSERT().\r | |
| 988 | \r | |
| af2dc6a7 | 989 | @param Source The pointer to a Null-terminated Unicode string.\r |
| 990 | @param Destination The pointer to a Null-terminated ASCII string.\r | |
| ac644614 | 991 | \r |
| 9aa049d9 | 992 | @return Destination.\r |
| ac644614 | 993 | \r |
| 994 | **/\r | |
| 995 | CHAR8 *\r | |
| 996 | EFIAPI\r | |
| 997 | UnicodeStrToAsciiStr (\r | |
| 17f695ed | 998 | IN CONST CHAR16 *Source,\r |
| 999 | OUT CHAR8 *Destination\r | |
| ac644614 | 1000 | );\r |
| 1001 | \r | |
| 1002 | \r | |
| 1003 | /**\r | |
| 1004 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
| 1005 | string and returns the new ASCII string.\r | |
| 1006 | \r | |
| 1007 | This function copies the contents of the ASCII string Source to the ASCII\r | |
| 1008 | string Destination, and returns Destination. If Source and Destination\r | |
| 1009 | overlap, then the results are undefined.\r | |
| 1010 | \r | |
| 1011 | If Destination is NULL, then ASSERT().\r | |
| 1012 | If Source is NULL, then ASSERT().\r | |
| 1013 | If Source and Destination overlap, then ASSERT().\r | |
| 1014 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
| 1015 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1016 | then ASSERT().\r | |
| 1017 | \r | |
| af2dc6a7 | 1018 | @param Destination The pointer to a Null-terminated ASCII string.\r |
| 1019 | @param Source The pointer to a Null-terminated ASCII string.\r | |
| ac644614 | 1020 | \r |
| 1021 | @return Destination\r | |
| 1022 | \r | |
| 1023 | **/\r | |
| 1024 | CHAR8 *\r | |
| 1025 | EFIAPI\r | |
| 1026 | AsciiStrCpy (\r | |
| 1027 | OUT CHAR8 *Destination,\r | |
| 1028 | IN CONST CHAR8 *Source\r | |
| 1029 | );\r | |
| 1030 | \r | |
| 1031 | \r | |
| 1032 | /**\r | |
| 17f695ed | 1033 | Copies up to a specified length one Null-terminated ASCII string to another \r |
| 1034 | Null-terminated ASCII string and returns the new ASCII string.\r | |
| ac644614 | 1035 | \r |
| 1036 | This function copies the contents of the ASCII string Source to the ASCII\r | |
| 1037 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
| 1038 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
| 1039 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
| 1040 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
| 1041 | and Destination overlap, then the results are undefined.\r | |
| 1042 | \r | |
| 1043 | If Destination is NULL, then ASSERT().\r | |
| 1044 | If Source is NULL, then ASSERT().\r | |
| 1045 | If Source and Destination overlap, then ASSERT().\r | |
| 50c247fd | 1046 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
| 1047 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
| ac644614 | 1048 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
| 50c247fd | 1049 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
| ac644614 | 1050 | then ASSERT().\r |
| 1051 | \r | |
| af2dc6a7 | 1052 | @param Destination The pointer to a Null-terminated ASCII string.\r |
| 1053 | @param Source The pointer to a Null-terminated ASCII string.\r | |
| 1054 | @param Length The maximum number of ASCII characters to copy.\r | |
| ac644614 | 1055 | \r |
| 1056 | @return Destination\r | |
| 1057 | \r | |
| 1058 | **/\r | |
| 1059 | CHAR8 *\r | |
| 1060 | EFIAPI\r | |
| 1061 | AsciiStrnCpy (\r | |
| 1062 | OUT CHAR8 *Destination,\r | |
| 1063 | IN CONST CHAR8 *Source,\r | |
| 1064 | IN UINTN Length\r | |
| 1065 | );\r | |
| 1066 | \r | |
| 1067 | \r | |
| 1068 | /**\r | |
| 1069 | Returns the length of a Null-terminated ASCII string.\r | |
| 1070 | \r | |
| 1071 | This function returns the number of ASCII characters in the Null-terminated\r | |
| 1072 | ASCII string specified by String.\r | |
| 1073 | \r | |
| 1074 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
| 1075 | If Length > 0 and Source is NULL, then ASSERT().\r | |
| 1076 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
| 1077 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1078 | then ASSERT().\r | |
| 1079 | \r | |
| af2dc6a7 | 1080 | @param String The pointer to a Null-terminated ASCII string.\r |
| ac644614 | 1081 | \r |
| 1082 | @return The length of String.\r | |
| 1083 | \r | |
| 1084 | **/\r | |
| 1085 | UINTN\r | |
| 1086 | EFIAPI\r | |
| 1087 | AsciiStrLen (\r | |
| 1088 | IN CONST CHAR8 *String\r | |
| 1089 | );\r | |
| 1090 | \r | |
| 1091 | \r | |
| 1092 | /**\r | |
| 1093 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
| 1094 | Null terminator.\r | |
| 1095 | \r | |
| 1096 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
| 1097 | specified by String.\r | |
| 1098 | \r | |
| 1099 | If String is NULL, then ASSERT().\r | |
| 1100 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
| 1101 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1102 | then ASSERT().\r | |
| 1103 | \r | |
| af2dc6a7 | 1104 | @param String The pointer to a Null-terminated ASCII string.\r |
| ac644614 | 1105 | \r |
| 1106 | @return The size of String.\r | |
| 1107 | \r | |
| 1108 | **/\r | |
| 1109 | UINTN\r | |
| 1110 | EFIAPI\r | |
| 1111 | AsciiStrSize (\r | |
| 1112 | IN CONST CHAR8 *String\r | |
| 1113 | );\r | |
| 1114 | \r | |
| 1115 | \r | |
| 1116 | /**\r | |
| 1117 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
| 1118 | between the first mismatched ASCII characters.\r | |
| 1119 | \r | |
| 1120 | This function compares the Null-terminated ASCII string FirstString to the\r | |
| 1121 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
| 1122 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
| 1123 | mismatched ASCII character in SecondString subtracted from the first\r | |
| 1124 | mismatched ASCII character in FirstString.\r | |
| 1125 | \r | |
| 1126 | If FirstString is NULL, then ASSERT().\r | |
| 1127 | If SecondString is NULL, then ASSERT().\r | |
| 1128 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
| 1129 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1130 | then ASSERT().\r | |
| 1131 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
| 1132 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
| 1133 | Null-terminator, then ASSERT().\r | |
| 1134 | \r | |
| af2dc6a7 | 1135 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
| 1136 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
| ac644614 | 1137 | \r |
| 17f695ed | 1138 | @retval ==0 FirstString is identical to SecondString.\r |
| 1139 | @retval !=0 FirstString is not identical to SecondString.\r | |
| ac644614 | 1140 | \r |
| 1141 | **/\r | |
| 1142 | INTN\r | |
| 1143 | EFIAPI\r | |
| 1144 | AsciiStrCmp (\r | |
| 1145 | IN CONST CHAR8 *FirstString,\r | |
| 1146 | IN CONST CHAR8 *SecondString\r | |
| 1147 | );\r | |
| 1148 | \r | |
| 1149 | \r | |
| 1150 | /**\r | |
| 1151 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
| 1152 | and returns the difference between the first mismatched ASCII characters.\r | |
| 1153 | \r | |
| 1154 | This function performs a case insensitive comparison of the Null-terminated\r | |
| 1155 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
| 1156 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
| 1157 | value returned is the first mismatched lower case ASCII character in\r | |
| 1158 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
| 1159 | in FirstString.\r | |
| 1160 | \r | |
| 1161 | If FirstString is NULL, then ASSERT().\r | |
| 1162 | If SecondString is NULL, then ASSERT().\r | |
| 1163 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
| 1164 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1165 | then ASSERT().\r | |
| 1166 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
| 1167 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
| 1168 | Null-terminator, then ASSERT().\r | |
| 1169 | \r | |
| af2dc6a7 | 1170 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
| 1171 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
| ac644614 | 1172 | \r |
| 17f695ed | 1173 | @retval ==0 FirstString is identical to SecondString using case insensitive\r |
| 1106ffe1 | 1174 | comparisons.\r |
| 17f695ed | 1175 | @retval !=0 FirstString is not identical to SecondString using case\r |
| 1106ffe1 | 1176 | insensitive comparisons.\r |
| ac644614 | 1177 | \r |
| 1178 | **/\r | |
| 1179 | INTN\r | |
| 1180 | EFIAPI\r | |
| 1181 | AsciiStriCmp (\r | |
| 1182 | IN CONST CHAR8 *FirstString,\r | |
| 1183 | IN CONST CHAR8 *SecondString\r | |
| 1184 | );\r | |
| 1185 | \r | |
| 1186 | \r | |
| 1187 | /**\r | |
| 1188 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
| 1189 | the difference between the first mismatched ASCII characters.\r | |
| 1190 | \r | |
| 1191 | This function compares the Null-terminated ASCII string FirstString to the\r | |
| 1192 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
| 1193 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
| 1194 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
| 1195 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
| 1196 | first mismatched ASCII character in FirstString.\r | |
| 1197 | \r | |
| 1198 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
| 1199 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
| 50c247fd | 1200 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
| 1201 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
| 1202 | If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r | |
| 1203 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
| ac644614 | 1204 | then ASSERT().\r |
| 50c247fd | 1205 | If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r |
| 1206 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
| ac644614 | 1207 | then ASSERT().\r |
| 1208 | \r | |
| af2dc6a7 | 1209 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
| 1210 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
| 1211 | @param Length The maximum number of ASCII characters for compare.\r | |
| ac644614 | 1212 | \r |
| 17f695ed | 1213 | @retval ==0 FirstString is identical to SecondString.\r |
| 1214 | @retval !=0 FirstString is not identical to SecondString.\r | |
| ac644614 | 1215 | \r |
| 1216 | **/\r | |
| 1217 | INTN\r | |
| 1218 | EFIAPI\r | |
| 1219 | AsciiStrnCmp (\r | |
| 1220 | IN CONST CHAR8 *FirstString,\r | |
| 1221 | IN CONST CHAR8 *SecondString,\r | |
| 1222 | IN UINTN Length\r | |
| 1223 | );\r | |
| 1224 | \r | |
| 1225 | \r | |
| 1226 | /**\r | |
| 1227 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
| 1228 | ASCII string, and returns the concatenated ASCII string.\r | |
| 1229 | \r | |
| 1230 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
| 1231 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
| 1232 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
| 1233 | String is returned.\r | |
| 1234 | \r | |
| 1235 | If Destination is NULL, then ASSERT().\r | |
| 1236 | If Source is NULL, then ASSERT().\r | |
| 1237 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
| 1238 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1239 | then ASSERT().\r | |
| 1240 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
| 1241 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1242 | then ASSERT().\r | |
| 1243 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
| 1244 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
| 1245 | ASCII characters, then ASSERT().\r | |
| 1246 | \r | |
| af2dc6a7 | 1247 | @param Destination The pointer to a Null-terminated ASCII string.\r |
| 1248 | @param Source The pointer to a Null-terminated ASCII string.\r | |
| ac644614 | 1249 | \r |
| 1250 | @return Destination\r | |
| 1251 | \r | |
| 1252 | **/\r | |
| 1253 | CHAR8 *\r | |
| 1254 | EFIAPI\r | |
| 1255 | AsciiStrCat (\r | |
| 1256 | IN OUT CHAR8 *Destination,\r | |
| 1257 | IN CONST CHAR8 *Source\r | |
| 1258 | );\r | |
| 1259 | \r | |
| 1260 | \r | |
| 1261 | /**\r | |
| 17f695ed | 1262 | Concatenates up to a specified length one Null-terminated ASCII string to \r |
| 1263 | the end of another Null-terminated ASCII string, and returns the \r | |
| 1264 | concatenated ASCII string.\r | |
| ac644614 | 1265 | \r |
| 1266 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
| 1267 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
| 1268 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
| 1269 | Length ASCII characters are concatenated from Source to the end of\r | |
| 1270 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
| 1271 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
| 1272 | the results are undefined.\r | |
| 1273 | \r | |
| 1274 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
| 1275 | If Length > 0 and Source is NULL, then ASSERT().\r | |
| 1276 | If Source and Destination overlap, then ASSERT().\r | |
| 50c247fd | 1277 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r |
| 1278 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
| ac644614 | 1279 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
| 50c247fd | 1280 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
| ac644614 | 1281 | then ASSERT().\r |
| 1282 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
| 50c247fd | 1283 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
| ac644614 | 1284 | then ASSERT().\r |
| 1285 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
| 1286 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
| 50c247fd | 1287 | ASCII characters, not including the Null-terminator, then ASSERT().\r |
| ac644614 | 1288 | \r |
| af2dc6a7 | 1289 | @param Destination The pointer to a Null-terminated ASCII string.\r |
| 1290 | @param Source The pointer to a Null-terminated ASCII string.\r | |
| 1291 | @param Length The maximum number of ASCII characters to concatenate from\r | |
| ac644614 | 1292 | Source.\r |
| 1293 | \r | |
| 1294 | @return Destination\r | |
| 1295 | \r | |
| 1296 | **/\r | |
| 1297 | CHAR8 *\r | |
| 1298 | EFIAPI\r | |
| 1299 | AsciiStrnCat (\r | |
| 1300 | IN OUT CHAR8 *Destination,\r | |
| 1301 | IN CONST CHAR8 *Source,\r | |
| 1302 | IN UINTN Length\r | |
| 1303 | );\r | |
| 1304 | \r | |
| 1305 | \r | |
| 1306 | /**\r | |
| 9aa049d9 | 1307 | Returns the first occurrence of a Null-terminated ASCII sub-string\r |
| ac644614 | 1308 | in a Null-terminated ASCII string.\r |
| 1309 | \r | |
| 1310 | This function scans the contents of the ASCII string specified by String\r | |
| 1311 | and returns the first occurrence of SearchString. If SearchString is not\r | |
| 1312 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
| 1313 | then String is returned.\r | |
| 1314 | \r | |
| 1315 | If String is NULL, then ASSERT().\r | |
| 1316 | If SearchString is NULL, then ASSERT().\r | |
| 1317 | \r | |
| 1318 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r | |
| 1319 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
| 1320 | not including the Null-terminator, then ASSERT().\r | |
| 1321 | \r | |
| af2dc6a7 | 1322 | @param String The pointer to a Null-terminated ASCII string.\r |
| 1323 | @param SearchString The pointer to a Null-terminated ASCII string to search for.\r | |
| ac644614 | 1324 | \r |
| 1325 | @retval NULL If the SearchString does not appear in String.\r | |
| 17f695ed | 1326 | @retval others If there is a match return the first occurrence of SearchingString.\r |
| 9aa049d9 | 1327 | If the length of SearchString is zero,return String.\r |
| ac644614 | 1328 | \r |
| 1329 | **/\r | |
| 1330 | CHAR8 *\r | |
| 1331 | EFIAPI\r | |
| 1332 | AsciiStrStr (\r | |
| 17f695ed | 1333 | IN CONST CHAR8 *String,\r |
| 1334 | IN CONST CHAR8 *SearchString\r | |
| ac644614 | 1335 | );\r |
| 1336 | \r | |
| 1337 | \r | |
| 1338 | /**\r | |
| 1339 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
| 1340 | UINTN.\r | |
| 1341 | \r | |
| 1342 | This function returns a value of type UINTN by interpreting the contents\r | |
| 1343 | of the ASCII string String as a decimal number. The format of the input\r | |
| 1344 | ASCII string String is:\r | |
| 1345 | \r | |
| 1346 | [spaces] [decimal digits].\r | |
| 1347 | \r | |
| 1348 | The valid decimal digit character is in the range [0-9]. The function will\r | |
| 1349 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
| 1350 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
| 1351 | function stops at the first character that is a not a valid decimal character or\r | |
| 1352 | Null-terminator, whichever on comes first.\r | |
| 1353 | \r | |
| 1354 | If String has only pad spaces, then 0 is returned.\r | |
| 1355 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
| 1356 | If the number represented by String overflows according to the range defined by\r | |
| 1357 | UINTN, then ASSERT().\r | |
| 1358 | If String is NULL, then ASSERT().\r | |
| 1359 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
| 1360 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1361 | then ASSERT().\r | |
| 1362 | \r | |
| af2dc6a7 | 1363 | @param String The pointer to a Null-terminated ASCII string.\r |
| ac644614 | 1364 | \r |
| af2dc6a7 | 1365 | @retval The value translated from String.\r |
| ac644614 | 1366 | \r |
| 1367 | **/\r | |
| 1368 | UINTN\r | |
| 1369 | EFIAPI\r | |
| 1370 | AsciiStrDecimalToUintn (\r | |
| 1371 | IN CONST CHAR8 *String\r | |
| 1372 | );\r | |
| 1373 | \r | |
| 1374 | \r | |
| 1375 | /**\r | |
| 1376 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
| 1377 | UINT64.\r | |
| 1378 | \r | |
| 1379 | This function returns a value of type UINT64 by interpreting the contents\r | |
| 1380 | of the ASCII string String as a decimal number. The format of the input\r | |
| 1381 | ASCII string String is:\r | |
| 1382 | \r | |
| 1383 | [spaces] [decimal digits].\r | |
| 1384 | \r | |
| 1385 | The valid decimal digit character is in the range [0-9]. The function will\r | |
| 1386 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
| 1387 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
| 1388 | function stops at the first character that is a not a valid decimal character or\r | |
| 1389 | Null-terminator, whichever on comes first.\r | |
| 1390 | \r | |
| 1391 | If String has only pad spaces, then 0 is returned.\r | |
| 1392 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
| 1393 | If the number represented by String overflows according to the range defined by\r | |
| 1394 | UINT64, then ASSERT().\r | |
| 1395 | If String is NULL, then ASSERT().\r | |
| 1396 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
| 1397 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1398 | then ASSERT().\r | |
| 1399 | \r | |
| af2dc6a7 | 1400 | @param String The pointer to a Null-terminated ASCII string.\r |
| ac644614 | 1401 | \r |
| 38bbd3d9 | 1402 | @retval Value translated from String.\r |
| ac644614 | 1403 | \r |
| 1404 | **/\r | |
| 1405 | UINT64\r | |
| 1406 | EFIAPI\r | |
| 1407 | AsciiStrDecimalToUint64 (\r | |
| 17f695ed | 1408 | IN CONST CHAR8 *String\r |
| ac644614 | 1409 | );\r |
| 1410 | \r | |
| 1411 | \r | |
| 1412 | /**\r | |
| 1413 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
| 1414 | \r | |
| 1415 | This function returns a value of type UINTN by interpreting the contents of\r | |
| 1416 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
| 1417 | string String is:\r | |
| 1418 | \r | |
| 1419 | [spaces][zeros][x][hexadecimal digits].\r | |
| 1420 | \r | |
| 1421 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
| 1422 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
| 1423 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
| 1424 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
| 1425 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
| 1426 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
| 1427 | digit. Then, the function stops at the first character that is a not a valid\r | |
| 1428 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
| 1429 | \r | |
| 1430 | If String has only pad spaces, then 0 is returned.\r | |
| 1431 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
| 1432 | 0 is returned.\r | |
| 1433 | \r | |
| 1434 | If the number represented by String overflows according to the range defined by UINTN,\r | |
| 1435 | then ASSERT().\r | |
| 1436 | If String is NULL, then ASSERT().\r | |
| 1437 | If PcdMaximumAsciiStringLength is not zero,\r | |
| 1438 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
| 1439 | the Null-terminator, then ASSERT().\r | |
| 1440 | \r | |
| af2dc6a7 | 1441 | @param String The pointer to a Null-terminated ASCII string.\r |
| ac644614 | 1442 | \r |
| 38bbd3d9 | 1443 | @retval Value translated from String.\r |
| ac644614 | 1444 | \r |
| 1445 | **/\r | |
| 1446 | UINTN\r | |
| 1447 | EFIAPI\r | |
| 1448 | AsciiStrHexToUintn (\r | |
| 17f695ed | 1449 | IN CONST CHAR8 *String\r |
| ac644614 | 1450 | );\r |
| 1451 | \r | |
| 1452 | \r | |
| 1453 | /**\r | |
| 1454 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
| 1455 | \r | |
| 1456 | This function returns a value of type UINT64 by interpreting the contents of\r | |
| 1457 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
| 1458 | string String is:\r | |
| 1459 | \r | |
| 1460 | [spaces][zeros][x][hexadecimal digits].\r | |
| 1461 | \r | |
| 1462 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
| 1463 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
| 1464 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
| 1465 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
| 1466 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
| 1467 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
| 1468 | digit. Then, the function stops at the first character that is a not a valid\r | |
| 1469 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
| 1470 | \r | |
| 1471 | If String has only pad spaces, then 0 is returned.\r | |
| 1472 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
| 1473 | 0 is returned.\r | |
| 1474 | \r | |
| 1475 | If the number represented by String overflows according to the range defined by UINT64,\r | |
| 1476 | then ASSERT().\r | |
| 1477 | If String is NULL, then ASSERT().\r | |
| 1478 | If PcdMaximumAsciiStringLength is not zero,\r | |
| 1479 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
| 1480 | the Null-terminator, then ASSERT().\r | |
| 1481 | \r | |
| af2dc6a7 | 1482 | @param String The pointer to a Null-terminated ASCII string.\r |
| ac644614 | 1483 | \r |
| 38bbd3d9 | 1484 | @retval Value translated from String.\r |
| ac644614 | 1485 | \r |
| 1486 | **/\r | |
| 1487 | UINT64\r | |
| 1488 | EFIAPI\r | |
| 1489 | AsciiStrHexToUint64 (\r | |
| 17f695ed | 1490 | IN CONST CHAR8 *String\r |
| ac644614 | 1491 | );\r |
| 1492 | \r | |
| 1493 | \r | |
| 1494 | /**\r | |
| 1495 | Convert one Null-terminated ASCII string to a Null-terminated\r | |
| 1496 | Unicode string and returns the Unicode string.\r | |
| 1497 | \r | |
| 1498 | This function converts the contents of the ASCII string Source to the Unicode\r | |
| 1499 | string Destination, and returns Destination. The function terminates the\r | |
| 1500 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
| 1501 | The caller is responsible to make sure Destination points to a buffer with size\r | |
| 1502 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r | |
| 1503 | \r | |
| 1504 | If Destination is NULL, then ASSERT().\r | |
| 1505 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 1506 | If Source is NULL, then ASSERT().\r | |
| 1507 | If Source and Destination overlap, then ASSERT().\r | |
| 1508 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
| 1509 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
| 1510 | then ASSERT().\r | |
| 1511 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
| 1512 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
| 1513 | Null-terminator, then ASSERT().\r | |
| 1514 | \r | |
| af2dc6a7 | 1515 | @param Source The pointer to a Null-terminated ASCII string.\r |
| 1516 | @param Destination The pointer to a Null-terminated Unicode string.\r | |
| ac644614 | 1517 | \r |
| 9aa049d9 | 1518 | @return Destination.\r |
| ac644614 | 1519 | \r |
| 1520 | **/\r | |
| 1521 | CHAR16 *\r | |
| 1522 | EFIAPI\r | |
| 1523 | AsciiStrToUnicodeStr (\r | |
| 17f695ed | 1524 | IN CONST CHAR8 *Source,\r |
| 1525 | OUT CHAR16 *Destination\r | |
| ac644614 | 1526 | );\r |
| 1527 | \r | |
| 1528 | \r | |
| 1529 | /**\r | |
| 1530 | Converts an 8-bit value to an 8-bit BCD value.\r | |
| 1531 | \r | |
| 1532 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
| 1533 | returned.\r | |
| 1534 | \r | |
| 1535 | If Value >= 100, then ASSERT().\r | |
| 1536 | \r | |
| 1537 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
| 1538 | \r | |
| 9aa049d9 | 1539 | @return The BCD value.\r |
| ac644614 | 1540 | \r |
| 1541 | **/\r | |
| 1542 | UINT8\r | |
| 1543 | EFIAPI\r | |
| 1544 | DecimalToBcd8 (\r | |
| 1545 | IN UINT8 Value\r | |
| 1546 | );\r | |
| 1547 | \r | |
| 1548 | \r | |
| 1549 | /**\r | |
| 1550 | Converts an 8-bit BCD value to an 8-bit value.\r | |
| 1551 | \r | |
| 1552 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
| 1553 | value is returned.\r | |
| 1554 | \r | |
| 1555 | If Value >= 0xA0, then ASSERT().\r | |
| 1556 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
| 1557 | \r | |
| 1558 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
| 1559 | \r | |
| 1560 | @return The 8-bit value is returned.\r | |
| 1561 | \r | |
| 1562 | **/\r | |
| 1563 | UINT8\r | |
| 1564 | EFIAPI\r | |
| 1565 | BcdToDecimal8 (\r | |
| 1566 | IN UINT8 Value\r | |
| 1567 | );\r | |
| 1568 | \r | |
| 1569 | \r | |
| 1570 | //\r | |
| 1571 | // Linked List Functions and Macros\r | |
| 1572 | //\r | |
| 1573 | \r | |
| 1574 | /**\r | |
| 1575 | Initializes the head node of a doubly linked list that is declared as a\r | |
| 1576 | global variable in a module.\r | |
| 1577 | \r | |
| 1578 | Initializes the forward and backward links of a new linked list. After\r | |
| 1579 | initializing a linked list with this macro, the other linked list functions\r | |
| 1580 | may be used to add and remove nodes from the linked list. This macro results\r | |
| 1581 | in smaller executables by initializing the linked list in the data section,\r | |
| 1582 | instead if calling the InitializeListHead() function to perform the\r | |
| 1583 | equivalent operation.\r | |
| 1584 | \r | |
| 77f863ee | 1585 | @param ListHead The head note of a list to initialize.\r |
| ac644614 | 1586 | \r |
| 1587 | **/\r | |
| 17f695ed | 1588 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r |
| ac644614 | 1589 | \r |
| 1590 | \r | |
| 1591 | /**\r | |
| 1592 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
| 1593 | the head node of the doubly linked list.\r | |
| 1594 | \r | |
| 1595 | Initializes the forward and backward links of a new linked list. After\r | |
| 1596 | initializing a linked list with this function, the other linked list\r | |
| 1597 | functions may be used to add and remove nodes from the linked list. It is up\r | |
| 1598 | to the caller of this function to allocate the memory for ListHead.\r | |
| 1599 | \r | |
| 1600 | If ListHead is NULL, then ASSERT().\r | |
| 1601 | \r | |
| 1602 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
| 1603 | \r | |
| 1604 | @return ListHead\r | |
| 1605 | \r | |
| 1606 | **/\r | |
| 1607 | LIST_ENTRY *\r | |
| 1608 | EFIAPI\r | |
| 1609 | InitializeListHead (\r | |
| aa0583c7 | 1610 | IN OUT LIST_ENTRY *ListHead\r |
| ac644614 | 1611 | );\r |
| 1612 | \r | |
| 1613 | \r | |
| 1614 | /**\r | |
| 1615 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
| 1616 | to the head node of the doubly linked list.\r | |
| 1617 | \r | |
| 1618 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
| 1619 | ListHead, and returns ListHead.\r | |
| 1620 | \r | |
| 1621 | If ListHead is NULL, then ASSERT().\r | |
| 1622 | If Entry is NULL, then ASSERT().\r | |
| 17f695ed | 1623 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
| 1624 | InitializeListHead(), then ASSERT().\r | |
| a71865b1 | 1625 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
| ac644614 | 1626 | of nodes in ListHead, including the ListHead node, is greater than or\r |
| 1627 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1628 | \r | |
| 1629 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
| 1630 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
| 1631 | of a doubly linked list.\r | |
| 1632 | \r | |
| 1633 | @return ListHead\r | |
| 1634 | \r | |
| 1635 | **/\r | |
| 1636 | LIST_ENTRY *\r | |
| 1637 | EFIAPI\r | |
| 1638 | InsertHeadList (\r | |
| aa0583c7 | 1639 | IN OUT LIST_ENTRY *ListHead,\r |
| 1640 | IN OUT LIST_ENTRY *Entry\r | |
| ac644614 | 1641 | );\r |
| 1642 | \r | |
| 1643 | \r | |
| 1644 | /**\r | |
| 1645 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
| 1646 | the head node of the doubly linked list.\r | |
| 1647 | \r | |
| 1648 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
| 1649 | and returns ListHead.\r | |
| 1650 | \r | |
| 1651 | If ListHead is NULL, then ASSERT().\r | |
| 1652 | If Entry is NULL, then ASSERT().\r | |
| 17f695ed | 1653 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
| 1654 | InitializeListHead(), then ASSERT().\r | |
| a71865b1 | 1655 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
| ac644614 | 1656 | of nodes in ListHead, including the ListHead node, is greater than or\r |
| 1657 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1658 | \r | |
| 1659 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
| 1660 | @param Entry A pointer to a node that is to be added at the end of the\r | |
| 1661 | doubly linked list.\r | |
| 1662 | \r | |
| 1663 | @return ListHead\r | |
| 1664 | \r | |
| 1665 | **/\r | |
| 1666 | LIST_ENTRY *\r | |
| 1667 | EFIAPI\r | |
| 1668 | InsertTailList (\r | |
| aa0583c7 | 1669 | IN OUT LIST_ENTRY *ListHead,\r |
| 1670 | IN OUT LIST_ENTRY *Entry\r | |
| ac644614 | 1671 | );\r |
| 1672 | \r | |
| 1673 | \r | |
| 1674 | /**\r | |
| 1675 | Retrieves the first node of a doubly linked list.\r | |
| 1676 | \r | |
| 17f695ed | 1677 | Returns the first node of a doubly linked list. List must have been \r |
| 1678 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r | |
| 1679 | If List is empty, then List is returned.\r | |
| ac644614 | 1680 | \r |
| 1681 | If List is NULL, then ASSERT().\r | |
| 17f695ed | 1682 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
| 1683 | InitializeListHead(), then ASSERT().\r | |
| a71865b1 | 1684 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
| ac644614 | 1685 | in List, including the List node, is greater than or equal to\r |
| 1686 | PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1687 | \r | |
| 1688 | @param List A pointer to the head node of a doubly linked list.\r | |
| 1689 | \r | |
| 1690 | @return The first node of a doubly linked list.\r | |
| e01a125f | 1691 | @retval List The list is empty.\r |
| ac644614 | 1692 | \r |
| 1693 | **/\r | |
| 1694 | LIST_ENTRY *\r | |
| 1695 | EFIAPI\r | |
| 1696 | GetFirstNode (\r | |
| 1697 | IN CONST LIST_ENTRY *List\r | |
| 1698 | );\r | |
| 1699 | \r | |
| 1700 | \r | |
| 1701 | /**\r | |
| 1702 | Retrieves the next node of a doubly linked list.\r | |
| 1703 | \r | |
| 17f695ed | 1704 | Returns the node of a doubly linked list that follows Node. \r |
| 1705 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
| 1706 | or InitializeListHead(). If List is empty, then List is returned.\r | |
| ac644614 | 1707 | \r |
| 1708 | If List is NULL, then ASSERT().\r | |
| 1709 | If Node is NULL, then ASSERT().\r | |
| 17f695ed | 1710 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
| 1711 | InitializeListHead(), then ASSERT().\r | |
| a71865b1 LG |
1712 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
| 1713 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
| 1081f624 | 1714 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
| ac644614 | 1715 | \r |
| 1716 | @param List A pointer to the head node of a doubly linked list.\r | |
| 1717 | @param Node A pointer to a node in the doubly linked list.\r | |
| 1718 | \r | |
| af2dc6a7 | 1719 | @return The pointer to the next node if one exists. Otherwise List is returned.\r |
| ac644614 | 1720 | \r |
| 1721 | **/\r | |
| 1722 | LIST_ENTRY *\r | |
| 1723 | EFIAPI\r | |
| 1724 | GetNextNode (\r | |
| 1725 | IN CONST LIST_ENTRY *List,\r | |
| 1726 | IN CONST LIST_ENTRY *Node\r | |
| 1727 | );\r | |
| 1728 | \r | |
| cbca8de5 | 1729 | \r |
| 1730 | /**\r | |
| 1731 | Retrieves the previous node of a doubly linked list.\r | |
| 1732 | \r | |
| 1733 | Returns the node of a doubly linked list that precedes Node. \r | |
| 1734 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
| 1735 | or InitializeListHead(). If List is empty, then List is returned.\r | |
| 1736 | \r | |
| 1737 | If List is NULL, then ASSERT().\r | |
| 1738 | If Node is NULL, then ASSERT().\r | |
| 1739 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r | |
| 1740 | InitializeListHead(), then ASSERT().\r | |
| a71865b1 LG |
1741 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
| 1742 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
| cbca8de5 | 1743 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
| 1744 | \r | |
| 1745 | @param List A pointer to the head node of a doubly linked list.\r | |
| 1746 | @param Node A pointer to a node in the doubly linked list.\r | |
| 1747 | \r | |
| af2dc6a7 | 1748 | @return The pointer to the previous node if one exists. Otherwise List is returned.\r |
| cbca8de5 | 1749 | \r |
| 1750 | **/\r | |
| 1751 | LIST_ENTRY *\r | |
| 1752 | EFIAPI\r | |
| 1753 | GetPreviousNode (\r | |
| 1754 | IN CONST LIST_ENTRY *List,\r | |
| 1755 | IN CONST LIST_ENTRY *Node\r | |
| 1756 | );\r | |
| ac644614 | 1757 | \r |
| cbca8de5 | 1758 | \r |
| ac644614 | 1759 | /**\r |
| 1760 | Checks to see if a doubly linked list is empty or not.\r | |
| 1761 | \r | |
| 1762 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
| 1763 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
| 1764 | \r | |
| 1765 | If ListHead is NULL, then ASSERT().\r | |
| 17f695ed | 1766 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
| 1767 | InitializeListHead(), then ASSERT().\r | |
| a71865b1 | 1768 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
| ac644614 | 1769 | in List, including the List node, is greater than or equal to\r |
| 1770 | PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1771 | \r | |
| 1772 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
| 1773 | \r | |
| 1774 | @retval TRUE The linked list is empty.\r | |
| 1775 | @retval FALSE The linked list is not empty.\r | |
| 1776 | \r | |
| 1777 | **/\r | |
| 1778 | BOOLEAN\r | |
| 1779 | EFIAPI\r | |
| 1780 | IsListEmpty (\r | |
| 1781 | IN CONST LIST_ENTRY *ListHead\r | |
| 1782 | );\r | |
| 1783 | \r | |
| 1784 | \r | |
| 1785 | /**\r | |
| aa0583c7 | 1786 | Determines if a node in a doubly linked list is the head node of a the same\r |
| 1787 | doubly linked list. This function is typically used to terminate a loop that\r | |
| 1788 | traverses all the nodes in a doubly linked list starting with the head node.\r | |
| ac644614 | 1789 | \r |
| aa0583c7 | 1790 | Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r |
| 1791 | nodes in the doubly linked list specified by List. List must have been\r | |
| 17f695ed | 1792 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
| ac644614 | 1793 | \r |
| 1794 | If List is NULL, then ASSERT().\r | |
| 1795 | If Node is NULL, then ASSERT().\r | |
| 17f695ed | 1796 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r |
| 1797 | then ASSERT().\r | |
| a71865b1 | 1798 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
| ac644614 | 1799 | in List, including the List node, is greater than or equal to\r |
| 1800 | PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1081f624 | 1801 | If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r |
| 1802 | to List, then ASSERT().\r | |
| ac644614 | 1803 | \r |
| 1804 | @param List A pointer to the head node of a doubly linked list.\r | |
| 1805 | @param Node A pointer to a node in the doubly linked list.\r | |
| 1806 | \r | |
| 1955808d LG |
1807 | @retval TRUE Node is the head of the doubly-linked list pointed by List.\r |
| 1808 | @retval FALSE Node is not the head of the doubly-linked list pointed by List.\r | |
| ac644614 | 1809 | \r |
| 1810 | **/\r | |
| 1811 | BOOLEAN\r | |
| 1812 | EFIAPI\r | |
| 1813 | IsNull (\r | |
| 1814 | IN CONST LIST_ENTRY *List,\r | |
| 1815 | IN CONST LIST_ENTRY *Node\r | |
| 1816 | );\r | |
| 1817 | \r | |
| 1818 | \r | |
| 1819 | /**\r | |
| 1820 | Determines if a node the last node in a doubly linked list.\r | |
| 1821 | \r | |
| 1822 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
| 1823 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
| 17f695ed | 1824 | INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
| ac644614 | 1825 | \r |
| 1826 | If List is NULL, then ASSERT().\r | |
| 1827 | If Node is NULL, then ASSERT().\r | |
| 17f695ed | 1828 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
| 1829 | InitializeListHead(), then ASSERT().\r | |
| a71865b1 | 1830 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
| ac644614 | 1831 | in List, including the List node, is greater than or equal to\r |
| 1832 | PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1081f624 | 1833 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
| ac644614 | 1834 | \r |
| 1835 | @param List A pointer to the head node of a doubly linked list.\r | |
| 1836 | @param Node A pointer to a node in the doubly linked list.\r | |
| 1837 | \r | |
| 1838 | @retval TRUE Node is the last node in the linked list.\r | |
| 1839 | @retval FALSE Node is not the last node in the linked list.\r | |
| 1840 | \r | |
| 1841 | **/\r | |
| 1842 | BOOLEAN\r | |
| 1843 | EFIAPI\r | |
| 1844 | IsNodeAtEnd (\r | |
| 1845 | IN CONST LIST_ENTRY *List,\r | |
| 1846 | IN CONST LIST_ENTRY *Node\r | |
| 1847 | );\r | |
| 1848 | \r | |
| 1849 | \r | |
| 1850 | /**\r | |
| 1851 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
| 1852 | first node after the swap.\r | |
| 1853 | \r | |
| 1854 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
| 1855 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
| 1856 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
| 1857 | same double linked list as FirstEntry and that double linked list must have\r | |
| 17f695ed | 1858 | been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r |
| 1859 | SecondEntry is returned after the nodes are swapped.\r | |
| ac644614 | 1860 | \r |
| 1861 | If FirstEntry is NULL, then ASSERT().\r | |
| 1862 | If SecondEntry is NULL, then ASSERT().\r | |
| 1081f624 | 1863 | If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r |
| 1864 | same linked list, then ASSERT().\r | |
| ac644614 | 1865 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
| 1866 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
| 1867 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
| 1868 | PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1869 | \r | |
| 1870 | @param FirstEntry A pointer to a node in a linked list.\r | |
| 1871 | @param SecondEntry A pointer to another node in the same linked list.\r | |
| 38bbd3d9 | 1872 | \r |
| 9aa049d9 | 1873 | @return SecondEntry.\r |
| ac644614 | 1874 | \r |
| 1875 | **/\r | |
| 1876 | LIST_ENTRY *\r | |
| 1877 | EFIAPI\r | |
| 1878 | SwapListEntries (\r | |
| aa0583c7 | 1879 | IN OUT LIST_ENTRY *FirstEntry,\r |
| 1880 | IN OUT LIST_ENTRY *SecondEntry\r | |
| ac644614 | 1881 | );\r |
| 1882 | \r | |
| 1883 | \r | |
| 1884 | /**\r | |
| 1885 | Removes a node from a doubly linked list, and returns the node that follows\r | |
| 1886 | the removed node.\r | |
| 1887 | \r | |
| 1888 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
| 1889 | this function to release the memory used by this node if that is required. On\r | |
| 1890 | exit, the node following Entry in the doubly linked list is returned. If\r | |
| 1891 | Entry is the only node in the linked list, then the head node of the linked\r | |
| 1892 | list is returned.\r | |
| 1893 | \r | |
| 1894 | If Entry is NULL, then ASSERT().\r | |
| 1895 | If Entry is the head node of an empty list, then ASSERT().\r | |
| 1896 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
| 1897 | linked list containing Entry, including the Entry node, is greater than\r | |
| 1898 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
| 1899 | \r | |
| 9aa049d9 | 1900 | @param Entry A pointer to a node in a linked list.\r |
| ac644614 | 1901 | \r |
| 9aa049d9 | 1902 | @return Entry.\r |
| ac644614 | 1903 | \r |
| 1904 | **/\r | |
| 1905 | LIST_ENTRY *\r | |
| 1906 | EFIAPI\r | |
| 1907 | RemoveEntryList (\r | |
| 1908 | IN CONST LIST_ENTRY *Entry\r | |
| 1909 | );\r | |
| 1910 | \r | |
| 1911 | //\r | |
| 1912 | // Math Services\r | |
| 1913 | //\r | |
| 1914 | \r | |
| 1915 | /**\r | |
| 1916 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
| 1917 | with zeros. The shifted value is returned.\r | |
| 1918 | \r | |
| 1919 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
| 1920 | low Count bits are set to zero. The shifted value is returned.\r | |
| 1921 | \r | |
| 1922 | If Count is greater than 63, then ASSERT().\r | |
| 1923 | \r | |
| 1924 | @param Operand The 64-bit operand to shift left.\r | |
| 1925 | @param Count The number of bits to shift left.\r | |
| 1926 | \r | |
| 9aa049d9 | 1927 | @return Operand << Count.\r |
| ac644614 | 1928 | \r |
| 1929 | **/\r | |
| 1930 | UINT64\r | |
| 1931 | EFIAPI\r | |
| 1932 | LShiftU64 (\r | |
| 1933 | IN UINT64 Operand,\r | |
| 1934 | IN UINTN Count\r | |
| 1935 | );\r | |
| 1936 | \r | |
| 1937 | \r | |
| 1938 | /**\r | |
| 1939 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
| 1940 | filled with zeros. The shifted value is returned.\r | |
| 1941 | \r | |
| 1942 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
| 1943 | high Count bits are set to zero. The shifted value is returned.\r | |
| 1944 | \r | |
| 1945 | If Count is greater than 63, then ASSERT().\r | |
| 1946 | \r | |
| 1947 | @param Operand The 64-bit operand to shift right.\r | |
| 1948 | @param Count The number of bits to shift right.\r | |
| 1949 | \r | |
| 1950 | @return Operand >> Count\r | |
| 1951 | \r | |
| 1952 | **/\r | |
| 1953 | UINT64\r | |
| 1954 | EFIAPI\r | |
| 1955 | RShiftU64 (\r | |
| 1956 | IN UINT64 Operand,\r | |
| 1957 | IN UINTN Count\r | |
| 1958 | );\r | |
| 1959 | \r | |
| 1960 | \r | |
| 1961 | /**\r | |
| 1962 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
| 1963 | with original integer's bit 63. The shifted value is returned.\r | |
| 1964 | \r | |
| 1965 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
| 1966 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
| 1967 | \r | |
| 1968 | If Count is greater than 63, then ASSERT().\r | |
| 1969 | \r | |
| 1970 | @param Operand The 64-bit operand to shift right.\r | |
| 1971 | @param Count The number of bits to shift right.\r | |
| 1972 | \r | |
| 1973 | @return Operand >> Count\r | |
| 1974 | \r | |
| 1975 | **/\r | |
| 1976 | UINT64\r | |
| 1977 | EFIAPI\r | |
| 1978 | ARShiftU64 (\r | |
| 1979 | IN UINT64 Operand,\r | |
| 1980 | IN UINTN Count\r | |
| 1981 | );\r | |
| 1982 | \r | |
| 1983 | \r | |
| 1984 | /**\r | |
| 1985 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
| 1986 | with the high bits that were rotated.\r | |
| 1987 | \r | |
| 1988 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
| 1989 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
| 1990 | value is returned.\r | |
| 1991 | \r | |
| 1992 | If Count is greater than 31, then ASSERT().\r | |
| 1993 | \r | |
| 1994 | @param Operand The 32-bit operand to rotate left.\r | |
| 1995 | @param Count The number of bits to rotate left.\r | |
| 1996 | \r | |
| 17f695ed | 1997 | @return Operand << Count\r |
| ac644614 | 1998 | \r |
| 1999 | **/\r | |
| 2000 | UINT32\r | |
| 2001 | EFIAPI\r | |
| 2002 | LRotU32 (\r | |
| 2003 | IN UINT32 Operand,\r | |
| 2004 | IN UINTN Count\r | |
| 2005 | );\r | |
| 2006 | \r | |
| 2007 | \r | |
| 2008 | /**\r | |
| 2009 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
| 2010 | with the low bits that were rotated.\r | |
| 2011 | \r | |
| 2012 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
| 2013 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
| 2014 | value is returned.\r | |
| 2015 | \r | |
| 2016 | If Count is greater than 31, then ASSERT().\r | |
| 2017 | \r | |
| 2018 | @param Operand The 32-bit operand to rotate right.\r | |
| 2019 | @param Count The number of bits to rotate right.\r | |
| 2020 | \r | |
| 2fe241a2 | 2021 | @return Operand >> Count\r |
| ac644614 | 2022 | \r |
| 2023 | **/\r | |
| 2024 | UINT32\r | |
| 2025 | EFIAPI\r | |
| 2026 | RRotU32 (\r | |
| 2027 | IN UINT32 Operand,\r | |
| 2028 | IN UINTN Count\r | |
| 2029 | );\r | |
| 2030 | \r | |
| 2031 | \r | |
| 2032 | /**\r | |
| 2033 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
| 2034 | with the high bits that were rotated.\r | |
| 2035 | \r | |
| 2036 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
| 2037 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
| 2038 | value is returned.\r | |
| 2039 | \r | |
| 2040 | If Count is greater than 63, then ASSERT().\r | |
| 2041 | \r | |
| 2042 | @param Operand The 64-bit operand to rotate left.\r | |
| 2043 | @param Count The number of bits to rotate left.\r | |
| 2044 | \r | |
| 17f695ed | 2045 | @return Operand << Count\r |
| ac644614 | 2046 | \r |
| 2047 | **/\r | |
| 2048 | UINT64\r | |
| 2049 | EFIAPI\r | |
| 2050 | LRotU64 (\r | |
| 2051 | IN UINT64 Operand,\r | |
| 2052 | IN UINTN Count\r | |
| 2053 | );\r | |
| 2054 | \r | |
| 2055 | \r | |
| 2056 | /**\r | |
| 2057 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
| 2058 | with the high low bits that were rotated.\r | |
| 2059 | \r | |
| 2060 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
| 2061 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
| 2062 | value is returned.\r | |
| 2063 | \r | |
| 2064 | If Count is greater than 63, then ASSERT().\r | |
| 2065 | \r | |
| 2066 | @param Operand The 64-bit operand to rotate right.\r | |
| 2067 | @param Count The number of bits to rotate right.\r | |
| 2068 | \r | |
| 17f695ed | 2069 | @return Operand >> Count\r |
| ac644614 | 2070 | \r |
| 2071 | **/\r | |
| 2072 | UINT64\r | |
| 2073 | EFIAPI\r | |
| 2074 | RRotU64 (\r | |
| 2075 | IN UINT64 Operand,\r | |
| 2076 | IN UINTN Count\r | |
| 2077 | );\r | |
| 2078 | \r | |
| 2079 | \r | |
| 2080 | /**\r | |
| 2081 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
| 2082 | \r | |
| 2083 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
| 2084 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
| 2085 | Otherwise, a value between 0 and 31 is returned.\r | |
| 2086 | \r | |
| 2087 | @param Operand The 32-bit operand to evaluate.\r | |
| 2088 | \r | |
| 9aa049d9 | 2089 | @retval 0..31 The lowest bit set in Operand was found.\r |
| 17f695ed | 2090 | @retval -1 Operand is zero.\r |
| ac644614 | 2091 | \r |
| 2092 | **/\r | |
| 2093 | INTN\r | |
| 2094 | EFIAPI\r | |
| 2095 | LowBitSet32 (\r | |
| 2096 | IN UINT32 Operand\r | |
| 2097 | );\r | |
| 2098 | \r | |
| 2099 | \r | |
| 2100 | /**\r | |
| 2101 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
| 2102 | \r | |
| 2103 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
| 2104 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
| 2105 | Otherwise, a value between 0 and 63 is returned.\r | |
| 2106 | \r | |
| 2107 | @param Operand The 64-bit operand to evaluate.\r | |
| 2108 | \r | |
| 9aa049d9 | 2109 | @retval 0..63 The lowest bit set in Operand was found.\r |
| 17f695ed | 2110 | @retval -1 Operand is zero.\r |
| 2111 | \r | |
| ac644614 | 2112 | \r |
| 2113 | **/\r | |
| 2114 | INTN\r | |
| 2115 | EFIAPI\r | |
| 2116 | LowBitSet64 (\r | |
| 2117 | IN UINT64 Operand\r | |
| 2118 | );\r | |
| 2119 | \r | |
| 2120 | \r | |
| 2121 | /**\r | |
| 2122 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
| 2123 | to log2(x).\r | |
| 2124 | \r | |
| 2125 | This function computes the bit position of the highest bit set in the 32-bit\r | |
| 2126 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
| 2127 | Otherwise, a value between 0 and 31 is returned.\r | |
| 2128 | \r | |
| 2129 | @param Operand The 32-bit operand to evaluate.\r | |
| 2130 | \r | |
| 9aa049d9 | 2131 | @retval 0..31 Position of the highest bit set in Operand if found.\r |
| 17f695ed | 2132 | @retval -1 Operand is zero.\r |
| ac644614 | 2133 | \r |
| 2134 | **/\r | |
| 2135 | INTN\r | |
| 2136 | EFIAPI\r | |
| 2137 | HighBitSet32 (\r | |
| 2138 | IN UINT32 Operand\r | |
| 2139 | );\r | |
| 2140 | \r | |
| 2141 | \r | |
| 2142 | /**\r | |
| 2143 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
| 2144 | to log2(x).\r | |
| 2145 | \r | |
| 2146 | This function computes the bit position of the highest bit set in the 64-bit\r | |
| 2147 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
| 2148 | Otherwise, a value between 0 and 63 is returned.\r | |
| 2149 | \r | |
| 2150 | @param Operand The 64-bit operand to evaluate.\r | |
| 2151 | \r | |
| 9aa049d9 | 2152 | @retval 0..63 Position of the highest bit set in Operand if found.\r |
| 17f695ed | 2153 | @retval -1 Operand is zero.\r |
| ac644614 | 2154 | \r |
| 2155 | **/\r | |
| 2156 | INTN\r | |
| 2157 | EFIAPI\r | |
| 2158 | HighBitSet64 (\r | |
| 2159 | IN UINT64 Operand\r | |
| 2160 | );\r | |
| 2161 | \r | |
| 2162 | \r | |
| 2163 | /**\r | |
| 2164 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
| 17f695ed | 2165 | 1 << log2(x).\r |
| ac644614 | 2166 | \r |
| 2167 | This function computes the value of the highest bit set in the 32-bit value\r | |
| 2168 | specified by Operand. If Operand is zero, then zero is returned.\r | |
| 2169 | \r | |
| 2170 | @param Operand The 32-bit operand to evaluate.\r | |
| 2171 | \r | |
| 2172 | @return 1 << HighBitSet32(Operand)\r | |
| 2173 | @retval 0 Operand is zero.\r | |
| 2174 | \r | |
| 2175 | **/\r | |
| 2176 | UINT32\r | |
| 2177 | EFIAPI\r | |
| 2178 | GetPowerOfTwo32 (\r | |
| 2179 | IN UINT32 Operand\r | |
| 2180 | );\r | |
| 2181 | \r | |
| 2182 | \r | |
| 2183 | /**\r | |
| 2184 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
| 17f695ed | 2185 | 1 << log2(x).\r |
| ac644614 | 2186 | \r |
| 2187 | This function computes the value of the highest bit set in the 64-bit value\r | |
| 2188 | specified by Operand. If Operand is zero, then zero is returned.\r | |
| 2189 | \r | |
| 2190 | @param Operand The 64-bit operand to evaluate.\r | |
| 2191 | \r | |
| 2192 | @return 1 << HighBitSet64(Operand)\r | |
| 2193 | @retval 0 Operand is zero.\r | |
| 2194 | \r | |
| 2195 | **/\r | |
| 2196 | UINT64\r | |
| 2197 | EFIAPI\r | |
| 2198 | GetPowerOfTwo64 (\r | |
| 2199 | IN UINT64 Operand\r | |
| 2200 | );\r | |
| 2201 | \r | |
| 2202 | \r | |
| 2203 | /**\r | |
| af2dc6a7 | 2204 | Switches the endianness of a 16-bit integer.\r |
| ac644614 | 2205 | \r |
| 2206 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
| 2207 | from little endian to big endian or vice versa. The byte swapped value is\r | |
| 2208 | returned.\r | |
| 2209 | \r | |
| 2a53dabf | 2210 | @param Value A 16-bit unsigned value.\r |
| ac644614 | 2211 | \r |
| efb23117 | 2212 | @return The byte swapped Value.\r |
| ac644614 | 2213 | \r |
| 2214 | **/\r | |
| 2215 | UINT16\r | |
| 2216 | EFIAPI\r | |
| 2217 | SwapBytes16 (\r | |
| 2218 | IN UINT16 Value\r | |
| 2219 | );\r | |
| 2220 | \r | |
| 2221 | \r | |
| 2222 | /**\r | |
| af2dc6a7 | 2223 | Switches the endianness of a 32-bit integer.\r |
| ac644614 | 2224 | \r |
| 2225 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
| 2226 | from little endian to big endian or vice versa. The byte swapped value is\r | |
| 2227 | returned.\r | |
| 2228 | \r | |
| 2a53dabf | 2229 | @param Value A 32-bit unsigned value.\r |
| ac644614 | 2230 | \r |
| efb23117 | 2231 | @return The byte swapped Value.\r |
| ac644614 | 2232 | \r |
| 2233 | **/\r | |
| 2234 | UINT32\r | |
| 2235 | EFIAPI\r | |
| 2236 | SwapBytes32 (\r | |
| 2237 | IN UINT32 Value\r | |
| 2238 | );\r | |
| 2239 | \r | |
| 2240 | \r | |
| 2241 | /**\r | |
| af2dc6a7 | 2242 | Switches the endianness of a 64-bit integer.\r |
| ac644614 | 2243 | \r |
| 2244 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
| 2245 | from little endian to big endian or vice versa. The byte swapped value is\r | |
| 2246 | returned.\r | |
| 2247 | \r | |
| 2a53dabf | 2248 | @param Value A 64-bit unsigned value.\r |
| ac644614 | 2249 | \r |
| efb23117 | 2250 | @return The byte swapped Value.\r |
| ac644614 | 2251 | \r |
| 2252 | **/\r | |
| 2253 | UINT64\r | |
| 2254 | EFIAPI\r | |
| 2255 | SwapBytes64 (\r | |
| 2256 | IN UINT64 Value\r | |
| 2257 | );\r | |
| 2258 | \r | |
| 2259 | \r | |
| 2260 | /**\r | |
| 2261 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
| 2262 | generates a 64-bit unsigned result.\r | |
| 2263 | \r | |
| 2264 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
| 2265 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
| 2266 | bit unsigned result is returned.\r | |
| 2267 | \r | |
| ac644614 | 2268 | @param Multiplicand A 64-bit unsigned value.\r |
| 2269 | @param Multiplier A 32-bit unsigned value.\r | |
| 2270 | \r | |
| 2271 | @return Multiplicand * Multiplier\r | |
| 2272 | \r | |
| 2273 | **/\r | |
| 2274 | UINT64\r | |
| 2275 | EFIAPI\r | |
| 2276 | MultU64x32 (\r | |
| 2277 | IN UINT64 Multiplicand,\r | |
| 2278 | IN UINT32 Multiplier\r | |
| 2279 | );\r | |
| 2280 | \r | |
| 2281 | \r | |
| 2282 | /**\r | |
| 2283 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
| 2284 | generates a 64-bit unsigned result.\r | |
| 2285 | \r | |
| 2286 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
| 2287 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
| 2288 | bit unsigned result is returned.\r | |
| 2289 | \r | |
| ac644614 | 2290 | @param Multiplicand A 64-bit unsigned value.\r |
| 2291 | @param Multiplier A 64-bit unsigned value.\r | |
| 2292 | \r | |
| af2dc6a7 | 2293 | @return Multiplicand * Multiplier.\r |
| ac644614 | 2294 | \r |
| 2295 | **/\r | |
| 2296 | UINT64\r | |
| 2297 | EFIAPI\r | |
| 2298 | MultU64x64 (\r | |
| 2299 | IN UINT64 Multiplicand,\r | |
| 2300 | IN UINT64 Multiplier\r | |
| 2301 | );\r | |
| 2302 | \r | |
| 2303 | \r | |
| 2304 | /**\r | |
| 2305 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
| 2306 | 64-bit signed result.\r | |
| 2307 | \r | |
| 2308 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
| 2309 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
| 2310 | signed result is returned.\r | |
| 2311 | \r | |
| ac644614 | 2312 | @param Multiplicand A 64-bit signed value.\r |
| 2313 | @param Multiplier A 64-bit signed value.\r | |
| 2314 | \r | |
| 2315 | @return Multiplicand * Multiplier\r | |
| 2316 | \r | |
| 2317 | **/\r | |
| 2318 | INT64\r | |
| 2319 | EFIAPI\r | |
| 2320 | MultS64x64 (\r | |
| 2321 | IN INT64 Multiplicand,\r | |
| 2322 | IN INT64 Multiplier\r | |
| 2323 | );\r | |
| 2324 | \r | |
| 2325 | \r | |
| 2326 | /**\r | |
| 2327 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
| 2328 | a 64-bit unsigned result.\r | |
| 2329 | \r | |
| 2330 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
| 2331 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
| 2332 | function returns the 64-bit unsigned quotient.\r | |
| 2333 | \r | |
| 2334 | If Divisor is 0, then ASSERT().\r | |
| 2335 | \r | |
| 2336 | @param Dividend A 64-bit unsigned value.\r | |
| 2337 | @param Divisor A 32-bit unsigned value.\r | |
| 2338 | \r | |
| af2dc6a7 | 2339 | @return Dividend / Divisor.\r |
| ac644614 | 2340 | \r |
| 2341 | **/\r | |
| 2342 | UINT64\r | |
| 2343 | EFIAPI\r | |
| 2344 | DivU64x32 (\r | |
| 2345 | IN UINT64 Dividend,\r | |
| 2346 | IN UINT32 Divisor\r | |
| 2347 | );\r | |
| 2348 | \r | |
| 2349 | \r | |
| 2350 | /**\r | |
| 2351 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
| 2352 | a 32-bit unsigned remainder.\r | |
| 2353 | \r | |
| 2354 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
| 2355 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
| 2356 | returns the 32-bit unsigned remainder.\r | |
| 2357 | \r | |
| 2358 | If Divisor is 0, then ASSERT().\r | |
| 2359 | \r | |
| 2360 | @param Dividend A 64-bit unsigned value.\r | |
| 2361 | @param Divisor A 32-bit unsigned value.\r | |
| 2362 | \r | |
| af2dc6a7 | 2363 | @return Dividend % Divisor.\r |
| ac644614 | 2364 | \r |
| 2365 | **/\r | |
| 2366 | UINT32\r | |
| 2367 | EFIAPI\r | |
| 2368 | ModU64x32 (\r | |
| 2369 | IN UINT64 Dividend,\r | |
| 2370 | IN UINT32 Divisor\r | |
| 2371 | );\r | |
| 2372 | \r | |
| 2373 | \r | |
| 2374 | /**\r | |
| 2375 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
| 2376 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
| 2377 | \r | |
| 2378 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
| 2379 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
| 2380 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
| 2381 | This function returns the 64-bit unsigned quotient.\r | |
| 2382 | \r | |
| 2383 | If Divisor is 0, then ASSERT().\r | |
| 2384 | \r | |
| 2385 | @param Dividend A 64-bit unsigned value.\r | |
| 2386 | @param Divisor A 32-bit unsigned value.\r | |
| 2387 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
| 2388 | optional and may be NULL.\r | |
| 2389 | \r | |
| af2dc6a7 | 2390 | @return Dividend / Divisor.\r |
| ac644614 | 2391 | \r |
| 2392 | **/\r | |
| 2393 | UINT64\r | |
| 2394 | EFIAPI\r | |
| 2395 | DivU64x32Remainder (\r | |
| 2396 | IN UINT64 Dividend,\r | |
| 2397 | IN UINT32 Divisor,\r | |
| 2398 | OUT UINT32 *Remainder OPTIONAL\r | |
| 2399 | );\r | |
| 2400 | \r | |
| 2401 | \r | |
| 2402 | /**\r | |
| 2403 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
| 2404 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
| 2405 | \r | |
| 2406 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
| 2407 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
| 2408 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
| 2409 | This function returns the 64-bit unsigned quotient.\r | |
| 2410 | \r | |
| 2411 | If Divisor is 0, then ASSERT().\r | |
| 2412 | \r | |
| 2413 | @param Dividend A 64-bit unsigned value.\r | |
| 2414 | @param Divisor A 64-bit unsigned value.\r | |
| 2415 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
| 2416 | optional and may be NULL.\r | |
| 2417 | \r | |
| af2dc6a7 | 2418 | @return Dividend / Divisor.\r |
| ac644614 | 2419 | \r |
| 2420 | **/\r | |
| 2421 | UINT64\r | |
| 2422 | EFIAPI\r | |
| 2423 | DivU64x64Remainder (\r | |
| 2424 | IN UINT64 Dividend,\r | |
| 2425 | IN UINT64 Divisor,\r | |
| 2426 | OUT UINT64 *Remainder OPTIONAL\r | |
| 2427 | );\r | |
| 2428 | \r | |
| 2429 | \r | |
| 2430 | /**\r | |
| 2431 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
| 2432 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
| 2433 | \r | |
| 2434 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
| 2435 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
| 2436 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
| 2437 | function returns the 64-bit signed quotient.\r | |
| 2438 | \r | |
| 9aa049d9 | 2439 | It is the caller's responsibility to not call this function with a Divisor of 0.\r |
| 17f695ed | 2440 | If Divisor is 0, then the quotient and remainder should be assumed to be \r |
| 2441 | the largest negative integer.\r | |
| 2442 | \r | |
| ac644614 | 2443 | If Divisor is 0, then ASSERT().\r |
| 2444 | \r | |
| 2445 | @param Dividend A 64-bit signed value.\r | |
| 2446 | @param Divisor A 64-bit signed value.\r | |
| 2447 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
| 2448 | optional and may be NULL.\r | |
| 2449 | \r | |
| af2dc6a7 | 2450 | @return Dividend / Divisor.\r |
| ac644614 | 2451 | \r |
| 2452 | **/\r | |
| 2453 | INT64\r | |
| 2454 | EFIAPI\r | |
| 2455 | DivS64x64Remainder (\r | |
| 2456 | IN INT64 Dividend,\r | |
| 2457 | IN INT64 Divisor,\r | |
| 2458 | OUT INT64 *Remainder OPTIONAL\r | |
| 2459 | );\r | |
| 2460 | \r | |
| 2461 | \r | |
| 2462 | /**\r | |
| 2463 | Reads a 16-bit value from memory that may be unaligned.\r | |
| 2464 | \r | |
| 2465 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
| 2466 | guarantees that the read operation does not produce an alignment fault.\r | |
| 2467 | \r | |
| 2468 | If the Buffer is NULL, then ASSERT().\r | |
| 2469 | \r | |
| af2dc6a7 | 2470 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
| ac644614 | 2471 | \r |
| 5385a579 | 2472 | @return The 16-bit value read from Buffer.\r |
| ac644614 | 2473 | \r |
| 2474 | **/\r | |
| 2475 | UINT16\r | |
| 2476 | EFIAPI\r | |
| 2477 | ReadUnaligned16 (\r | |
| 5385a579 | 2478 | IN CONST UINT16 *Buffer\r |
| ac644614 | 2479 | );\r |
| 2480 | \r | |
| 2481 | \r | |
| 2482 | /**\r | |
| 2483 | Writes a 16-bit value to memory that may be unaligned.\r | |
| 2484 | \r | |
| 2485 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
| 2486 | returned. The function guarantees that the write operation does not produce\r | |
| 2487 | an alignment fault.\r | |
| 2488 | \r | |
| 2489 | If the Buffer is NULL, then ASSERT().\r | |
| 2490 | \r | |
| af2dc6a7 | 2491 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
| ac644614 | 2492 | @param Value 16-bit value to write to Buffer.\r |
| 2493 | \r | |
| 5385a579 | 2494 | @return The 16-bit value to write to Buffer.\r |
| ac644614 | 2495 | \r |
| 2496 | **/\r | |
| 2497 | UINT16\r | |
| 2498 | EFIAPI\r | |
| 2499 | WriteUnaligned16 (\r | |
| 5385a579 | 2500 | OUT UINT16 *Buffer,\r |
| 2501 | IN UINT16 Value\r | |
| ac644614 | 2502 | );\r |
| 2503 | \r | |
| 2504 | \r | |
| 2505 | /**\r | |
| 2506 | Reads a 24-bit value from memory that may be unaligned.\r | |
| 2507 | \r | |
| 2508 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
| 2509 | guarantees that the read operation does not produce an alignment fault.\r | |
| 2510 | \r | |
| 2511 | If the Buffer is NULL, then ASSERT().\r | |
| 2512 | \r | |
| af2dc6a7 | 2513 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
| ac644614 | 2514 | \r |
| 5385a579 | 2515 | @return The 24-bit value read from Buffer.\r |
| ac644614 | 2516 | \r |
| 2517 | **/\r | |
| 2518 | UINT32\r | |
| 2519 | EFIAPI\r | |
| 2520 | ReadUnaligned24 (\r | |
| 5385a579 | 2521 | IN CONST UINT32 *Buffer\r |
| ac644614 | 2522 | );\r |
| 2523 | \r | |
| 2524 | \r | |
| 2525 | /**\r | |
| 2526 | Writes a 24-bit value to memory that may be unaligned.\r | |
| 2527 | \r | |
| 2528 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
| 2529 | returned. The function guarantees that the write operation does not produce\r | |
| 2530 | an alignment fault.\r | |
| 2531 | \r | |
| 2532 | If the Buffer is NULL, then ASSERT().\r | |
| 2533 | \r | |
| af2dc6a7 | 2534 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
| ac644614 | 2535 | @param Value 24-bit value to write to Buffer.\r |
| 2536 | \r | |
| 5385a579 | 2537 | @return The 24-bit value to write to Buffer.\r |
| ac644614 | 2538 | \r |
| 2539 | **/\r | |
| 2540 | UINT32\r | |
| 2541 | EFIAPI\r | |
| 2542 | WriteUnaligned24 (\r | |
| 5385a579 | 2543 | OUT UINT32 *Buffer,\r |
| 2544 | IN UINT32 Value\r | |
| ac644614 | 2545 | );\r |
| 2546 | \r | |
| 2547 | \r | |
| 2548 | /**\r | |
| 2549 | Reads a 32-bit value from memory that may be unaligned.\r | |
| 2550 | \r | |
| 2551 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
| 2552 | guarantees that the read operation does not produce an alignment fault.\r | |
| 2553 | \r | |
| 2554 | If the Buffer is NULL, then ASSERT().\r | |
| 2555 | \r | |
| af2dc6a7 | 2556 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
| ac644614 | 2557 | \r |
| 5385a579 | 2558 | @return The 32-bit value read from Buffer.\r |
| ac644614 | 2559 | \r |
| 2560 | **/\r | |
| 2561 | UINT32\r | |
| 2562 | EFIAPI\r | |
| 2563 | ReadUnaligned32 (\r | |
| 5385a579 | 2564 | IN CONST UINT32 *Buffer\r |
| ac644614 | 2565 | );\r |
| 2566 | \r | |
| 2567 | \r | |
| 2568 | /**\r | |
| 2569 | Writes a 32-bit value to memory that may be unaligned.\r | |
| 2570 | \r | |
| 2571 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
| 2572 | returned. The function guarantees that the write operation does not produce\r | |
| 2573 | an alignment fault.\r | |
| 2574 | \r | |
| 2575 | If the Buffer is NULL, then ASSERT().\r | |
| 2576 | \r | |
| af2dc6a7 | 2577 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
| ac644614 | 2578 | @param Value 32-bit value to write to Buffer.\r |
| 2579 | \r | |
| 5385a579 | 2580 | @return The 32-bit value to write to Buffer.\r |
| ac644614 | 2581 | \r |
| 2582 | **/\r | |
| 2583 | UINT32\r | |
| 2584 | EFIAPI\r | |
| 2585 | WriteUnaligned32 (\r | |
| 5385a579 | 2586 | OUT UINT32 *Buffer,\r |
| 2587 | IN UINT32 Value\r | |
| ac644614 | 2588 | );\r |
| 2589 | \r | |
| 2590 | \r | |
| 2591 | /**\r | |
| 2592 | Reads a 64-bit value from memory that may be unaligned.\r | |
| 2593 | \r | |
| 2594 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
| 2595 | guarantees that the read operation does not produce an alignment fault.\r | |
| 2596 | \r | |
| 2597 | If the Buffer is NULL, then ASSERT().\r | |
| 2598 | \r | |
| af2dc6a7 | 2599 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
| ac644614 | 2600 | \r |
| 5385a579 | 2601 | @return The 64-bit value read from Buffer.\r |
| ac644614 | 2602 | \r |
| 2603 | **/\r | |
| 2604 | UINT64\r | |
| 2605 | EFIAPI\r | |
| 2606 | ReadUnaligned64 (\r | |
| 5385a579 | 2607 | IN CONST UINT64 *Buffer\r |
| ac644614 | 2608 | );\r |
| 2609 | \r | |
| 2610 | \r | |
| 2611 | /**\r | |
| 2612 | Writes a 64-bit value to memory that may be unaligned.\r | |
| 2613 | \r | |
| 2614 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
| 2615 | returned. The function guarantees that the write operation does not produce\r | |
| 2616 | an alignment fault.\r | |
| 2617 | \r | |
| 2618 | If the Buffer is NULL, then ASSERT().\r | |
| 2619 | \r | |
| af2dc6a7 | 2620 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
| ac644614 | 2621 | @param Value 64-bit value to write to Buffer.\r |
| 2622 | \r | |
| 5385a579 | 2623 | @return The 64-bit value to write to Buffer.\r |
| ac644614 | 2624 | \r |
| 2625 | **/\r | |
| 2626 | UINT64\r | |
| 2627 | EFIAPI\r | |
| 2628 | WriteUnaligned64 (\r | |
| 5385a579 | 2629 | OUT UINT64 *Buffer,\r |
| 2630 | IN UINT64 Value\r | |
| ac644614 | 2631 | );\r |
| 2632 | \r | |
| 2633 | \r | |
| 2634 | //\r | |
| 2635 | // Bit Field Functions\r | |
| 2636 | //\r | |
| 2637 | \r | |
| 2638 | /**\r | |
| 2639 | Returns a bit field from an 8-bit value.\r | |
| 2640 | \r | |
| 2641 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
| 2642 | \r | |
| 2643 | If 8-bit operations are not supported, then ASSERT().\r | |
| 2644 | If StartBit is greater than 7, then ASSERT().\r | |
| 2645 | If EndBit is greater than 7, then ASSERT().\r | |
| 2646 | If EndBit is less than StartBit, then ASSERT().\r | |
| 2647 | \r | |
| 2648 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2649 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2650 | Range 0..7.\r | |
| 2651 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2652 | Range 0..7.\r | |
| 2653 | \r | |
| 2654 | @return The bit field read.\r | |
| 2655 | \r | |
| 2656 | **/\r | |
| 2657 | UINT8\r | |
| 2658 | EFIAPI\r | |
| 2659 | BitFieldRead8 (\r | |
| 2660 | IN UINT8 Operand,\r | |
| 2661 | IN UINTN StartBit,\r | |
| 2662 | IN UINTN EndBit\r | |
| 2663 | );\r | |
| 2664 | \r | |
| 2665 | \r | |
| 2666 | /**\r | |
| 2667 | Writes a bit field to an 8-bit value, and returns the result.\r | |
| 2668 | \r | |
| 2669 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
| 2670 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
| 2671 | returned.\r | |
| 2672 | \r | |
| 2673 | If 8-bit operations are not supported, then ASSERT().\r | |
| 2674 | If StartBit is greater than 7, then ASSERT().\r | |
| 2675 | If EndBit is greater than 7, then ASSERT().\r | |
| 2676 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2677 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 2678 | \r |
| 2679 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2680 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2681 | Range 0..7.\r | |
| 2682 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2683 | Range 0..7.\r | |
| 2684 | @param Value New value of the bit field.\r | |
| 2685 | \r | |
| 2686 | @return The new 8-bit value.\r | |
| 2687 | \r | |
| 2688 | **/\r | |
| 2689 | UINT8\r | |
| 2690 | EFIAPI\r | |
| 2691 | BitFieldWrite8 (\r | |
| 2692 | IN UINT8 Operand,\r | |
| 2693 | IN UINTN StartBit,\r | |
| 2694 | IN UINTN EndBit,\r | |
| 2695 | IN UINT8 Value\r | |
| 2696 | );\r | |
| 2697 | \r | |
| 2698 | \r | |
| 2699 | /**\r | |
| 2700 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
| 2701 | result.\r | |
| 2702 | \r | |
| 62991af2 | 2703 | Performs a bitwise OR between the bit field specified by StartBit\r |
| ac644614 | 2704 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 2705 | Operand are preserved. The new 8-bit value is returned.\r | |
| 2706 | \r | |
| 2707 | If 8-bit operations are not supported, then ASSERT().\r | |
| 2708 | If StartBit is greater than 7, then ASSERT().\r | |
| 2709 | If EndBit is greater than 7, then ASSERT().\r | |
| 2710 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2711 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 2712 | \r |
| 2713 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2714 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2715 | Range 0..7.\r | |
| 2716 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2717 | Range 0..7.\r | |
| 2718 | @param OrData The value to OR with the read value from the value\r | |
| 2719 | \r | |
| 2720 | @return The new 8-bit value.\r | |
| 2721 | \r | |
| 2722 | **/\r | |
| 2723 | UINT8\r | |
| 2724 | EFIAPI\r | |
| 2725 | BitFieldOr8 (\r | |
| 2726 | IN UINT8 Operand,\r | |
| 2727 | IN UINTN StartBit,\r | |
| 2728 | IN UINTN EndBit,\r | |
| 2729 | IN UINT8 OrData\r | |
| 2730 | );\r | |
| 2731 | \r | |
| 2732 | \r | |
| 2733 | /**\r | |
| 2734 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
| 2735 | the result.\r | |
| 2736 | \r | |
| 2737 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 2738 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
| 2739 | preserved. The new 8-bit value is returned.\r | |
| 2740 | \r | |
| 2741 | If 8-bit operations are not supported, then ASSERT().\r | |
| 2742 | If StartBit is greater than 7, then ASSERT().\r | |
| 2743 | If EndBit is greater than 7, then ASSERT().\r | |
| 2744 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2745 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 2746 | \r |
| 2747 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2748 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2749 | Range 0..7.\r | |
| 2750 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2751 | Range 0..7.\r | |
| 2752 | @param AndData The value to AND with the read value from the value.\r | |
| 2753 | \r | |
| 2754 | @return The new 8-bit value.\r | |
| 2755 | \r | |
| 2756 | **/\r | |
| 2757 | UINT8\r | |
| 2758 | EFIAPI\r | |
| 2759 | BitFieldAnd8 (\r | |
| 2760 | IN UINT8 Operand,\r | |
| 2761 | IN UINTN StartBit,\r | |
| 2762 | IN UINTN EndBit,\r | |
| 2763 | IN UINT8 AndData\r | |
| 2764 | );\r | |
| 2765 | \r | |
| 2766 | \r | |
| 2767 | /**\r | |
| 2768 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
| 2769 | bitwise OR, and returns the result.\r | |
| 2770 | \r | |
| 2771 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 62991af2 | 2772 | in Operand and the value specified by AndData, followed by a bitwise \r |
| 2773 | OR with value specified by OrData. All other bits in Operand are\r | |
| ac644614 | 2774 | preserved. The new 8-bit value is returned.\r |
| 2775 | \r | |
| 2776 | If 8-bit operations are not supported, then ASSERT().\r | |
| 2777 | If StartBit is greater than 7, then ASSERT().\r | |
| 2778 | If EndBit is greater than 7, then ASSERT().\r | |
| 2779 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
2780 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 2781 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| ac644614 | 2782 | \r |
| 2783 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2784 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2785 | Range 0..7.\r | |
| 2786 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2787 | Range 0..7.\r | |
| 2788 | @param AndData The value to AND with the read value from the value.\r | |
| 2789 | @param OrData The value to OR with the result of the AND operation.\r | |
| 2790 | \r | |
| 2791 | @return The new 8-bit value.\r | |
| 2792 | \r | |
| 2793 | **/\r | |
| 2794 | UINT8\r | |
| 2795 | EFIAPI\r | |
| 2796 | BitFieldAndThenOr8 (\r | |
| 2797 | IN UINT8 Operand,\r | |
| 2798 | IN UINTN StartBit,\r | |
| 2799 | IN UINTN EndBit,\r | |
| 2800 | IN UINT8 AndData,\r | |
| 2801 | IN UINT8 OrData\r | |
| 2802 | );\r | |
| 2803 | \r | |
| 2804 | \r | |
| 2805 | /**\r | |
| 2806 | Returns a bit field from a 16-bit value.\r | |
| 2807 | \r | |
| 2808 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
| 2809 | \r | |
| 2810 | If 16-bit operations are not supported, then ASSERT().\r | |
| 2811 | If StartBit is greater than 15, then ASSERT().\r | |
| 2812 | If EndBit is greater than 15, then ASSERT().\r | |
| 2813 | If EndBit is less than StartBit, then ASSERT().\r | |
| 2814 | \r | |
| 2815 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2816 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2817 | Range 0..15.\r | |
| 2818 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2819 | Range 0..15.\r | |
| 2820 | \r | |
| 2821 | @return The bit field read.\r | |
| 2822 | \r | |
| 2823 | **/\r | |
| 2824 | UINT16\r | |
| 2825 | EFIAPI\r | |
| 2826 | BitFieldRead16 (\r | |
| 2827 | IN UINT16 Operand,\r | |
| 2828 | IN UINTN StartBit,\r | |
| 2829 | IN UINTN EndBit\r | |
| 2830 | );\r | |
| 2831 | \r | |
| 2832 | \r | |
| 2833 | /**\r | |
| 2834 | Writes a bit field to a 16-bit value, and returns the result.\r | |
| 2835 | \r | |
| 2836 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
| 2837 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
| 2838 | returned.\r | |
| 2839 | \r | |
| 2840 | If 16-bit operations are not supported, then ASSERT().\r | |
| 2841 | If StartBit is greater than 15, then ASSERT().\r | |
| 2842 | If EndBit is greater than 15, then ASSERT().\r | |
| 2843 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2844 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 2845 | \r |
| 2846 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2847 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2848 | Range 0..15.\r | |
| 2849 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2850 | Range 0..15.\r | |
| 2851 | @param Value New value of the bit field.\r | |
| 2852 | \r | |
| 2853 | @return The new 16-bit value.\r | |
| 2854 | \r | |
| 2855 | **/\r | |
| 2856 | UINT16\r | |
| 2857 | EFIAPI\r | |
| 2858 | BitFieldWrite16 (\r | |
| 2859 | IN UINT16 Operand,\r | |
| 2860 | IN UINTN StartBit,\r | |
| 2861 | IN UINTN EndBit,\r | |
| 2862 | IN UINT16 Value\r | |
| 2863 | );\r | |
| 2864 | \r | |
| 2865 | \r | |
| 2866 | /**\r | |
| 2867 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
| 2868 | result.\r | |
| 2869 | \r | |
| 62991af2 | 2870 | Performs a bitwise OR between the bit field specified by StartBit\r |
| ac644614 | 2871 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 2872 | Operand are preserved. The new 16-bit value is returned.\r | |
| 2873 | \r | |
| 2874 | If 16-bit operations are not supported, then ASSERT().\r | |
| 2875 | If StartBit is greater than 15, then ASSERT().\r | |
| 2876 | If EndBit is greater than 15, then ASSERT().\r | |
| 2877 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2878 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 2879 | \r |
| 2880 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2881 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2882 | Range 0..15.\r | |
| 2883 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2884 | Range 0..15.\r | |
| 2885 | @param OrData The value to OR with the read value from the value\r | |
| 2886 | \r | |
| 2887 | @return The new 16-bit value.\r | |
| 2888 | \r | |
| 2889 | **/\r | |
| 2890 | UINT16\r | |
| 2891 | EFIAPI\r | |
| 2892 | BitFieldOr16 (\r | |
| 2893 | IN UINT16 Operand,\r | |
| 2894 | IN UINTN StartBit,\r | |
| 2895 | IN UINTN EndBit,\r | |
| 2896 | IN UINT16 OrData\r | |
| 2897 | );\r | |
| 2898 | \r | |
| 2899 | \r | |
| 2900 | /**\r | |
| 2901 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
| 2902 | the result.\r | |
| 2903 | \r | |
| 2904 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 2905 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
| 2906 | preserved. The new 16-bit value is returned.\r | |
| 2907 | \r | |
| 2908 | If 16-bit operations are not supported, then ASSERT().\r | |
| 2909 | If StartBit is greater than 15, then ASSERT().\r | |
| 2910 | If EndBit is greater than 15, then ASSERT().\r | |
| 2911 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2912 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 2913 | \r |
| 2914 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2915 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2916 | Range 0..15.\r | |
| 2917 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2918 | Range 0..15.\r | |
| 2919 | @param AndData The value to AND with the read value from the value\r | |
| 2920 | \r | |
| 2921 | @return The new 16-bit value.\r | |
| 2922 | \r | |
| 2923 | **/\r | |
| 2924 | UINT16\r | |
| 2925 | EFIAPI\r | |
| 2926 | BitFieldAnd16 (\r | |
| 2927 | IN UINT16 Operand,\r | |
| 2928 | IN UINTN StartBit,\r | |
| 2929 | IN UINTN EndBit,\r | |
| 2930 | IN UINT16 AndData\r | |
| 2931 | );\r | |
| 2932 | \r | |
| 2933 | \r | |
| 2934 | /**\r | |
| 2935 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
| 2936 | bitwise OR, and returns the result.\r | |
| 2937 | \r | |
| 2938 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 62991af2 | 2939 | in Operand and the value specified by AndData, followed by a bitwise \r |
| 2940 | OR with value specified by OrData. All other bits in Operand are\r | |
| ac644614 | 2941 | preserved. The new 16-bit value is returned.\r |
| 2942 | \r | |
| 2943 | If 16-bit operations are not supported, then ASSERT().\r | |
| 2944 | If StartBit is greater than 15, then ASSERT().\r | |
| 2945 | If EndBit is greater than 15, then ASSERT().\r | |
| 2946 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
2947 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 2948 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| ac644614 | 2949 | \r |
| 2950 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2951 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2952 | Range 0..15.\r | |
| 2953 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2954 | Range 0..15.\r | |
| 2955 | @param AndData The value to AND with the read value from the value.\r | |
| 2956 | @param OrData The value to OR with the result of the AND operation.\r | |
| 2957 | \r | |
| 2958 | @return The new 16-bit value.\r | |
| 2959 | \r | |
| 2960 | **/\r | |
| 2961 | UINT16\r | |
| 2962 | EFIAPI\r | |
| 2963 | BitFieldAndThenOr16 (\r | |
| 2964 | IN UINT16 Operand,\r | |
| 2965 | IN UINTN StartBit,\r | |
| 2966 | IN UINTN EndBit,\r | |
| 2967 | IN UINT16 AndData,\r | |
| 2968 | IN UINT16 OrData\r | |
| 2969 | );\r | |
| 2970 | \r | |
| 2971 | \r | |
| 2972 | /**\r | |
| 2973 | Returns a bit field from a 32-bit value.\r | |
| 2974 | \r | |
| 2975 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
| 2976 | \r | |
| 2977 | If 32-bit operations are not supported, then ASSERT().\r | |
| 2978 | If StartBit is greater than 31, then ASSERT().\r | |
| 2979 | If EndBit is greater than 31, then ASSERT().\r | |
| 2980 | If EndBit is less than StartBit, then ASSERT().\r | |
| 2981 | \r | |
| 2982 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 2983 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 2984 | Range 0..31.\r | |
| 2985 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2986 | Range 0..31.\r | |
| 2987 | \r | |
| 2988 | @return The bit field read.\r | |
| 2989 | \r | |
| 2990 | **/\r | |
| 2991 | UINT32\r | |
| 2992 | EFIAPI\r | |
| 2993 | BitFieldRead32 (\r | |
| 2994 | IN UINT32 Operand,\r | |
| 2995 | IN UINTN StartBit,\r | |
| 2996 | IN UINTN EndBit\r | |
| 2997 | );\r | |
| 2998 | \r | |
| 2999 | \r | |
| 3000 | /**\r | |
| 3001 | Writes a bit field to a 32-bit value, and returns the result.\r | |
| 3002 | \r | |
| 3003 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
| 3004 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
| 3005 | returned.\r | |
| 3006 | \r | |
| 3007 | If 32-bit operations are not supported, then ASSERT().\r | |
| 3008 | If StartBit is greater than 31, then ASSERT().\r | |
| 3009 | If EndBit is greater than 31, then ASSERT().\r | |
| 3010 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 3011 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 3012 | \r |
| 3013 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3014 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3015 | Range 0..31.\r | |
| 3016 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3017 | Range 0..31.\r | |
| 3018 | @param Value New value of the bit field.\r | |
| 3019 | \r | |
| 3020 | @return The new 32-bit value.\r | |
| 3021 | \r | |
| 3022 | **/\r | |
| 3023 | UINT32\r | |
| 3024 | EFIAPI\r | |
| 3025 | BitFieldWrite32 (\r | |
| 3026 | IN UINT32 Operand,\r | |
| 3027 | IN UINTN StartBit,\r | |
| 3028 | IN UINTN EndBit,\r | |
| 3029 | IN UINT32 Value\r | |
| 3030 | );\r | |
| 3031 | \r | |
| 3032 | \r | |
| 3033 | /**\r | |
| 3034 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
| 3035 | result.\r | |
| 3036 | \r | |
| 62991af2 | 3037 | Performs a bitwise OR between the bit field specified by StartBit\r |
| ac644614 | 3038 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 3039 | Operand are preserved. The new 32-bit value is returned.\r | |
| 3040 | \r | |
| 3041 | If 32-bit operations are not supported, then ASSERT().\r | |
| 3042 | If StartBit is greater than 31, then ASSERT().\r | |
| 3043 | If EndBit is greater than 31, then ASSERT().\r | |
| 3044 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 3045 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 3046 | \r |
| 3047 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3048 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3049 | Range 0..31.\r | |
| 3050 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3051 | Range 0..31.\r | |
| af2dc6a7 | 3052 | @param OrData The value to OR with the read value from the value.\r |
| ac644614 | 3053 | \r |
| 3054 | @return The new 32-bit value.\r | |
| 3055 | \r | |
| 3056 | **/\r | |
| 3057 | UINT32\r | |
| 3058 | EFIAPI\r | |
| 3059 | BitFieldOr32 (\r | |
| 3060 | IN UINT32 Operand,\r | |
| 3061 | IN UINTN StartBit,\r | |
| 3062 | IN UINTN EndBit,\r | |
| 3063 | IN UINT32 OrData\r | |
| 3064 | );\r | |
| 3065 | \r | |
| 3066 | \r | |
| 3067 | /**\r | |
| 3068 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
| 3069 | the result.\r | |
| 3070 | \r | |
| 3071 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 3072 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
| 3073 | preserved. The new 32-bit value is returned.\r | |
| 3074 | \r | |
| 3075 | If 32-bit operations are not supported, then ASSERT().\r | |
| 3076 | If StartBit is greater than 31, then ASSERT().\r | |
| 3077 | If EndBit is greater than 31, then ASSERT().\r | |
| 3078 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 3079 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 3080 | \r |
| 3081 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3082 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3083 | Range 0..31.\r | |
| 3084 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3085 | Range 0..31.\r | |
| 3086 | @param AndData The value to AND with the read value from the value\r | |
| 3087 | \r | |
| 3088 | @return The new 32-bit value.\r | |
| 3089 | \r | |
| 3090 | **/\r | |
| 3091 | UINT32\r | |
| 3092 | EFIAPI\r | |
| 3093 | BitFieldAnd32 (\r | |
| 3094 | IN UINT32 Operand,\r | |
| 3095 | IN UINTN StartBit,\r | |
| 3096 | IN UINTN EndBit,\r | |
| 3097 | IN UINT32 AndData\r | |
| 3098 | );\r | |
| 3099 | \r | |
| 3100 | \r | |
| 3101 | /**\r | |
| 3102 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
| 3103 | bitwise OR, and returns the result.\r | |
| 3104 | \r | |
| 3105 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 62991af2 | 3106 | in Operand and the value specified by AndData, followed by a bitwise \r |
| 3107 | OR with value specified by OrData. All other bits in Operand are\r | |
| ac644614 | 3108 | preserved. The new 32-bit value is returned.\r |
| 3109 | \r | |
| 3110 | If 32-bit operations are not supported, then ASSERT().\r | |
| 3111 | If StartBit is greater than 31, then ASSERT().\r | |
| 3112 | If EndBit is greater than 31, then ASSERT().\r | |
| 3113 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
3114 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 3115 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| ac644614 | 3116 | \r |
| 3117 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3118 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3119 | Range 0..31.\r | |
| 3120 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3121 | Range 0..31.\r | |
| 3122 | @param AndData The value to AND with the read value from the value.\r | |
| 3123 | @param OrData The value to OR with the result of the AND operation.\r | |
| 3124 | \r | |
| 3125 | @return The new 32-bit value.\r | |
| 3126 | \r | |
| 3127 | **/\r | |
| 3128 | UINT32\r | |
| 3129 | EFIAPI\r | |
| 3130 | BitFieldAndThenOr32 (\r | |
| 3131 | IN UINT32 Operand,\r | |
| 3132 | IN UINTN StartBit,\r | |
| 3133 | IN UINTN EndBit,\r | |
| 3134 | IN UINT32 AndData,\r | |
| 3135 | IN UINT32 OrData\r | |
| 3136 | );\r | |
| 3137 | \r | |
| 3138 | \r | |
| 3139 | /**\r | |
| 3140 | Returns a bit field from a 64-bit value.\r | |
| 3141 | \r | |
| 3142 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
| 3143 | \r | |
| 3144 | If 64-bit operations are not supported, then ASSERT().\r | |
| 3145 | If StartBit is greater than 63, then ASSERT().\r | |
| 3146 | If EndBit is greater than 63, then ASSERT().\r | |
| 3147 | If EndBit is less than StartBit, then ASSERT().\r | |
| 3148 | \r | |
| 3149 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3150 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3151 | Range 0..63.\r | |
| 3152 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3153 | Range 0..63.\r | |
| 3154 | \r | |
| 3155 | @return The bit field read.\r | |
| 3156 | \r | |
| 3157 | **/\r | |
| 3158 | UINT64\r | |
| 3159 | EFIAPI\r | |
| 3160 | BitFieldRead64 (\r | |
| 3161 | IN UINT64 Operand,\r | |
| 3162 | IN UINTN StartBit,\r | |
| 3163 | IN UINTN EndBit\r | |
| 3164 | );\r | |
| 3165 | \r | |
| 3166 | \r | |
| 3167 | /**\r | |
| 3168 | Writes a bit field to a 64-bit value, and returns the result.\r | |
| 3169 | \r | |
| 3170 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
| 3171 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
| 3172 | returned.\r | |
| 3173 | \r | |
| 3174 | If 64-bit operations are not supported, then ASSERT().\r | |
| 3175 | If StartBit is greater than 63, then ASSERT().\r | |
| 3176 | If EndBit is greater than 63, then ASSERT().\r | |
| 3177 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 3178 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 3179 | \r |
| 3180 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3181 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3182 | Range 0..63.\r | |
| 3183 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3184 | Range 0..63.\r | |
| 3185 | @param Value New value of the bit field.\r | |
| 3186 | \r | |
| 3187 | @return The new 64-bit value.\r | |
| 3188 | \r | |
| 3189 | **/\r | |
| 3190 | UINT64\r | |
| 3191 | EFIAPI\r | |
| 3192 | BitFieldWrite64 (\r | |
| 3193 | IN UINT64 Operand,\r | |
| 3194 | IN UINTN StartBit,\r | |
| 3195 | IN UINTN EndBit,\r | |
| 3196 | IN UINT64 Value\r | |
| 3197 | );\r | |
| 3198 | \r | |
| 3199 | \r | |
| 3200 | /**\r | |
| 3201 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
| 3202 | result.\r | |
| 3203 | \r | |
| 62991af2 | 3204 | Performs a bitwise OR between the bit field specified by StartBit\r |
| ac644614 | 3205 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
| 3206 | Operand are preserved. The new 64-bit value is returned.\r | |
| 3207 | \r | |
| 3208 | If 64-bit operations are not supported, then ASSERT().\r | |
| 3209 | If StartBit is greater than 63, then ASSERT().\r | |
| 3210 | If EndBit is greater than 63, then ASSERT().\r | |
| 3211 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 3212 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 3213 | \r |
| 3214 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3215 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3216 | Range 0..63.\r | |
| 3217 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3218 | Range 0..63.\r | |
| 3219 | @param OrData The value to OR with the read value from the value\r | |
| 3220 | \r | |
| 3221 | @return The new 64-bit value.\r | |
| 3222 | \r | |
| 3223 | **/\r | |
| 3224 | UINT64\r | |
| 3225 | EFIAPI\r | |
| 3226 | BitFieldOr64 (\r | |
| 3227 | IN UINT64 Operand,\r | |
| 3228 | IN UINTN StartBit,\r | |
| 3229 | IN UINTN EndBit,\r | |
| 3230 | IN UINT64 OrData\r | |
| 3231 | );\r | |
| 3232 | \r | |
| 3233 | \r | |
| 3234 | /**\r | |
| 3235 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
| 3236 | the result.\r | |
| 3237 | \r | |
| 3238 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 3239 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
| 3240 | preserved. The new 64-bit value is returned.\r | |
| 3241 | \r | |
| 3242 | If 64-bit operations are not supported, then ASSERT().\r | |
| 3243 | If StartBit is greater than 63, then ASSERT().\r | |
| 3244 | If EndBit is greater than 63, then ASSERT().\r | |
| 3245 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 3246 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 3247 | \r |
| 3248 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3249 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3250 | Range 0..63.\r | |
| 3251 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3252 | Range 0..63.\r | |
| 3253 | @param AndData The value to AND with the read value from the value\r | |
| 3254 | \r | |
| 3255 | @return The new 64-bit value.\r | |
| 3256 | \r | |
| 3257 | **/\r | |
| 3258 | UINT64\r | |
| 3259 | EFIAPI\r | |
| 3260 | BitFieldAnd64 (\r | |
| 3261 | IN UINT64 Operand,\r | |
| 3262 | IN UINTN StartBit,\r | |
| 3263 | IN UINTN EndBit,\r | |
| 3264 | IN UINT64 AndData\r | |
| 3265 | );\r | |
| 3266 | \r | |
| 3267 | \r | |
| 3268 | /**\r | |
| 3269 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
| 3270 | bitwise OR, and returns the result.\r | |
| 3271 | \r | |
| 3272 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
| 62991af2 | 3273 | in Operand and the value specified by AndData, followed by a bitwise \r |
| 3274 | OR with value specified by OrData. All other bits in Operand are\r | |
| ac644614 | 3275 | preserved. The new 64-bit value is returned.\r |
| 3276 | \r | |
| 3277 | If 64-bit operations are not supported, then ASSERT().\r | |
| 3278 | If StartBit is greater than 63, then ASSERT().\r | |
| 3279 | If EndBit is greater than 63, then ASSERT().\r | |
| 3280 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
3281 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 3282 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| ac644614 | 3283 | \r |
| 3284 | @param Operand Operand on which to perform the bitfield operation.\r | |
| 3285 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 3286 | Range 0..63.\r | |
| 3287 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 3288 | Range 0..63.\r | |
| 3289 | @param AndData The value to AND with the read value from the value.\r | |
| 3290 | @param OrData The value to OR with the result of the AND operation.\r | |
| 3291 | \r | |
| 3292 | @return The new 64-bit value.\r | |
| 3293 | \r | |
| 3294 | **/\r | |
| 3295 | UINT64\r | |
| 3296 | EFIAPI\r | |
| 3297 | BitFieldAndThenOr64 (\r | |
| 3298 | IN UINT64 Operand,\r | |
| 3299 | IN UINTN StartBit,\r | |
| 3300 | IN UINTN EndBit,\r | |
| 3301 | IN UINT64 AndData,\r | |
| 3302 | IN UINT64 OrData\r | |
| 3303 | );\r | |
| 3304 | \r | |
| ac644614 | 3305 | //\r |
| 3306 | // Base Library Checksum Functions\r | |
| 3307 | //\r | |
| 3308 | \r | |
| 3309 | /**\r | |
| 17f695ed | 3310 | Returns the sum of all elements in a buffer in unit of UINT8.\r |
| ac644614 | 3311 | During calculation, the carry bits are dropped.\r |
| 3312 | \r | |
| 3313 | This function calculates the sum of all elements in a buffer\r | |
| 3314 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
| 3315 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
| 3316 | returned.\r | |
| 3317 | \r | |
| 3318 | If Buffer is NULL, then ASSERT().\r | |
| 3319 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3320 | \r | |
| af2dc6a7 | 3321 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
| 17f695ed | 3322 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3323 | \r |
| 3324 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
| 3325 | \r | |
| 3326 | **/\r | |
| 3327 | UINT8\r | |
| 3328 | EFIAPI\r | |
| 3329 | CalculateSum8 (\r | |
| ee6c452c | 3330 | IN CONST UINT8 *Buffer,\r |
| 3331 | IN UINTN Length\r | |
| ac644614 | 3332 | );\r |
| 3333 | \r | |
| 3334 | \r | |
| 3335 | /**\r | |
| 3336 | Returns the two's complement checksum of all elements in a buffer\r | |
| 3337 | of 8-bit values.\r | |
| 3338 | \r | |
| 3339 | This function first calculates the sum of the 8-bit values in the\r | |
| 3340 | buffer specified by Buffer and Length. The carry bits in the result\r | |
| 3341 | of addition are dropped. Then, the two's complement of the sum is\r | |
| 3342 | returned. If Length is 0, then 0 is returned.\r | |
| 3343 | \r | |
| 3344 | If Buffer is NULL, then ASSERT().\r | |
| 3345 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3346 | \r | |
| af2dc6a7 | 3347 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
| 1106ffe1 | 3348 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3349 | \r |
| af2dc6a7 | 3350 | @return Checksum The two's complement checksum of Buffer.\r |
| ac644614 | 3351 | \r |
| 3352 | **/\r | |
| 3353 | UINT8\r | |
| 3354 | EFIAPI\r | |
| 3355 | CalculateCheckSum8 (\r | |
| ee6c452c | 3356 | IN CONST UINT8 *Buffer,\r |
| 3357 | IN UINTN Length\r | |
| ac644614 | 3358 | );\r |
| 3359 | \r | |
| 3360 | \r | |
| 3361 | /**\r | |
| 3362 | Returns the sum of all elements in a buffer of 16-bit values. During\r | |
| 3363 | calculation, the carry bits are dropped.\r | |
| 3364 | \r | |
| 3365 | This function calculates the sum of the 16-bit values in the buffer\r | |
| 3366 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
| 3367 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
| 3368 | \r | |
| 3369 | If Buffer is NULL, then ASSERT().\r | |
| 3370 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 3371 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 3372 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3373 | \r | |
| af2dc6a7 | 3374 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
| 1106ffe1 | 3375 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3376 | \r |
| 3377 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
| 3378 | \r | |
| 3379 | **/\r | |
| 3380 | UINT16\r | |
| 3381 | EFIAPI\r | |
| 3382 | CalculateSum16 (\r | |
| ee6c452c | 3383 | IN CONST UINT16 *Buffer,\r |
| 3384 | IN UINTN Length\r | |
| ac644614 | 3385 | );\r |
| 3386 | \r | |
| 3387 | \r | |
| 3388 | /**\r | |
| 3389 | Returns the two's complement checksum of all elements in a buffer of\r | |
| 3390 | 16-bit values.\r | |
| 3391 | \r | |
| 3392 | This function first calculates the sum of the 16-bit values in the buffer\r | |
| 3393 | specified by Buffer and Length. The carry bits in the result of addition\r | |
| 3394 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
| 3395 | is 0, then 0 is returned.\r | |
| 3396 | \r | |
| 3397 | If Buffer is NULL, then ASSERT().\r | |
| 3398 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 3399 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
| 3400 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3401 | \r | |
| af2dc6a7 | 3402 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
| 1106ffe1 | 3403 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3404 | \r |
| af2dc6a7 | 3405 | @return Checksum The two's complement checksum of Buffer.\r |
| ac644614 | 3406 | \r |
| 3407 | **/\r | |
| 3408 | UINT16\r | |
| 3409 | EFIAPI\r | |
| 3410 | CalculateCheckSum16 (\r | |
| ee6c452c | 3411 | IN CONST UINT16 *Buffer,\r |
| 3412 | IN UINTN Length\r | |
| ac644614 | 3413 | );\r |
| 3414 | \r | |
| 3415 | \r | |
| 3416 | /**\r | |
| 17f695ed | 3417 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
| ac644614 | 3418 | calculation, the carry bits are dropped.\r |
| 3419 | \r | |
| 3420 | This function calculates the sum of the 32-bit values in the buffer\r | |
| 3421 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
| 17f695ed | 3422 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r |
| ac644614 | 3423 | \r |
| 3424 | If Buffer is NULL, then ASSERT().\r | |
| 3425 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
| 3426 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
| 3427 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3428 | \r | |
| af2dc6a7 | 3429 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
| 1106ffe1 | 3430 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3431 | \r |
| 3432 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
| 3433 | \r | |
| 3434 | **/\r | |
| 3435 | UINT32\r | |
| 3436 | EFIAPI\r | |
| 3437 | CalculateSum32 (\r | |
| ee6c452c | 3438 | IN CONST UINT32 *Buffer,\r |
| 3439 | IN UINTN Length\r | |
| ac644614 | 3440 | );\r |
| 3441 | \r | |
| 3442 | \r | |
| 3443 | /**\r | |
| 3444 | Returns the two's complement checksum of all elements in a buffer of\r | |
| 3445 | 32-bit values.\r | |
| 3446 | \r | |
| 3447 | This function first calculates the sum of the 32-bit values in the buffer\r | |
| 3448 | specified by Buffer and Length. The carry bits in the result of addition\r | |
| 3449 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
| 3450 | is 0, then 0 is returned.\r | |
| 3451 | \r | |
| 3452 | If Buffer is NULL, then ASSERT().\r | |
| 3453 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
| 3454 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
| 3455 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3456 | \r | |
| af2dc6a7 | 3457 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
| 1106ffe1 | 3458 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3459 | \r |
| af2dc6a7 | 3460 | @return Checksum The two's complement checksum of Buffer.\r |
| ac644614 | 3461 | \r |
| 3462 | **/\r | |
| 3463 | UINT32\r | |
| 3464 | EFIAPI\r | |
| 3465 | CalculateCheckSum32 (\r | |
| ee6c452c | 3466 | IN CONST UINT32 *Buffer,\r |
| 3467 | IN UINTN Length\r | |
| ac644614 | 3468 | );\r |
| 3469 | \r | |
| 3470 | \r | |
| 3471 | /**\r | |
| 3472 | Returns the sum of all elements in a buffer of 64-bit values. During\r | |
| 3473 | calculation, the carry bits are dropped.\r | |
| 3474 | \r | |
| 3475 | This function calculates the sum of the 64-bit values in the buffer\r | |
| 3476 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
| 3477 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
| 3478 | \r | |
| 3479 | If Buffer is NULL, then ASSERT().\r | |
| 3480 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
| 3481 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
| 3482 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3483 | \r | |
| af2dc6a7 | 3484 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
| 1106ffe1 | 3485 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3486 | \r |
| 3487 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
| 3488 | \r | |
| 3489 | **/\r | |
| 3490 | UINT64\r | |
| 3491 | EFIAPI\r | |
| 3492 | CalculateSum64 (\r | |
| ee6c452c | 3493 | IN CONST UINT64 *Buffer,\r |
| 3494 | IN UINTN Length\r | |
| ac644614 | 3495 | );\r |
| 3496 | \r | |
| 3497 | \r | |
| 3498 | /**\r | |
| 3499 | Returns the two's complement checksum of all elements in a buffer of\r | |
| 3500 | 64-bit values.\r | |
| 3501 | \r | |
| 3502 | This function first calculates the sum of the 64-bit values in the buffer\r | |
| 3503 | specified by Buffer and Length. The carry bits in the result of addition\r | |
| 3504 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
| 3505 | is 0, then 0 is returned.\r | |
| 3506 | \r | |
| 3507 | If Buffer is NULL, then ASSERT().\r | |
| 3508 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
| 3509 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
| 3510 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
| 3511 | \r | |
| af2dc6a7 | 3512 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
| 1106ffe1 | 3513 | @param Length The size, in bytes, of Buffer.\r |
| ac644614 | 3514 | \r |
| af2dc6a7 | 3515 | @return Checksum The two's complement checksum of Buffer.\r |
| ac644614 | 3516 | \r |
| 3517 | **/\r | |
| 3518 | UINT64\r | |
| 3519 | EFIAPI\r | |
| 3520 | CalculateCheckSum64 (\r | |
| ee6c452c | 3521 | IN CONST UINT64 *Buffer,\r |
| 3522 | IN UINTN Length\r | |
| ac644614 | 3523 | );\r |
| 3524 | \r | |
| 3525 | \r | |
| d75f9fc2 | 3526 | //\r |
| 3527 | // Base Library CPU Functions\r | |
| 3528 | //\r | |
| 3529 | \r | |
| 3530 | /**\r | |
| 3531 | Function entry point used when a stack switch is requested with SwitchStack()\r | |
| 3532 | \r | |
| 3533 | @param Context1 Context1 parameter passed into SwitchStack().\r | |
| 3534 | @param Context2 Context2 parameter passed into SwitchStack().\r | |
| 3535 | \r | |
| 3536 | **/\r | |
| ac644614 | 3537 | typedef\r |
| 3538 | VOID\r | |
| 9810cdd8 | 3539 | (EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r |
| ac644614 | 3540 | IN VOID *Context1, OPTIONAL\r |
| 3541 | IN VOID *Context2 OPTIONAL\r | |
| 3542 | );\r | |
| 3543 | \r | |
| 3544 | \r | |
| 3545 | /**\r | |
| 3546 | Used to serialize load and store operations.\r | |
| 3547 | \r | |
| 3548 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
| 3549 | globally visible when this function returns.\r | |
| 3550 | \r | |
| 3551 | **/\r | |
| 3552 | VOID\r | |
| 3553 | EFIAPI\r | |
| 3554 | MemoryFence (\r | |
| 3555 | VOID\r | |
| 3556 | );\r | |
| 3557 | \r | |
| 3558 | \r | |
| 3559 | /**\r | |
| 3560 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
| 3561 | and returns 0.\r | |
| 3562 | \r | |
| 3563 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
| 3564 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
| 3565 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
| 3566 | \r | |
| 3567 | If JumpBuffer is NULL, then ASSERT().\r | |
| 1a2f870c | 3568 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
| 17f695ed | 3569 | \r |
| 3570 | NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r | |
| 3571 | The same structure must never be used for more than one CPU architecture context.\r | |
| 3572 | For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r | |
| 3573 | SetJump()/LongJump() is not currently supported for the EBC processor type. \r | |
| ac644614 | 3574 | \r |
| 3575 | @param JumpBuffer A pointer to CPU context buffer.\r | |
| 3576 | \r | |
| 3577 | @retval 0 Indicates a return from SetJump().\r | |
| 3578 | \r | |
| 3579 | **/\r | |
| 3580 | UINTN\r | |
| 3581 | EFIAPI\r | |
| 3582 | SetJump (\r | |
| 3583 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
| 3584 | );\r | |
| 3585 | \r | |
| 3586 | \r | |
| 3587 | /**\r | |
| 3588 | Restores the CPU context that was saved with SetJump().\r | |
| 3589 | \r | |
| 3590 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
| 3591 | function never returns to the caller. Instead is resumes execution based on\r | |
| 3592 | the state of JumpBuffer.\r | |
| 3593 | \r | |
| 3594 | If JumpBuffer is NULL, then ASSERT().\r | |
| 1a2f870c | 3595 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
| ac644614 | 3596 | If Value is 0, then ASSERT().\r |
| 3597 | \r | |
| 3598 | @param JumpBuffer A pointer to CPU context buffer.\r | |
| 3599 | @param Value The value to return when the SetJump() context is\r | |
| 3600 | restored and must be non-zero.\r | |
| 3601 | \r | |
| 3602 | **/\r | |
| 3603 | VOID\r | |
| 3604 | EFIAPI\r | |
| 3605 | LongJump (\r | |
| 3606 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
| 3607 | IN UINTN Value\r | |
| 3608 | );\r | |
| 3609 | \r | |
| 3610 | \r | |
| 3611 | /**\r | |
| 3612 | Enables CPU interrupts.\r | |
| 3613 | \r | |
| ac644614 | 3614 | **/\r |
| 3615 | VOID\r | |
| 3616 | EFIAPI\r | |
| 3617 | EnableInterrupts (\r | |
| 3618 | VOID\r | |
| 3619 | );\r | |
| 3620 | \r | |
| 3621 | \r | |
| 3622 | /**\r | |
| 3623 | Disables CPU interrupts.\r | |
| 3624 | \r | |
| ac644614 | 3625 | **/\r |
| 3626 | VOID\r | |
| 3627 | EFIAPI\r | |
| 3628 | DisableInterrupts (\r | |
| 3629 | VOID\r | |
| 3630 | );\r | |
| 3631 | \r | |
| 3632 | \r | |
| 3633 | /**\r | |
| 3634 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
| 3635 | operation.\r | |
| 3636 | \r | |
| ac644614 | 3637 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
| 3638 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
| 3639 | \r | |
| 3640 | **/\r | |
| 3641 | BOOLEAN\r | |
| 3642 | EFIAPI\r | |
| 3643 | SaveAndDisableInterrupts (\r | |
| 3644 | VOID\r | |
| 3645 | );\r | |
| 3646 | \r | |
| 3647 | \r | |
| 3648 | /**\r | |
| 3649 | Enables CPU interrupts for the smallest window required to capture any\r | |
| 3650 | pending interrupts.\r | |
| 3651 | \r | |
| ac644614 | 3652 | **/\r |
| 3653 | VOID\r | |
| 3654 | EFIAPI\r | |
| 3655 | EnableDisableInterrupts (\r | |
| 3656 | VOID\r | |
| 3657 | );\r | |
| 3658 | \r | |
| 3659 | \r | |
| 3660 | /**\r | |
| 3661 | Retrieves the current CPU interrupt state.\r | |
| 3662 | \r | |
| af2dc6a7 | 3663 | Returns TRUE if interrupts are currently enabled. Otherwise\r |
| 38bbd3d9 | 3664 | returns FALSE.\r |
| ac644614 | 3665 | \r |
| 3666 | @retval TRUE CPU interrupts are enabled.\r | |
| 3667 | @retval FALSE CPU interrupts are disabled.\r | |
| 3668 | \r | |
| 3669 | **/\r | |
| 3670 | BOOLEAN\r | |
| 3671 | EFIAPI\r | |
| 3672 | GetInterruptState (\r | |
| 3673 | VOID\r | |
| 3674 | );\r | |
| 3675 | \r | |
| 3676 | \r | |
| 3677 | /**\r | |
| 3678 | Set the current CPU interrupt state.\r | |
| 3679 | \r | |
| 3680 | Sets the current CPU interrupt state to the state specified by\r | |
| 3681 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
| 3682 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
| 3683 | returned.\r | |
| 3684 | \r | |
| 3685 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
| 3686 | interrupts should be disabled.\r | |
| 3687 | \r | |
| 3688 | @return InterruptState\r | |
| 3689 | \r | |
| 3690 | **/\r | |
| 3691 | BOOLEAN\r | |
| 3692 | EFIAPI\r | |
| 3693 | SetInterruptState (\r | |
| 3694 | IN BOOLEAN InterruptState\r | |
| 3695 | );\r | |
| 3696 | \r | |
| 3697 | \r | |
| 3698 | /**\r | |
| 3699 | Requests CPU to pause for a short period of time.\r | |
| 3700 | \r | |
| 3701 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
| 3702 | systems to prevent memory starvation while waiting for a spin lock.\r | |
| 3703 | \r | |
| 3704 | **/\r | |
| 3705 | VOID\r | |
| 3706 | EFIAPI\r | |
| 3707 | CpuPause (\r | |
| 3708 | VOID\r | |
| 3709 | );\r | |
| 3710 | \r | |
| 3711 | \r | |
| 3712 | /**\r | |
| 3713 | Transfers control to a function starting with a new stack.\r | |
| 3714 | \r | |
| 3715 | Transfers control to the function specified by EntryPoint using the\r | |
| 3716 | new stack specified by NewStack and passing in the parameters specified\r | |
| 3717 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
| 3718 | be NULL. The function EntryPoint must never return. This function\r | |
| 3719 | supports a variable number of arguments following the NewStack parameter.\r | |
| 1a2f870c | 3720 | These additional arguments are ignored on IA-32, x64, and EBC architectures.\r |
| 3721 | Itanium processors expect one additional parameter of type VOID * that specifies\r | |
| ac644614 | 3722 | the new backing store pointer.\r |
| 3723 | \r | |
| 3724 | If EntryPoint is NULL, then ASSERT().\r | |
| 3725 | If NewStack is NULL, then ASSERT().\r | |
| 3726 | \r | |
| 3727 | @param EntryPoint A pointer to function to call with the new stack.\r | |
| 3728 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
| 3729 | function.\r | |
| 3730 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
| 3731 | function.\r | |
| 3732 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
| 3733 | function.\r | |
| af2dc6a7 | 3734 | @param ... This variable argument list is ignored for IA-32, x64, and \r |
| 3735 | EBC architectures. For Itanium processors, this variable \r | |
| 3736 | argument list is expected to contain a single parameter of \r | |
| 3737 | type VOID * that specifies the new backing store pointer.\r | |
| 42eedea9 | 3738 | \r |
| ac644614 | 3739 | \r |
| 3740 | **/\r | |
| 3741 | VOID\r | |
| 3742 | EFIAPI\r | |
| 3743 | SwitchStack (\r | |
| 3744 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
| 3745 | IN VOID *Context1, OPTIONAL\r | |
| 3746 | IN VOID *Context2, OPTIONAL\r | |
| 3747 | IN VOID *NewStack,\r | |
| 3748 | ...\r | |
| 3749 | );\r | |
| 3750 | \r | |
| 3751 | \r | |
| 3752 | /**\r | |
| 3753 | Generates a breakpoint on the CPU.\r | |
| 3754 | \r | |
| 3755 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
| 3756 | that code can resume normal execution after the breakpoint.\r | |
| 3757 | \r | |
| 3758 | **/\r | |
| 3759 | VOID\r | |
| 3760 | EFIAPI\r | |
| 3761 | CpuBreakpoint (\r | |
| 3762 | VOID\r | |
| 3763 | );\r | |
| 3764 | \r | |
| 3765 | \r | |
| 3766 | /**\r | |
| 3767 | Executes an infinite loop.\r | |
| 3768 | \r | |
| 3769 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
| 3770 | past the loop and the code that follows the loop must execute properly. This\r | |
| 3771 | implies that the infinite loop must not cause the code that follow it to be\r | |
| 3772 | optimized away.\r | |
| 3773 | \r | |
| 3774 | **/\r | |
| 3775 | VOID\r | |
| 3776 | EFIAPI\r | |
| 3777 | CpuDeadLoop (\r | |
| 3778 | VOID\r | |
| 3779 | );\r | |
| 2fe241a2 | 3780 | \r |
| ac644614 | 3781 | #if defined (MDE_CPU_IPF)\r |
| 3782 | \r | |
| 3783 | /**\r | |
| 3784 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
| 3785 | CPU.\r | |
| 3786 | \r | |
| cc39b88b | 3787 | Flushes the cache lines specified by Address and Length. If Address is not aligned \r |
| 3788 | on a cache line boundary, then entire cache line containing Address is flushed. \r | |
| 3789 | If Address + Length is not aligned on a cache line boundary, then the entire cache \r | |
| 3790 | line containing Address + Length - 1 is flushed. This function may choose to flush \r | |
| 3791 | the entire cache if that is more efficient than flushing the specified range. If \r | |
| 3792 | Length is 0, the no cache lines are flushed. Address is returned. \r | |
| 1a2f870c | 3793 | This function is only available on Itanium processors.\r |
| ac644614 | 3794 | \r |
| 3795 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
| 3796 | \r | |
| 3797 | @param Address The base address of the instruction lines to invalidate. If\r | |
| 3798 | the CPU is in a physical addressing mode, then Address is a\r | |
| 3799 | physical address. If the CPU is in a virtual addressing mode,\r | |
| 3800 | then Address is a virtual address.\r | |
| 3801 | \r | |
| 3802 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
| 3803 | \r | |
| cc39b88b | 3804 | @return Address.\r |
| ac644614 | 3805 | \r |
| 3806 | **/\r | |
| 3807 | VOID *\r | |
| 3808 | EFIAPI\r | |
| cc39b88b | 3809 | AsmFlushCacheRange (\r |
| ac644614 | 3810 | IN VOID *Address,\r |
| 3811 | IN UINTN Length\r | |
| 3812 | );\r | |
| 3813 | \r | |
| 3814 | \r | |
| 3815 | /**\r | |
| af2dc6a7 | 3816 | Executes an FC instruction.\r |
| 3817 | Executes an FC instruction on the cache line specified by Address.\r | |
| ac644614 | 3818 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
| 1a2f870c | 3819 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
| ac644614 | 3820 | \r |
| ee6c452c | 3821 | @param Address The Address of cache line to be flushed.\r |
| ac644614 | 3822 | \r |
| 3823 | @return The address of FC instruction executed.\r | |
| 3824 | \r | |
| 3825 | **/\r | |
| 3826 | UINT64\r | |
| 3827 | EFIAPI\r | |
| 3828 | AsmFc (\r | |
| 3829 | IN UINT64 Address\r | |
| 3830 | );\r | |
| 3831 | \r | |
| 3832 | \r | |
| 3833 | /**\r | |
| af2dc6a7 | 3834 | Executes an FC.I instruction.\r |
| 3835 | Executes an FC.I instruction on the cache line specified by Address.\r | |
| ac644614 | 3836 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
| 1a2f870c | 3837 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
| ac644614 | 3838 | \r |
| ee6c452c | 3839 | @param Address The Address of cache line to be flushed.\r |
| ac644614 | 3840 | \r |
| af2dc6a7 | 3841 | @return The address of the FC.I instruction executed.\r |
| ac644614 | 3842 | \r |
| 3843 | **/\r | |
| 3844 | UINT64\r | |
| 3845 | EFIAPI\r | |
| 3846 | AsmFci (\r | |
| 3847 | IN UINT64 Address\r | |
| 3848 | );\r | |
| 3849 | \r | |
| 3850 | \r | |
| 3851 | /**\r | |
| 3852 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
| 17f695ed | 3853 | \r |
| 3854 | Reads and returns the current value of Processor Identifier Register specified by Index. \r | |
| ac644614 | 3855 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r |
| 3856 | registers) is determined by CPUID [3] bits {7:0}.\r | |
| 3857 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
| 3858 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
| 3859 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
| 1a2f870c | 3860 | catch the faults. This function is only available on Itanium processors.\r |
| ac644614 | 3861 | \r |
| ee6c452c | 3862 | @param Index The 8-bit Processor Identifier Register index to read.\r |
| ac644614 | 3863 | \r |
| 3864 | @return The current value of Processor Identifier Register specified by Index.\r | |
| 3865 | \r | |
| 3866 | **/\r | |
| 3867 | UINT64\r | |
| 3868 | EFIAPI\r | |
| 3869 | AsmReadCpuid (\r | |
| 3870 | IN UINT8 Index\r | |
| 3871 | );\r | |
| 3872 | \r | |
| 3873 | \r | |
| 3874 | /**\r | |
| 3875 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
| 1a2f870c | 3876 | This function is only available on Itanium processors.\r |
| ac644614 | 3877 | \r |
| 3878 | @return The current value of PSR.\r | |
| 3879 | \r | |
| 3880 | **/\r | |
| 3881 | UINT64\r | |
| 3882 | EFIAPI\r | |
| 3883 | AsmReadPsr (\r | |
| 3884 | VOID\r | |
| 3885 | );\r | |
| 3886 | \r | |
| 3887 | \r | |
| 3888 | /**\r | |
| 3889 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
| 22388319 | 3890 | \r |
| ac644614 | 3891 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
| 22388319 | 3892 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r |
| 3893 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 1a2f870c | 3894 | fault handlers to catch the faults. This function is only available on Itanium processors.\r |
| ac644614 | 3895 | \r |
| ee6c452c | 3896 | @param Value The 64-bit value to write to PSR.\r |
| ac644614 | 3897 | \r |
| 3898 | @return The 64-bit value written to the PSR.\r | |
| 3899 | \r | |
| 3900 | **/\r | |
| 3901 | UINT64\r | |
| 3902 | EFIAPI\r | |
| 3903 | AsmWritePsr (\r | |
| 3904 | IN UINT64 Value\r | |
| 3905 | );\r | |
| 3906 | \r | |
| 3907 | \r | |
| 3908 | /**\r | |
| 3909 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
| 2fe241a2 | 3910 | \r |
| 3911 | Reads and returns the current value of KR0. \r | |
| 1a2f870c | 3912 | This function is only available on Itanium processors.\r |
| ac644614 | 3913 | \r |
| 3914 | @return The current value of KR0.\r | |
| 3915 | \r | |
| 3916 | **/\r | |
| 3917 | UINT64\r | |
| 3918 | EFIAPI\r | |
| 3919 | AsmReadKr0 (\r | |
| 3920 | VOID\r | |
| 3921 | );\r | |
| 3922 | \r | |
| 3923 | \r | |
| 3924 | /**\r | |
| 3925 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
| 2fe241a2 | 3926 | \r |
| 3927 | Reads and returns the current value of KR1. \r | |
| 1a2f870c | 3928 | This function is only available on Itanium processors.\r |
| ac644614 | 3929 | \r |
| 3930 | @return The current value of KR1.\r | |
| 3931 | \r | |
| 3932 | **/\r | |
| 3933 | UINT64\r | |
| 3934 | EFIAPI\r | |
| 3935 | AsmReadKr1 (\r | |
| 3936 | VOID\r | |
| 3937 | );\r | |
| 3938 | \r | |
| 3939 | \r | |
| 3940 | /**\r | |
| 3941 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
| 2fe241a2 | 3942 | \r |
| 3943 | Reads and returns the current value of KR2. \r | |
| 1a2f870c | 3944 | This function is only available on Itanium processors.\r |
| ac644614 | 3945 | \r |
| 3946 | @return The current value of KR2.\r | |
| 3947 | \r | |
| 3948 | **/\r | |
| 3949 | UINT64\r | |
| 3950 | EFIAPI\r | |
| 3951 | AsmReadKr2 (\r | |
| 3952 | VOID\r | |
| 3953 | );\r | |
| 3954 | \r | |
| 3955 | \r | |
| 3956 | /**\r | |
| 3957 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
| 2fe241a2 | 3958 | \r |
| 3959 | Reads and returns the current value of KR3. \r | |
| 1a2f870c | 3960 | This function is only available on Itanium processors.\r |
| ac644614 | 3961 | \r |
| 3962 | @return The current value of KR3.\r | |
| 3963 | \r | |
| 3964 | **/\r | |
| 3965 | UINT64\r | |
| 3966 | EFIAPI\r | |
| 3967 | AsmReadKr3 (\r | |
| 3968 | VOID\r | |
| 3969 | );\r | |
| 3970 | \r | |
| 3971 | \r | |
| 3972 | /**\r | |
| 3973 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
| ac644614 | 3974 | \r |
| 2fe241a2 | 3975 | Reads and returns the current value of KR4. \r |
| 1a2f870c | 3976 | This function is only available on Itanium processors.\r |
| 2fe241a2 | 3977 | \r |
| ac644614 | 3978 | @return The current value of KR4.\r |
| 3979 | \r | |
| 3980 | **/\r | |
| 3981 | UINT64\r | |
| 3982 | EFIAPI\r | |
| 3983 | AsmReadKr4 (\r | |
| 3984 | VOID\r | |
| 3985 | );\r | |
| 3986 | \r | |
| 3987 | \r | |
| 3988 | /**\r | |
| 3989 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
| 2fe241a2 | 3990 | \r |
| 3991 | Reads and returns the current value of KR5. \r | |
| 1a2f870c | 3992 | This function is only available on Itanium processors.\r |
| ac644614 | 3993 | \r |
| 3994 | @return The current value of KR5.\r | |
| 3995 | \r | |
| 3996 | **/\r | |
| 3997 | UINT64\r | |
| 3998 | EFIAPI\r | |
| 3999 | AsmReadKr5 (\r | |
| 4000 | VOID\r | |
| 4001 | );\r | |
| 4002 | \r | |
| 4003 | \r | |
| 4004 | /**\r | |
| 4005 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
| 2fe241a2 | 4006 | \r |
| 4007 | Reads and returns the current value of KR6. \r | |
| 1a2f870c | 4008 | This function is only available on Itanium processors.\r |
| ac644614 | 4009 | \r |
| 4010 | @return The current value of KR6.\r | |
| 4011 | \r | |
| 4012 | **/\r | |
| 4013 | UINT64\r | |
| 4014 | EFIAPI\r | |
| 4015 | AsmReadKr6 (\r | |
| 4016 | VOID\r | |
| 4017 | );\r | |
| 4018 | \r | |
| 4019 | \r | |
| 4020 | /**\r | |
| 4021 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
| 2fe241a2 | 4022 | \r |
| 4023 | Reads and returns the current value of KR7. \r | |
| 1a2f870c | 4024 | This function is only available on Itanium processors.\r |
| ac644614 | 4025 | \r |
| 4026 | @return The current value of KR7.\r | |
| 4027 | \r | |
| 4028 | **/\r | |
| 4029 | UINT64\r | |
| 4030 | EFIAPI\r | |
| 4031 | AsmReadKr7 (\r | |
| 4032 | VOID\r | |
| 4033 | );\r | |
| 4034 | \r | |
| 4035 | \r | |
| 4036 | /**\r | |
| 4037 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
| 2fe241a2 | 4038 | \r |
| 4039 | Writes the current value of KR0. The 64-bit value written to \r | |
| 1a2f870c | 4040 | the KR0 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4041 | \r |
| ee6c452c | 4042 | @param Value The 64-bit value to write to KR0.\r |
| ac644614 | 4043 | \r |
| 4044 | @return The 64-bit value written to the KR0.\r | |
| 4045 | \r | |
| 4046 | **/\r | |
| 4047 | UINT64\r | |
| 4048 | EFIAPI\r | |
| 4049 | AsmWriteKr0 (\r | |
| 4050 | IN UINT64 Value\r | |
| 4051 | );\r | |
| 4052 | \r | |
| 4053 | \r | |
| 4054 | /**\r | |
| 4055 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
| 2fe241a2 | 4056 | \r |
| 4057 | Writes the current value of KR1. The 64-bit value written to \r | |
| 1a2f870c | 4058 | the KR1 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4059 | \r |
| ee6c452c | 4060 | @param Value The 64-bit value to write to KR1.\r |
| ac644614 | 4061 | \r |
| 4062 | @return The 64-bit value written to the KR1.\r | |
| 4063 | \r | |
| 4064 | **/\r | |
| 4065 | UINT64\r | |
| 4066 | EFIAPI\r | |
| 4067 | AsmWriteKr1 (\r | |
| 4068 | IN UINT64 Value\r | |
| 4069 | );\r | |
| 4070 | \r | |
| 4071 | \r | |
| 4072 | /**\r | |
| 4073 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
| 2fe241a2 | 4074 | \r |
| 4075 | Writes the current value of KR2. The 64-bit value written to \r | |
| 1a2f870c | 4076 | the KR2 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4077 | \r |
| ee6c452c | 4078 | @param Value The 64-bit value to write to KR2.\r |
| ac644614 | 4079 | \r |
| 4080 | @return The 64-bit value written to the KR2.\r | |
| 4081 | \r | |
| 4082 | **/\r | |
| 4083 | UINT64\r | |
| 4084 | EFIAPI\r | |
| 4085 | AsmWriteKr2 (\r | |
| 4086 | IN UINT64 Value\r | |
| 4087 | );\r | |
| 4088 | \r | |
| 4089 | \r | |
| 4090 | /**\r | |
| 4091 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
| 2fe241a2 | 4092 | \r |
| 4093 | Writes the current value of KR3. The 64-bit value written to \r | |
| 1a2f870c | 4094 | the KR3 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4095 | \r |
| ee6c452c | 4096 | @param Value The 64-bit value to write to KR3.\r |
| ac644614 | 4097 | \r |
| 4098 | @return The 64-bit value written to the KR3.\r | |
| 4099 | \r | |
| 4100 | **/\r | |
| 4101 | UINT64\r | |
| 4102 | EFIAPI\r | |
| 4103 | AsmWriteKr3 (\r | |
| 4104 | IN UINT64 Value\r | |
| 4105 | );\r | |
| 4106 | \r | |
| 4107 | \r | |
| 4108 | /**\r | |
| 4109 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
| 2fe241a2 | 4110 | \r |
| 4111 | Writes the current value of KR4. The 64-bit value written to \r | |
| 1a2f870c | 4112 | the KR4 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4113 | \r |
| ee6c452c | 4114 | @param Value The 64-bit value to write to KR4.\r |
| ac644614 | 4115 | \r |
| 4116 | @return The 64-bit value written to the KR4.\r | |
| 4117 | \r | |
| 4118 | **/\r | |
| 4119 | UINT64\r | |
| 4120 | EFIAPI\r | |
| 4121 | AsmWriteKr4 (\r | |
| 4122 | IN UINT64 Value\r | |
| 4123 | );\r | |
| 4124 | \r | |
| 4125 | \r | |
| 4126 | /**\r | |
| 4127 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
| 2fe241a2 | 4128 | \r |
| 4129 | Writes the current value of KR5. The 64-bit value written to \r | |
| 1a2f870c | 4130 | the KR5 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4131 | \r |
| ee6c452c | 4132 | @param Value The 64-bit value to write to KR5.\r |
| ac644614 | 4133 | \r |
| 4134 | @return The 64-bit value written to the KR5.\r | |
| 4135 | \r | |
| 4136 | **/\r | |
| 4137 | UINT64\r | |
| 4138 | EFIAPI\r | |
| 4139 | AsmWriteKr5 (\r | |
| 4140 | IN UINT64 Value\r | |
| 4141 | );\r | |
| 4142 | \r | |
| 4143 | \r | |
| 4144 | /**\r | |
| 4145 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
| 2fe241a2 | 4146 | \r |
| 4147 | Writes the current value of KR6. The 64-bit value written to \r | |
| 1a2f870c | 4148 | the KR6 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4149 | \r |
| ee6c452c | 4150 | @param Value The 64-bit value to write to KR6.\r |
| ac644614 | 4151 | \r |
| 4152 | @return The 64-bit value written to the KR6.\r | |
| 4153 | \r | |
| 4154 | **/\r | |
| 4155 | UINT64\r | |
| 4156 | EFIAPI\r | |
| 4157 | AsmWriteKr6 (\r | |
| 4158 | IN UINT64 Value\r | |
| 4159 | );\r | |
| 4160 | \r | |
| 4161 | \r | |
| 4162 | /**\r | |
| 4163 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
| 2fe241a2 | 4164 | \r |
| 4165 | Writes the current value of KR7. The 64-bit value written to \r | |
| 1a2f870c | 4166 | the KR7 is returned. This function is only available on Itanium processors.\r |
| ac644614 | 4167 | \r |
| ee6c452c | 4168 | @param Value The 64-bit value to write to KR7.\r |
| ac644614 | 4169 | \r |
| 4170 | @return The 64-bit value written to the KR7.\r | |
| 4171 | \r | |
| 4172 | **/\r | |
| 4173 | UINT64\r | |
| 4174 | EFIAPI\r | |
| 4175 | AsmWriteKr7 (\r | |
| 4176 | IN UINT64 Value\r | |
| 4177 | );\r | |
| 4178 | \r | |
| 4179 | \r | |
| 4180 | /**\r | |
| 4181 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
| 2fe241a2 | 4182 | \r |
| 4183 | Reads and returns the current value of ITC.\r | |
| 1a2f870c | 4184 | This function is only available on Itanium processors.\r |
| ac644614 | 4185 | \r |
| 4186 | @return The current value of ITC.\r | |
| 4187 | \r | |
| 4188 | **/\r | |
| 4189 | UINT64\r | |
| 4190 | EFIAPI\r | |
| 4191 | AsmReadItc (\r | |
| 4192 | VOID\r | |
| 4193 | );\r | |
| 4194 | \r | |
| 4195 | \r | |
| 4196 | /**\r | |
| 4197 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
| 2fe241a2 | 4198 | \r |
| 4199 | Reads and returns the current value of ITV. \r | |
| 1a2f870c | 4200 | This function is only available on Itanium processors.\r |
| ac644614 | 4201 | \r |
| 4202 | @return The current value of ITV.\r | |
| 4203 | \r | |
| 4204 | **/\r | |
| 4205 | UINT64\r | |
| 4206 | EFIAPI\r | |
| 4207 | AsmReadItv (\r | |
| 4208 | VOID\r | |
| 4209 | );\r | |
| 4210 | \r | |
| 4211 | \r | |
| 4212 | /**\r | |
| 4213 | Reads the current value of Interval Timer Match Register (ITM).\r | |
| 2fe241a2 | 4214 | \r |
| 4215 | Reads and returns the current value of ITM.\r | |
| 1a2f870c | 4216 | This function is only available on Itanium processors.\r |
| ac644614 | 4217 | \r |
| 4218 | @return The current value of ITM.\r | |
| 4219 | **/\r | |
| 4220 | UINT64\r | |
| 4221 | EFIAPI\r | |
| 4222 | AsmReadItm (\r | |
| 4223 | VOID\r | |
| 4224 | );\r | |
| 4225 | \r | |
| 4226 | \r | |
| 4227 | /**\r | |
| 4228 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
| 2fe241a2 | 4229 | \r |
| 4230 | Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r | |
| 1a2f870c | 4231 | This function is only available on Itanium processors.\r |
| ac644614 | 4232 | \r |
| ee6c452c | 4233 | @param Value The 64-bit value to write to ITC.\r |
| ac644614 | 4234 | \r |
| 4235 | @return The 64-bit value written to the ITC.\r | |
| 4236 | \r | |
| 4237 | **/\r | |
| 4238 | UINT64\r | |
| 4239 | EFIAPI\r | |
| 4240 | AsmWriteItc (\r | |
| 4241 | IN UINT64 Value\r | |
| 4242 | );\r | |
| 4243 | \r | |
| 4244 | \r | |
| 4245 | /**\r | |
| 4246 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
| 2fe241a2 | 4247 | \r |
| 4248 | Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r | |
| 1a2f870c | 4249 | This function is only available on Itanium processors.\r |
| ac644614 | 4250 | \r |
| ee6c452c | 4251 | @param Value The 64-bit value to write to ITM.\r |
| ac644614 | 4252 | \r |
| 4253 | @return The 64-bit value written to the ITM.\r | |
| 4254 | \r | |
| 4255 | **/\r | |
| 4256 | UINT64\r | |
| 4257 | EFIAPI\r | |
| 4258 | AsmWriteItm (\r | |
| 4259 | IN UINT64 Value\r | |
| 4260 | );\r | |
| 4261 | \r | |
| 4262 | \r | |
| 4263 | /**\r | |
| 4264 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
| 2fe241a2 | 4265 | \r |
| 4266 | Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r | |
| ac644614 | 4267 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
| 4268 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4269 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4270 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4271 | This function is only available on Itanium processors.\r |
| ac644614 | 4272 | \r |
| ee6c452c | 4273 | @param Value The 64-bit value to write to ITV.\r |
| ac644614 | 4274 | \r |
| 4275 | @return The 64-bit value written to the ITV.\r | |
| 4276 | \r | |
| 4277 | **/\r | |
| 4278 | UINT64\r | |
| 4279 | EFIAPI\r | |
| 4280 | AsmWriteItv (\r | |
| 4281 | IN UINT64 Value\r | |
| 4282 | );\r | |
| 4283 | \r | |
| 4284 | \r | |
| 4285 | /**\r | |
| 4286 | Reads the current value of Default Control Register (DCR).\r | |
| 2fe241a2 | 4287 | \r |
| 1a2f870c | 4288 | Reads and returns the current value of DCR. This function is only available on Itanium processors.\r |
| ac644614 | 4289 | \r |
| 4290 | @return The current value of DCR.\r | |
| 4291 | \r | |
| 4292 | **/\r | |
| 4293 | UINT64\r | |
| 4294 | EFIAPI\r | |
| 4295 | AsmReadDcr (\r | |
| 4296 | VOID\r | |
| 4297 | );\r | |
| 4298 | \r | |
| 4299 | \r | |
| 4300 | /**\r | |
| 4301 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
| 2fe241a2 | 4302 | \r |
| 1a2f870c | 4303 | Reads and returns the current value of IVA. This function is only available on Itanium processors.\r |
| ac644614 | 4304 | \r |
| 4305 | @return The current value of IVA.\r | |
| 4306 | **/\r | |
| 4307 | UINT64\r | |
| 4308 | EFIAPI\r | |
| 4309 | AsmReadIva (\r | |
| 4310 | VOID\r | |
| 4311 | );\r | |
| 4312 | \r | |
| 4313 | \r | |
| 4314 | /**\r | |
| 4315 | Reads the current value of Page Table Address Register (PTA).\r | |
| 2fe241a2 | 4316 | \r |
| 1a2f870c | 4317 | Reads and returns the current value of PTA. This function is only available on Itanium processors.\r |
| ac644614 | 4318 | \r |
| 4319 | @return The current value of PTA.\r | |
| 4320 | \r | |
| 4321 | **/\r | |
| 4322 | UINT64\r | |
| 4323 | EFIAPI\r | |
| 4324 | AsmReadPta (\r | |
| 4325 | VOID\r | |
| 4326 | );\r | |
| 4327 | \r | |
| 4328 | \r | |
| 4329 | /**\r | |
| 4330 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
| 2fe241a2 | 4331 | \r |
| 4332 | Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r | |
| ac644614 | 4333 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
| 4334 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4335 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4336 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4337 | This function is only available on Itanium processors.\r |
| ac644614 | 4338 | \r |
| ee6c452c | 4339 | @param Value The 64-bit value to write to DCR.\r |
| ac644614 | 4340 | \r |
| 4341 | @return The 64-bit value written to the DCR.\r | |
| 4342 | \r | |
| 4343 | **/\r | |
| 4344 | UINT64\r | |
| 4345 | EFIAPI\r | |
| 4346 | AsmWriteDcr (\r | |
| 4347 | IN UINT64 Value\r | |
| 4348 | );\r | |
| 4349 | \r | |
| 4350 | \r | |
| 4351 | /**\r | |
| 4352 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
| 2fe241a2 | 4353 | \r |
| 4354 | Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r | |
| ac644614 | 4355 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r |
| 4356 | the low 15 bits of Value is ignored when written.\r | |
| 1a2f870c | 4357 | This function is only available on Itanium processors.\r |
| ac644614 | 4358 | \r |
| ee6c452c | 4359 | @param Value The 64-bit value to write to IVA.\r |
| ac644614 | 4360 | \r |
| 4361 | @return The 64-bit value written to the IVA.\r | |
| 4362 | \r | |
| 4363 | **/\r | |
| 4364 | UINT64\r | |
| 4365 | EFIAPI\r | |
| 4366 | AsmWriteIva (\r | |
| 4367 | IN UINT64 Value\r | |
| 4368 | );\r | |
| 4369 | \r | |
| 4370 | \r | |
| 4371 | /**\r | |
| 4372 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
| 2fe241a2 | 4373 | \r |
| 4374 | Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r | |
| ac644614 | 4375 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
| 4376 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4377 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4378 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4379 | This function is only available on Itanium processors.\r |
| ac644614 | 4380 | \r |
| ee6c452c | 4381 | @param Value The 64-bit value to write to PTA.\r |
| ac644614 | 4382 | \r |
| 4383 | @return The 64-bit value written to the PTA.\r | |
| 4384 | **/\r | |
| 4385 | UINT64\r | |
| 4386 | EFIAPI\r | |
| 4387 | AsmWritePta (\r | |
| 4388 | IN UINT64 Value\r | |
| 4389 | );\r | |
| 4390 | \r | |
| 4391 | \r | |
| 4392 | /**\r | |
| 4393 | Reads the current value of Local Interrupt ID Register (LID).\r | |
| 2fe241a2 | 4394 | \r |
| 1a2f870c | 4395 | Reads and returns the current value of LID. This function is only available on Itanium processors.\r |
| ac644614 | 4396 | \r |
| 4397 | @return The current value of LID.\r | |
| 4398 | \r | |
| 4399 | **/\r | |
| 4400 | UINT64\r | |
| 4401 | EFIAPI\r | |
| 4402 | AsmReadLid (\r | |
| 4403 | VOID\r | |
| 4404 | );\r | |
| 4405 | \r | |
| 4406 | \r | |
| 4407 | /**\r | |
| 4408 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
| 2fe241a2 | 4409 | \r |
| 1a2f870c | 4410 | Reads and returns the current value of IVR. This function is only available on Itanium processors. \r |
| ac644614 | 4411 | \r |
| 4412 | @return The current value of IVR.\r | |
| 4413 | \r | |
| 4414 | **/\r | |
| 4415 | UINT64\r | |
| 4416 | EFIAPI\r | |
| 4417 | AsmReadIvr (\r | |
| 4418 | VOID\r | |
| 4419 | );\r | |
| 4420 | \r | |
| 4421 | \r | |
| 4422 | /**\r | |
| 4423 | Reads the current value of Task Priority Register (TPR).\r | |
| 2fe241a2 | 4424 | \r |
| 1a2f870c | 4425 | Reads and returns the current value of TPR. This function is only available on Itanium processors. \r |
| ac644614 | 4426 | \r |
| 4427 | @return The current value of TPR.\r | |
| 4428 | \r | |
| 4429 | **/\r | |
| 4430 | UINT64\r | |
| 4431 | EFIAPI\r | |
| 4432 | AsmReadTpr (\r | |
| 4433 | VOID\r | |
| 4434 | );\r | |
| 4435 | \r | |
| 4436 | \r | |
| 4437 | /**\r | |
| 4438 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
| 2fe241a2 | 4439 | \r |
| 1a2f870c | 4440 | Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r |
| ac644614 | 4441 | \r |
| 4442 | @return The current value of IRR0.\r | |
| 4443 | \r | |
| 4444 | **/\r | |
| 4445 | UINT64\r | |
| 4446 | EFIAPI\r | |
| 4447 | AsmReadIrr0 (\r | |
| 4448 | VOID\r | |
| 4449 | );\r | |
| 4450 | \r | |
| 4451 | \r | |
| 4452 | /**\r | |
| 4453 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
| 2fe241a2 | 4454 | \r |
| 1a2f870c | 4455 | Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r |
| ac644614 | 4456 | \r |
| 4457 | @return The current value of IRR1.\r | |
| 4458 | \r | |
| 4459 | **/\r | |
| 4460 | UINT64\r | |
| 4461 | EFIAPI\r | |
| 4462 | AsmReadIrr1 (\r | |
| 4463 | VOID\r | |
| 4464 | );\r | |
| 4465 | \r | |
| 4466 | \r | |
| 4467 | /**\r | |
| 4468 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
| 2fe241a2 | 4469 | \r |
| 1a2f870c | 4470 | Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r |
| ac644614 | 4471 | \r |
| 4472 | @return The current value of IRR2.\r | |
| 4473 | \r | |
| 4474 | **/\r | |
| 4475 | UINT64\r | |
| 4476 | EFIAPI\r | |
| 4477 | AsmReadIrr2 (\r | |
| 4478 | VOID\r | |
| 4479 | );\r | |
| 4480 | \r | |
| 4481 | \r | |
| 4482 | /**\r | |
| 4483 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
| 2fe241a2 | 4484 | \r |
| 1a2f870c | 4485 | Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r |
| ac644614 | 4486 | \r |
| 4487 | @return The current value of IRR3.\r | |
| 4488 | \r | |
| 4489 | **/\r | |
| 4490 | UINT64\r | |
| 4491 | EFIAPI\r | |
| 4492 | AsmReadIrr3 (\r | |
| 4493 | VOID\r | |
| 4494 | );\r | |
| 4495 | \r | |
| 4496 | \r | |
| 4497 | /**\r | |
| 4498 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
| 2fe241a2 | 4499 | \r |
| 1a2f870c | 4500 | Reads and returns the current value of PMV. This function is only available on Itanium processors. \r |
| ac644614 | 4501 | \r |
| 4502 | @return The current value of PMV.\r | |
| 4503 | \r | |
| 4504 | **/\r | |
| 4505 | UINT64\r | |
| 4506 | EFIAPI\r | |
| 4507 | AsmReadPmv (\r | |
| 4508 | VOID\r | |
| 4509 | );\r | |
| 4510 | \r | |
| 4511 | \r | |
| 4512 | /**\r | |
| 4513 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
| 2fe241a2 | 4514 | \r |
| 1a2f870c | 4515 | Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r |
| ac644614 | 4516 | \r |
| 4517 | @return The current value of CMCV.\r | |
| 4518 | \r | |
| 4519 | **/\r | |
| 4520 | UINT64\r | |
| 4521 | EFIAPI\r | |
| 4522 | AsmReadCmcv (\r | |
| 4523 | VOID\r | |
| 4524 | );\r | |
| 4525 | \r | |
| 4526 | \r | |
| 4527 | /**\r | |
| 4528 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
| 2fe241a2 | 4529 | \r |
| 1a2f870c | 4530 | Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r |
| ac644614 | 4531 | \r |
| 4532 | @return The current value of LRR0.\r | |
| 4533 | \r | |
| 4534 | **/\r | |
| 4535 | UINT64\r | |
| 4536 | EFIAPI\r | |
| 4537 | AsmReadLrr0 (\r | |
| 4538 | VOID\r | |
| 4539 | );\r | |
| 4540 | \r | |
| 4541 | \r | |
| 4542 | /**\r | |
| 4543 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
| 2fe241a2 | 4544 | \r |
| 1a2f870c | 4545 | Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r |
| ac644614 | 4546 | \r |
| 4547 | @return The current value of LRR1.\r | |
| 4548 | \r | |
| 4549 | **/\r | |
| 4550 | UINT64\r | |
| 4551 | EFIAPI\r | |
| 4552 | AsmReadLrr1 (\r | |
| 4553 | VOID\r | |
| 4554 | );\r | |
| 4555 | \r | |
| 4556 | \r | |
| 4557 | /**\r | |
| 4558 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
| 2fe241a2 | 4559 | \r |
| 4560 | Writes the current value of LID. The 64-bit value written to the LID is returned. \r | |
| ac644614 | 4561 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
| 4562 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4563 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4564 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4565 | This function is only available on Itanium processors.\r |
| ac644614 | 4566 | \r |
| ee6c452c | 4567 | @param Value The 64-bit value to write to LID.\r |
| ac644614 | 4568 | \r |
| 4569 | @return The 64-bit value written to the LID.\r | |
| 4570 | \r | |
| 4571 | **/\r | |
| 4572 | UINT64\r | |
| 4573 | EFIAPI\r | |
| 4574 | AsmWriteLid (\r | |
| 4575 | IN UINT64 Value\r | |
| 4576 | );\r | |
| 4577 | \r | |
| 4578 | \r | |
| 4579 | /**\r | |
| 4580 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
| 2fe241a2 | 4581 | \r |
| 4582 | Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r | |
| ac644614 | 4583 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
| 4584 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4585 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4586 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4587 | This function is only available on Itanium processors.\r |
| ac644614 | 4588 | \r |
| ee6c452c | 4589 | @param Value The 64-bit value to write to TPR.\r |
| ac644614 | 4590 | \r |
| 4591 | @return The 64-bit value written to the TPR.\r | |
| 4592 | \r | |
| 4593 | **/\r | |
| 4594 | UINT64\r | |
| 4595 | EFIAPI\r | |
| 4596 | AsmWriteTpr (\r | |
| 4597 | IN UINT64 Value\r | |
| 4598 | );\r | |
| 4599 | \r | |
| 4600 | \r | |
| 4601 | /**\r | |
| 4602 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
| 2fe241a2 | 4603 | \r |
| 1a2f870c | 4604 | Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r |
| ac644614 | 4605 | \r |
| 4606 | **/\r | |
| 4607 | VOID\r | |
| 4608 | EFIAPI\r | |
| 4609 | AsmWriteEoi (\r | |
| 4610 | VOID\r | |
| 4611 | );\r | |
| 4612 | \r | |
| 4613 | \r | |
| 4614 | /**\r | |
| 4615 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
| 2fe241a2 | 4616 | \r |
| 4617 | Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r | |
| ac644614 | 4618 | No parameter checking is performed on Value. All bits of Value corresponding\r |
| 4619 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4620 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4621 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4622 | This function is only available on Itanium processors.\r |
| ac644614 | 4623 | \r |
| ee6c452c | 4624 | @param Value The 64-bit value to write to PMV.\r |
| ac644614 | 4625 | \r |
| 4626 | @return The 64-bit value written to the PMV.\r | |
| 4627 | \r | |
| 4628 | **/\r | |
| 4629 | UINT64\r | |
| 4630 | EFIAPI\r | |
| 4631 | AsmWritePmv (\r | |
| 4632 | IN UINT64 Value\r | |
| 4633 | );\r | |
| 4634 | \r | |
| 4635 | \r | |
| 4636 | /**\r | |
| 4637 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
| 2fe241a2 | 4638 | \r |
| 4639 | Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r | |
| ac644614 | 4640 | No parameter checking is performed on Value. All bits of Value corresponding\r |
| 4641 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4642 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4643 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4644 | This function is only available on Itanium processors.\r |
| ac644614 | 4645 | \r |
| ee6c452c | 4646 | @param Value The 64-bit value to write to CMCV.\r |
| ac644614 | 4647 | \r |
| 4648 | @return The 64-bit value written to the CMCV.\r | |
| 4649 | \r | |
| 4650 | **/\r | |
| 4651 | UINT64\r | |
| 4652 | EFIAPI\r | |
| 4653 | AsmWriteCmcv (\r | |
| 4654 | IN UINT64 Value\r | |
| 4655 | );\r | |
| 4656 | \r | |
| 4657 | \r | |
| 4658 | /**\r | |
| 4659 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
| 2fe241a2 | 4660 | \r |
| 4661 | Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r | |
| ac644614 | 4662 | No parameter checking is performed on Value. All bits of Value corresponding\r |
| 4663 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4664 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
| 4665 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4666 | This function is only available on Itanium processors.\r |
| ac644614 | 4667 | \r |
| ee6c452c | 4668 | @param Value The 64-bit value to write to LRR0.\r |
| ac644614 | 4669 | \r |
| 4670 | @return The 64-bit value written to the LRR0.\r | |
| 4671 | \r | |
| 4672 | **/\r | |
| 4673 | UINT64\r | |
| 4674 | EFIAPI\r | |
| 4675 | AsmWriteLrr0 (\r | |
| 4676 | IN UINT64 Value\r | |
| 4677 | );\r | |
| 4678 | \r | |
| 4679 | \r | |
| 4680 | /**\r | |
| 4681 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
| 2fe241a2 | 4682 | \r |
| 4683 | Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r | |
| ac644614 | 4684 | No parameter checking is performed on Value. All bits of Value corresponding\r |
| 4685 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
| 4686 | The caller must either guarantee that Value is valid, or the caller must\r | |
| 4687 | set up fault handlers to catch the faults.\r | |
| 1a2f870c | 4688 | This function is only available on Itanium processors.\r |
| ac644614 | 4689 | \r |
| ee6c452c | 4690 | @param Value The 64-bit value to write to LRR1.\r |
| ac644614 | 4691 | \r |
| 4692 | @return The 64-bit value written to the LRR1.\r | |
| 4693 | \r | |
| 4694 | **/\r | |
| 4695 | UINT64\r | |
| 4696 | EFIAPI\r | |
| 4697 | AsmWriteLrr1 (\r | |
| 4698 | IN UINT64 Value\r | |
| 4699 | );\r | |
| 4700 | \r | |
| 4701 | \r | |
| 4702 | /**\r | |
| 4703 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
| 4704 | \r | |
| 4705 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
| 4706 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
| af2dc6a7 | 4707 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
| ac644614 | 4708 | on all processor models. Implemented registers are contiguous starting with\r |
| 4709 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
| 4710 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
| 4711 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
| 4712 | set up fault handlers to catch the faults.\r | |
| 1a2f870c | 4713 | This function is only available on Itanium processors.\r |
| ac644614 | 4714 | \r |
| ee6c452c | 4715 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r |
| ac644614 | 4716 | \r |
| 4717 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
| 4718 | \r | |
| 4719 | **/\r | |
| 4720 | UINT64\r | |
| 4721 | EFIAPI\r | |
| 4722 | AsmReadIbr (\r | |
| 4723 | IN UINT8 Index\r | |
| 4724 | );\r | |
| 4725 | \r | |
| 4726 | \r | |
| 4727 | /**\r | |
| 4728 | Reads the current value of Data Breakpoint Register (DBR).\r | |
| 4729 | \r | |
| 4730 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
| 4731 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
| af2dc6a7 | 4732 | mask conditions. At least four data registers pairs are implemented on all processor\r |
| ac644614 | 4733 | models. Implemented registers are contiguous starting with register 0.\r |
| 4734 | No parameter checking is performed on Index. If the Index value is beyond\r | |
| 4735 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
| 4736 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
| 4737 | fault handlers to catch the faults.\r | |
| 1a2f870c | 4738 | This function is only available on Itanium processors.\r |
| ac644614 | 4739 | \r |
| ee6c452c | 4740 | @param Index The 8-bit Data Breakpoint Register index to read.\r |
| ac644614 | 4741 | \r |
| 4742 | @return The current value of Data Breakpoint Register specified by Index.\r | |
| 4743 | \r | |
| 4744 | **/\r | |
| 4745 | UINT64\r | |
| 4746 | EFIAPI\r | |
| 4747 | AsmReadDbr (\r | |
| 4748 | IN UINT8 Index\r | |
| 4749 | );\r | |
| 4750 | \r | |
| 4751 | \r | |
| 4752 | /**\r | |
| 4753 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
| 4754 | \r | |
| af2dc6a7 | 4755 | All processor implementations provide at least four performance counters\r |
| 4756 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
| ac644614 | 4757 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
| 4758 | additional implementation-dependent PMC and PMD to increase the number of\r | |
| 4759 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
| 4760 | register set is implementation dependent. No parameter checking is performed\r | |
| 4761 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
| 4762 | zero value will be returned.\r | |
| 1a2f870c | 4763 | This function is only available on Itanium processors.\r |
| ac644614 | 4764 | \r |
| ee6c452c | 4765 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r |
| ac644614 | 4766 | \r |
| 2fe241a2 | 4767 | @return The current value of Performance Monitor Configuration Register\r |
| 4768 | specified by Index.\r | |
| ac644614 | 4769 | \r |
| 4770 | **/\r | |
| 4771 | UINT64\r | |
| 4772 | EFIAPI\r | |
| 4773 | AsmReadPmc (\r | |
| 4774 | IN UINT8 Index\r | |
| 4775 | );\r | |
| 4776 | \r | |
| 4777 | \r | |
| 4778 | /**\r | |
| 4779 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
| 4780 | \r | |
| 4781 | All processor implementations provide at least 4 performance counters\r | |
| 4782 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
| 4783 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r | |
| 4784 | provide additional implementation-dependent PMC and PMD to increase the number\r | |
| 4785 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
| 4786 | register set is implementation dependent. No parameter checking is performed\r | |
| 4787 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
| 4788 | zero value will be returned.\r | |
| 1a2f870c | 4789 | This function is only available on Itanium processors.\r |
| ac644614 | 4790 | \r |
| ee6c452c | 4791 | @param Index The 8-bit Performance Monitor Data Register index to read.\r |
| ac644614 | 4792 | \r |
| 4793 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
| 4794 | \r | |
| 4795 | **/\r | |
| 4796 | UINT64\r | |
| 4797 | EFIAPI\r | |
| 4798 | AsmReadPmd (\r | |
| 4799 | IN UINT8 Index\r | |
| 4800 | );\r | |
| 4801 | \r | |
| 4802 | \r | |
| 4803 | /**\r | |
| 4804 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
| 4805 | \r | |
| 4806 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
| 4807 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
| 4808 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
| af2dc6a7 | 4809 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
| ac644614 | 4810 | on all processor models. Implemented registers are contiguous starting with\r |
| 4811 | register 0. No parameter checking is performed on Index. If the Index value\r | |
| 4812 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
| 4813 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
| 4814 | set up fault handlers to catch the faults.\r | |
| 1a2f870c | 4815 | This function is only available on Itanium processors.\r |
| ac644614 | 4816 | \r |
| ee6c452c | 4817 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r |
| 4818 | @param Value The 64-bit value to write to IBR.\r | |
| ac644614 | 4819 | \r |
| 4820 | @return The 64-bit value written to the IBR.\r | |
| 4821 | \r | |
| 4822 | **/\r | |
| 4823 | UINT64\r | |
| 4824 | EFIAPI\r | |
| 4825 | AsmWriteIbr (\r | |
| 4826 | IN UINT8 Index,\r | |
| 4827 | IN UINT64 Value\r | |
| 4828 | );\r | |
| 4829 | \r | |
| 4830 | \r | |
| 4831 | /**\r | |
| 4832 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
| 4833 | \r | |
| 4834 | Writes current value of Data Breakpoint Register specified by Index.\r | |
| 4835 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
| 4836 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
| af2dc6a7 | 4837 | mask conditions. At least four data registers pairs are implemented on all processor\r |
| ac644614 | 4838 | models. Implemented registers are contiguous starting with register 0. No parameter\r |
| 4839 | checking is performed on Index. If the Index value is beyond the implemented\r | |
| 4840 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
| 4841 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
| 4842 | catch the faults.\r | |
| 1a2f870c | 4843 | This function is only available on Itanium processors.\r |
| ac644614 | 4844 | \r |
| ee6c452c | 4845 | @param Index The 8-bit Data Breakpoint Register index to write.\r |
| 4846 | @param Value The 64-bit value to write to DBR.\r | |
| ac644614 | 4847 | \r |
| 4848 | @return The 64-bit value written to the DBR.\r | |
| 4849 | \r | |
| 4850 | **/\r | |
| 4851 | UINT64\r | |
| 4852 | EFIAPI\r | |
| 4853 | AsmWriteDbr (\r | |
| 4854 | IN UINT8 Index,\r | |
| 4855 | IN UINT64 Value\r | |
| 4856 | );\r | |
| 4857 | \r | |
| 4858 | \r | |
| 4859 | /**\r | |
| 4860 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
| 4861 | \r | |
| 4862 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
| af2dc6a7 | 4863 | All processor implementations provide at least four performance counters\r |
| 4864 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status\r | |
| ac644614 | 4865 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r |
| 4866 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
| 4867 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r | |
| 4868 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
| 4869 | beyond the implemented PMC register range, the write is ignored.\r | |
| 1a2f870c | 4870 | This function is only available on Itanium processors.\r |
| ac644614 | 4871 | \r |
| ee6c452c | 4872 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r |
| 4873 | @param Value The 64-bit value to write to PMC.\r | |
| ac644614 | 4874 | \r |
| 4875 | @return The 64-bit value written to the PMC.\r | |
| 4876 | \r | |
| 4877 | **/\r | |
| 4878 | UINT64\r | |
| 4879 | EFIAPI\r | |
| 4880 | AsmWritePmc (\r | |
| 4881 | IN UINT8 Index,\r | |
| 4882 | IN UINT64 Value\r | |
| 4883 | );\r | |
| 4884 | \r | |
| 4885 | \r | |
| 4886 | /**\r | |
| 4887 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
| 4888 | \r | |
| 4889 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
| af2dc6a7 | 4890 | All processor implementations provide at least four performance counters\r |
| 4891 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
| ac644614 | 4892 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
| 4893 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
| 4894 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r | |
| 4895 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
| 4896 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
| 1a2f870c | 4897 | This function is only available on Itanium processors.\r |
| ac644614 | 4898 | \r |
| ee6c452c | 4899 | @param Index The 8-bit Performance Monitor Data Register index to write.\r |
| 4900 | @param Value The 64-bit value to write to PMD.\r | |
| ac644614 | 4901 | \r |
| 4902 | @return The 64-bit value written to the PMD.\r | |
| 4903 | \r | |
| 4904 | **/\r | |
| 4905 | UINT64\r | |
| 4906 | EFIAPI\r | |
| 4907 | AsmWritePmd (\r | |
| 4908 | IN UINT8 Index,\r | |
| 4909 | IN UINT64 Value\r | |
| 4910 | );\r | |
| 4911 | \r | |
| 4912 | \r | |
| 4913 | /**\r | |
| 4914 | Reads the current value of 64-bit Global Pointer (GP).\r | |
| 4915 | \r | |
| 4916 | Reads and returns the current value of GP.\r | |
| 1a2f870c | 4917 | This function is only available on Itanium processors.\r |
| ac644614 | 4918 | \r |
| 4919 | @return The current value of GP.\r | |
| 4920 | \r | |
| 4921 | **/\r | |
| 4922 | UINT64\r | |
| 4923 | EFIAPI\r | |
| 4924 | AsmReadGp (\r | |
| 4925 | VOID\r | |
| 4926 | );\r | |
| 4927 | \r | |
| 4928 | \r | |
| 4929 | /**\r | |
| 4930 | Write the current value of 64-bit Global Pointer (GP).\r | |
| 4931 | \r | |
| 4932 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
| 4933 | No parameter checking is performed on Value.\r | |
| 1a2f870c | 4934 | This function is only available on Itanium processors.\r |
| ac644614 | 4935 | \r |
| 4936 | @param Value The 64-bit value to write to GP.\r | |
| 4937 | \r | |
| 4938 | @return The 64-bit value written to the GP.\r | |
| 4939 | \r | |
| 4940 | **/\r | |
| 4941 | UINT64\r | |
| 4942 | EFIAPI\r | |
| 4943 | AsmWriteGp (\r | |
| 4944 | IN UINT64 Value\r | |
| 4945 | );\r | |
| 4946 | \r | |
| 4947 | \r | |
| 4948 | /**\r | |
| 4949 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
| 4950 | \r | |
| 4951 | Reads and returns the current value of SP.\r | |
| 1a2f870c | 4952 | This function is only available on Itanium processors.\r |
| ac644614 | 4953 | \r |
| 4954 | @return The current value of SP.\r | |
| 4955 | \r | |
| 4956 | **/\r | |
| 4957 | UINT64\r | |
| 4958 | EFIAPI\r | |
| 4959 | AsmReadSp (\r | |
| 4960 | VOID\r | |
| 4961 | );\r | |
| 4962 | \r | |
| 4963 | \r | |
| aad6137d | 4964 | ///\r |
| af2dc6a7 | 4965 | /// Valid Index value for AsmReadControlRegister().\r |
| aad6137d | 4966 | ///\r |
| 4967 | #define IPF_CONTROL_REGISTER_DCR 0\r | |
| 4968 | #define IPF_CONTROL_REGISTER_ITM 1\r | |
| 4969 | #define IPF_CONTROL_REGISTER_IVA 2\r | |
| 4970 | #define IPF_CONTROL_REGISTER_PTA 8\r | |
| 4971 | #define IPF_CONTROL_REGISTER_IPSR 16\r | |
| 4972 | #define IPF_CONTROL_REGISTER_ISR 17\r | |
| 4973 | #define IPF_CONTROL_REGISTER_IIP 19\r | |
| 4974 | #define IPF_CONTROL_REGISTER_IFA 20\r | |
| 4975 | #define IPF_CONTROL_REGISTER_ITIR 21\r | |
| 4976 | #define IPF_CONTROL_REGISTER_IIPA 22\r | |
| 4977 | #define IPF_CONTROL_REGISTER_IFS 23\r | |
| 4978 | #define IPF_CONTROL_REGISTER_IIM 24\r | |
| 4979 | #define IPF_CONTROL_REGISTER_IHA 25\r | |
| 4980 | #define IPF_CONTROL_REGISTER_LID 64\r | |
| 4981 | #define IPF_CONTROL_REGISTER_IVR 65\r | |
| 4982 | #define IPF_CONTROL_REGISTER_TPR 66\r | |
| 4983 | #define IPF_CONTROL_REGISTER_EOI 67\r | |
| 4984 | #define IPF_CONTROL_REGISTER_IRR0 68\r | |
| 4985 | #define IPF_CONTROL_REGISTER_IRR1 69\r | |
| 4986 | #define IPF_CONTROL_REGISTER_IRR2 70\r | |
| 4987 | #define IPF_CONTROL_REGISTER_IRR3 71\r | |
| 4988 | #define IPF_CONTROL_REGISTER_ITV 72\r | |
| 4989 | #define IPF_CONTROL_REGISTER_PMV 73\r | |
| 4990 | #define IPF_CONTROL_REGISTER_CMCV 74\r | |
| 4991 | #define IPF_CONTROL_REGISTER_LRR0 80\r | |
| 4992 | #define IPF_CONTROL_REGISTER_LRR1 81\r | |
| 4993 | \r | |
| 4994 | /**\r | |
| 4995 | Reads a 64-bit control register.\r | |
| 4996 | \r | |
| af2dc6a7 | 4997 | Reads and returns the control register specified by Index. The valid Index valued \r |
| 4998 | are defined above in "Related Definitions".\r | |
| 4999 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
| 5000 | available on Itanium processors.\r | |
| aad6137d | 5001 | \r |
| 5002 | @param Index The index of the control register to read.\r | |
| 5003 | \r | |
| 5004 | @return The control register specified by Index.\r | |
| 5005 | \r | |
| 5006 | **/\r | |
| 5007 | UINT64\r | |
| 5008 | EFIAPI\r | |
| 5009 | AsmReadControlRegister (\r | |
| 5010 | IN UINT64 Index\r | |
| 5011 | );\r | |
| 5012 | \r | |
| 5013 | \r | |
| 5014 | ///\r | |
| af2dc6a7 | 5015 | /// Valid Index value for AsmReadApplicationRegister().\r |
| aad6137d | 5016 | ///\r |
| 5017 | #define IPF_APPLICATION_REGISTER_K0 0\r | |
| 5018 | #define IPF_APPLICATION_REGISTER_K1 1\r | |
| 5019 | #define IPF_APPLICATION_REGISTER_K2 2\r | |
| 5020 | #define IPF_APPLICATION_REGISTER_K3 3\r | |
| 5021 | #define IPF_APPLICATION_REGISTER_K4 4\r | |
| 5022 | #define IPF_APPLICATION_REGISTER_K5 5\r | |
| 5023 | #define IPF_APPLICATION_REGISTER_K6 6\r | |
| 5024 | #define IPF_APPLICATION_REGISTER_K7 7\r | |
| 5025 | #define IPF_APPLICATION_REGISTER_RSC 16\r | |
| 5026 | #define IPF_APPLICATION_REGISTER_BSP 17\r | |
| 5027 | #define IPF_APPLICATION_REGISTER_BSPSTORE 18\r | |
| 5028 | #define IPF_APPLICATION_REGISTER_RNAT 19\r | |
| 5029 | #define IPF_APPLICATION_REGISTER_FCR 21\r | |
| 5030 | #define IPF_APPLICATION_REGISTER_EFLAG 24\r | |
| 5031 | #define IPF_APPLICATION_REGISTER_CSD 25\r | |
| 5032 | #define IPF_APPLICATION_REGISTER_SSD 26\r | |
| 5033 | #define IPF_APPLICATION_REGISTER_CFLG 27\r | |
| 5034 | #define IPF_APPLICATION_REGISTER_FSR 28\r | |
| 5035 | #define IPF_APPLICATION_REGISTER_FIR 29\r | |
| 5036 | #define IPF_APPLICATION_REGISTER_FDR 30\r | |
| 5037 | #define IPF_APPLICATION_REGISTER_CCV 32\r | |
| 5038 | #define IPF_APPLICATION_REGISTER_UNAT 36\r | |
| 5039 | #define IPF_APPLICATION_REGISTER_FPSR 40\r | |
| 5040 | #define IPF_APPLICATION_REGISTER_ITC 44\r | |
| 5041 | #define IPF_APPLICATION_REGISTER_PFS 64\r | |
| 5042 | #define IPF_APPLICATION_REGISTER_LC 65\r | |
| 5043 | #define IPF_APPLICATION_REGISTER_EC 66\r | |
| 5044 | \r | |
| 5045 | /**\r | |
| 5046 | Reads a 64-bit application register.\r | |
| 5047 | \r | |
| af2dc6a7 | 5048 | Reads and returns the application register specified by Index. The valid Index \r |
| 5049 | valued are defined above in "Related Definitions".\r | |
| 5050 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
| 5051 | available on Itanium processors.\r | |
| aad6137d | 5052 | \r |
| 5053 | @param Index The index of the application register to read.\r | |
| 5054 | \r | |
| 5055 | @return The application register specified by Index.\r | |
| 5056 | \r | |
| 5057 | **/\r | |
| 5058 | UINT64\r | |
| 5059 | EFIAPI\r | |
| 5060 | AsmReadApplicationRegister (\r | |
| 5061 | IN UINT64 Index\r | |
| 5062 | );\r | |
| 5063 | \r | |
| 5064 | \r | |
| 59e0bb0c | 5065 | /**\r |
| 5066 | Reads the current value of a Machine Specific Register (MSR).\r | |
| 5067 | \r | |
| 5068 | Reads and returns the current value of the Machine Specific Register specified by Index. No\r | |
| 5069 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
| 5070 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
| 5071 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
| 1a2f870c | 5072 | only available on Itanium processors.\r |
| 59e0bb0c | 5073 | \r |
| 5074 | @param Index The 8-bit Machine Specific Register index to read.\r | |
| 5075 | \r | |
| 5076 | @return The current value of the Machine Specific Register specified by Index. \r | |
| 5077 | \r | |
| 5078 | **/\r | |
| 5079 | UINT64\r | |
| 5080 | EFIAPI\r | |
| 5081 | AsmReadMsr (\r | |
| 5082 | IN UINT8 Index \r | |
| 5083 | );\r | |
| 5084 | \r | |
| 5085 | \r | |
| 5086 | /**\r | |
| 5087 | Writes the current value of a Machine Specific Register (MSR).\r | |
| 5088 | \r | |
| 5089 | Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r | |
| 5090 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
| 5091 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
| 5092 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
| 1a2f870c | 5093 | only available on Itanium processors.\r |
| 59e0bb0c | 5094 | \r |
| 5095 | @param Index The 8-bit Machine Specific Register index to write.\r | |
| 5096 | @param Value The 64-bit value to write to the Machine Specific Register.\r | |
| 5097 | \r | |
| 5098 | @return The 64-bit value to write to the Machine Specific Register. \r | |
| 5099 | \r | |
| 5100 | **/\r | |
| 5101 | UINT64\r | |
| 5102 | EFIAPI\r | |
| 5103 | AsmWriteMsr (\r | |
| 5104 | IN UINT8 Index, \r | |
| 5105 | IN UINT64 Value \r | |
| 5106 | );\r | |
| 5107 | \r | |
| 5108 | \r | |
| ac644614 | 5109 | /**\r |
| 5110 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
| 5111 | \r | |
| 5112 | Determines the current execution mode of the CPU.\r | |
| 5113 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
| 5114 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
| 5115 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
| 5116 | and -1 is returned.\r | |
| 1a2f870c | 5117 | This function is only available on Itanium processors.\r |
| ac644614 | 5118 | \r |
| 17f695ed | 5119 | @retval 1 The CPU is in virtual mode.\r |
| 5120 | @retval 0 The CPU is in physical mode.\r | |
| 5121 | @retval -1 The CPU is in mixed mode.\r | |
| ac644614 | 5122 | \r |
| 5123 | **/\r | |
| 5124 | INT64\r | |
| 5125 | EFIAPI\r | |
| 5126 | AsmCpuVirtual (\r | |
| 5127 | VOID\r | |
| 5128 | );\r | |
| 5129 | \r | |
| 5130 | \r | |
| 5131 | /**\r | |
| 5132 | Makes a PAL procedure call.\r | |
| 5133 | \r | |
| 5134 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
| 5135 | value this API will make static or stacked PAL call. The following table\r | |
| 5136 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
| 5137 | may be designated as required or optional. If a PAL procedure is specified\r | |
| 5138 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
| 5139 | Status field of the PAL_CALL_RETURN structure.\r | |
| 5140 | This indicates that the procedure is not present in this PAL implementation.\r | |
| 5141 | It is the caller's responsibility to check for this return code after calling\r | |
| 5142 | any optional PAL procedure.\r | |
| 5143 | No parameter checking is performed on the 5 input parameters, but there are\r | |
| 5144 | some common rules that the caller should follow when making a PAL call. Any\r | |
| 5145 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
| 5146 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
| 5147 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
| 5148 | argument return value may be returned or undefined result may occur during the\r | |
| 5149 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
| 5150 | PAL entry point then the system behavior is undefined. This function is only\r | |
| 1a2f870c | 5151 | available on Itanium processors.\r |
| ac644614 | 5152 | \r |
| ee6c452c | 5153 | @param PalEntryPoint The PAL procedure calls entry point.\r |
| 5154 | @param Index The PAL procedure Index number.\r | |
| 5155 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
| 5156 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
| 5157 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
| ac644614 | 5158 | \r |
| 5159 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
| 5160 | \r | |
| 5161 | **/\r | |
| 5162 | PAL_CALL_RETURN\r | |
| 5163 | EFIAPI\r | |
| 5164 | AsmPalCall (\r | |
| 5165 | IN UINT64 PalEntryPoint,\r | |
| 5166 | IN UINT64 Index,\r | |
| 5167 | IN UINT64 Arg2,\r | |
| 5168 | IN UINT64 Arg3,\r | |
| 5169 | IN UINT64 Arg4\r | |
| 5170 | );\r | |
| fd163050 | 5171 | #endif\r |
| ac644614 | 5172 | \r |
| fd163050 | 5173 | #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r |
| 1106ffe1 | 5174 | ///\r |
| af2dc6a7 | 5175 | /// IA32 and x64 Specific Functions.\r |
| 5176 | /// Byte packed structure for 16-bit Real Mode EFLAGS.\r | |
| 1106ffe1 | 5177 | ///\r |
| ac644614 | 5178 | typedef union {\r |
| 5179 | struct {\r | |
| af2dc6a7 | 5180 | UINT32 CF:1; ///< Carry Flag.\r |
| 5181 | UINT32 Reserved_0:1; ///< Reserved.\r | |
| 5182 | UINT32 PF:1; ///< Parity Flag.\r | |
| 5183 | UINT32 Reserved_1:1; ///< Reserved.\r | |
| 5184 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
| 5185 | UINT32 Reserved_2:1; ///< Reserved.\r | |
| 5186 | UINT32 ZF:1; ///< Zero Flag.\r | |
| 5187 | UINT32 SF:1; ///< Sign Flag.\r | |
| 5188 | UINT32 TF:1; ///< Trap Flag.\r | |
| 5189 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
| 5190 | UINT32 DF:1; ///< Direction Flag.\r | |
| 5191 | UINT32 OF:1; ///< Overflow Flag.\r | |
| 5192 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
| 5193 | UINT32 NT:1; ///< Nested Task.\r | |
| 5194 | UINT32 Reserved_3:1; ///< Reserved.\r | |
| ac644614 | 5195 | } Bits;\r |
| 5196 | UINT16 Uint16;\r | |
| 5197 | } IA32_FLAGS16;\r | |
| 5198 | \r | |
| 1106ffe1 | 5199 | ///\r |
| af2dc6a7 | 5200 | /// Byte packed structure for EFLAGS/RFLAGS.\r |
| 5201 | /// 32-bits on IA-32.\r | |
| 5202 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
| 1106ffe1 | 5203 | ///\r |
| ac644614 | 5204 | typedef union {\r |
| 5205 | struct {\r | |
| af2dc6a7 | 5206 | UINT32 CF:1; ///< Carry Flag.\r |
| 5207 | UINT32 Reserved_0:1; ///< Reserved.\r | |
| 5208 | UINT32 PF:1; ///< Parity Flag.\r | |
| 5209 | UINT32 Reserved_1:1; ///< Reserved.\r | |
| 5210 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
| 5211 | UINT32 Reserved_2:1; ///< Reserved.\r | |
| 5212 | UINT32 ZF:1; ///< Zero Flag.\r | |
| 5213 | UINT32 SF:1; ///< Sign Flag.\r | |
| 5214 | UINT32 TF:1; ///< Trap Flag.\r | |
| 5215 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
| 5216 | UINT32 DF:1; ///< Direction Flag.\r | |
| 5217 | UINT32 OF:1; ///< Overflow Flag.\r | |
| 5218 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
| 5219 | UINT32 NT:1; ///< Nested Task.\r | |
| 5220 | UINT32 Reserved_3:1; ///< Reserved.\r | |
| 5221 | UINT32 RF:1; ///< Resume Flag.\r | |
| 5222 | UINT32 VM:1; ///< Virtual 8086 Mode.\r | |
| 5223 | UINT32 AC:1; ///< Alignment Check.\r | |
| 5224 | UINT32 VIF:1; ///< Virtual Interrupt Flag.\r | |
| 5225 | UINT32 VIP:1; ///< Virtual Interrupt Pending.\r | |
| 5226 | UINT32 ID:1; ///< ID Flag.\r | |
| 5227 | UINT32 Reserved_4:10; ///< Reserved.\r | |
| ac644614 | 5228 | } Bits;\r |
| 5229 | UINTN UintN;\r | |
| 5230 | } IA32_EFLAGS32;\r | |
| 5231 | \r | |
| 1106ffe1 | 5232 | ///\r |
| af2dc6a7 | 5233 | /// Byte packed structure for Control Register 0 (CR0).\r |
| 5234 | /// 32-bits on IA-32.\r | |
| 5235 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
| 1106ffe1 | 5236 | ///\r |
| ac644614 | 5237 | typedef union {\r |
| 5238 | struct {\r | |
| af2dc6a7 | 5239 | UINT32 PE:1; ///< Protection Enable.\r |
| 5240 | UINT32 MP:1; ///< Monitor Coprocessor.\r | |
| 5241 | UINT32 EM:1; ///< Emulation.\r | |
| 5242 | UINT32 TS:1; ///< Task Switched.\r | |
| 5243 | UINT32 ET:1; ///< Extension Type.\r | |
| 5244 | UINT32 NE:1; ///< Numeric Error.\r | |
| 5245 | UINT32 Reserved_0:10; ///< Reserved.\r | |
| 5246 | UINT32 WP:1; ///< Write Protect.\r | |
| 5247 | UINT32 Reserved_1:1; ///< Reserved.\r | |
| 5248 | UINT32 AM:1; ///< Alignment Mask.\r | |
| 5249 | UINT32 Reserved_2:10; ///< Reserved.\r | |
| 5250 | UINT32 NW:1; ///< Mot Write-through.\r | |
| 5251 | UINT32 CD:1; ///< Cache Disable.\r | |
| 5252 | UINT32 PG:1; ///< Paging.\r | |
| ac644614 | 5253 | } Bits;\r |
| 5254 | UINTN UintN;\r | |
| 5255 | } IA32_CR0;\r | |
| 5256 | \r | |
| 1106ffe1 | 5257 | ///\r |
| af2dc6a7 | 5258 | /// Byte packed structure for Control Register 4 (CR4).\r |
| 5259 | /// 32-bits on IA-32.\r | |
| 5260 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
| 1106ffe1 | 5261 | ///\r |
| ac644614 | 5262 | typedef union {\r |
| 5263 | struct {\r | |
| af2dc6a7 | 5264 | UINT32 VME:1; ///< Virtual-8086 Mode Extensions.\r |
| 5265 | UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.\r | |
| 5266 | UINT32 TSD:1; ///< Time Stamp Disable.\r | |
| 5267 | UINT32 DE:1; ///< Debugging Extensions.\r | |
| 5268 | UINT32 PSE:1; ///< Page Size Extensions.\r | |
| 5269 | UINT32 PAE:1; ///< Physical Address Extension.\r | |
| 5270 | UINT32 MCE:1; ///< Machine Check Enable.\r | |
| 5271 | UINT32 PGE:1; ///< Page Global Enable.\r | |
| 2a53dabf | 5272 | UINT32 PCE:1; ///< Performance Monitoring Counter\r |
| af2dc6a7 | 5273 | ///< Enable.\r |
| 2a53dabf LG |
5274 | UINT32 OSFXSR:1; ///< Operating System Support for\r |
| 5275 | ///< FXSAVE and FXRSTOR instructions\r | |
| 5276 | UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r | |
| 5277 | ///< Unmasked SIMD Floating Point\r | |
| af2dc6a7 | 5278 | ///< Exceptions.\r |
| 5279 | UINT32 Reserved_0:2; ///< Reserved.\r | |
| 2a53dabf | 5280 | UINT32 VMXE:1; ///< VMX Enable\r |
| af2dc6a7 | 5281 | UINT32 Reserved_1:18; ///< Reserved.\r |
| ac644614 | 5282 | } Bits;\r |
| 5283 | UINTN UintN;\r | |
| 5284 | } IA32_CR4;\r | |
| 5285 | \r | |
| 6088db38 | 5286 | ///\r |
| 5287 | /// Byte packed structure for a segment descriptor in a GDT/LDT.\r | |
| 5288 | ///\r | |
| 5289 | typedef union {\r | |
| 5290 | struct {\r | |
| 5291 | UINT32 LimitLow:16;\r | |
| 5292 | UINT32 BaseLow:16;\r | |
| 5293 | UINT32 BaseMid:8;\r | |
| 5294 | UINT32 Type:4;\r | |
| 5295 | UINT32 S:1;\r | |
| 5296 | UINT32 DPL:2;\r | |
| 5297 | UINT32 P:1;\r | |
| 5298 | UINT32 LimitHigh:4;\r | |
| 5299 | UINT32 AVL:1;\r | |
| 5300 | UINT32 L:1;\r | |
| 5301 | UINT32 DB:1;\r | |
| 5302 | UINT32 G:1;\r | |
| 5303 | UINT32 BaseHigh:8;\r | |
| 5304 | } Bits;\r | |
| 5305 | UINT64 Uint64;\r | |
| 5306 | } IA32_SEGMENT_DESCRIPTOR;\r | |
| 5307 | \r | |
| 1106ffe1 | 5308 | ///\r |
| af2dc6a7 | 5309 | /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.\r |
| 1106ffe1 | 5310 | ///\r |
| ac644614 | 5311 | #pragma pack (1)\r |
| 5312 | typedef struct {\r | |
| 5313 | UINT16 Limit;\r | |
| 5314 | UINTN Base;\r | |
| 5315 | } IA32_DESCRIPTOR;\r | |
| 5316 | #pragma pack ()\r | |
| 5317 | \r | |
| 5318 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
| 5319 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
| 5320 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
| 5321 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
| 5322 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
| 5323 | \r | |
| 6f4aad3b | 5324 | \r |
| 5325 | #if defined (MDE_CPU_IA32)\r | |
| 1106ffe1 | 5326 | ///\r |
| af2dc6a7 | 5327 | /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.\r |
| 1106ffe1 | 5328 | ///\r |
| dc317713 | 5329 | typedef union {\r |
| 5330 | struct {\r | |
| af2dc6a7 | 5331 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
| 5332 | UINT32 Selector:16; ///< Selector.\r | |
| 5333 | UINT32 Reserved_0:8; ///< Reserved.\r | |
| 5334 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
| 5335 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
| dc317713 | 5336 | } Bits;\r |
| 5337 | UINT64 Uint64;\r | |
| 5338 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
| 5339 | \r | |
| 5340 | #endif\r | |
| 5341 | \r | |
| 5342 | #if defined (MDE_CPU_X64)\r | |
| 6f4aad3b | 5343 | ///\r |
| af2dc6a7 | 5344 | /// Byte packed structure for an x64 Interrupt Gate Descriptor.\r |
| 6f4aad3b | 5345 | ///\r |
| ac644614 | 5346 | typedef union {\r |
| 5347 | struct {\r | |
| af2dc6a7 | 5348 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
| 5349 | UINT32 Selector:16; ///< Selector.\r | |
| 5350 | UINT32 Reserved_0:8; ///< Reserved.\r | |
| 5351 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
| 5352 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
| 5353 | UINT32 OffsetUpper:32; ///< Offset bits 63..32.\r | |
| 5354 | UINT32 Reserved_1:32; ///< Reserved.\r | |
| ac644614 | 5355 | } Bits;\r |
| 6f4aad3b | 5356 | struct {\r |
| 5357 | UINT64 Uint64;\r | |
| 5358 | UINT64 Uint64_1;\r | |
| 5359 | } Uint128; \r | |
| ac644614 | 5360 | } IA32_IDT_GATE_DESCRIPTOR;\r |
| 5361 | \r | |
| dc317713 | 5362 | #endif\r |
| 5363 | \r | |
| 1106ffe1 | 5364 | ///\r |
| af2dc6a7 | 5365 | /// Byte packed structure for an FP/SSE/SSE2 context.\r |
| 1106ffe1 | 5366 | ///\r |
| ac644614 | 5367 | typedef struct {\r |
| 5368 | UINT8 Buffer[512];\r | |
| 5369 | } IA32_FX_BUFFER;\r | |
| 5370 | \r | |
| 1106ffe1 | 5371 | ///\r |
| af2dc6a7 | 5372 | /// Structures for the 16-bit real mode thunks.\r |
| 1106ffe1 | 5373 | ///\r |
| ac644614 | 5374 | typedef struct {\r |
| 5375 | UINT32 Reserved1;\r | |
| 5376 | UINT32 Reserved2;\r | |
| 5377 | UINT32 Reserved3;\r | |
| 5378 | UINT32 Reserved4;\r | |
| 5379 | UINT8 BL;\r | |
| 5380 | UINT8 BH;\r | |
| 5381 | UINT16 Reserved5;\r | |
| 5382 | UINT8 DL;\r | |
| 5383 | UINT8 DH;\r | |
| 5384 | UINT16 Reserved6;\r | |
| 5385 | UINT8 CL;\r | |
| 5386 | UINT8 CH;\r | |
| 5387 | UINT16 Reserved7;\r | |
| 5388 | UINT8 AL;\r | |
| 5389 | UINT8 AH;\r | |
| 5390 | UINT16 Reserved8;\r | |
| 5391 | } IA32_BYTE_REGS;\r | |
| 5392 | \r | |
| 5393 | typedef struct {\r | |
| 5394 | UINT16 DI;\r | |
| 5395 | UINT16 Reserved1;\r | |
| 5396 | UINT16 SI;\r | |
| 5397 | UINT16 Reserved2;\r | |
| 5398 | UINT16 BP;\r | |
| 5399 | UINT16 Reserved3;\r | |
| 5400 | UINT16 SP;\r | |
| 5401 | UINT16 Reserved4;\r | |
| 5402 | UINT16 BX;\r | |
| 5403 | UINT16 Reserved5;\r | |
| 5404 | UINT16 DX;\r | |
| 5405 | UINT16 Reserved6;\r | |
| 5406 | UINT16 CX;\r | |
| 5407 | UINT16 Reserved7;\r | |
| 5408 | UINT16 AX;\r | |
| 5409 | UINT16 Reserved8;\r | |
| 5410 | } IA32_WORD_REGS;\r | |
| 5411 | \r | |
| 5412 | typedef struct {\r | |
| 5413 | UINT32 EDI;\r | |
| 5414 | UINT32 ESI;\r | |
| 5415 | UINT32 EBP;\r | |
| 5416 | UINT32 ESP;\r | |
| 5417 | UINT32 EBX;\r | |
| 5418 | UINT32 EDX;\r | |
| 5419 | UINT32 ECX;\r | |
| 5420 | UINT32 EAX;\r | |
| 5421 | UINT16 DS;\r | |
| 5422 | UINT16 ES;\r | |
| 5423 | UINT16 FS;\r | |
| 5424 | UINT16 GS;\r | |
| 5425 | IA32_EFLAGS32 EFLAGS;\r | |
| 5426 | UINT32 Eip;\r | |
| 5427 | UINT16 CS;\r | |
| 5428 | UINT16 SS;\r | |
| 5429 | } IA32_DWORD_REGS;\r | |
| 5430 | \r | |
| 5431 | typedef union {\r | |
| 5432 | IA32_DWORD_REGS E;\r | |
| 5433 | IA32_WORD_REGS X;\r | |
| 5434 | IA32_BYTE_REGS H;\r | |
| 5435 | } IA32_REGISTER_SET;\r | |
| 5436 | \r | |
| 1106ffe1 | 5437 | ///\r |
| af2dc6a7 | 5438 | /// Byte packed structure for an 16-bit real mode thunks.\r |
| 1106ffe1 | 5439 | ///\r |
| ac644614 | 5440 | typedef struct {\r |
| 5441 | IA32_REGISTER_SET *RealModeState;\r | |
| 5442 | VOID *RealModeBuffer;\r | |
| 5443 | UINT32 RealModeBufferSize;\r | |
| 5444 | UINT32 ThunkAttributes;\r | |
| 5445 | } THUNK_CONTEXT;\r | |
| 5446 | \r | |
| 5447 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
| 5448 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
| 5449 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
| 5450 | \r | |
| 5451 | /**\r | |
| 5452 | Retrieves CPUID information.\r | |
| 5453 | \r | |
| 5454 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
| 5455 | This function always returns Index.\r | |
| 5456 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
| 5457 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
| 5458 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
| 5459 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
| 030cd1a2 | 5460 | This function is only available on IA-32 and x64.\r |
| ac644614 | 5461 | \r |
| 5462 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
| 5463 | instruction.\r | |
| af2dc6a7 | 5464 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
| ac644614 | 5465 | instruction. This is an optional parameter that may be NULL.\r |
| af2dc6a7 | 5466 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
| ac644614 | 5467 | instruction. This is an optional parameter that may be NULL.\r |
| af2dc6a7 | 5468 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
| ac644614 | 5469 | instruction. This is an optional parameter that may be NULL.\r |
| af2dc6a7 | 5470 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
| ac644614 | 5471 | instruction. This is an optional parameter that may be NULL.\r |
| 5472 | \r | |
| 2fe241a2 | 5473 | @return Index.\r |
| ac644614 | 5474 | \r |
| 5475 | **/\r | |
| 5476 | UINT32\r | |
| 5477 | EFIAPI\r | |
| 5478 | AsmCpuid (\r | |
| 5479 | IN UINT32 Index,\r | |
| 5480 | OUT UINT32 *Eax, OPTIONAL\r | |
| 5481 | OUT UINT32 *Ebx, OPTIONAL\r | |
| 5482 | OUT UINT32 *Ecx, OPTIONAL\r | |
| 5483 | OUT UINT32 *Edx OPTIONAL\r | |
| 5484 | );\r | |
| 5485 | \r | |
| 5486 | \r | |
| 5487 | /**\r | |
| 5488 | Retrieves CPUID information using an extended leaf identifier.\r | |
| 5489 | \r | |
| 5490 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
| 5491 | and ECX set to the value specified by SubIndex. This function always returns\r | |
| 5492 | Index. This function is only available on IA-32 and x64.\r | |
| 5493 | \r | |
| 5494 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
| 5495 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
| 5496 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
| 5497 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
| 5498 | \r | |
| 5499 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
| 5500 | CPUID instruction.\r | |
| 5501 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
| 5502 | CPUID instruction.\r | |
| af2dc6a7 | 5503 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
| ac644614 | 5504 | instruction. This is an optional parameter that may be\r |
| 5505 | NULL.\r | |
| af2dc6a7 | 5506 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
| ac644614 | 5507 | instruction. This is an optional parameter that may be\r |
| 5508 | NULL.\r | |
| af2dc6a7 | 5509 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
| ac644614 | 5510 | instruction. This is an optional parameter that may be\r |
| 5511 | NULL.\r | |
| af2dc6a7 | 5512 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
| ac644614 | 5513 | instruction. This is an optional parameter that may be\r |
| 5514 | NULL.\r | |
| 5515 | \r | |
| 2fe241a2 | 5516 | @return Index.\r |
| ac644614 | 5517 | \r |
| 5518 | **/\r | |
| 5519 | UINT32\r | |
| 5520 | EFIAPI\r | |
| 5521 | AsmCpuidEx (\r | |
| 5522 | IN UINT32 Index,\r | |
| 5523 | IN UINT32 SubIndex,\r | |
| 5524 | OUT UINT32 *Eax, OPTIONAL\r | |
| 5525 | OUT UINT32 *Ebx, OPTIONAL\r | |
| 5526 | OUT UINT32 *Ecx, OPTIONAL\r | |
| 5527 | OUT UINT32 *Edx OPTIONAL\r | |
| 5528 | );\r | |
| 5529 | \r | |
| 5530 | \r | |
| be5f1614 | 5531 | /**\r |
| 5532 | Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r | |
| 5533 | \r | |
| 5534 | Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r | |
| 5535 | and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r | |
| 5536 | \r | |
| 5537 | **/\r | |
| 5538 | VOID\r | |
| 5539 | EFIAPI\r | |
| 5540 | AsmDisableCache (\r | |
| 5541 | VOID\r | |
| 5542 | );\r | |
| 5543 | \r | |
| 5544 | \r | |
| 5545 | /**\r | |
| 5546 | Perform a WBINVD and clear both the CD and NW bits of CR0.\r | |
| 5547 | \r | |
| 5548 | Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r | |
| 5549 | bits of CR0 to 0. This function is only available on IA-32 and x64.\r | |
| 5550 | \r | |
| 5551 | **/\r | |
| 5552 | VOID\r | |
| 5553 | EFIAPI\r | |
| 5554 | AsmEnableCache (\r | |
| 5555 | VOID\r | |
| 5556 | );\r | |
| 5557 | \r | |
| 5558 | \r | |
| ac644614 | 5559 | /**\r |
| 5560 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
| 5561 | \r | |
| 5562 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
| 5563 | No parameter checking is performed on Index, and some Index values may cause\r | |
| 5564 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
| 5565 | caller must set up exception handlers to catch the exceptions. This function\r | |
| 030cd1a2 | 5566 | is only available on IA-32 and x64.\r |
| ac644614 | 5567 | \r |
| 5568 | @param Index The 32-bit MSR index to read.\r | |
| 5569 | \r | |
| 5570 | @return The lower 32 bits of the MSR identified by Index.\r | |
| 5571 | \r | |
| 5572 | **/\r | |
| 5573 | UINT32\r | |
| 5574 | EFIAPI\r | |
| 5575 | AsmReadMsr32 (\r | |
| 5576 | IN UINT32 Index\r | |
| 5577 | );\r | |
| 5578 | \r | |
| 5579 | \r | |
| 5580 | /**\r | |
| 17f695ed | 5581 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
| 5582 | The upper 32-bits of the MSR are set to zero.\r | |
| ac644614 | 5583 | \r |
| 5584 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
| 5585 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
| 5586 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
| 5587 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
| 5588 | that Index and Value are valid, or the caller must establish proper exception\r | |
| 030cd1a2 | 5589 | handlers. This function is only available on IA-32 and x64.\r |
| ac644614 | 5590 | \r |
| 5591 | @param Index The 32-bit MSR index to write.\r | |
| 5592 | @param Value The 32-bit value to write to the MSR.\r | |
| 5593 | \r | |
| 5594 | @return Value\r | |
| 5595 | \r | |
| 5596 | **/\r | |
| 5597 | UINT32\r | |
| 5598 | EFIAPI\r | |
| 5599 | AsmWriteMsr32 (\r | |
| 5600 | IN UINT32 Index,\r | |
| 5601 | IN UINT32 Value\r | |
| 5602 | );\r | |
| 5603 | \r | |
| 5604 | \r | |
| 5605 | /**\r | |
| 62991af2 | 5606 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
| ac644614 | 5607 | writes the result back to the 64-bit MSR.\r |
| 5608 | \r | |
| 62991af2 | 5609 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
| ac644614 | 5610 | between the lower 32-bits of the read result and the value specified by\r |
| 5611 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
| 5612 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
| 5613 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
| 5614 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
| 5615 | must establish proper exception handlers. This function is only available on\r | |
| 030cd1a2 | 5616 | IA-32 and x64.\r |
| ac644614 | 5617 | \r |
| 5618 | @param Index The 32-bit MSR index to write.\r | |
| 5619 | @param OrData The value to OR with the read value from the MSR.\r | |
| 5620 | \r | |
| 5621 | @return The lower 32-bit value written to the MSR.\r | |
| 5622 | \r | |
| 5623 | **/\r | |
| 5624 | UINT32\r | |
| 5625 | EFIAPI\r | |
| 5626 | AsmMsrOr32 (\r | |
| 5627 | IN UINT32 Index,\r | |
| 5628 | IN UINT32 OrData\r | |
| 5629 | );\r | |
| 5630 | \r | |
| 5631 | \r | |
| 5632 | /**\r | |
| 5633 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
| 5634 | the result back to the 64-bit MSR.\r | |
| 5635 | \r | |
| 5636 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
| 5637 | lower 32-bits of the read result and the value specified by AndData, and\r | |
| 5638 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
| 5639 | the value written to the MSR is returned. No parameter checking is performed\r | |
| 5640 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
| 5641 | must either guarantee that Index and AndData are valid, or the caller must\r | |
| 5642 | establish proper exception handlers. This function is only available on IA-32\r | |
| 030cd1a2 | 5643 | and x64.\r |
| ac644614 | 5644 | \r |
| 5645 | @param Index The 32-bit MSR index to write.\r | |
| 5646 | @param AndData The value to AND with the read value from the MSR.\r | |
| 5647 | \r | |
| 5648 | @return The lower 32-bit value written to the MSR.\r | |
| 5649 | \r | |
| 5650 | **/\r | |
| 5651 | UINT32\r | |
| 5652 | EFIAPI\r | |
| 5653 | AsmMsrAnd32 (\r | |
| 5654 | IN UINT32 Index,\r | |
| 5655 | IN UINT32 AndData\r | |
| 5656 | );\r | |
| 5657 | \r | |
| 5658 | \r | |
| 5659 | /**\r | |
| 62991af2 | 5660 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
| ac644614 | 5661 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
| 5662 | \r | |
| 5663 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
| 5664 | lower 32-bits of the read result and the value specified by AndData\r | |
| 62991af2 | 5665 | preserving the upper 32-bits, performs a bitwise OR between the\r |
| ac644614 | 5666 | result of the AND operation and the value specified by OrData, and writes the\r |
| 5667 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
| 5668 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
| 5669 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
| 5670 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
| 5671 | caller must establish proper exception handlers. This function is only\r | |
| 030cd1a2 | 5672 | available on IA-32 and x64.\r |
| ac644614 | 5673 | \r |
| 5674 | @param Index The 32-bit MSR index to write.\r | |
| 5675 | @param AndData The value to AND with the read value from the MSR.\r | |
| 5676 | @param OrData The value to OR with the result of the AND operation.\r | |
| 5677 | \r | |
| 5678 | @return The lower 32-bit value written to the MSR.\r | |
| 5679 | \r | |
| 5680 | **/\r | |
| 5681 | UINT32\r | |
| 5682 | EFIAPI\r | |
| 5683 | AsmMsrAndThenOr32 (\r | |
| 5684 | IN UINT32 Index,\r | |
| 5685 | IN UINT32 AndData,\r | |
| 5686 | IN UINT32 OrData\r | |
| 5687 | );\r | |
| 5688 | \r | |
| 5689 | \r | |
| 5690 | /**\r | |
| 5691 | Reads a bit field of an MSR.\r | |
| 5692 | \r | |
| 5693 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
| 5694 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
| 5695 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
| 5696 | must set up exception handlers to catch the exceptions. This function is only\r | |
| 030cd1a2 | 5697 | available on IA-32 and x64.\r |
| ac644614 | 5698 | \r |
| 5699 | If StartBit is greater than 31, then ASSERT().\r | |
| 5700 | If EndBit is greater than 31, then ASSERT().\r | |
| 5701 | If EndBit is less than StartBit, then ASSERT().\r | |
| 5702 | \r | |
| 5703 | @param Index The 32-bit MSR index to read.\r | |
| 5704 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 5705 | Range 0..31.\r | |
| 5706 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 5707 | Range 0..31.\r | |
| 5708 | \r | |
| 5709 | @return The bit field read from the MSR.\r | |
| 5710 | \r | |
| 5711 | **/\r | |
| 5712 | UINT32\r | |
| 5713 | EFIAPI\r | |
| 5714 | AsmMsrBitFieldRead32 (\r | |
| 5715 | IN UINT32 Index,\r | |
| 5716 | IN UINTN StartBit,\r | |
| 5717 | IN UINTN EndBit\r | |
| 5718 | );\r | |
| 5719 | \r | |
| 5720 | \r | |
| 5721 | /**\r | |
| 5722 | Writes a bit field to an MSR.\r | |
| 5723 | \r | |
| 2fe241a2 | 5724 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
| ac644614 | 5725 | field is specified by the StartBit and the EndBit. All other bits in the\r |
| 5726 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
| 62991af2 | 5727 | returned. The caller must either guarantee that Index and the data written \r |
| 5728 | is valid, or the caller must set up exception handlers to catch the exceptions. \r | |
| 5729 | This function is only available on IA-32 and x64.\r | |
| ac644614 | 5730 | \r |
| 5731 | If StartBit is greater than 31, then ASSERT().\r | |
| 5732 | If EndBit is greater than 31, then ASSERT().\r | |
| 5733 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 5734 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 5735 | \r |
| 5736 | @param Index The 32-bit MSR index to write.\r | |
| 5737 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 5738 | Range 0..31.\r | |
| 5739 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 5740 | Range 0..31.\r | |
| 5741 | @param Value New value of the bit field.\r | |
| 5742 | \r | |
| 5743 | @return The lower 32-bit of the value written to the MSR.\r | |
| 5744 | \r | |
| 5745 | **/\r | |
| 5746 | UINT32\r | |
| 5747 | EFIAPI\r | |
| 5748 | AsmMsrBitFieldWrite32 (\r | |
| 5749 | IN UINT32 Index,\r | |
| 5750 | IN UINTN StartBit,\r | |
| 5751 | IN UINTN EndBit,\r | |
| 5752 | IN UINT32 Value\r | |
| 5753 | );\r | |
| 5754 | \r | |
| 5755 | \r | |
| 5756 | /**\r | |
| 5757 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
| 5758 | result back to the bit field in the 64-bit MSR.\r | |
| 5759 | \r | |
| 62991af2 | 5760 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
| ac644614 | 5761 | between the read result and the value specified by OrData, and writes the\r |
| 5762 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
| 5763 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
| 5764 | caller must either guarantee that Index and the data written is valid, or\r | |
| 5765 | the caller must set up exception handlers to catch the exceptions. This\r | |
| 030cd1a2 | 5766 | function is only available on IA-32 and x64.\r |
| ac644614 | 5767 | \r |
| 5768 | If StartBit is greater than 31, then ASSERT().\r | |
| 5769 | If EndBit is greater than 31, then ASSERT().\r | |
| 5770 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 5771 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 5772 | \r |
| 5773 | @param Index The 32-bit MSR index to write.\r | |
| 5774 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 5775 | Range 0..31.\r | |
| 5776 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 5777 | Range 0..31.\r | |
| 5778 | @param OrData The value to OR with the read value from the MSR.\r | |
| 5779 | \r | |
| 5780 | @return The lower 32-bit of the value written to the MSR.\r | |
| 5781 | \r | |
| 5782 | **/\r | |
| 5783 | UINT32\r | |
| 5784 | EFIAPI\r | |
| 5785 | AsmMsrBitFieldOr32 (\r | |
| 5786 | IN UINT32 Index,\r | |
| 5787 | IN UINTN StartBit,\r | |
| 5788 | IN UINTN EndBit,\r | |
| 5789 | IN UINT32 OrData\r | |
| 5790 | );\r | |
| 5791 | \r | |
| 5792 | \r | |
| 5793 | /**\r | |
| 5794 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
| 5795 | result back to the bit field in the 64-bit MSR.\r | |
| 5796 | \r | |
| 5797 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
| 5798 | read result and the value specified by AndData, and writes the result to the\r | |
| 5799 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
| 5800 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
| 5801 | either guarantee that Index and the data written is valid, or the caller must\r | |
| 5802 | set up exception handlers to catch the exceptions. This function is only\r | |
| 030cd1a2 | 5803 | available on IA-32 and x64.\r |
| ac644614 | 5804 | \r |
| 5805 | If StartBit is greater than 31, then ASSERT().\r | |
| 5806 | If EndBit is greater than 31, then ASSERT().\r | |
| 5807 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 5808 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 5809 | \r |
| 5810 | @param Index The 32-bit MSR index to write.\r | |
| 5811 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 5812 | Range 0..31.\r | |
| 5813 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 5814 | Range 0..31.\r | |
| 5815 | @param AndData The value to AND with the read value from the MSR.\r | |
| 5816 | \r | |
| 5817 | @return The lower 32-bit of the value written to the MSR.\r | |
| 5818 | \r | |
| 5819 | **/\r | |
| 5820 | UINT32\r | |
| 5821 | EFIAPI\r | |
| 5822 | AsmMsrBitFieldAnd32 (\r | |
| 5823 | IN UINT32 Index,\r | |
| 5824 | IN UINTN StartBit,\r | |
| 5825 | IN UINTN EndBit,\r | |
| 5826 | IN UINT32 AndData\r | |
| 5827 | );\r | |
| 5828 | \r | |
| 5829 | \r | |
| 5830 | /**\r | |
| 5831 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
| 62991af2 | 5832 | bitwise OR, and writes the result back to the bit field in the\r |
| ac644614 | 5833 | 64-bit MSR.\r |
| 5834 | \r | |
| 5835 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
| 62991af2 | 5836 | bitwise OR between the read result and the value specified by\r |
| ac644614 | 5837 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
| 5838 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
| 5839 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
| 5840 | that Index and the data written is valid, or the caller must set up exception\r | |
| 5841 | handlers to catch the exceptions. This function is only available on IA-32\r | |
| 030cd1a2 | 5842 | and x64.\r |
| ac644614 | 5843 | \r |
| 5844 | If StartBit is greater than 31, then ASSERT().\r | |
| 5845 | If EndBit is greater than 31, then ASSERT().\r | |
| 5846 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
5847 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 5848 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| ac644614 | 5849 | \r |
| 5850 | @param Index The 32-bit MSR index to write.\r | |
| 5851 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 5852 | Range 0..31.\r | |
| 5853 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 5854 | Range 0..31.\r | |
| 5855 | @param AndData The value to AND with the read value from the MSR.\r | |
| 5856 | @param OrData The value to OR with the result of the AND operation.\r | |
| 5857 | \r | |
| 5858 | @return The lower 32-bit of the value written to the MSR.\r | |
| 5859 | \r | |
| 5860 | **/\r | |
| 5861 | UINT32\r | |
| 5862 | EFIAPI\r | |
| 5863 | AsmMsrBitFieldAndThenOr32 (\r | |
| 5864 | IN UINT32 Index,\r | |
| 5865 | IN UINTN StartBit,\r | |
| 5866 | IN UINTN EndBit,\r | |
| 5867 | IN UINT32 AndData,\r | |
| 5868 | IN UINT32 OrData\r | |
| 5869 | );\r | |
| 5870 | \r | |
| 5871 | \r | |
| 5872 | /**\r | |
| 5873 | Returns a 64-bit Machine Specific Register(MSR).\r | |
| 5874 | \r | |
| 5875 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
| 5876 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
| 5877 | caller must either guarantee that Index is valid, or the caller must set up\r | |
| 5878 | exception handlers to catch the exceptions. This function is only available\r | |
| 030cd1a2 | 5879 | on IA-32 and x64.\r |
| ac644614 | 5880 | \r |
| 5881 | @param Index The 32-bit MSR index to read.\r | |
| 5882 | \r | |
| 5883 | @return The value of the MSR identified by Index.\r | |
| 5884 | \r | |
| 5885 | **/\r | |
| 5886 | UINT64\r | |
| 5887 | EFIAPI\r | |
| 5888 | AsmReadMsr64 (\r | |
| 5889 | IN UINT32 Index\r | |
| 5890 | );\r | |
| 5891 | \r | |
| 5892 | \r | |
| 5893 | /**\r | |
| 5894 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
| 5895 | value.\r | |
| 5896 | \r | |
| 5897 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
| 5898 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
| 5899 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
| 5900 | caller must either guarantee that Index and Value are valid, or the caller\r | |
| 5901 | must establish proper exception handlers. This function is only available on\r | |
| 030cd1a2 | 5902 | IA-32 and x64.\r |
| ac644614 | 5903 | \r |
| 5904 | @param Index The 32-bit MSR index to write.\r | |
| 5905 | @param Value The 64-bit value to write to the MSR.\r | |
| 5906 | \r | |
| 5907 | @return Value\r | |
| 5908 | \r | |
| 5909 | **/\r | |
| 5910 | UINT64\r | |
| 5911 | EFIAPI\r | |
| 5912 | AsmWriteMsr64 (\r | |
| 5913 | IN UINT32 Index,\r | |
| 5914 | IN UINT64 Value\r | |
| 5915 | );\r | |
| 5916 | \r | |
| 5917 | \r | |
| 5918 | /**\r | |
| 62991af2 | 5919 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
| ac644614 | 5920 | back to the 64-bit MSR.\r |
| 5921 | \r | |
| 62991af2 | 5922 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
| ac644614 | 5923 | between the read result and the value specified by OrData, and writes the\r |
| 5924 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
| 5925 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
| 5926 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
| 5927 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
| 030cd1a2 | 5928 | This function is only available on IA-32 and x64.\r |
| ac644614 | 5929 | \r |
| 5930 | @param Index The 32-bit MSR index to write.\r | |
| 5931 | @param OrData The value to OR with the read value from the MSR.\r | |
| 5932 | \r | |
| 5933 | @return The value written back to the MSR.\r | |
| 5934 | \r | |
| 5935 | **/\r | |
| 5936 | UINT64\r | |
| 5937 | EFIAPI\r | |
| 5938 | AsmMsrOr64 (\r | |
| 5939 | IN UINT32 Index,\r | |
| 5940 | IN UINT64 OrData\r | |
| 5941 | );\r | |
| 5942 | \r | |
| 5943 | \r | |
| 5944 | /**\r | |
| 5945 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
| 5946 | 64-bit MSR.\r | |
| 5947 | \r | |
| 5948 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
| 5949 | read result and the value specified by OrData, and writes the result to the\r | |
| 5950 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
| 5951 | parameter checking is performed on Index or OrData, and some of these may\r | |
| 5952 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
| 5953 | are valid, or the caller must establish proper exception handlers. This\r | |
| 030cd1a2 | 5954 | function is only available on IA-32 and x64.\r |
| ac644614 | 5955 | \r |
| 5956 | @param Index The 32-bit MSR index to write.\r | |
| 5957 | @param AndData The value to AND with the read value from the MSR.\r | |
| 5958 | \r | |
| 5959 | @return The value written back to the MSR.\r | |
| 5960 | \r | |
| 5961 | **/\r | |
| 5962 | UINT64\r | |
| 5963 | EFIAPI\r | |
| 5964 | AsmMsrAnd64 (\r | |
| 5965 | IN UINT32 Index,\r | |
| 5966 | IN UINT64 AndData\r | |
| 5967 | );\r | |
| 5968 | \r | |
| 5969 | \r | |
| 5970 | /**\r | |
| 62991af2 | 5971 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r |
| ac644614 | 5972 | OR, and writes the result back to the 64-bit MSR.\r |
| 5973 | \r | |
| 5974 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
| 62991af2 | 5975 | result and the value specified by AndData, performs a bitwise OR\r |
| ac644614 | 5976 | between the result of the AND operation and the value specified by OrData,\r |
| 5977 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
| 5978 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
| 5979 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
| 5980 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
| 5981 | establish proper exception handlers. This function is only available on IA-32\r | |
| 030cd1a2 | 5982 | and x64.\r |
| ac644614 | 5983 | \r |
| 5984 | @param Index The 32-bit MSR index to write.\r | |
| 5985 | @param AndData The value to AND with the read value from the MSR.\r | |
| 5986 | @param OrData The value to OR with the result of the AND operation.\r | |
| 5987 | \r | |
| 5988 | @return The value written back to the MSR.\r | |
| 5989 | \r | |
| 5990 | **/\r | |
| 5991 | UINT64\r | |
| 5992 | EFIAPI\r | |
| 5993 | AsmMsrAndThenOr64 (\r | |
| 5994 | IN UINT32 Index,\r | |
| 5995 | IN UINT64 AndData,\r | |
| 5996 | IN UINT64 OrData\r | |
| 5997 | );\r | |
| 5998 | \r | |
| 5999 | \r | |
| 6000 | /**\r | |
| 6001 | Reads a bit field of an MSR.\r | |
| 6002 | \r | |
| 6003 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
| 6004 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
| 6005 | must either guarantee that Index is valid, or the caller must set up\r | |
| 6006 | exception handlers to catch the exceptions. This function is only available\r | |
| 030cd1a2 | 6007 | on IA-32 and x64.\r |
| ac644614 | 6008 | \r |
| 6009 | If StartBit is greater than 63, then ASSERT().\r | |
| 6010 | If EndBit is greater than 63, then ASSERT().\r | |
| 6011 | If EndBit is less than StartBit, then ASSERT().\r | |
| 6012 | \r | |
| 6013 | @param Index The 32-bit MSR index to read.\r | |
| 6014 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 6015 | Range 0..63.\r | |
| 6016 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 6017 | Range 0..63.\r | |
| 6018 | \r | |
| 6019 | @return The value read from the MSR.\r | |
| 6020 | \r | |
| 6021 | **/\r | |
| 6022 | UINT64\r | |
| 6023 | EFIAPI\r | |
| 6024 | AsmMsrBitFieldRead64 (\r | |
| 6025 | IN UINT32 Index,\r | |
| 6026 | IN UINTN StartBit,\r | |
| 6027 | IN UINTN EndBit\r | |
| 6028 | );\r | |
| 6029 | \r | |
| 6030 | \r | |
| 6031 | /**\r | |
| 6032 | Writes a bit field to an MSR.\r | |
| 6033 | \r | |
| 6034 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
| 6035 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
| 62991af2 | 6036 | preserved. The MSR written is returned. The caller must either guarantee \r |
| 6037 | that Index and the data written is valid, or the caller must set up exception \r | |
| 6038 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r | |
| ac644614 | 6039 | \r |
| 6040 | If StartBit is greater than 63, then ASSERT().\r | |
| 6041 | If EndBit is greater than 63, then ASSERT().\r | |
| 6042 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 6043 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 6044 | \r |
| 6045 | @param Index The 32-bit MSR index to write.\r | |
| 6046 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 6047 | Range 0..63.\r | |
| 6048 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 6049 | Range 0..63.\r | |
| 6050 | @param Value New value of the bit field.\r | |
| 6051 | \r | |
| 6052 | @return The value written back to the MSR.\r | |
| 6053 | \r | |
| 6054 | **/\r | |
| 6055 | UINT64\r | |
| 6056 | EFIAPI\r | |
| 6057 | AsmMsrBitFieldWrite64 (\r | |
| 6058 | IN UINT32 Index,\r | |
| 6059 | IN UINTN StartBit,\r | |
| 6060 | IN UINTN EndBit,\r | |
| 6061 | IN UINT64 Value\r | |
| 6062 | );\r | |
| 6063 | \r | |
| 6064 | \r | |
| 6065 | /**\r | |
| 62991af2 | 6066 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
| ac644614 | 6067 | writes the result back to the bit field in the 64-bit MSR.\r |
| 6068 | \r | |
| 62991af2 | 6069 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
| ac644614 | 6070 | between the read result and the value specified by OrData, and writes the\r |
| 6071 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
| 6072 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
| 6073 | guarantee that Index and the data written is valid, or the caller must set up\r | |
| 6074 | exception handlers to catch the exceptions. This function is only available\r | |
| 030cd1a2 | 6075 | on IA-32 and x64.\r |
| ac644614 | 6076 | \r |
| 6077 | If StartBit is greater than 63, then ASSERT().\r | |
| 6078 | If EndBit is greater than 63, then ASSERT().\r | |
| 6079 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 6080 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 6081 | \r |
| 6082 | @param Index The 32-bit MSR index to write.\r | |
| 6083 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 6084 | Range 0..63.\r | |
| 6085 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 6086 | Range 0..63.\r | |
| 6087 | @param OrData The value to OR with the read value from the bit field.\r | |
| 6088 | \r | |
| 6089 | @return The value written back to the MSR.\r | |
| 6090 | \r | |
| 6091 | **/\r | |
| 6092 | UINT64\r | |
| 6093 | EFIAPI\r | |
| 6094 | AsmMsrBitFieldOr64 (\r | |
| 6095 | IN UINT32 Index,\r | |
| 6096 | IN UINTN StartBit,\r | |
| 6097 | IN UINTN EndBit,\r | |
| 6098 | IN UINT64 OrData\r | |
| 6099 | );\r | |
| 6100 | \r | |
| 6101 | \r | |
| 6102 | /**\r | |
| 6103 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
| 6104 | result back to the bit field in the 64-bit MSR.\r | |
| 6105 | \r | |
| 6106 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
| 6107 | read result and the value specified by AndData, and writes the result to the\r | |
| 6108 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
| 6109 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
| 6110 | that Index and the data written is valid, or the caller must set up exception\r | |
| 6111 | handlers to catch the exceptions. This function is only available on IA-32\r | |
| 030cd1a2 | 6112 | and x64.\r |
| ac644614 | 6113 | \r |
| 6114 | If StartBit is greater than 63, then ASSERT().\r | |
| 6115 | If EndBit is greater than 63, then ASSERT().\r | |
| 6116 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 6117 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| ac644614 | 6118 | \r |
| 6119 | @param Index The 32-bit MSR index to write.\r | |
| 6120 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 6121 | Range 0..63.\r | |
| 6122 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 6123 | Range 0..63.\r | |
| 6124 | @param AndData The value to AND with the read value from the bit field.\r | |
| 6125 | \r | |
| 6126 | @return The value written back to the MSR.\r | |
| 6127 | \r | |
| 6128 | **/\r | |
| 6129 | UINT64\r | |
| 6130 | EFIAPI\r | |
| 6131 | AsmMsrBitFieldAnd64 (\r | |
| 6132 | IN UINT32 Index,\r | |
| 6133 | IN UINTN StartBit,\r | |
| 6134 | IN UINTN EndBit,\r | |
| 6135 | IN UINT64 AndData\r | |
| 6136 | );\r | |
| 6137 | \r | |
| 6138 | \r | |
| 6139 | /**\r | |
| 6140 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
| 62991af2 | 6141 | bitwise OR, and writes the result back to the bit field in the\r |
| ac644614 | 6142 | 64-bit MSR.\r |
| 6143 | \r | |
| 6144 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
| 62991af2 | 6145 | a bitwise OR between the read result and the value specified by\r |
| ac644614 | 6146 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
| 6147 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
| 6148 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
| 6149 | written is valid, or the caller must set up exception handlers to catch the\r | |
| 030cd1a2 | 6150 | exceptions. This function is only available on IA-32 and x64.\r |
| ac644614 | 6151 | \r |
| 6152 | If StartBit is greater than 63, then ASSERT().\r | |
| 6153 | If EndBit is greater than 63, then ASSERT().\r | |
| 6154 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
6155 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 6156 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| ac644614 | 6157 | \r |
| 6158 | @param Index The 32-bit MSR index to write.\r | |
| 6159 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 6160 | Range 0..63.\r | |
| 6161 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 6162 | Range 0..63.\r | |
| 6163 | @param AndData The value to AND with the read value from the bit field.\r | |
| 6164 | @param OrData The value to OR with the result of the AND operation.\r | |
| 6165 | \r | |
| 6166 | @return The value written back to the MSR.\r | |
| 6167 | \r | |
| 6168 | **/\r | |
| 6169 | UINT64\r | |
| 6170 | EFIAPI\r | |
| 6171 | AsmMsrBitFieldAndThenOr64 (\r | |
| 6172 | IN UINT32 Index,\r | |
| 6173 | IN UINTN StartBit,\r | |
| 6174 | IN UINTN EndBit,\r | |
| 6175 | IN UINT64 AndData,\r | |
| 6176 | IN UINT64 OrData\r | |
| 6177 | );\r | |
| 6178 | \r | |
| 6179 | \r | |
| 6180 | /**\r | |
| 6181 | Reads the current value of the EFLAGS register.\r | |
| 6182 | \r | |
| 6183 | Reads and returns the current value of the EFLAGS register. This function is\r | |
| 030cd1a2 | 6184 | only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r |
| 6185 | 64-bit value on x64.\r | |
| ac644614 | 6186 | \r |
| 030cd1a2 | 6187 | @return EFLAGS on IA-32 or RFLAGS on x64.\r |
| ac644614 | 6188 | \r |
| 6189 | **/\r | |
| 6190 | UINTN\r | |
| 6191 | EFIAPI\r | |
| 6192 | AsmReadEflags (\r | |
| 6193 | VOID\r | |
| 6194 | );\r | |
| 6195 | \r | |
| 6196 | \r | |
| 6197 | /**\r | |
| 6198 | Reads the current value of the Control Register 0 (CR0).\r | |
| 6199 | \r | |
| 6200 | Reads and returns the current value of CR0. This function is only available\r | |
| 030cd1a2 | 6201 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6202 | x64.\r | |
| ac644614 | 6203 | \r |
| 6204 | @return The value of the Control Register 0 (CR0).\r | |
| 6205 | \r | |
| 6206 | **/\r | |
| 6207 | UINTN\r | |
| 6208 | EFIAPI\r | |
| 6209 | AsmReadCr0 (\r | |
| 6210 | VOID\r | |
| 6211 | );\r | |
| 6212 | \r | |
| 6213 | \r | |
| 6214 | /**\r | |
| 6215 | Reads the current value of the Control Register 2 (CR2).\r | |
| 6216 | \r | |
| 6217 | Reads and returns the current value of CR2. This function is only available\r | |
| 030cd1a2 | 6218 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6219 | x64.\r | |
| ac644614 | 6220 | \r |
| 6221 | @return The value of the Control Register 2 (CR2).\r | |
| 6222 | \r | |
| 6223 | **/\r | |
| 6224 | UINTN\r | |
| 6225 | EFIAPI\r | |
| 6226 | AsmReadCr2 (\r | |
| 6227 | VOID\r | |
| 6228 | );\r | |
| 6229 | \r | |
| 6230 | \r | |
| 6231 | /**\r | |
| 6232 | Reads the current value of the Control Register 3 (CR3).\r | |
| 6233 | \r | |
| 6234 | Reads and returns the current value of CR3. This function is only available\r | |
| 030cd1a2 | 6235 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6236 | x64.\r | |
| ac644614 | 6237 | \r |
| 6238 | @return The value of the Control Register 3 (CR3).\r | |
| 6239 | \r | |
| 6240 | **/\r | |
| 6241 | UINTN\r | |
| 6242 | EFIAPI\r | |
| 6243 | AsmReadCr3 (\r | |
| 6244 | VOID\r | |
| 6245 | );\r | |
| 6246 | \r | |
| 6247 | \r | |
| 6248 | /**\r | |
| 6249 | Reads the current value of the Control Register 4 (CR4).\r | |
| 6250 | \r | |
| 6251 | Reads and returns the current value of CR4. This function is only available\r | |
| 030cd1a2 | 6252 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6253 | x64.\r | |
| ac644614 | 6254 | \r |
| 6255 | @return The value of the Control Register 4 (CR4).\r | |
| 6256 | \r | |
| 6257 | **/\r | |
| 6258 | UINTN\r | |
| 6259 | EFIAPI\r | |
| 6260 | AsmReadCr4 (\r | |
| 6261 | VOID\r | |
| 6262 | );\r | |
| 6263 | \r | |
| 6264 | \r | |
| 6265 | /**\r | |
| 6266 | Writes a value to Control Register 0 (CR0).\r | |
| 6267 | \r | |
| 6268 | Writes and returns a new value to CR0. This function is only available on\r | |
| 030cd1a2 | 6269 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6270 | \r |
| 6271 | @param Cr0 The value to write to CR0.\r | |
| 6272 | \r | |
| 6273 | @return The value written to CR0.\r | |
| 6274 | \r | |
| 6275 | **/\r | |
| 6276 | UINTN\r | |
| 6277 | EFIAPI\r | |
| 6278 | AsmWriteCr0 (\r | |
| 6279 | UINTN Cr0\r | |
| 6280 | );\r | |
| 6281 | \r | |
| 6282 | \r | |
| 6283 | /**\r | |
| 6284 | Writes a value to Control Register 2 (CR2).\r | |
| 6285 | \r | |
| 6286 | Writes and returns a new value to CR2. This function is only available on\r | |
| 030cd1a2 | 6287 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6288 | \r |
| 6289 | @param Cr2 The value to write to CR2.\r | |
| 6290 | \r | |
| 6291 | @return The value written to CR2.\r | |
| 6292 | \r | |
| 6293 | **/\r | |
| 6294 | UINTN\r | |
| 6295 | EFIAPI\r | |
| 6296 | AsmWriteCr2 (\r | |
| 6297 | UINTN Cr2\r | |
| 6298 | );\r | |
| 6299 | \r | |
| 6300 | \r | |
| 6301 | /**\r | |
| 6302 | Writes a value to Control Register 3 (CR3).\r | |
| 6303 | \r | |
| 6304 | Writes and returns a new value to CR3. This function is only available on\r | |
| 030cd1a2 | 6305 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6306 | \r |
| 6307 | @param Cr3 The value to write to CR3.\r | |
| 6308 | \r | |
| 6309 | @return The value written to CR3.\r | |
| 6310 | \r | |
| 6311 | **/\r | |
| 6312 | UINTN\r | |
| 6313 | EFIAPI\r | |
| 6314 | AsmWriteCr3 (\r | |
| 6315 | UINTN Cr3\r | |
| 6316 | );\r | |
| 6317 | \r | |
| 6318 | \r | |
| 6319 | /**\r | |
| 6320 | Writes a value to Control Register 4 (CR4).\r | |
| 6321 | \r | |
| 6322 | Writes and returns a new value to CR4. This function is only available on\r | |
| 030cd1a2 | 6323 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6324 | \r |
| 6325 | @param Cr4 The value to write to CR4.\r | |
| 6326 | \r | |
| 6327 | @return The value written to CR4.\r | |
| 6328 | \r | |
| 6329 | **/\r | |
| 6330 | UINTN\r | |
| 6331 | EFIAPI\r | |
| 6332 | AsmWriteCr4 (\r | |
| 6333 | UINTN Cr4\r | |
| 6334 | );\r | |
| 6335 | \r | |
| 6336 | \r | |
| 6337 | /**\r | |
| 6338 | Reads the current value of Debug Register 0 (DR0).\r | |
| 6339 | \r | |
| 6340 | Reads and returns the current value of DR0. This function is only available\r | |
| 030cd1a2 | 6341 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6342 | x64.\r | |
| ac644614 | 6343 | \r |
| 6344 | @return The value of Debug Register 0 (DR0).\r | |
| 6345 | \r | |
| 6346 | **/\r | |
| 6347 | UINTN\r | |
| 6348 | EFIAPI\r | |
| 6349 | AsmReadDr0 (\r | |
| 6350 | VOID\r | |
| 6351 | );\r | |
| 6352 | \r | |
| 6353 | \r | |
| 6354 | /**\r | |
| 6355 | Reads the current value of Debug Register 1 (DR1).\r | |
| 6356 | \r | |
| 6357 | Reads and returns the current value of DR1. This function is only available\r | |
| 030cd1a2 | 6358 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6359 | x64.\r | |
| ac644614 | 6360 | \r |
| 6361 | @return The value of Debug Register 1 (DR1).\r | |
| 6362 | \r | |
| 6363 | **/\r | |
| 6364 | UINTN\r | |
| 6365 | EFIAPI\r | |
| 6366 | AsmReadDr1 (\r | |
| 6367 | VOID\r | |
| 6368 | );\r | |
| 6369 | \r | |
| 6370 | \r | |
| 6371 | /**\r | |
| 6372 | Reads the current value of Debug Register 2 (DR2).\r | |
| 6373 | \r | |
| 6374 | Reads and returns the current value of DR2. This function is only available\r | |
| 030cd1a2 | 6375 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6376 | x64.\r | |
| ac644614 | 6377 | \r |
| 6378 | @return The value of Debug Register 2 (DR2).\r | |
| 6379 | \r | |
| 6380 | **/\r | |
| 6381 | UINTN\r | |
| 6382 | EFIAPI\r | |
| 6383 | AsmReadDr2 (\r | |
| 6384 | VOID\r | |
| 6385 | );\r | |
| 6386 | \r | |
| 6387 | \r | |
| 6388 | /**\r | |
| 6389 | Reads the current value of Debug Register 3 (DR3).\r | |
| 6390 | \r | |
| 6391 | Reads and returns the current value of DR3. This function is only available\r | |
| 030cd1a2 | 6392 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6393 | x64.\r | |
| ac644614 | 6394 | \r |
| 6395 | @return The value of Debug Register 3 (DR3).\r | |
| 6396 | \r | |
| 6397 | **/\r | |
| 6398 | UINTN\r | |
| 6399 | EFIAPI\r | |
| 6400 | AsmReadDr3 (\r | |
| 6401 | VOID\r | |
| 6402 | );\r | |
| 6403 | \r | |
| 6404 | \r | |
| 6405 | /**\r | |
| 6406 | Reads the current value of Debug Register 4 (DR4).\r | |
| 6407 | \r | |
| 6408 | Reads and returns the current value of DR4. This function is only available\r | |
| 030cd1a2 | 6409 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6410 | x64.\r | |
| ac644614 | 6411 | \r |
| 6412 | @return The value of Debug Register 4 (DR4).\r | |
| 6413 | \r | |
| 6414 | **/\r | |
| 6415 | UINTN\r | |
| 6416 | EFIAPI\r | |
| 6417 | AsmReadDr4 (\r | |
| 6418 | VOID\r | |
| 6419 | );\r | |
| 6420 | \r | |
| 6421 | \r | |
| 6422 | /**\r | |
| 6423 | Reads the current value of Debug Register 5 (DR5).\r | |
| 6424 | \r | |
| 6425 | Reads and returns the current value of DR5. This function is only available\r | |
| 030cd1a2 | 6426 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6427 | x64.\r | |
| ac644614 | 6428 | \r |
| 6429 | @return The value of Debug Register 5 (DR5).\r | |
| 6430 | \r | |
| 6431 | **/\r | |
| 6432 | UINTN\r | |
| 6433 | EFIAPI\r | |
| 6434 | AsmReadDr5 (\r | |
| 6435 | VOID\r | |
| 6436 | );\r | |
| 6437 | \r | |
| 6438 | \r | |
| 6439 | /**\r | |
| 6440 | Reads the current value of Debug Register 6 (DR6).\r | |
| 6441 | \r | |
| 6442 | Reads and returns the current value of DR6. This function is only available\r | |
| 030cd1a2 | 6443 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6444 | x64.\r | |
| ac644614 | 6445 | \r |
| 6446 | @return The value of Debug Register 6 (DR6).\r | |
| 6447 | \r | |
| 6448 | **/\r | |
| 6449 | UINTN\r | |
| 6450 | EFIAPI\r | |
| 6451 | AsmReadDr6 (\r | |
| 6452 | VOID\r | |
| 6453 | );\r | |
| 6454 | \r | |
| 6455 | \r | |
| 6456 | /**\r | |
| 6457 | Reads the current value of Debug Register 7 (DR7).\r | |
| 6458 | \r | |
| 6459 | Reads and returns the current value of DR7. This function is only available\r | |
| 030cd1a2 | 6460 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
| 6461 | x64.\r | |
| ac644614 | 6462 | \r |
| 6463 | @return The value of Debug Register 7 (DR7).\r | |
| 6464 | \r | |
| 6465 | **/\r | |
| 6466 | UINTN\r | |
| 6467 | EFIAPI\r | |
| 6468 | AsmReadDr7 (\r | |
| 6469 | VOID\r | |
| 6470 | );\r | |
| 6471 | \r | |
| 6472 | \r | |
| 6473 | /**\r | |
| 6474 | Writes a value to Debug Register 0 (DR0).\r | |
| 6475 | \r | |
| 6476 | Writes and returns a new value to DR0. This function is only available on\r | |
| 030cd1a2 | 6477 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6478 | \r |
| 6479 | @param Dr0 The value to write to Dr0.\r | |
| 6480 | \r | |
| 6481 | @return The value written to Debug Register 0 (DR0).\r | |
| 6482 | \r | |
| 6483 | **/\r | |
| 6484 | UINTN\r | |
| 6485 | EFIAPI\r | |
| 6486 | AsmWriteDr0 (\r | |
| 6487 | UINTN Dr0\r | |
| 6488 | );\r | |
| 6489 | \r | |
| 6490 | \r | |
| 6491 | /**\r | |
| 6492 | Writes a value to Debug Register 1 (DR1).\r | |
| 6493 | \r | |
| 6494 | Writes and returns a new value to DR1. This function is only available on\r | |
| 030cd1a2 | 6495 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6496 | \r |
| 6497 | @param Dr1 The value to write to Dr1.\r | |
| 6498 | \r | |
| 6499 | @return The value written to Debug Register 1 (DR1).\r | |
| 6500 | \r | |
| 6501 | **/\r | |
| 6502 | UINTN\r | |
| 6503 | EFIAPI\r | |
| 6504 | AsmWriteDr1 (\r | |
| 6505 | UINTN Dr1\r | |
| 6506 | );\r | |
| 6507 | \r | |
| 6508 | \r | |
| 6509 | /**\r | |
| 6510 | Writes a value to Debug Register 2 (DR2).\r | |
| 6511 | \r | |
| 6512 | Writes and returns a new value to DR2. This function is only available on\r | |
| 030cd1a2 | 6513 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6514 | \r |
| 6515 | @param Dr2 The value to write to Dr2.\r | |
| 6516 | \r | |
| 6517 | @return The value written to Debug Register 2 (DR2).\r | |
| 6518 | \r | |
| 6519 | **/\r | |
| 6520 | UINTN\r | |
| 6521 | EFIAPI\r | |
| 6522 | AsmWriteDr2 (\r | |
| 6523 | UINTN Dr2\r | |
| 6524 | );\r | |
| 6525 | \r | |
| 6526 | \r | |
| 6527 | /**\r | |
| 6528 | Writes a value to Debug Register 3 (DR3).\r | |
| 6529 | \r | |
| 6530 | Writes and returns a new value to DR3. This function is only available on\r | |
| 030cd1a2 | 6531 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6532 | \r |
| 6533 | @param Dr3 The value to write to Dr3.\r | |
| 6534 | \r | |
| 6535 | @return The value written to Debug Register 3 (DR3).\r | |
| 6536 | \r | |
| 6537 | **/\r | |
| 6538 | UINTN\r | |
| 6539 | EFIAPI\r | |
| 6540 | AsmWriteDr3 (\r | |
| 6541 | UINTN Dr3\r | |
| 6542 | );\r | |
| 6543 | \r | |
| 6544 | \r | |
| 6545 | /**\r | |
| 6546 | Writes a value to Debug Register 4 (DR4).\r | |
| 6547 | \r | |
| 6548 | Writes and returns a new value to DR4. This function is only available on\r | |
| 030cd1a2 | 6549 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6550 | \r |
| 6551 | @param Dr4 The value to write to Dr4.\r | |
| 6552 | \r | |
| 6553 | @return The value written to Debug Register 4 (DR4).\r | |
| 6554 | \r | |
| 6555 | **/\r | |
| 6556 | UINTN\r | |
| 6557 | EFIAPI\r | |
| 6558 | AsmWriteDr4 (\r | |
| 6559 | UINTN Dr4\r | |
| 6560 | );\r | |
| 6561 | \r | |
| 6562 | \r | |
| 6563 | /**\r | |
| 6564 | Writes a value to Debug Register 5 (DR5).\r | |
| 6565 | \r | |
| 6566 | Writes and returns a new value to DR5. This function is only available on\r | |
| 030cd1a2 | 6567 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6568 | \r |
| 6569 | @param Dr5 The value to write to Dr5.\r | |
| 6570 | \r | |
| 6571 | @return The value written to Debug Register 5 (DR5).\r | |
| 6572 | \r | |
| 6573 | **/\r | |
| 6574 | UINTN\r | |
| 6575 | EFIAPI\r | |
| 6576 | AsmWriteDr5 (\r | |
| 6577 | UINTN Dr5\r | |
| 6578 | );\r | |
| 6579 | \r | |
| 6580 | \r | |
| 6581 | /**\r | |
| 6582 | Writes a value to Debug Register 6 (DR6).\r | |
| 6583 | \r | |
| 6584 | Writes and returns a new value to DR6. This function is only available on\r | |
| 030cd1a2 | 6585 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6586 | \r |
| 6587 | @param Dr6 The value to write to Dr6.\r | |
| 6588 | \r | |
| 6589 | @return The value written to Debug Register 6 (DR6).\r | |
| 6590 | \r | |
| 6591 | **/\r | |
| 6592 | UINTN\r | |
| 6593 | EFIAPI\r | |
| 6594 | AsmWriteDr6 (\r | |
| 6595 | UINTN Dr6\r | |
| 6596 | );\r | |
| 6597 | \r | |
| 6598 | \r | |
| 6599 | /**\r | |
| 6600 | Writes a value to Debug Register 7 (DR7).\r | |
| 6601 | \r | |
| 6602 | Writes and returns a new value to DR7. This function is only available on\r | |
| 030cd1a2 | 6603 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
| ac644614 | 6604 | \r |
| 6605 | @param Dr7 The value to write to Dr7.\r | |
| 6606 | \r | |
| 6607 | @return The value written to Debug Register 7 (DR7).\r | |
| 6608 | \r | |
| 6609 | **/\r | |
| 6610 | UINTN\r | |
| 6611 | EFIAPI\r | |
| 6612 | AsmWriteDr7 (\r | |
| 6613 | UINTN Dr7\r | |
| 6614 | );\r | |
| 6615 | \r | |
| 6616 | \r | |
| 6617 | /**\r | |
| 6618 | Reads the current value of Code Segment Register (CS).\r | |
| 6619 | \r | |
| 6620 | Reads and returns the current value of CS. This function is only available on\r | |
| 030cd1a2 | 6621 | IA-32 and x64.\r |
| ac644614 | 6622 | \r |
| 6623 | @return The current value of CS.\r | |
| 6624 | \r | |
| 6625 | **/\r | |
| 6626 | UINT16\r | |
| 6627 | EFIAPI\r | |
| 6628 | AsmReadCs (\r | |
| 6629 | VOID\r | |
| 6630 | );\r | |
| 6631 | \r | |
| 6632 | \r | |
| 6633 | /**\r | |
| 6634 | Reads the current value of Data Segment Register (DS).\r | |
| 6635 | \r | |
| 6636 | Reads and returns the current value of DS. This function is only available on\r | |
| 030cd1a2 | 6637 | IA-32 and x64.\r |
| ac644614 | 6638 | \r |
| 6639 | @return The current value of DS.\r | |
| 6640 | \r | |
| 6641 | **/\r | |
| 6642 | UINT16\r | |
| 6643 | EFIAPI\r | |
| 6644 | AsmReadDs (\r | |
| 6645 | VOID\r | |
| 6646 | );\r | |
| 6647 | \r | |
| 6648 | \r | |
| 6649 | /**\r | |
| 6650 | Reads the current value of Extra Segment Register (ES).\r | |
| 6651 | \r | |
| 6652 | Reads and returns the current value of ES. This function is only available on\r | |
| 030cd1a2 | 6653 | IA-32 and x64.\r |
| ac644614 | 6654 | \r |
| 6655 | @return The current value of ES.\r | |
| 6656 | \r | |
| 6657 | **/\r | |
| 6658 | UINT16\r | |
| 6659 | EFIAPI\r | |
| 6660 | AsmReadEs (\r | |
| 6661 | VOID\r | |
| 6662 | );\r | |
| 6663 | \r | |
| 6664 | \r | |
| 6665 | /**\r | |
| 6666 | Reads the current value of FS Data Segment Register (FS).\r | |
| 6667 | \r | |
| 6668 | Reads and returns the current value of FS. This function is only available on\r | |
| 030cd1a2 | 6669 | IA-32 and x64.\r |
| ac644614 | 6670 | \r |
| 6671 | @return The current value of FS.\r | |
| 6672 | \r | |
| 6673 | **/\r | |
| 6674 | UINT16\r | |
| 6675 | EFIAPI\r | |
| 6676 | AsmReadFs (\r | |
| 6677 | VOID\r | |
| 6678 | );\r | |
| 6679 | \r | |
| 6680 | \r | |
| 6681 | /**\r | |
| 6682 | Reads the current value of GS Data Segment Register (GS).\r | |
| 6683 | \r | |
| 6684 | Reads and returns the current value of GS. This function is only available on\r | |
| 030cd1a2 | 6685 | IA-32 and x64.\r |
| ac644614 | 6686 | \r |
| 6687 | @return The current value of GS.\r | |
| 6688 | \r | |
| 6689 | **/\r | |
| 6690 | UINT16\r | |
| 6691 | EFIAPI\r | |
| 6692 | AsmReadGs (\r | |
| 6693 | VOID\r | |
| 6694 | );\r | |
| 6695 | \r | |
| 6696 | \r | |
| 6697 | /**\r | |
| 6698 | Reads the current value of Stack Segment Register (SS).\r | |
| 6699 | \r | |
| 6700 | Reads and returns the current value of SS. This function is only available on\r | |
| 030cd1a2 | 6701 | IA-32 and x64.\r |
| ac644614 | 6702 | \r |
| 6703 | @return The current value of SS.\r | |
| 6704 | \r | |
| 6705 | **/\r | |
| 6706 | UINT16\r | |
| 6707 | EFIAPI\r | |
| 6708 | AsmReadSs (\r | |
| 6709 | VOID\r | |
| 6710 | );\r | |
| 6711 | \r | |
| 6712 | \r | |
| 6713 | /**\r | |
| 6714 | Reads the current value of Task Register (TR).\r | |
| 6715 | \r | |
| 6716 | Reads and returns the current value of TR. This function is only available on\r | |
| 030cd1a2 | 6717 | IA-32 and x64.\r |
| ac644614 | 6718 | \r |
| 6719 | @return The current value of TR.\r | |
| 6720 | \r | |
| 6721 | **/\r | |
| 6722 | UINT16\r | |
| 6723 | EFIAPI\r | |
| 6724 | AsmReadTr (\r | |
| 6725 | VOID\r | |
| 6726 | );\r | |
| 6727 | \r | |
| 6728 | \r | |
| 6729 | /**\r | |
| 6730 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
| 6731 | \r | |
| 6732 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
| 030cd1a2 | 6733 | function is only available on IA-32 and x64.\r |
| ac644614 | 6734 | \r |
| 6735 | If Gdtr is NULL, then ASSERT().\r | |
| 6736 | \r | |
| af2dc6a7 | 6737 | @param Gdtr The pointer to a GDTR descriptor.\r |
| ac644614 | 6738 | \r |
| 6739 | **/\r | |
| 6740 | VOID\r | |
| 6741 | EFIAPI\r | |
| 6742 | AsmReadGdtr (\r | |
| 6743 | OUT IA32_DESCRIPTOR *Gdtr\r | |
| 6744 | );\r | |
| 6745 | \r | |
| 6746 | \r | |
| 6747 | /**\r | |
| 6748 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
| 6749 | \r | |
| 6750 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
| 030cd1a2 | 6751 | only available on IA-32 and x64.\r |
| ac644614 | 6752 | \r |
| 6753 | If Gdtr is NULL, then ASSERT().\r | |
| 6754 | \r | |
| af2dc6a7 | 6755 | @param Gdtr The pointer to a GDTR descriptor.\r |
| ac644614 | 6756 | \r |
| 6757 | **/\r | |
| 6758 | VOID\r | |
| 6759 | EFIAPI\r | |
| 6760 | AsmWriteGdtr (\r | |
| 6761 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
| 6762 | );\r | |
| 6763 | \r | |
| 6764 | \r | |
| 6765 | /**\r | |
| 17f695ed | 6766 | Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
| ac644614 | 6767 | \r |
| 6768 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
| 030cd1a2 | 6769 | function is only available on IA-32 and x64.\r |
| ac644614 | 6770 | \r |
| 6771 | If Idtr is NULL, then ASSERT().\r | |
| 6772 | \r | |
| af2dc6a7 | 6773 | @param Idtr The pointer to a IDTR descriptor.\r |
| ac644614 | 6774 | \r |
| 6775 | **/\r | |
| 6776 | VOID\r | |
| 6777 | EFIAPI\r | |
| 6778 | AsmReadIdtr (\r | |
| 6779 | OUT IA32_DESCRIPTOR *Idtr\r | |
| 6780 | );\r | |
| 6781 | \r | |
| 6782 | \r | |
| 6783 | /**\r | |
| 17f695ed | 6784 | Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
| ac644614 | 6785 | \r |
| 6786 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
| 030cd1a2 | 6787 | only available on IA-32 and x64.\r |
| ac644614 | 6788 | \r |
| 6789 | If Idtr is NULL, then ASSERT().\r | |
| 6790 | \r | |
| af2dc6a7 | 6791 | @param Idtr The pointer to a IDTR descriptor.\r |
| ac644614 | 6792 | \r |
| 6793 | **/\r | |
| 6794 | VOID\r | |
| 6795 | EFIAPI\r | |
| 6796 | AsmWriteIdtr (\r | |
| 6797 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
| 6798 | );\r | |
| 6799 | \r | |
| 6800 | \r | |
| 6801 | /**\r | |
| 6802 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
| 6803 | \r | |
| 6804 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
| 030cd1a2 | 6805 | only available on IA-32 and x64.\r |
| ac644614 | 6806 | \r |
| 6807 | @return The current selector of LDT.\r | |
| 6808 | \r | |
| 6809 | **/\r | |
| 6810 | UINT16\r | |
| 6811 | EFIAPI\r | |
| 6812 | AsmReadLdtr (\r | |
| 6813 | VOID\r | |
| 6814 | );\r | |
| 6815 | \r | |
| 6816 | \r | |
| 6817 | /**\r | |
| 17f695ed | 6818 | Writes the current Local Descriptor Table Register (LDTR) selector.\r |
| ac644614 | 6819 | \r |
| 6820 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
| 030cd1a2 | 6821 | only available on IA-32 and x64.\r |
| ac644614 | 6822 | \r |
| 6823 | @param Ldtr 16-bit LDTR selector value.\r | |
| 6824 | \r | |
| 6825 | **/\r | |
| 6826 | VOID\r | |
| 6827 | EFIAPI\r | |
| 6828 | AsmWriteLdtr (\r | |
| 6829 | IN UINT16 Ldtr\r | |
| 6830 | );\r | |
| 6831 | \r | |
| 6832 | \r | |
| 6833 | /**\r | |
| 6834 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
| 6835 | \r | |
| 6836 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
| 6837 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
| 030cd1a2 | 6838 | available on IA-32 and x64.\r |
| ac644614 | 6839 | \r |
| 6840 | If Buffer is NULL, then ASSERT().\r | |
| 6841 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
| 6842 | \r | |
| af2dc6a7 | 6843 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
| ac644614 | 6844 | \r |
| 6845 | **/\r | |
| 6846 | VOID\r | |
| 6847 | EFIAPI\r | |
| 6848 | AsmFxSave (\r | |
| 6849 | OUT IA32_FX_BUFFER *Buffer\r | |
| 6850 | );\r | |
| 6851 | \r | |
| 6852 | \r | |
| 6853 | /**\r | |
| 6854 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
| 6855 | \r | |
| 6856 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
| 6857 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
| 030cd1a2 | 6858 | only available on IA-32 and x64.\r |
| ac644614 | 6859 | \r |
| 6860 | If Buffer is NULL, then ASSERT().\r | |
| 6861 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
| 6862 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
| 6863 | \r | |
| af2dc6a7 | 6864 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
| ac644614 | 6865 | \r |
| 6866 | **/\r | |
| 6867 | VOID\r | |
| 6868 | EFIAPI\r | |
| 6869 | AsmFxRestore (\r | |
| 6870 | IN CONST IA32_FX_BUFFER *Buffer\r | |
| 6871 | );\r | |
| 6872 | \r | |
| 6873 | \r | |
| 6874 | /**\r | |
| 6875 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
| 6876 | \r | |
| 6877 | Reads and returns the current value of MM0. This function is only available\r | |
| 030cd1a2 | 6878 | on IA-32 and x64.\r |
| ac644614 | 6879 | \r |
| 6880 | @return The current value of MM0.\r | |
| 6881 | \r | |
| 6882 | **/\r | |
| 6883 | UINT64\r | |
| 6884 | EFIAPI\r | |
| 6885 | AsmReadMm0 (\r | |
| 6886 | VOID\r | |
| 6887 | );\r | |
| 6888 | \r | |
| 6889 | \r | |
| 6890 | /**\r | |
| 6891 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
| 6892 | \r | |
| 6893 | Reads and returns the current value of MM1. This function is only available\r | |
| 030cd1a2 | 6894 | on IA-32 and x64.\r |
| ac644614 | 6895 | \r |
| 6896 | @return The current value of MM1.\r | |
| 6897 | \r | |
| 6898 | **/\r | |
| 6899 | UINT64\r | |
| 6900 | EFIAPI\r | |
| 6901 | AsmReadMm1 (\r | |
| 6902 | VOID\r | |
| 6903 | );\r | |
| 6904 | \r | |
| 6905 | \r | |
| 6906 | /**\r | |
| 6907 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
| 6908 | \r | |
| 6909 | Reads and returns the current value of MM2. This function is only available\r | |
| 030cd1a2 | 6910 | on IA-32 and x64.\r |
| ac644614 | 6911 | \r |
| 6912 | @return The current value of MM2.\r | |
| 6913 | \r | |
| 6914 | **/\r | |
| 6915 | UINT64\r | |
| 6916 | EFIAPI\r | |
| 6917 | AsmReadMm2 (\r | |
| 6918 | VOID\r | |
| 6919 | );\r | |
| 6920 | \r | |
| 6921 | \r | |
| 6922 | /**\r | |
| 6923 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
| 6924 | \r | |
| 6925 | Reads and returns the current value of MM3. This function is only available\r | |
| 030cd1a2 | 6926 | on IA-32 and x64.\r |
| ac644614 | 6927 | \r |
| 6928 | @return The current value of MM3.\r | |
| 6929 | \r | |
| 6930 | **/\r | |
| 6931 | UINT64\r | |
| 6932 | EFIAPI\r | |
| 6933 | AsmReadMm3 (\r | |
| 6934 | VOID\r | |
| 6935 | );\r | |
| 6936 | \r | |
| 6937 | \r | |
| 6938 | /**\r | |
| 6939 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
| 6940 | \r | |
| 6941 | Reads and returns the current value of MM4. This function is only available\r | |
| 030cd1a2 | 6942 | on IA-32 and x64.\r |
| ac644614 | 6943 | \r |
| 6944 | @return The current value of MM4.\r | |
| 6945 | \r | |
| 6946 | **/\r | |
| 6947 | UINT64\r | |
| 6948 | EFIAPI\r | |
| 6949 | AsmReadMm4 (\r | |
| 6950 | VOID\r | |
| 6951 | );\r | |
| 6952 | \r | |
| 6953 | \r | |
| 6954 | /**\r | |
| 6955 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
| 6956 | \r | |
| 6957 | Reads and returns the current value of MM5. This function is only available\r | |
| 030cd1a2 | 6958 | on IA-32 and x64.\r |
| ac644614 | 6959 | \r |
| 6960 | @return The current value of MM5.\r | |
| 6961 | \r | |
| 6962 | **/\r | |
| 6963 | UINT64\r | |
| 6964 | EFIAPI\r | |
| 6965 | AsmReadMm5 (\r | |
| 6966 | VOID\r | |
| 6967 | );\r | |
| 6968 | \r | |
| 6969 | \r | |
| 6970 | /**\r | |
| 6971 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
| 6972 | \r | |
| 6973 | Reads and returns the current value of MM6. This function is only available\r | |
| 030cd1a2 | 6974 | on IA-32 and x64.\r |
| ac644614 | 6975 | \r |
| 6976 | @return The current value of MM6.\r | |
| 6977 | \r | |
| 6978 | **/\r | |
| 6979 | UINT64\r | |
| 6980 | EFIAPI\r | |
| 6981 | AsmReadMm6 (\r | |
| 6982 | VOID\r | |
| 6983 | );\r | |
| 6984 | \r | |
| 6985 | \r | |
| 6986 | /**\r | |
| 6987 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
| 6988 | \r | |
| 6989 | Reads and returns the current value of MM7. This function is only available\r | |
| 030cd1a2 | 6990 | on IA-32 and x64.\r |
| ac644614 | 6991 | \r |
| 6992 | @return The current value of MM7.\r | |
| 6993 | \r | |
| 6994 | **/\r | |
| 6995 | UINT64\r | |
| 6996 | EFIAPI\r | |
| 6997 | AsmReadMm7 (\r | |
| 6998 | VOID\r | |
| 6999 | );\r | |
| 7000 | \r | |
| 7001 | \r | |
| 7002 | /**\r | |
| 7003 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
| 7004 | \r | |
| 7005 | Writes the current value of MM0. This function is only available on IA32 and\r | |
| 030cd1a2 | 7006 | x64.\r |
| ac644614 | 7007 | \r |
| 7008 | @param Value The 64-bit value to write to MM0.\r | |
| 7009 | \r | |
| 7010 | **/\r | |
| 7011 | VOID\r | |
| 7012 | EFIAPI\r | |
| 7013 | AsmWriteMm0 (\r | |
| 7014 | IN UINT64 Value\r | |
| 7015 | );\r | |
| 7016 | \r | |
| 7017 | \r | |
| 7018 | /**\r | |
| 7019 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
| 7020 | \r | |
| 7021 | Writes the current value of MM1. This function is only available on IA32 and\r | |
| 030cd1a2 | 7022 | x64.\r |
| ac644614 | 7023 | \r |
| 7024 | @param Value The 64-bit value to write to MM1.\r | |
| 7025 | \r | |
| 7026 | **/\r | |
| 7027 | VOID\r | |
| 7028 | EFIAPI\r | |
| 7029 | AsmWriteMm1 (\r | |
| 7030 | IN UINT64 Value\r | |
| 7031 | );\r | |
| 7032 | \r | |
| 7033 | \r | |
| 7034 | /**\r | |
| 7035 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
| 7036 | \r | |
| 7037 | Writes the current value of MM2. This function is only available on IA32 and\r | |
| 030cd1a2 | 7038 | x64.\r |
| ac644614 | 7039 | \r |
| 7040 | @param Value The 64-bit value to write to MM2.\r | |
| 7041 | \r | |
| 7042 | **/\r | |
| 7043 | VOID\r | |
| 7044 | EFIAPI\r | |
| 7045 | AsmWriteMm2 (\r | |
| 7046 | IN UINT64 Value\r | |
| 7047 | );\r | |
| 7048 | \r | |
| 7049 | \r | |
| 7050 | /**\r | |
| 7051 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
| 7052 | \r | |
| 7053 | Writes the current value of MM3. This function is only available on IA32 and\r | |
| 030cd1a2 | 7054 | x64.\r |
| ac644614 | 7055 | \r |
| 7056 | @param Value The 64-bit value to write to MM3.\r | |
| 7057 | \r | |
| 7058 | **/\r | |
| 7059 | VOID\r | |
| 7060 | EFIAPI\r | |
| 7061 | AsmWriteMm3 (\r | |
| 7062 | IN UINT64 Value\r | |
| 7063 | );\r | |
| 7064 | \r | |
| 7065 | \r | |
| 7066 | /**\r | |
| 7067 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
| 7068 | \r | |
| 7069 | Writes the current value of MM4. This function is only available on IA32 and\r | |
| 030cd1a2 | 7070 | x64.\r |
| ac644614 | 7071 | \r |
| 7072 | @param Value The 64-bit value to write to MM4.\r | |
| 7073 | \r | |
| 7074 | **/\r | |
| 7075 | VOID\r | |
| 7076 | EFIAPI\r | |
| 7077 | AsmWriteMm4 (\r | |
| 7078 | IN UINT64 Value\r | |
| 7079 | );\r | |
| 7080 | \r | |
| 7081 | \r | |
| 7082 | /**\r | |
| 7083 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
| 7084 | \r | |
| 7085 | Writes the current value of MM5. This function is only available on IA32 and\r | |
| 030cd1a2 | 7086 | x64.\r |
| ac644614 | 7087 | \r |
| 7088 | @param Value The 64-bit value to write to MM5.\r | |
| 7089 | \r | |
| 7090 | **/\r | |
| 7091 | VOID\r | |
| 7092 | EFIAPI\r | |
| 7093 | AsmWriteMm5 (\r | |
| 7094 | IN UINT64 Value\r | |
| 7095 | );\r | |
| 7096 | \r | |
| 7097 | \r | |
| 7098 | /**\r | |
| 7099 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
| 7100 | \r | |
| 7101 | Writes the current value of MM6. This function is only available on IA32 and\r | |
| 030cd1a2 | 7102 | x64.\r |
| ac644614 | 7103 | \r |
| 7104 | @param Value The 64-bit value to write to MM6.\r | |
| 7105 | \r | |
| 7106 | **/\r | |
| 7107 | VOID\r | |
| 7108 | EFIAPI\r | |
| 7109 | AsmWriteMm6 (\r | |
| 7110 | IN UINT64 Value\r | |
| 7111 | );\r | |
| 7112 | \r | |
| 7113 | \r | |
| 7114 | /**\r | |
| 7115 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
| 7116 | \r | |
| 7117 | Writes the current value of MM7. This function is only available on IA32 and\r | |
| 030cd1a2 | 7118 | x64.\r |
| ac644614 | 7119 | \r |
| 7120 | @param Value The 64-bit value to write to MM7.\r | |
| 7121 | \r | |
| 7122 | **/\r | |
| 7123 | VOID\r | |
| 7124 | EFIAPI\r | |
| 7125 | AsmWriteMm7 (\r | |
| 7126 | IN UINT64 Value\r | |
| 7127 | );\r | |
| 7128 | \r | |
| 7129 | \r | |
| 7130 | /**\r | |
| 7131 | Reads the current value of Time Stamp Counter (TSC).\r | |
| 7132 | \r | |
| 7133 | Reads and returns the current value of TSC. This function is only available\r | |
| 030cd1a2 | 7134 | on IA-32 and x64.\r |
| ac644614 | 7135 | \r |
| 7136 | @return The current value of TSC\r | |
| 7137 | \r | |
| 7138 | **/\r | |
| 7139 | UINT64\r | |
| 7140 | EFIAPI\r | |
| 7141 | AsmReadTsc (\r | |
| 7142 | VOID\r | |
| 7143 | );\r | |
| 7144 | \r | |
| 7145 | \r | |
| 7146 | /**\r | |
| 7147 | Reads the current value of a Performance Counter (PMC).\r | |
| 7148 | \r | |
| 7149 | Reads and returns the current value of performance counter specified by\r | |
| 030cd1a2 | 7150 | Index. This function is only available on IA-32 and x64.\r |
| ac644614 | 7151 | \r |
| 7152 | @param Index The 32-bit Performance Counter index to read.\r | |
| 7153 | \r | |
| 7154 | @return The value of the PMC specified by Index.\r | |
| 7155 | \r | |
| 7156 | **/\r | |
| 7157 | UINT64\r | |
| 7158 | EFIAPI\r | |
| 7159 | AsmReadPmc (\r | |
| 7160 | IN UINT32 Index\r | |
| 7161 | );\r | |
| 7162 | \r | |
| 7163 | \r | |
| 7164 | /**\r | |
| 7165 | Sets up a monitor buffer that is used by AsmMwait().\r | |
| 7166 | \r | |
| 7167 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
| 030cd1a2 | 7168 | and Edx. Returns Eax. This function is only available on IA-32 and x64.\r |
| ac644614 | 7169 | \r |
| 7170 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
| 7171 | instruction.\r | |
| 7172 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
| 7173 | instruction.\r | |
| 7174 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
| 7175 | instruction.\r | |
| 7176 | \r | |
| 7177 | @return Eax\r | |
| 7178 | \r | |
| 7179 | **/\r | |
| 7180 | UINTN\r | |
| 7181 | EFIAPI\r | |
| 7182 | AsmMonitor (\r | |
| 7183 | IN UINTN Eax,\r | |
| 7184 | IN UINTN Ecx,\r | |
| 7185 | IN UINTN Edx\r | |
| 7186 | );\r | |
| 7187 | \r | |
| 7188 | \r | |
| 7189 | /**\r | |
| 7190 | Executes an MWAIT instruction.\r | |
| 7191 | \r | |
| 7192 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
| 030cd1a2 | 7193 | Ecx. Returns Eax. This function is only available on IA-32 and x64.\r |
| ac644614 | 7194 | \r |
| 7195 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
| 7196 | instruction.\r | |
| 7197 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
| 7198 | instruction.\r | |
| 7199 | \r | |
| 7200 | @return Eax\r | |
| 7201 | \r | |
| 7202 | **/\r | |
| 7203 | UINTN\r | |
| 7204 | EFIAPI\r | |
| 7205 | AsmMwait (\r | |
| 7206 | IN UINTN Eax,\r | |
| 7207 | IN UINTN Ecx\r | |
| 7208 | );\r | |
| 7209 | \r | |
| 7210 | \r | |
| 7211 | /**\r | |
| 7212 | Executes a WBINVD instruction.\r | |
| 7213 | \r | |
| 7214 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
| 030cd1a2 | 7215 | x64.\r |
| ac644614 | 7216 | \r |
| 7217 | **/\r | |
| 7218 | VOID\r | |
| 7219 | EFIAPI\r | |
| 7220 | AsmWbinvd (\r | |
| 7221 | VOID\r | |
| 7222 | );\r | |
| 7223 | \r | |
| 7224 | \r | |
| 7225 | /**\r | |
| 7226 | Executes a INVD instruction.\r | |
| 7227 | \r | |
| 7228 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
| 030cd1a2 | 7229 | x64.\r |
| ac644614 | 7230 | \r |
| 7231 | **/\r | |
| 7232 | VOID\r | |
| 7233 | EFIAPI\r | |
| 7234 | AsmInvd (\r | |
| 7235 | VOID\r | |
| 7236 | );\r | |
| 7237 | \r | |
| 7238 | \r | |
| 7239 | /**\r | |
| 7240 | Flushes a cache line from all the instruction and data caches within the\r | |
| 7241 | coherency domain of the CPU.\r | |
| 7242 | \r | |
| 7243 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
| 030cd1a2 | 7244 | This function is only available on IA-32 and x64.\r |
| ac644614 | 7245 | \r |
| 7246 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
| 7247 | in a physical addressing mode, then LinearAddress is a\r | |
| 7248 | physical address. If the CPU is in a virtual\r | |
| 7249 | addressing mode, then LinearAddress is a virtual\r | |
| 7250 | address.\r | |
| 7251 | \r | |
| af2dc6a7 | 7252 | @return LinearAddress.\r |
| ac644614 | 7253 | **/\r |
| 7254 | VOID *\r | |
| 7255 | EFIAPI\r | |
| 7256 | AsmFlushCacheLine (\r | |
| 7257 | IN VOID *LinearAddress\r | |
| 7258 | );\r | |
| 7259 | \r | |
| 7260 | \r | |
| 7261 | /**\r | |
| 7262 | Enables the 32-bit paging mode on the CPU.\r | |
| 7263 | \r | |
| 7264 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
| 7265 | must be properly initialized prior to calling this service. This function\r | |
| 7266 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
| 7267 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
| 7268 | transferred to the function specified by EntryPoint using the new stack\r | |
| 7269 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
| 7270 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
| 7271 | EntryPoint must never return.\r | |
| 7272 | \r | |
| 7273 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
| 7274 | If EntryPoint is NULL, then ASSERT().\r | |
| 7275 | If NewStack is NULL, then ASSERT().\r | |
| 7276 | \r | |
| 7277 | There are a number of constraints that must be followed before calling this\r | |
| 7278 | function:\r | |
| 7279 | 1) Interrupts must be disabled.\r | |
| 7280 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
| 7281 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
| 7282 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
| 7283 | descriptors.\r | |
| 7284 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
| 7285 | is complete, and those page tables must guarantee that the pages for this\r | |
| 7286 | function and the stack are identity mapped.\r | |
| 7287 | \r | |
| 7288 | @param EntryPoint A pointer to function to call with the new stack after\r | |
| 7289 | paging is enabled.\r | |
| 7290 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
| 7291 | function as the first parameter after paging is enabled.\r | |
| 7292 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
| 7293 | function as the second parameter after paging is enabled.\r | |
| 7294 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
| 7295 | function after paging is enabled.\r | |
| 7296 | \r | |
| 7297 | **/\r | |
| 7298 | VOID\r | |
| 7299 | EFIAPI\r | |
| 7300 | AsmEnablePaging32 (\r | |
| 7301 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
| 7302 | IN VOID *Context1, OPTIONAL\r | |
| 7303 | IN VOID *Context2, OPTIONAL\r | |
| 7304 | IN VOID *NewStack\r | |
| 7305 | );\r | |
| 7306 | \r | |
| 7307 | \r | |
| 7308 | /**\r | |
| 7309 | Disables the 32-bit paging mode on the CPU.\r | |
| 7310 | \r | |
| 7311 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
| 7312 | mode. This function assumes the current execution mode is 32-paged protected\r | |
| 7313 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
| 7314 | is disabled, control is transferred to the function specified by EntryPoint\r | |
| 7315 | using the new stack specified by NewStack and passing in the parameters\r | |
| 7316 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
| 7317 | may be NULL. The function EntryPoint must never return.\r | |
| 7318 | \r | |
| 7319 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
| 7320 | If EntryPoint is NULL, then ASSERT().\r | |
| 7321 | If NewStack is NULL, then ASSERT().\r | |
| 7322 | \r | |
| 7323 | There are a number of constraints that must be followed before calling this\r | |
| 7324 | function:\r | |
| 7325 | 1) Interrupts must be disabled.\r | |
| 7326 | 2) The caller must be in 32-bit paged mode.\r | |
| 7327 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
| 7328 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
| 7329 | this function and the stack are identity mapped.\r | |
| 7330 | \r | |
| 7331 | @param EntryPoint A pointer to function to call with the new stack after\r | |
| 7332 | paging is disabled.\r | |
| 7333 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
| 7334 | function as the first parameter after paging is disabled.\r | |
| 7335 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
| 7336 | function as the second parameter after paging is\r | |
| 7337 | disabled.\r | |
| 7338 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
| 7339 | function after paging is disabled.\r | |
| 7340 | \r | |
| 7341 | **/\r | |
| 7342 | VOID\r | |
| 7343 | EFIAPI\r | |
| 7344 | AsmDisablePaging32 (\r | |
| 7345 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
| 7346 | IN VOID *Context1, OPTIONAL\r | |
| 7347 | IN VOID *Context2, OPTIONAL\r | |
| 7348 | IN VOID *NewStack\r | |
| 7349 | );\r | |
| 7350 | \r | |
| 7351 | \r | |
| 7352 | /**\r | |
| 7353 | Enables the 64-bit paging mode on the CPU.\r | |
| 7354 | \r | |
| 7355 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
| 7356 | must be properly initialized prior to calling this service. This function\r | |
| 7357 | assumes the current execution mode is 32-bit protected mode with flat\r | |
| 7358 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
| 7359 | paging mode is enabled, control is transferred to the function specified by\r | |
| 7360 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
| 7361 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
| 7362 | optional and may be 0. The function EntryPoint must never return.\r | |
| 7363 | \r | |
| 7364 | If the current execution mode is not 32-bit protected mode with flat\r | |
| 7365 | descriptors, then ASSERT().\r | |
| 7366 | If EntryPoint is 0, then ASSERT().\r | |
| 7367 | If NewStack is 0, then ASSERT().\r | |
| 7368 | \r | |
| 17f695ed | 7369 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
| ac644614 | 7370 | is called. The descriptor in the GDT that this selector\r |
| 7371 | references must be setup for long mode.\r | |
| 7372 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
| 7373 | the new stack after paging is enabled.\r | |
| 7374 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
| 7375 | the EntryPoint function as the first parameter after\r | |
| 7376 | paging is enabled.\r | |
| 7377 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
| 7378 | the EntryPoint function as the second parameter after\r | |
| 7379 | paging is enabled.\r | |
| 7380 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
| 7381 | the EntryPoint function after paging is enabled.\r | |
| 7382 | \r | |
| 7383 | **/\r | |
| 7384 | VOID\r | |
| 7385 | EFIAPI\r | |
| 7386 | AsmEnablePaging64 (\r | |
| 17f695ed | 7387 | IN UINT16 Cs,\r |
| ac644614 | 7388 | IN UINT64 EntryPoint,\r |
| 7389 | IN UINT64 Context1, OPTIONAL\r | |
| 7390 | IN UINT64 Context2, OPTIONAL\r | |
| 7391 | IN UINT64 NewStack\r | |
| 7392 | );\r | |
| 7393 | \r | |
| 7394 | \r | |
| 7395 | /**\r | |
| 7396 | Disables the 64-bit paging mode on the CPU.\r | |
| 7397 | \r | |
| 7398 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
| 7399 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
| 030cd1a2 | 7400 | This function is only available on x64. After the 64-bit paging mode is\r |
| ac644614 | 7401 | disabled, control is transferred to the function specified by EntryPoint\r |
| 7402 | using the new stack specified by NewStack and passing in the parameters\r | |
| 7403 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
| 7404 | may be 0. The function EntryPoint must never return.\r | |
| 7405 | \r | |
| 7406 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
| 7407 | If EntryPoint is 0, then ASSERT().\r | |
| 7408 | If NewStack is 0, then ASSERT().\r | |
| 7409 | \r | |
| 17f695ed | 7410 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
| ac644614 | 7411 | is called. The descriptor in the GDT that this selector\r |
| 7412 | references must be setup for 32-bit protected mode.\r | |
| 7413 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
| 7414 | the new stack after paging is disabled.\r | |
| 7415 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
| 7416 | the EntryPoint function as the first parameter after\r | |
| 7417 | paging is disabled.\r | |
| 7418 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
| 7419 | the EntryPoint function as the second parameter after\r | |
| 7420 | paging is disabled.\r | |
| 7421 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
| 7422 | the EntryPoint function after paging is disabled.\r | |
| 7423 | \r | |
| 7424 | **/\r | |
| 7425 | VOID\r | |
| 7426 | EFIAPI\r | |
| 7427 | AsmDisablePaging64 (\r | |
| 17f695ed | 7428 | IN UINT16 Cs,\r |
| ac644614 | 7429 | IN UINT32 EntryPoint,\r |
| 7430 | IN UINT32 Context1, OPTIONAL\r | |
| 7431 | IN UINT32 Context2, OPTIONAL\r | |
| 7432 | IN UINT32 NewStack\r | |
| 7433 | );\r | |
| 7434 | \r | |
| 7435 | \r | |
| 7436 | //\r | |
| 7437 | // 16-bit thunking services\r | |
| 7438 | //\r | |
| 7439 | \r | |
| 7440 | /**\r | |
| 7441 | Retrieves the properties for 16-bit thunk functions.\r | |
| 7442 | \r | |
| 7443 | Computes the size of the buffer and stack below 1MB required to use the\r | |
| 7444 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
| 7445 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
| 7446 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
| 7447 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
| 7448 | of bytes that need to be passed to the 16-bit real mode code.\r | |
| 52fa075c | 7449 | \r |
| ac644614 | 7450 | If RealModeBufferSize is NULL, then ASSERT().\r |
| 7451 | If ExtraStackSize is NULL, then ASSERT().\r | |
| 7452 | \r | |
| 7453 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
| 7454 | required to use the 16-bit thunk functions.\r | |
| 7455 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
| 7456 | that the 16-bit thunk functions require for\r | |
| 7457 | temporary storage in the transition to and from\r | |
| 7458 | 16-bit real mode.\r | |
| 7459 | \r | |
| 7460 | **/\r | |
| 7461 | VOID\r | |
| 7462 | EFIAPI\r | |
| 7463 | AsmGetThunk16Properties (\r | |
| 7464 | OUT UINT32 *RealModeBufferSize,\r | |
| 7465 | OUT UINT32 *ExtraStackSize\r | |
| 7466 | );\r | |
| 7467 | \r | |
| 7468 | \r | |
| 7469 | /**\r | |
| 7470 | Prepares all structures a code required to use AsmThunk16().\r | |
| 7471 | \r | |
| 7472 | Prepares all structures and code required to use AsmThunk16().\r | |
| 52fa075c | 7473 | \r |
| 8243b089 | 7474 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
| 7475 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
| ac644614 | 7476 | \r |
| 7477 | If ThunkContext is NULL, then ASSERT().\r | |
| 7478 | \r | |
| 7479 | @param ThunkContext A pointer to the context structure that describes the\r | |
| 7480 | 16-bit real mode code to call.\r | |
| 7481 | \r | |
| 7482 | **/\r | |
| 7483 | VOID\r | |
| 7484 | EFIAPI\r | |
| 7485 | AsmPrepareThunk16 (\r | |
| 1445300f | 7486 | IN OUT THUNK_CONTEXT *ThunkContext\r |
| ac644614 | 7487 | );\r |
| 7488 | \r | |
| 7489 | \r | |
| 7490 | /**\r | |
| 7491 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
| 7492 | \r | |
| 7493 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
| 17f695ed | 7494 | AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r |
| 7495 | This function must be called with interrupts disabled.\r | |
| 7496 | \r | |
| 7497 | The register state from the RealModeState field of ThunkContext is restored just prior \r | |
| 7498 | to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r | |
| 7499 | which is used to set the interrupt state when a 16-bit real mode entry point is called.\r | |
| 7500 | Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r | |
| 7501 | The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r | |
| 7502 | the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r | |
| 7503 | The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r | |
| 7504 | so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r | |
| 7505 | and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r | |
| 7506 | point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r | |
| 7507 | after the RETF instruction is executed.\r | |
| 7508 | \r | |
| 7509 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
| 7510 | or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r | |
| 7511 | the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r | |
| 7512 | \r | |
| 7513 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
| 7514 | then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r | |
| 7515 | This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r | |
| 7516 | \r | |
| 7517 | If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r | |
| 7518 | is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r | |
| 7519 | \r | |
| 7520 | If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r | |
| 7521 | ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r | |
| 7522 | disable the A20 mask.\r | |
| 7523 | \r | |
| 7524 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r | |
| 7525 | ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r | |
| 7526 | then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
| 7527 | \r | |
| 7528 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r | |
| 7529 | ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
| 7530 | \r | |
| ac644614 | 7531 | If ThunkContext is NULL, then ASSERT().\r |
| 7532 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
| 17f695ed | 7533 | If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r |
| 7534 | ThunkAttributes, then ASSERT().\r | |
| ac644614 | 7535 | \r |
| 8243b089 | 7536 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
| af2dc6a7 | 7537 | virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.\r |
| 52fa075c | 7538 | \r |
| ac644614 | 7539 | @param ThunkContext A pointer to the context structure that describes the\r |
| 7540 | 16-bit real mode code to call.\r | |
| 7541 | \r | |
| 7542 | **/\r | |
| 7543 | VOID\r | |
| 7544 | EFIAPI\r | |
| 7545 | AsmThunk16 (\r | |
| 7546 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
| 7547 | );\r | |
| 7548 | \r | |
| 7549 | \r | |
| 7550 | /**\r | |
| 7551 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
| 7552 | control to a 16-bit real mode entry point, and returns the results.\r | |
| 7553 | \r | |
| 7554 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
| 7555 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
| 7556 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
| 7557 | service should be used. If the caller intends to make more than one 16-bit\r | |
| 7558 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
| 7559 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
| 7560 | \r | |
| 8243b089 | 7561 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
| 7562 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
| 52fa075c | 7563 | \r |
| 17f695ed | 7564 | See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r |
| ac644614 | 7565 | \r |
| 7566 | @param ThunkContext A pointer to the context structure that describes the\r | |
| 7567 | 16-bit real mode code to call.\r | |
| 7568 | \r | |
| 7569 | **/\r | |
| 7570 | VOID\r | |
| 7571 | EFIAPI\r | |
| 7572 | AsmPrepareAndThunk16 (\r | |
| 7573 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
| 7574 | );\r | |
| 7575 | \r | |
| ac644614 | 7576 | #endif\r |
| e3a7917f | 7577 | #endif\r |
| ac644614 | 7578 | \r |
| 7579 | \r |