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ac644614 | 1 | /** @file\r |
50a64e5b | 2 | Provides string functions, linked list functions, math functions, synchronization\r |
ae591c14 | 3 | functions, file path functions, and CPU architecture-specific functions.\r |
ac644614 | 4 | \r |
ae591c14 | 5 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
9df063a0 HT |
6 | Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
7 | This program and the accompanying materials\r | |
50a64e5b | 8 | are licensed and made available under the terms and conditions of the BSD License\r |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
af2dc6a7 | 10 | http://opensource.org/licenses/bsd-license.php.\r |
ac644614 | 11 | \r |
50a64e5b | 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
ac644614 | 14 | \r |
15 | **/\r | |
16 | \r | |
17 | #ifndef __BASE_LIB__\r | |
18 | #define __BASE_LIB__\r | |
19 | \r | |
1106ffe1 | 20 | //\r |
1a2f870c | 21 | // Definitions for architecture-specific types\r |
1106ffe1 | 22 | //\r |
ac644614 | 23 | #if defined (MDE_CPU_IA32)\r |
fc30687f | 24 | ///\r |
af2dc6a7 | 25 | /// The IA-32 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 26 | ///\r |
ac644614 | 27 | typedef struct {\r |
28 | UINT32 Ebx;\r | |
29 | UINT32 Esi;\r | |
30 | UINT32 Edi;\r | |
31 | UINT32 Ebp;\r | |
32 | UINT32 Esp;\r | |
33 | UINT32 Eip;\r | |
34 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
35 | \r | |
36 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
37 | \r | |
aa4df547 | 38 | #endif // defined (MDE_CPU_IA32)\r |
39 | \r | |
40 | #if defined (MDE_CPU_IPF)\r | |
ac644614 | 41 | \r |
fc30687f | 42 | ///\r |
af2dc6a7 | 43 | /// The Itanium architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 44 | ///\r |
ac644614 | 45 | typedef struct {\r |
46 | UINT64 F2[2];\r | |
47 | UINT64 F3[2];\r | |
48 | UINT64 F4[2];\r | |
49 | UINT64 F5[2];\r | |
50 | UINT64 F16[2];\r | |
51 | UINT64 F17[2];\r | |
52 | UINT64 F18[2];\r | |
53 | UINT64 F19[2];\r | |
54 | UINT64 F20[2];\r | |
55 | UINT64 F21[2];\r | |
56 | UINT64 F22[2];\r | |
57 | UINT64 F23[2];\r | |
58 | UINT64 F24[2];\r | |
59 | UINT64 F25[2];\r | |
60 | UINT64 F26[2];\r | |
61 | UINT64 F27[2];\r | |
62 | UINT64 F28[2];\r | |
63 | UINT64 F29[2];\r | |
64 | UINT64 F30[2];\r | |
65 | UINT64 F31[2];\r | |
66 | UINT64 R4;\r | |
67 | UINT64 R5;\r | |
68 | UINT64 R6;\r | |
69 | UINT64 R7;\r | |
70 | UINT64 SP;\r | |
71 | UINT64 BR0;\r | |
72 | UINT64 BR1;\r | |
73 | UINT64 BR2;\r | |
74 | UINT64 BR3;\r | |
75 | UINT64 BR4;\r | |
76 | UINT64 BR5;\r | |
77 | UINT64 InitialUNAT;\r | |
78 | UINT64 AfterSpillUNAT;\r | |
79 | UINT64 PFS;\r | |
80 | UINT64 BSP;\r | |
81 | UINT64 Predicates;\r | |
82 | UINT64 LoopCount;\r | |
83 | UINT64 FPSR;\r | |
84 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
85 | \r | |
86 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
87 | \r | |
aa4df547 | 88 | #endif // defined (MDE_CPU_IPF)\r |
89 | \r | |
90 | #if defined (MDE_CPU_X64)\r | |
fc30687f | 91 | ///\r |
af2dc6a7 | 92 | /// The x64 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 93 | ///\r |
ac644614 | 94 | typedef struct {\r |
95 | UINT64 Rbx;\r | |
96 | UINT64 Rsp;\r | |
97 | UINT64 Rbp;\r | |
98 | UINT64 Rdi;\r | |
99 | UINT64 Rsi;\r | |
100 | UINT64 R12;\r | |
101 | UINT64 R13;\r | |
102 | UINT64 R14;\r | |
103 | UINT64 R15;\r | |
104 | UINT64 Rip;\r | |
9b9641c6 | 105 | UINT64 MxCsr;\r |
af2dc6a7 | 106 | UINT8 XmmBuffer[160]; ///< XMM6-XMM15.\r |
ac644614 | 107 | } BASE_LIBRARY_JUMP_BUFFER;\r |
108 | \r | |
109 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
110 | \r | |
aa4df547 | 111 | #endif // defined (MDE_CPU_X64)\r |
112 | \r | |
113 | #if defined (MDE_CPU_EBC)\r | |
fc30687f | 114 | ///\r |
af2dc6a7 | 115 | /// The EBC context buffer used by SetJump() and LongJump().\r |
fc30687f | 116 | ///\r |
ac644614 | 117 | typedef struct {\r |
118 | UINT64 R0;\r | |
119 | UINT64 R1;\r | |
120 | UINT64 R2;\r | |
121 | UINT64 R3;\r | |
122 | UINT64 IP;\r | |
123 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
124 | \r | |
125 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
126 | \r | |
aa4df547 | 127 | #endif // defined (MDE_CPU_EBC)\r |
ac644614 | 128 | \r |
ebd04fc2 | 129 | #if defined (MDE_CPU_ARM)\r |
130 | \r | |
131 | typedef struct {\r | |
af2dc6a7 | 132 | UINT32 R3; ///< A copy of R13.\r |
01a54966 | 133 | UINT32 R4;\r |
134 | UINT32 R5;\r | |
135 | UINT32 R6;\r | |
136 | UINT32 R7;\r | |
137 | UINT32 R8;\r | |
138 | UINT32 R9;\r | |
139 | UINT32 R10;\r | |
140 | UINT32 R11;\r | |
141 | UINT32 R12;\r | |
142 | UINT32 R14;\r | |
ebd04fc2 | 143 | } BASE_LIBRARY_JUMP_BUFFER;\r |
144 | \r | |
145 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
146 | \r | |
147 | #endif // defined (MDE_CPU_ARM)\r | |
148 | \r | |
807e2604 HL |
149 | #if defined (MDE_CPU_AARCH64)\r |
150 | typedef struct {\r | |
151 | // GP regs\r | |
152 | UINT64 X19;\r | |
153 | UINT64 X20;\r | |
154 | UINT64 X21;\r | |
155 | UINT64 X22;\r | |
156 | UINT64 X23;\r | |
157 | UINT64 X24;\r | |
158 | UINT64 X25;\r | |
159 | UINT64 X26;\r | |
160 | UINT64 X27;\r | |
161 | UINT64 X28;\r | |
162 | UINT64 FP;\r | |
163 | UINT64 LR;\r | |
164 | UINT64 IP0;\r | |
165 | \r | |
166 | // FP regs\r | |
167 | UINT64 D8;\r | |
168 | UINT64 D9;\r | |
169 | UINT64 D10;\r | |
170 | UINT64 D11;\r | |
171 | UINT64 D12;\r | |
172 | UINT64 D13;\r | |
173 | UINT64 D14;\r | |
174 | UINT64 D15;\r | |
175 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
176 | \r | |
177 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
178 | \r | |
179 | #endif // defined (MDE_CPU_AARCH64)\r | |
180 | \r | |
181 | \r | |
ac644614 | 182 | //\r |
183 | // String Services\r | |
184 | //\r | |
185 | \r | |
c058d59f JY |
186 | \r |
187 | /**\r | |
188 | Returns the length of a Null-terminated Unicode string.\r | |
189 | \r | |
190 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
191 | \r | |
192 | @param String A pointer to a Null-terminated Unicode string.\r | |
193 | @param MaxSize The maximum number of Destination Unicode\r | |
194 | char, including terminating null char.\r | |
195 | \r | |
196 | @retval 0 If String is NULL.\r | |
197 | @retval MaxSize If there is no null character in the first MaxSize characters of String.\r | |
198 | @return The number of characters that percede the terminating null character.\r | |
199 | \r | |
200 | **/\r | |
201 | UINTN\r | |
202 | EFIAPI\r | |
203 | StrnLenS (\r | |
204 | IN CONST CHAR16 *String,\r | |
205 | IN UINTN MaxSize\r | |
206 | );\r | |
207 | \r | |
208 | /**\r | |
209 | Copies the string pointed to by Source (including the terminating null char)\r | |
210 | to the array pointed to by Destination.\r | |
211 | \r | |
212 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
213 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
214 | \r | |
215 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
216 | @param DestMax The maximum number of Destination Unicode\r | |
217 | char, including terminating null char.\r | |
218 | @param Source A pointer to a Null-terminated Unicode string.\r | |
219 | \r | |
220 | @retval RETURN_SUCCESS String is copied.\r | |
221 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than StrLen(Source).\r | |
222 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
223 | If Source is NULL.\r | |
224 | If PcdMaximumUnicodeStringLength is not zero,\r | |
225 | and DestMax is greater than \r | |
226 | PcdMaximumUnicodeStringLength.\r | |
227 | If DestMax is 0.\r | |
228 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
229 | **/\r | |
230 | RETURN_STATUS\r | |
231 | EFIAPI\r | |
232 | StrCpyS (\r | |
233 | OUT CHAR16 *Destination,\r | |
234 | IN UINTN DestMax,\r | |
235 | IN CONST CHAR16 *Source\r | |
236 | );\r | |
237 | \r | |
238 | /**\r | |
239 | Copies not more than Length successive char from the string pointed to by\r | |
240 | Source to the array pointed to by Destination. If no null char is copied from\r | |
241 | Source, then Destination[Length] is always set to null.\r | |
242 | \r | |
243 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
244 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
245 | \r | |
246 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
247 | @param DestMax The maximum number of Destination Unicode\r | |
248 | char, including terminating null char.\r | |
249 | @param Source A pointer to a Null-terminated Unicode string.\r | |
250 | @param Length The maximum number of Unicode characters to copy.\r | |
251 | \r | |
252 | @retval RETURN_SUCCESS String is copied.\r | |
253 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r | |
254 | MIN(StrLen(Source), Length).\r | |
255 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
256 | If Source is NULL.\r | |
257 | If PcdMaximumUnicodeStringLength is not zero,\r | |
258 | and DestMax is greater than \r | |
259 | PcdMaximumUnicodeStringLength.\r | |
260 | If DestMax is 0.\r | |
261 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
262 | **/\r | |
263 | RETURN_STATUS\r | |
264 | EFIAPI\r | |
265 | StrnCpyS (\r | |
266 | OUT CHAR16 *Destination,\r | |
267 | IN UINTN DestMax,\r | |
268 | IN CONST CHAR16 *Source,\r | |
269 | IN UINTN Length\r | |
270 | );\r | |
271 | \r | |
272 | /**\r | |
273 | Appends a copy of the string pointed to by Source (including the terminating\r | |
274 | null char) to the end of the string pointed to by Destination.\r | |
275 | \r | |
276 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
277 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
278 | \r | |
279 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
280 | @param DestMax The maximum number of Destination Unicode\r | |
281 | char, including terminating null char.\r | |
282 | @param Source A pointer to a Null-terminated Unicode string.\r | |
283 | \r | |
284 | @retval RETURN_SUCCESS String is appended.\r | |
285 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r | |
286 | StrLen(Destination).\r | |
287 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
288 | greater than StrLen(Source).\r | |
289 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
290 | If Source is NULL.\r | |
291 | If PcdMaximumUnicodeStringLength is not zero,\r | |
292 | and DestMax is greater than \r | |
293 | PcdMaximumUnicodeStringLength.\r | |
294 | If DestMax is 0.\r | |
295 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
296 | **/\r | |
297 | RETURN_STATUS\r | |
298 | EFIAPI\r | |
299 | StrCatS (\r | |
300 | IN OUT CHAR16 *Destination,\r | |
301 | IN UINTN DestMax,\r | |
302 | IN CONST CHAR16 *Source\r | |
303 | );\r | |
304 | \r | |
305 | /**\r | |
306 | Appends not more than Length successive char from the string pointed to by\r | |
307 | Source to the end of the string pointed to by Destination. If no null char is\r | |
308 | copied from Source, then Destination[StrLen(Destination) + Length] is always\r | |
309 | set to null.\r | |
310 | \r | |
311 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
312 | If and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
313 | \r | |
314 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
315 | @param DestMax The maximum number of Destination Unicode\r | |
316 | char, including terminating null char.\r | |
317 | @param Source A pointer to a Null-terminated Unicode string.\r | |
318 | @param Length The maximum number of Unicode characters to copy.\r | |
319 | \r | |
320 | @retval RETURN_SUCCESS String is appended.\r | |
321 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r | |
322 | StrLen(Destination).\r | |
323 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
324 | greater than MIN(StrLen(Source), Length).\r | |
325 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
326 | If Source is NULL.\r | |
327 | If PcdMaximumUnicodeStringLength is not zero,\r | |
328 | and DestMax is greater than \r | |
329 | PcdMaximumUnicodeStringLength.\r | |
330 | If DestMax is 0.\r | |
331 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
332 | **/\r | |
333 | RETURN_STATUS\r | |
334 | EFIAPI\r | |
335 | StrnCatS (\r | |
336 | IN OUT CHAR16 *Destination,\r | |
337 | IN UINTN DestMax,\r | |
338 | IN CONST CHAR16 *Source,\r | |
339 | IN UINTN Length\r | |
340 | );\r | |
341 | \r | |
342 | /**\r | |
343 | Returns the length of a Null-terminated Ascii string.\r | |
344 | \r | |
345 | @param String A pointer to a Null-terminated Ascii string.\r | |
346 | @param MaxSize The maximum number of Destination Ascii\r | |
347 | char, including terminating null char.\r | |
348 | \r | |
349 | @retval 0 If String is NULL.\r | |
350 | @retval MaxSize If there is no null character in the first MaxSize characters of String.\r | |
351 | @return The number of characters that percede the terminating null character.\r | |
352 | \r | |
353 | **/\r | |
354 | UINTN\r | |
355 | EFIAPI\r | |
356 | AsciiStrnLenS (\r | |
357 | IN CONST CHAR8 *String,\r | |
358 | IN UINTN MaxSize\r | |
359 | );\r | |
360 | \r | |
361 | /**\r | |
362 | Copies the string pointed to by Source (including the terminating null char)\r | |
363 | to the array pointed to by Destination.\r | |
364 | \r | |
365 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
366 | @param DestMax The maximum number of Destination Ascii\r | |
367 | char, including terminating null char.\r | |
368 | @param Source A pointer to a Null-terminated Ascii string.\r | |
369 | \r | |
370 | @retval RETURN_SUCCESS String is copied.\r | |
371 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than StrLen(Source).\r | |
372 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
373 | If Source is NULL.\r | |
374 | If PcdMaximumAsciiStringLength is not zero,\r | |
375 | and DestMax is greater than \r | |
376 | PcdMaximumAsciiStringLength.\r | |
377 | If DestMax is 0.\r | |
378 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
379 | **/\r | |
380 | RETURN_STATUS\r | |
381 | EFIAPI\r | |
382 | AsciiStrCpyS (\r | |
383 | OUT CHAR8 *Destination,\r | |
384 | IN UINTN DestMax,\r | |
385 | IN CONST CHAR8 *Source\r | |
386 | );\r | |
387 | \r | |
388 | /**\r | |
389 | Copies not more than Length successive char from the string pointed to by\r | |
390 | Source to the array pointed to by Destination. If no null char is copied from\r | |
391 | Source, then Destination[Length] is always set to null.\r | |
392 | \r | |
393 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
394 | @param DestMax The maximum number of Destination Ascii\r | |
395 | char, including terminating null char.\r | |
396 | @param Source A pointer to a Null-terminated Ascii string.\r | |
397 | @param Length The maximum number of Ascii characters to copy.\r | |
398 | \r | |
399 | @retval RETURN_SUCCESS String is copied.\r | |
400 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r | |
401 | MIN(StrLen(Source), Length).\r | |
402 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
403 | If Source is NULL.\r | |
404 | If PcdMaximumAsciiStringLength is not zero,\r | |
405 | and DestMax is greater than \r | |
406 | PcdMaximumAsciiStringLength.\r | |
407 | If DestMax is 0.\r | |
408 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
409 | **/\r | |
410 | RETURN_STATUS\r | |
411 | EFIAPI\r | |
412 | AsciiStrnCpyS (\r | |
413 | OUT CHAR8 *Destination,\r | |
414 | IN UINTN DestMax,\r | |
415 | IN CONST CHAR8 *Source,\r | |
416 | IN UINTN Length\r | |
417 | );\r | |
418 | \r | |
419 | /**\r | |
420 | Appends a copy of the string pointed to by Source (including the terminating\r | |
421 | null char) to the end of the string pointed to by Destination.\r | |
422 | \r | |
423 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
424 | @param DestMax The maximum number of Destination Ascii\r | |
425 | char, including terminating null char.\r | |
426 | @param Source A pointer to a Null-terminated Ascii string.\r | |
427 | \r | |
428 | @retval RETURN_SUCCESS String is appended.\r | |
429 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r | |
430 | StrLen(Destination).\r | |
431 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
432 | greater than StrLen(Source).\r | |
433 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
434 | If Source is NULL.\r | |
435 | If PcdMaximumAsciiStringLength is not zero,\r | |
436 | and DestMax is greater than \r | |
437 | PcdMaximumAsciiStringLength.\r | |
438 | If DestMax is 0.\r | |
439 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
440 | **/\r | |
441 | RETURN_STATUS\r | |
442 | EFIAPI\r | |
443 | AsciiStrCatS (\r | |
444 | IN OUT CHAR8 *Destination,\r | |
445 | IN UINTN DestMax,\r | |
446 | IN CONST CHAR8 *Source\r | |
447 | );\r | |
448 | \r | |
449 | /**\r | |
450 | Appends not more than Length successive char from the string pointed to by\r | |
451 | Source to the end of the string pointed to by Destination. If no null char is\r | |
452 | copied from Source, then Destination[StrLen(Destination) + Length] is always\r | |
453 | set to null.\r | |
454 | \r | |
455 | @param Destination A pointer to a Null-terminated Ascii string.\r | |
456 | @param DestMax The maximum number of Destination Ascii\r | |
457 | char, including terminating null char.\r | |
458 | @param Source A pointer to a Null-terminated Ascii string.\r | |
459 | @param Length The maximum number of Ascii characters to copy.\r | |
460 | \r | |
461 | @retval RETURN_SUCCESS String is appended.\r | |
462 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r | |
463 | StrLen(Destination).\r | |
464 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
465 | greater than MIN(StrLen(Source), Length).\r | |
466 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
467 | If Source is NULL.\r | |
468 | If PcdMaximumAsciiStringLength is not zero,\r | |
469 | and DestMax is greater than \r | |
470 | PcdMaximumAsciiStringLength.\r | |
471 | If DestMax is 0.\r | |
472 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
473 | **/\r | |
474 | RETURN_STATUS\r | |
475 | EFIAPI\r | |
476 | AsciiStrnCatS (\r | |
477 | IN OUT CHAR8 *Destination,\r | |
478 | IN UINTN DestMax,\r | |
479 | IN CONST CHAR8 *Source,\r | |
480 | IN UINTN Length\r | |
481 | );\r | |
482 | \r | |
483 | \r | |
1bb390f1 ED |
484 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
485 | \r | |
ac644614 | 486 | /**\r |
ae591c14 | 487 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 488 | \r |
ac644614 | 489 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r |
490 | string and returns the new Unicode string.\r | |
491 | \r | |
492 | This function copies the contents of the Unicode string Source to the Unicode\r | |
493 | string Destination, and returns Destination. If Source and Destination\r | |
494 | overlap, then the results are undefined.\r | |
495 | \r | |
496 | If Destination is NULL, then ASSERT().\r | |
497 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
498 | If Source is NULL, then ASSERT().\r | |
499 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
500 | If Source and Destination overlap, then ASSERT().\r | |
501 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
502 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
503 | Null-terminator, then ASSERT().\r | |
504 | \r | |
af2dc6a7 | 505 | @param Destination The pointer to a Null-terminated Unicode string.\r |
506 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 507 | \r |
9aa049d9 | 508 | @return Destination.\r |
ac644614 | 509 | \r |
510 | **/\r | |
511 | CHAR16 *\r | |
512 | EFIAPI\r | |
513 | StrCpy (\r | |
514 | OUT CHAR16 *Destination,\r | |
515 | IN CONST CHAR16 *Source\r | |
516 | );\r | |
517 | \r | |
518 | \r | |
519 | /**\r | |
ae591c14 | 520 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 521 | \r |
af2dc6a7 | 522 | Copies up to a specified length from one Null-terminated Unicode string to \r |
17f695ed | 523 | another Null-terminated Unicode string and returns the new Unicode string.\r |
ac644614 | 524 | \r |
525 | This function copies the contents of the Unicode string Source to the Unicode\r | |
526 | string Destination, and returns Destination. At most, Length Unicode\r | |
527 | characters are copied from Source to Destination. If Length is 0, then\r | |
528 | Destination is returned unmodified. If Length is greater that the number of\r | |
529 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
530 | characters. If Source and Destination overlap, then the results are\r | |
531 | undefined.\r | |
532 | \r | |
533 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
534 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
535 | If Length > 0 and Source is NULL, then ASSERT().\r | |
77f863ee | 536 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 537 | If Source and Destination overlap, then ASSERT().\r |
50c247fd | 538 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
539 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 540 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
50c247fd | 541 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r |
542 | then ASSERT().\r | |
ac644614 | 543 | \r |
af2dc6a7 | 544 | @param Destination The pointer to a Null-terminated Unicode string.\r |
545 | @param Source The pointer to a Null-terminated Unicode string.\r | |
546 | @param Length The maximum number of Unicode characters to copy.\r | |
ac644614 | 547 | \r |
9aa049d9 | 548 | @return Destination.\r |
ac644614 | 549 | \r |
550 | **/\r | |
551 | CHAR16 *\r | |
552 | EFIAPI\r | |
553 | StrnCpy (\r | |
554 | OUT CHAR16 *Destination,\r | |
555 | IN CONST CHAR16 *Source,\r | |
556 | IN UINTN Length\r | |
557 | );\r | |
1bb390f1 | 558 | #endif\r |
ac644614 | 559 | \r |
560 | /**\r | |
561 | Returns the length of a Null-terminated Unicode string.\r | |
562 | \r | |
563 | This function returns the number of Unicode characters in the Null-terminated\r | |
564 | Unicode string specified by String.\r | |
565 | \r | |
566 | If String is NULL, then ASSERT().\r | |
567 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
568 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
569 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
570 | Null-terminator, then ASSERT().\r | |
571 | \r | |
572 | @param String Pointer to a Null-terminated Unicode string.\r | |
573 | \r | |
574 | @return The length of String.\r | |
575 | \r | |
576 | **/\r | |
577 | UINTN\r | |
578 | EFIAPI\r | |
579 | StrLen (\r | |
580 | IN CONST CHAR16 *String\r | |
581 | );\r | |
582 | \r | |
583 | \r | |
584 | /**\r | |
585 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
586 | Null terminator.\r | |
587 | \r | |
17f695ed | 588 | This function returns the size, in bytes, of the Null-terminated Unicode string \r |
589 | specified by String.\r | |
ac644614 | 590 | \r |
591 | If String is NULL, then ASSERT().\r | |
592 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
593 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
594 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
595 | Null-terminator, then ASSERT().\r | |
596 | \r | |
af2dc6a7 | 597 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 598 | \r |
599 | @return The size of String.\r | |
600 | \r | |
601 | **/\r | |
602 | UINTN\r | |
603 | EFIAPI\r | |
604 | StrSize (\r | |
605 | IN CONST CHAR16 *String\r | |
606 | );\r | |
607 | \r | |
608 | \r | |
609 | /**\r | |
610 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
611 | between the first mismatched Unicode characters.\r | |
612 | \r | |
613 | This function compares the Null-terminated Unicode string FirstString to the\r | |
614 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
615 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
616 | mismatched Unicode character in SecondString subtracted from the first\r | |
617 | mismatched Unicode character in FirstString.\r | |
618 | \r | |
619 | If FirstString is NULL, then ASSERT().\r | |
620 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
621 | If SecondString is NULL, then ASSERT().\r | |
622 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
623 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
624 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
625 | Null-terminator, then ASSERT().\r | |
626 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
af2dc6a7 | 627 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 628 | Null-terminator, then ASSERT().\r |
629 | \r | |
af2dc6a7 | 630 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
631 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 632 | \r |
1106ffe1 | 633 | @retval 0 FirstString is identical to SecondString.\r |
634 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 635 | \r |
636 | **/\r | |
637 | INTN\r | |
638 | EFIAPI\r | |
639 | StrCmp (\r | |
640 | IN CONST CHAR16 *FirstString,\r | |
641 | IN CONST CHAR16 *SecondString\r | |
642 | );\r | |
643 | \r | |
644 | \r | |
645 | /**\r | |
17f695ed | 646 | Compares up to a specified length the contents of two Null-terminated Unicode strings,\r |
647 | and returns the difference between the first mismatched Unicode characters.\r | |
648 | \r | |
ac644614 | 649 | This function compares the Null-terminated Unicode string FirstString to the\r |
650 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
651 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
652 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
653 | value returned is the first mismatched Unicode character in SecondString\r | |
654 | subtracted from the first mismatched Unicode character in FirstString.\r | |
655 | \r | |
656 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
77f863ee | 657 | If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 658 | If Length > 0 and SecondString is NULL, then ASSERT().\r |
77f863ee | 659 | If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r |
50c247fd | 660 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r |
661 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
662 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r | |
663 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
664 | then ASSERT().\r | |
665 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r | |
666 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
667 | then ASSERT().\r | |
ac644614 | 668 | \r |
af2dc6a7 | 669 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
670 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
671 | @param Length The maximum number of Unicode characters to compare.\r | |
ac644614 | 672 | \r |
1106ffe1 | 673 | @retval 0 FirstString is identical to SecondString.\r |
674 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 675 | \r |
676 | **/\r | |
677 | INTN\r | |
678 | EFIAPI\r | |
679 | StrnCmp (\r | |
680 | IN CONST CHAR16 *FirstString,\r | |
681 | IN CONST CHAR16 *SecondString,\r | |
682 | IN UINTN Length\r | |
683 | );\r | |
684 | \r | |
685 | \r | |
1bb390f1 ED |
686 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
687 | \r | |
ac644614 | 688 | /**\r |
ae591c14 | 689 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 690 | \r |
ac644614 | 691 | Concatenates one Null-terminated Unicode string to another Null-terminated\r |
692 | Unicode string, and returns the concatenated Unicode string.\r | |
693 | \r | |
694 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
695 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
696 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
697 | Unicode String is returned. If Source and Destination overlap, then the\r | |
698 | results are undefined.\r | |
699 | \r | |
700 | If Destination is NULL, then ASSERT().\r | |
77f863ee | 701 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 702 | If Source is NULL, then ASSERT().\r |
77f863ee | 703 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 704 | If Source and Destination overlap, then ASSERT().\r |
705 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
af2dc6a7 | 706 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 707 | Null-terminator, then ASSERT().\r |
708 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
af2dc6a7 | 709 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 710 | Null-terminator, then ASSERT().\r |
711 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
712 | and Source results in a Unicode string with more than\r | |
af2dc6a7 | 713 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 714 | Null-terminator, then ASSERT().\r |
715 | \r | |
af2dc6a7 | 716 | @param Destination The pointer to a Null-terminated Unicode string.\r |
717 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 718 | \r |
9aa049d9 | 719 | @return Destination.\r |
ac644614 | 720 | \r |
721 | **/\r | |
722 | CHAR16 *\r | |
723 | EFIAPI\r | |
724 | StrCat (\r | |
725 | IN OUT CHAR16 *Destination,\r | |
726 | IN CONST CHAR16 *Source\r | |
727 | );\r | |
728 | \r | |
729 | \r | |
730 | /**\r | |
ae591c14 | 731 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 732 | \r |
17f695ed | 733 | Concatenates up to a specified length one Null-terminated Unicode to the end \r |
734 | of another Null-terminated Unicode string, and returns the concatenated \r | |
ac644614 | 735 | Unicode string.\r |
736 | \r | |
737 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
738 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
739 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
740 | most, Length Unicode characters are concatenated from Source to the end of\r | |
741 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
742 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
743 | the results are undefined.\r | |
744 | \r | |
745 | If Destination is NULL, then ASSERT().\r | |
746 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
747 | If Length > 0 and Source is NULL, then ASSERT().\r | |
748 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
749 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 750 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
751 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 752 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
50c247fd | 753 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 754 | Null-terminator, then ASSERT().\r |
755 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
50c247fd | 756 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 757 | Null-terminator, then ASSERT().\r |
758 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
50c247fd | 759 | and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r |
760 | Unicode characters, not including the Null-terminator, then ASSERT().\r | |
ac644614 | 761 | \r |
af2dc6a7 | 762 | @param Destination The pointer to a Null-terminated Unicode string.\r |
763 | @param Source The pointer to a Null-terminated Unicode string.\r | |
764 | @param Length The maximum number of Unicode characters to concatenate from\r | |
ac644614 | 765 | Source.\r |
766 | \r | |
9aa049d9 | 767 | @return Destination.\r |
ac644614 | 768 | \r |
769 | **/\r | |
770 | CHAR16 *\r | |
771 | EFIAPI\r | |
772 | StrnCat (\r | |
773 | IN OUT CHAR16 *Destination,\r | |
774 | IN CONST CHAR16 *Source,\r | |
775 | IN UINTN Length\r | |
776 | );\r | |
1bb390f1 | 777 | #endif\r |
ac644614 | 778 | \r |
779 | /**\r | |
9aa049d9 | 780 | Returns the first occurrence of a Null-terminated Unicode sub-string\r |
ac644614 | 781 | in a Null-terminated Unicode string.\r |
782 | \r | |
783 | This function scans the contents of the Null-terminated Unicode string\r | |
784 | specified by String and returns the first occurrence of SearchString.\r | |
785 | If SearchString is not found in String, then NULL is returned. If\r | |
af2dc6a7 | 786 | the length of SearchString is zero, then String is returned.\r |
ac644614 | 787 | \r |
788 | If String is NULL, then ASSERT().\r | |
789 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
790 | If SearchString is NULL, then ASSERT().\r | |
791 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
792 | \r | |
793 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r | |
794 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
af2dc6a7 | 795 | characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 796 | \r |
af2dc6a7 | 797 | @param String The pointer to a Null-terminated Unicode string.\r |
798 | @param SearchString The pointer to a Null-terminated Unicode string to search for.\r | |
ac644614 | 799 | \r |
800 | @retval NULL If the SearchString does not appear in String.\r | |
1106ffe1 | 801 | @return others If there is a match.\r |
ac644614 | 802 | \r |
803 | **/\r | |
804 | CHAR16 *\r | |
805 | EFIAPI\r | |
806 | StrStr (\r | |
17f695ed | 807 | IN CONST CHAR16 *String,\r |
808 | IN CONST CHAR16 *SearchString\r | |
ac644614 | 809 | );\r |
810 | \r | |
811 | /**\r | |
812 | Convert a Null-terminated Unicode decimal string to a value of\r | |
813 | type UINTN.\r | |
814 | \r | |
815 | This function returns a value of type UINTN by interpreting the contents\r | |
816 | of the Unicode string specified by String as a decimal number. The format\r | |
817 | of the input Unicode string String is:\r | |
818 | \r | |
819 | [spaces] [decimal digits].\r | |
820 | \r | |
821 | The valid decimal digit character is in the range [0-9]. The\r | |
822 | function will ignore the pad space, which includes spaces or\r | |
823 | tab characters, before [decimal digits]. The running zero in the\r | |
824 | beginning of [decimal digits] will be ignored. Then, the function\r | |
825 | stops at the first character that is a not a valid decimal character\r | |
826 | or a Null-terminator, whichever one comes first.\r | |
827 | \r | |
828 | If String is NULL, then ASSERT().\r | |
829 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
830 | If String has only pad spaces, then 0 is returned.\r | |
831 | If String has no pad spaces or valid decimal digits,\r | |
832 | then 0 is returned.\r | |
833 | If the number represented by String overflows according\r | |
834 | to the range defined by UINTN, then ASSERT().\r | |
835 | \r | |
836 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
837 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
838 | the Null-terminator, then ASSERT().\r | |
839 | \r | |
af2dc6a7 | 840 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 841 | \r |
38bbd3d9 | 842 | @retval Value translated from String.\r |
ac644614 | 843 | \r |
844 | **/\r | |
845 | UINTN\r | |
846 | EFIAPI\r | |
847 | StrDecimalToUintn (\r | |
17f695ed | 848 | IN CONST CHAR16 *String\r |
ac644614 | 849 | );\r |
850 | \r | |
851 | /**\r | |
852 | Convert a Null-terminated Unicode decimal string to a value of\r | |
853 | type UINT64.\r | |
854 | \r | |
855 | This function returns a value of type UINT64 by interpreting the contents\r | |
856 | of the Unicode string specified by String as a decimal number. The format\r | |
857 | of the input Unicode string String is:\r | |
858 | \r | |
859 | [spaces] [decimal digits].\r | |
860 | \r | |
861 | The valid decimal digit character is in the range [0-9]. The\r | |
862 | function will ignore the pad space, which includes spaces or\r | |
863 | tab characters, before [decimal digits]. The running zero in the\r | |
864 | beginning of [decimal digits] will be ignored. Then, the function\r | |
865 | stops at the first character that is a not a valid decimal character\r | |
866 | or a Null-terminator, whichever one comes first.\r | |
867 | \r | |
868 | If String is NULL, then ASSERT().\r | |
869 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
870 | If String has only pad spaces, then 0 is returned.\r | |
871 | If String has no pad spaces or valid decimal digits,\r | |
872 | then 0 is returned.\r | |
873 | If the number represented by String overflows according\r | |
874 | to the range defined by UINT64, then ASSERT().\r | |
875 | \r | |
876 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
877 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
878 | the Null-terminator, then ASSERT().\r | |
879 | \r | |
af2dc6a7 | 880 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 881 | \r |
38bbd3d9 | 882 | @retval Value translated from String.\r |
ac644614 | 883 | \r |
884 | **/\r | |
885 | UINT64\r | |
886 | EFIAPI\r | |
887 | StrDecimalToUint64 (\r | |
17f695ed | 888 | IN CONST CHAR16 *String\r |
ac644614 | 889 | );\r |
890 | \r | |
891 | \r | |
892 | /**\r | |
893 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
894 | \r | |
895 | This function returns a value of type UINTN by interpreting the contents\r | |
896 | of the Unicode string specified by String as a hexadecimal number.\r | |
897 | The format of the input Unicode string String is:\r | |
898 | \r | |
899 | [spaces][zeros][x][hexadecimal digits].\r | |
900 | \r | |
901 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
902 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
903 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
904 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
905 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
906 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
af2dc6a7 | 907 | first valid hexadecimal digit. Then, the function stops at the first character \r |
908 | that is a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
ac644614 | 909 | \r |
910 | If String is NULL, then ASSERT().\r | |
911 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
912 | If String has only pad spaces, then zero is returned.\r | |
913 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
914 | then zero is returned.\r | |
915 | If the number represented by String overflows according to the range defined by\r | |
916 | UINTN, then ASSERT().\r | |
917 | \r | |
918 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
919 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
920 | then ASSERT().\r | |
921 | \r | |
af2dc6a7 | 922 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 923 | \r |
38bbd3d9 | 924 | @retval Value translated from String.\r |
ac644614 | 925 | \r |
926 | **/\r | |
927 | UINTN\r | |
928 | EFIAPI\r | |
929 | StrHexToUintn (\r | |
17f695ed | 930 | IN CONST CHAR16 *String\r |
ac644614 | 931 | );\r |
932 | \r | |
933 | \r | |
934 | /**\r | |
935 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
936 | \r | |
937 | This function returns a value of type UINT64 by interpreting the contents\r | |
938 | of the Unicode string specified by String as a hexadecimal number.\r | |
939 | The format of the input Unicode string String is\r | |
940 | \r | |
941 | [spaces][zeros][x][hexadecimal digits].\r | |
942 | \r | |
943 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
944 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
945 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
946 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
947 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
948 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
949 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
950 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
951 | \r | |
952 | If String is NULL, then ASSERT().\r | |
953 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
954 | If String has only pad spaces, then zero is returned.\r | |
955 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
956 | then zero is returned.\r | |
957 | If the number represented by String overflows according to the range defined by\r | |
958 | UINT64, then ASSERT().\r | |
959 | \r | |
960 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
961 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
962 | then ASSERT().\r | |
963 | \r | |
af2dc6a7 | 964 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 965 | \r |
38bbd3d9 | 966 | @retval Value translated from String.\r |
ac644614 | 967 | \r |
968 | **/\r | |
969 | UINT64\r | |
970 | EFIAPI\r | |
971 | StrHexToUint64 (\r | |
17f695ed | 972 | IN CONST CHAR16 *String\r |
ac644614 | 973 | );\r |
974 | \r | |
ac644614 | 975 | /**\r |
17f695ed | 976 | Convert a Null-terminated Unicode string to a Null-terminated\r |
ac644614 | 977 | ASCII string and returns the ASCII string.\r |
978 | \r | |
979 | This function converts the content of the Unicode string Source\r | |
980 | to the ASCII string Destination by copying the lower 8 bits of\r | |
981 | each Unicode character. It returns Destination.\r | |
982 | \r | |
d3e0289c | 983 | The caller is responsible to make sure Destination points to a buffer with size\r |
984 | equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.\r | |
985 | \r | |
ac644614 | 986 | If any Unicode characters in Source contain non-zero value in\r |
987 | the upper 8 bits, then ASSERT().\r | |
988 | \r | |
989 | If Destination is NULL, then ASSERT().\r | |
990 | If Source is NULL, then ASSERT().\r | |
991 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
992 | If Source and Destination overlap, then ASSERT().\r | |
993 | \r | |
994 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
995 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
996 | the Null-terminator, then ASSERT().\r | |
997 | \r | |
998 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
999 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
1000 | Null-terminator, then ASSERT().\r | |
1001 | \r | |
af2dc6a7 | 1002 | @param Source The pointer to a Null-terminated Unicode string.\r |
1003 | @param Destination The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1004 | \r |
9aa049d9 | 1005 | @return Destination.\r |
ac644614 | 1006 | \r |
1007 | **/\r | |
1008 | CHAR8 *\r | |
1009 | EFIAPI\r | |
1010 | UnicodeStrToAsciiStr (\r | |
17f695ed | 1011 | IN CONST CHAR16 *Source,\r |
1012 | OUT CHAR8 *Destination\r | |
ac644614 | 1013 | );\r |
1014 | \r | |
1015 | \r | |
1bb390f1 ED |
1016 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
1017 | \r | |
ac644614 | 1018 | /**\r |
ae591c14 | 1019 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1020 | \r |
ac644614 | 1021 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r |
1022 | string and returns the new ASCII string.\r | |
1023 | \r | |
1024 | This function copies the contents of the ASCII string Source to the ASCII\r | |
1025 | string Destination, and returns Destination. If Source and Destination\r | |
1026 | overlap, then the results are undefined.\r | |
1027 | \r | |
1028 | If Destination is NULL, then ASSERT().\r | |
1029 | If Source is NULL, then ASSERT().\r | |
1030 | If Source and Destination overlap, then ASSERT().\r | |
1031 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
1032 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1033 | then ASSERT().\r | |
1034 | \r | |
af2dc6a7 | 1035 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1036 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1037 | \r |
1038 | @return Destination\r | |
1039 | \r | |
1040 | **/\r | |
1041 | CHAR8 *\r | |
1042 | EFIAPI\r | |
1043 | AsciiStrCpy (\r | |
1044 | OUT CHAR8 *Destination,\r | |
1045 | IN CONST CHAR8 *Source\r | |
1046 | );\r | |
1047 | \r | |
1048 | \r | |
1049 | /**\r | |
ae591c14 | 1050 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1051 | \r |
17f695ed | 1052 | Copies up to a specified length one Null-terminated ASCII string to another \r |
1053 | Null-terminated ASCII string and returns the new ASCII string.\r | |
ac644614 | 1054 | \r |
1055 | This function copies the contents of the ASCII string Source to the ASCII\r | |
1056 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
1057 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
1058 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
1059 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
1060 | and Destination overlap, then the results are undefined.\r | |
1061 | \r | |
1062 | If Destination is NULL, then ASSERT().\r | |
1063 | If Source is NULL, then ASSERT().\r | |
1064 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 1065 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
1066 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 1067 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
50c247fd | 1068 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 1069 | then ASSERT().\r |
1070 | \r | |
af2dc6a7 | 1071 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1072 | @param Source The pointer to a Null-terminated ASCII string.\r | |
1073 | @param Length The maximum number of ASCII characters to copy.\r | |
ac644614 | 1074 | \r |
1075 | @return Destination\r | |
1076 | \r | |
1077 | **/\r | |
1078 | CHAR8 *\r | |
1079 | EFIAPI\r | |
1080 | AsciiStrnCpy (\r | |
1081 | OUT CHAR8 *Destination,\r | |
1082 | IN CONST CHAR8 *Source,\r | |
1083 | IN UINTN Length\r | |
1084 | );\r | |
1bb390f1 | 1085 | #endif\r |
ac644614 | 1086 | \r |
1087 | /**\r | |
1088 | Returns the length of a Null-terminated ASCII string.\r | |
1089 | \r | |
1090 | This function returns the number of ASCII characters in the Null-terminated\r | |
1091 | ASCII string specified by String.\r | |
1092 | \r | |
1093 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
1094 | If Length > 0 and Source is NULL, then ASSERT().\r | |
1095 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
1096 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1097 | then ASSERT().\r | |
1098 | \r | |
af2dc6a7 | 1099 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1100 | \r |
1101 | @return The length of String.\r | |
1102 | \r | |
1103 | **/\r | |
1104 | UINTN\r | |
1105 | EFIAPI\r | |
1106 | AsciiStrLen (\r | |
1107 | IN CONST CHAR8 *String\r | |
1108 | );\r | |
1109 | \r | |
1110 | \r | |
1111 | /**\r | |
1112 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
1113 | Null terminator.\r | |
1114 | \r | |
1115 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
1116 | specified by String.\r | |
1117 | \r | |
1118 | If String is NULL, then ASSERT().\r | |
1119 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
1120 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1121 | then ASSERT().\r | |
1122 | \r | |
af2dc6a7 | 1123 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1124 | \r |
1125 | @return The size of String.\r | |
1126 | \r | |
1127 | **/\r | |
1128 | UINTN\r | |
1129 | EFIAPI\r | |
1130 | AsciiStrSize (\r | |
1131 | IN CONST CHAR8 *String\r | |
1132 | );\r | |
1133 | \r | |
1134 | \r | |
1135 | /**\r | |
1136 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
1137 | between the first mismatched ASCII characters.\r | |
1138 | \r | |
1139 | This function compares the Null-terminated ASCII string FirstString to the\r | |
1140 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
1141 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
1142 | mismatched ASCII character in SecondString subtracted from the first\r | |
1143 | mismatched ASCII character in FirstString.\r | |
1144 | \r | |
1145 | If FirstString is NULL, then ASSERT().\r | |
1146 | If SecondString is NULL, then ASSERT().\r | |
1147 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
1148 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1149 | then ASSERT().\r | |
1150 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
1151 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
1152 | Null-terminator, then ASSERT().\r | |
1153 | \r | |
af2dc6a7 | 1154 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
1155 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1156 | \r |
17f695ed | 1157 | @retval ==0 FirstString is identical to SecondString.\r |
1158 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 1159 | \r |
1160 | **/\r | |
1161 | INTN\r | |
1162 | EFIAPI\r | |
1163 | AsciiStrCmp (\r | |
1164 | IN CONST CHAR8 *FirstString,\r | |
1165 | IN CONST CHAR8 *SecondString\r | |
1166 | );\r | |
1167 | \r | |
1168 | \r | |
1169 | /**\r | |
1170 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
1171 | and returns the difference between the first mismatched ASCII characters.\r | |
1172 | \r | |
1173 | This function performs a case insensitive comparison of the Null-terminated\r | |
1174 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
1175 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
1176 | value returned is the first mismatched lower case ASCII character in\r | |
1177 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
1178 | in FirstString.\r | |
1179 | \r | |
1180 | If FirstString is NULL, then ASSERT().\r | |
1181 | If SecondString is NULL, then ASSERT().\r | |
1182 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
1183 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1184 | then ASSERT().\r | |
1185 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
1186 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
1187 | Null-terminator, then ASSERT().\r | |
1188 | \r | |
af2dc6a7 | 1189 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
1190 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1191 | \r |
17f695ed | 1192 | @retval ==0 FirstString is identical to SecondString using case insensitive\r |
1106ffe1 | 1193 | comparisons.\r |
17f695ed | 1194 | @retval !=0 FirstString is not identical to SecondString using case\r |
1106ffe1 | 1195 | insensitive comparisons.\r |
ac644614 | 1196 | \r |
1197 | **/\r | |
1198 | INTN\r | |
1199 | EFIAPI\r | |
1200 | AsciiStriCmp (\r | |
1201 | IN CONST CHAR8 *FirstString,\r | |
1202 | IN CONST CHAR8 *SecondString\r | |
1203 | );\r | |
1204 | \r | |
1205 | \r | |
1206 | /**\r | |
1207 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
1208 | the difference between the first mismatched ASCII characters.\r | |
1209 | \r | |
1210 | This function compares the Null-terminated ASCII string FirstString to the\r | |
1211 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
1212 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
1213 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
1214 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
1215 | first mismatched ASCII character in FirstString.\r | |
1216 | \r | |
1217 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
1218 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
50c247fd | 1219 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
1220 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
1221 | If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r | |
1222 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 1223 | then ASSERT().\r |
50c247fd | 1224 | If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r |
1225 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 1226 | then ASSERT().\r |
1227 | \r | |
af2dc6a7 | 1228 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
1229 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
1230 | @param Length The maximum number of ASCII characters for compare.\r | |
ac644614 | 1231 | \r |
17f695ed | 1232 | @retval ==0 FirstString is identical to SecondString.\r |
1233 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 1234 | \r |
1235 | **/\r | |
1236 | INTN\r | |
1237 | EFIAPI\r | |
1238 | AsciiStrnCmp (\r | |
1239 | IN CONST CHAR8 *FirstString,\r | |
1240 | IN CONST CHAR8 *SecondString,\r | |
1241 | IN UINTN Length\r | |
1242 | );\r | |
1243 | \r | |
1244 | \r | |
1bb390f1 ED |
1245 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
1246 | \r | |
ac644614 | 1247 | /**\r |
ae591c14 | 1248 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1249 | \r |
ac644614 | 1250 | Concatenates one Null-terminated ASCII string to another Null-terminated\r |
1251 | ASCII string, and returns the concatenated ASCII string.\r | |
1252 | \r | |
1253 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
1254 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
1255 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
1256 | String is returned.\r | |
1257 | \r | |
1258 | If Destination is NULL, then ASSERT().\r | |
1259 | If Source is NULL, then ASSERT().\r | |
1260 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
1261 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1262 | then ASSERT().\r | |
1263 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
1264 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1265 | then ASSERT().\r | |
1266 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
1267 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
1268 | ASCII characters, then ASSERT().\r | |
1269 | \r | |
af2dc6a7 | 1270 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1271 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1272 | \r |
1273 | @return Destination\r | |
1274 | \r | |
1275 | **/\r | |
1276 | CHAR8 *\r | |
1277 | EFIAPI\r | |
1278 | AsciiStrCat (\r | |
1279 | IN OUT CHAR8 *Destination,\r | |
1280 | IN CONST CHAR8 *Source\r | |
1281 | );\r | |
1282 | \r | |
1283 | \r | |
1284 | /**\r | |
ae591c14 | 1285 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1286 | \r |
17f695ed | 1287 | Concatenates up to a specified length one Null-terminated ASCII string to \r |
1288 | the end of another Null-terminated ASCII string, and returns the \r | |
1289 | concatenated ASCII string.\r | |
ac644614 | 1290 | \r |
1291 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
1292 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
1293 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
1294 | Length ASCII characters are concatenated from Source to the end of\r | |
1295 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
1296 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
1297 | the results are undefined.\r | |
1298 | \r | |
1299 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
1300 | If Length > 0 and Source is NULL, then ASSERT().\r | |
1301 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 1302 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r |
1303 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 1304 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
50c247fd | 1305 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 1306 | then ASSERT().\r |
1307 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
50c247fd | 1308 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 1309 | then ASSERT().\r |
1310 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
1311 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
50c247fd | 1312 | ASCII characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 1313 | \r |
af2dc6a7 | 1314 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1315 | @param Source The pointer to a Null-terminated ASCII string.\r | |
1316 | @param Length The maximum number of ASCII characters to concatenate from\r | |
ac644614 | 1317 | Source.\r |
1318 | \r | |
1319 | @return Destination\r | |
1320 | \r | |
1321 | **/\r | |
1322 | CHAR8 *\r | |
1323 | EFIAPI\r | |
1324 | AsciiStrnCat (\r | |
1325 | IN OUT CHAR8 *Destination,\r | |
1326 | IN CONST CHAR8 *Source,\r | |
1327 | IN UINTN Length\r | |
1328 | );\r | |
1bb390f1 | 1329 | #endif\r |
ac644614 | 1330 | \r |
1331 | /**\r | |
9aa049d9 | 1332 | Returns the first occurrence of a Null-terminated ASCII sub-string\r |
ac644614 | 1333 | in a Null-terminated ASCII string.\r |
1334 | \r | |
1335 | This function scans the contents of the ASCII string specified by String\r | |
1336 | and returns the first occurrence of SearchString. If SearchString is not\r | |
1337 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
1338 | then String is returned.\r | |
1339 | \r | |
1340 | If String is NULL, then ASSERT().\r | |
1341 | If SearchString is NULL, then ASSERT().\r | |
1342 | \r | |
1343 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r | |
1344 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
1345 | not including the Null-terminator, then ASSERT().\r | |
1346 | \r | |
af2dc6a7 | 1347 | @param String The pointer to a Null-terminated ASCII string.\r |
1348 | @param SearchString The pointer to a Null-terminated ASCII string to search for.\r | |
ac644614 | 1349 | \r |
1350 | @retval NULL If the SearchString does not appear in String.\r | |
17f695ed | 1351 | @retval others If there is a match return the first occurrence of SearchingString.\r |
9aa049d9 | 1352 | If the length of SearchString is zero,return String.\r |
ac644614 | 1353 | \r |
1354 | **/\r | |
1355 | CHAR8 *\r | |
1356 | EFIAPI\r | |
1357 | AsciiStrStr (\r | |
17f695ed | 1358 | IN CONST CHAR8 *String,\r |
1359 | IN CONST CHAR8 *SearchString\r | |
ac644614 | 1360 | );\r |
1361 | \r | |
1362 | \r | |
1363 | /**\r | |
1364 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1365 | UINTN.\r | |
1366 | \r | |
1367 | This function returns a value of type UINTN by interpreting the contents\r | |
1368 | of the ASCII string String as a decimal number. The format of the input\r | |
1369 | ASCII string String is:\r | |
1370 | \r | |
1371 | [spaces] [decimal digits].\r | |
1372 | \r | |
1373 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1374 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1375 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1376 | function stops at the first character that is a not a valid decimal character or\r | |
1377 | Null-terminator, whichever on comes first.\r | |
1378 | \r | |
1379 | If String has only pad spaces, then 0 is returned.\r | |
1380 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1381 | If the number represented by String overflows according to the range defined by\r | |
1382 | UINTN, then ASSERT().\r | |
1383 | If String is NULL, then ASSERT().\r | |
1384 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1385 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1386 | then ASSERT().\r | |
1387 | \r | |
af2dc6a7 | 1388 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1389 | \r |
af2dc6a7 | 1390 | @retval The value translated from String.\r |
ac644614 | 1391 | \r |
1392 | **/\r | |
1393 | UINTN\r | |
1394 | EFIAPI\r | |
1395 | AsciiStrDecimalToUintn (\r | |
1396 | IN CONST CHAR8 *String\r | |
1397 | );\r | |
1398 | \r | |
1399 | \r | |
1400 | /**\r | |
1401 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1402 | UINT64.\r | |
1403 | \r | |
1404 | This function returns a value of type UINT64 by interpreting the contents\r | |
1405 | of the ASCII string String as a decimal number. The format of the input\r | |
1406 | ASCII string String is:\r | |
1407 | \r | |
1408 | [spaces] [decimal digits].\r | |
1409 | \r | |
1410 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1411 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1412 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1413 | function stops at the first character that is a not a valid decimal character or\r | |
1414 | Null-terminator, whichever on comes first.\r | |
1415 | \r | |
1416 | If String has only pad spaces, then 0 is returned.\r | |
1417 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1418 | If the number represented by String overflows according to the range defined by\r | |
1419 | UINT64, then ASSERT().\r | |
1420 | If String is NULL, then ASSERT().\r | |
1421 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1422 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1423 | then ASSERT().\r | |
1424 | \r | |
af2dc6a7 | 1425 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1426 | \r |
38bbd3d9 | 1427 | @retval Value translated from String.\r |
ac644614 | 1428 | \r |
1429 | **/\r | |
1430 | UINT64\r | |
1431 | EFIAPI\r | |
1432 | AsciiStrDecimalToUint64 (\r | |
17f695ed | 1433 | IN CONST CHAR8 *String\r |
ac644614 | 1434 | );\r |
1435 | \r | |
1436 | \r | |
1437 | /**\r | |
1438 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
1439 | \r | |
1440 | This function returns a value of type UINTN by interpreting the contents of\r | |
1441 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1442 | string String is:\r | |
1443 | \r | |
1444 | [spaces][zeros][x][hexadecimal digits].\r | |
1445 | \r | |
1446 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1447 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1448 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1449 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1450 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1451 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1452 | digit. Then, the function stops at the first character that is a not a valid\r | |
1453 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1454 | \r | |
1455 | If String has only pad spaces, then 0 is returned.\r | |
1456 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1457 | 0 is returned.\r | |
1458 | \r | |
1459 | If the number represented by String overflows according to the range defined by UINTN,\r | |
1460 | then ASSERT().\r | |
1461 | If String is NULL, then ASSERT().\r | |
1462 | If PcdMaximumAsciiStringLength is not zero,\r | |
1463 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1464 | the Null-terminator, then ASSERT().\r | |
1465 | \r | |
af2dc6a7 | 1466 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1467 | \r |
38bbd3d9 | 1468 | @retval Value translated from String.\r |
ac644614 | 1469 | \r |
1470 | **/\r | |
1471 | UINTN\r | |
1472 | EFIAPI\r | |
1473 | AsciiStrHexToUintn (\r | |
17f695ed | 1474 | IN CONST CHAR8 *String\r |
ac644614 | 1475 | );\r |
1476 | \r | |
1477 | \r | |
1478 | /**\r | |
1479 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
1480 | \r | |
1481 | This function returns a value of type UINT64 by interpreting the contents of\r | |
1482 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1483 | string String is:\r | |
1484 | \r | |
1485 | [spaces][zeros][x][hexadecimal digits].\r | |
1486 | \r | |
1487 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1488 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1489 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1490 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1491 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1492 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1493 | digit. Then, the function stops at the first character that is a not a valid\r | |
1494 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1495 | \r | |
1496 | If String has only pad spaces, then 0 is returned.\r | |
1497 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1498 | 0 is returned.\r | |
1499 | \r | |
1500 | If the number represented by String overflows according to the range defined by UINT64,\r | |
1501 | then ASSERT().\r | |
1502 | If String is NULL, then ASSERT().\r | |
1503 | If PcdMaximumAsciiStringLength is not zero,\r | |
1504 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1505 | the Null-terminator, then ASSERT().\r | |
1506 | \r | |
af2dc6a7 | 1507 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1508 | \r |
38bbd3d9 | 1509 | @retval Value translated from String.\r |
ac644614 | 1510 | \r |
1511 | **/\r | |
1512 | UINT64\r | |
1513 | EFIAPI\r | |
1514 | AsciiStrHexToUint64 (\r | |
17f695ed | 1515 | IN CONST CHAR8 *String\r |
ac644614 | 1516 | );\r |
1517 | \r | |
1518 | \r | |
1519 | /**\r | |
1520 | Convert one Null-terminated ASCII string to a Null-terminated\r | |
1521 | Unicode string and returns the Unicode string.\r | |
1522 | \r | |
1523 | This function converts the contents of the ASCII string Source to the Unicode\r | |
1524 | string Destination, and returns Destination. The function terminates the\r | |
1525 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
1526 | The caller is responsible to make sure Destination points to a buffer with size\r | |
1527 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r | |
1528 | \r | |
1529 | If Destination is NULL, then ASSERT().\r | |
1530 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
1531 | If Source is NULL, then ASSERT().\r | |
1532 | If Source and Destination overlap, then ASSERT().\r | |
1533 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
1534 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1535 | then ASSERT().\r | |
1536 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
1537 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
1538 | Null-terminator, then ASSERT().\r | |
1539 | \r | |
af2dc6a7 | 1540 | @param Source The pointer to a Null-terminated ASCII string.\r |
1541 | @param Destination The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 1542 | \r |
9aa049d9 | 1543 | @return Destination.\r |
ac644614 | 1544 | \r |
1545 | **/\r | |
1546 | CHAR16 *\r | |
1547 | EFIAPI\r | |
1548 | AsciiStrToUnicodeStr (\r | |
17f695ed | 1549 | IN CONST CHAR8 *Source,\r |
1550 | OUT CHAR16 *Destination\r | |
ac644614 | 1551 | );\r |
1552 | \r | |
1553 | \r | |
1554 | /**\r | |
1555 | Converts an 8-bit value to an 8-bit BCD value.\r | |
1556 | \r | |
1557 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
1558 | returned.\r | |
1559 | \r | |
1560 | If Value >= 100, then ASSERT().\r | |
1561 | \r | |
1562 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
1563 | \r | |
9aa049d9 | 1564 | @return The BCD value.\r |
ac644614 | 1565 | \r |
1566 | **/\r | |
1567 | UINT8\r | |
1568 | EFIAPI\r | |
1569 | DecimalToBcd8 (\r | |
1570 | IN UINT8 Value\r | |
1571 | );\r | |
1572 | \r | |
1573 | \r | |
1574 | /**\r | |
1575 | Converts an 8-bit BCD value to an 8-bit value.\r | |
1576 | \r | |
1577 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
1578 | value is returned.\r | |
1579 | \r | |
1580 | If Value >= 0xA0, then ASSERT().\r | |
1581 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
1582 | \r | |
1583 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
1584 | \r | |
1585 | @return The 8-bit value is returned.\r | |
1586 | \r | |
1587 | **/\r | |
1588 | UINT8\r | |
1589 | EFIAPI\r | |
1590 | BcdToDecimal8 (\r | |
1591 | IN UINT8 Value\r | |
1592 | );\r | |
1593 | \r | |
ae591c14 DM |
1594 | //\r |
1595 | // File Path Manipulation Functions\r | |
1596 | //\r | |
1597 | \r | |
1598 | /**\r | |
1599 | Removes the last directory or file entry in a path by changing the last\r | |
1600 | L'\' to a CHAR_NULL.\r | |
1601 | \r | |
1602 | @param[in, out] Path The pointer to the path to modify.\r | |
1603 | \r | |
1604 | @retval FALSE Nothing was found to remove.\r | |
1605 | @retval TRUE A directory or file was removed.\r | |
1606 | **/\r | |
1607 | BOOLEAN\r | |
1608 | EFIAPI\r | |
1609 | PathRemoveLastItem(\r | |
1610 | IN OUT CHAR16 *Path\r | |
1611 | );\r | |
1612 | \r | |
1613 | /**\r | |
1614 | Function to clean up paths.\r | |
1615 | - Single periods in the path are removed.\r | |
1616 | - Double periods in the path are removed along with a single parent directory.\r | |
1617 | - Forward slashes L'/' are converted to backward slashes L'\'.\r | |
1618 | \r | |
1619 | This will be done inline and the existing buffer may be larger than required\r | |
1620 | upon completion.\r | |
1621 | \r | |
1622 | @param[in] Path The pointer to the string containing the path.\r | |
1623 | \r | |
1624 | @return Returns Path, otherwise returns NULL to indicate that an error has occured.\r | |
1625 | **/\r | |
1626 | CHAR16*\r | |
1627 | EFIAPI\r | |
1628 | PathCleanUpDirectories(\r | |
1629 | IN CHAR16 *Path\r | |
909ac47b | 1630 | );\r |
ac644614 | 1631 | \r |
1632 | //\r | |
1633 | // Linked List Functions and Macros\r | |
1634 | //\r | |
1635 | \r | |
1636 | /**\r | |
1637 | Initializes the head node of a doubly linked list that is declared as a\r | |
1638 | global variable in a module.\r | |
1639 | \r | |
1640 | Initializes the forward and backward links of a new linked list. After\r | |
1641 | initializing a linked list with this macro, the other linked list functions\r | |
1642 | may be used to add and remove nodes from the linked list. This macro results\r | |
1643 | in smaller executables by initializing the linked list in the data section,\r | |
1644 | instead if calling the InitializeListHead() function to perform the\r | |
1645 | equivalent operation.\r | |
1646 | \r | |
77f863ee | 1647 | @param ListHead The head note of a list to initialize.\r |
ac644614 | 1648 | \r |
1649 | **/\r | |
17f695ed | 1650 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r |
ac644614 | 1651 | \r |
1652 | \r | |
1653 | /**\r | |
1654 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
1655 | the head node of the doubly linked list.\r | |
1656 | \r | |
1657 | Initializes the forward and backward links of a new linked list. After\r | |
1658 | initializing a linked list with this function, the other linked list\r | |
1659 | functions may be used to add and remove nodes from the linked list. It is up\r | |
1660 | to the caller of this function to allocate the memory for ListHead.\r | |
1661 | \r | |
1662 | If ListHead is NULL, then ASSERT().\r | |
1663 | \r | |
1664 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
1665 | \r | |
1666 | @return ListHead\r | |
1667 | \r | |
1668 | **/\r | |
1669 | LIST_ENTRY *\r | |
1670 | EFIAPI\r | |
1671 | InitializeListHead (\r | |
aa0583c7 | 1672 | IN OUT LIST_ENTRY *ListHead\r |
ac644614 | 1673 | );\r |
1674 | \r | |
1675 | \r | |
1676 | /**\r | |
1677 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
1678 | to the head node of the doubly linked list.\r | |
1679 | \r | |
1680 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
1681 | ListHead, and returns ListHead.\r | |
1682 | \r | |
1683 | If ListHead is NULL, then ASSERT().\r | |
1684 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1685 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1686 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1687 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
ac644614 | 1688 | of nodes in ListHead, including the ListHead node, is greater than or\r |
1689 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1690 | \r | |
1691 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1692 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
1693 | of a doubly linked list.\r | |
1694 | \r | |
1695 | @return ListHead\r | |
1696 | \r | |
1697 | **/\r | |
1698 | LIST_ENTRY *\r | |
1699 | EFIAPI\r | |
1700 | InsertHeadList (\r | |
aa0583c7 | 1701 | IN OUT LIST_ENTRY *ListHead,\r |
1702 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1703 | );\r |
1704 | \r | |
1705 | \r | |
1706 | /**\r | |
1707 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
1708 | the head node of the doubly linked list.\r | |
1709 | \r | |
1710 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
1711 | and returns ListHead.\r | |
1712 | \r | |
1713 | If ListHead is NULL, then ASSERT().\r | |
1714 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1715 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1716 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1717 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
ac644614 | 1718 | of nodes in ListHead, including the ListHead node, is greater than or\r |
1719 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1720 | \r | |
1721 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1722 | @param Entry A pointer to a node that is to be added at the end of the\r | |
1723 | doubly linked list.\r | |
1724 | \r | |
1725 | @return ListHead\r | |
1726 | \r | |
1727 | **/\r | |
1728 | LIST_ENTRY *\r | |
1729 | EFIAPI\r | |
1730 | InsertTailList (\r | |
aa0583c7 | 1731 | IN OUT LIST_ENTRY *ListHead,\r |
1732 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1733 | );\r |
1734 | \r | |
1735 | \r | |
1736 | /**\r | |
1737 | Retrieves the first node of a doubly linked list.\r | |
1738 | \r | |
17f695ed | 1739 | Returns the first node of a doubly linked list. List must have been \r |
1740 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r | |
1741 | If List is empty, then List is returned.\r | |
ac644614 | 1742 | \r |
1743 | If List is NULL, then ASSERT().\r | |
17f695ed | 1744 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1745 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1746 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1747 | in List, including the List node, is greater than or equal to\r |
1748 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1749 | \r | |
1750 | @param List A pointer to the head node of a doubly linked list.\r | |
1751 | \r | |
1752 | @return The first node of a doubly linked list.\r | |
e01a125f | 1753 | @retval List The list is empty.\r |
ac644614 | 1754 | \r |
1755 | **/\r | |
1756 | LIST_ENTRY *\r | |
1757 | EFIAPI\r | |
1758 | GetFirstNode (\r | |
1759 | IN CONST LIST_ENTRY *List\r | |
1760 | );\r | |
1761 | \r | |
1762 | \r | |
1763 | /**\r | |
1764 | Retrieves the next node of a doubly linked list.\r | |
1765 | \r | |
17f695ed | 1766 | Returns the node of a doubly linked list that follows Node. \r |
1767 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1768 | or InitializeListHead(). If List is empty, then List is returned.\r | |
ac644614 | 1769 | \r |
1770 | If List is NULL, then ASSERT().\r | |
1771 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1772 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1773 | InitializeListHead(), then ASSERT().\r | |
a71865b1 LG |
1774 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
1775 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
1081f624 | 1776 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1777 | \r |
1778 | @param List A pointer to the head node of a doubly linked list.\r | |
1779 | @param Node A pointer to a node in the doubly linked list.\r | |
1780 | \r | |
af2dc6a7 | 1781 | @return The pointer to the next node if one exists. Otherwise List is returned.\r |
ac644614 | 1782 | \r |
1783 | **/\r | |
1784 | LIST_ENTRY *\r | |
1785 | EFIAPI\r | |
1786 | GetNextNode (\r | |
1787 | IN CONST LIST_ENTRY *List,\r | |
1788 | IN CONST LIST_ENTRY *Node\r | |
1789 | );\r | |
1790 | \r | |
cbca8de5 | 1791 | \r |
1792 | /**\r | |
1793 | Retrieves the previous node of a doubly linked list.\r | |
1794 | \r | |
1795 | Returns the node of a doubly linked list that precedes Node. \r | |
1796 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1797 | or InitializeListHead(). If List is empty, then List is returned.\r | |
1798 | \r | |
1799 | If List is NULL, then ASSERT().\r | |
1800 | If Node is NULL, then ASSERT().\r | |
1801 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r | |
1802 | InitializeListHead(), then ASSERT().\r | |
a71865b1 LG |
1803 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
1804 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
cbca8de5 | 1805 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
1806 | \r | |
1807 | @param List A pointer to the head node of a doubly linked list.\r | |
1808 | @param Node A pointer to a node in the doubly linked list.\r | |
1809 | \r | |
af2dc6a7 | 1810 | @return The pointer to the previous node if one exists. Otherwise List is returned.\r |
cbca8de5 | 1811 | \r |
1812 | **/\r | |
1813 | LIST_ENTRY *\r | |
1814 | EFIAPI\r | |
1815 | GetPreviousNode (\r | |
1816 | IN CONST LIST_ENTRY *List,\r | |
1817 | IN CONST LIST_ENTRY *Node\r | |
1818 | );\r | |
ac644614 | 1819 | \r |
cbca8de5 | 1820 | \r |
ac644614 | 1821 | /**\r |
1822 | Checks to see if a doubly linked list is empty or not.\r | |
1823 | \r | |
1824 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
1825 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
1826 | \r | |
1827 | If ListHead is NULL, then ASSERT().\r | |
17f695ed | 1828 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1829 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1830 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1831 | in List, including the List node, is greater than or equal to\r |
1832 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1833 | \r | |
1834 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1835 | \r | |
1836 | @retval TRUE The linked list is empty.\r | |
1837 | @retval FALSE The linked list is not empty.\r | |
1838 | \r | |
1839 | **/\r | |
1840 | BOOLEAN\r | |
1841 | EFIAPI\r | |
1842 | IsListEmpty (\r | |
1843 | IN CONST LIST_ENTRY *ListHead\r | |
1844 | );\r | |
1845 | \r | |
1846 | \r | |
1847 | /**\r | |
aa0583c7 | 1848 | Determines if a node in a doubly linked list is the head node of a the same\r |
1849 | doubly linked list. This function is typically used to terminate a loop that\r | |
1850 | traverses all the nodes in a doubly linked list starting with the head node.\r | |
ac644614 | 1851 | \r |
aa0583c7 | 1852 | Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r |
1853 | nodes in the doubly linked list specified by List. List must have been\r | |
17f695ed | 1854 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1855 | \r |
1856 | If List is NULL, then ASSERT().\r | |
1857 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1858 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r |
1859 | then ASSERT().\r | |
a71865b1 | 1860 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1861 | in List, including the List node, is greater than or equal to\r |
1862 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1863 | If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r |
1864 | to List, then ASSERT().\r | |
ac644614 | 1865 | \r |
1866 | @param List A pointer to the head node of a doubly linked list.\r | |
1867 | @param Node A pointer to a node in the doubly linked list.\r | |
1868 | \r | |
1955808d LG |
1869 | @retval TRUE Node is the head of the doubly-linked list pointed by List.\r |
1870 | @retval FALSE Node is not the head of the doubly-linked list pointed by List.\r | |
ac644614 | 1871 | \r |
1872 | **/\r | |
1873 | BOOLEAN\r | |
1874 | EFIAPI\r | |
1875 | IsNull (\r | |
1876 | IN CONST LIST_ENTRY *List,\r | |
1877 | IN CONST LIST_ENTRY *Node\r | |
1878 | );\r | |
1879 | \r | |
1880 | \r | |
1881 | /**\r | |
1882 | Determines if a node the last node in a doubly linked list.\r | |
1883 | \r | |
1884 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
1885 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
17f695ed | 1886 | INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1887 | \r |
1888 | If List is NULL, then ASSERT().\r | |
1889 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1890 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1891 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1892 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1893 | in List, including the List node, is greater than or equal to\r |
1894 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1895 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1896 | \r |
1897 | @param List A pointer to the head node of a doubly linked list.\r | |
1898 | @param Node A pointer to a node in the doubly linked list.\r | |
1899 | \r | |
1900 | @retval TRUE Node is the last node in the linked list.\r | |
1901 | @retval FALSE Node is not the last node in the linked list.\r | |
1902 | \r | |
1903 | **/\r | |
1904 | BOOLEAN\r | |
1905 | EFIAPI\r | |
1906 | IsNodeAtEnd (\r | |
1907 | IN CONST LIST_ENTRY *List,\r | |
1908 | IN CONST LIST_ENTRY *Node\r | |
1909 | );\r | |
1910 | \r | |
1911 | \r | |
1912 | /**\r | |
1913 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
1914 | first node after the swap.\r | |
1915 | \r | |
1916 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
1917 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
1918 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
1919 | same double linked list as FirstEntry and that double linked list must have\r | |
17f695ed | 1920 | been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r |
1921 | SecondEntry is returned after the nodes are swapped.\r | |
ac644614 | 1922 | \r |
1923 | If FirstEntry is NULL, then ASSERT().\r | |
1924 | If SecondEntry is NULL, then ASSERT().\r | |
1081f624 | 1925 | If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r |
1926 | same linked list, then ASSERT().\r | |
ac644614 | 1927 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
1928 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
1929 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
1930 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1931 | \r | |
1932 | @param FirstEntry A pointer to a node in a linked list.\r | |
1933 | @param SecondEntry A pointer to another node in the same linked list.\r | |
38bbd3d9 | 1934 | \r |
9aa049d9 | 1935 | @return SecondEntry.\r |
ac644614 | 1936 | \r |
1937 | **/\r | |
1938 | LIST_ENTRY *\r | |
1939 | EFIAPI\r | |
1940 | SwapListEntries (\r | |
aa0583c7 | 1941 | IN OUT LIST_ENTRY *FirstEntry,\r |
1942 | IN OUT LIST_ENTRY *SecondEntry\r | |
ac644614 | 1943 | );\r |
1944 | \r | |
1945 | \r | |
1946 | /**\r | |
1947 | Removes a node from a doubly linked list, and returns the node that follows\r | |
1948 | the removed node.\r | |
1949 | \r | |
1950 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
1951 | this function to release the memory used by this node if that is required. On\r | |
1952 | exit, the node following Entry in the doubly linked list is returned. If\r | |
1953 | Entry is the only node in the linked list, then the head node of the linked\r | |
1954 | list is returned.\r | |
1955 | \r | |
1956 | If Entry is NULL, then ASSERT().\r | |
1957 | If Entry is the head node of an empty list, then ASSERT().\r | |
1958 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1959 | linked list containing Entry, including the Entry node, is greater than\r | |
1960 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1961 | \r | |
9aa049d9 | 1962 | @param Entry A pointer to a node in a linked list.\r |
ac644614 | 1963 | \r |
9aa049d9 | 1964 | @return Entry.\r |
ac644614 | 1965 | \r |
1966 | **/\r | |
1967 | LIST_ENTRY *\r | |
1968 | EFIAPI\r | |
1969 | RemoveEntryList (\r | |
1970 | IN CONST LIST_ENTRY *Entry\r | |
1971 | );\r | |
1972 | \r | |
1973 | //\r | |
1974 | // Math Services\r | |
1975 | //\r | |
1976 | \r | |
1977 | /**\r | |
1978 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
1979 | with zeros. The shifted value is returned.\r | |
1980 | \r | |
1981 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
1982 | low Count bits are set to zero. The shifted value is returned.\r | |
1983 | \r | |
1984 | If Count is greater than 63, then ASSERT().\r | |
1985 | \r | |
1986 | @param Operand The 64-bit operand to shift left.\r | |
1987 | @param Count The number of bits to shift left.\r | |
1988 | \r | |
9aa049d9 | 1989 | @return Operand << Count.\r |
ac644614 | 1990 | \r |
1991 | **/\r | |
1992 | UINT64\r | |
1993 | EFIAPI\r | |
1994 | LShiftU64 (\r | |
1995 | IN UINT64 Operand,\r | |
1996 | IN UINTN Count\r | |
1997 | );\r | |
1998 | \r | |
1999 | \r | |
2000 | /**\r | |
2001 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
2002 | filled with zeros. The shifted value is returned.\r | |
2003 | \r | |
2004 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
2005 | high Count bits are set to zero. The shifted value is returned.\r | |
2006 | \r | |
2007 | If Count is greater than 63, then ASSERT().\r | |
2008 | \r | |
2009 | @param Operand The 64-bit operand to shift right.\r | |
2010 | @param Count The number of bits to shift right.\r | |
2011 | \r | |
2012 | @return Operand >> Count\r | |
2013 | \r | |
2014 | **/\r | |
2015 | UINT64\r | |
2016 | EFIAPI\r | |
2017 | RShiftU64 (\r | |
2018 | IN UINT64 Operand,\r | |
2019 | IN UINTN Count\r | |
2020 | );\r | |
2021 | \r | |
2022 | \r | |
2023 | /**\r | |
2024 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
2025 | with original integer's bit 63. The shifted value is returned.\r | |
2026 | \r | |
2027 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
2028 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
2029 | \r | |
2030 | If Count is greater than 63, then ASSERT().\r | |
2031 | \r | |
2032 | @param Operand The 64-bit operand to shift right.\r | |
2033 | @param Count The number of bits to shift right.\r | |
2034 | \r | |
2035 | @return Operand >> Count\r | |
2036 | \r | |
2037 | **/\r | |
2038 | UINT64\r | |
2039 | EFIAPI\r | |
2040 | ARShiftU64 (\r | |
2041 | IN UINT64 Operand,\r | |
2042 | IN UINTN Count\r | |
2043 | );\r | |
2044 | \r | |
2045 | \r | |
2046 | /**\r | |
2047 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
2048 | with the high bits that were rotated.\r | |
2049 | \r | |
2050 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
2051 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
2052 | value is returned.\r | |
2053 | \r | |
2054 | If Count is greater than 31, then ASSERT().\r | |
2055 | \r | |
2056 | @param Operand The 32-bit operand to rotate left.\r | |
2057 | @param Count The number of bits to rotate left.\r | |
2058 | \r | |
17f695ed | 2059 | @return Operand << Count\r |
ac644614 | 2060 | \r |
2061 | **/\r | |
2062 | UINT32\r | |
2063 | EFIAPI\r | |
2064 | LRotU32 (\r | |
2065 | IN UINT32 Operand,\r | |
2066 | IN UINTN Count\r | |
2067 | );\r | |
2068 | \r | |
2069 | \r | |
2070 | /**\r | |
2071 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
2072 | with the low bits that were rotated.\r | |
2073 | \r | |
2074 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
2075 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
2076 | value is returned.\r | |
2077 | \r | |
2078 | If Count is greater than 31, then ASSERT().\r | |
2079 | \r | |
2080 | @param Operand The 32-bit operand to rotate right.\r | |
2081 | @param Count The number of bits to rotate right.\r | |
2082 | \r | |
2fe241a2 | 2083 | @return Operand >> Count\r |
ac644614 | 2084 | \r |
2085 | **/\r | |
2086 | UINT32\r | |
2087 | EFIAPI\r | |
2088 | RRotU32 (\r | |
2089 | IN UINT32 Operand,\r | |
2090 | IN UINTN Count\r | |
2091 | );\r | |
2092 | \r | |
2093 | \r | |
2094 | /**\r | |
2095 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
2096 | with the high bits that were rotated.\r | |
2097 | \r | |
2098 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
2099 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
2100 | value is returned.\r | |
2101 | \r | |
2102 | If Count is greater than 63, then ASSERT().\r | |
2103 | \r | |
2104 | @param Operand The 64-bit operand to rotate left.\r | |
2105 | @param Count The number of bits to rotate left.\r | |
2106 | \r | |
17f695ed | 2107 | @return Operand << Count\r |
ac644614 | 2108 | \r |
2109 | **/\r | |
2110 | UINT64\r | |
2111 | EFIAPI\r | |
2112 | LRotU64 (\r | |
2113 | IN UINT64 Operand,\r | |
2114 | IN UINTN Count\r | |
2115 | );\r | |
2116 | \r | |
2117 | \r | |
2118 | /**\r | |
2119 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
2120 | with the high low bits that were rotated.\r | |
2121 | \r | |
2122 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
2123 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
2124 | value is returned.\r | |
2125 | \r | |
2126 | If Count is greater than 63, then ASSERT().\r | |
2127 | \r | |
2128 | @param Operand The 64-bit operand to rotate right.\r | |
2129 | @param Count The number of bits to rotate right.\r | |
2130 | \r | |
17f695ed | 2131 | @return Operand >> Count\r |
ac644614 | 2132 | \r |
2133 | **/\r | |
2134 | UINT64\r | |
2135 | EFIAPI\r | |
2136 | RRotU64 (\r | |
2137 | IN UINT64 Operand,\r | |
2138 | IN UINTN Count\r | |
2139 | );\r | |
2140 | \r | |
2141 | \r | |
2142 | /**\r | |
2143 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
2144 | \r | |
2145 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
2146 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2147 | Otherwise, a value between 0 and 31 is returned.\r | |
2148 | \r | |
2149 | @param Operand The 32-bit operand to evaluate.\r | |
2150 | \r | |
9aa049d9 | 2151 | @retval 0..31 The lowest bit set in Operand was found.\r |
17f695ed | 2152 | @retval -1 Operand is zero.\r |
ac644614 | 2153 | \r |
2154 | **/\r | |
2155 | INTN\r | |
2156 | EFIAPI\r | |
2157 | LowBitSet32 (\r | |
2158 | IN UINT32 Operand\r | |
2159 | );\r | |
2160 | \r | |
2161 | \r | |
2162 | /**\r | |
2163 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
2164 | \r | |
2165 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
2166 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2167 | Otherwise, a value between 0 and 63 is returned.\r | |
2168 | \r | |
2169 | @param Operand The 64-bit operand to evaluate.\r | |
2170 | \r | |
9aa049d9 | 2171 | @retval 0..63 The lowest bit set in Operand was found.\r |
17f695ed | 2172 | @retval -1 Operand is zero.\r |
2173 | \r | |
ac644614 | 2174 | \r |
2175 | **/\r | |
2176 | INTN\r | |
2177 | EFIAPI\r | |
2178 | LowBitSet64 (\r | |
2179 | IN UINT64 Operand\r | |
2180 | );\r | |
2181 | \r | |
2182 | \r | |
2183 | /**\r | |
2184 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
2185 | to log2(x).\r | |
2186 | \r | |
2187 | This function computes the bit position of the highest bit set in the 32-bit\r | |
2188 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2189 | Otherwise, a value between 0 and 31 is returned.\r | |
2190 | \r | |
2191 | @param Operand The 32-bit operand to evaluate.\r | |
2192 | \r | |
9aa049d9 | 2193 | @retval 0..31 Position of the highest bit set in Operand if found.\r |
17f695ed | 2194 | @retval -1 Operand is zero.\r |
ac644614 | 2195 | \r |
2196 | **/\r | |
2197 | INTN\r | |
2198 | EFIAPI\r | |
2199 | HighBitSet32 (\r | |
2200 | IN UINT32 Operand\r | |
2201 | );\r | |
2202 | \r | |
2203 | \r | |
2204 | /**\r | |
2205 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
2206 | to log2(x).\r | |
2207 | \r | |
2208 | This function computes the bit position of the highest bit set in the 64-bit\r | |
2209 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2210 | Otherwise, a value between 0 and 63 is returned.\r | |
2211 | \r | |
2212 | @param Operand The 64-bit operand to evaluate.\r | |
2213 | \r | |
9aa049d9 | 2214 | @retval 0..63 Position of the highest bit set in Operand if found.\r |
17f695ed | 2215 | @retval -1 Operand is zero.\r |
ac644614 | 2216 | \r |
2217 | **/\r | |
2218 | INTN\r | |
2219 | EFIAPI\r | |
2220 | HighBitSet64 (\r | |
2221 | IN UINT64 Operand\r | |
2222 | );\r | |
2223 | \r | |
2224 | \r | |
2225 | /**\r | |
2226 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
17f695ed | 2227 | 1 << log2(x).\r |
ac644614 | 2228 | \r |
2229 | This function computes the value of the highest bit set in the 32-bit value\r | |
2230 | specified by Operand. If Operand is zero, then zero is returned.\r | |
2231 | \r | |
2232 | @param Operand The 32-bit operand to evaluate.\r | |
2233 | \r | |
2234 | @return 1 << HighBitSet32(Operand)\r | |
2235 | @retval 0 Operand is zero.\r | |
2236 | \r | |
2237 | **/\r | |
2238 | UINT32\r | |
2239 | EFIAPI\r | |
2240 | GetPowerOfTwo32 (\r | |
2241 | IN UINT32 Operand\r | |
2242 | );\r | |
2243 | \r | |
2244 | \r | |
2245 | /**\r | |
2246 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
17f695ed | 2247 | 1 << log2(x).\r |
ac644614 | 2248 | \r |
2249 | This function computes the value of the highest bit set in the 64-bit value\r | |
2250 | specified by Operand. If Operand is zero, then zero is returned.\r | |
2251 | \r | |
2252 | @param Operand The 64-bit operand to evaluate.\r | |
2253 | \r | |
2254 | @return 1 << HighBitSet64(Operand)\r | |
2255 | @retval 0 Operand is zero.\r | |
2256 | \r | |
2257 | **/\r | |
2258 | UINT64\r | |
2259 | EFIAPI\r | |
2260 | GetPowerOfTwo64 (\r | |
2261 | IN UINT64 Operand\r | |
2262 | );\r | |
2263 | \r | |
2264 | \r | |
2265 | /**\r | |
af2dc6a7 | 2266 | Switches the endianness of a 16-bit integer.\r |
ac644614 | 2267 | \r |
2268 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
2269 | from little endian to big endian or vice versa. The byte swapped value is\r | |
2270 | returned.\r | |
2271 | \r | |
2a53dabf | 2272 | @param Value A 16-bit unsigned value.\r |
ac644614 | 2273 | \r |
efb23117 | 2274 | @return The byte swapped Value.\r |
ac644614 | 2275 | \r |
2276 | **/\r | |
2277 | UINT16\r | |
2278 | EFIAPI\r | |
2279 | SwapBytes16 (\r | |
2280 | IN UINT16 Value\r | |
2281 | );\r | |
2282 | \r | |
2283 | \r | |
2284 | /**\r | |
af2dc6a7 | 2285 | Switches the endianness of a 32-bit integer.\r |
ac644614 | 2286 | \r |
2287 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
2288 | from little endian to big endian or vice versa. The byte swapped value is\r | |
2289 | returned.\r | |
2290 | \r | |
2a53dabf | 2291 | @param Value A 32-bit unsigned value.\r |
ac644614 | 2292 | \r |
efb23117 | 2293 | @return The byte swapped Value.\r |
ac644614 | 2294 | \r |
2295 | **/\r | |
2296 | UINT32\r | |
2297 | EFIAPI\r | |
2298 | SwapBytes32 (\r | |
2299 | IN UINT32 Value\r | |
2300 | );\r | |
2301 | \r | |
2302 | \r | |
2303 | /**\r | |
af2dc6a7 | 2304 | Switches the endianness of a 64-bit integer.\r |
ac644614 | 2305 | \r |
2306 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
2307 | from little endian to big endian or vice versa. The byte swapped value is\r | |
2308 | returned.\r | |
2309 | \r | |
2a53dabf | 2310 | @param Value A 64-bit unsigned value.\r |
ac644614 | 2311 | \r |
efb23117 | 2312 | @return The byte swapped Value.\r |
ac644614 | 2313 | \r |
2314 | **/\r | |
2315 | UINT64\r | |
2316 | EFIAPI\r | |
2317 | SwapBytes64 (\r | |
2318 | IN UINT64 Value\r | |
2319 | );\r | |
2320 | \r | |
2321 | \r | |
2322 | /**\r | |
2323 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
2324 | generates a 64-bit unsigned result.\r | |
2325 | \r | |
2326 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
2327 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
2328 | bit unsigned result is returned.\r | |
2329 | \r | |
ac644614 | 2330 | @param Multiplicand A 64-bit unsigned value.\r |
2331 | @param Multiplier A 32-bit unsigned value.\r | |
2332 | \r | |
2333 | @return Multiplicand * Multiplier\r | |
2334 | \r | |
2335 | **/\r | |
2336 | UINT64\r | |
2337 | EFIAPI\r | |
2338 | MultU64x32 (\r | |
2339 | IN UINT64 Multiplicand,\r | |
2340 | IN UINT32 Multiplier\r | |
2341 | );\r | |
2342 | \r | |
2343 | \r | |
2344 | /**\r | |
2345 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
2346 | generates a 64-bit unsigned result.\r | |
2347 | \r | |
2348 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
2349 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
2350 | bit unsigned result is returned.\r | |
2351 | \r | |
ac644614 | 2352 | @param Multiplicand A 64-bit unsigned value.\r |
2353 | @param Multiplier A 64-bit unsigned value.\r | |
2354 | \r | |
af2dc6a7 | 2355 | @return Multiplicand * Multiplier.\r |
ac644614 | 2356 | \r |
2357 | **/\r | |
2358 | UINT64\r | |
2359 | EFIAPI\r | |
2360 | MultU64x64 (\r | |
2361 | IN UINT64 Multiplicand,\r | |
2362 | IN UINT64 Multiplier\r | |
2363 | );\r | |
2364 | \r | |
2365 | \r | |
2366 | /**\r | |
2367 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2368 | 64-bit signed result.\r | |
2369 | \r | |
2370 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
2371 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
2372 | signed result is returned.\r | |
2373 | \r | |
ac644614 | 2374 | @param Multiplicand A 64-bit signed value.\r |
2375 | @param Multiplier A 64-bit signed value.\r | |
2376 | \r | |
2377 | @return Multiplicand * Multiplier\r | |
2378 | \r | |
2379 | **/\r | |
2380 | INT64\r | |
2381 | EFIAPI\r | |
2382 | MultS64x64 (\r | |
2383 | IN INT64 Multiplicand,\r | |
2384 | IN INT64 Multiplier\r | |
2385 | );\r | |
2386 | \r | |
2387 | \r | |
2388 | /**\r | |
2389 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2390 | a 64-bit unsigned result.\r | |
2391 | \r | |
2392 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2393 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
2394 | function returns the 64-bit unsigned quotient.\r | |
2395 | \r | |
2396 | If Divisor is 0, then ASSERT().\r | |
2397 | \r | |
2398 | @param Dividend A 64-bit unsigned value.\r | |
2399 | @param Divisor A 32-bit unsigned value.\r | |
2400 | \r | |
af2dc6a7 | 2401 | @return Dividend / Divisor.\r |
ac644614 | 2402 | \r |
2403 | **/\r | |
2404 | UINT64\r | |
2405 | EFIAPI\r | |
2406 | DivU64x32 (\r | |
2407 | IN UINT64 Dividend,\r | |
2408 | IN UINT32 Divisor\r | |
2409 | );\r | |
2410 | \r | |
2411 | \r | |
2412 | /**\r | |
2413 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2414 | a 32-bit unsigned remainder.\r | |
2415 | \r | |
2416 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2417 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
2418 | returns the 32-bit unsigned remainder.\r | |
2419 | \r | |
2420 | If Divisor is 0, then ASSERT().\r | |
2421 | \r | |
2422 | @param Dividend A 64-bit unsigned value.\r | |
2423 | @param Divisor A 32-bit unsigned value.\r | |
2424 | \r | |
af2dc6a7 | 2425 | @return Dividend % Divisor.\r |
ac644614 | 2426 | \r |
2427 | **/\r | |
2428 | UINT32\r | |
2429 | EFIAPI\r | |
2430 | ModU64x32 (\r | |
2431 | IN UINT64 Dividend,\r | |
2432 | IN UINT32 Divisor\r | |
2433 | );\r | |
2434 | \r | |
2435 | \r | |
2436 | /**\r | |
2437 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2438 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
2439 | \r | |
2440 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2441 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2442 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
2443 | This function returns the 64-bit unsigned quotient.\r | |
2444 | \r | |
2445 | If Divisor is 0, then ASSERT().\r | |
2446 | \r | |
2447 | @param Dividend A 64-bit unsigned value.\r | |
2448 | @param Divisor A 32-bit unsigned value.\r | |
2449 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
2450 | optional and may be NULL.\r | |
2451 | \r | |
af2dc6a7 | 2452 | @return Dividend / Divisor.\r |
ac644614 | 2453 | \r |
2454 | **/\r | |
2455 | UINT64\r | |
2456 | EFIAPI\r | |
2457 | DivU64x32Remainder (\r | |
2458 | IN UINT64 Dividend,\r | |
2459 | IN UINT32 Divisor,\r | |
2460 | OUT UINT32 *Remainder OPTIONAL\r | |
2461 | );\r | |
2462 | \r | |
2463 | \r | |
2464 | /**\r | |
2465 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
2466 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
2467 | \r | |
2468 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
2469 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2470 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
2471 | This function returns the 64-bit unsigned quotient.\r | |
2472 | \r | |
2473 | If Divisor is 0, then ASSERT().\r | |
2474 | \r | |
2475 | @param Dividend A 64-bit unsigned value.\r | |
2476 | @param Divisor A 64-bit unsigned value.\r | |
2477 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
2478 | optional and may be NULL.\r | |
2479 | \r | |
af2dc6a7 | 2480 | @return Dividend / Divisor.\r |
ac644614 | 2481 | \r |
2482 | **/\r | |
2483 | UINT64\r | |
2484 | EFIAPI\r | |
2485 | DivU64x64Remainder (\r | |
2486 | IN UINT64 Dividend,\r | |
2487 | IN UINT64 Divisor,\r | |
2488 | OUT UINT64 *Remainder OPTIONAL\r | |
2489 | );\r | |
2490 | \r | |
2491 | \r | |
2492 | /**\r | |
2493 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2494 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
2495 | \r | |
2496 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
2497 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
2498 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
2499 | function returns the 64-bit signed quotient.\r | |
2500 | \r | |
9aa049d9 | 2501 | It is the caller's responsibility to not call this function with a Divisor of 0.\r |
17f695ed | 2502 | If Divisor is 0, then the quotient and remainder should be assumed to be \r |
2503 | the largest negative integer.\r | |
2504 | \r | |
ac644614 | 2505 | If Divisor is 0, then ASSERT().\r |
2506 | \r | |
2507 | @param Dividend A 64-bit signed value.\r | |
2508 | @param Divisor A 64-bit signed value.\r | |
2509 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
2510 | optional and may be NULL.\r | |
2511 | \r | |
af2dc6a7 | 2512 | @return Dividend / Divisor.\r |
ac644614 | 2513 | \r |
2514 | **/\r | |
2515 | INT64\r | |
2516 | EFIAPI\r | |
2517 | DivS64x64Remainder (\r | |
2518 | IN INT64 Dividend,\r | |
2519 | IN INT64 Divisor,\r | |
2520 | OUT INT64 *Remainder OPTIONAL\r | |
2521 | );\r | |
2522 | \r | |
2523 | \r | |
2524 | /**\r | |
2525 | Reads a 16-bit value from memory that may be unaligned.\r | |
2526 | \r | |
2527 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
2528 | guarantees that the read operation does not produce an alignment fault.\r | |
2529 | \r | |
2530 | If the Buffer is NULL, then ASSERT().\r | |
2531 | \r | |
af2dc6a7 | 2532 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2533 | \r |
5385a579 | 2534 | @return The 16-bit value read from Buffer.\r |
ac644614 | 2535 | \r |
2536 | **/\r | |
2537 | UINT16\r | |
2538 | EFIAPI\r | |
2539 | ReadUnaligned16 (\r | |
5385a579 | 2540 | IN CONST UINT16 *Buffer\r |
ac644614 | 2541 | );\r |
2542 | \r | |
2543 | \r | |
2544 | /**\r | |
2545 | Writes a 16-bit value to memory that may be unaligned.\r | |
2546 | \r | |
2547 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
2548 | returned. The function guarantees that the write operation does not produce\r | |
2549 | an alignment fault.\r | |
2550 | \r | |
2551 | If the Buffer is NULL, then ASSERT().\r | |
2552 | \r | |
af2dc6a7 | 2553 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2554 | @param Value 16-bit value to write to Buffer.\r |
2555 | \r | |
5385a579 | 2556 | @return The 16-bit value to write to Buffer.\r |
ac644614 | 2557 | \r |
2558 | **/\r | |
2559 | UINT16\r | |
2560 | EFIAPI\r | |
2561 | WriteUnaligned16 (\r | |
5385a579 | 2562 | OUT UINT16 *Buffer,\r |
2563 | IN UINT16 Value\r | |
ac644614 | 2564 | );\r |
2565 | \r | |
2566 | \r | |
2567 | /**\r | |
2568 | Reads a 24-bit value from memory that may be unaligned.\r | |
2569 | \r | |
2570 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
2571 | guarantees that the read operation does not produce an alignment fault.\r | |
2572 | \r | |
2573 | If the Buffer is NULL, then ASSERT().\r | |
2574 | \r | |
af2dc6a7 | 2575 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2576 | \r |
5385a579 | 2577 | @return The 24-bit value read from Buffer.\r |
ac644614 | 2578 | \r |
2579 | **/\r | |
2580 | UINT32\r | |
2581 | EFIAPI\r | |
2582 | ReadUnaligned24 (\r | |
5385a579 | 2583 | IN CONST UINT32 *Buffer\r |
ac644614 | 2584 | );\r |
2585 | \r | |
2586 | \r | |
2587 | /**\r | |
2588 | Writes a 24-bit value to memory that may be unaligned.\r | |
2589 | \r | |
2590 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
2591 | returned. The function guarantees that the write operation does not produce\r | |
2592 | an alignment fault.\r | |
2593 | \r | |
2594 | If the Buffer is NULL, then ASSERT().\r | |
2595 | \r | |
af2dc6a7 | 2596 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2597 | @param Value 24-bit value to write to Buffer.\r |
2598 | \r | |
5385a579 | 2599 | @return The 24-bit value to write to Buffer.\r |
ac644614 | 2600 | \r |
2601 | **/\r | |
2602 | UINT32\r | |
2603 | EFIAPI\r | |
2604 | WriteUnaligned24 (\r | |
5385a579 | 2605 | OUT UINT32 *Buffer,\r |
2606 | IN UINT32 Value\r | |
ac644614 | 2607 | );\r |
2608 | \r | |
2609 | \r | |
2610 | /**\r | |
2611 | Reads a 32-bit value from memory that may be unaligned.\r | |
2612 | \r | |
2613 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
2614 | guarantees that the read operation does not produce an alignment fault.\r | |
2615 | \r | |
2616 | If the Buffer is NULL, then ASSERT().\r | |
2617 | \r | |
af2dc6a7 | 2618 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2619 | \r |
5385a579 | 2620 | @return The 32-bit value read from Buffer.\r |
ac644614 | 2621 | \r |
2622 | **/\r | |
2623 | UINT32\r | |
2624 | EFIAPI\r | |
2625 | ReadUnaligned32 (\r | |
5385a579 | 2626 | IN CONST UINT32 *Buffer\r |
ac644614 | 2627 | );\r |
2628 | \r | |
2629 | \r | |
2630 | /**\r | |
2631 | Writes a 32-bit value to memory that may be unaligned.\r | |
2632 | \r | |
2633 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
2634 | returned. The function guarantees that the write operation does not produce\r | |
2635 | an alignment fault.\r | |
2636 | \r | |
2637 | If the Buffer is NULL, then ASSERT().\r | |
2638 | \r | |
af2dc6a7 | 2639 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2640 | @param Value 32-bit value to write to Buffer.\r |
2641 | \r | |
5385a579 | 2642 | @return The 32-bit value to write to Buffer.\r |
ac644614 | 2643 | \r |
2644 | **/\r | |
2645 | UINT32\r | |
2646 | EFIAPI\r | |
2647 | WriteUnaligned32 (\r | |
5385a579 | 2648 | OUT UINT32 *Buffer,\r |
2649 | IN UINT32 Value\r | |
ac644614 | 2650 | );\r |
2651 | \r | |
2652 | \r | |
2653 | /**\r | |
2654 | Reads a 64-bit value from memory that may be unaligned.\r | |
2655 | \r | |
2656 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
2657 | guarantees that the read operation does not produce an alignment fault.\r | |
2658 | \r | |
2659 | If the Buffer is NULL, then ASSERT().\r | |
2660 | \r | |
af2dc6a7 | 2661 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2662 | \r |
5385a579 | 2663 | @return The 64-bit value read from Buffer.\r |
ac644614 | 2664 | \r |
2665 | **/\r | |
2666 | UINT64\r | |
2667 | EFIAPI\r | |
2668 | ReadUnaligned64 (\r | |
5385a579 | 2669 | IN CONST UINT64 *Buffer\r |
ac644614 | 2670 | );\r |
2671 | \r | |
2672 | \r | |
2673 | /**\r | |
2674 | Writes a 64-bit value to memory that may be unaligned.\r | |
2675 | \r | |
2676 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
2677 | returned. The function guarantees that the write operation does not produce\r | |
2678 | an alignment fault.\r | |
2679 | \r | |
2680 | If the Buffer is NULL, then ASSERT().\r | |
2681 | \r | |
af2dc6a7 | 2682 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2683 | @param Value 64-bit value to write to Buffer.\r |
2684 | \r | |
5385a579 | 2685 | @return The 64-bit value to write to Buffer.\r |
ac644614 | 2686 | \r |
2687 | **/\r | |
2688 | UINT64\r | |
2689 | EFIAPI\r | |
2690 | WriteUnaligned64 (\r | |
5385a579 | 2691 | OUT UINT64 *Buffer,\r |
2692 | IN UINT64 Value\r | |
ac644614 | 2693 | );\r |
2694 | \r | |
2695 | \r | |
2696 | //\r | |
2697 | // Bit Field Functions\r | |
2698 | //\r | |
2699 | \r | |
2700 | /**\r | |
2701 | Returns a bit field from an 8-bit value.\r | |
2702 | \r | |
2703 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2704 | \r | |
2705 | If 8-bit operations are not supported, then ASSERT().\r | |
2706 | If StartBit is greater than 7, then ASSERT().\r | |
2707 | If EndBit is greater than 7, then ASSERT().\r | |
2708 | If EndBit is less than StartBit, then ASSERT().\r | |
2709 | \r | |
2710 | @param Operand Operand on which to perform the bitfield operation.\r | |
2711 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2712 | Range 0..7.\r | |
2713 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2714 | Range 0..7.\r | |
2715 | \r | |
2716 | @return The bit field read.\r | |
2717 | \r | |
2718 | **/\r | |
2719 | UINT8\r | |
2720 | EFIAPI\r | |
2721 | BitFieldRead8 (\r | |
2722 | IN UINT8 Operand,\r | |
2723 | IN UINTN StartBit,\r | |
2724 | IN UINTN EndBit\r | |
2725 | );\r | |
2726 | \r | |
2727 | \r | |
2728 | /**\r | |
2729 | Writes a bit field to an 8-bit value, and returns the result.\r | |
2730 | \r | |
2731 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2732 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
2733 | returned.\r | |
2734 | \r | |
2735 | If 8-bit operations are not supported, then ASSERT().\r | |
2736 | If StartBit is greater than 7, then ASSERT().\r | |
2737 | If EndBit is greater than 7, then ASSERT().\r | |
2738 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2739 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2740 | \r |
2741 | @param Operand Operand on which to perform the bitfield operation.\r | |
2742 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2743 | Range 0..7.\r | |
2744 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2745 | Range 0..7.\r | |
2746 | @param Value New value of the bit field.\r | |
2747 | \r | |
2748 | @return The new 8-bit value.\r | |
2749 | \r | |
2750 | **/\r | |
2751 | UINT8\r | |
2752 | EFIAPI\r | |
2753 | BitFieldWrite8 (\r | |
2754 | IN UINT8 Operand,\r | |
2755 | IN UINTN StartBit,\r | |
2756 | IN UINTN EndBit,\r | |
2757 | IN UINT8 Value\r | |
2758 | );\r | |
2759 | \r | |
2760 | \r | |
2761 | /**\r | |
2762 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
2763 | result.\r | |
2764 | \r | |
62991af2 | 2765 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2766 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2767 | Operand are preserved. The new 8-bit value is returned.\r | |
2768 | \r | |
2769 | If 8-bit operations are not supported, then ASSERT().\r | |
2770 | If StartBit is greater than 7, then ASSERT().\r | |
2771 | If EndBit is greater than 7, then ASSERT().\r | |
2772 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2773 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2774 | \r |
2775 | @param Operand Operand on which to perform the bitfield operation.\r | |
2776 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2777 | Range 0..7.\r | |
2778 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2779 | Range 0..7.\r | |
2780 | @param OrData The value to OR with the read value from the value\r | |
2781 | \r | |
2782 | @return The new 8-bit value.\r | |
2783 | \r | |
2784 | **/\r | |
2785 | UINT8\r | |
2786 | EFIAPI\r | |
2787 | BitFieldOr8 (\r | |
2788 | IN UINT8 Operand,\r | |
2789 | IN UINTN StartBit,\r | |
2790 | IN UINTN EndBit,\r | |
2791 | IN UINT8 OrData\r | |
2792 | );\r | |
2793 | \r | |
2794 | \r | |
2795 | /**\r | |
2796 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
2797 | the result.\r | |
2798 | \r | |
2799 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2800 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2801 | preserved. The new 8-bit value is returned.\r | |
2802 | \r | |
2803 | If 8-bit operations are not supported, then ASSERT().\r | |
2804 | If StartBit is greater than 7, then ASSERT().\r | |
2805 | If EndBit is greater than 7, then ASSERT().\r | |
2806 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2807 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2808 | \r |
2809 | @param Operand Operand on which to perform the bitfield operation.\r | |
2810 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2811 | Range 0..7.\r | |
2812 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2813 | Range 0..7.\r | |
2814 | @param AndData The value to AND with the read value from the value.\r | |
2815 | \r | |
2816 | @return The new 8-bit value.\r | |
2817 | \r | |
2818 | **/\r | |
2819 | UINT8\r | |
2820 | EFIAPI\r | |
2821 | BitFieldAnd8 (\r | |
2822 | IN UINT8 Operand,\r | |
2823 | IN UINTN StartBit,\r | |
2824 | IN UINTN EndBit,\r | |
2825 | IN UINT8 AndData\r | |
2826 | );\r | |
2827 | \r | |
2828 | \r | |
2829 | /**\r | |
2830 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
2831 | bitwise OR, and returns the result.\r | |
2832 | \r | |
2833 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2834 | in Operand and the value specified by AndData, followed by a bitwise \r |
2835 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2836 | preserved. The new 8-bit value is returned.\r |
2837 | \r | |
2838 | If 8-bit operations are not supported, then ASSERT().\r | |
2839 | If StartBit is greater than 7, then ASSERT().\r | |
2840 | If EndBit is greater than 7, then ASSERT().\r | |
2841 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
2842 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
2843 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 2844 | \r |
2845 | @param Operand Operand on which to perform the bitfield operation.\r | |
2846 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2847 | Range 0..7.\r | |
2848 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2849 | Range 0..7.\r | |
2850 | @param AndData The value to AND with the read value from the value.\r | |
2851 | @param OrData The value to OR with the result of the AND operation.\r | |
2852 | \r | |
2853 | @return The new 8-bit value.\r | |
2854 | \r | |
2855 | **/\r | |
2856 | UINT8\r | |
2857 | EFIAPI\r | |
2858 | BitFieldAndThenOr8 (\r | |
2859 | IN UINT8 Operand,\r | |
2860 | IN UINTN StartBit,\r | |
2861 | IN UINTN EndBit,\r | |
2862 | IN UINT8 AndData,\r | |
2863 | IN UINT8 OrData\r | |
2864 | );\r | |
2865 | \r | |
2866 | \r | |
2867 | /**\r | |
2868 | Returns a bit field from a 16-bit value.\r | |
2869 | \r | |
2870 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2871 | \r | |
2872 | If 16-bit operations are not supported, then ASSERT().\r | |
2873 | If StartBit is greater than 15, then ASSERT().\r | |
2874 | If EndBit is greater than 15, then ASSERT().\r | |
2875 | If EndBit is less than StartBit, then ASSERT().\r | |
2876 | \r | |
2877 | @param Operand Operand on which to perform the bitfield operation.\r | |
2878 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2879 | Range 0..15.\r | |
2880 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2881 | Range 0..15.\r | |
2882 | \r | |
2883 | @return The bit field read.\r | |
2884 | \r | |
2885 | **/\r | |
2886 | UINT16\r | |
2887 | EFIAPI\r | |
2888 | BitFieldRead16 (\r | |
2889 | IN UINT16 Operand,\r | |
2890 | IN UINTN StartBit,\r | |
2891 | IN UINTN EndBit\r | |
2892 | );\r | |
2893 | \r | |
2894 | \r | |
2895 | /**\r | |
2896 | Writes a bit field to a 16-bit value, and returns the result.\r | |
2897 | \r | |
2898 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2899 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
2900 | returned.\r | |
2901 | \r | |
2902 | If 16-bit operations are not supported, then ASSERT().\r | |
2903 | If StartBit is greater than 15, then ASSERT().\r | |
2904 | If EndBit is greater than 15, then ASSERT().\r | |
2905 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2906 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2907 | \r |
2908 | @param Operand Operand on which to perform the bitfield operation.\r | |
2909 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2910 | Range 0..15.\r | |
2911 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2912 | Range 0..15.\r | |
2913 | @param Value New value of the bit field.\r | |
2914 | \r | |
2915 | @return The new 16-bit value.\r | |
2916 | \r | |
2917 | **/\r | |
2918 | UINT16\r | |
2919 | EFIAPI\r | |
2920 | BitFieldWrite16 (\r | |
2921 | IN UINT16 Operand,\r | |
2922 | IN UINTN StartBit,\r | |
2923 | IN UINTN EndBit,\r | |
2924 | IN UINT16 Value\r | |
2925 | );\r | |
2926 | \r | |
2927 | \r | |
2928 | /**\r | |
2929 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
2930 | result.\r | |
2931 | \r | |
62991af2 | 2932 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2933 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2934 | Operand are preserved. The new 16-bit value is returned.\r | |
2935 | \r | |
2936 | If 16-bit operations are not supported, then ASSERT().\r | |
2937 | If StartBit is greater than 15, then ASSERT().\r | |
2938 | If EndBit is greater than 15, then ASSERT().\r | |
2939 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2940 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2941 | \r |
2942 | @param Operand Operand on which to perform the bitfield operation.\r | |
2943 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2944 | Range 0..15.\r | |
2945 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2946 | Range 0..15.\r | |
2947 | @param OrData The value to OR with the read value from the value\r | |
2948 | \r | |
2949 | @return The new 16-bit value.\r | |
2950 | \r | |
2951 | **/\r | |
2952 | UINT16\r | |
2953 | EFIAPI\r | |
2954 | BitFieldOr16 (\r | |
2955 | IN UINT16 Operand,\r | |
2956 | IN UINTN StartBit,\r | |
2957 | IN UINTN EndBit,\r | |
2958 | IN UINT16 OrData\r | |
2959 | );\r | |
2960 | \r | |
2961 | \r | |
2962 | /**\r | |
2963 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
2964 | the result.\r | |
2965 | \r | |
2966 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2967 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2968 | preserved. The new 16-bit value is returned.\r | |
2969 | \r | |
2970 | If 16-bit operations are not supported, then ASSERT().\r | |
2971 | If StartBit is greater than 15, then ASSERT().\r | |
2972 | If EndBit is greater than 15, then ASSERT().\r | |
2973 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2974 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2975 | \r |
2976 | @param Operand Operand on which to perform the bitfield operation.\r | |
2977 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2978 | Range 0..15.\r | |
2979 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2980 | Range 0..15.\r | |
2981 | @param AndData The value to AND with the read value from the value\r | |
2982 | \r | |
2983 | @return The new 16-bit value.\r | |
2984 | \r | |
2985 | **/\r | |
2986 | UINT16\r | |
2987 | EFIAPI\r | |
2988 | BitFieldAnd16 (\r | |
2989 | IN UINT16 Operand,\r | |
2990 | IN UINTN StartBit,\r | |
2991 | IN UINTN EndBit,\r | |
2992 | IN UINT16 AndData\r | |
2993 | );\r | |
2994 | \r | |
2995 | \r | |
2996 | /**\r | |
2997 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
2998 | bitwise OR, and returns the result.\r | |
2999 | \r | |
3000 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 3001 | in Operand and the value specified by AndData, followed by a bitwise \r |
3002 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 3003 | preserved. The new 16-bit value is returned.\r |
3004 | \r | |
3005 | If 16-bit operations are not supported, then ASSERT().\r | |
3006 | If StartBit is greater than 15, then ASSERT().\r | |
3007 | If EndBit is greater than 15, then ASSERT().\r | |
3008 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
3009 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
3010 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 3011 | \r |
3012 | @param Operand Operand on which to perform the bitfield operation.\r | |
3013 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3014 | Range 0..15.\r | |
3015 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3016 | Range 0..15.\r | |
3017 | @param AndData The value to AND with the read value from the value.\r | |
3018 | @param OrData The value to OR with the result of the AND operation.\r | |
3019 | \r | |
3020 | @return The new 16-bit value.\r | |
3021 | \r | |
3022 | **/\r | |
3023 | UINT16\r | |
3024 | EFIAPI\r | |
3025 | BitFieldAndThenOr16 (\r | |
3026 | IN UINT16 Operand,\r | |
3027 | IN UINTN StartBit,\r | |
3028 | IN UINTN EndBit,\r | |
3029 | IN UINT16 AndData,\r | |
3030 | IN UINT16 OrData\r | |
3031 | );\r | |
3032 | \r | |
3033 | \r | |
3034 | /**\r | |
3035 | Returns a bit field from a 32-bit value.\r | |
3036 | \r | |
3037 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
3038 | \r | |
3039 | If 32-bit operations are not supported, then ASSERT().\r | |
3040 | If StartBit is greater than 31, then ASSERT().\r | |
3041 | If EndBit is greater than 31, then ASSERT().\r | |
3042 | If EndBit is less than StartBit, then ASSERT().\r | |
3043 | \r | |
3044 | @param Operand Operand on which to perform the bitfield operation.\r | |
3045 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3046 | Range 0..31.\r | |
3047 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3048 | Range 0..31.\r | |
3049 | \r | |
3050 | @return The bit field read.\r | |
3051 | \r | |
3052 | **/\r | |
3053 | UINT32\r | |
3054 | EFIAPI\r | |
3055 | BitFieldRead32 (\r | |
3056 | IN UINT32 Operand,\r | |
3057 | IN UINTN StartBit,\r | |
3058 | IN UINTN EndBit\r | |
3059 | );\r | |
3060 | \r | |
3061 | \r | |
3062 | /**\r | |
3063 | Writes a bit field to a 32-bit value, and returns the result.\r | |
3064 | \r | |
3065 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
3066 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
3067 | returned.\r | |
3068 | \r | |
3069 | If 32-bit operations are not supported, then ASSERT().\r | |
3070 | If StartBit is greater than 31, then ASSERT().\r | |
3071 | If EndBit is greater than 31, then ASSERT().\r | |
3072 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3073 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3074 | \r |
3075 | @param Operand Operand on which to perform the bitfield operation.\r | |
3076 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3077 | Range 0..31.\r | |
3078 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3079 | Range 0..31.\r | |
3080 | @param Value New value of the bit field.\r | |
3081 | \r | |
3082 | @return The new 32-bit value.\r | |
3083 | \r | |
3084 | **/\r | |
3085 | UINT32\r | |
3086 | EFIAPI\r | |
3087 | BitFieldWrite32 (\r | |
3088 | IN UINT32 Operand,\r | |
3089 | IN UINTN StartBit,\r | |
3090 | IN UINTN EndBit,\r | |
3091 | IN UINT32 Value\r | |
3092 | );\r | |
3093 | \r | |
3094 | \r | |
3095 | /**\r | |
3096 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
3097 | result.\r | |
3098 | \r | |
62991af2 | 3099 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 3100 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
3101 | Operand are preserved. The new 32-bit value is returned.\r | |
3102 | \r | |
3103 | If 32-bit operations are not supported, then ASSERT().\r | |
3104 | If StartBit is greater than 31, then ASSERT().\r | |
3105 | If EndBit is greater than 31, then ASSERT().\r | |
3106 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3107 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3108 | \r |
3109 | @param Operand Operand on which to perform the bitfield operation.\r | |
3110 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3111 | Range 0..31.\r | |
3112 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3113 | Range 0..31.\r | |
af2dc6a7 | 3114 | @param OrData The value to OR with the read value from the value.\r |
ac644614 | 3115 | \r |
3116 | @return The new 32-bit value.\r | |
3117 | \r | |
3118 | **/\r | |
3119 | UINT32\r | |
3120 | EFIAPI\r | |
3121 | BitFieldOr32 (\r | |
3122 | IN UINT32 Operand,\r | |
3123 | IN UINTN StartBit,\r | |
3124 | IN UINTN EndBit,\r | |
3125 | IN UINT32 OrData\r | |
3126 | );\r | |
3127 | \r | |
3128 | \r | |
3129 | /**\r | |
3130 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
3131 | the result.\r | |
3132 | \r | |
3133 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
3134 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
3135 | preserved. The new 32-bit value is returned.\r | |
3136 | \r | |
3137 | If 32-bit operations are not supported, then ASSERT().\r | |
3138 | If StartBit is greater than 31, then ASSERT().\r | |
3139 | If EndBit is greater than 31, then ASSERT().\r | |
3140 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3141 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3142 | \r |
3143 | @param Operand Operand on which to perform the bitfield operation.\r | |
3144 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3145 | Range 0..31.\r | |
3146 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3147 | Range 0..31.\r | |
3148 | @param AndData The value to AND with the read value from the value\r | |
3149 | \r | |
3150 | @return The new 32-bit value.\r | |
3151 | \r | |
3152 | **/\r | |
3153 | UINT32\r | |
3154 | EFIAPI\r | |
3155 | BitFieldAnd32 (\r | |
3156 | IN UINT32 Operand,\r | |
3157 | IN UINTN StartBit,\r | |
3158 | IN UINTN EndBit,\r | |
3159 | IN UINT32 AndData\r | |
3160 | );\r | |
3161 | \r | |
3162 | \r | |
3163 | /**\r | |
3164 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
3165 | bitwise OR, and returns the result.\r | |
3166 | \r | |
3167 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 3168 | in Operand and the value specified by AndData, followed by a bitwise \r |
3169 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 3170 | preserved. The new 32-bit value is returned.\r |
3171 | \r | |
3172 | If 32-bit operations are not supported, then ASSERT().\r | |
3173 | If StartBit is greater than 31, then ASSERT().\r | |
3174 | If EndBit is greater than 31, then ASSERT().\r | |
3175 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
3176 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
3177 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 3178 | \r |
3179 | @param Operand Operand on which to perform the bitfield operation.\r | |
3180 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3181 | Range 0..31.\r | |
3182 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3183 | Range 0..31.\r | |
3184 | @param AndData The value to AND with the read value from the value.\r | |
3185 | @param OrData The value to OR with the result of the AND operation.\r | |
3186 | \r | |
3187 | @return The new 32-bit value.\r | |
3188 | \r | |
3189 | **/\r | |
3190 | UINT32\r | |
3191 | EFIAPI\r | |
3192 | BitFieldAndThenOr32 (\r | |
3193 | IN UINT32 Operand,\r | |
3194 | IN UINTN StartBit,\r | |
3195 | IN UINTN EndBit,\r | |
3196 | IN UINT32 AndData,\r | |
3197 | IN UINT32 OrData\r | |
3198 | );\r | |
3199 | \r | |
3200 | \r | |
3201 | /**\r | |
3202 | Returns a bit field from a 64-bit value.\r | |
3203 | \r | |
3204 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
3205 | \r | |
3206 | If 64-bit operations are not supported, then ASSERT().\r | |
3207 | If StartBit is greater than 63, then ASSERT().\r | |
3208 | If EndBit is greater than 63, then ASSERT().\r | |
3209 | If EndBit is less than StartBit, then ASSERT().\r | |
3210 | \r | |
3211 | @param Operand Operand on which to perform the bitfield operation.\r | |
3212 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3213 | Range 0..63.\r | |
3214 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3215 | Range 0..63.\r | |
3216 | \r | |
3217 | @return The bit field read.\r | |
3218 | \r | |
3219 | **/\r | |
3220 | UINT64\r | |
3221 | EFIAPI\r | |
3222 | BitFieldRead64 (\r | |
3223 | IN UINT64 Operand,\r | |
3224 | IN UINTN StartBit,\r | |
3225 | IN UINTN EndBit\r | |
3226 | );\r | |
3227 | \r | |
3228 | \r | |
3229 | /**\r | |
3230 | Writes a bit field to a 64-bit value, and returns the result.\r | |
3231 | \r | |
3232 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
3233 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
3234 | returned.\r | |
3235 | \r | |
3236 | If 64-bit operations are not supported, then ASSERT().\r | |
3237 | If StartBit is greater than 63, then ASSERT().\r | |
3238 | If EndBit is greater than 63, then ASSERT().\r | |
3239 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3240 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3241 | \r |
3242 | @param Operand Operand on which to perform the bitfield operation.\r | |
3243 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3244 | Range 0..63.\r | |
3245 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3246 | Range 0..63.\r | |
3247 | @param Value New value of the bit field.\r | |
3248 | \r | |
3249 | @return The new 64-bit value.\r | |
3250 | \r | |
3251 | **/\r | |
3252 | UINT64\r | |
3253 | EFIAPI\r | |
3254 | BitFieldWrite64 (\r | |
3255 | IN UINT64 Operand,\r | |
3256 | IN UINTN StartBit,\r | |
3257 | IN UINTN EndBit,\r | |
3258 | IN UINT64 Value\r | |
3259 | );\r | |
3260 | \r | |
3261 | \r | |
3262 | /**\r | |
3263 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
3264 | result.\r | |
3265 | \r | |
62991af2 | 3266 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 3267 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
3268 | Operand are preserved. The new 64-bit value is returned.\r | |
3269 | \r | |
3270 | If 64-bit operations are not supported, then ASSERT().\r | |
3271 | If StartBit is greater than 63, then ASSERT().\r | |
3272 | If EndBit is greater than 63, then ASSERT().\r | |
3273 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3274 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3275 | \r |
3276 | @param Operand Operand on which to perform the bitfield operation.\r | |
3277 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3278 | Range 0..63.\r | |
3279 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3280 | Range 0..63.\r | |
3281 | @param OrData The value to OR with the read value from the value\r | |
3282 | \r | |
3283 | @return The new 64-bit value.\r | |
3284 | \r | |
3285 | **/\r | |
3286 | UINT64\r | |
3287 | EFIAPI\r | |
3288 | BitFieldOr64 (\r | |
3289 | IN UINT64 Operand,\r | |
3290 | IN UINTN StartBit,\r | |
3291 | IN UINTN EndBit,\r | |
3292 | IN UINT64 OrData\r | |
3293 | );\r | |
3294 | \r | |
3295 | \r | |
3296 | /**\r | |
3297 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
3298 | the result.\r | |
3299 | \r | |
3300 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
3301 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
3302 | preserved. The new 64-bit value is returned.\r | |
3303 | \r | |
3304 | If 64-bit operations are not supported, then ASSERT().\r | |
3305 | If StartBit is greater than 63, then ASSERT().\r | |
3306 | If EndBit is greater than 63, then ASSERT().\r | |
3307 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3308 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3309 | \r |
3310 | @param Operand Operand on which to perform the bitfield operation.\r | |
3311 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3312 | Range 0..63.\r | |
3313 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3314 | Range 0..63.\r | |
3315 | @param AndData The value to AND with the read value from the value\r | |
3316 | \r | |
3317 | @return The new 64-bit value.\r | |
3318 | \r | |
3319 | **/\r | |
3320 | UINT64\r | |
3321 | EFIAPI\r | |
3322 | BitFieldAnd64 (\r | |
3323 | IN UINT64 Operand,\r | |
3324 | IN UINTN StartBit,\r | |
3325 | IN UINTN EndBit,\r | |
3326 | IN UINT64 AndData\r | |
3327 | );\r | |
3328 | \r | |
3329 | \r | |
3330 | /**\r | |
3331 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
3332 | bitwise OR, and returns the result.\r | |
3333 | \r | |
3334 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 3335 | in Operand and the value specified by AndData, followed by a bitwise \r |
3336 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 3337 | preserved. The new 64-bit value is returned.\r |
3338 | \r | |
3339 | If 64-bit operations are not supported, then ASSERT().\r | |
3340 | If StartBit is greater than 63, then ASSERT().\r | |
3341 | If EndBit is greater than 63, then ASSERT().\r | |
3342 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
3343 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
3344 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 3345 | \r |
3346 | @param Operand Operand on which to perform the bitfield operation.\r | |
3347 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3348 | Range 0..63.\r | |
3349 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3350 | Range 0..63.\r | |
3351 | @param AndData The value to AND with the read value from the value.\r | |
3352 | @param OrData The value to OR with the result of the AND operation.\r | |
3353 | \r | |
3354 | @return The new 64-bit value.\r | |
3355 | \r | |
3356 | **/\r | |
3357 | UINT64\r | |
3358 | EFIAPI\r | |
3359 | BitFieldAndThenOr64 (\r | |
3360 | IN UINT64 Operand,\r | |
3361 | IN UINTN StartBit,\r | |
3362 | IN UINTN EndBit,\r | |
3363 | IN UINT64 AndData,\r | |
3364 | IN UINT64 OrData\r | |
3365 | );\r | |
3366 | \r | |
ac644614 | 3367 | //\r |
3368 | // Base Library Checksum Functions\r | |
3369 | //\r | |
3370 | \r | |
3371 | /**\r | |
17f695ed | 3372 | Returns the sum of all elements in a buffer in unit of UINT8.\r |
ac644614 | 3373 | During calculation, the carry bits are dropped.\r |
3374 | \r | |
3375 | This function calculates the sum of all elements in a buffer\r | |
3376 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
3377 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
3378 | returned.\r | |
3379 | \r | |
3380 | If Buffer is NULL, then ASSERT().\r | |
3381 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3382 | \r | |
af2dc6a7 | 3383 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
17f695ed | 3384 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3385 | \r |
3386 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3387 | \r | |
3388 | **/\r | |
3389 | UINT8\r | |
3390 | EFIAPI\r | |
3391 | CalculateSum8 (\r | |
ee6c452c | 3392 | IN CONST UINT8 *Buffer,\r |
3393 | IN UINTN Length\r | |
ac644614 | 3394 | );\r |
3395 | \r | |
3396 | \r | |
3397 | /**\r | |
3398 | Returns the two's complement checksum of all elements in a buffer\r | |
3399 | of 8-bit values.\r | |
3400 | \r | |
3401 | This function first calculates the sum of the 8-bit values in the\r | |
3402 | buffer specified by Buffer and Length. The carry bits in the result\r | |
3403 | of addition are dropped. Then, the two's complement of the sum is\r | |
3404 | returned. If Length is 0, then 0 is returned.\r | |
3405 | \r | |
3406 | If Buffer is NULL, then ASSERT().\r | |
3407 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3408 | \r | |
af2dc6a7 | 3409 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3410 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3411 | \r |
af2dc6a7 | 3412 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3413 | \r |
3414 | **/\r | |
3415 | UINT8\r | |
3416 | EFIAPI\r | |
3417 | CalculateCheckSum8 (\r | |
ee6c452c | 3418 | IN CONST UINT8 *Buffer,\r |
3419 | IN UINTN Length\r | |
ac644614 | 3420 | );\r |
3421 | \r | |
3422 | \r | |
3423 | /**\r | |
3424 | Returns the sum of all elements in a buffer of 16-bit values. During\r | |
3425 | calculation, the carry bits are dropped.\r | |
3426 | \r | |
3427 | This function calculates the sum of the 16-bit values in the buffer\r | |
3428 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3429 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
3430 | \r | |
3431 | If Buffer is NULL, then ASSERT().\r | |
3432 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3433 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3434 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3435 | \r | |
af2dc6a7 | 3436 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3437 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3438 | \r |
3439 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3440 | \r | |
3441 | **/\r | |
3442 | UINT16\r | |
3443 | EFIAPI\r | |
3444 | CalculateSum16 (\r | |
ee6c452c | 3445 | IN CONST UINT16 *Buffer,\r |
3446 | IN UINTN Length\r | |
ac644614 | 3447 | );\r |
3448 | \r | |
3449 | \r | |
3450 | /**\r | |
3451 | Returns the two's complement checksum of all elements in a buffer of\r | |
3452 | 16-bit values.\r | |
3453 | \r | |
3454 | This function first calculates the sum of the 16-bit values in the buffer\r | |
3455 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3456 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3457 | is 0, then 0 is returned.\r | |
3458 | \r | |
3459 | If Buffer is NULL, then ASSERT().\r | |
3460 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3461 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3462 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3463 | \r | |
af2dc6a7 | 3464 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3465 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3466 | \r |
af2dc6a7 | 3467 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3468 | \r |
3469 | **/\r | |
3470 | UINT16\r | |
3471 | EFIAPI\r | |
3472 | CalculateCheckSum16 (\r | |
ee6c452c | 3473 | IN CONST UINT16 *Buffer,\r |
3474 | IN UINTN Length\r | |
ac644614 | 3475 | );\r |
3476 | \r | |
3477 | \r | |
3478 | /**\r | |
17f695ed | 3479 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
ac644614 | 3480 | calculation, the carry bits are dropped.\r |
3481 | \r | |
3482 | This function calculates the sum of the 32-bit values in the buffer\r | |
3483 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
17f695ed | 3484 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r |
ac644614 | 3485 | \r |
3486 | If Buffer is NULL, then ASSERT().\r | |
3487 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3488 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3489 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3490 | \r | |
af2dc6a7 | 3491 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3492 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3493 | \r |
3494 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3495 | \r | |
3496 | **/\r | |
3497 | UINT32\r | |
3498 | EFIAPI\r | |
3499 | CalculateSum32 (\r | |
ee6c452c | 3500 | IN CONST UINT32 *Buffer,\r |
3501 | IN UINTN Length\r | |
ac644614 | 3502 | );\r |
3503 | \r | |
3504 | \r | |
3505 | /**\r | |
3506 | Returns the two's complement checksum of all elements in a buffer of\r | |
3507 | 32-bit values.\r | |
3508 | \r | |
3509 | This function first calculates the sum of the 32-bit values in the buffer\r | |
3510 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3511 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3512 | is 0, then 0 is returned.\r | |
3513 | \r | |
3514 | If Buffer is NULL, then ASSERT().\r | |
3515 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3516 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3517 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3518 | \r | |
af2dc6a7 | 3519 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3520 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3521 | \r |
af2dc6a7 | 3522 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3523 | \r |
3524 | **/\r | |
3525 | UINT32\r | |
3526 | EFIAPI\r | |
3527 | CalculateCheckSum32 (\r | |
ee6c452c | 3528 | IN CONST UINT32 *Buffer,\r |
3529 | IN UINTN Length\r | |
ac644614 | 3530 | );\r |
3531 | \r | |
3532 | \r | |
3533 | /**\r | |
3534 | Returns the sum of all elements in a buffer of 64-bit values. During\r | |
3535 | calculation, the carry bits are dropped.\r | |
3536 | \r | |
3537 | This function calculates the sum of the 64-bit values in the buffer\r | |
3538 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3539 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
3540 | \r | |
3541 | If Buffer is NULL, then ASSERT().\r | |
3542 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3543 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3544 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3545 | \r | |
af2dc6a7 | 3546 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3547 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3548 | \r |
3549 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3550 | \r | |
3551 | **/\r | |
3552 | UINT64\r | |
3553 | EFIAPI\r | |
3554 | CalculateSum64 (\r | |
ee6c452c | 3555 | IN CONST UINT64 *Buffer,\r |
3556 | IN UINTN Length\r | |
ac644614 | 3557 | );\r |
3558 | \r | |
3559 | \r | |
3560 | /**\r | |
3561 | Returns the two's complement checksum of all elements in a buffer of\r | |
3562 | 64-bit values.\r | |
3563 | \r | |
3564 | This function first calculates the sum of the 64-bit values in the buffer\r | |
3565 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3566 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3567 | is 0, then 0 is returned.\r | |
3568 | \r | |
3569 | If Buffer is NULL, then ASSERT().\r | |
3570 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3571 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3572 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3573 | \r | |
af2dc6a7 | 3574 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3575 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3576 | \r |
af2dc6a7 | 3577 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3578 | \r |
3579 | **/\r | |
3580 | UINT64\r | |
3581 | EFIAPI\r | |
3582 | CalculateCheckSum64 (\r | |
ee6c452c | 3583 | IN CONST UINT64 *Buffer,\r |
3584 | IN UINTN Length\r | |
ac644614 | 3585 | );\r |
3586 | \r | |
3587 | \r | |
d75f9fc2 | 3588 | //\r |
3589 | // Base Library CPU Functions\r | |
3590 | //\r | |
3591 | \r | |
3592 | /**\r | |
3593 | Function entry point used when a stack switch is requested with SwitchStack()\r | |
3594 | \r | |
3595 | @param Context1 Context1 parameter passed into SwitchStack().\r | |
3596 | @param Context2 Context2 parameter passed into SwitchStack().\r | |
3597 | \r | |
3598 | **/\r | |
ac644614 | 3599 | typedef\r |
3600 | VOID\r | |
9810cdd8 | 3601 | (EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r |
ac644614 | 3602 | IN VOID *Context1, OPTIONAL\r |
3603 | IN VOID *Context2 OPTIONAL\r | |
3604 | );\r | |
3605 | \r | |
3606 | \r | |
3607 | /**\r | |
3608 | Used to serialize load and store operations.\r | |
3609 | \r | |
3610 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
3611 | globally visible when this function returns.\r | |
3612 | \r | |
3613 | **/\r | |
3614 | VOID\r | |
3615 | EFIAPI\r | |
3616 | MemoryFence (\r | |
3617 | VOID\r | |
3618 | );\r | |
3619 | \r | |
3620 | \r | |
3621 | /**\r | |
3622 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
3623 | and returns 0.\r | |
3624 | \r | |
3625 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
3626 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
3627 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
3628 | \r | |
3629 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3630 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
17f695ed | 3631 | \r |
3632 | NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r | |
3633 | The same structure must never be used for more than one CPU architecture context.\r | |
3634 | For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r | |
3635 | SetJump()/LongJump() is not currently supported for the EBC processor type. \r | |
ac644614 | 3636 | \r |
3637 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3638 | \r | |
3639 | @retval 0 Indicates a return from SetJump().\r | |
3640 | \r | |
3641 | **/\r | |
3642 | UINTN\r | |
3643 | EFIAPI\r | |
3644 | SetJump (\r | |
3645 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
3646 | );\r | |
3647 | \r | |
3648 | \r | |
3649 | /**\r | |
3650 | Restores the CPU context that was saved with SetJump().\r | |
3651 | \r | |
3652 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
3653 | function never returns to the caller. Instead is resumes execution based on\r | |
3654 | the state of JumpBuffer.\r | |
3655 | \r | |
3656 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3657 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
ac644614 | 3658 | If Value is 0, then ASSERT().\r |
3659 | \r | |
3660 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3661 | @param Value The value to return when the SetJump() context is\r | |
3662 | restored and must be non-zero.\r | |
3663 | \r | |
3664 | **/\r | |
3665 | VOID\r | |
3666 | EFIAPI\r | |
3667 | LongJump (\r | |
3668 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
3669 | IN UINTN Value\r | |
3670 | );\r | |
3671 | \r | |
3672 | \r | |
3673 | /**\r | |
3674 | Enables CPU interrupts.\r | |
3675 | \r | |
ac644614 | 3676 | **/\r |
3677 | VOID\r | |
3678 | EFIAPI\r | |
3679 | EnableInterrupts (\r | |
3680 | VOID\r | |
3681 | );\r | |
3682 | \r | |
3683 | \r | |
3684 | /**\r | |
3685 | Disables CPU interrupts.\r | |
3686 | \r | |
ac644614 | 3687 | **/\r |
3688 | VOID\r | |
3689 | EFIAPI\r | |
3690 | DisableInterrupts (\r | |
3691 | VOID\r | |
3692 | );\r | |
3693 | \r | |
3694 | \r | |
3695 | /**\r | |
3696 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3697 | operation.\r | |
3698 | \r | |
ac644614 | 3699 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
3700 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
3701 | \r | |
3702 | **/\r | |
3703 | BOOLEAN\r | |
3704 | EFIAPI\r | |
3705 | SaveAndDisableInterrupts (\r | |
3706 | VOID\r | |
3707 | );\r | |
3708 | \r | |
3709 | \r | |
3710 | /**\r | |
3711 | Enables CPU interrupts for the smallest window required to capture any\r | |
3712 | pending interrupts.\r | |
3713 | \r | |
ac644614 | 3714 | **/\r |
3715 | VOID\r | |
3716 | EFIAPI\r | |
3717 | EnableDisableInterrupts (\r | |
3718 | VOID\r | |
3719 | );\r | |
3720 | \r | |
3721 | \r | |
3722 | /**\r | |
3723 | Retrieves the current CPU interrupt state.\r | |
3724 | \r | |
af2dc6a7 | 3725 | Returns TRUE if interrupts are currently enabled. Otherwise\r |
38bbd3d9 | 3726 | returns FALSE.\r |
ac644614 | 3727 | \r |
3728 | @retval TRUE CPU interrupts are enabled.\r | |
3729 | @retval FALSE CPU interrupts are disabled.\r | |
3730 | \r | |
3731 | **/\r | |
3732 | BOOLEAN\r | |
3733 | EFIAPI\r | |
3734 | GetInterruptState (\r | |
3735 | VOID\r | |
3736 | );\r | |
3737 | \r | |
3738 | \r | |
3739 | /**\r | |
3740 | Set the current CPU interrupt state.\r | |
3741 | \r | |
3742 | Sets the current CPU interrupt state to the state specified by\r | |
3743 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
3744 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
3745 | returned.\r | |
3746 | \r | |
3747 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
3748 | interrupts should be disabled.\r | |
3749 | \r | |
3750 | @return InterruptState\r | |
3751 | \r | |
3752 | **/\r | |
3753 | BOOLEAN\r | |
3754 | EFIAPI\r | |
3755 | SetInterruptState (\r | |
3756 | IN BOOLEAN InterruptState\r | |
3757 | );\r | |
3758 | \r | |
3759 | \r | |
3760 | /**\r | |
3761 | Requests CPU to pause for a short period of time.\r | |
3762 | \r | |
3763 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
3764 | systems to prevent memory starvation while waiting for a spin lock.\r | |
3765 | \r | |
3766 | **/\r | |
3767 | VOID\r | |
3768 | EFIAPI\r | |
3769 | CpuPause (\r | |
3770 | VOID\r | |
3771 | );\r | |
3772 | \r | |
3773 | \r | |
3774 | /**\r | |
3775 | Transfers control to a function starting with a new stack.\r | |
3776 | \r | |
3777 | Transfers control to the function specified by EntryPoint using the\r | |
3778 | new stack specified by NewStack and passing in the parameters specified\r | |
3779 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
3780 | be NULL. The function EntryPoint must never return. This function\r | |
3781 | supports a variable number of arguments following the NewStack parameter.\r | |
1a2f870c | 3782 | These additional arguments are ignored on IA-32, x64, and EBC architectures.\r |
3783 | Itanium processors expect one additional parameter of type VOID * that specifies\r | |
ac644614 | 3784 | the new backing store pointer.\r |
3785 | \r | |
3786 | If EntryPoint is NULL, then ASSERT().\r | |
3787 | If NewStack is NULL, then ASSERT().\r | |
3788 | \r | |
3789 | @param EntryPoint A pointer to function to call with the new stack.\r | |
3790 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
3791 | function.\r | |
3792 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
3793 | function.\r | |
3794 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
3795 | function.\r | |
af2dc6a7 | 3796 | @param ... This variable argument list is ignored for IA-32, x64, and \r |
3797 | EBC architectures. For Itanium processors, this variable \r | |
3798 | argument list is expected to contain a single parameter of \r | |
3799 | type VOID * that specifies the new backing store pointer.\r | |
42eedea9 | 3800 | \r |
ac644614 | 3801 | \r |
3802 | **/\r | |
3803 | VOID\r | |
3804 | EFIAPI\r | |
3805 | SwitchStack (\r | |
3806 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
3807 | IN VOID *Context1, OPTIONAL\r | |
3808 | IN VOID *Context2, OPTIONAL\r | |
3809 | IN VOID *NewStack,\r | |
3810 | ...\r | |
3811 | );\r | |
3812 | \r | |
3813 | \r | |
3814 | /**\r | |
3815 | Generates a breakpoint on the CPU.\r | |
3816 | \r | |
3817 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
3818 | that code can resume normal execution after the breakpoint.\r | |
3819 | \r | |
3820 | **/\r | |
3821 | VOID\r | |
3822 | EFIAPI\r | |
3823 | CpuBreakpoint (\r | |
3824 | VOID\r | |
3825 | );\r | |
3826 | \r | |
3827 | \r | |
3828 | /**\r | |
3829 | Executes an infinite loop.\r | |
3830 | \r | |
3831 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
3832 | past the loop and the code that follows the loop must execute properly. This\r | |
3833 | implies that the infinite loop must not cause the code that follow it to be\r | |
3834 | optimized away.\r | |
3835 | \r | |
3836 | **/\r | |
3837 | VOID\r | |
3838 | EFIAPI\r | |
3839 | CpuDeadLoop (\r | |
3840 | VOID\r | |
3841 | );\r | |
2fe241a2 | 3842 | \r |
ac644614 | 3843 | #if defined (MDE_CPU_IPF)\r |
3844 | \r | |
3845 | /**\r | |
3846 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
3847 | CPU.\r | |
3848 | \r | |
cc39b88b | 3849 | Flushes the cache lines specified by Address and Length. If Address is not aligned \r |
3850 | on a cache line boundary, then entire cache line containing Address is flushed. \r | |
3851 | If Address + Length is not aligned on a cache line boundary, then the entire cache \r | |
3852 | line containing Address + Length - 1 is flushed. This function may choose to flush \r | |
3853 | the entire cache if that is more efficient than flushing the specified range. If \r | |
3854 | Length is 0, the no cache lines are flushed. Address is returned. \r | |
1a2f870c | 3855 | This function is only available on Itanium processors.\r |
ac644614 | 3856 | \r |
3857 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
3858 | \r | |
3859 | @param Address The base address of the instruction lines to invalidate. If\r | |
3860 | the CPU is in a physical addressing mode, then Address is a\r | |
3861 | physical address. If the CPU is in a virtual addressing mode,\r | |
3862 | then Address is a virtual address.\r | |
3863 | \r | |
3864 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
3865 | \r | |
cc39b88b | 3866 | @return Address.\r |
ac644614 | 3867 | \r |
3868 | **/\r | |
3869 | VOID *\r | |
3870 | EFIAPI\r | |
cc39b88b | 3871 | AsmFlushCacheRange (\r |
ac644614 | 3872 | IN VOID *Address,\r |
3873 | IN UINTN Length\r | |
3874 | );\r | |
3875 | \r | |
3876 | \r | |
3877 | /**\r | |
af2dc6a7 | 3878 | Executes an FC instruction.\r |
3879 | Executes an FC instruction on the cache line specified by Address.\r | |
ac644614 | 3880 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3881 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3882 | \r |
ee6c452c | 3883 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3884 | \r |
3885 | @return The address of FC instruction executed.\r | |
3886 | \r | |
3887 | **/\r | |
3888 | UINT64\r | |
3889 | EFIAPI\r | |
3890 | AsmFc (\r | |
3891 | IN UINT64 Address\r | |
3892 | );\r | |
3893 | \r | |
3894 | \r | |
3895 | /**\r | |
af2dc6a7 | 3896 | Executes an FC.I instruction.\r |
3897 | Executes an FC.I instruction on the cache line specified by Address.\r | |
ac644614 | 3898 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3899 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3900 | \r |
ee6c452c | 3901 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3902 | \r |
af2dc6a7 | 3903 | @return The address of the FC.I instruction executed.\r |
ac644614 | 3904 | \r |
3905 | **/\r | |
3906 | UINT64\r | |
3907 | EFIAPI\r | |
3908 | AsmFci (\r | |
3909 | IN UINT64 Address\r | |
3910 | );\r | |
3911 | \r | |
3912 | \r | |
3913 | /**\r | |
3914 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
17f695ed | 3915 | \r |
3916 | Reads and returns the current value of Processor Identifier Register specified by Index. \r | |
ac644614 | 3917 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r |
3918 | registers) is determined by CPUID [3] bits {7:0}.\r | |
3919 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
3920 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
3921 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
1a2f870c | 3922 | catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3923 | \r |
ee6c452c | 3924 | @param Index The 8-bit Processor Identifier Register index to read.\r |
ac644614 | 3925 | \r |
3926 | @return The current value of Processor Identifier Register specified by Index.\r | |
3927 | \r | |
3928 | **/\r | |
3929 | UINT64\r | |
3930 | EFIAPI\r | |
3931 | AsmReadCpuid (\r | |
3932 | IN UINT8 Index\r | |
3933 | );\r | |
3934 | \r | |
3935 | \r | |
3936 | /**\r | |
3937 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
1a2f870c | 3938 | This function is only available on Itanium processors.\r |
ac644614 | 3939 | \r |
3940 | @return The current value of PSR.\r | |
3941 | \r | |
3942 | **/\r | |
3943 | UINT64\r | |
3944 | EFIAPI\r | |
3945 | AsmReadPsr (\r | |
3946 | VOID\r | |
3947 | );\r | |
3948 | \r | |
3949 | \r | |
3950 | /**\r | |
3951 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
22388319 | 3952 | \r |
ac644614 | 3953 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
22388319 | 3954 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r |
3955 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
1a2f870c | 3956 | fault handlers to catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3957 | \r |
ee6c452c | 3958 | @param Value The 64-bit value to write to PSR.\r |
ac644614 | 3959 | \r |
3960 | @return The 64-bit value written to the PSR.\r | |
3961 | \r | |
3962 | **/\r | |
3963 | UINT64\r | |
3964 | EFIAPI\r | |
3965 | AsmWritePsr (\r | |
3966 | IN UINT64 Value\r | |
3967 | );\r | |
3968 | \r | |
3969 | \r | |
3970 | /**\r | |
3971 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3972 | \r |
3973 | Reads and returns the current value of KR0. \r | |
1a2f870c | 3974 | This function is only available on Itanium processors.\r |
ac644614 | 3975 | \r |
3976 | @return The current value of KR0.\r | |
3977 | \r | |
3978 | **/\r | |
3979 | UINT64\r | |
3980 | EFIAPI\r | |
3981 | AsmReadKr0 (\r | |
3982 | VOID\r | |
3983 | );\r | |
3984 | \r | |
3985 | \r | |
3986 | /**\r | |
3987 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 3988 | \r |
3989 | Reads and returns the current value of KR1. \r | |
1a2f870c | 3990 | This function is only available on Itanium processors.\r |
ac644614 | 3991 | \r |
3992 | @return The current value of KR1.\r | |
3993 | \r | |
3994 | **/\r | |
3995 | UINT64\r | |
3996 | EFIAPI\r | |
3997 | AsmReadKr1 (\r | |
3998 | VOID\r | |
3999 | );\r | |
4000 | \r | |
4001 | \r | |
4002 | /**\r | |
4003 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 4004 | \r |
4005 | Reads and returns the current value of KR2. \r | |
1a2f870c | 4006 | This function is only available on Itanium processors.\r |
ac644614 | 4007 | \r |
4008 | @return The current value of KR2.\r | |
4009 | \r | |
4010 | **/\r | |
4011 | UINT64\r | |
4012 | EFIAPI\r | |
4013 | AsmReadKr2 (\r | |
4014 | VOID\r | |
4015 | );\r | |
4016 | \r | |
4017 | \r | |
4018 | /**\r | |
4019 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 4020 | \r |
4021 | Reads and returns the current value of KR3. \r | |
1a2f870c | 4022 | This function is only available on Itanium processors.\r |
ac644614 | 4023 | \r |
4024 | @return The current value of KR3.\r | |
4025 | \r | |
4026 | **/\r | |
4027 | UINT64\r | |
4028 | EFIAPI\r | |
4029 | AsmReadKr3 (\r | |
4030 | VOID\r | |
4031 | );\r | |
4032 | \r | |
4033 | \r | |
4034 | /**\r | |
4035 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
ac644614 | 4036 | \r |
2fe241a2 | 4037 | Reads and returns the current value of KR4. \r |
1a2f870c | 4038 | This function is only available on Itanium processors.\r |
2fe241a2 | 4039 | \r |
ac644614 | 4040 | @return The current value of KR4.\r |
4041 | \r | |
4042 | **/\r | |
4043 | UINT64\r | |
4044 | EFIAPI\r | |
4045 | AsmReadKr4 (\r | |
4046 | VOID\r | |
4047 | );\r | |
4048 | \r | |
4049 | \r | |
4050 | /**\r | |
4051 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 4052 | \r |
4053 | Reads and returns the current value of KR5. \r | |
1a2f870c | 4054 | This function is only available on Itanium processors.\r |
ac644614 | 4055 | \r |
4056 | @return The current value of KR5.\r | |
4057 | \r | |
4058 | **/\r | |
4059 | UINT64\r | |
4060 | EFIAPI\r | |
4061 | AsmReadKr5 (\r | |
4062 | VOID\r | |
4063 | );\r | |
4064 | \r | |
4065 | \r | |
4066 | /**\r | |
4067 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 4068 | \r |
4069 | Reads and returns the current value of KR6. \r | |
1a2f870c | 4070 | This function is only available on Itanium processors.\r |
ac644614 | 4071 | \r |
4072 | @return The current value of KR6.\r | |
4073 | \r | |
4074 | **/\r | |
4075 | UINT64\r | |
4076 | EFIAPI\r | |
4077 | AsmReadKr6 (\r | |
4078 | VOID\r | |
4079 | );\r | |
4080 | \r | |
4081 | \r | |
4082 | /**\r | |
4083 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 4084 | \r |
4085 | Reads and returns the current value of KR7. \r | |
1a2f870c | 4086 | This function is only available on Itanium processors.\r |
ac644614 | 4087 | \r |
4088 | @return The current value of KR7.\r | |
4089 | \r | |
4090 | **/\r | |
4091 | UINT64\r | |
4092 | EFIAPI\r | |
4093 | AsmReadKr7 (\r | |
4094 | VOID\r | |
4095 | );\r | |
4096 | \r | |
4097 | \r | |
4098 | /**\r | |
4099 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 4100 | \r |
4101 | Writes the current value of KR0. The 64-bit value written to \r | |
1a2f870c | 4102 | the KR0 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4103 | \r |
ee6c452c | 4104 | @param Value The 64-bit value to write to KR0.\r |
ac644614 | 4105 | \r |
4106 | @return The 64-bit value written to the KR0.\r | |
4107 | \r | |
4108 | **/\r | |
4109 | UINT64\r | |
4110 | EFIAPI\r | |
4111 | AsmWriteKr0 (\r | |
4112 | IN UINT64 Value\r | |
4113 | );\r | |
4114 | \r | |
4115 | \r | |
4116 | /**\r | |
4117 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 4118 | \r |
4119 | Writes the current value of KR1. The 64-bit value written to \r | |
1a2f870c | 4120 | the KR1 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4121 | \r |
ee6c452c | 4122 | @param Value The 64-bit value to write to KR1.\r |
ac644614 | 4123 | \r |
4124 | @return The 64-bit value written to the KR1.\r | |
4125 | \r | |
4126 | **/\r | |
4127 | UINT64\r | |
4128 | EFIAPI\r | |
4129 | AsmWriteKr1 (\r | |
4130 | IN UINT64 Value\r | |
4131 | );\r | |
4132 | \r | |
4133 | \r | |
4134 | /**\r | |
4135 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 4136 | \r |
4137 | Writes the current value of KR2. The 64-bit value written to \r | |
1a2f870c | 4138 | the KR2 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4139 | \r |
ee6c452c | 4140 | @param Value The 64-bit value to write to KR2.\r |
ac644614 | 4141 | \r |
4142 | @return The 64-bit value written to the KR2.\r | |
4143 | \r | |
4144 | **/\r | |
4145 | UINT64\r | |
4146 | EFIAPI\r | |
4147 | AsmWriteKr2 (\r | |
4148 | IN UINT64 Value\r | |
4149 | );\r | |
4150 | \r | |
4151 | \r | |
4152 | /**\r | |
4153 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 4154 | \r |
4155 | Writes the current value of KR3. The 64-bit value written to \r | |
1a2f870c | 4156 | the KR3 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4157 | \r |
ee6c452c | 4158 | @param Value The 64-bit value to write to KR3.\r |
ac644614 | 4159 | \r |
4160 | @return The 64-bit value written to the KR3.\r | |
4161 | \r | |
4162 | **/\r | |
4163 | UINT64\r | |
4164 | EFIAPI\r | |
4165 | AsmWriteKr3 (\r | |
4166 | IN UINT64 Value\r | |
4167 | );\r | |
4168 | \r | |
4169 | \r | |
4170 | /**\r | |
4171 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
2fe241a2 | 4172 | \r |
4173 | Writes the current value of KR4. The 64-bit value written to \r | |
1a2f870c | 4174 | the KR4 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4175 | \r |
ee6c452c | 4176 | @param Value The 64-bit value to write to KR4.\r |
ac644614 | 4177 | \r |
4178 | @return The 64-bit value written to the KR4.\r | |
4179 | \r | |
4180 | **/\r | |
4181 | UINT64\r | |
4182 | EFIAPI\r | |
4183 | AsmWriteKr4 (\r | |
4184 | IN UINT64 Value\r | |
4185 | );\r | |
4186 | \r | |
4187 | \r | |
4188 | /**\r | |
4189 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 4190 | \r |
4191 | Writes the current value of KR5. The 64-bit value written to \r | |
1a2f870c | 4192 | the KR5 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4193 | \r |
ee6c452c | 4194 | @param Value The 64-bit value to write to KR5.\r |
ac644614 | 4195 | \r |
4196 | @return The 64-bit value written to the KR5.\r | |
4197 | \r | |
4198 | **/\r | |
4199 | UINT64\r | |
4200 | EFIAPI\r | |
4201 | AsmWriteKr5 (\r | |
4202 | IN UINT64 Value\r | |
4203 | );\r | |
4204 | \r | |
4205 | \r | |
4206 | /**\r | |
4207 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 4208 | \r |
4209 | Writes the current value of KR6. The 64-bit value written to \r | |
1a2f870c | 4210 | the KR6 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4211 | \r |
ee6c452c | 4212 | @param Value The 64-bit value to write to KR6.\r |
ac644614 | 4213 | \r |
4214 | @return The 64-bit value written to the KR6.\r | |
4215 | \r | |
4216 | **/\r | |
4217 | UINT64\r | |
4218 | EFIAPI\r | |
4219 | AsmWriteKr6 (\r | |
4220 | IN UINT64 Value\r | |
4221 | );\r | |
4222 | \r | |
4223 | \r | |
4224 | /**\r | |
4225 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 4226 | \r |
4227 | Writes the current value of KR7. The 64-bit value written to \r | |
1a2f870c | 4228 | the KR7 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4229 | \r |
ee6c452c | 4230 | @param Value The 64-bit value to write to KR7.\r |
ac644614 | 4231 | \r |
4232 | @return The 64-bit value written to the KR7.\r | |
4233 | \r | |
4234 | **/\r | |
4235 | UINT64\r | |
4236 | EFIAPI\r | |
4237 | AsmWriteKr7 (\r | |
4238 | IN UINT64 Value\r | |
4239 | );\r | |
4240 | \r | |
4241 | \r | |
4242 | /**\r | |
4243 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 4244 | \r |
4245 | Reads and returns the current value of ITC.\r | |
1a2f870c | 4246 | This function is only available on Itanium processors.\r |
ac644614 | 4247 | \r |
4248 | @return The current value of ITC.\r | |
4249 | \r | |
4250 | **/\r | |
4251 | UINT64\r | |
4252 | EFIAPI\r | |
4253 | AsmReadItc (\r | |
4254 | VOID\r | |
4255 | );\r | |
4256 | \r | |
4257 | \r | |
4258 | /**\r | |
4259 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 4260 | \r |
4261 | Reads and returns the current value of ITV. \r | |
1a2f870c | 4262 | This function is only available on Itanium processors.\r |
ac644614 | 4263 | \r |
4264 | @return The current value of ITV.\r | |
4265 | \r | |
4266 | **/\r | |
4267 | UINT64\r | |
4268 | EFIAPI\r | |
4269 | AsmReadItv (\r | |
4270 | VOID\r | |
4271 | );\r | |
4272 | \r | |
4273 | \r | |
4274 | /**\r | |
4275 | Reads the current value of Interval Timer Match Register (ITM).\r | |
2fe241a2 | 4276 | \r |
4277 | Reads and returns the current value of ITM.\r | |
1a2f870c | 4278 | This function is only available on Itanium processors.\r |
ac644614 | 4279 | \r |
4280 | @return The current value of ITM.\r | |
4281 | **/\r | |
4282 | UINT64\r | |
4283 | EFIAPI\r | |
4284 | AsmReadItm (\r | |
4285 | VOID\r | |
4286 | );\r | |
4287 | \r | |
4288 | \r | |
4289 | /**\r | |
4290 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 4291 | \r |
4292 | Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r | |
1a2f870c | 4293 | This function is only available on Itanium processors.\r |
ac644614 | 4294 | \r |
ee6c452c | 4295 | @param Value The 64-bit value to write to ITC.\r |
ac644614 | 4296 | \r |
4297 | @return The 64-bit value written to the ITC.\r | |
4298 | \r | |
4299 | **/\r | |
4300 | UINT64\r | |
4301 | EFIAPI\r | |
4302 | AsmWriteItc (\r | |
4303 | IN UINT64 Value\r | |
4304 | );\r | |
4305 | \r | |
4306 | \r | |
4307 | /**\r | |
4308 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
2fe241a2 | 4309 | \r |
4310 | Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r | |
1a2f870c | 4311 | This function is only available on Itanium processors.\r |
ac644614 | 4312 | \r |
ee6c452c | 4313 | @param Value The 64-bit value to write to ITM.\r |
ac644614 | 4314 | \r |
4315 | @return The 64-bit value written to the ITM.\r | |
4316 | \r | |
4317 | **/\r | |
4318 | UINT64\r | |
4319 | EFIAPI\r | |
4320 | AsmWriteItm (\r | |
4321 | IN UINT64 Value\r | |
4322 | );\r | |
4323 | \r | |
4324 | \r | |
4325 | /**\r | |
4326 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 4327 | \r |
4328 | Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r | |
ac644614 | 4329 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4330 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
4331 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4332 | fault handlers to catch the faults.\r | |
1a2f870c | 4333 | This function is only available on Itanium processors.\r |
ac644614 | 4334 | \r |
ee6c452c | 4335 | @param Value The 64-bit value to write to ITV.\r |
ac644614 | 4336 | \r |
4337 | @return The 64-bit value written to the ITV.\r | |
4338 | \r | |
4339 | **/\r | |
4340 | UINT64\r | |
4341 | EFIAPI\r | |
4342 | AsmWriteItv (\r | |
4343 | IN UINT64 Value\r | |
4344 | );\r | |
4345 | \r | |
4346 | \r | |
4347 | /**\r | |
4348 | Reads the current value of Default Control Register (DCR).\r | |
2fe241a2 | 4349 | \r |
1a2f870c | 4350 | Reads and returns the current value of DCR. This function is only available on Itanium processors.\r |
ac644614 | 4351 | \r |
4352 | @return The current value of DCR.\r | |
4353 | \r | |
4354 | **/\r | |
4355 | UINT64\r | |
4356 | EFIAPI\r | |
4357 | AsmReadDcr (\r | |
4358 | VOID\r | |
4359 | );\r | |
4360 | \r | |
4361 | \r | |
4362 | /**\r | |
4363 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 4364 | \r |
1a2f870c | 4365 | Reads and returns the current value of IVA. This function is only available on Itanium processors.\r |
ac644614 | 4366 | \r |
4367 | @return The current value of IVA.\r | |
4368 | **/\r | |
4369 | UINT64\r | |
4370 | EFIAPI\r | |
4371 | AsmReadIva (\r | |
4372 | VOID\r | |
4373 | );\r | |
4374 | \r | |
4375 | \r | |
4376 | /**\r | |
4377 | Reads the current value of Page Table Address Register (PTA).\r | |
2fe241a2 | 4378 | \r |
1a2f870c | 4379 | Reads and returns the current value of PTA. This function is only available on Itanium processors.\r |
ac644614 | 4380 | \r |
4381 | @return The current value of PTA.\r | |
4382 | \r | |
4383 | **/\r | |
4384 | UINT64\r | |
4385 | EFIAPI\r | |
4386 | AsmReadPta (\r | |
4387 | VOID\r | |
4388 | );\r | |
4389 | \r | |
4390 | \r | |
4391 | /**\r | |
4392 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
2fe241a2 | 4393 | \r |
4394 | Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r | |
ac644614 | 4395 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4396 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4397 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4398 | fault handlers to catch the faults.\r | |
1a2f870c | 4399 | This function is only available on Itanium processors.\r |
ac644614 | 4400 | \r |
ee6c452c | 4401 | @param Value The 64-bit value to write to DCR.\r |
ac644614 | 4402 | \r |
4403 | @return The 64-bit value written to the DCR.\r | |
4404 | \r | |
4405 | **/\r | |
4406 | UINT64\r | |
4407 | EFIAPI\r | |
4408 | AsmWriteDcr (\r | |
4409 | IN UINT64 Value\r | |
4410 | );\r | |
4411 | \r | |
4412 | \r | |
4413 | /**\r | |
4414 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 4415 | \r |
4416 | Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r | |
ac644614 | 4417 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r |
4418 | the low 15 bits of Value is ignored when written.\r | |
1a2f870c | 4419 | This function is only available on Itanium processors.\r |
ac644614 | 4420 | \r |
ee6c452c | 4421 | @param Value The 64-bit value to write to IVA.\r |
ac644614 | 4422 | \r |
4423 | @return The 64-bit value written to the IVA.\r | |
4424 | \r | |
4425 | **/\r | |
4426 | UINT64\r | |
4427 | EFIAPI\r | |
4428 | AsmWriteIva (\r | |
4429 | IN UINT64 Value\r | |
4430 | );\r | |
4431 | \r | |
4432 | \r | |
4433 | /**\r | |
4434 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
2fe241a2 | 4435 | \r |
4436 | Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r | |
ac644614 | 4437 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4438 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4439 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4440 | fault handlers to catch the faults.\r | |
1a2f870c | 4441 | This function is only available on Itanium processors.\r |
ac644614 | 4442 | \r |
ee6c452c | 4443 | @param Value The 64-bit value to write to PTA.\r |
ac644614 | 4444 | \r |
4445 | @return The 64-bit value written to the PTA.\r | |
4446 | **/\r | |
4447 | UINT64\r | |
4448 | EFIAPI\r | |
4449 | AsmWritePta (\r | |
4450 | IN UINT64 Value\r | |
4451 | );\r | |
4452 | \r | |
4453 | \r | |
4454 | /**\r | |
4455 | Reads the current value of Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4456 | \r |
1a2f870c | 4457 | Reads and returns the current value of LID. This function is only available on Itanium processors.\r |
ac644614 | 4458 | \r |
4459 | @return The current value of LID.\r | |
4460 | \r | |
4461 | **/\r | |
4462 | UINT64\r | |
4463 | EFIAPI\r | |
4464 | AsmReadLid (\r | |
4465 | VOID\r | |
4466 | );\r | |
4467 | \r | |
4468 | \r | |
4469 | /**\r | |
4470 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
2fe241a2 | 4471 | \r |
1a2f870c | 4472 | Reads and returns the current value of IVR. This function is only available on Itanium processors. \r |
ac644614 | 4473 | \r |
4474 | @return The current value of IVR.\r | |
4475 | \r | |
4476 | **/\r | |
4477 | UINT64\r | |
4478 | EFIAPI\r | |
4479 | AsmReadIvr (\r | |
4480 | VOID\r | |
4481 | );\r | |
4482 | \r | |
4483 | \r | |
4484 | /**\r | |
4485 | Reads the current value of Task Priority Register (TPR).\r | |
2fe241a2 | 4486 | \r |
1a2f870c | 4487 | Reads and returns the current value of TPR. This function is only available on Itanium processors. \r |
ac644614 | 4488 | \r |
4489 | @return The current value of TPR.\r | |
4490 | \r | |
4491 | **/\r | |
4492 | UINT64\r | |
4493 | EFIAPI\r | |
4494 | AsmReadTpr (\r | |
4495 | VOID\r | |
4496 | );\r | |
4497 | \r | |
4498 | \r | |
4499 | /**\r | |
4500 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
2fe241a2 | 4501 | \r |
1a2f870c | 4502 | Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r |
ac644614 | 4503 | \r |
4504 | @return The current value of IRR0.\r | |
4505 | \r | |
4506 | **/\r | |
4507 | UINT64\r | |
4508 | EFIAPI\r | |
4509 | AsmReadIrr0 (\r | |
4510 | VOID\r | |
4511 | );\r | |
4512 | \r | |
4513 | \r | |
4514 | /**\r | |
4515 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
2fe241a2 | 4516 | \r |
1a2f870c | 4517 | Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r |
ac644614 | 4518 | \r |
4519 | @return The current value of IRR1.\r | |
4520 | \r | |
4521 | **/\r | |
4522 | UINT64\r | |
4523 | EFIAPI\r | |
4524 | AsmReadIrr1 (\r | |
4525 | VOID\r | |
4526 | );\r | |
4527 | \r | |
4528 | \r | |
4529 | /**\r | |
4530 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
2fe241a2 | 4531 | \r |
1a2f870c | 4532 | Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r |
ac644614 | 4533 | \r |
4534 | @return The current value of IRR2.\r | |
4535 | \r | |
4536 | **/\r | |
4537 | UINT64\r | |
4538 | EFIAPI\r | |
4539 | AsmReadIrr2 (\r | |
4540 | VOID\r | |
4541 | );\r | |
4542 | \r | |
4543 | \r | |
4544 | /**\r | |
4545 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
2fe241a2 | 4546 | \r |
1a2f870c | 4547 | Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r |
ac644614 | 4548 | \r |
4549 | @return The current value of IRR3.\r | |
4550 | \r | |
4551 | **/\r | |
4552 | UINT64\r | |
4553 | EFIAPI\r | |
4554 | AsmReadIrr3 (\r | |
4555 | VOID\r | |
4556 | );\r | |
4557 | \r | |
4558 | \r | |
4559 | /**\r | |
4560 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4561 | \r |
1a2f870c | 4562 | Reads and returns the current value of PMV. This function is only available on Itanium processors. \r |
ac644614 | 4563 | \r |
4564 | @return The current value of PMV.\r | |
4565 | \r | |
4566 | **/\r | |
4567 | UINT64\r | |
4568 | EFIAPI\r | |
4569 | AsmReadPmv (\r | |
4570 | VOID\r | |
4571 | );\r | |
4572 | \r | |
4573 | \r | |
4574 | /**\r | |
4575 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4576 | \r |
1a2f870c | 4577 | Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r |
ac644614 | 4578 | \r |
4579 | @return The current value of CMCV.\r | |
4580 | \r | |
4581 | **/\r | |
4582 | UINT64\r | |
4583 | EFIAPI\r | |
4584 | AsmReadCmcv (\r | |
4585 | VOID\r | |
4586 | );\r | |
4587 | \r | |
4588 | \r | |
4589 | /**\r | |
4590 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4591 | \r |
1a2f870c | 4592 | Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r |
ac644614 | 4593 | \r |
4594 | @return The current value of LRR0.\r | |
4595 | \r | |
4596 | **/\r | |
4597 | UINT64\r | |
4598 | EFIAPI\r | |
4599 | AsmReadLrr0 (\r | |
4600 | VOID\r | |
4601 | );\r | |
4602 | \r | |
4603 | \r | |
4604 | /**\r | |
4605 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4606 | \r |
1a2f870c | 4607 | Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r |
ac644614 | 4608 | \r |
4609 | @return The current value of LRR1.\r | |
4610 | \r | |
4611 | **/\r | |
4612 | UINT64\r | |
4613 | EFIAPI\r | |
4614 | AsmReadLrr1 (\r | |
4615 | VOID\r | |
4616 | );\r | |
4617 | \r | |
4618 | \r | |
4619 | /**\r | |
4620 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4621 | \r |
4622 | Writes the current value of LID. The 64-bit value written to the LID is returned. \r | |
ac644614 | 4623 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4624 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
4625 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4626 | fault handlers to catch the faults.\r | |
1a2f870c | 4627 | This function is only available on Itanium processors.\r |
ac644614 | 4628 | \r |
ee6c452c | 4629 | @param Value The 64-bit value to write to LID.\r |
ac644614 | 4630 | \r |
4631 | @return The 64-bit value written to the LID.\r | |
4632 | \r | |
4633 | **/\r | |
4634 | UINT64\r | |
4635 | EFIAPI\r | |
4636 | AsmWriteLid (\r | |
4637 | IN UINT64 Value\r | |
4638 | );\r | |
4639 | \r | |
4640 | \r | |
4641 | /**\r | |
4642 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
2fe241a2 | 4643 | \r |
4644 | Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r | |
ac644614 | 4645 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4646 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
4647 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4648 | fault handlers to catch the faults.\r | |
1a2f870c | 4649 | This function is only available on Itanium processors.\r |
ac644614 | 4650 | \r |
ee6c452c | 4651 | @param Value The 64-bit value to write to TPR.\r |
ac644614 | 4652 | \r |
4653 | @return The 64-bit value written to the TPR.\r | |
4654 | \r | |
4655 | **/\r | |
4656 | UINT64\r | |
4657 | EFIAPI\r | |
4658 | AsmWriteTpr (\r | |
4659 | IN UINT64 Value\r | |
4660 | );\r | |
4661 | \r | |
4662 | \r | |
4663 | /**\r | |
4664 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
2fe241a2 | 4665 | \r |
1a2f870c | 4666 | Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r |
ac644614 | 4667 | \r |
4668 | **/\r | |
4669 | VOID\r | |
4670 | EFIAPI\r | |
4671 | AsmWriteEoi (\r | |
4672 | VOID\r | |
4673 | );\r | |
4674 | \r | |
4675 | \r | |
4676 | /**\r | |
4677 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4678 | \r |
4679 | Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r | |
ac644614 | 4680 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4681 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
4682 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4683 | fault handlers to catch the faults.\r | |
1a2f870c | 4684 | This function is only available on Itanium processors.\r |
ac644614 | 4685 | \r |
ee6c452c | 4686 | @param Value The 64-bit value to write to PMV.\r |
ac644614 | 4687 | \r |
4688 | @return The 64-bit value written to the PMV.\r | |
4689 | \r | |
4690 | **/\r | |
4691 | UINT64\r | |
4692 | EFIAPI\r | |
4693 | AsmWritePmv (\r | |
4694 | IN UINT64 Value\r | |
4695 | );\r | |
4696 | \r | |
4697 | \r | |
4698 | /**\r | |
4699 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4700 | \r |
4701 | Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r | |
ac644614 | 4702 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4703 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
4704 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4705 | fault handlers to catch the faults.\r | |
1a2f870c | 4706 | This function is only available on Itanium processors.\r |
ac644614 | 4707 | \r |
ee6c452c | 4708 | @param Value The 64-bit value to write to CMCV.\r |
ac644614 | 4709 | \r |
4710 | @return The 64-bit value written to the CMCV.\r | |
4711 | \r | |
4712 | **/\r | |
4713 | UINT64\r | |
4714 | EFIAPI\r | |
4715 | AsmWriteCmcv (\r | |
4716 | IN UINT64 Value\r | |
4717 | );\r | |
4718 | \r | |
4719 | \r | |
4720 | /**\r | |
4721 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4722 | \r |
4723 | Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r | |
ac644614 | 4724 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4725 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
4726 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4727 | fault handlers to catch the faults.\r | |
1a2f870c | 4728 | This function is only available on Itanium processors.\r |
ac644614 | 4729 | \r |
ee6c452c | 4730 | @param Value The 64-bit value to write to LRR0.\r |
ac644614 | 4731 | \r |
4732 | @return The 64-bit value written to the LRR0.\r | |
4733 | \r | |
4734 | **/\r | |
4735 | UINT64\r | |
4736 | EFIAPI\r | |
4737 | AsmWriteLrr0 (\r | |
4738 | IN UINT64 Value\r | |
4739 | );\r | |
4740 | \r | |
4741 | \r | |
4742 | /**\r | |
4743 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4744 | \r |
4745 | Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r | |
ac644614 | 4746 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4747 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
4748 | The caller must either guarantee that Value is valid, or the caller must\r | |
4749 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4750 | This function is only available on Itanium processors.\r |
ac644614 | 4751 | \r |
ee6c452c | 4752 | @param Value The 64-bit value to write to LRR1.\r |
ac644614 | 4753 | \r |
4754 | @return The 64-bit value written to the LRR1.\r | |
4755 | \r | |
4756 | **/\r | |
4757 | UINT64\r | |
4758 | EFIAPI\r | |
4759 | AsmWriteLrr1 (\r | |
4760 | IN UINT64 Value\r | |
4761 | );\r | |
4762 | \r | |
4763 | \r | |
4764 | /**\r | |
4765 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
4766 | \r | |
4767 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4768 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
af2dc6a7 | 4769 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4770 | on all processor models. Implemented registers are contiguous starting with\r |
4771 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
4772 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4773 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4774 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4775 | This function is only available on Itanium processors.\r |
ac644614 | 4776 | \r |
ee6c452c | 4777 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r |
ac644614 | 4778 | \r |
4779 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
4780 | \r | |
4781 | **/\r | |
4782 | UINT64\r | |
4783 | EFIAPI\r | |
4784 | AsmReadIbr (\r | |
4785 | IN UINT8 Index\r | |
4786 | );\r | |
4787 | \r | |
4788 | \r | |
4789 | /**\r | |
4790 | Reads the current value of Data Breakpoint Register (DBR).\r | |
4791 | \r | |
4792 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4793 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4794 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4795 | models. Implemented registers are contiguous starting with register 0.\r |
4796 | No parameter checking is performed on Index. If the Index value is beyond\r | |
4797 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
4798 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
4799 | fault handlers to catch the faults.\r | |
1a2f870c | 4800 | This function is only available on Itanium processors.\r |
ac644614 | 4801 | \r |
ee6c452c | 4802 | @param Index The 8-bit Data Breakpoint Register index to read.\r |
ac644614 | 4803 | \r |
4804 | @return The current value of Data Breakpoint Register specified by Index.\r | |
4805 | \r | |
4806 | **/\r | |
4807 | UINT64\r | |
4808 | EFIAPI\r | |
4809 | AsmReadDbr (\r | |
4810 | IN UINT8 Index\r | |
4811 | );\r | |
4812 | \r | |
4813 | \r | |
4814 | /**\r | |
4815 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
4816 | \r | |
af2dc6a7 | 4817 | All processor implementations provide at least four performance counters\r |
4818 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4819 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4820 | additional implementation-dependent PMC and PMD to increase the number of\r | |
4821 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4822 | register set is implementation dependent. No parameter checking is performed\r | |
4823 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
4824 | zero value will be returned.\r | |
1a2f870c | 4825 | This function is only available on Itanium processors.\r |
ac644614 | 4826 | \r |
ee6c452c | 4827 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r |
ac644614 | 4828 | \r |
2fe241a2 | 4829 | @return The current value of Performance Monitor Configuration Register\r |
4830 | specified by Index.\r | |
ac644614 | 4831 | \r |
4832 | **/\r | |
4833 | UINT64\r | |
4834 | EFIAPI\r | |
4835 | AsmReadPmc (\r | |
4836 | IN UINT8 Index\r | |
4837 | );\r | |
4838 | \r | |
4839 | \r | |
4840 | /**\r | |
4841 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
4842 | \r | |
4843 | All processor implementations provide at least 4 performance counters\r | |
4844 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
4845 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r | |
4846 | provide additional implementation-dependent PMC and PMD to increase the number\r | |
4847 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4848 | register set is implementation dependent. No parameter checking is performed\r | |
4849 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
4850 | zero value will be returned.\r | |
1a2f870c | 4851 | This function is only available on Itanium processors.\r |
ac644614 | 4852 | \r |
ee6c452c | 4853 | @param Index The 8-bit Performance Monitor Data Register index to read.\r |
ac644614 | 4854 | \r |
4855 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
4856 | \r | |
4857 | **/\r | |
4858 | UINT64\r | |
4859 | EFIAPI\r | |
4860 | AsmReadPmd (\r | |
4861 | IN UINT8 Index\r | |
4862 | );\r | |
4863 | \r | |
4864 | \r | |
4865 | /**\r | |
4866 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
4867 | \r | |
4868 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
4869 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4870 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
af2dc6a7 | 4871 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4872 | on all processor models. Implemented registers are contiguous starting with\r |
4873 | register 0. No parameter checking is performed on Index. If the Index value\r | |
4874 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4875 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4876 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4877 | This function is only available on Itanium processors.\r |
ac644614 | 4878 | \r |
ee6c452c | 4879 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r |
4880 | @param Value The 64-bit value to write to IBR.\r | |
ac644614 | 4881 | \r |
4882 | @return The 64-bit value written to the IBR.\r | |
4883 | \r | |
4884 | **/\r | |
4885 | UINT64\r | |
4886 | EFIAPI\r | |
4887 | AsmWriteIbr (\r | |
4888 | IN UINT8 Index,\r | |
4889 | IN UINT64 Value\r | |
4890 | );\r | |
4891 | \r | |
4892 | \r | |
4893 | /**\r | |
4894 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
4895 | \r | |
4896 | Writes current value of Data Breakpoint Register specified by Index.\r | |
4897 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4898 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4899 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4900 | models. Implemented registers are contiguous starting with register 0. No parameter\r |
4901 | checking is performed on Index. If the Index value is beyond the implemented\r | |
4902 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
4903 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
4904 | catch the faults.\r | |
1a2f870c | 4905 | This function is only available on Itanium processors.\r |
ac644614 | 4906 | \r |
ee6c452c | 4907 | @param Index The 8-bit Data Breakpoint Register index to write.\r |
4908 | @param Value The 64-bit value to write to DBR.\r | |
ac644614 | 4909 | \r |
4910 | @return The 64-bit value written to the DBR.\r | |
4911 | \r | |
4912 | **/\r | |
4913 | UINT64\r | |
4914 | EFIAPI\r | |
4915 | AsmWriteDbr (\r | |
4916 | IN UINT8 Index,\r | |
4917 | IN UINT64 Value\r | |
4918 | );\r | |
4919 | \r | |
4920 | \r | |
4921 | /**\r | |
4922 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
4923 | \r | |
4924 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
af2dc6a7 | 4925 | All processor implementations provide at least four performance counters\r |
4926 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status\r | |
ac644614 | 4927 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r |
4928 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
4929 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r | |
4930 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
4931 | beyond the implemented PMC register range, the write is ignored.\r | |
1a2f870c | 4932 | This function is only available on Itanium processors.\r |
ac644614 | 4933 | \r |
ee6c452c | 4934 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r |
4935 | @param Value The 64-bit value to write to PMC.\r | |
ac644614 | 4936 | \r |
4937 | @return The 64-bit value written to the PMC.\r | |
4938 | \r | |
4939 | **/\r | |
4940 | UINT64\r | |
4941 | EFIAPI\r | |
4942 | AsmWritePmc (\r | |
4943 | IN UINT8 Index,\r | |
4944 | IN UINT64 Value\r | |
4945 | );\r | |
4946 | \r | |
4947 | \r | |
4948 | /**\r | |
4949 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
4950 | \r | |
4951 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
af2dc6a7 | 4952 | All processor implementations provide at least four performance counters\r |
4953 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4954 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4955 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
4956 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r | |
4957 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
4958 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
1a2f870c | 4959 | This function is only available on Itanium processors.\r |
ac644614 | 4960 | \r |
ee6c452c | 4961 | @param Index The 8-bit Performance Monitor Data Register index to write.\r |
4962 | @param Value The 64-bit value to write to PMD.\r | |
ac644614 | 4963 | \r |
4964 | @return The 64-bit value written to the PMD.\r | |
4965 | \r | |
4966 | **/\r | |
4967 | UINT64\r | |
4968 | EFIAPI\r | |
4969 | AsmWritePmd (\r | |
4970 | IN UINT8 Index,\r | |
4971 | IN UINT64 Value\r | |
4972 | );\r | |
4973 | \r | |
4974 | \r | |
4975 | /**\r | |
4976 | Reads the current value of 64-bit Global Pointer (GP).\r | |
4977 | \r | |
4978 | Reads and returns the current value of GP.\r | |
1a2f870c | 4979 | This function is only available on Itanium processors.\r |
ac644614 | 4980 | \r |
4981 | @return The current value of GP.\r | |
4982 | \r | |
4983 | **/\r | |
4984 | UINT64\r | |
4985 | EFIAPI\r | |
4986 | AsmReadGp (\r | |
4987 | VOID\r | |
4988 | );\r | |
4989 | \r | |
4990 | \r | |
4991 | /**\r | |
4992 | Write the current value of 64-bit Global Pointer (GP).\r | |
4993 | \r | |
4994 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
4995 | No parameter checking is performed on Value.\r | |
1a2f870c | 4996 | This function is only available on Itanium processors.\r |
ac644614 | 4997 | \r |
4998 | @param Value The 64-bit value to write to GP.\r | |
4999 | \r | |
5000 | @return The 64-bit value written to the GP.\r | |
5001 | \r | |
5002 | **/\r | |
5003 | UINT64\r | |
5004 | EFIAPI\r | |
5005 | AsmWriteGp (\r | |
5006 | IN UINT64 Value\r | |
5007 | );\r | |
5008 | \r | |
5009 | \r | |
5010 | /**\r | |
5011 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
5012 | \r | |
5013 | Reads and returns the current value of SP.\r | |
1a2f870c | 5014 | This function is only available on Itanium processors.\r |
ac644614 | 5015 | \r |
5016 | @return The current value of SP.\r | |
5017 | \r | |
5018 | **/\r | |
5019 | UINT64\r | |
5020 | EFIAPI\r | |
5021 | AsmReadSp (\r | |
5022 | VOID\r | |
5023 | );\r | |
5024 | \r | |
5025 | \r | |
aad6137d | 5026 | ///\r |
af2dc6a7 | 5027 | /// Valid Index value for AsmReadControlRegister().\r |
aad6137d | 5028 | ///\r |
5029 | #define IPF_CONTROL_REGISTER_DCR 0\r | |
5030 | #define IPF_CONTROL_REGISTER_ITM 1\r | |
5031 | #define IPF_CONTROL_REGISTER_IVA 2\r | |
5032 | #define IPF_CONTROL_REGISTER_PTA 8\r | |
5033 | #define IPF_CONTROL_REGISTER_IPSR 16\r | |
5034 | #define IPF_CONTROL_REGISTER_ISR 17\r | |
5035 | #define IPF_CONTROL_REGISTER_IIP 19\r | |
5036 | #define IPF_CONTROL_REGISTER_IFA 20\r | |
5037 | #define IPF_CONTROL_REGISTER_ITIR 21\r | |
5038 | #define IPF_CONTROL_REGISTER_IIPA 22\r | |
5039 | #define IPF_CONTROL_REGISTER_IFS 23\r | |
5040 | #define IPF_CONTROL_REGISTER_IIM 24\r | |
5041 | #define IPF_CONTROL_REGISTER_IHA 25\r | |
5042 | #define IPF_CONTROL_REGISTER_LID 64\r | |
5043 | #define IPF_CONTROL_REGISTER_IVR 65\r | |
5044 | #define IPF_CONTROL_REGISTER_TPR 66\r | |
5045 | #define IPF_CONTROL_REGISTER_EOI 67\r | |
5046 | #define IPF_CONTROL_REGISTER_IRR0 68\r | |
5047 | #define IPF_CONTROL_REGISTER_IRR1 69\r | |
5048 | #define IPF_CONTROL_REGISTER_IRR2 70\r | |
5049 | #define IPF_CONTROL_REGISTER_IRR3 71\r | |
5050 | #define IPF_CONTROL_REGISTER_ITV 72\r | |
5051 | #define IPF_CONTROL_REGISTER_PMV 73\r | |
5052 | #define IPF_CONTROL_REGISTER_CMCV 74\r | |
5053 | #define IPF_CONTROL_REGISTER_LRR0 80\r | |
5054 | #define IPF_CONTROL_REGISTER_LRR1 81\r | |
5055 | \r | |
5056 | /**\r | |
5057 | Reads a 64-bit control register.\r | |
5058 | \r | |
af2dc6a7 | 5059 | Reads and returns the control register specified by Index. The valid Index valued \r |
5060 | are defined above in "Related Definitions".\r | |
5061 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
5062 | available on Itanium processors.\r | |
aad6137d | 5063 | \r |
5064 | @param Index The index of the control register to read.\r | |
5065 | \r | |
5066 | @return The control register specified by Index.\r | |
5067 | \r | |
5068 | **/\r | |
5069 | UINT64\r | |
5070 | EFIAPI\r | |
5071 | AsmReadControlRegister (\r | |
5072 | IN UINT64 Index\r | |
5073 | );\r | |
5074 | \r | |
5075 | \r | |
5076 | ///\r | |
af2dc6a7 | 5077 | /// Valid Index value for AsmReadApplicationRegister().\r |
aad6137d | 5078 | ///\r |
5079 | #define IPF_APPLICATION_REGISTER_K0 0\r | |
5080 | #define IPF_APPLICATION_REGISTER_K1 1\r | |
5081 | #define IPF_APPLICATION_REGISTER_K2 2\r | |
5082 | #define IPF_APPLICATION_REGISTER_K3 3\r | |
5083 | #define IPF_APPLICATION_REGISTER_K4 4\r | |
5084 | #define IPF_APPLICATION_REGISTER_K5 5\r | |
5085 | #define IPF_APPLICATION_REGISTER_K6 6\r | |
5086 | #define IPF_APPLICATION_REGISTER_K7 7\r | |
5087 | #define IPF_APPLICATION_REGISTER_RSC 16\r | |
5088 | #define IPF_APPLICATION_REGISTER_BSP 17\r | |
5089 | #define IPF_APPLICATION_REGISTER_BSPSTORE 18\r | |
5090 | #define IPF_APPLICATION_REGISTER_RNAT 19\r | |
5091 | #define IPF_APPLICATION_REGISTER_FCR 21\r | |
5092 | #define IPF_APPLICATION_REGISTER_EFLAG 24\r | |
5093 | #define IPF_APPLICATION_REGISTER_CSD 25\r | |
5094 | #define IPF_APPLICATION_REGISTER_SSD 26\r | |
5095 | #define IPF_APPLICATION_REGISTER_CFLG 27\r | |
5096 | #define IPF_APPLICATION_REGISTER_FSR 28\r | |
5097 | #define IPF_APPLICATION_REGISTER_FIR 29\r | |
5098 | #define IPF_APPLICATION_REGISTER_FDR 30\r | |
5099 | #define IPF_APPLICATION_REGISTER_CCV 32\r | |
5100 | #define IPF_APPLICATION_REGISTER_UNAT 36\r | |
5101 | #define IPF_APPLICATION_REGISTER_FPSR 40\r | |
5102 | #define IPF_APPLICATION_REGISTER_ITC 44\r | |
5103 | #define IPF_APPLICATION_REGISTER_PFS 64\r | |
5104 | #define IPF_APPLICATION_REGISTER_LC 65\r | |
5105 | #define IPF_APPLICATION_REGISTER_EC 66\r | |
5106 | \r | |
5107 | /**\r | |
5108 | Reads a 64-bit application register.\r | |
5109 | \r | |
af2dc6a7 | 5110 | Reads and returns the application register specified by Index. The valid Index \r |
5111 | valued are defined above in "Related Definitions".\r | |
5112 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
5113 | available on Itanium processors.\r | |
aad6137d | 5114 | \r |
5115 | @param Index The index of the application register to read.\r | |
5116 | \r | |
5117 | @return The application register specified by Index.\r | |
5118 | \r | |
5119 | **/\r | |
5120 | UINT64\r | |
5121 | EFIAPI\r | |
5122 | AsmReadApplicationRegister (\r | |
5123 | IN UINT64 Index\r | |
5124 | );\r | |
5125 | \r | |
5126 | \r | |
59e0bb0c | 5127 | /**\r |
5128 | Reads the current value of a Machine Specific Register (MSR).\r | |
5129 | \r | |
5130 | Reads and returns the current value of the Machine Specific Register specified by Index. No\r | |
5131 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
5132 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
5133 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 5134 | only available on Itanium processors.\r |
59e0bb0c | 5135 | \r |
5136 | @param Index The 8-bit Machine Specific Register index to read.\r | |
5137 | \r | |
5138 | @return The current value of the Machine Specific Register specified by Index. \r | |
5139 | \r | |
5140 | **/\r | |
5141 | UINT64\r | |
5142 | EFIAPI\r | |
5143 | AsmReadMsr (\r | |
5144 | IN UINT8 Index \r | |
5145 | );\r | |
5146 | \r | |
5147 | \r | |
5148 | /**\r | |
5149 | Writes the current value of a Machine Specific Register (MSR).\r | |
5150 | \r | |
5151 | Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r | |
5152 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
5153 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
5154 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 5155 | only available on Itanium processors.\r |
59e0bb0c | 5156 | \r |
5157 | @param Index The 8-bit Machine Specific Register index to write.\r | |
5158 | @param Value The 64-bit value to write to the Machine Specific Register.\r | |
5159 | \r | |
5160 | @return The 64-bit value to write to the Machine Specific Register. \r | |
5161 | \r | |
5162 | **/\r | |
5163 | UINT64\r | |
5164 | EFIAPI\r | |
5165 | AsmWriteMsr (\r | |
5166 | IN UINT8 Index, \r | |
5167 | IN UINT64 Value \r | |
5168 | );\r | |
5169 | \r | |
5170 | \r | |
ac644614 | 5171 | /**\r |
5172 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
5173 | \r | |
5174 | Determines the current execution mode of the CPU.\r | |
5175 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
5176 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
5177 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
5178 | and -1 is returned.\r | |
1a2f870c | 5179 | This function is only available on Itanium processors.\r |
ac644614 | 5180 | \r |
17f695ed | 5181 | @retval 1 The CPU is in virtual mode.\r |
5182 | @retval 0 The CPU is in physical mode.\r | |
5183 | @retval -1 The CPU is in mixed mode.\r | |
ac644614 | 5184 | \r |
5185 | **/\r | |
5186 | INT64\r | |
5187 | EFIAPI\r | |
5188 | AsmCpuVirtual (\r | |
5189 | VOID\r | |
5190 | );\r | |
5191 | \r | |
5192 | \r | |
5193 | /**\r | |
5194 | Makes a PAL procedure call.\r | |
5195 | \r | |
5196 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
5197 | value this API will make static or stacked PAL call. The following table\r | |
5198 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
5199 | may be designated as required or optional. If a PAL procedure is specified\r | |
5200 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
5201 | Status field of the PAL_CALL_RETURN structure.\r | |
5202 | This indicates that the procedure is not present in this PAL implementation.\r | |
5203 | It is the caller's responsibility to check for this return code after calling\r | |
5204 | any optional PAL procedure.\r | |
5205 | No parameter checking is performed on the 5 input parameters, but there are\r | |
5206 | some common rules that the caller should follow when making a PAL call. Any\r | |
5207 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
5208 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
5209 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
5210 | argument return value may be returned or undefined result may occur during the\r | |
5211 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
5212 | PAL entry point then the system behavior is undefined. This function is only\r | |
1a2f870c | 5213 | available on Itanium processors.\r |
ac644614 | 5214 | \r |
ee6c452c | 5215 | @param PalEntryPoint The PAL procedure calls entry point.\r |
5216 | @param Index The PAL procedure Index number.\r | |
5217 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
5218 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
5219 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
ac644614 | 5220 | \r |
5221 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
5222 | \r | |
5223 | **/\r | |
5224 | PAL_CALL_RETURN\r | |
5225 | EFIAPI\r | |
5226 | AsmPalCall (\r | |
5227 | IN UINT64 PalEntryPoint,\r | |
5228 | IN UINT64 Index,\r | |
5229 | IN UINT64 Arg2,\r | |
5230 | IN UINT64 Arg3,\r | |
5231 | IN UINT64 Arg4\r | |
5232 | );\r | |
fd163050 | 5233 | #endif\r |
ac644614 | 5234 | \r |
fd163050 | 5235 | #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r |
1106ffe1 | 5236 | ///\r |
af2dc6a7 | 5237 | /// IA32 and x64 Specific Functions.\r |
5238 | /// Byte packed structure for 16-bit Real Mode EFLAGS.\r | |
1106ffe1 | 5239 | ///\r |
ac644614 | 5240 | typedef union {\r |
5241 | struct {\r | |
af2dc6a7 | 5242 | UINT32 CF:1; ///< Carry Flag.\r |
5243 | UINT32 Reserved_0:1; ///< Reserved.\r | |
5244 | UINT32 PF:1; ///< Parity Flag.\r | |
5245 | UINT32 Reserved_1:1; ///< Reserved.\r | |
5246 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
5247 | UINT32 Reserved_2:1; ///< Reserved.\r | |
5248 | UINT32 ZF:1; ///< Zero Flag.\r | |
5249 | UINT32 SF:1; ///< Sign Flag.\r | |
5250 | UINT32 TF:1; ///< Trap Flag.\r | |
5251 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
5252 | UINT32 DF:1; ///< Direction Flag.\r | |
5253 | UINT32 OF:1; ///< Overflow Flag.\r | |
5254 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
5255 | UINT32 NT:1; ///< Nested Task.\r | |
5256 | UINT32 Reserved_3:1; ///< Reserved.\r | |
ac644614 | 5257 | } Bits;\r |
5258 | UINT16 Uint16;\r | |
5259 | } IA32_FLAGS16;\r | |
5260 | \r | |
1106ffe1 | 5261 | ///\r |
af2dc6a7 | 5262 | /// Byte packed structure for EFLAGS/RFLAGS.\r |
5263 | /// 32-bits on IA-32.\r | |
5264 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 5265 | ///\r |
ac644614 | 5266 | typedef union {\r |
5267 | struct {\r | |
af2dc6a7 | 5268 | UINT32 CF:1; ///< Carry Flag.\r |
5269 | UINT32 Reserved_0:1; ///< Reserved.\r | |
5270 | UINT32 PF:1; ///< Parity Flag.\r | |
5271 | UINT32 Reserved_1:1; ///< Reserved.\r | |
5272 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
5273 | UINT32 Reserved_2:1; ///< Reserved.\r | |
5274 | UINT32 ZF:1; ///< Zero Flag.\r | |
5275 | UINT32 SF:1; ///< Sign Flag.\r | |
5276 | UINT32 TF:1; ///< Trap Flag.\r | |
5277 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
5278 | UINT32 DF:1; ///< Direction Flag.\r | |
5279 | UINT32 OF:1; ///< Overflow Flag.\r | |
5280 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
5281 | UINT32 NT:1; ///< Nested Task.\r | |
5282 | UINT32 Reserved_3:1; ///< Reserved.\r | |
5283 | UINT32 RF:1; ///< Resume Flag.\r | |
5284 | UINT32 VM:1; ///< Virtual 8086 Mode.\r | |
5285 | UINT32 AC:1; ///< Alignment Check.\r | |
5286 | UINT32 VIF:1; ///< Virtual Interrupt Flag.\r | |
5287 | UINT32 VIP:1; ///< Virtual Interrupt Pending.\r | |
5288 | UINT32 ID:1; ///< ID Flag.\r | |
5289 | UINT32 Reserved_4:10; ///< Reserved.\r | |
ac644614 | 5290 | } Bits;\r |
5291 | UINTN UintN;\r | |
5292 | } IA32_EFLAGS32;\r | |
5293 | \r | |
1106ffe1 | 5294 | ///\r |
af2dc6a7 | 5295 | /// Byte packed structure for Control Register 0 (CR0).\r |
5296 | /// 32-bits on IA-32.\r | |
5297 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 5298 | ///\r |
ac644614 | 5299 | typedef union {\r |
5300 | struct {\r | |
af2dc6a7 | 5301 | UINT32 PE:1; ///< Protection Enable.\r |
5302 | UINT32 MP:1; ///< Monitor Coprocessor.\r | |
5303 | UINT32 EM:1; ///< Emulation.\r | |
5304 | UINT32 TS:1; ///< Task Switched.\r | |
5305 | UINT32 ET:1; ///< Extension Type.\r | |
5306 | UINT32 NE:1; ///< Numeric Error.\r | |
5307 | UINT32 Reserved_0:10; ///< Reserved.\r | |
5308 | UINT32 WP:1; ///< Write Protect.\r | |
5309 | UINT32 Reserved_1:1; ///< Reserved.\r | |
5310 | UINT32 AM:1; ///< Alignment Mask.\r | |
5311 | UINT32 Reserved_2:10; ///< Reserved.\r | |
5312 | UINT32 NW:1; ///< Mot Write-through.\r | |
5313 | UINT32 CD:1; ///< Cache Disable.\r | |
5314 | UINT32 PG:1; ///< Paging.\r | |
ac644614 | 5315 | } Bits;\r |
5316 | UINTN UintN;\r | |
5317 | } IA32_CR0;\r | |
5318 | \r | |
1106ffe1 | 5319 | ///\r |
af2dc6a7 | 5320 | /// Byte packed structure for Control Register 4 (CR4).\r |
5321 | /// 32-bits on IA-32.\r | |
5322 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 5323 | ///\r |
ac644614 | 5324 | typedef union {\r |
5325 | struct {\r | |
af2dc6a7 | 5326 | UINT32 VME:1; ///< Virtual-8086 Mode Extensions.\r |
5327 | UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.\r | |
5328 | UINT32 TSD:1; ///< Time Stamp Disable.\r | |
5329 | UINT32 DE:1; ///< Debugging Extensions.\r | |
5330 | UINT32 PSE:1; ///< Page Size Extensions.\r | |
5331 | UINT32 PAE:1; ///< Physical Address Extension.\r | |
5332 | UINT32 MCE:1; ///< Machine Check Enable.\r | |
5333 | UINT32 PGE:1; ///< Page Global Enable.\r | |
2a53dabf | 5334 | UINT32 PCE:1; ///< Performance Monitoring Counter\r |
af2dc6a7 | 5335 | ///< Enable.\r |
2a53dabf LG |
5336 | UINT32 OSFXSR:1; ///< Operating System Support for\r |
5337 | ///< FXSAVE and FXRSTOR instructions\r | |
5338 | UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r | |
5339 | ///< Unmasked SIMD Floating Point\r | |
af2dc6a7 | 5340 | ///< Exceptions.\r |
5341 | UINT32 Reserved_0:2; ///< Reserved.\r | |
2a53dabf | 5342 | UINT32 VMXE:1; ///< VMX Enable\r |
af2dc6a7 | 5343 | UINT32 Reserved_1:18; ///< Reserved.\r |
ac644614 | 5344 | } Bits;\r |
5345 | UINTN UintN;\r | |
5346 | } IA32_CR4;\r | |
5347 | \r | |
6088db38 | 5348 | ///\r |
5349 | /// Byte packed structure for a segment descriptor in a GDT/LDT.\r | |
5350 | ///\r | |
5351 | typedef union {\r | |
5352 | struct {\r | |
5353 | UINT32 LimitLow:16;\r | |
5354 | UINT32 BaseLow:16;\r | |
5355 | UINT32 BaseMid:8;\r | |
5356 | UINT32 Type:4;\r | |
5357 | UINT32 S:1;\r | |
5358 | UINT32 DPL:2;\r | |
5359 | UINT32 P:1;\r | |
5360 | UINT32 LimitHigh:4;\r | |
5361 | UINT32 AVL:1;\r | |
5362 | UINT32 L:1;\r | |
5363 | UINT32 DB:1;\r | |
5364 | UINT32 G:1;\r | |
5365 | UINT32 BaseHigh:8;\r | |
5366 | } Bits;\r | |
5367 | UINT64 Uint64;\r | |
5368 | } IA32_SEGMENT_DESCRIPTOR;\r | |
5369 | \r | |
1106ffe1 | 5370 | ///\r |
af2dc6a7 | 5371 | /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.\r |
1106ffe1 | 5372 | ///\r |
ac644614 | 5373 | #pragma pack (1)\r |
5374 | typedef struct {\r | |
5375 | UINT16 Limit;\r | |
5376 | UINTN Base;\r | |
5377 | } IA32_DESCRIPTOR;\r | |
5378 | #pragma pack ()\r | |
5379 | \r | |
5380 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
5381 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
5382 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
5383 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
5384 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
5385 | \r | |
6f4aad3b | 5386 | \r |
5387 | #if defined (MDE_CPU_IA32)\r | |
1106ffe1 | 5388 | ///\r |
af2dc6a7 | 5389 | /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.\r |
1106ffe1 | 5390 | ///\r |
dc317713 | 5391 | typedef union {\r |
5392 | struct {\r | |
af2dc6a7 | 5393 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
5394 | UINT32 Selector:16; ///< Selector.\r | |
5395 | UINT32 Reserved_0:8; ///< Reserved.\r | |
5396 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
5397 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
dc317713 | 5398 | } Bits;\r |
5399 | UINT64 Uint64;\r | |
5400 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
5401 | \r | |
5402 | #endif\r | |
5403 | \r | |
5404 | #if defined (MDE_CPU_X64)\r | |
6f4aad3b | 5405 | ///\r |
af2dc6a7 | 5406 | /// Byte packed structure for an x64 Interrupt Gate Descriptor.\r |
6f4aad3b | 5407 | ///\r |
ac644614 | 5408 | typedef union {\r |
5409 | struct {\r | |
af2dc6a7 | 5410 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
5411 | UINT32 Selector:16; ///< Selector.\r | |
5412 | UINT32 Reserved_0:8; ///< Reserved.\r | |
5413 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
5414 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
5415 | UINT32 OffsetUpper:32; ///< Offset bits 63..32.\r | |
5416 | UINT32 Reserved_1:32; ///< Reserved.\r | |
ac644614 | 5417 | } Bits;\r |
6f4aad3b | 5418 | struct {\r |
5419 | UINT64 Uint64;\r | |
5420 | UINT64 Uint64_1;\r | |
5421 | } Uint128; \r | |
ac644614 | 5422 | } IA32_IDT_GATE_DESCRIPTOR;\r |
5423 | \r | |
dc317713 | 5424 | #endif\r |
5425 | \r | |
1106ffe1 | 5426 | ///\r |
af2dc6a7 | 5427 | /// Byte packed structure for an FP/SSE/SSE2 context.\r |
1106ffe1 | 5428 | ///\r |
ac644614 | 5429 | typedef struct {\r |
5430 | UINT8 Buffer[512];\r | |
5431 | } IA32_FX_BUFFER;\r | |
5432 | \r | |
1106ffe1 | 5433 | ///\r |
af2dc6a7 | 5434 | /// Structures for the 16-bit real mode thunks.\r |
1106ffe1 | 5435 | ///\r |
ac644614 | 5436 | typedef struct {\r |
5437 | UINT32 Reserved1;\r | |
5438 | UINT32 Reserved2;\r | |
5439 | UINT32 Reserved3;\r | |
5440 | UINT32 Reserved4;\r | |
5441 | UINT8 BL;\r | |
5442 | UINT8 BH;\r | |
5443 | UINT16 Reserved5;\r | |
5444 | UINT8 DL;\r | |
5445 | UINT8 DH;\r | |
5446 | UINT16 Reserved6;\r | |
5447 | UINT8 CL;\r | |
5448 | UINT8 CH;\r | |
5449 | UINT16 Reserved7;\r | |
5450 | UINT8 AL;\r | |
5451 | UINT8 AH;\r | |
5452 | UINT16 Reserved8;\r | |
5453 | } IA32_BYTE_REGS;\r | |
5454 | \r | |
5455 | typedef struct {\r | |
5456 | UINT16 DI;\r | |
5457 | UINT16 Reserved1;\r | |
5458 | UINT16 SI;\r | |
5459 | UINT16 Reserved2;\r | |
5460 | UINT16 BP;\r | |
5461 | UINT16 Reserved3;\r | |
5462 | UINT16 SP;\r | |
5463 | UINT16 Reserved4;\r | |
5464 | UINT16 BX;\r | |
5465 | UINT16 Reserved5;\r | |
5466 | UINT16 DX;\r | |
5467 | UINT16 Reserved6;\r | |
5468 | UINT16 CX;\r | |
5469 | UINT16 Reserved7;\r | |
5470 | UINT16 AX;\r | |
5471 | UINT16 Reserved8;\r | |
5472 | } IA32_WORD_REGS;\r | |
5473 | \r | |
5474 | typedef struct {\r | |
5475 | UINT32 EDI;\r | |
5476 | UINT32 ESI;\r | |
5477 | UINT32 EBP;\r | |
5478 | UINT32 ESP;\r | |
5479 | UINT32 EBX;\r | |
5480 | UINT32 EDX;\r | |
5481 | UINT32 ECX;\r | |
5482 | UINT32 EAX;\r | |
5483 | UINT16 DS;\r | |
5484 | UINT16 ES;\r | |
5485 | UINT16 FS;\r | |
5486 | UINT16 GS;\r | |
5487 | IA32_EFLAGS32 EFLAGS;\r | |
5488 | UINT32 Eip;\r | |
5489 | UINT16 CS;\r | |
5490 | UINT16 SS;\r | |
5491 | } IA32_DWORD_REGS;\r | |
5492 | \r | |
5493 | typedef union {\r | |
5494 | IA32_DWORD_REGS E;\r | |
5495 | IA32_WORD_REGS X;\r | |
5496 | IA32_BYTE_REGS H;\r | |
5497 | } IA32_REGISTER_SET;\r | |
5498 | \r | |
1106ffe1 | 5499 | ///\r |
af2dc6a7 | 5500 | /// Byte packed structure for an 16-bit real mode thunks.\r |
1106ffe1 | 5501 | ///\r |
ac644614 | 5502 | typedef struct {\r |
5503 | IA32_REGISTER_SET *RealModeState;\r | |
5504 | VOID *RealModeBuffer;\r | |
5505 | UINT32 RealModeBufferSize;\r | |
5506 | UINT32 ThunkAttributes;\r | |
5507 | } THUNK_CONTEXT;\r | |
5508 | \r | |
5509 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
5510 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
5511 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
5512 | \r | |
5513 | /**\r | |
5514 | Retrieves CPUID information.\r | |
5515 | \r | |
5516 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
5517 | This function always returns Index.\r | |
5518 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5519 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5520 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5521 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
030cd1a2 | 5522 | This function is only available on IA-32 and x64.\r |
ac644614 | 5523 | \r |
5524 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
5525 | instruction.\r | |
af2dc6a7 | 5526 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5527 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5528 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5529 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5530 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5531 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5532 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5533 | instruction. This is an optional parameter that may be NULL.\r |
5534 | \r | |
2fe241a2 | 5535 | @return Index.\r |
ac644614 | 5536 | \r |
5537 | **/\r | |
5538 | UINT32\r | |
5539 | EFIAPI\r | |
5540 | AsmCpuid (\r | |
5541 | IN UINT32 Index,\r | |
5542 | OUT UINT32 *Eax, OPTIONAL\r | |
5543 | OUT UINT32 *Ebx, OPTIONAL\r | |
5544 | OUT UINT32 *Ecx, OPTIONAL\r | |
5545 | OUT UINT32 *Edx OPTIONAL\r | |
5546 | );\r | |
5547 | \r | |
5548 | \r | |
5549 | /**\r | |
5550 | Retrieves CPUID information using an extended leaf identifier.\r | |
5551 | \r | |
5552 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
5553 | and ECX set to the value specified by SubIndex. This function always returns\r | |
5554 | Index. This function is only available on IA-32 and x64.\r | |
5555 | \r | |
5556 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5557 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5558 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5559 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5560 | \r | |
5561 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
5562 | CPUID instruction.\r | |
5563 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
5564 | CPUID instruction.\r | |
af2dc6a7 | 5565 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5566 | instruction. This is an optional parameter that may be\r |
5567 | NULL.\r | |
af2dc6a7 | 5568 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5569 | instruction. This is an optional parameter that may be\r |
5570 | NULL.\r | |
af2dc6a7 | 5571 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5572 | instruction. This is an optional parameter that may be\r |
5573 | NULL.\r | |
af2dc6a7 | 5574 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5575 | instruction. This is an optional parameter that may be\r |
5576 | NULL.\r | |
5577 | \r | |
2fe241a2 | 5578 | @return Index.\r |
ac644614 | 5579 | \r |
5580 | **/\r | |
5581 | UINT32\r | |
5582 | EFIAPI\r | |
5583 | AsmCpuidEx (\r | |
5584 | IN UINT32 Index,\r | |
5585 | IN UINT32 SubIndex,\r | |
5586 | OUT UINT32 *Eax, OPTIONAL\r | |
5587 | OUT UINT32 *Ebx, OPTIONAL\r | |
5588 | OUT UINT32 *Ecx, OPTIONAL\r | |
5589 | OUT UINT32 *Edx OPTIONAL\r | |
5590 | );\r | |
5591 | \r | |
5592 | \r | |
be5f1614 | 5593 | /**\r |
5594 | Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r | |
5595 | \r | |
5596 | Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r | |
5597 | and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r | |
5598 | \r | |
5599 | **/\r | |
5600 | VOID\r | |
5601 | EFIAPI\r | |
5602 | AsmDisableCache (\r | |
5603 | VOID\r | |
5604 | );\r | |
5605 | \r | |
5606 | \r | |
5607 | /**\r | |
5608 | Perform a WBINVD and clear both the CD and NW bits of CR0.\r | |
5609 | \r | |
5610 | Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r | |
5611 | bits of CR0 to 0. This function is only available on IA-32 and x64.\r | |
5612 | \r | |
5613 | **/\r | |
5614 | VOID\r | |
5615 | EFIAPI\r | |
5616 | AsmEnableCache (\r | |
5617 | VOID\r | |
5618 | );\r | |
5619 | \r | |
5620 | \r | |
ac644614 | 5621 | /**\r |
5622 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
5623 | \r | |
5624 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
5625 | No parameter checking is performed on Index, and some Index values may cause\r | |
5626 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
5627 | caller must set up exception handlers to catch the exceptions. This function\r | |
030cd1a2 | 5628 | is only available on IA-32 and x64.\r |
ac644614 | 5629 | \r |
5630 | @param Index The 32-bit MSR index to read.\r | |
5631 | \r | |
5632 | @return The lower 32 bits of the MSR identified by Index.\r | |
5633 | \r | |
5634 | **/\r | |
5635 | UINT32\r | |
5636 | EFIAPI\r | |
5637 | AsmReadMsr32 (\r | |
5638 | IN UINT32 Index\r | |
5639 | );\r | |
5640 | \r | |
5641 | \r | |
5642 | /**\r | |
17f695ed | 5643 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
5644 | The upper 32-bits of the MSR are set to zero.\r | |
ac644614 | 5645 | \r |
5646 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
5647 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
5648 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
5649 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
5650 | that Index and Value are valid, or the caller must establish proper exception\r | |
030cd1a2 | 5651 | handlers. This function is only available on IA-32 and x64.\r |
ac644614 | 5652 | \r |
5653 | @param Index The 32-bit MSR index to write.\r | |
5654 | @param Value The 32-bit value to write to the MSR.\r | |
5655 | \r | |
5656 | @return Value\r | |
5657 | \r | |
5658 | **/\r | |
5659 | UINT32\r | |
5660 | EFIAPI\r | |
5661 | AsmWriteMsr32 (\r | |
5662 | IN UINT32 Index,\r | |
5663 | IN UINT32 Value\r | |
5664 | );\r | |
5665 | \r | |
5666 | \r | |
5667 | /**\r | |
62991af2 | 5668 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
ac644614 | 5669 | writes the result back to the 64-bit MSR.\r |
5670 | \r | |
62991af2 | 5671 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5672 | between the lower 32-bits of the read result and the value specified by\r |
5673 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
5674 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
5675 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
5676 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
5677 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5678 | IA-32 and x64.\r |
ac644614 | 5679 | \r |
5680 | @param Index The 32-bit MSR index to write.\r | |
5681 | @param OrData The value to OR with the read value from the MSR.\r | |
5682 | \r | |
5683 | @return The lower 32-bit value written to the MSR.\r | |
5684 | \r | |
5685 | **/\r | |
5686 | UINT32\r | |
5687 | EFIAPI\r | |
5688 | AsmMsrOr32 (\r | |
5689 | IN UINT32 Index,\r | |
5690 | IN UINT32 OrData\r | |
5691 | );\r | |
5692 | \r | |
5693 | \r | |
5694 | /**\r | |
5695 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
5696 | the result back to the 64-bit MSR.\r | |
5697 | \r | |
5698 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5699 | lower 32-bits of the read result and the value specified by AndData, and\r | |
5700 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
5701 | the value written to the MSR is returned. No parameter checking is performed\r | |
5702 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
5703 | must either guarantee that Index and AndData are valid, or the caller must\r | |
5704 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5705 | and x64.\r |
ac644614 | 5706 | \r |
5707 | @param Index The 32-bit MSR index to write.\r | |
5708 | @param AndData The value to AND with the read value from the MSR.\r | |
5709 | \r | |
5710 | @return The lower 32-bit value written to the MSR.\r | |
5711 | \r | |
5712 | **/\r | |
5713 | UINT32\r | |
5714 | EFIAPI\r | |
5715 | AsmMsrAnd32 (\r | |
5716 | IN UINT32 Index,\r | |
5717 | IN UINT32 AndData\r | |
5718 | );\r | |
5719 | \r | |
5720 | \r | |
5721 | /**\r | |
62991af2 | 5722 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
ac644614 | 5723 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
5724 | \r | |
5725 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5726 | lower 32-bits of the read result and the value specified by AndData\r | |
62991af2 | 5727 | preserving the upper 32-bits, performs a bitwise OR between the\r |
ac644614 | 5728 | result of the AND operation and the value specified by OrData, and writes the\r |
5729 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
5730 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
5731 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
5732 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
5733 | caller must establish proper exception handlers. This function is only\r | |
030cd1a2 | 5734 | available on IA-32 and x64.\r |
ac644614 | 5735 | \r |
5736 | @param Index The 32-bit MSR index to write.\r | |
5737 | @param AndData The value to AND with the read value from the MSR.\r | |
5738 | @param OrData The value to OR with the result of the AND operation.\r | |
5739 | \r | |
5740 | @return The lower 32-bit value written to the MSR.\r | |
5741 | \r | |
5742 | **/\r | |
5743 | UINT32\r | |
5744 | EFIAPI\r | |
5745 | AsmMsrAndThenOr32 (\r | |
5746 | IN UINT32 Index,\r | |
5747 | IN UINT32 AndData,\r | |
5748 | IN UINT32 OrData\r | |
5749 | );\r | |
5750 | \r | |
5751 | \r | |
5752 | /**\r | |
5753 | Reads a bit field of an MSR.\r | |
5754 | \r | |
5755 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
5756 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
5757 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
5758 | must set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5759 | available on IA-32 and x64.\r |
ac644614 | 5760 | \r |
5761 | If StartBit is greater than 31, then ASSERT().\r | |
5762 | If EndBit is greater than 31, then ASSERT().\r | |
5763 | If EndBit is less than StartBit, then ASSERT().\r | |
5764 | \r | |
5765 | @param Index The 32-bit MSR index to read.\r | |
5766 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5767 | Range 0..31.\r | |
5768 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5769 | Range 0..31.\r | |
5770 | \r | |
5771 | @return The bit field read from the MSR.\r | |
5772 | \r | |
5773 | **/\r | |
5774 | UINT32\r | |
5775 | EFIAPI\r | |
5776 | AsmMsrBitFieldRead32 (\r | |
5777 | IN UINT32 Index,\r | |
5778 | IN UINTN StartBit,\r | |
5779 | IN UINTN EndBit\r | |
5780 | );\r | |
5781 | \r | |
5782 | \r | |
5783 | /**\r | |
5784 | Writes a bit field to an MSR.\r | |
5785 | \r | |
2fe241a2 | 5786 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
ac644614 | 5787 | field is specified by the StartBit and the EndBit. All other bits in the\r |
5788 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
62991af2 | 5789 | returned. The caller must either guarantee that Index and the data written \r |
5790 | is valid, or the caller must set up exception handlers to catch the exceptions. \r | |
5791 | This function is only available on IA-32 and x64.\r | |
ac644614 | 5792 | \r |
5793 | If StartBit is greater than 31, then ASSERT().\r | |
5794 | If EndBit is greater than 31, then ASSERT().\r | |
5795 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5796 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5797 | \r |
5798 | @param Index The 32-bit MSR index to write.\r | |
5799 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5800 | Range 0..31.\r | |
5801 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5802 | Range 0..31.\r | |
5803 | @param Value New value of the bit field.\r | |
5804 | \r | |
5805 | @return The lower 32-bit of the value written to the MSR.\r | |
5806 | \r | |
5807 | **/\r | |
5808 | UINT32\r | |
5809 | EFIAPI\r | |
5810 | AsmMsrBitFieldWrite32 (\r | |
5811 | IN UINT32 Index,\r | |
5812 | IN UINTN StartBit,\r | |
5813 | IN UINTN EndBit,\r | |
5814 | IN UINT32 Value\r | |
5815 | );\r | |
5816 | \r | |
5817 | \r | |
5818 | /**\r | |
5819 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
5820 | result back to the bit field in the 64-bit MSR.\r | |
5821 | \r | |
62991af2 | 5822 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5823 | between the read result and the value specified by OrData, and writes the\r |
5824 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
5825 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
5826 | caller must either guarantee that Index and the data written is valid, or\r | |
5827 | the caller must set up exception handlers to catch the exceptions. This\r | |
030cd1a2 | 5828 | function is only available on IA-32 and x64.\r |
ac644614 | 5829 | \r |
5830 | If StartBit is greater than 31, then ASSERT().\r | |
5831 | If EndBit is greater than 31, then ASSERT().\r | |
5832 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5833 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5834 | \r |
5835 | @param Index The 32-bit MSR index to write.\r | |
5836 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5837 | Range 0..31.\r | |
5838 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5839 | Range 0..31.\r | |
5840 | @param OrData The value to OR with the read value from the MSR.\r | |
5841 | \r | |
5842 | @return The lower 32-bit of the value written to the MSR.\r | |
5843 | \r | |
5844 | **/\r | |
5845 | UINT32\r | |
5846 | EFIAPI\r | |
5847 | AsmMsrBitFieldOr32 (\r | |
5848 | IN UINT32 Index,\r | |
5849 | IN UINTN StartBit,\r | |
5850 | IN UINTN EndBit,\r | |
5851 | IN UINT32 OrData\r | |
5852 | );\r | |
5853 | \r | |
5854 | \r | |
5855 | /**\r | |
5856 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5857 | result back to the bit field in the 64-bit MSR.\r | |
5858 | \r | |
5859 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5860 | read result and the value specified by AndData, and writes the result to the\r | |
5861 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
5862 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
5863 | either guarantee that Index and the data written is valid, or the caller must\r | |
5864 | set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5865 | available on IA-32 and x64.\r |
ac644614 | 5866 | \r |
5867 | If StartBit is greater than 31, then ASSERT().\r | |
5868 | If EndBit is greater than 31, then ASSERT().\r | |
5869 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5870 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5871 | \r |
5872 | @param Index The 32-bit MSR index to write.\r | |
5873 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5874 | Range 0..31.\r | |
5875 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5876 | Range 0..31.\r | |
5877 | @param AndData The value to AND with the read value from the MSR.\r | |
5878 | \r | |
5879 | @return The lower 32-bit of the value written to the MSR.\r | |
5880 | \r | |
5881 | **/\r | |
5882 | UINT32\r | |
5883 | EFIAPI\r | |
5884 | AsmMsrBitFieldAnd32 (\r | |
5885 | IN UINT32 Index,\r | |
5886 | IN UINTN StartBit,\r | |
5887 | IN UINTN EndBit,\r | |
5888 | IN UINT32 AndData\r | |
5889 | );\r | |
5890 | \r | |
5891 | \r | |
5892 | /**\r | |
5893 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5894 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5895 | 64-bit MSR.\r |
5896 | \r | |
5897 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
62991af2 | 5898 | bitwise OR between the read result and the value specified by\r |
ac644614 | 5899 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5900 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
5901 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
5902 | that Index and the data written is valid, or the caller must set up exception\r | |
5903 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5904 | and x64.\r |
ac644614 | 5905 | \r |
5906 | If StartBit is greater than 31, then ASSERT().\r | |
5907 | If EndBit is greater than 31, then ASSERT().\r | |
5908 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
5909 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
5910 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 5911 | \r |
5912 | @param Index The 32-bit MSR index to write.\r | |
5913 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5914 | Range 0..31.\r | |
5915 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5916 | Range 0..31.\r | |
5917 | @param AndData The value to AND with the read value from the MSR.\r | |
5918 | @param OrData The value to OR with the result of the AND operation.\r | |
5919 | \r | |
5920 | @return The lower 32-bit of the value written to the MSR.\r | |
5921 | \r | |
5922 | **/\r | |
5923 | UINT32\r | |
5924 | EFIAPI\r | |
5925 | AsmMsrBitFieldAndThenOr32 (\r | |
5926 | IN UINT32 Index,\r | |
5927 | IN UINTN StartBit,\r | |
5928 | IN UINTN EndBit,\r | |
5929 | IN UINT32 AndData,\r | |
5930 | IN UINT32 OrData\r | |
5931 | );\r | |
5932 | \r | |
5933 | \r | |
5934 | /**\r | |
5935 | Returns a 64-bit Machine Specific Register(MSR).\r | |
5936 | \r | |
5937 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
5938 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
5939 | caller must either guarantee that Index is valid, or the caller must set up\r | |
5940 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5941 | on IA-32 and x64.\r |
ac644614 | 5942 | \r |
5943 | @param Index The 32-bit MSR index to read.\r | |
5944 | \r | |
5945 | @return The value of the MSR identified by Index.\r | |
5946 | \r | |
5947 | **/\r | |
5948 | UINT64\r | |
5949 | EFIAPI\r | |
5950 | AsmReadMsr64 (\r | |
5951 | IN UINT32 Index\r | |
5952 | );\r | |
5953 | \r | |
5954 | \r | |
5955 | /**\r | |
5956 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
5957 | value.\r | |
5958 | \r | |
5959 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
5960 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
5961 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
5962 | caller must either guarantee that Index and Value are valid, or the caller\r | |
5963 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5964 | IA-32 and x64.\r |
ac644614 | 5965 | \r |
5966 | @param Index The 32-bit MSR index to write.\r | |
5967 | @param Value The 64-bit value to write to the MSR.\r | |
5968 | \r | |
5969 | @return Value\r | |
5970 | \r | |
5971 | **/\r | |
5972 | UINT64\r | |
5973 | EFIAPI\r | |
5974 | AsmWriteMsr64 (\r | |
5975 | IN UINT32 Index,\r | |
5976 | IN UINT64 Value\r | |
5977 | );\r | |
5978 | \r | |
5979 | \r | |
5980 | /**\r | |
62991af2 | 5981 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
ac644614 | 5982 | back to the 64-bit MSR.\r |
5983 | \r | |
62991af2 | 5984 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5985 | between the read result and the value specified by OrData, and writes the\r |
5986 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5987 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
5988 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
5989 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
030cd1a2 | 5990 | This function is only available on IA-32 and x64.\r |
ac644614 | 5991 | \r |
5992 | @param Index The 32-bit MSR index to write.\r | |
5993 | @param OrData The value to OR with the read value from the MSR.\r | |
5994 | \r | |
5995 | @return The value written back to the MSR.\r | |
5996 | \r | |
5997 | **/\r | |
5998 | UINT64\r | |
5999 | EFIAPI\r | |
6000 | AsmMsrOr64 (\r | |
6001 | IN UINT32 Index,\r | |
6002 | IN UINT64 OrData\r | |
6003 | );\r | |
6004 | \r | |
6005 | \r | |
6006 | /**\r | |
6007 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
6008 | 64-bit MSR.\r | |
6009 | \r | |
6010 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
6011 | read result and the value specified by OrData, and writes the result to the\r | |
6012 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
6013 | parameter checking is performed on Index or OrData, and some of these may\r | |
6014 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
6015 | are valid, or the caller must establish proper exception handlers. This\r | |
030cd1a2 | 6016 | function is only available on IA-32 and x64.\r |
ac644614 | 6017 | \r |
6018 | @param Index The 32-bit MSR index to write.\r | |
6019 | @param AndData The value to AND with the read value from the MSR.\r | |
6020 | \r | |
6021 | @return The value written back to the MSR.\r | |
6022 | \r | |
6023 | **/\r | |
6024 | UINT64\r | |
6025 | EFIAPI\r | |
6026 | AsmMsrAnd64 (\r | |
6027 | IN UINT32 Index,\r | |
6028 | IN UINT64 AndData\r | |
6029 | );\r | |
6030 | \r | |
6031 | \r | |
6032 | /**\r | |
62991af2 | 6033 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r |
ac644614 | 6034 | OR, and writes the result back to the 64-bit MSR.\r |
6035 | \r | |
6036 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
62991af2 | 6037 | result and the value specified by AndData, performs a bitwise OR\r |
ac644614 | 6038 | between the result of the AND operation and the value specified by OrData,\r |
6039 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
6040 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
6041 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
6042 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
6043 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 6044 | and x64.\r |
ac644614 | 6045 | \r |
6046 | @param Index The 32-bit MSR index to write.\r | |
6047 | @param AndData The value to AND with the read value from the MSR.\r | |
6048 | @param OrData The value to OR with the result of the AND operation.\r | |
6049 | \r | |
6050 | @return The value written back to the MSR.\r | |
6051 | \r | |
6052 | **/\r | |
6053 | UINT64\r | |
6054 | EFIAPI\r | |
6055 | AsmMsrAndThenOr64 (\r | |
6056 | IN UINT32 Index,\r | |
6057 | IN UINT64 AndData,\r | |
6058 | IN UINT64 OrData\r | |
6059 | );\r | |
6060 | \r | |
6061 | \r | |
6062 | /**\r | |
6063 | Reads a bit field of an MSR.\r | |
6064 | \r | |
6065 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
6066 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
6067 | must either guarantee that Index is valid, or the caller must set up\r | |
6068 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 6069 | on IA-32 and x64.\r |
ac644614 | 6070 | \r |
6071 | If StartBit is greater than 63, then ASSERT().\r | |
6072 | If EndBit is greater than 63, then ASSERT().\r | |
6073 | If EndBit is less than StartBit, then ASSERT().\r | |
6074 | \r | |
6075 | @param Index The 32-bit MSR index to read.\r | |
6076 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6077 | Range 0..63.\r | |
6078 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6079 | Range 0..63.\r | |
6080 | \r | |
6081 | @return The value read from the MSR.\r | |
6082 | \r | |
6083 | **/\r | |
6084 | UINT64\r | |
6085 | EFIAPI\r | |
6086 | AsmMsrBitFieldRead64 (\r | |
6087 | IN UINT32 Index,\r | |
6088 | IN UINTN StartBit,\r | |
6089 | IN UINTN EndBit\r | |
6090 | );\r | |
6091 | \r | |
6092 | \r | |
6093 | /**\r | |
6094 | Writes a bit field to an MSR.\r | |
6095 | \r | |
6096 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
6097 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
62991af2 | 6098 | preserved. The MSR written is returned. The caller must either guarantee \r |
6099 | that Index and the data written is valid, or the caller must set up exception \r | |
6100 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r | |
ac644614 | 6101 | \r |
6102 | If StartBit is greater than 63, then ASSERT().\r | |
6103 | If EndBit is greater than 63, then ASSERT().\r | |
6104 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 6105 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 6106 | \r |
6107 | @param Index The 32-bit MSR index to write.\r | |
6108 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6109 | Range 0..63.\r | |
6110 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6111 | Range 0..63.\r | |
6112 | @param Value New value of the bit field.\r | |
6113 | \r | |
6114 | @return The value written back to the MSR.\r | |
6115 | \r | |
6116 | **/\r | |
6117 | UINT64\r | |
6118 | EFIAPI\r | |
6119 | AsmMsrBitFieldWrite64 (\r | |
6120 | IN UINT32 Index,\r | |
6121 | IN UINTN StartBit,\r | |
6122 | IN UINTN EndBit,\r | |
6123 | IN UINT64 Value\r | |
6124 | );\r | |
6125 | \r | |
6126 | \r | |
6127 | /**\r | |
62991af2 | 6128 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
ac644614 | 6129 | writes the result back to the bit field in the 64-bit MSR.\r |
6130 | \r | |
62991af2 | 6131 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 6132 | between the read result and the value specified by OrData, and writes the\r |
6133 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
6134 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
6135 | guarantee that Index and the data written is valid, or the caller must set up\r | |
6136 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 6137 | on IA-32 and x64.\r |
ac644614 | 6138 | \r |
6139 | If StartBit is greater than 63, then ASSERT().\r | |
6140 | If EndBit is greater than 63, then ASSERT().\r | |
6141 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 6142 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 6143 | \r |
6144 | @param Index The 32-bit MSR index to write.\r | |
6145 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6146 | Range 0..63.\r | |
6147 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6148 | Range 0..63.\r | |
6149 | @param OrData The value to OR with the read value from the bit field.\r | |
6150 | \r | |
6151 | @return The value written back to the MSR.\r | |
6152 | \r | |
6153 | **/\r | |
6154 | UINT64\r | |
6155 | EFIAPI\r | |
6156 | AsmMsrBitFieldOr64 (\r | |
6157 | IN UINT32 Index,\r | |
6158 | IN UINTN StartBit,\r | |
6159 | IN UINTN EndBit,\r | |
6160 | IN UINT64 OrData\r | |
6161 | );\r | |
6162 | \r | |
6163 | \r | |
6164 | /**\r | |
6165 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
6166 | result back to the bit field in the 64-bit MSR.\r | |
6167 | \r | |
6168 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
6169 | read result and the value specified by AndData, and writes the result to the\r | |
6170 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
6171 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
6172 | that Index and the data written is valid, or the caller must set up exception\r | |
6173 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 6174 | and x64.\r |
ac644614 | 6175 | \r |
6176 | If StartBit is greater than 63, then ASSERT().\r | |
6177 | If EndBit is greater than 63, then ASSERT().\r | |
6178 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 6179 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 6180 | \r |
6181 | @param Index The 32-bit MSR index to write.\r | |
6182 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6183 | Range 0..63.\r | |
6184 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6185 | Range 0..63.\r | |
6186 | @param AndData The value to AND with the read value from the bit field.\r | |
6187 | \r | |
6188 | @return The value written back to the MSR.\r | |
6189 | \r | |
6190 | **/\r | |
6191 | UINT64\r | |
6192 | EFIAPI\r | |
6193 | AsmMsrBitFieldAnd64 (\r | |
6194 | IN UINT32 Index,\r | |
6195 | IN UINTN StartBit,\r | |
6196 | IN UINTN EndBit,\r | |
6197 | IN UINT64 AndData\r | |
6198 | );\r | |
6199 | \r | |
6200 | \r | |
6201 | /**\r | |
6202 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 6203 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 6204 | 64-bit MSR.\r |
6205 | \r | |
6206 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
62991af2 | 6207 | a bitwise OR between the read result and the value specified by\r |
ac644614 | 6208 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
6209 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
6210 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
6211 | written is valid, or the caller must set up exception handlers to catch the\r | |
030cd1a2 | 6212 | exceptions. This function is only available on IA-32 and x64.\r |
ac644614 | 6213 | \r |
6214 | If StartBit is greater than 63, then ASSERT().\r | |
6215 | If EndBit is greater than 63, then ASSERT().\r | |
6216 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
6217 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
6218 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 6219 | \r |
6220 | @param Index The 32-bit MSR index to write.\r | |
6221 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6222 | Range 0..63.\r | |
6223 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6224 | Range 0..63.\r | |
6225 | @param AndData The value to AND with the read value from the bit field.\r | |
6226 | @param OrData The value to OR with the result of the AND operation.\r | |
6227 | \r | |
6228 | @return The value written back to the MSR.\r | |
6229 | \r | |
6230 | **/\r | |
6231 | UINT64\r | |
6232 | EFIAPI\r | |
6233 | AsmMsrBitFieldAndThenOr64 (\r | |
6234 | IN UINT32 Index,\r | |
6235 | IN UINTN StartBit,\r | |
6236 | IN UINTN EndBit,\r | |
6237 | IN UINT64 AndData,\r | |
6238 | IN UINT64 OrData\r | |
6239 | );\r | |
6240 | \r | |
6241 | \r | |
6242 | /**\r | |
6243 | Reads the current value of the EFLAGS register.\r | |
6244 | \r | |
6245 | Reads and returns the current value of the EFLAGS register. This function is\r | |
030cd1a2 | 6246 | only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r |
6247 | 64-bit value on x64.\r | |
ac644614 | 6248 | \r |
030cd1a2 | 6249 | @return EFLAGS on IA-32 or RFLAGS on x64.\r |
ac644614 | 6250 | \r |
6251 | **/\r | |
6252 | UINTN\r | |
6253 | EFIAPI\r | |
6254 | AsmReadEflags (\r | |
6255 | VOID\r | |
6256 | );\r | |
6257 | \r | |
6258 | \r | |
6259 | /**\r | |
6260 | Reads the current value of the Control Register 0 (CR0).\r | |
6261 | \r | |
6262 | Reads and returns the current value of CR0. This function is only available\r | |
030cd1a2 | 6263 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6264 | x64.\r | |
ac644614 | 6265 | \r |
6266 | @return The value of the Control Register 0 (CR0).\r | |
6267 | \r | |
6268 | **/\r | |
6269 | UINTN\r | |
6270 | EFIAPI\r | |
6271 | AsmReadCr0 (\r | |
6272 | VOID\r | |
6273 | );\r | |
6274 | \r | |
6275 | \r | |
6276 | /**\r | |
6277 | Reads the current value of the Control Register 2 (CR2).\r | |
6278 | \r | |
6279 | Reads and returns the current value of CR2. This function is only available\r | |
030cd1a2 | 6280 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6281 | x64.\r | |
ac644614 | 6282 | \r |
6283 | @return The value of the Control Register 2 (CR2).\r | |
6284 | \r | |
6285 | **/\r | |
6286 | UINTN\r | |
6287 | EFIAPI\r | |
6288 | AsmReadCr2 (\r | |
6289 | VOID\r | |
6290 | );\r | |
6291 | \r | |
6292 | \r | |
6293 | /**\r | |
6294 | Reads the current value of the Control Register 3 (CR3).\r | |
6295 | \r | |
6296 | Reads and returns the current value of CR3. This function is only available\r | |
030cd1a2 | 6297 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6298 | x64.\r | |
ac644614 | 6299 | \r |
6300 | @return The value of the Control Register 3 (CR3).\r | |
6301 | \r | |
6302 | **/\r | |
6303 | UINTN\r | |
6304 | EFIAPI\r | |
6305 | AsmReadCr3 (\r | |
6306 | VOID\r | |
6307 | );\r | |
6308 | \r | |
6309 | \r | |
6310 | /**\r | |
6311 | Reads the current value of the Control Register 4 (CR4).\r | |
6312 | \r | |
6313 | Reads and returns the current value of CR4. This function is only available\r | |
030cd1a2 | 6314 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6315 | x64.\r | |
ac644614 | 6316 | \r |
6317 | @return The value of the Control Register 4 (CR4).\r | |
6318 | \r | |
6319 | **/\r | |
6320 | UINTN\r | |
6321 | EFIAPI\r | |
6322 | AsmReadCr4 (\r | |
6323 | VOID\r | |
6324 | );\r | |
6325 | \r | |
6326 | \r | |
6327 | /**\r | |
6328 | Writes a value to Control Register 0 (CR0).\r | |
6329 | \r | |
6330 | Writes and returns a new value to CR0. This function is only available on\r | |
030cd1a2 | 6331 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6332 | \r |
6333 | @param Cr0 The value to write to CR0.\r | |
6334 | \r | |
6335 | @return The value written to CR0.\r | |
6336 | \r | |
6337 | **/\r | |
6338 | UINTN\r | |
6339 | EFIAPI\r | |
6340 | AsmWriteCr0 (\r | |
6341 | UINTN Cr0\r | |
6342 | );\r | |
6343 | \r | |
6344 | \r | |
6345 | /**\r | |
6346 | Writes a value to Control Register 2 (CR2).\r | |
6347 | \r | |
6348 | Writes and returns a new value to CR2. This function is only available on\r | |
030cd1a2 | 6349 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6350 | \r |
6351 | @param Cr2 The value to write to CR2.\r | |
6352 | \r | |
6353 | @return The value written to CR2.\r | |
6354 | \r | |
6355 | **/\r | |
6356 | UINTN\r | |
6357 | EFIAPI\r | |
6358 | AsmWriteCr2 (\r | |
6359 | UINTN Cr2\r | |
6360 | );\r | |
6361 | \r | |
6362 | \r | |
6363 | /**\r | |
6364 | Writes a value to Control Register 3 (CR3).\r | |
6365 | \r | |
6366 | Writes and returns a new value to CR3. This function is only available on\r | |
030cd1a2 | 6367 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6368 | \r |
6369 | @param Cr3 The value to write to CR3.\r | |
6370 | \r | |
6371 | @return The value written to CR3.\r | |
6372 | \r | |
6373 | **/\r | |
6374 | UINTN\r | |
6375 | EFIAPI\r | |
6376 | AsmWriteCr3 (\r | |
6377 | UINTN Cr3\r | |
6378 | );\r | |
6379 | \r | |
6380 | \r | |
6381 | /**\r | |
6382 | Writes a value to Control Register 4 (CR4).\r | |
6383 | \r | |
6384 | Writes and returns a new value to CR4. This function is only available on\r | |
030cd1a2 | 6385 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6386 | \r |
6387 | @param Cr4 The value to write to CR4.\r | |
6388 | \r | |
6389 | @return The value written to CR4.\r | |
6390 | \r | |
6391 | **/\r | |
6392 | UINTN\r | |
6393 | EFIAPI\r | |
6394 | AsmWriteCr4 (\r | |
6395 | UINTN Cr4\r | |
6396 | );\r | |
6397 | \r | |
6398 | \r | |
6399 | /**\r | |
6400 | Reads the current value of Debug Register 0 (DR0).\r | |
6401 | \r | |
6402 | Reads and returns the current value of DR0. This function is only available\r | |
030cd1a2 | 6403 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6404 | x64.\r | |
ac644614 | 6405 | \r |
6406 | @return The value of Debug Register 0 (DR0).\r | |
6407 | \r | |
6408 | **/\r | |
6409 | UINTN\r | |
6410 | EFIAPI\r | |
6411 | AsmReadDr0 (\r | |
6412 | VOID\r | |
6413 | );\r | |
6414 | \r | |
6415 | \r | |
6416 | /**\r | |
6417 | Reads the current value of Debug Register 1 (DR1).\r | |
6418 | \r | |
6419 | Reads and returns the current value of DR1. This function is only available\r | |
030cd1a2 | 6420 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6421 | x64.\r | |
ac644614 | 6422 | \r |
6423 | @return The value of Debug Register 1 (DR1).\r | |
6424 | \r | |
6425 | **/\r | |
6426 | UINTN\r | |
6427 | EFIAPI\r | |
6428 | AsmReadDr1 (\r | |
6429 | VOID\r | |
6430 | );\r | |
6431 | \r | |
6432 | \r | |
6433 | /**\r | |
6434 | Reads the current value of Debug Register 2 (DR2).\r | |
6435 | \r | |
6436 | Reads and returns the current value of DR2. This function is only available\r | |
030cd1a2 | 6437 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6438 | x64.\r | |
ac644614 | 6439 | \r |
6440 | @return The value of Debug Register 2 (DR2).\r | |
6441 | \r | |
6442 | **/\r | |
6443 | UINTN\r | |
6444 | EFIAPI\r | |
6445 | AsmReadDr2 (\r | |
6446 | VOID\r | |
6447 | );\r | |
6448 | \r | |
6449 | \r | |
6450 | /**\r | |
6451 | Reads the current value of Debug Register 3 (DR3).\r | |
6452 | \r | |
6453 | Reads and returns the current value of DR3. This function is only available\r | |
030cd1a2 | 6454 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6455 | x64.\r | |
ac644614 | 6456 | \r |
6457 | @return The value of Debug Register 3 (DR3).\r | |
6458 | \r | |
6459 | **/\r | |
6460 | UINTN\r | |
6461 | EFIAPI\r | |
6462 | AsmReadDr3 (\r | |
6463 | VOID\r | |
6464 | );\r | |
6465 | \r | |
6466 | \r | |
6467 | /**\r | |
6468 | Reads the current value of Debug Register 4 (DR4).\r | |
6469 | \r | |
6470 | Reads and returns the current value of DR4. This function is only available\r | |
030cd1a2 | 6471 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6472 | x64.\r | |
ac644614 | 6473 | \r |
6474 | @return The value of Debug Register 4 (DR4).\r | |
6475 | \r | |
6476 | **/\r | |
6477 | UINTN\r | |
6478 | EFIAPI\r | |
6479 | AsmReadDr4 (\r | |
6480 | VOID\r | |
6481 | );\r | |
6482 | \r | |
6483 | \r | |
6484 | /**\r | |
6485 | Reads the current value of Debug Register 5 (DR5).\r | |
6486 | \r | |
6487 | Reads and returns the current value of DR5. This function is only available\r | |
030cd1a2 | 6488 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6489 | x64.\r | |
ac644614 | 6490 | \r |
6491 | @return The value of Debug Register 5 (DR5).\r | |
6492 | \r | |
6493 | **/\r | |
6494 | UINTN\r | |
6495 | EFIAPI\r | |
6496 | AsmReadDr5 (\r | |
6497 | VOID\r | |
6498 | );\r | |
6499 | \r | |
6500 | \r | |
6501 | /**\r | |
6502 | Reads the current value of Debug Register 6 (DR6).\r | |
6503 | \r | |
6504 | Reads and returns the current value of DR6. This function is only available\r | |
030cd1a2 | 6505 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6506 | x64.\r | |
ac644614 | 6507 | \r |
6508 | @return The value of Debug Register 6 (DR6).\r | |
6509 | \r | |
6510 | **/\r | |
6511 | UINTN\r | |
6512 | EFIAPI\r | |
6513 | AsmReadDr6 (\r | |
6514 | VOID\r | |
6515 | );\r | |
6516 | \r | |
6517 | \r | |
6518 | /**\r | |
6519 | Reads the current value of Debug Register 7 (DR7).\r | |
6520 | \r | |
6521 | Reads and returns the current value of DR7. This function is only available\r | |
030cd1a2 | 6522 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6523 | x64.\r | |
ac644614 | 6524 | \r |
6525 | @return The value of Debug Register 7 (DR7).\r | |
6526 | \r | |
6527 | **/\r | |
6528 | UINTN\r | |
6529 | EFIAPI\r | |
6530 | AsmReadDr7 (\r | |
6531 | VOID\r | |
6532 | );\r | |
6533 | \r | |
6534 | \r | |
6535 | /**\r | |
6536 | Writes a value to Debug Register 0 (DR0).\r | |
6537 | \r | |
6538 | Writes and returns a new value to DR0. This function is only available on\r | |
030cd1a2 | 6539 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6540 | \r |
6541 | @param Dr0 The value to write to Dr0.\r | |
6542 | \r | |
6543 | @return The value written to Debug Register 0 (DR0).\r | |
6544 | \r | |
6545 | **/\r | |
6546 | UINTN\r | |
6547 | EFIAPI\r | |
6548 | AsmWriteDr0 (\r | |
6549 | UINTN Dr0\r | |
6550 | );\r | |
6551 | \r | |
6552 | \r | |
6553 | /**\r | |
6554 | Writes a value to Debug Register 1 (DR1).\r | |
6555 | \r | |
6556 | Writes and returns a new value to DR1. This function is only available on\r | |
030cd1a2 | 6557 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6558 | \r |
6559 | @param Dr1 The value to write to Dr1.\r | |
6560 | \r | |
6561 | @return The value written to Debug Register 1 (DR1).\r | |
6562 | \r | |
6563 | **/\r | |
6564 | UINTN\r | |
6565 | EFIAPI\r | |
6566 | AsmWriteDr1 (\r | |
6567 | UINTN Dr1\r | |
6568 | );\r | |
6569 | \r | |
6570 | \r | |
6571 | /**\r | |
6572 | Writes a value to Debug Register 2 (DR2).\r | |
6573 | \r | |
6574 | Writes and returns a new value to DR2. This function is only available on\r | |
030cd1a2 | 6575 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6576 | \r |
6577 | @param Dr2 The value to write to Dr2.\r | |
6578 | \r | |
6579 | @return The value written to Debug Register 2 (DR2).\r | |
6580 | \r | |
6581 | **/\r | |
6582 | UINTN\r | |
6583 | EFIAPI\r | |
6584 | AsmWriteDr2 (\r | |
6585 | UINTN Dr2\r | |
6586 | );\r | |
6587 | \r | |
6588 | \r | |
6589 | /**\r | |
6590 | Writes a value to Debug Register 3 (DR3).\r | |
6591 | \r | |
6592 | Writes and returns a new value to DR3. This function is only available on\r | |
030cd1a2 | 6593 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6594 | \r |
6595 | @param Dr3 The value to write to Dr3.\r | |
6596 | \r | |
6597 | @return The value written to Debug Register 3 (DR3).\r | |
6598 | \r | |
6599 | **/\r | |
6600 | UINTN\r | |
6601 | EFIAPI\r | |
6602 | AsmWriteDr3 (\r | |
6603 | UINTN Dr3\r | |
6604 | );\r | |
6605 | \r | |
6606 | \r | |
6607 | /**\r | |
6608 | Writes a value to Debug Register 4 (DR4).\r | |
6609 | \r | |
6610 | Writes and returns a new value to DR4. This function is only available on\r | |
030cd1a2 | 6611 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6612 | \r |
6613 | @param Dr4 The value to write to Dr4.\r | |
6614 | \r | |
6615 | @return The value written to Debug Register 4 (DR4).\r | |
6616 | \r | |
6617 | **/\r | |
6618 | UINTN\r | |
6619 | EFIAPI\r | |
6620 | AsmWriteDr4 (\r | |
6621 | UINTN Dr4\r | |
6622 | );\r | |
6623 | \r | |
6624 | \r | |
6625 | /**\r | |
6626 | Writes a value to Debug Register 5 (DR5).\r | |
6627 | \r | |
6628 | Writes and returns a new value to DR5. This function is only available on\r | |
030cd1a2 | 6629 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6630 | \r |
6631 | @param Dr5 The value to write to Dr5.\r | |
6632 | \r | |
6633 | @return The value written to Debug Register 5 (DR5).\r | |
6634 | \r | |
6635 | **/\r | |
6636 | UINTN\r | |
6637 | EFIAPI\r | |
6638 | AsmWriteDr5 (\r | |
6639 | UINTN Dr5\r | |
6640 | );\r | |
6641 | \r | |
6642 | \r | |
6643 | /**\r | |
6644 | Writes a value to Debug Register 6 (DR6).\r | |
6645 | \r | |
6646 | Writes and returns a new value to DR6. This function is only available on\r | |
030cd1a2 | 6647 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6648 | \r |
6649 | @param Dr6 The value to write to Dr6.\r | |
6650 | \r | |
6651 | @return The value written to Debug Register 6 (DR6).\r | |
6652 | \r | |
6653 | **/\r | |
6654 | UINTN\r | |
6655 | EFIAPI\r | |
6656 | AsmWriteDr6 (\r | |
6657 | UINTN Dr6\r | |
6658 | );\r | |
6659 | \r | |
6660 | \r | |
6661 | /**\r | |
6662 | Writes a value to Debug Register 7 (DR7).\r | |
6663 | \r | |
6664 | Writes and returns a new value to DR7. This function is only available on\r | |
030cd1a2 | 6665 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6666 | \r |
6667 | @param Dr7 The value to write to Dr7.\r | |
6668 | \r | |
6669 | @return The value written to Debug Register 7 (DR7).\r | |
6670 | \r | |
6671 | **/\r | |
6672 | UINTN\r | |
6673 | EFIAPI\r | |
6674 | AsmWriteDr7 (\r | |
6675 | UINTN Dr7\r | |
6676 | );\r | |
6677 | \r | |
6678 | \r | |
6679 | /**\r | |
6680 | Reads the current value of Code Segment Register (CS).\r | |
6681 | \r | |
6682 | Reads and returns the current value of CS. This function is only available on\r | |
030cd1a2 | 6683 | IA-32 and x64.\r |
ac644614 | 6684 | \r |
6685 | @return The current value of CS.\r | |
6686 | \r | |
6687 | **/\r | |
6688 | UINT16\r | |
6689 | EFIAPI\r | |
6690 | AsmReadCs (\r | |
6691 | VOID\r | |
6692 | );\r | |
6693 | \r | |
6694 | \r | |
6695 | /**\r | |
6696 | Reads the current value of Data Segment Register (DS).\r | |
6697 | \r | |
6698 | Reads and returns the current value of DS. This function is only available on\r | |
030cd1a2 | 6699 | IA-32 and x64.\r |
ac644614 | 6700 | \r |
6701 | @return The current value of DS.\r | |
6702 | \r | |
6703 | **/\r | |
6704 | UINT16\r | |
6705 | EFIAPI\r | |
6706 | AsmReadDs (\r | |
6707 | VOID\r | |
6708 | );\r | |
6709 | \r | |
6710 | \r | |
6711 | /**\r | |
6712 | Reads the current value of Extra Segment Register (ES).\r | |
6713 | \r | |
6714 | Reads and returns the current value of ES. This function is only available on\r | |
030cd1a2 | 6715 | IA-32 and x64.\r |
ac644614 | 6716 | \r |
6717 | @return The current value of ES.\r | |
6718 | \r | |
6719 | **/\r | |
6720 | UINT16\r | |
6721 | EFIAPI\r | |
6722 | AsmReadEs (\r | |
6723 | VOID\r | |
6724 | );\r | |
6725 | \r | |
6726 | \r | |
6727 | /**\r | |
6728 | Reads the current value of FS Data Segment Register (FS).\r | |
6729 | \r | |
6730 | Reads and returns the current value of FS. This function is only available on\r | |
030cd1a2 | 6731 | IA-32 and x64.\r |
ac644614 | 6732 | \r |
6733 | @return The current value of FS.\r | |
6734 | \r | |
6735 | **/\r | |
6736 | UINT16\r | |
6737 | EFIAPI\r | |
6738 | AsmReadFs (\r | |
6739 | VOID\r | |
6740 | );\r | |
6741 | \r | |
6742 | \r | |
6743 | /**\r | |
6744 | Reads the current value of GS Data Segment Register (GS).\r | |
6745 | \r | |
6746 | Reads and returns the current value of GS. This function is only available on\r | |
030cd1a2 | 6747 | IA-32 and x64.\r |
ac644614 | 6748 | \r |
6749 | @return The current value of GS.\r | |
6750 | \r | |
6751 | **/\r | |
6752 | UINT16\r | |
6753 | EFIAPI\r | |
6754 | AsmReadGs (\r | |
6755 | VOID\r | |
6756 | );\r | |
6757 | \r | |
6758 | \r | |
6759 | /**\r | |
6760 | Reads the current value of Stack Segment Register (SS).\r | |
6761 | \r | |
6762 | Reads and returns the current value of SS. This function is only available on\r | |
030cd1a2 | 6763 | IA-32 and x64.\r |
ac644614 | 6764 | \r |
6765 | @return The current value of SS.\r | |
6766 | \r | |
6767 | **/\r | |
6768 | UINT16\r | |
6769 | EFIAPI\r | |
6770 | AsmReadSs (\r | |
6771 | VOID\r | |
6772 | );\r | |
6773 | \r | |
6774 | \r | |
6775 | /**\r | |
6776 | Reads the current value of Task Register (TR).\r | |
6777 | \r | |
6778 | Reads and returns the current value of TR. This function is only available on\r | |
030cd1a2 | 6779 | IA-32 and x64.\r |
ac644614 | 6780 | \r |
6781 | @return The current value of TR.\r | |
6782 | \r | |
6783 | **/\r | |
6784 | UINT16\r | |
6785 | EFIAPI\r | |
6786 | AsmReadTr (\r | |
6787 | VOID\r | |
6788 | );\r | |
6789 | \r | |
6790 | \r | |
6791 | /**\r | |
6792 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
6793 | \r | |
6794 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
030cd1a2 | 6795 | function is only available on IA-32 and x64.\r |
ac644614 | 6796 | \r |
6797 | If Gdtr is NULL, then ASSERT().\r | |
6798 | \r | |
af2dc6a7 | 6799 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6800 | \r |
6801 | **/\r | |
6802 | VOID\r | |
6803 | EFIAPI\r | |
6804 | AsmReadGdtr (\r | |
6805 | OUT IA32_DESCRIPTOR *Gdtr\r | |
6806 | );\r | |
6807 | \r | |
6808 | \r | |
6809 | /**\r | |
6810 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
6811 | \r | |
6812 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
030cd1a2 | 6813 | only available on IA-32 and x64.\r |
ac644614 | 6814 | \r |
6815 | If Gdtr is NULL, then ASSERT().\r | |
6816 | \r | |
af2dc6a7 | 6817 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6818 | \r |
6819 | **/\r | |
6820 | VOID\r | |
6821 | EFIAPI\r | |
6822 | AsmWriteGdtr (\r | |
6823 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
6824 | );\r | |
6825 | \r | |
6826 | \r | |
6827 | /**\r | |
17f695ed | 6828 | Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6829 | \r |
6830 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
030cd1a2 | 6831 | function is only available on IA-32 and x64.\r |
ac644614 | 6832 | \r |
6833 | If Idtr is NULL, then ASSERT().\r | |
6834 | \r | |
af2dc6a7 | 6835 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6836 | \r |
6837 | **/\r | |
6838 | VOID\r | |
6839 | EFIAPI\r | |
6840 | AsmReadIdtr (\r | |
6841 | OUT IA32_DESCRIPTOR *Idtr\r | |
6842 | );\r | |
6843 | \r | |
6844 | \r | |
6845 | /**\r | |
17f695ed | 6846 | Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6847 | \r |
6848 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
030cd1a2 | 6849 | only available on IA-32 and x64.\r |
ac644614 | 6850 | \r |
6851 | If Idtr is NULL, then ASSERT().\r | |
6852 | \r | |
af2dc6a7 | 6853 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6854 | \r |
6855 | **/\r | |
6856 | VOID\r | |
6857 | EFIAPI\r | |
6858 | AsmWriteIdtr (\r | |
6859 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
6860 | );\r | |
6861 | \r | |
6862 | \r | |
6863 | /**\r | |
6864 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
6865 | \r | |
6866 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
030cd1a2 | 6867 | only available on IA-32 and x64.\r |
ac644614 | 6868 | \r |
6869 | @return The current selector of LDT.\r | |
6870 | \r | |
6871 | **/\r | |
6872 | UINT16\r | |
6873 | EFIAPI\r | |
6874 | AsmReadLdtr (\r | |
6875 | VOID\r | |
6876 | );\r | |
6877 | \r | |
6878 | \r | |
6879 | /**\r | |
17f695ed | 6880 | Writes the current Local Descriptor Table Register (LDTR) selector.\r |
ac644614 | 6881 | \r |
6882 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
030cd1a2 | 6883 | only available on IA-32 and x64.\r |
ac644614 | 6884 | \r |
6885 | @param Ldtr 16-bit LDTR selector value.\r | |
6886 | \r | |
6887 | **/\r | |
6888 | VOID\r | |
6889 | EFIAPI\r | |
6890 | AsmWriteLdtr (\r | |
6891 | IN UINT16 Ldtr\r | |
6892 | );\r | |
6893 | \r | |
6894 | \r | |
6895 | /**\r | |
6896 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
6897 | \r | |
6898 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
6899 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
030cd1a2 | 6900 | available on IA-32 and x64.\r |
ac644614 | 6901 | \r |
6902 | If Buffer is NULL, then ASSERT().\r | |
6903 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6904 | \r | |
af2dc6a7 | 6905 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6906 | \r |
6907 | **/\r | |
6908 | VOID\r | |
6909 | EFIAPI\r | |
6910 | AsmFxSave (\r | |
6911 | OUT IA32_FX_BUFFER *Buffer\r | |
6912 | );\r | |
6913 | \r | |
6914 | \r | |
6915 | /**\r | |
6916 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
6917 | \r | |
6918 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
6919 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
030cd1a2 | 6920 | only available on IA-32 and x64.\r |
ac644614 | 6921 | \r |
6922 | If Buffer is NULL, then ASSERT().\r | |
6923 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6924 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
6925 | \r | |
af2dc6a7 | 6926 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6927 | \r |
6928 | **/\r | |
6929 | VOID\r | |
6930 | EFIAPI\r | |
6931 | AsmFxRestore (\r | |
6932 | IN CONST IA32_FX_BUFFER *Buffer\r | |
6933 | );\r | |
6934 | \r | |
6935 | \r | |
6936 | /**\r | |
6937 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
6938 | \r | |
6939 | Reads and returns the current value of MM0. This function is only available\r | |
030cd1a2 | 6940 | on IA-32 and x64.\r |
ac644614 | 6941 | \r |
6942 | @return The current value of MM0.\r | |
6943 | \r | |
6944 | **/\r | |
6945 | UINT64\r | |
6946 | EFIAPI\r | |
6947 | AsmReadMm0 (\r | |
6948 | VOID\r | |
6949 | );\r | |
6950 | \r | |
6951 | \r | |
6952 | /**\r | |
6953 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
6954 | \r | |
6955 | Reads and returns the current value of MM1. This function is only available\r | |
030cd1a2 | 6956 | on IA-32 and x64.\r |
ac644614 | 6957 | \r |
6958 | @return The current value of MM1.\r | |
6959 | \r | |
6960 | **/\r | |
6961 | UINT64\r | |
6962 | EFIAPI\r | |
6963 | AsmReadMm1 (\r | |
6964 | VOID\r | |
6965 | );\r | |
6966 | \r | |
6967 | \r | |
6968 | /**\r | |
6969 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
6970 | \r | |
6971 | Reads and returns the current value of MM2. This function is only available\r | |
030cd1a2 | 6972 | on IA-32 and x64.\r |
ac644614 | 6973 | \r |
6974 | @return The current value of MM2.\r | |
6975 | \r | |
6976 | **/\r | |
6977 | UINT64\r | |
6978 | EFIAPI\r | |
6979 | AsmReadMm2 (\r | |
6980 | VOID\r | |
6981 | );\r | |
6982 | \r | |
6983 | \r | |
6984 | /**\r | |
6985 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
6986 | \r | |
6987 | Reads and returns the current value of MM3. This function is only available\r | |
030cd1a2 | 6988 | on IA-32 and x64.\r |
ac644614 | 6989 | \r |
6990 | @return The current value of MM3.\r | |
6991 | \r | |
6992 | **/\r | |
6993 | UINT64\r | |
6994 | EFIAPI\r | |
6995 | AsmReadMm3 (\r | |
6996 | VOID\r | |
6997 | );\r | |
6998 | \r | |
6999 | \r | |
7000 | /**\r | |
7001 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
7002 | \r | |
7003 | Reads and returns the current value of MM4. This function is only available\r | |
030cd1a2 | 7004 | on IA-32 and x64.\r |
ac644614 | 7005 | \r |
7006 | @return The current value of MM4.\r | |
7007 | \r | |
7008 | **/\r | |
7009 | UINT64\r | |
7010 | EFIAPI\r | |
7011 | AsmReadMm4 (\r | |
7012 | VOID\r | |
7013 | );\r | |
7014 | \r | |
7015 | \r | |
7016 | /**\r | |
7017 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
7018 | \r | |
7019 | Reads and returns the current value of MM5. This function is only available\r | |
030cd1a2 | 7020 | on IA-32 and x64.\r |
ac644614 | 7021 | \r |
7022 | @return The current value of MM5.\r | |
7023 | \r | |
7024 | **/\r | |
7025 | UINT64\r | |
7026 | EFIAPI\r | |
7027 | AsmReadMm5 (\r | |
7028 | VOID\r | |
7029 | );\r | |
7030 | \r | |
7031 | \r | |
7032 | /**\r | |
7033 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
7034 | \r | |
7035 | Reads and returns the current value of MM6. This function is only available\r | |
030cd1a2 | 7036 | on IA-32 and x64.\r |
ac644614 | 7037 | \r |
7038 | @return The current value of MM6.\r | |
7039 | \r | |
7040 | **/\r | |
7041 | UINT64\r | |
7042 | EFIAPI\r | |
7043 | AsmReadMm6 (\r | |
7044 | VOID\r | |
7045 | );\r | |
7046 | \r | |
7047 | \r | |
7048 | /**\r | |
7049 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
7050 | \r | |
7051 | Reads and returns the current value of MM7. This function is only available\r | |
030cd1a2 | 7052 | on IA-32 and x64.\r |
ac644614 | 7053 | \r |
7054 | @return The current value of MM7.\r | |
7055 | \r | |
7056 | **/\r | |
7057 | UINT64\r | |
7058 | EFIAPI\r | |
7059 | AsmReadMm7 (\r | |
7060 | VOID\r | |
7061 | );\r | |
7062 | \r | |
7063 | \r | |
7064 | /**\r | |
7065 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
7066 | \r | |
7067 | Writes the current value of MM0. This function is only available on IA32 and\r | |
030cd1a2 | 7068 | x64.\r |
ac644614 | 7069 | \r |
7070 | @param Value The 64-bit value to write to MM0.\r | |
7071 | \r | |
7072 | **/\r | |
7073 | VOID\r | |
7074 | EFIAPI\r | |
7075 | AsmWriteMm0 (\r | |
7076 | IN UINT64 Value\r | |
7077 | );\r | |
7078 | \r | |
7079 | \r | |
7080 | /**\r | |
7081 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
7082 | \r | |
7083 | Writes the current value of MM1. This function is only available on IA32 and\r | |
030cd1a2 | 7084 | x64.\r |
ac644614 | 7085 | \r |
7086 | @param Value The 64-bit value to write to MM1.\r | |
7087 | \r | |
7088 | **/\r | |
7089 | VOID\r | |
7090 | EFIAPI\r | |
7091 | AsmWriteMm1 (\r | |
7092 | IN UINT64 Value\r | |
7093 | );\r | |
7094 | \r | |
7095 | \r | |
7096 | /**\r | |
7097 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
7098 | \r | |
7099 | Writes the current value of MM2. This function is only available on IA32 and\r | |
030cd1a2 | 7100 | x64.\r |
ac644614 | 7101 | \r |
7102 | @param Value The 64-bit value to write to MM2.\r | |
7103 | \r | |
7104 | **/\r | |
7105 | VOID\r | |
7106 | EFIAPI\r | |
7107 | AsmWriteMm2 (\r | |
7108 | IN UINT64 Value\r | |
7109 | );\r | |
7110 | \r | |
7111 | \r | |
7112 | /**\r | |
7113 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
7114 | \r | |
7115 | Writes the current value of MM3. This function is only available on IA32 and\r | |
030cd1a2 | 7116 | x64.\r |
ac644614 | 7117 | \r |
7118 | @param Value The 64-bit value to write to MM3.\r | |
7119 | \r | |
7120 | **/\r | |
7121 | VOID\r | |
7122 | EFIAPI\r | |
7123 | AsmWriteMm3 (\r | |
7124 | IN UINT64 Value\r | |
7125 | );\r | |
7126 | \r | |
7127 | \r | |
7128 | /**\r | |
7129 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
7130 | \r | |
7131 | Writes the current value of MM4. This function is only available on IA32 and\r | |
030cd1a2 | 7132 | x64.\r |
ac644614 | 7133 | \r |
7134 | @param Value The 64-bit value to write to MM4.\r | |
7135 | \r | |
7136 | **/\r | |
7137 | VOID\r | |
7138 | EFIAPI\r | |
7139 | AsmWriteMm4 (\r | |
7140 | IN UINT64 Value\r | |
7141 | );\r | |
7142 | \r | |
7143 | \r | |
7144 | /**\r | |
7145 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
7146 | \r | |
7147 | Writes the current value of MM5. This function is only available on IA32 and\r | |
030cd1a2 | 7148 | x64.\r |
ac644614 | 7149 | \r |
7150 | @param Value The 64-bit value to write to MM5.\r | |
7151 | \r | |
7152 | **/\r | |
7153 | VOID\r | |
7154 | EFIAPI\r | |
7155 | AsmWriteMm5 (\r | |
7156 | IN UINT64 Value\r | |
7157 | );\r | |
7158 | \r | |
7159 | \r | |
7160 | /**\r | |
7161 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
7162 | \r | |
7163 | Writes the current value of MM6. This function is only available on IA32 and\r | |
030cd1a2 | 7164 | x64.\r |
ac644614 | 7165 | \r |
7166 | @param Value The 64-bit value to write to MM6.\r | |
7167 | \r | |
7168 | **/\r | |
7169 | VOID\r | |
7170 | EFIAPI\r | |
7171 | AsmWriteMm6 (\r | |
7172 | IN UINT64 Value\r | |
7173 | );\r | |
7174 | \r | |
7175 | \r | |
7176 | /**\r | |
7177 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
7178 | \r | |
7179 | Writes the current value of MM7. This function is only available on IA32 and\r | |
030cd1a2 | 7180 | x64.\r |
ac644614 | 7181 | \r |
7182 | @param Value The 64-bit value to write to MM7.\r | |
7183 | \r | |
7184 | **/\r | |
7185 | VOID\r | |
7186 | EFIAPI\r | |
7187 | AsmWriteMm7 (\r | |
7188 | IN UINT64 Value\r | |
7189 | );\r | |
7190 | \r | |
7191 | \r | |
7192 | /**\r | |
7193 | Reads the current value of Time Stamp Counter (TSC).\r | |
7194 | \r | |
7195 | Reads and returns the current value of TSC. This function is only available\r | |
030cd1a2 | 7196 | on IA-32 and x64.\r |
ac644614 | 7197 | \r |
7198 | @return The current value of TSC\r | |
7199 | \r | |
7200 | **/\r | |
7201 | UINT64\r | |
7202 | EFIAPI\r | |
7203 | AsmReadTsc (\r | |
7204 | VOID\r | |
7205 | );\r | |
7206 | \r | |
7207 | \r | |
7208 | /**\r | |
7209 | Reads the current value of a Performance Counter (PMC).\r | |
7210 | \r | |
7211 | Reads and returns the current value of performance counter specified by\r | |
030cd1a2 | 7212 | Index. This function is only available on IA-32 and x64.\r |
ac644614 | 7213 | \r |
7214 | @param Index The 32-bit Performance Counter index to read.\r | |
7215 | \r | |
7216 | @return The value of the PMC specified by Index.\r | |
7217 | \r | |
7218 | **/\r | |
7219 | UINT64\r | |
7220 | EFIAPI\r | |
7221 | AsmReadPmc (\r | |
7222 | IN UINT32 Index\r | |
7223 | );\r | |
7224 | \r | |
7225 | \r | |
7226 | /**\r | |
7227 | Sets up a monitor buffer that is used by AsmMwait().\r | |
7228 | \r | |
7229 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
030cd1a2 | 7230 | and Edx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 7231 | \r |
7232 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
7233 | instruction.\r | |
7234 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
7235 | instruction.\r | |
7236 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
7237 | instruction.\r | |
7238 | \r | |
7239 | @return Eax\r | |
7240 | \r | |
7241 | **/\r | |
7242 | UINTN\r | |
7243 | EFIAPI\r | |
7244 | AsmMonitor (\r | |
7245 | IN UINTN Eax,\r | |
7246 | IN UINTN Ecx,\r | |
7247 | IN UINTN Edx\r | |
7248 | );\r | |
7249 | \r | |
7250 | \r | |
7251 | /**\r | |
7252 | Executes an MWAIT instruction.\r | |
7253 | \r | |
7254 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
030cd1a2 | 7255 | Ecx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 7256 | \r |
7257 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
7258 | instruction.\r | |
7259 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
7260 | instruction.\r | |
7261 | \r | |
7262 | @return Eax\r | |
7263 | \r | |
7264 | **/\r | |
7265 | UINTN\r | |
7266 | EFIAPI\r | |
7267 | AsmMwait (\r | |
7268 | IN UINTN Eax,\r | |
7269 | IN UINTN Ecx\r | |
7270 | );\r | |
7271 | \r | |
7272 | \r | |
7273 | /**\r | |
7274 | Executes a WBINVD instruction.\r | |
7275 | \r | |
7276 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 7277 | x64.\r |
ac644614 | 7278 | \r |
7279 | **/\r | |
7280 | VOID\r | |
7281 | EFIAPI\r | |
7282 | AsmWbinvd (\r | |
7283 | VOID\r | |
7284 | );\r | |
7285 | \r | |
7286 | \r | |
7287 | /**\r | |
7288 | Executes a INVD instruction.\r | |
7289 | \r | |
7290 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 7291 | x64.\r |
ac644614 | 7292 | \r |
7293 | **/\r | |
7294 | VOID\r | |
7295 | EFIAPI\r | |
7296 | AsmInvd (\r | |
7297 | VOID\r | |
7298 | );\r | |
7299 | \r | |
7300 | \r | |
7301 | /**\r | |
7302 | Flushes a cache line from all the instruction and data caches within the\r | |
7303 | coherency domain of the CPU.\r | |
7304 | \r | |
7305 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
030cd1a2 | 7306 | This function is only available on IA-32 and x64.\r |
ac644614 | 7307 | \r |
7308 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
7309 | in a physical addressing mode, then LinearAddress is a\r | |
7310 | physical address. If the CPU is in a virtual\r | |
7311 | addressing mode, then LinearAddress is a virtual\r | |
7312 | address.\r | |
7313 | \r | |
af2dc6a7 | 7314 | @return LinearAddress.\r |
ac644614 | 7315 | **/\r |
7316 | VOID *\r | |
7317 | EFIAPI\r | |
7318 | AsmFlushCacheLine (\r | |
7319 | IN VOID *LinearAddress\r | |
7320 | );\r | |
7321 | \r | |
7322 | \r | |
7323 | /**\r | |
7324 | Enables the 32-bit paging mode on the CPU.\r | |
7325 | \r | |
7326 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7327 | must be properly initialized prior to calling this service. This function\r | |
7328 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
7329 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
7330 | transferred to the function specified by EntryPoint using the new stack\r | |
7331 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
7332 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
7333 | EntryPoint must never return.\r | |
7334 | \r | |
7335 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
7336 | If EntryPoint is NULL, then ASSERT().\r | |
7337 | If NewStack is NULL, then ASSERT().\r | |
7338 | \r | |
7339 | There are a number of constraints that must be followed before calling this\r | |
7340 | function:\r | |
7341 | 1) Interrupts must be disabled.\r | |
7342 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
7343 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
7344 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
7345 | descriptors.\r | |
7346 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
7347 | is complete, and those page tables must guarantee that the pages for this\r | |
7348 | function and the stack are identity mapped.\r | |
7349 | \r | |
7350 | @param EntryPoint A pointer to function to call with the new stack after\r | |
7351 | paging is enabled.\r | |
7352 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
7353 | function as the first parameter after paging is enabled.\r | |
7354 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
7355 | function as the second parameter after paging is enabled.\r | |
7356 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
7357 | function after paging is enabled.\r | |
7358 | \r | |
7359 | **/\r | |
7360 | VOID\r | |
7361 | EFIAPI\r | |
7362 | AsmEnablePaging32 (\r | |
7363 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7364 | IN VOID *Context1, OPTIONAL\r | |
7365 | IN VOID *Context2, OPTIONAL\r | |
7366 | IN VOID *NewStack\r | |
7367 | );\r | |
7368 | \r | |
7369 | \r | |
7370 | /**\r | |
7371 | Disables the 32-bit paging mode on the CPU.\r | |
7372 | \r | |
7373 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
7374 | mode. This function assumes the current execution mode is 32-paged protected\r | |
7375 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
7376 | is disabled, control is transferred to the function specified by EntryPoint\r | |
7377 | using the new stack specified by NewStack and passing in the parameters\r | |
7378 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7379 | may be NULL. The function EntryPoint must never return.\r | |
7380 | \r | |
7381 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
7382 | If EntryPoint is NULL, then ASSERT().\r | |
7383 | If NewStack is NULL, then ASSERT().\r | |
7384 | \r | |
7385 | There are a number of constraints that must be followed before calling this\r | |
7386 | function:\r | |
7387 | 1) Interrupts must be disabled.\r | |
7388 | 2) The caller must be in 32-bit paged mode.\r | |
7389 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
7390 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
7391 | this function and the stack are identity mapped.\r | |
7392 | \r | |
7393 | @param EntryPoint A pointer to function to call with the new stack after\r | |
7394 | paging is disabled.\r | |
7395 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
7396 | function as the first parameter after paging is disabled.\r | |
7397 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
7398 | function as the second parameter after paging is\r | |
7399 | disabled.\r | |
7400 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
7401 | function after paging is disabled.\r | |
7402 | \r | |
7403 | **/\r | |
7404 | VOID\r | |
7405 | EFIAPI\r | |
7406 | AsmDisablePaging32 (\r | |
7407 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7408 | IN VOID *Context1, OPTIONAL\r | |
7409 | IN VOID *Context2, OPTIONAL\r | |
7410 | IN VOID *NewStack\r | |
7411 | );\r | |
7412 | \r | |
7413 | \r | |
7414 | /**\r | |
7415 | Enables the 64-bit paging mode on the CPU.\r | |
7416 | \r | |
7417 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7418 | must be properly initialized prior to calling this service. This function\r | |
7419 | assumes the current execution mode is 32-bit protected mode with flat\r | |
7420 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
7421 | paging mode is enabled, control is transferred to the function specified by\r | |
7422 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
7423 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
7424 | optional and may be 0. The function EntryPoint must never return.\r | |
7425 | \r | |
7426 | If the current execution mode is not 32-bit protected mode with flat\r | |
7427 | descriptors, then ASSERT().\r | |
7428 | If EntryPoint is 0, then ASSERT().\r | |
7429 | If NewStack is 0, then ASSERT().\r | |
7430 | \r | |
17f695ed | 7431 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7432 | is called. The descriptor in the GDT that this selector\r |
7433 | references must be setup for long mode.\r | |
7434 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7435 | the new stack after paging is enabled.\r | |
7436 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7437 | the EntryPoint function as the first parameter after\r | |
7438 | paging is enabled.\r | |
7439 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7440 | the EntryPoint function as the second parameter after\r | |
7441 | paging is enabled.\r | |
7442 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7443 | the EntryPoint function after paging is enabled.\r | |
7444 | \r | |
7445 | **/\r | |
7446 | VOID\r | |
7447 | EFIAPI\r | |
7448 | AsmEnablePaging64 (\r | |
17f695ed | 7449 | IN UINT16 Cs,\r |
ac644614 | 7450 | IN UINT64 EntryPoint,\r |
7451 | IN UINT64 Context1, OPTIONAL\r | |
7452 | IN UINT64 Context2, OPTIONAL\r | |
7453 | IN UINT64 NewStack\r | |
7454 | );\r | |
7455 | \r | |
7456 | \r | |
7457 | /**\r | |
7458 | Disables the 64-bit paging mode on the CPU.\r | |
7459 | \r | |
7460 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
7461 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
030cd1a2 | 7462 | This function is only available on x64. After the 64-bit paging mode is\r |
ac644614 | 7463 | disabled, control is transferred to the function specified by EntryPoint\r |
7464 | using the new stack specified by NewStack and passing in the parameters\r | |
7465 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7466 | may be 0. The function EntryPoint must never return.\r | |
7467 | \r | |
7468 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
7469 | If EntryPoint is 0, then ASSERT().\r | |
7470 | If NewStack is 0, then ASSERT().\r | |
7471 | \r | |
17f695ed | 7472 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7473 | is called. The descriptor in the GDT that this selector\r |
7474 | references must be setup for 32-bit protected mode.\r | |
7475 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7476 | the new stack after paging is disabled.\r | |
7477 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7478 | the EntryPoint function as the first parameter after\r | |
7479 | paging is disabled.\r | |
7480 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7481 | the EntryPoint function as the second parameter after\r | |
7482 | paging is disabled.\r | |
7483 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7484 | the EntryPoint function after paging is disabled.\r | |
7485 | \r | |
7486 | **/\r | |
7487 | VOID\r | |
7488 | EFIAPI\r | |
7489 | AsmDisablePaging64 (\r | |
17f695ed | 7490 | IN UINT16 Cs,\r |
ac644614 | 7491 | IN UINT32 EntryPoint,\r |
7492 | IN UINT32 Context1, OPTIONAL\r | |
7493 | IN UINT32 Context2, OPTIONAL\r | |
7494 | IN UINT32 NewStack\r | |
7495 | );\r | |
7496 | \r | |
7497 | \r | |
7498 | //\r | |
7499 | // 16-bit thunking services\r | |
7500 | //\r | |
7501 | \r | |
7502 | /**\r | |
7503 | Retrieves the properties for 16-bit thunk functions.\r | |
7504 | \r | |
7505 | Computes the size of the buffer and stack below 1MB required to use the\r | |
7506 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
7507 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
7508 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
7509 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
7510 | of bytes that need to be passed to the 16-bit real mode code.\r | |
52fa075c | 7511 | \r |
ac644614 | 7512 | If RealModeBufferSize is NULL, then ASSERT().\r |
7513 | If ExtraStackSize is NULL, then ASSERT().\r | |
7514 | \r | |
7515 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
7516 | required to use the 16-bit thunk functions.\r | |
7517 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
7518 | that the 16-bit thunk functions require for\r | |
7519 | temporary storage in the transition to and from\r | |
7520 | 16-bit real mode.\r | |
7521 | \r | |
7522 | **/\r | |
7523 | VOID\r | |
7524 | EFIAPI\r | |
7525 | AsmGetThunk16Properties (\r | |
7526 | OUT UINT32 *RealModeBufferSize,\r | |
7527 | OUT UINT32 *ExtraStackSize\r | |
7528 | );\r | |
7529 | \r | |
7530 | \r | |
7531 | /**\r | |
7532 | Prepares all structures a code required to use AsmThunk16().\r | |
7533 | \r | |
7534 | Prepares all structures and code required to use AsmThunk16().\r | |
52fa075c | 7535 | \r |
8243b089 | 7536 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7537 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
ac644614 | 7538 | \r |
7539 | If ThunkContext is NULL, then ASSERT().\r | |
7540 | \r | |
7541 | @param ThunkContext A pointer to the context structure that describes the\r | |
7542 | 16-bit real mode code to call.\r | |
7543 | \r | |
7544 | **/\r | |
7545 | VOID\r | |
7546 | EFIAPI\r | |
7547 | AsmPrepareThunk16 (\r | |
1445300f | 7548 | IN OUT THUNK_CONTEXT *ThunkContext\r |
ac644614 | 7549 | );\r |
7550 | \r | |
7551 | \r | |
7552 | /**\r | |
7553 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7554 | \r | |
7555 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
17f695ed | 7556 | AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r |
7557 | This function must be called with interrupts disabled.\r | |
7558 | \r | |
7559 | The register state from the RealModeState field of ThunkContext is restored just prior \r | |
7560 | to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r | |
7561 | which is used to set the interrupt state when a 16-bit real mode entry point is called.\r | |
7562 | Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r | |
7563 | The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r | |
7564 | the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r | |
7565 | The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r | |
7566 | so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r | |
7567 | and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r | |
7568 | point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r | |
7569 | after the RETF instruction is executed.\r | |
7570 | \r | |
7571 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7572 | or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r | |
7573 | the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r | |
7574 | \r | |
7575 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7576 | then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r | |
7577 | This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r | |
7578 | \r | |
7579 | If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r | |
7580 | is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r | |
7581 | \r | |
7582 | If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r | |
7583 | ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r | |
7584 | disable the A20 mask.\r | |
7585 | \r | |
7586 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r | |
7587 | ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r | |
7588 | then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7589 | \r | |
7590 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r | |
7591 | ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7592 | \r | |
ac644614 | 7593 | If ThunkContext is NULL, then ASSERT().\r |
7594 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
17f695ed | 7595 | If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r |
7596 | ThunkAttributes, then ASSERT().\r | |
ac644614 | 7597 | \r |
8243b089 | 7598 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
af2dc6a7 | 7599 | virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.\r |
52fa075c | 7600 | \r |
ac644614 | 7601 | @param ThunkContext A pointer to the context structure that describes the\r |
7602 | 16-bit real mode code to call.\r | |
7603 | \r | |
7604 | **/\r | |
7605 | VOID\r | |
7606 | EFIAPI\r | |
7607 | AsmThunk16 (\r | |
7608 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7609 | );\r | |
7610 | \r | |
7611 | \r | |
7612 | /**\r | |
7613 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7614 | control to a 16-bit real mode entry point, and returns the results.\r | |
7615 | \r | |
7616 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7617 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
7618 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
7619 | service should be used. If the caller intends to make more than one 16-bit\r | |
7620 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
7621 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
7622 | \r | |
8243b089 | 7623 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7624 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
52fa075c | 7625 | \r |
17f695ed | 7626 | See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r |
ac644614 | 7627 | \r |
7628 | @param ThunkContext A pointer to the context structure that describes the\r | |
7629 | 16-bit real mode code to call.\r | |
7630 | \r | |
7631 | **/\r | |
7632 | VOID\r | |
7633 | EFIAPI\r | |
7634 | AsmPrepareAndThunk16 (\r | |
7635 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7636 | );\r | |
7637 | \r | |
ac644614 | 7638 | #endif\r |
e3a7917f | 7639 | #endif\r |
ac644614 | 7640 | \r |
7641 | \r |