Add reserved field to SAL_UPDATE_PAL_DATA_BLOCK so it is padded out to 64-bytes to...

[mirror_edk2.git] / MdePkg / Include / Library / BaseLib.h

/** @file\r
  Provides string functions, linked list functions, math functions, synchronization\r
  functions, and CPU architecture-specific functions.\r
\r
Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
Portions copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#ifndef __BASE_LIB__\r
#define __BASE_LIB__\r
\r
//\r
// Definitions for architecture-specific types\r
//\r
#if   defined (MDE_CPU_IA32)\r
///\r
/// IA-32 architecture context buffer used by SetJump() and LongJump()\r
///\r
typedef struct {\r
  UINT32                            Ebx;\r
  UINT32                            Esi;\r
  UINT32                            Edi;\r
  UINT32                            Ebp;\r
  UINT32                            Esp;\r
  UINT32                            Eip;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
\r
#endif // defined (MDE_CPU_IA32)\r
\r
#if defined (MDE_CPU_IPF)\r
\r
///\r
/// Itanium architecture context buffer used by SetJump() and LongJump()\r
///\r
typedef struct {\r
  UINT64                            F2[2];\r
  UINT64                            F3[2];\r
  UINT64                            F4[2];\r
  UINT64                            F5[2];\r
  UINT64                            F16[2];\r
  UINT64                            F17[2];\r
  UINT64                            F18[2];\r
  UINT64                            F19[2];\r
  UINT64                            F20[2];\r
  UINT64                            F21[2];\r
  UINT64                            F22[2];\r
  UINT64                            F23[2];\r
  UINT64                            F24[2];\r
  UINT64                            F25[2];\r
  UINT64                            F26[2];\r
  UINT64                            F27[2];\r
  UINT64                            F28[2];\r
  UINT64                            F29[2];\r
  UINT64                            F30[2];\r
  UINT64                            F31[2];\r
  UINT64                            R4;\r
  UINT64                            R5;\r
  UINT64                            R6;\r
  UINT64                            R7;\r
  UINT64                            SP;\r
  UINT64                            BR0;\r
  UINT64                            BR1;\r
  UINT64                            BR2;\r
  UINT64                            BR3;\r
  UINT64                            BR4;\r
  UINT64                            BR5;\r
  UINT64                            InitialUNAT;\r
  UINT64                            AfterSpillUNAT;\r
  UINT64                            PFS;\r
  UINT64                            BSP;\r
  UINT64                            Predicates;\r
  UINT64                            LoopCount;\r
  UINT64                            FPSR;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r
\r
#endif // defined (MDE_CPU_IPF)\r
\r
#if defined (MDE_CPU_X64)\r
///\r
/// x64 architecture context buffer used by SetJump() and LongJump()\r
///\r
typedef struct {\r
  UINT64                            Rbx;\r
  UINT64                            Rsp;\r
  UINT64                            Rbp;\r
  UINT64                            Rdi;\r
  UINT64                            Rsi;\r
  UINT64                            R12;\r
  UINT64                            R13;\r
  UINT64                            R14;\r
  UINT64                            R15;\r
  UINT64                            Rip;\r
  UINT64                            MxCsr;\r
  UINT8                             XmmBuffer[160]; ///< XMM6-XMM15\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
\r
#endif // defined (MDE_CPU_X64)\r
\r
#if defined (MDE_CPU_EBC)\r
///\r
/// EBC context buffer used by SetJump() and LongJump()\r
///\r
typedef struct {\r
  UINT64                            R0;\r
  UINT64                            R1;\r
  UINT64                            R2;\r
  UINT64                            R3;\r
  UINT64                            IP;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
\r
#endif // defined (MDE_CPU_EBC)\r
\r
#if defined (MDE_CPU_ARM)\r
\r
typedef struct {\r
  UINT32    R3;  ///< Copy of R13\r
  UINT32    R4;\r
  UINT32    R5;\r
  UINT32    R6;\r
  UINT32    R7;\r
  UINT32    R8;\r
  UINT32    R9;\r
  UINT32    R10;\r
  UINT32    R11;\r
  UINT32    R12;\r
  UINT32    R14;\r
} BASE_LIBRARY_JUMP_BUFFER;\r
\r
#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
\r
#endif  // defined (MDE_CPU_ARM)\r
\r
//\r
// String Services\r
//\r
\r
/**\r
  Copies one Null-terminated Unicode string to another Null-terminated Unicode\r
  string and returns the new Unicode string.\r
\r
  This function copies the contents of the Unicode string Source to the Unicode\r
  string Destination, and returns Destination. If Source and Destination\r
  overlap, then the results are undefined.\r
\r
  If Destination is NULL, then ASSERT().\r
  If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source is NULL, then ASSERT().\r
  If Source is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated Unicode string.\r
  @param  Source      Pointer to a Null-terminated Unicode string.\r
\r
  @return Destination.\r
\r
**/\r
CHAR16 *\r
EFIAPI\r
StrCpy (\r
  OUT     CHAR16                    *Destination,\r
  IN      CONST CHAR16              *Source\r
  );\r
\r
\r
/**\r
  Copies up to a specified length from one Null-terminated Unicode string  to \r
  another Null-terminated Unicode string and returns the new Unicode string.\r
\r
  This function copies the contents of the Unicode string Source to the Unicode\r
  string Destination, and returns Destination. At most, Length Unicode\r
  characters are copied from Source to Destination. If Length is 0, then\r
  Destination is returned unmodified. If Length is greater that the number of\r
  Unicode characters in Source, then Destination is padded with Null Unicode\r
  characters. If Source and Destination overlap, then the results are\r
  undefined.\r
\r
  If Length > 0 and Destination is NULL, then ASSERT().\r
  If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
  If Length > 0 and Source is NULL, then ASSERT().\r
  If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
  PcdMaximumUnicodeStringLength, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated Unicode string.\r
  @param  Source      Pointer to a Null-terminated Unicode string.\r
  @param  Length      Maximum number of Unicode characters to copy.\r
\r
  @return Destination.\r
\r
**/\r
CHAR16 *\r
EFIAPI\r
StrnCpy (\r
  OUT     CHAR16                    *Destination,\r
  IN      CONST CHAR16              *Source,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the length of a Null-terminated Unicode string.\r
\r
  This function returns the number of Unicode characters in the Null-terminated\r
  Unicode string specified by String.\r
\r
  If String is NULL, then ASSERT().\r
  If String is not aligned on a 16-bit boundary, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  String  Pointer to a Null-terminated Unicode string.\r
\r
  @return The length of String.\r
\r
**/\r
UINTN\r
EFIAPI\r
StrLen (\r
  IN      CONST CHAR16              *String\r
  );\r
\r
\r
/**\r
  Returns the size of a Null-terminated Unicode string in bytes, including the\r
  Null terminator.\r
\r
  This function returns the size, in bytes, of the Null-terminated Unicode string \r
  specified by String.\r
\r
  If String is NULL, then ASSERT().\r
  If String is not aligned on a 16-bit boundary, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  String  Pointer to a Null-terminated Unicode string.\r
\r
  @return The size of String.\r
\r
**/\r
UINTN\r
EFIAPI\r
StrSize (\r
  IN      CONST CHAR16              *String\r
  );\r
\r
\r
/**\r
  Compares two Null-terminated Unicode strings, and returns the difference\r
  between the first mismatched Unicode characters.\r
\r
  This function compares the Null-terminated Unicode string FirstString to the\r
  Null-terminated Unicode string SecondString. If FirstString is identical to\r
  SecondString, then 0 is returned. Otherwise, the value returned is the first\r
  mismatched Unicode character in SecondString subtracted from the first\r
  mismatched Unicode character in FirstString.\r
\r
  If FirstString is NULL, then ASSERT().\r
  If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r
  If SecondString is NULL, then ASSERT().\r
  If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
  than PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
  than PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  FirstString   Pointer to a Null-terminated Unicode string.\r
  @param  SecondString  Pointer to a Null-terminated Unicode string.\r
\r
  @retval 0      FirstString is identical to SecondString.\r
  @return others FirstString is not identical to SecondString.\r
\r
**/\r
INTN\r
EFIAPI\r
StrCmp (\r
  IN      CONST CHAR16              *FirstString,\r
  IN      CONST CHAR16              *SecondString\r
  );\r
\r
\r
/**\r
  Compares up to a specified length the contents of two Null-terminated Unicode strings,\r
  and returns the difference between the first mismatched Unicode characters.\r
  \r
  This function compares the Null-terminated Unicode string FirstString to the\r
  Null-terminated Unicode string SecondString. At most, Length Unicode\r
  characters will be compared. If Length is 0, then 0 is returned. If\r
  FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
  value returned is the first mismatched Unicode character in SecondString\r
  subtracted from the first mismatched Unicode character in FirstString.\r
\r
  If Length > 0 and FirstString is NULL, then ASSERT().\r
  If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r
  If Length > 0 and SecondString is NULL, then ASSERT().\r
  If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r
  PcdMaximumUnicodeStringLength, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  FirstString   Pointer to a Null-terminated Unicode string.\r
  @param  SecondString  Pointer to a Null-terminated Unicode string.\r
  @param  Length        Maximum number of Unicode characters to compare.\r
\r
  @retval 0      FirstString is identical to SecondString.\r
  @return others FirstString is not identical to SecondString.\r
\r
**/\r
INTN\r
EFIAPI\r
StrnCmp (\r
  IN      CONST CHAR16              *FirstString,\r
  IN      CONST CHAR16              *SecondString,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Concatenates one Null-terminated Unicode string to another Null-terminated\r
  Unicode string, and returns the concatenated Unicode string.\r
\r
  This function concatenates two Null-terminated Unicode strings. The contents\r
  of Null-terminated Unicode string Source are concatenated to the end of\r
  Null-terminated Unicode string Destination. The Null-terminated concatenated\r
  Unicode String is returned. If Source and Destination overlap, then the\r
  results are undefined.\r
\r
  If Destination is NULL, then ASSERT().\r
  If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source is NULL, then ASSERT().\r
  If Source is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
  than PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
  and Source results in a Unicode string with more than\r
  PcdMaximumUnicodeStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated Unicode string.\r
  @param  Source      Pointer to a Null-terminated Unicode string.\r
\r
  @return Destination.\r
\r
**/\r
CHAR16 *\r
EFIAPI\r
StrCat (\r
  IN OUT  CHAR16                    *Destination,\r
  IN      CONST CHAR16              *Source\r
  );\r
\r
\r
/**\r
  Concatenates up to a specified length one Null-terminated Unicode to the end \r
  of another Null-terminated Unicode string, and returns the concatenated \r
  Unicode string.\r
\r
  This function concatenates two Null-terminated Unicode strings. The contents\r
  of Null-terminated Unicode string Source are concatenated to the end of\r
  Null-terminated Unicode string Destination, and Destination is returned. At\r
  most, Length Unicode characters are concatenated from Source to the end of\r
  Destination, and Destination is always Null-terminated. If Length is 0, then\r
  Destination is returned unmodified. If Source and Destination overlap, then\r
  the results are undefined.\r
\r
  If Destination is NULL, then ASSERT().\r
  If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
  If Length > 0 and Source is NULL, then ASSERT().\r
  If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
  PcdMaximumUnicodeStringLength, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
  than PcdMaximumUnicodeStringLength Unicode characters, not including the\r
  Null-terminator, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters, not including the\r
  Null-terminator, then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
  and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r
  Unicode characters, not including the Null-terminator, then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated Unicode string.\r
  @param  Source      Pointer to a Null-terminated Unicode string.\r
  @param  Length      Maximum number of Unicode characters to concatenate from\r
                      Source.\r
\r
  @return Destination.\r
\r
**/\r
CHAR16 *\r
EFIAPI\r
StrnCat (\r
  IN OUT  CHAR16                    *Destination,\r
  IN      CONST CHAR16              *Source,\r
  IN      UINTN                     Length\r
  );\r
\r
/**\r
  Returns the first occurrence of a Null-terminated Unicode sub-string\r
  in a Null-terminated Unicode string.\r
\r
  This function scans the contents of the Null-terminated Unicode string\r
  specified by String and returns the first occurrence of SearchString.\r
  If SearchString is not found in String, then NULL is returned.  If\r
  the length of SearchString is zero, then String is\r
  returned.\r
\r
  If String is NULL, then ASSERT().\r
  If String is not aligned on a 16-bit boundary, then ASSERT().\r
  If SearchString is NULL, then ASSERT().\r
  If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r
\r
  If PcdMaximumUnicodeStringLength is not zero, and SearchString\r
  or String contains more than PcdMaximumUnicodeStringLength Unicode\r
  characters not including the Null-terminator, then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated Unicode string.\r
  @param  SearchString    Pointer to a Null-terminated Unicode string to search for.\r
\r
  @retval NULL            If the SearchString does not appear in String.\r
  @return others          If there is a match.\r
\r
**/\r
CHAR16 *\r
EFIAPI\r
StrStr (\r
  IN      CONST CHAR16              *String,\r
  IN      CONST CHAR16              *SearchString\r
  );\r
\r
/**\r
  Convert a Null-terminated Unicode decimal string to a value of\r
  type UINTN.\r
\r
  This function returns a value of type UINTN by interpreting the contents\r
  of the Unicode string specified by String as a decimal number. The format\r
  of the input Unicode string String is:\r
\r
                  [spaces] [decimal digits].\r
\r
  The valid decimal digit character is in the range [0-9]. The\r
  function will ignore the pad space, which includes spaces or\r
  tab characters, before [decimal digits]. The running zero in the\r
  beginning of [decimal digits] will be ignored. Then, the function\r
  stops at the first character that is a not a valid decimal character\r
  or a Null-terminator, whichever one comes first.\r
\r
  If String is NULL, then ASSERT().\r
  If String is not aligned in a 16-bit boundary, then ASSERT().\r
  If String has only pad spaces, then 0 is returned.\r
  If String has no pad spaces or valid decimal digits,\r
  then 0 is returned.\r
  If the number represented by String overflows according\r
  to the range defined by UINTN, then ASSERT().\r
\r
  If PcdMaximumUnicodeStringLength is not zero, and String contains\r
  more than PcdMaximumUnicodeStringLength Unicode characters not including\r
  the Null-terminator, then ASSERT().\r
\r
  @param  String      Pointer to a Null-terminated Unicode string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINTN\r
EFIAPI\r
StrDecimalToUintn (\r
  IN      CONST CHAR16              *String\r
  );\r
\r
/**\r
  Convert a Null-terminated Unicode decimal string to a value of\r
  type UINT64.\r
\r
  This function returns a value of type UINT64 by interpreting the contents\r
  of the Unicode string specified by String as a decimal number. The format\r
  of the input Unicode string String is:\r
\r
                  [spaces] [decimal digits].\r
\r
  The valid decimal digit character is in the range [0-9]. The\r
  function will ignore the pad space, which includes spaces or\r
  tab characters, before [decimal digits]. The running zero in the\r
  beginning of [decimal digits] will be ignored. Then, the function\r
  stops at the first character that is a not a valid decimal character\r
  or a Null-terminator, whichever one comes first.\r
\r
  If String is NULL, then ASSERT().\r
  If String is not aligned in a 16-bit boundary, then ASSERT().\r
  If String has only pad spaces, then 0 is returned.\r
  If String has no pad spaces or valid decimal digits,\r
  then 0 is returned.\r
  If the number represented by String overflows according\r
  to the range defined by UINT64, then ASSERT().\r
\r
  If PcdMaximumUnicodeStringLength is not zero, and String contains\r
  more than PcdMaximumUnicodeStringLength Unicode characters not including\r
  the Null-terminator, then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated Unicode string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINT64\r
EFIAPI\r
StrDecimalToUint64 (\r
  IN      CONST CHAR16              *String\r
  );\r
 \r
\r
/**\r
  Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r
\r
  This function returns a value of type UINTN by interpreting the contents\r
  of the Unicode string specified by String as a hexadecimal number.\r
  The format of the input Unicode string String is:\r
\r
                  [spaces][zeros][x][hexadecimal digits].\r
\r
  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
  If "x" appears in the input string, it must be prefixed with at least one 0.\r
  The function will ignore the pad space, which includes spaces or tab characters,\r
  before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
  [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
  first valid hexadecimal digit. Then, the function stops at the first character that is\r
  a not a valid hexadecimal character or NULL, whichever one comes first.\r
\r
  If String is NULL, then ASSERT().\r
  If String is not aligned in a 16-bit boundary, then ASSERT().\r
  If String has only pad spaces, then zero is returned.\r
  If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
  then zero is returned.\r
  If the number represented by String overflows according to the range defined by\r
  UINTN, then ASSERT().\r
\r
  If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated Unicode string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINTN\r
EFIAPI\r
StrHexToUintn (\r
  IN      CONST CHAR16              *String\r
  );\r
\r
\r
/**\r
  Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r
\r
  This function returns a value of type UINT64 by interpreting the contents\r
  of the Unicode string specified by String as a hexadecimal number.\r
  The format of the input Unicode string String is\r
\r
                  [spaces][zeros][x][hexadecimal digits].\r
\r
  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
  If "x" appears in the input string, it must be prefixed with at least one 0.\r
  The function will ignore the pad space, which includes spaces or tab characters,\r
  before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
  [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
  first valid hexadecimal digit. Then, the function stops at the first character that is\r
  a not a valid hexadecimal character or NULL, whichever one comes first.\r
\r
  If String is NULL, then ASSERT().\r
  If String is not aligned in a 16-bit boundary, then ASSERT().\r
  If String has only pad spaces, then zero is returned.\r
  If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
  then zero is returned.\r
  If the number represented by String overflows according to the range defined by\r
  UINT64, then ASSERT().\r
\r
  If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
  PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated Unicode string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINT64\r
EFIAPI\r
StrHexToUint64 (\r
  IN      CONST CHAR16             *String\r
  );\r
\r
/**\r
  Convert a Null-terminated Unicode string to a Null-terminated\r
  ASCII string and returns the ASCII string.\r
\r
  This function converts the content of the Unicode string Source\r
  to the ASCII string Destination by copying the lower 8 bits of\r
  each Unicode character. It returns Destination.\r
\r
  If any Unicode characters in Source contain non-zero value in\r
  the upper 8 bits, then ASSERT().\r
\r
  If Destination is NULL, then ASSERT().\r
  If Source is NULL, then ASSERT().\r
  If Source is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
\r
  If PcdMaximumUnicodeStringLength is not zero, and Source contains\r
  more than PcdMaximumUnicodeStringLength Unicode characters not including\r
  the Null-terminator, then ASSERT().\r
\r
  If PcdMaximumAsciiStringLength is not zero, and Source contains more\r
  than PcdMaximumAsciiStringLength Unicode characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  Source        Pointer to a Null-terminated Unicode string.\r
  @param  Destination   Pointer to a Null-terminated ASCII string.\r
\r
  @return Destination.\r
\r
**/\r
CHAR8 *\r
EFIAPI\r
UnicodeStrToAsciiStr (\r
  IN      CONST CHAR16              *Source,\r
  OUT     CHAR8                     *Destination\r
  );\r
\r
\r
/**\r
  Copies one Null-terminated ASCII string to another Null-terminated ASCII\r
  string and returns the new ASCII string.\r
\r
  This function copies the contents of the ASCII string Source to the ASCII\r
  string Destination, and returns Destination. If Source and Destination\r
  overlap, then the results are undefined.\r
\r
  If Destination is NULL, then ASSERT().\r
  If Source is NULL, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated ASCII string.\r
  @param  Source      Pointer to a Null-terminated ASCII string.\r
\r
  @return Destination\r
\r
**/\r
CHAR8 *\r
EFIAPI\r
AsciiStrCpy (\r
  OUT     CHAR8                     *Destination,\r
  IN      CONST CHAR8               *Source\r
  );\r
\r
\r
/**\r
  Copies up to a specified length one Null-terminated ASCII string to another \r
  Null-terminated ASCII string and returns the new ASCII string.\r
\r
  This function copies the contents of the ASCII string Source to the ASCII\r
  string Destination, and returns Destination. At most, Length ASCII characters\r
  are copied from Source to Destination. If Length is 0, then Destination is\r
  returned unmodified. If Length is greater that the number of ASCII characters\r
  in Source, then Destination is padded with Null ASCII characters. If Source\r
  and Destination overlap, then the results are undefined.\r
\r
  If Destination is NULL, then ASSERT().\r
  If Source is NULL, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
  PcdMaximumAsciiStringLength, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated ASCII string.\r
  @param  Source      Pointer to a Null-terminated ASCII string.\r
  @param  Length      Maximum number of ASCII characters to copy.\r
\r
  @return Destination\r
\r
**/\r
CHAR8 *\r
EFIAPI\r
AsciiStrnCpy (\r
  OUT     CHAR8                     *Destination,\r
  IN      CONST CHAR8               *Source,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the length of a Null-terminated ASCII string.\r
\r
  This function returns the number of ASCII characters in the Null-terminated\r
  ASCII string specified by String.\r
\r
  If Length > 0 and Destination is NULL, then ASSERT().\r
  If Length > 0 and Source is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and String contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  String  Pointer to a Null-terminated ASCII string.\r
\r
  @return The length of String.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsciiStrLen (\r
  IN      CONST CHAR8               *String\r
  );\r
\r
\r
/**\r
  Returns the size of a Null-terminated ASCII string in bytes, including the\r
  Null terminator.\r
\r
  This function returns the size, in bytes, of the Null-terminated ASCII string\r
  specified by String.\r
\r
  If String is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and String contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  String  Pointer to a Null-terminated ASCII string.\r
\r
  @return The size of String.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsciiStrSize (\r
  IN      CONST CHAR8               *String\r
  );\r
\r
\r
/**\r
  Compares two Null-terminated ASCII strings, and returns the difference\r
  between the first mismatched ASCII characters.\r
\r
  This function compares the Null-terminated ASCII string FirstString to the\r
  Null-terminated ASCII string SecondString. If FirstString is identical to\r
  SecondString, then 0 is returned. Otherwise, the value returned is the first\r
  mismatched ASCII character in SecondString subtracted from the first\r
  mismatched ASCII character in FirstString.\r
\r
  If FirstString is NULL, then ASSERT().\r
  If SecondString is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
  than PcdMaximumAsciiStringLength ASCII characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  FirstString   Pointer to a Null-terminated ASCII string.\r
  @param  SecondString  Pointer to a Null-terminated ASCII string.\r
\r
  @retval ==0      FirstString is identical to SecondString.\r
  @retval !=0      FirstString is not identical to SecondString.\r
\r
**/\r
INTN\r
EFIAPI\r
AsciiStrCmp (\r
  IN      CONST CHAR8               *FirstString,\r
  IN      CONST CHAR8               *SecondString\r
  );\r
\r
\r
/**\r
  Performs a case insensitive comparison of two Null-terminated ASCII strings,\r
  and returns the difference between the first mismatched ASCII characters.\r
\r
  This function performs a case insensitive comparison of the Null-terminated\r
  ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r
  FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
  value returned is the first mismatched lower case ASCII character in\r
  SecondString subtracted from the first mismatched lower case ASCII character\r
  in FirstString.\r
\r
  If FirstString is NULL, then ASSERT().\r
  If SecondString is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
  than PcdMaximumAsciiStringLength ASCII characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  FirstString   Pointer to a Null-terminated ASCII string.\r
  @param  SecondString  Pointer to a Null-terminated ASCII string.\r
\r
  @retval ==0    FirstString is identical to SecondString using case insensitive\r
                 comparisons.\r
  @retval !=0    FirstString is not identical to SecondString using case\r
                 insensitive comparisons.\r
\r
**/\r
INTN\r
EFIAPI\r
AsciiStriCmp (\r
  IN      CONST CHAR8               *FirstString,\r
  IN      CONST CHAR8               *SecondString\r
  );\r
\r
\r
/**\r
  Compares two Null-terminated ASCII strings with maximum lengths, and returns\r
  the difference between the first mismatched ASCII characters.\r
\r
  This function compares the Null-terminated ASCII string FirstString to the\r
  Null-terminated ASCII  string SecondString. At most, Length ASCII characters\r
  will be compared. If Length is 0, then 0 is returned. If FirstString is\r
  identical to SecondString, then 0 is returned. Otherwise, the value returned\r
  is the first mismatched ASCII character in SecondString subtracted from the\r
  first mismatched ASCII character in FirstString.\r
\r
  If Length > 0 and FirstString is NULL, then ASSERT().\r
  If Length > 0 and SecondString is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
  PcdMaximumAsciiStringLength, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r
  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r
  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  FirstString   Pointer to a Null-terminated ASCII string.\r
  @param  SecondString  Pointer to a Null-terminated ASCII string.\r
  @param  Length        Maximum number of ASCII characters for compare.\r
  \r
  @retval ==0       FirstString is identical to SecondString.\r
  @retval !=0       FirstString is not identical to SecondString.\r
\r
**/\r
INTN\r
EFIAPI\r
AsciiStrnCmp (\r
  IN      CONST CHAR8               *FirstString,\r
  IN      CONST CHAR8               *SecondString,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Concatenates one Null-terminated ASCII string to another Null-terminated\r
  ASCII string, and returns the concatenated ASCII string.\r
\r
  This function concatenates two Null-terminated ASCII strings. The contents of\r
  Null-terminated ASCII string Source are concatenated to the end of Null-\r
  terminated ASCII string Destination. The Null-terminated concatenated ASCII\r
  String is returned.\r
\r
  If Destination is NULL, then ASSERT().\r
  If Source is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r
  Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
  ASCII characters, then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated ASCII string.\r
  @param  Source      Pointer to a Null-terminated ASCII string.\r
\r
  @return Destination\r
\r
**/\r
CHAR8 *\r
EFIAPI\r
AsciiStrCat (\r
  IN OUT CHAR8    *Destination,\r
  IN CONST CHAR8  *Source\r
  );\r
\r
\r
/**\r
  Concatenates up to a specified length one Null-terminated ASCII string to \r
  the end of another Null-terminated ASCII string, and returns the \r
  concatenated ASCII string.\r
\r
  This function concatenates two Null-terminated ASCII strings. The contents\r
  of Null-terminated ASCII string Source are concatenated to the end of Null-\r
  terminated ASCII string Destination, and Destination is returned. At most,\r
  Length ASCII characters are concatenated from Source to the end of\r
  Destination, and Destination is always Null-terminated. If Length is 0, then\r
  Destination is returned unmodified. If Source and Destination overlap, then\r
  the results are undefined.\r
\r
  If Length > 0 and Destination is NULL, then ASSERT().\r
  If Length > 0 and Source is NULL, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r
  PcdMaximumAsciiStringLength, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r
  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
  PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r
  Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
  ASCII characters, not including the Null-terminator, then ASSERT().\r
\r
  @param  Destination Pointer to a Null-terminated ASCII string.\r
  @param  Source      Pointer to a Null-terminated ASCII string.\r
  @param  Length      Maximum number of ASCII characters to concatenate from\r
                      Source.\r
\r
  @return Destination\r
\r
**/\r
CHAR8 *\r
EFIAPI\r
AsciiStrnCat (\r
  IN OUT  CHAR8                     *Destination,\r
  IN      CONST CHAR8               *Source,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the first occurrence of a Null-terminated ASCII sub-string\r
  in a Null-terminated ASCII string.\r
\r
  This function scans the contents of the ASCII string specified by String\r
  and returns the first occurrence of SearchString. If SearchString is not\r
  found in String, then NULL is returned. If the length of SearchString is zero,\r
  then String is returned.\r
\r
  If String is NULL, then ASSERT().\r
  If SearchString is NULL, then ASSERT().\r
\r
  If PcdMaximumAsciiStringLength is not zero, and SearchString or\r
  String contains more than PcdMaximumAsciiStringLength Unicode characters\r
  not including the Null-terminator, then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated ASCII string.\r
  @param  SearchString    Pointer to a Null-terminated ASCII string to search for.\r
\r
  @retval NULL            If the SearchString does not appear in String.\r
  @retval others          If there is a match return the first occurrence of SearchingString.\r
                          If the length of SearchString is zero,return String.\r
\r
**/\r
CHAR8 *\r
EFIAPI\r
AsciiStrStr (\r
  IN      CONST CHAR8               *String,\r
  IN      CONST CHAR8               *SearchString\r
  );\r
\r
\r
/**\r
  Convert a Null-terminated ASCII decimal string to a value of type\r
  UINTN.\r
\r
  This function returns a value of type UINTN by interpreting the contents\r
  of the ASCII string String as a decimal number. The format of the input\r
  ASCII string String is:\r
\r
                    [spaces] [decimal digits].\r
\r
  The valid decimal digit character is in the range [0-9]. The function will\r
  ignore the pad space, which includes spaces or tab characters, before the digits.\r
  The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
  function stops at the first character that is a not a valid decimal character or\r
  Null-terminator, whichever on comes first.\r
\r
  If String has only pad spaces, then 0 is returned.\r
  If String has no pad spaces or valid decimal digits, then 0 is returned.\r
  If the number represented by String overflows according to the range defined by\r
  UINTN, then ASSERT().\r
  If String is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated ASCII string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsciiStrDecimalToUintn (\r
  IN      CONST CHAR8               *String\r
  );\r
\r
\r
/**\r
  Convert a Null-terminated ASCII decimal string to a value of type\r
  UINT64.\r
\r
  This function returns a value of type UINT64 by interpreting the contents\r
  of the ASCII string String as a decimal number. The format of the input\r
  ASCII string String is:\r
\r
                    [spaces] [decimal digits].\r
\r
  The valid decimal digit character is in the range [0-9]. The function will\r
  ignore the pad space, which includes spaces or tab characters, before the digits.\r
  The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
  function stops at the first character that is a not a valid decimal character or\r
  Null-terminator, whichever on comes first.\r
\r
  If String has only pad spaces, then 0 is returned.\r
  If String has no pad spaces or valid decimal digits, then 0 is returned.\r
  If the number represented by String overflows according to the range defined by\r
  UINT64, then ASSERT().\r
  If String is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated ASCII string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsciiStrDecimalToUint64 (\r
  IN      CONST CHAR8               *String\r
  );\r
\r
\r
/**\r
  Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r
\r
  This function returns a value of type UINTN by interpreting the contents of\r
  the ASCII string String as a hexadecimal number. The format of the input ASCII\r
  string String is:\r
\r
                  [spaces][zeros][x][hexadecimal digits].\r
\r
  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
  appears in the input string, it must be prefixed with at least one 0. The function\r
  will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
  [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
  will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
  digit. Then, the function stops at the first character that is a not a valid\r
  hexadecimal character or Null-terminator, whichever on comes first.\r
\r
  If String has only pad spaces, then 0 is returned.\r
  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
  0 is returned.\r
\r
  If the number represented by String overflows according to the range defined by UINTN,\r
  then ASSERT().\r
  If String is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero,\r
  and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
  the Null-terminator, then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated ASCII string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsciiStrHexToUintn (\r
  IN      CONST CHAR8               *String\r
  );\r
\r
\r
/**\r
  Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r
\r
  This function returns a value of type UINT64 by interpreting the contents of\r
  the ASCII string String as a hexadecimal number. The format of the input ASCII\r
  string String is:\r
\r
                  [spaces][zeros][x][hexadecimal digits].\r
\r
  The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
  The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
  appears in the input string, it must be prefixed with at least one 0. The function\r
  will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
  [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
  will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
  digit. Then, the function stops at the first character that is a not a valid\r
  hexadecimal character or Null-terminator, whichever on comes first.\r
\r
  If String has only pad spaces, then 0 is returned.\r
  If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
  0 is returned.\r
\r
  If the number represented by String overflows according to the range defined by UINT64,\r
  then ASSERT().\r
  If String is NULL, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero,\r
  and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
  the Null-terminator, then ASSERT().\r
\r
  @param  String          Pointer to a Null-terminated ASCII string.\r
\r
  @retval Value translated from String.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsciiStrHexToUint64 (\r
  IN      CONST CHAR8                *String\r
  );\r
\r
\r
/**\r
  Convert one Null-terminated ASCII string to a Null-terminated\r
  Unicode string and returns the Unicode string.\r
\r
  This function converts the contents of the ASCII string Source to the Unicode\r
  string Destination, and returns Destination.  The function terminates the\r
  Unicode string Destination by appending a Null-terminator character at the end.\r
  The caller is responsible to make sure Destination points to a buffer with size\r
  equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r
\r
  If Destination is NULL, then ASSERT().\r
  If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
  If Source is NULL, then ASSERT().\r
  If Source and Destination overlap, then ASSERT().\r
  If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
  PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
  then ASSERT().\r
  If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
  PcdMaximumUnicodeStringLength ASCII characters not including the\r
  Null-terminator, then ASSERT().\r
\r
  @param  Source        Pointer to a Null-terminated ASCII string.\r
  @param  Destination   Pointer to a Null-terminated Unicode string.\r
\r
  @return Destination.\r
\r
**/\r
CHAR16 *\r
EFIAPI\r
AsciiStrToUnicodeStr (\r
  IN      CONST CHAR8               *Source,\r
  OUT     CHAR16                    *Destination\r
  );\r
\r
\r
/**\r
  Converts an 8-bit value to an 8-bit BCD value.\r
\r
  Converts the 8-bit value specified by Value to BCD. The BCD value is\r
  returned.\r
\r
  If Value >= 100, then ASSERT().\r
\r
  @param  Value The 8-bit value to convert to BCD. Range 0..99.\r
\r
  @return The BCD value.\r
\r
**/\r
UINT8\r
EFIAPI\r
DecimalToBcd8 (\r
  IN      UINT8                     Value\r
  );\r
\r
\r
/**\r
  Converts an 8-bit BCD value to an 8-bit value.\r
\r
  Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r
  value is returned.\r
\r
  If Value >= 0xA0, then ASSERT().\r
  If (Value & 0x0F) >= 0x0A, then ASSERT().\r
\r
  @param  Value The 8-bit BCD value to convert to an 8-bit value.\r
\r
  @return The 8-bit value is returned.\r
\r
**/\r
UINT8\r
EFIAPI\r
BcdToDecimal8 (\r
  IN      UINT8                     Value\r
  );\r
\r
\r
//\r
// Linked List Functions and Macros\r
//\r
\r
/**\r
  Initializes the head node of a doubly linked list that is declared as a\r
  global variable in a module.\r
\r
  Initializes the forward and backward links of a new linked list. After\r
  initializing a linked list with this macro, the other linked list functions\r
  may be used to add and remove nodes from the linked list. This macro results\r
  in smaller executables by initializing the linked list in the data section,\r
  instead if calling the InitializeListHead() function to perform the\r
  equivalent operation.\r
\r
  @param  ListHead  The head note of a list to initialize.\r
\r
**/\r
#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead)  {&(ListHead), &(ListHead)}\r
\r
\r
/**\r
  Initializes the head node of a doubly linked list, and returns the pointer to\r
  the head node of the doubly linked list.\r
\r
  Initializes the forward and backward links of a new linked list. After\r
  initializing a linked list with this function, the other linked list\r
  functions may be used to add and remove nodes from the linked list. It is up\r
  to the caller of this function to allocate the memory for ListHead.\r
\r
  If ListHead is NULL, then ASSERT().\r
\r
  @param  ListHead  A pointer to the head node of a new doubly linked list.\r
\r
  @return ListHead\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
InitializeListHead (\r
  IN OUT  LIST_ENTRY                *ListHead\r
  );\r
\r
\r
/**\r
  Adds a node to the beginning of a doubly linked list, and returns the pointer\r
  to the head node of the doubly linked list.\r
\r
  Adds the node Entry at the beginning of the doubly linked list denoted by\r
  ListHead, and returns ListHead.\r
\r
  If ListHead is NULL, then ASSERT().\r
  If Entry is NULL, then ASSERT().\r
  If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
  InitializeListHead(), then ASSERT().\r
  If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
  of nodes in ListHead, including the ListHead node, is greater than or\r
  equal to PcdMaximumLinkedListLength, then ASSERT().\r
\r
  @param  ListHead  A pointer to the head node of a doubly linked list.\r
  @param  Entry     A pointer to a node that is to be inserted at the beginning\r
                    of a doubly linked list.\r
\r
  @return ListHead\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
InsertHeadList (\r
  IN OUT  LIST_ENTRY                *ListHead,\r
  IN OUT  LIST_ENTRY                *Entry\r
  );\r
\r
\r
/**\r
  Adds a node to the end of a doubly linked list, and returns the pointer to\r
  the head node of the doubly linked list.\r
\r
  Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r
  and returns ListHead.\r
\r
  If ListHead is NULL, then ASSERT().\r
  If Entry is NULL, then ASSERT().\r
  If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
  InitializeListHead(), then ASSERT().\r
  If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
  of nodes in ListHead, including the ListHead node, is greater than or\r
  equal to PcdMaximumLinkedListLength, then ASSERT().\r
\r
  @param  ListHead  A pointer to the head node of a doubly linked list.\r
  @param  Entry     A pointer to a node that is to be added at the end of the\r
                    doubly linked list.\r
\r
  @return ListHead\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
InsertTailList (\r
  IN OUT  LIST_ENTRY                *ListHead,\r
  IN OUT  LIST_ENTRY                *Entry\r
  );\r
\r
\r
/**\r
  Retrieves the first node of a doubly linked list.\r
\r
  Returns the first node of a doubly linked list.  List must have been \r
  initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
  If List is empty, then List is returned.\r
\r
  If List is NULL, then ASSERT().\r
  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
  InitializeListHead(), then ASSERT().\r
  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
  in List, including the List node, is greater than or equal to\r
  PcdMaximumLinkedListLength, then ASSERT().\r
\r
  @param  List  A pointer to the head node of a doubly linked list.\r
\r
  @return The first node of a doubly linked list.\r
  @retval NULL  The list is empty.\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
GetFirstNode (\r
  IN      CONST LIST_ENTRY          *List\r
  );\r
\r
\r
/**\r
  Retrieves the next node of a doubly linked list.\r
\r
  Returns the node of a doubly linked list that follows Node.  \r
  List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
  or InitializeListHead().  If List is empty, then List is returned.\r
\r
  If List is NULL, then ASSERT().\r
  If Node is NULL, then ASSERT().\r
  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
  InitializeListHead(), then ASSERT().\r
  If PcdMaximumLinkedListLenth is not zero, and List contains more than\r
  PcdMaximumLinkedListLenth nodes, then ASSERT().\r
  If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r
\r
  @param  List  A pointer to the head node of a doubly linked list.\r
  @param  Node  A pointer to a node in the doubly linked list.\r
\r
  @return Pointer to the next node if one exists. Otherwise a null value which\r
          is actually List is returned.\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
GetNextNode (\r
  IN      CONST LIST_ENTRY          *List,\r
  IN      CONST LIST_ENTRY          *Node\r
  );\r
\r
\r
/**\r
  Checks to see if a doubly linked list is empty or not.\r
\r
  Checks to see if the doubly linked list is empty. If the linked list contains\r
  zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r
\r
  If ListHead is NULL, then ASSERT().\r
  If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
  InitializeListHead(), then ASSERT().\r
  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
  in List, including the List node, is greater than or equal to\r
  PcdMaximumLinkedListLength, then ASSERT().\r
\r
  @param  ListHead  A pointer to the head node of a doubly linked list.\r
\r
  @retval TRUE  The linked list is empty.\r
  @retval FALSE The linked list is not empty.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
IsListEmpty (\r
  IN      CONST LIST_ENTRY          *ListHead\r
  );\r
\r
\r
/**\r
  Determines if a node in a doubly linked list is the head node of a the same\r
  doubly linked list.  This function is typically used to terminate a loop that\r
  traverses all the nodes in a doubly linked list starting with the head node.\r
\r
  Returns TRUE if Node is equal to List.  Returns FALSE if Node is one of the\r
  nodes in the doubly linked list specified by List.  List must have been\r
  initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
\r
  If List is NULL, then ASSERT().\r
  If Node is NULL, then ASSERT().\r
  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r
  then ASSERT().\r
  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
  in List, including the List node, is greater than or equal to\r
  PcdMaximumLinkedListLength, then ASSERT().\r
  If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r
  to List, then ASSERT().\r
\r
  @param  List  A pointer to the head node of a doubly linked list.\r
  @param  Node  A pointer to a node in the doubly linked list.\r
\r
  @retval TRUE  Node is one of the nodes in the doubly linked list.\r
  @retval FALSE Node is not one of the nodes in the doubly linked list.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
IsNull (\r
  IN      CONST LIST_ENTRY          *List,\r
  IN      CONST LIST_ENTRY          *Node\r
  );\r
\r
\r
/**\r
  Determines if a node the last node in a doubly linked list.\r
\r
  Returns TRUE if Node is the last node in the doubly linked list specified by\r
  List. Otherwise, FALSE is returned. List must have been initialized with\r
  INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
\r
  If List is NULL, then ASSERT().\r
  If Node is NULL, then ASSERT().\r
  If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
  InitializeListHead(), then ASSERT().\r
  If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
  in List, including the List node, is greater than or equal to\r
  PcdMaximumLinkedListLength, then ASSERT().\r
  If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r
\r
  @param  List  A pointer to the head node of a doubly linked list.\r
  @param  Node  A pointer to a node in the doubly linked list.\r
\r
  @retval TRUE  Node is the last node in the linked list.\r
  @retval FALSE Node is not the last node in the linked list.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
IsNodeAtEnd (\r
  IN      CONST LIST_ENTRY          *List,\r
  IN      CONST LIST_ENTRY          *Node\r
  );\r
\r
\r
/**\r
  Swaps the location of two nodes in a doubly linked list, and returns the\r
  first node after the swap.\r
\r
  If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r
  Otherwise, the location of the FirstEntry node is swapped with the location\r
  of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r
  same double linked list as FirstEntry and that double linked list must have\r
  been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r
  SecondEntry is returned after the nodes are swapped.\r
\r
  If FirstEntry is NULL, then ASSERT().\r
  If SecondEntry is NULL, then ASSERT().\r
  If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r
  same linked list, then ASSERT().\r
  If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
  linked list containing the FirstEntry and SecondEntry nodes, including\r
  the FirstEntry and SecondEntry nodes, is greater than or equal to\r
  PcdMaximumLinkedListLength, then ASSERT().\r
\r
  @param  FirstEntry  A pointer to a node in a linked list.\r
  @param  SecondEntry A pointer to another node in the same linked list.\r
  \r
  @return SecondEntry.\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
SwapListEntries (\r
  IN OUT  LIST_ENTRY                *FirstEntry,\r
  IN OUT  LIST_ENTRY                *SecondEntry\r
  );\r
\r
\r
/**\r
  Removes a node from a doubly linked list, and returns the node that follows\r
  the removed node.\r
\r
  Removes the node Entry from a doubly linked list. It is up to the caller of\r
  this function to release the memory used by this node if that is required. On\r
  exit, the node following Entry in the doubly linked list is returned. If\r
  Entry is the only node in the linked list, then the head node of the linked\r
  list is returned.\r
\r
  If Entry is NULL, then ASSERT().\r
  If Entry is the head node of an empty list, then ASSERT().\r
  If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
  linked list containing Entry, including the Entry node, is greater than\r
  or equal to PcdMaximumLinkedListLength, then ASSERT().\r
\r
  @param  Entry A pointer to a node in a linked list.\r
\r
  @return Entry.\r
\r
**/\r
LIST_ENTRY *\r
EFIAPI\r
RemoveEntryList (\r
  IN      CONST LIST_ENTRY          *Entry\r
  );\r
\r
//\r
// Math Services\r
//\r
\r
/**\r
  Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r
  with zeros. The shifted value is returned.\r
\r
  This function shifts the 64-bit value Operand to the left by Count bits. The\r
  low Count bits are set to zero. The shifted value is returned.\r
\r
  If Count is greater than 63, then ASSERT().\r
\r
  @param  Operand The 64-bit operand to shift left.\r
  @param  Count   The number of bits to shift left.\r
\r
  @return Operand << Count.\r
\r
**/\r
UINT64\r
EFIAPI\r
LShiftU64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     Count\r
  );\r
\r
\r
/**\r
  Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r
  filled with zeros. The shifted value is returned.\r
\r
  This function shifts the 64-bit value Operand to the right by Count bits. The\r
  high Count bits are set to zero. The shifted value is returned.\r
\r
  If Count is greater than 63, then ASSERT().\r
\r
  @param  Operand The 64-bit operand to shift right.\r
  @param  Count   The number of bits to shift right.\r
\r
  @return Operand >> Count\r
\r
**/\r
UINT64\r
EFIAPI\r
RShiftU64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     Count\r
  );\r
\r
\r
/**\r
  Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r
  with original integer's bit 63. The shifted value is returned.\r
\r
  This function shifts the 64-bit value Operand to the right by Count bits. The\r
  high Count bits are set to bit 63 of Operand.  The shifted value is returned.\r
\r
  If Count is greater than 63, then ASSERT().\r
\r
  @param  Operand The 64-bit operand to shift right.\r
  @param  Count   The number of bits to shift right.\r
\r
  @return Operand >> Count\r
\r
**/\r
UINT64\r
EFIAPI\r
ARShiftU64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     Count\r
  );\r
\r
\r
/**\r
  Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r
  with the high bits that were rotated.\r
\r
  This function rotates the 32-bit value Operand to the left by Count bits. The\r
  low Count bits are fill with the high Count bits of Operand. The rotated\r
  value is returned.\r
\r
  If Count is greater than 31, then ASSERT().\r
\r
  @param  Operand The 32-bit operand to rotate left.\r
  @param  Count   The number of bits to rotate left.\r
\r
  @return Operand << Count\r
\r
**/\r
UINT32\r
EFIAPI\r
LRotU32 (\r
  IN      UINT32                    Operand,\r
  IN      UINTN                     Count\r
  );\r
\r
\r
/**\r
  Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r
  with the low bits that were rotated.\r
\r
  This function rotates the 32-bit value Operand to the right by Count bits.\r
  The high Count bits are fill with the low Count bits of Operand. The rotated\r
  value is returned.\r
\r
  If Count is greater than 31, then ASSERT().\r
\r
  @param  Operand The 32-bit operand to rotate right.\r
  @param  Count   The number of bits to rotate right.\r
\r
  @return Operand >> Count\r
\r
**/\r
UINT32\r
EFIAPI\r
RRotU32 (\r
  IN      UINT32                    Operand,\r
  IN      UINTN                     Count\r
  );\r
\r
\r
/**\r
  Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r
  with the high bits that were rotated.\r
\r
  This function rotates the 64-bit value Operand to the left by Count bits. The\r
  low Count bits are fill with the high Count bits of Operand. The rotated\r
  value is returned.\r
\r
  If Count is greater than 63, then ASSERT().\r
\r
  @param  Operand The 64-bit operand to rotate left.\r
  @param  Count   The number of bits to rotate left.\r
\r
  @return Operand << Count\r
\r
**/\r
UINT64\r
EFIAPI\r
LRotU64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     Count\r
  );\r
\r
\r
/**\r
  Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r
  with the high low bits that were rotated.\r
\r
  This function rotates the 64-bit value Operand to the right by Count bits.\r
  The high Count bits are fill with the low Count bits of Operand. The rotated\r
  value is returned.\r
\r
  If Count is greater than 63, then ASSERT().\r
\r
  @param  Operand The 64-bit operand to rotate right.\r
  @param  Count   The number of bits to rotate right.\r
\r
  @return Operand >> Count\r
\r
**/\r
UINT64\r
EFIAPI\r
RRotU64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     Count\r
  );\r
\r
\r
/**\r
  Returns the bit position of the lowest bit set in a 32-bit value.\r
\r
  This function computes the bit position of the lowest bit set in the 32-bit\r
  value specified by Operand. If Operand is zero, then -1 is returned.\r
  Otherwise, a value between 0 and 31 is returned.\r
\r
  @param  Operand The 32-bit operand to evaluate.\r
\r
  @retval 0..31  The lowest bit set in Operand was found.\r
  @retval -1    Operand is zero.\r
\r
**/\r
INTN\r
EFIAPI\r
LowBitSet32 (\r
  IN      UINT32                    Operand\r
  );\r
\r
\r
/**\r
  Returns the bit position of the lowest bit set in a 64-bit value.\r
\r
  This function computes the bit position of the lowest bit set in the 64-bit\r
  value specified by Operand. If Operand is zero, then -1 is returned.\r
  Otherwise, a value between 0 and 63 is returned.\r
\r
  @param  Operand The 64-bit operand to evaluate.\r
\r
  @retval 0..63  The lowest bit set in Operand was found.\r
  @retval -1    Operand is zero.\r
\r
\r
**/\r
INTN\r
EFIAPI\r
LowBitSet64 (\r
  IN      UINT64                    Operand\r
  );\r
\r
\r
/**\r
  Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r
  to log2(x).\r
\r
  This function computes the bit position of the highest bit set in the 32-bit\r
  value specified by Operand. If Operand is zero, then -1 is returned.\r
  Otherwise, a value between 0 and 31 is returned.\r
\r
  @param  Operand The 32-bit operand to evaluate.\r
\r
  @retval 0..31  Position of the highest bit set in Operand if found.\r
  @retval -1    Operand is zero.\r
\r
**/\r
INTN\r
EFIAPI\r
HighBitSet32 (\r
  IN      UINT32                    Operand\r
  );\r
\r
\r
/**\r
  Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r
  to log2(x).\r
\r
  This function computes the bit position of the highest bit set in the 64-bit\r
  value specified by Operand. If Operand is zero, then -1 is returned.\r
  Otherwise, a value between 0 and 63 is returned.\r
\r
  @param  Operand The 64-bit operand to evaluate.\r
\r
  @retval 0..63   Position of the highest bit set in Operand if found.\r
  @retval -1     Operand is zero.\r
\r
**/\r
INTN\r
EFIAPI\r
HighBitSet64 (\r
  IN      UINT64                    Operand\r
  );\r
\r
\r
/**\r
  Returns the value of the highest bit set in a 32-bit value. Equivalent to\r
  1 << log2(x).\r
\r
  This function computes the value of the highest bit set in the 32-bit value\r
  specified by Operand. If Operand is zero, then zero is returned.\r
\r
  @param  Operand The 32-bit operand to evaluate.\r
\r
  @return 1 << HighBitSet32(Operand)\r
  @retval 0 Operand is zero.\r
\r
**/\r
UINT32\r
EFIAPI\r
GetPowerOfTwo32 (\r
  IN      UINT32                    Operand\r
  );\r
\r
\r
/**\r
  Returns the value of the highest bit set in a 64-bit value. Equivalent to\r
  1 << log2(x).\r
\r
  This function computes the value of the highest bit set in the 64-bit value\r
  specified by Operand. If Operand is zero, then zero is returned.\r
\r
  @param  Operand The 64-bit operand to evaluate.\r
\r
  @return 1 << HighBitSet64(Operand)\r
  @retval 0 Operand is zero.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPowerOfTwo64 (\r
  IN      UINT64                    Operand\r
  );\r
\r
\r
/**\r
  Switches the endianess of a 16-bit integer.\r
\r
  This function swaps the bytes in a 16-bit unsigned value to switch the value\r
  from little endian to big endian or vice versa. The byte swapped value is\r
  returned.\r
\r
  @param  Value A 16-bit unsigned value.\r
\r
  @return The byte swapped Value.\r
\r
**/\r
UINT16\r
EFIAPI\r
SwapBytes16 (\r
  IN      UINT16                    Value\r
  );\r
\r
\r
/**\r
  Switches the endianess of a 32-bit integer.\r
\r
  This function swaps the bytes in a 32-bit unsigned value to switch the value\r
  from little endian to big endian or vice versa. The byte swapped value is\r
  returned.\r
\r
  @param  Value A 32-bit unsigned value.\r
\r
  @return The byte swapped Value.\r
\r
**/\r
UINT32\r
EFIAPI\r
SwapBytes32 (\r
  IN      UINT32                    Value\r
  );\r
\r
\r
/**\r
  Switches the endianess of a 64-bit integer.\r
\r
  This function swaps the bytes in a 64-bit unsigned value to switch the value\r
  from little endian to big endian or vice versa. The byte swapped value is\r
  returned.\r
\r
  @param  Value A 64-bit unsigned value.\r
\r
  @return The byte swapped Value.\r
\r
**/\r
UINT64\r
EFIAPI\r
SwapBytes64 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r
  generates a 64-bit unsigned result.\r
\r
  This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
  bit unsigned result is returned.\r
\r
  @param  Multiplicand  A 64-bit unsigned value.\r
  @param  Multiplier    A 32-bit unsigned value.\r
\r
  @return Multiplicand * Multiplier\r
\r
**/\r
UINT64\r
EFIAPI\r
MultU64x32 (\r
  IN      UINT64                    Multiplicand,\r
  IN      UINT32                    Multiplier\r
  );\r
\r
\r
/**\r
  Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r
  generates a 64-bit unsigned result.\r
\r
  This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
  unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
  bit unsigned result is returned.\r
\r
  @param  Multiplicand  A 64-bit unsigned value.\r
  @param  Multiplier    A 64-bit unsigned value.\r
\r
  @return Multiplicand * Multiplier\r
\r
**/\r
UINT64\r
EFIAPI\r
MultU64x64 (\r
  IN      UINT64                    Multiplicand,\r
  IN      UINT64                    Multiplier\r
  );\r
\r
\r
/**\r
  Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r
  64-bit signed result.\r
\r
  This function multiples the 64-bit signed value Multiplicand by the 64-bit\r
  signed value Multiplier and generates a 64-bit signed result. This 64-bit\r
  signed result is returned.\r
\r
  @param  Multiplicand  A 64-bit signed value.\r
  @param  Multiplier    A 64-bit signed value.\r
\r
  @return Multiplicand * Multiplier\r
\r
**/\r
INT64\r
EFIAPI\r
MultS64x64 (\r
  IN      INT64                     Multiplicand,\r
  IN      INT64                     Multiplier\r
  );\r
\r
\r
/**\r
  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
  a 64-bit unsigned result.\r
\r
  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
  unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
  function returns the 64-bit unsigned quotient.\r
\r
  If Divisor is 0, then ASSERT().\r
\r
  @param  Dividend  A 64-bit unsigned value.\r
  @param  Divisor   A 32-bit unsigned value.\r
\r
  @return Dividend / Divisor\r
\r
**/\r
UINT64\r
EFIAPI\r
DivU64x32 (\r
  IN      UINT64                    Dividend,\r
  IN      UINT32                    Divisor\r
  );\r
\r
\r
/**\r
  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
  a 32-bit unsigned remainder.\r
\r
  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
  unsigned value Divisor and generates a 32-bit remainder. This function\r
  returns the 32-bit unsigned remainder.\r
\r
  If Divisor is 0, then ASSERT().\r
\r
  @param  Dividend  A 64-bit unsigned value.\r
  @param  Divisor   A 32-bit unsigned value.\r
\r
  @return Dividend % Divisor\r
\r
**/\r
UINT32\r
EFIAPI\r
ModU64x32 (\r
  IN      UINT64                    Dividend,\r
  IN      UINT32                    Divisor\r
  );\r
\r
\r
/**\r
  Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
  a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
\r
  This function divides the 64-bit unsigned value Dividend by the 32-bit\r
  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
  is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
  This function returns the 64-bit unsigned quotient.\r
\r
  If Divisor is 0, then ASSERT().\r
\r
  @param  Dividend  A 64-bit unsigned value.\r
  @param  Divisor   A 32-bit unsigned value.\r
  @param  Remainder A pointer to a 32-bit unsigned value. This parameter is\r
                    optional and may be NULL.\r
\r
  @return Dividend / Divisor\r
\r
**/\r
UINT64\r
EFIAPI\r
DivU64x32Remainder (\r
  IN      UINT64                    Dividend,\r
  IN      UINT32                    Divisor,\r
  OUT     UINT32                    *Remainder  OPTIONAL\r
  );\r
\r
\r
/**\r
  Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r
  a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
\r
  This function divides the 64-bit unsigned value Dividend by the 64-bit\r
  unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
  is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
  This function returns the 64-bit unsigned quotient.\r
\r
  If Divisor is 0, then ASSERT().\r
\r
  @param  Dividend  A 64-bit unsigned value.\r
  @param  Divisor   A 64-bit unsigned value.\r
  @param  Remainder A pointer to a 64-bit unsigned value. This parameter is\r
                    optional and may be NULL.\r
\r
  @return Dividend / Divisor\r
\r
**/\r
UINT64\r
EFIAPI\r
DivU64x64Remainder (\r
  IN      UINT64                    Dividend,\r
  IN      UINT64                    Divisor,\r
  OUT     UINT64                    *Remainder  OPTIONAL\r
  );\r
\r
\r
/**\r
  Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r
  64-bit signed result and a optional 64-bit signed remainder.\r
\r
  This function divides the 64-bit signed value Dividend by the 64-bit signed\r
  value Divisor and generates a 64-bit signed quotient. If Remainder is not\r
  NULL, then the 64-bit signed remainder is returned in Remainder. This\r
  function returns the 64-bit signed quotient.\r
\r
  It is the caller's responsibility to not call this function with a Divisor of 0.\r
  If Divisor is 0, then the quotient and remainder should be assumed to be \r
  the largest negative integer.\r
\r
  If Divisor is 0, then ASSERT().\r
\r
  @param  Dividend  A 64-bit signed value.\r
  @param  Divisor   A 64-bit signed value.\r
  @param  Remainder A pointer to a 64-bit signed value. This parameter is\r
                    optional and may be NULL.\r
\r
  @return Dividend / Divisor\r
\r
**/\r
INT64\r
EFIAPI\r
DivS64x64Remainder (\r
  IN      INT64                     Dividend,\r
  IN      INT64                     Divisor,\r
  OUT     INT64                     *Remainder  OPTIONAL\r
  );\r
\r
\r
/**\r
  Reads a 16-bit value from memory that may be unaligned.\r
\r
  This function returns the 16-bit value pointed to by Buffer. The function\r
  guarantees that the read operation does not produce an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 16-bit value that may be unaligned.\r
\r
  @return The 16-bit value read from Buffer.\r
\r
**/\r
UINT16\r
EFIAPI\r
ReadUnaligned16 (\r
  IN CONST UINT16              *Buffer\r
  );\r
\r
\r
/**\r
  Writes a 16-bit value to memory that may be unaligned.\r
\r
  This function writes the 16-bit value specified by Value to Buffer. Value is\r
  returned. The function guarantees that the write operation does not produce\r
  an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 16-bit value that may be unaligned.\r
  @param  Value   16-bit value to write to Buffer.\r
\r
  @return The 16-bit value to write to Buffer.\r
\r
**/\r
UINT16\r
EFIAPI\r
WriteUnaligned16 (\r
  OUT UINT16                    *Buffer,\r
  IN  UINT16                    Value\r
  );\r
\r
\r
/**\r
  Reads a 24-bit value from memory that may be unaligned.\r
\r
  This function returns the 24-bit value pointed to by Buffer. The function\r
  guarantees that the read operation does not produce an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 24-bit value that may be unaligned.\r
\r
  @return The 24-bit value read from Buffer.\r
\r
**/\r
UINT32\r
EFIAPI\r
ReadUnaligned24 (\r
  IN CONST UINT32              *Buffer\r
  );\r
\r
\r
/**\r
  Writes a 24-bit value to memory that may be unaligned.\r
\r
  This function writes the 24-bit value specified by Value to Buffer. Value is\r
  returned. The function guarantees that the write operation does not produce\r
  an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 24-bit value that may be unaligned.\r
  @param  Value   24-bit value to write to Buffer.\r
\r
  @return The 24-bit value to write to Buffer.\r
\r
**/\r
UINT32\r
EFIAPI\r
WriteUnaligned24 (\r
  OUT UINT32                    *Buffer,\r
  IN  UINT32                    Value\r
  );\r
\r
\r
/**\r
  Reads a 32-bit value from memory that may be unaligned.\r
\r
  This function returns the 32-bit value pointed to by Buffer. The function\r
  guarantees that the read operation does not produce an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 32-bit value that may be unaligned.\r
\r
  @return The 32-bit value read from Buffer.\r
\r
**/\r
UINT32\r
EFIAPI\r
ReadUnaligned32 (\r
  IN CONST UINT32              *Buffer\r
  );\r
\r
\r
/**\r
  Writes a 32-bit value to memory that may be unaligned.\r
\r
  This function writes the 32-bit value specified by Value to Buffer. Value is\r
  returned. The function guarantees that the write operation does not produce\r
  an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 32-bit value that may be unaligned.\r
  @param  Value   32-bit value to write to Buffer.\r
\r
  @return The 32-bit value to write to Buffer.\r
\r
**/\r
UINT32\r
EFIAPI\r
WriteUnaligned32 (\r
  OUT UINT32                    *Buffer,\r
  IN  UINT32                    Value\r
  );\r
\r
\r
/**\r
  Reads a 64-bit value from memory that may be unaligned.\r
\r
  This function returns the 64-bit value pointed to by Buffer. The function\r
  guarantees that the read operation does not produce an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 64-bit value that may be unaligned.\r
\r
  @return The 64-bit value read from Buffer.\r
\r
**/\r
UINT64\r
EFIAPI\r
ReadUnaligned64 (\r
  IN CONST UINT64              *Buffer\r
  );\r
\r
\r
/**\r
  Writes a 64-bit value to memory that may be unaligned.\r
\r
  This function writes the 64-bit value specified by Value to Buffer. Value is\r
  returned. The function guarantees that the write operation does not produce\r
  an alignment fault.\r
\r
  If the Buffer is NULL, then ASSERT().\r
\r
  @param  Buffer  Pointer to a 64-bit value that may be unaligned.\r
  @param  Value   64-bit value to write to Buffer.\r
\r
  @return The 64-bit value to write to Buffer.\r
\r
**/\r
UINT64\r
EFIAPI\r
WriteUnaligned64 (\r
  OUT UINT64                    *Buffer,\r
  IN  UINT64                    Value\r
  );\r
\r
\r
//\r
// Bit Field Functions\r
//\r
\r
/**\r
  Returns a bit field from an 8-bit value.\r
\r
  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
\r
  If 8-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 7, then ASSERT().\r
  If EndBit is greater than 7, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..7.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..7.\r
\r
  @return The bit field read.\r
\r
**/\r
UINT8\r
EFIAPI\r
BitFieldRead8 (\r
  IN      UINT8                     Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  );\r
\r
\r
/**\r
  Writes a bit field to an 8-bit value, and returns the result.\r
\r
  Writes Value to the bit field specified by the StartBit and the EndBit in\r
  Operand. All other bits in Operand are preserved. The new 8-bit value is\r
  returned.\r
\r
  If 8-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 7, then ASSERT().\r
  If EndBit is greater than 7, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..7.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..7.\r
  @param  Value     New value of the bit field.\r
\r
  @return The new 8-bit value.\r
\r
**/\r
UINT8\r
EFIAPI\r
BitFieldWrite8 (\r
  IN      UINT8                     Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT8                     Value\r
  );\r
\r
\r
/**\r
  Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
  result.\r
\r
  Performs a bitwise OR between the bit field specified by StartBit\r
  and EndBit in Operand and the value specified by OrData. All other bits in\r
  Operand are preserved. The new 8-bit value is returned.\r
\r
  If 8-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 7, then ASSERT().\r
  If EndBit is greater than 7, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..7.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..7.\r
  @param  OrData    The value to OR with the read value from the value\r
\r
  @return The new 8-bit value.\r
\r
**/\r
UINT8\r
EFIAPI\r
BitFieldOr8 (\r
  IN      UINT8                     Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT8                     OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r
  the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData. All other bits in Operand are\r
  preserved. The new 8-bit value is returned.\r
\r
  If 8-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 7, then ASSERT().\r
  If EndBit is greater than 7, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..7.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..7.\r
  @param  AndData   The value to AND with the read value from the value.\r
\r
  @return The new 8-bit value.\r
\r
**/\r
UINT8\r
EFIAPI\r
BitFieldAnd8 (\r
  IN      UINT8                     Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT8                     AndData\r
  );\r
\r
\r
/**\r
  Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r
  bitwise OR, and returns the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData, followed by a bitwise \r
  OR with value specified by OrData. All other bits in Operand are\r
  preserved. The new 8-bit value is returned.\r
\r
  If 8-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 7, then ASSERT().\r
  If EndBit is greater than 7, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..7.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..7.\r
  @param  AndData   The value to AND with the read value from the value.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The new 8-bit value.\r
\r
**/\r
UINT8\r
EFIAPI\r
BitFieldAndThenOr8 (\r
  IN      UINT8                     Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT8                     AndData,\r
  IN      UINT8                     OrData\r
  );\r
\r
\r
/**\r
  Returns a bit field from a 16-bit value.\r
\r
  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
\r
  If 16-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 15, then ASSERT().\r
  If EndBit is greater than 15, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..15.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..15.\r
\r
  @return The bit field read.\r
\r
**/\r
UINT16\r
EFIAPI\r
BitFieldRead16 (\r
  IN      UINT16                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  );\r
\r
\r
/**\r
  Writes a bit field to a 16-bit value, and returns the result.\r
\r
  Writes Value to the bit field specified by the StartBit and the EndBit in\r
  Operand. All other bits in Operand are preserved. The new 16-bit value is\r
  returned.\r
\r
  If 16-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 15, then ASSERT().\r
  If EndBit is greater than 15, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..15.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..15.\r
  @param  Value     New value of the bit field.\r
\r
  @return The new 16-bit value.\r
\r
**/\r
UINT16\r
EFIAPI\r
BitFieldWrite16 (\r
  IN      UINT16                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT16                    Value\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
  result.\r
\r
  Performs a bitwise OR between the bit field specified by StartBit\r
  and EndBit in Operand and the value specified by OrData. All other bits in\r
  Operand are preserved. The new 16-bit value is returned.\r
\r
  If 16-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 15, then ASSERT().\r
  If EndBit is greater than 15, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..15.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..15.\r
  @param  OrData    The value to OR with the read value from the value\r
\r
  @return The new 16-bit value.\r
\r
**/\r
UINT16\r
EFIAPI\r
BitFieldOr16 (\r
  IN      UINT16                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT16                    OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r
  the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData. All other bits in Operand are\r
  preserved. The new 16-bit value is returned.\r
\r
  If 16-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 15, then ASSERT().\r
  If EndBit is greater than 15, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..15.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..15.\r
  @param  AndData   The value to AND with the read value from the value\r
\r
  @return The new 16-bit value.\r
\r
**/\r
UINT16\r
EFIAPI\r
BitFieldAnd16 (\r
  IN      UINT16                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT16                    AndData\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r
  bitwise OR, and returns the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData, followed by a bitwise \r
  OR with value specified by OrData. All other bits in Operand are\r
  preserved. The new 16-bit value is returned.\r
\r
  If 16-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 15, then ASSERT().\r
  If EndBit is greater than 15, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..15.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..15.\r
  @param  AndData   The value to AND with the read value from the value.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The new 16-bit value.\r
\r
**/\r
UINT16\r
EFIAPI\r
BitFieldAndThenOr16 (\r
  IN      UINT16                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT16                    AndData,\r
  IN      UINT16                    OrData\r
  );\r
\r
\r
/**\r
  Returns a bit field from a 32-bit value.\r
\r
  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
\r
  If 32-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
\r
  @return The bit field read.\r
\r
**/\r
UINT32\r
EFIAPI\r
BitFieldRead32 (\r
  IN      UINT32                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  );\r
\r
\r
/**\r
  Writes a bit field to a 32-bit value, and returns the result.\r
\r
  Writes Value to the bit field specified by the StartBit and the EndBit in\r
  Operand. All other bits in Operand are preserved. The new 32-bit value is\r
  returned.\r
\r
  If 32-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  Value     New value of the bit field.\r
\r
  @return The new 32-bit value.\r
\r
**/\r
UINT32\r
EFIAPI\r
BitFieldWrite32 (\r
  IN      UINT32                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    Value\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
  result.\r
\r
  Performs a bitwise OR between the bit field specified by StartBit\r
  and EndBit in Operand and the value specified by OrData. All other bits in\r
  Operand are preserved. The new 32-bit value is returned.\r
\r
  If 32-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  OrData    The value to OR with the read value from the value\r
\r
  @return The new 32-bit value.\r
\r
**/\r
UINT32\r
EFIAPI\r
BitFieldOr32 (\r
  IN      UINT32                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r
  the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData. All other bits in Operand are\r
  preserved. The new 32-bit value is returned.\r
\r
  If 32-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  AndData   The value to AND with the read value from the value\r
\r
  @return The new 32-bit value.\r
\r
**/\r
UINT32\r
EFIAPI\r
BitFieldAnd32 (\r
  IN      UINT32                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    AndData\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r
  bitwise OR, and returns the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData, followed by a bitwise \r
  OR with value specified by OrData. All other bits in Operand are\r
  preserved. The new 32-bit value is returned.\r
\r
  If 32-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  AndData   The value to AND with the read value from the value.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The new 32-bit value.\r
\r
**/\r
UINT32\r
EFIAPI\r
BitFieldAndThenOr32 (\r
  IN      UINT32                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    AndData,\r
  IN      UINT32                    OrData\r
  );\r
\r
\r
/**\r
  Returns a bit field from a 64-bit value.\r
\r
  Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
\r
  If 64-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
\r
  @return The bit field read.\r
\r
**/\r
UINT64\r
EFIAPI\r
BitFieldRead64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  );\r
\r
\r
/**\r
  Writes a bit field to a 64-bit value, and returns the result.\r
\r
  Writes Value to the bit field specified by the StartBit and the EndBit in\r
  Operand. All other bits in Operand are preserved. The new 64-bit value is\r
  returned.\r
\r
  If 64-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  Value     New value of the bit field.\r
\r
  @return The new 64-bit value.\r
\r
**/\r
UINT64\r
EFIAPI\r
BitFieldWrite64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
  result.\r
\r
  Performs a bitwise OR between the bit field specified by StartBit\r
  and EndBit in Operand and the value specified by OrData. All other bits in\r
  Operand are preserved. The new 64-bit value is returned.\r
\r
  If 64-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  OrData    The value to OR with the read value from the value\r
\r
  @return The new 64-bit value.\r
\r
**/\r
UINT64\r
EFIAPI\r
BitFieldOr64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r
  the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData. All other bits in Operand are\r
  preserved. The new 64-bit value is returned.\r
\r
  If 64-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  AndData   The value to AND with the read value from the value\r
\r
  @return The new 64-bit value.\r
\r
**/\r
UINT64\r
EFIAPI\r
BitFieldAnd64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    AndData\r
  );\r
\r
\r
/**\r
  Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r
  bitwise OR, and returns the result.\r
\r
  Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
  in Operand and the value specified by AndData, followed by a bitwise \r
  OR with value specified by OrData. All other bits in Operand are\r
  preserved. The new 64-bit value is returned.\r
\r
  If 64-bit operations are not supported, then ASSERT().\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Operand   Operand on which to perform the bitfield operation.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  AndData   The value to AND with the read value from the value.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The new 64-bit value.\r
\r
**/\r
UINT64\r
EFIAPI\r
BitFieldAndThenOr64 (\r
  IN      UINT64                    Operand,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    AndData,\r
  IN      UINT64                    OrData\r
  );\r
\r
//\r
// Base Library Checksum Functions\r
//\r
\r
/**\r
  Returns the sum of all elements in a buffer in unit of UINT8.\r
  During calculation, the carry bits are dropped.\r
\r
  This function calculates the sum of all elements in a buffer\r
  in unit of UINT8. The carry bits in result of addition are dropped.\r
  The result is returned as UINT8. If Length is Zero, then Zero is\r
  returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the sum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
\r
**/\r
UINT8\r
EFIAPI\r
CalculateSum8 (\r
  IN      CONST UINT8              *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the two's complement checksum of all elements in a buffer\r
  of 8-bit values.\r
\r
  This function first calculates the sum of the 8-bit values in the\r
  buffer specified by Buffer and Length.  The carry bits in the result\r
  of addition are dropped. Then, the two's complement of the sum is\r
  returned.  If Length is 0, then 0 is returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the checksum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Checksum    The 2's complement checksum of Buffer.\r
\r
**/\r
UINT8\r
EFIAPI\r
CalculateCheckSum8 (\r
  IN      CONST UINT8              *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the sum of all elements in a buffer of 16-bit values.  During\r
  calculation, the carry bits are dropped.\r
\r
  This function calculates the sum of the 16-bit values in the buffer\r
  specified by Buffer and Length. The carry bits in result of addition are dropped.\r
  The 16-bit result is returned.  If Length is 0, then 0 is returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the sum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
\r
**/\r
UINT16\r
EFIAPI\r
CalculateSum16 (\r
  IN      CONST UINT16             *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the two's complement checksum of all elements in a buffer of\r
  16-bit values.\r
\r
  This function first calculates the sum of the 16-bit values in the buffer\r
  specified by Buffer and Length.  The carry bits in the result of addition\r
  are dropped. Then, the two's complement of the sum is returned.  If Length\r
  is 0, then 0 is returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
  If Length is not aligned on a 16-bit boundary, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the checksum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Checksum    The 2's complement checksum of Buffer.\r
\r
**/\r
UINT16\r
EFIAPI\r
CalculateCheckSum16 (\r
  IN      CONST UINT16             *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the sum of all elements in a buffer of 32-bit values. During\r
  calculation, the carry bits are dropped.\r
\r
  This function calculates the sum of the 32-bit values in the buffer\r
  specified by Buffer and Length. The carry bits in result of addition are dropped.\r
  The 32-bit result is returned. If Length is 0, then 0 is returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the sum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
\r
**/\r
UINT32\r
EFIAPI\r
CalculateSum32 (\r
  IN      CONST UINT32             *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the two's complement checksum of all elements in a buffer of\r
  32-bit values.\r
\r
  This function first calculates the sum of the 32-bit values in the buffer\r
  specified by Buffer and Length.  The carry bits in the result of addition\r
  are dropped. Then, the two's complement of the sum is returned.  If Length\r
  is 0, then 0 is returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
  If Length is not aligned on a 32-bit boundary, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the checksum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Checksum    The 2's complement checksum of Buffer.\r
\r
**/\r
UINT32\r
EFIAPI\r
CalculateCheckSum32 (\r
  IN      CONST UINT32             *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the sum of all elements in a buffer of 64-bit values.  During\r
  calculation, the carry bits are dropped.\r
\r
  This function calculates the sum of the 64-bit values in the buffer\r
  specified by Buffer and Length. The carry bits in result of addition are dropped.\r
  The 64-bit result is returned.  If Length is 0, then 0 is returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the sum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Sum         The sum of Buffer with carry bits dropped during additions.\r
\r
**/\r
UINT64\r
EFIAPI\r
CalculateSum64 (\r
  IN      CONST UINT64             *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Returns the two's complement checksum of all elements in a buffer of\r
  64-bit values.\r
\r
  This function first calculates the sum of the 64-bit values in the buffer\r
  specified by Buffer and Length.  The carry bits in the result of addition\r
  are dropped. Then, the two's complement of the sum is returned.  If Length\r
  is 0, then 0 is returned.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
  If Length is not aligned on a 64-bit boundary, then ASSERT().\r
  If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
\r
  @param  Buffer      Pointer to the buffer to carry out the checksum operation.\r
  @param  Length      The size, in bytes, of Buffer.\r
\r
  @return Checksum    The 2's complement checksum of Buffer.\r
\r
**/\r
UINT64\r
EFIAPI\r
CalculateCheckSum64 (\r
  IN      CONST UINT64             *Buffer,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
//\r
// Base Library CPU Functions\r
//\r
\r
/**\r
  Function entry point used when a stack switch is requested with SwitchStack()\r
\r
  @param  Context1        Context1 parameter passed into SwitchStack().\r
  @param  Context2        Context2 parameter passed into SwitchStack().\r
\r
**/\r
typedef\r
VOID\r
(EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r
  IN      VOID                      *Context1,  OPTIONAL\r
  IN      VOID                      *Context2   OPTIONAL\r
  );\r
\r
\r
/**\r
  Used to serialize load and store operations.\r
\r
  All loads and stores that proceed calls to this function are guaranteed to be\r
  globally visible when this function returns.\r
\r
**/\r
VOID\r
EFIAPI\r
MemoryFence (\r
  VOID\r
  );\r
\r
\r
/**\r
  Saves the current CPU context that can be restored with a call to LongJump()\r
  and returns 0.\r
\r
  Saves the current CPU context in the buffer specified by JumpBuffer and\r
  returns 0. The initial call to SetJump() must always return 0. Subsequent\r
  calls to LongJump() cause a non-zero value to be returned by SetJump().\r
\r
  If JumpBuffer is NULL, then ASSERT().\r
  For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
  \r
  NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r
  The same structure must never be used for more than one CPU architecture context.\r
  For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r
  SetJump()/LongJump() is not currently supported for the EBC processor type.   \r
\r
  @param  JumpBuffer  A pointer to CPU context buffer.\r
\r
  @retval 0 Indicates a return from SetJump().\r
\r
**/\r
UINTN\r
EFIAPI\r
SetJump (\r
  OUT     BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer\r
  );\r
\r
\r
/**\r
  Restores the CPU context that was saved with SetJump().\r
\r
  Restores the CPU context from the buffer specified by JumpBuffer. This\r
  function never returns to the caller. Instead is resumes execution based on\r
  the state of JumpBuffer.\r
\r
  If JumpBuffer is NULL, then ASSERT().\r
  For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
  If Value is 0, then ASSERT().\r
\r
  @param  JumpBuffer  A pointer to CPU context buffer.\r
  @param  Value       The value to return when the SetJump() context is\r
                      restored and must be non-zero.\r
\r
**/\r
VOID\r
EFIAPI\r
LongJump (\r
  IN      BASE_LIBRARY_JUMP_BUFFER  *JumpBuffer,\r
  IN      UINTN                     Value\r
  );\r
\r
\r
/**\r
  Enables CPU interrupts.\r
\r
**/\r
VOID\r
EFIAPI\r
EnableInterrupts (\r
  VOID\r
  );\r
\r
\r
/**\r
  Disables CPU interrupts.\r
\r
**/\r
VOID\r
EFIAPI\r
DisableInterrupts (\r
  VOID\r
  );\r
\r
\r
/**\r
  Disables CPU interrupts and returns the interrupt state prior to the disable\r
  operation.\r
\r
  @retval TRUE  CPU interrupts were enabled on entry to this call.\r
  @retval FALSE CPU interrupts were disabled on entry to this call.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
SaveAndDisableInterrupts (\r
  VOID\r
  );\r
\r
\r
/**\r
  Enables CPU interrupts for the smallest window required to capture any\r
  pending interrupts.\r
\r
**/\r
VOID\r
EFIAPI\r
EnableDisableInterrupts (\r
  VOID\r
  );\r
\r
\r
/**\r
  Retrieves the current CPU interrupt state.\r
\r
  Returns TRUE is interrupts are currently enabled. Otherwise\r
  returns FALSE.\r
\r
  @retval TRUE  CPU interrupts are enabled.\r
  @retval FALSE CPU interrupts are disabled.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
GetInterruptState (\r
  VOID\r
  );\r
\r
\r
/**\r
  Set the current CPU interrupt state.\r
\r
  Sets the current CPU interrupt state to the state specified by\r
  InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r
  InterruptState is FALSE, then interrupts are disabled. InterruptState is\r
  returned.\r
\r
  @param  InterruptState  TRUE if interrupts should enabled. FALSE if\r
                          interrupts should be disabled.\r
\r
  @return InterruptState\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
SetInterruptState (\r
  IN      BOOLEAN                   InterruptState\r
  );\r
\r
\r
/**\r
  Requests CPU to pause for a short period of time.\r
\r
  Requests CPU to pause for a short period of time. Typically used in MP\r
  systems to prevent memory starvation while waiting for a spin lock.\r
\r
**/\r
VOID\r
EFIAPI\r
CpuPause (\r
  VOID\r
  );\r
\r
\r
/**\r
  Transfers control to a function starting with a new stack.\r
\r
  Transfers control to the function specified by EntryPoint using the\r
  new stack specified by NewStack and passing in the parameters specified\r
  by Context1 and Context2.  Context1 and Context2 are optional and may\r
  be NULL.  The function EntryPoint must never return.  This function\r
  supports a variable number of arguments following the NewStack parameter.\r
  These additional arguments are ignored on IA-32, x64, and EBC architectures.\r
  Itanium processors expect one additional parameter of type VOID * that specifies\r
  the new backing store pointer.\r
\r
  If EntryPoint is NULL, then ASSERT().\r
  If NewStack is NULL, then ASSERT().\r
\r
  @param  EntryPoint  A pointer to function to call with the new stack.\r
  @param  Context1    A pointer to the context to pass into the EntryPoint\r
                      function.\r
  @param  Context2    A pointer to the context to pass into the EntryPoint\r
                      function.\r
  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
                      function.\r
  @param  ...         This variable argument list is ignored for IA-32, x64, and EBC architectures.  \r
                      For Itanium processors, this variable argument list is expected to contain \r
                      a single parameter of type VOID * that specifies the new backing \r
                      store pointer.\r
\r
\r
**/\r
VOID\r
EFIAPI\r
SwitchStack (\r
  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
  IN      VOID                      *Context1,  OPTIONAL\r
  IN      VOID                      *Context2,  OPTIONAL\r
  IN      VOID                      *NewStack,\r
  ...\r
  );\r
\r
\r
/**\r
  Generates a breakpoint on the CPU.\r
\r
  Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
  that code can resume normal execution after the breakpoint.\r
\r
**/\r
VOID\r
EFIAPI\r
CpuBreakpoint (\r
  VOID\r
  );\r
\r
\r
/**\r
  Executes an infinite loop.\r
\r
  Forces the CPU to execute an infinite loop. A debugger may be used to skip\r
  past the loop and the code that follows the loop must execute properly. This\r
  implies that the infinite loop must not cause the code that follow it to be\r
  optimized away.\r
\r
**/\r
VOID\r
EFIAPI\r
CpuDeadLoop (\r
  VOID\r
  );\r
 \r
#if defined (MDE_CPU_IPF)\r
\r
/**\r
  Flush a range of  cache lines in the cache coherency domain of the calling\r
  CPU.\r
\r
  Flushes the cache lines specified by Address and Length.  If Address is not aligned \r
  on a cache line boundary, then entire cache line containing Address is flushed.  \r
  If Address + Length is not aligned on a cache line boundary, then the entire cache \r
  line containing Address + Length - 1 is flushed.  This function may choose to flush \r
  the entire cache if that is more efficient than flushing the specified range.  If \r
  Length is 0, the no cache lines are flushed.  Address is returned.   \r
  This function is only available on Itanium processors.\r
\r
  If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
\r
  @param  Address The base address of the instruction lines to invalidate. If\r
                  the CPU is in a physical addressing mode, then Address is a\r
                  physical address. If the CPU is in a virtual addressing mode,\r
                  then Address is a virtual address.\r
\r
  @param  Length  The number of bytes to invalidate from the instruction cache.\r
\r
  @return Address.\r
\r
**/\r
VOID *\r
EFIAPI\r
AsmFlushCacheRange (\r
  IN      VOID                      *Address,\r
  IN      UINTN                     Length\r
  );\r
\r
\r
/**\r
  Executes a FC instruction\r
  Executes a FC instruction on the cache line specified by Address.\r
  The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
  An implementation may flush a larger region.  This function is only available on Itanium processors.\r
\r
  @param Address    The Address of cache line to be flushed.\r
\r
  @return The address of FC instruction executed.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmFc (\r
  IN  UINT64  Address\r
  );\r
\r
\r
/**\r
  Executes a FC.I instruction.\r
  Executes a FC.I instruction on the cache line specified by Address.\r
  The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
  An implementation may flush a larger region.  This function is only available on Itanium processors.\r
\r
  @param Address    The Address of cache line to be flushed.\r
\r
  @return The address of FC.I instruction executed.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmFci (\r
  IN  UINT64  Address\r
  );\r
\r
\r
/**\r
  Reads the current value of a Processor Identifier Register (CPUID).\r
  \r
  Reads and returns the current value of Processor Identifier Register specified by Index. \r
  The Index of largest implemented CPUID (One less than the number of implemented CPUID\r
  registers) is determined by CPUID [3] bits {7:0}.\r
  No parameter checking is performed on Index.  If the Index value is beyond the\r
  implemented CPUID register range, a Reserved Register/Field fault may occur.  The caller\r
  must either guarantee that Index is valid, or the caller must set up fault handlers to\r
  catch the faults.  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Processor Identifier Register index to read.\r
\r
  @return The current value of Processor Identifier Register specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadCpuid (\r
  IN  UINT8   Index\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Processor Status Register (PSR).\r
  This function is only available on Itanium processors.\r
\r
  @return The current value of PSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadPsr (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Processor Status Register (PSR).\r
\r
  No parameter checking is performed on Value.  All bits of Value corresponding to\r
  reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults. This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to PSR.\r
\r
  @return The 64-bit value written to the PSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWritePsr (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #0 (KR0).\r
  \r
  Reads and returns the current value of KR0. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of KR0.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr0 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #1 (KR1).\r
\r
  Reads and returns the current value of KR1. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of KR1.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr1 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #2 (KR2).\r
\r
  Reads and returns the current value of KR2. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of KR2.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr2 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #3 (KR3).\r
\r
  Reads and returns the current value of KR3. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of KR3.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr3 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #4 (KR4).\r
\r
  Reads and returns the current value of KR4. \r
  This function is only available on Itanium processors.\r
  \r
  @return The current value of KR4.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr4 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #5 (KR5).\r
\r
  Reads and returns the current value of KR5. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of KR5.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr5 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #6 (KR6).\r
\r
  Reads and returns the current value of KR6. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of KR6.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr6 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Kernel Register #7 (KR7).\r
\r
  Reads and returns the current value of KR7. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of KR7.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadKr7 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #0 (KR0).\r
  \r
  Writes the current value of KR0.  The 64-bit value written to \r
  the KR0 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR0.\r
\r
  @return The 64-bit value written to the KR0.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr0 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #1 (KR1).\r
\r
  Writes the current value of KR1.  The 64-bit value written to \r
  the KR1 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR1.\r
\r
  @return The 64-bit value written to the KR1.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr1 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #2 (KR2).\r
\r
  Writes the current value of KR2.  The 64-bit value written to \r
  the KR2 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR2.\r
\r
  @return The 64-bit value written to the KR2.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr2 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #3 (KR3).\r
\r
  Writes the current value of KR3.  The 64-bit value written to \r
  the KR3 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR3.\r
\r
  @return The 64-bit value written to the KR3.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr3 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #4 (KR4).\r
\r
  Writes the current value of KR4.  The 64-bit value written to \r
  the KR4 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR4.\r
\r
  @return The 64-bit value written to the KR4.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr4 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #5 (KR5).\r
\r
  Writes the current value of KR5.  The 64-bit value written to \r
  the KR5 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR5.\r
\r
  @return The 64-bit value written to the KR5.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr5 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #6 (KR6).\r
\r
  Writes the current value of KR6.  The 64-bit value written to \r
  the KR6 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR6.\r
\r
  @return The 64-bit value written to the KR6.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr6 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Kernel Register #7 (KR7).\r
\r
  Writes the current value of KR7.  The 64-bit value written to \r
  the KR7 is returned. This function is only available on Itanium processors.\r
\r
  @param  Value   The 64-bit value to write to KR7.\r
\r
  @return The 64-bit value written to the KR7.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteKr7 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Reads the current value of Interval Timer Counter Register (ITC).\r
  \r
  Reads and returns the current value of ITC.\r
  This function is only available on Itanium processors.\r
\r
  @return The current value of ITC.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadItc (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Interval Timer Vector Register (ITV).\r
  \r
  Reads and returns the current value of ITV. \r
  This function is only available on Itanium processors.\r
\r
  @return The current value of ITV.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadItv (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Interval Timer Match Register (ITM).\r
  \r
  Reads and returns the current value of ITM.\r
  This function is only available on Itanium processors.\r
\r
  @return The current value of ITM.\r
**/\r
UINT64\r
EFIAPI\r
AsmReadItm (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r
  \r
  Writes the current value of ITC.  The 64-bit value written to the ITC is returned. \r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to ITC.\r
\r
  @return The 64-bit value written to the ITC.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteItc (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Interval Timer Match Register (ITM).\r
  \r
  Writes the current value of ITM.  The 64-bit value written to the ITM is returned. \r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to ITM.\r
\r
  @return The 64-bit value written to the ITM.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteItm (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r
  \r
  Writes the current value of ITV.  The 64-bit value written to the ITV is returned.  \r
  No parameter checking is performed on Value.  All bits of Value corresponding to\r
  reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to ITV.\r
\r
  @return The 64-bit value written to the ITV.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteItv (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Reads the current value of Default Control Register (DCR).\r
  \r
  Reads and returns the current value of DCR.  This function is only available on Itanium processors.\r
\r
  @return The current value of DCR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadDcr (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Interruption Vector Address Register (IVA).\r
  \r
  Reads and returns the current value of IVA.  This function is only available on Itanium processors.\r
\r
  @return The current value of IVA.\r
**/\r
UINT64\r
EFIAPI\r
AsmReadIva (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Page Table Address Register (PTA).\r
  \r
  Reads and returns the current value of PTA.  This function is only available on Itanium processors.\r
\r
  @return The current value of PTA.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadPta (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Default Control Register (DCR).\r
  \r
  Writes the current value of DCR.  The 64-bit value written to the DCR is returned. \r
  No parameter checking is performed on Value.  All bits of Value corresponding to\r
  reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to DCR.\r
\r
  @return The 64-bit value written to the DCR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteDcr (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r
  \r
  Writes the current value of IVA.  The 64-bit value written to the IVA is returned.  \r
  The size of vector table is 32 K bytes and is 32 K bytes aligned\r
  the low 15 bits of Value is ignored when written.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to IVA.\r
\r
  @return The 64-bit value written to the IVA.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteIva (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Page Table Address Register (PTA).\r
  \r
  Writes the current value of PTA.  The 64-bit value written to the PTA is returned. \r
  No parameter checking is performed on Value.  All bits of Value corresponding to\r
  reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to PTA.\r
\r
  @return The 64-bit value written to the PTA.\r
**/\r
UINT64\r
EFIAPI\r
AsmWritePta (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Reads the current value of Local Interrupt ID Register (LID).\r
  \r
  Reads and returns the current value of LID.  This function is only available on Itanium processors.\r
\r
  @return The current value of LID.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadLid (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of External Interrupt Vector Register (IVR).\r
  \r
  Reads and returns the current value of IVR.  This function is only available on Itanium processors. \r
\r
  @return The current value of IVR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadIvr (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Task Priority Register (TPR).\r
  \r
  Reads and returns the current value of TPR.  This function is only available on Itanium processors. \r
\r
  @return The current value of TPR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadTpr (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of External Interrupt Request Register #0 (IRR0).\r
  \r
  Reads and returns the current value of IRR0.  This function is only available on Itanium processors.  \r
\r
  @return The current value of IRR0.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadIrr0 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of External Interrupt Request Register #1 (IRR1).\r
  \r
  Reads and returns the current value of IRR1.  This function is only available on Itanium processors. \r
\r
  @return The current value of IRR1.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadIrr1 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of External Interrupt Request Register #2 (IRR2).\r
  \r
  Reads and returns the current value of IRR2.  This function is only available on Itanium processors.\r
\r
  @return The current value of IRR2.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadIrr2 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of External Interrupt Request Register #3 (IRR3).\r
  \r
  Reads and returns the current value of IRR3.  This function is only available on Itanium processors.  \r
\r
  @return The current value of IRR3.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadIrr3 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Performance Monitor Vector Register (PMV).\r
  \r
  Reads and returns the current value of PMV.  This function is only available on Itanium processors. \r
\r
  @return The current value of PMV.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadPmv (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Corrected Machine Check Vector Register (CMCV).\r
  \r
  Reads and returns the current value of CMCV.  This function is only available on Itanium processors.\r
\r
  @return The current value of CMCV.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadCmcv (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Local Redirection Register #0 (LRR0).\r
  \r
  Reads and returns the current value of LRR0.  This function is only available on Itanium processors. \r
\r
  @return The current value of LRR0.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadLrr0 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Local Redirection Register #1 (LRR1).\r
  \r
  Reads and returns the current value of LRR1.  This function is only available on Itanium processors.\r
\r
  @return The current value of LRR1.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadLrr1 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r
  \r
  Writes the current value of LID.  The 64-bit value written to the LID is returned.  \r
  No parameter checking is performed on Value.  All bits of Value corresponding to\r
  reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to LID.\r
\r
  @return The 64-bit value written to the LID.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteLid (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Task Priority Register (TPR).\r
  \r
  Writes the current value of TPR.  The 64-bit value written to the TPR is returned. \r
  No parameter checking is performed on Value.  All bits of Value corresponding to\r
  reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to TPR.\r
\r
  @return The 64-bit value written to the TPR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteTpr (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Performs a write operation on End OF External Interrupt Register (EOI).\r
  \r
  Writes a value of 0 to the EOI Register.  This function is only available on Itanium processors.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteEoi (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r
  \r
  Writes the current value of PMV.  The 64-bit value written to the PMV is returned.  \r
  No parameter checking is performed on Value.  All bits of Value corresponding\r
  to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to PMV.\r
\r
  @return The 64-bit value written to the PMV.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWritePmv (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r
  \r
  Writes the current value of CMCV.  The 64-bit value written to the CMCV is returned. \r
  No parameter checking is performed on Value.  All bits of Value corresponding\r
  to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to CMCV.\r
\r
  @return The 64-bit value written to the CMCV.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteCmcv (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r
  \r
  Writes the current value of LRR0.  The 64-bit value written to the LRR0 is returned.  \r
  No parameter checking is performed on Value.  All bits of Value corresponding\r
  to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to LRR0.\r
\r
  @return The 64-bit value written to the LRR0.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteLrr0 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r
  \r
  Writes the current value of LRR1.  The 64-bit value written to the LRR1 is returned. \r
  No parameter checking is performed on Value.  All bits of Value corresponding\r
  to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Value is valid, or the caller must\r
  set up fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Value    The 64-bit value to write to LRR1.\r
\r
  @return The 64-bit value written to the LRR1.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteLrr1 (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Reads the current value of Instruction Breakpoint Register (IBR).\r
  \r
  The Instruction Breakpoint Registers are used in pairs.  The even numbered\r
  registers contain breakpoint addresses, and the odd numbered registers contain\r
  breakpoint mask conditions.  At least 4 instruction registers pairs are implemented\r
  on all processor models.   Implemented registers are contiguous starting with\r
  register 0.  No parameter checking is performed on Index, and if the Index value\r
  is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
  occur.  The caller must either guarantee that Index is valid, or the caller must\r
  set up fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Instruction Breakpoint Register index to read.\r
\r
  @return The current value of Instruction Breakpoint Register specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadIbr (\r
  IN  UINT8   Index\r
  );\r
\r
\r
/**\r
  Reads the current value of Data Breakpoint Register (DBR).\r
\r
  The Data Breakpoint Registers are used in pairs.  The even numbered registers\r
  contain breakpoint addresses, and odd numbered registers contain breakpoint\r
  mask conditions.  At least 4 data registers pairs are implemented on all processor\r
  models.  Implemented registers are contiguous starting with register 0.\r
  No parameter checking is performed on Index.  If the Index value is beyond\r
  the implemented DBR register range, a Reserved Register/Field fault may occur.\r
  The caller must either guarantee that Index is valid, or the caller must set up\r
  fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Data Breakpoint Register index to read.\r
\r
  @return The current value of Data Breakpoint Register specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadDbr (\r
  IN  UINT8   Index\r
  );\r
\r
\r
/**\r
  Reads the current value of Performance Monitor Configuration Register (PMC).\r
\r
  All processor implementations provide at least 4 performance counters\r
  (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
  status registers (PMC [0]... PMC [3]).  Processor implementations may provide\r
  additional implementation-dependent PMC and PMD to increase the number of\r
  'generic' performance counters (PMC/PMD pairs).  The remainder of PMC and PMD\r
  register set is implementation dependent.  No parameter checking is performed\r
  on Index.  If the Index value is beyond the implemented PMC register range,\r
  zero value will be returned.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Performance Monitor Configuration Register index to read.\r
\r
  @return   The current value of Performance Monitor Configuration Register\r
            specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadPmc (\r
  IN  UINT8   Index\r
  );\r
\r
\r
/**\r
  Reads the current value of Performance Monitor Data Register (PMD).\r
\r
  All processor implementations provide at least 4 performance counters\r
  (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r
  overflow status registers (PMC [0]... PMC [3]).  Processor implementations may\r
  provide additional implementation-dependent PMC and PMD to increase the number\r
  of 'generic' performance counters (PMC/PMD pairs).  The remainder of PMC and PMD\r
  register set is implementation dependent.  No parameter checking is performed\r
  on Index.  If the Index value is beyond the implemented PMD register range,\r
  zero value will be returned.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Performance Monitor Data Register index to read.\r
\r
  @return The current value of Performance Monitor Data Register specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadPmd (\r
  IN  UINT8   Index\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r
\r
  Writes current value of Instruction Breakpoint Register specified by Index.\r
  The Instruction Breakpoint Registers are used in pairs.  The even numbered\r
  registers contain breakpoint addresses, and odd numbered registers contain\r
  breakpoint mask conditions.  At least 4 instruction registers pairs are implemented\r
  on all processor models.  Implemented registers are contiguous starting with\r
  register 0.  No parameter checking is performed on Index.  If the Index value\r
  is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
  occur.  The caller must either guarantee that Index is valid, or the caller must\r
  set up fault handlers to catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Instruction Breakpoint Register index to write.\r
  @param Value    The 64-bit value to write to IBR.\r
\r
  @return The 64-bit value written to the IBR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteIbr (\r
  IN UINT8   Index,\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Data Breakpoint Register (DBR).\r
\r
  Writes current value of Data Breakpoint Register specified by Index.\r
  The Data Breakpoint Registers are used in pairs.  The even numbered registers\r
  contain breakpoint addresses, and odd numbered registers contain breakpoint\r
  mask conditions.  At least 4 data registers pairs are implemented on all processor\r
  models.  Implemented registers are contiguous starting with register 0.  No parameter\r
  checking is performed on Index.  If the Index value is beyond the implemented\r
  DBR register range, a Reserved Register/Field fault may occur.  The caller must\r
  either guarantee that Index is valid, or the caller must set up fault handlers to\r
  catch the faults.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Data Breakpoint Register index to write.\r
  @param Value    The 64-bit value to write to DBR.\r
\r
  @return The 64-bit value written to the DBR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteDbr (\r
  IN UINT8   Index,\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r
\r
  Writes current value of Performance Monitor Configuration Register specified by Index.\r
  All processor implementations provide at least 4 performance counters\r
  (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status\r
  registers (PMC [0]... PMC [3]).  Processor implementations may provide additional\r
  implementation-dependent PMC and PMD to increase the number of 'generic' performance\r
  counters (PMC/PMD pairs).  The remainder of PMC and PMD register set is implementation\r
  dependent.  No parameter checking is performed on Index.  If the Index value is\r
  beyond the implemented PMC register range, the write is ignored.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Performance Monitor Configuration Register index to write.\r
  @param Value    The 64-bit value to write to PMC.\r
\r
  @return The 64-bit value written to the PMC.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWritePmc (\r
  IN UINT8   Index,\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r
\r
  Writes current value of Performance Monitor Data Register specified by Index.\r
  All processor implementations provide at least 4 performance counters\r
  (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
  status registers (PMC [0]... PMC [3]).  Processor implementations may provide\r
  additional implementation-dependent PMC and PMD to increase the number of 'generic'\r
  performance counters (PMC/PMD pairs).  The remainder of PMC and PMD register set\r
  is implementation dependent.  No parameter checking is performed on Index.  If the\r
  Index value is beyond the implemented PMD register range, the write is ignored.\r
  This function is only available on Itanium processors.\r
\r
  @param Index    The 8-bit Performance Monitor Data Register index to write.\r
  @param Value    The 64-bit value to write to PMD.\r
\r
  @return The 64-bit value written to the PMD.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWritePmd (\r
  IN UINT8   Index,\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Global Pointer (GP).\r
\r
  Reads and returns the current value of GP.\r
  This function is only available on Itanium processors.\r
\r
  @return The current value of GP.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadGp (\r
  VOID\r
  );\r
\r
\r
/**\r
  Write the current value of 64-bit Global Pointer (GP).\r
\r
  Writes the current value of GP. The 64-bit value written to the GP is returned.\r
  No parameter checking is performed on Value.\r
  This function is only available on Itanium processors.\r
\r
  @param Value  The 64-bit value to write to GP.\r
\r
  @return The 64-bit value written to the GP.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteGp (\r
  IN UINT64  Value\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit Stack Pointer (SP).\r
\r
  Reads and returns the current value of SP.\r
  This function is only available on Itanium processors.\r
\r
  @return The current value of SP.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadSp (\r
  VOID\r
  );\r
\r
\r
///\r
/// Valid Index value for AsmReadControlRegister()\r
///\r
#define IPF_CONTROL_REGISTER_DCR   0\r
#define IPF_CONTROL_REGISTER_ITM   1\r
#define IPF_CONTROL_REGISTER_IVA   2\r
#define IPF_CONTROL_REGISTER_PTA   8\r
#define IPF_CONTROL_REGISTER_IPSR  16\r
#define IPF_CONTROL_REGISTER_ISR   17\r
#define IPF_CONTROL_REGISTER_IIP   19\r
#define IPF_CONTROL_REGISTER_IFA   20\r
#define IPF_CONTROL_REGISTER_ITIR  21\r
#define IPF_CONTROL_REGISTER_IIPA  22\r
#define IPF_CONTROL_REGISTER_IFS   23\r
#define IPF_CONTROL_REGISTER_IIM   24\r
#define IPF_CONTROL_REGISTER_IHA   25\r
#define IPF_CONTROL_REGISTER_LID   64\r
#define IPF_CONTROL_REGISTER_IVR   65\r
#define IPF_CONTROL_REGISTER_TPR   66\r
#define IPF_CONTROL_REGISTER_EOI   67\r
#define IPF_CONTROL_REGISTER_IRR0  68\r
#define IPF_CONTROL_REGISTER_IRR1  69\r
#define IPF_CONTROL_REGISTER_IRR2  70\r
#define IPF_CONTROL_REGISTER_IRR3  71\r
#define IPF_CONTROL_REGISTER_ITV   72\r
#define IPF_CONTROL_REGISTER_PMV   73\r
#define IPF_CONTROL_REGISTER_CMCV  74\r
#define IPF_CONTROL_REGISTER_LRR0  80\r
#define IPF_CONTROL_REGISTER_LRR1  81\r
\r
/**\r
  Reads a 64-bit control register.\r
\r
  Reads and returns the control register specified by Index. The valid Index valued are defined\r
  above in "Related Definitions".\r
  If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only available on Itanium processors.\r
\r
  @param  Index                     The index of the control register to read.\r
\r
  @return The control register specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadControlRegister (\r
  IN UINT64  Index\r
  );\r
\r
\r
///\r
/// Valid Index value for AsmReadApplicationRegister()\r
///\r
#define IPF_APPLICATION_REGISTER_K0        0\r
#define IPF_APPLICATION_REGISTER_K1        1\r
#define IPF_APPLICATION_REGISTER_K2        2\r
#define IPF_APPLICATION_REGISTER_K3        3\r
#define IPF_APPLICATION_REGISTER_K4        4\r
#define IPF_APPLICATION_REGISTER_K5        5\r
#define IPF_APPLICATION_REGISTER_K6        6\r
#define IPF_APPLICATION_REGISTER_K7        7\r
#define IPF_APPLICATION_REGISTER_RSC       16\r
#define IPF_APPLICATION_REGISTER_BSP       17\r
#define IPF_APPLICATION_REGISTER_BSPSTORE  18\r
#define IPF_APPLICATION_REGISTER_RNAT      19\r
#define IPF_APPLICATION_REGISTER_FCR       21\r
#define IPF_APPLICATION_REGISTER_EFLAG     24\r
#define IPF_APPLICATION_REGISTER_CSD       25\r
#define IPF_APPLICATION_REGISTER_SSD       26\r
#define IPF_APPLICATION_REGISTER_CFLG      27\r
#define IPF_APPLICATION_REGISTER_FSR       28\r
#define IPF_APPLICATION_REGISTER_FIR       29\r
#define IPF_APPLICATION_REGISTER_FDR       30\r
#define IPF_APPLICATION_REGISTER_CCV       32\r
#define IPF_APPLICATION_REGISTER_UNAT      36\r
#define IPF_APPLICATION_REGISTER_FPSR      40\r
#define IPF_APPLICATION_REGISTER_ITC       44\r
#define IPF_APPLICATION_REGISTER_PFS       64\r
#define IPF_APPLICATION_REGISTER_LC        65\r
#define IPF_APPLICATION_REGISTER_EC        66\r
\r
/**\r
  Reads a 64-bit application register.\r
\r
  Reads and returns the application register specified by Index. The valid Index valued are defined\r
  above in "Related Definitions".\r
  If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only available on Itanium processors.\r
\r
  @param  Index                     The index of the application register to read.\r
\r
  @return The application register specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadApplicationRegister (\r
  IN UINT64  Index\r
  );\r
\r
\r
/**\r
  Reads the current value of a Machine Specific Register (MSR).\r
\r
  Reads and returns the current value of the Machine Specific Register specified by Index.  No\r
  parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r
  register range, a Reserved Register/Field fault may occur.  The caller must either guarantee that\r
  Index is valid, or the caller must set up fault handlers to catch the faults.  This function is\r
  only available on Itanium processors.\r
\r
  @param  Index                     The 8-bit Machine Specific Register index to read.\r
\r
  @return The current value of the Machine Specific Register specified by Index.  \r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMsr (\r
  IN UINT8   Index  \r
  );\r
\r
\r
/**\r
  Writes the current value of a Machine Specific Register (MSR).\r
\r
  Writes Value to the Machine Specific Register specified by Index.  Value is returned.  No\r
  parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r
  register range, a Reserved Register/Field fault may occur.  The caller must either guarantee that\r
  Index is valid, or the caller must set up fault handlers to catch the faults.  This function is\r
  only available on Itanium processors.\r
\r
  @param  Index                     The 8-bit Machine Specific Register index to write.\r
  @param  Value                     The 64-bit value to write to the Machine Specific Register.\r
\r
  @return The 64-bit value to write to the Machine Specific Register.  \r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteMsr (\r
  IN UINT8   Index, \r
  IN UINT64  Value  \r
  );\r
\r
\r
/**\r
  Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r
\r
  Determines the current execution mode of the CPU.\r
  If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r
  If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r
  If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r
  and -1 is returned.\r
  This function is only available on Itanium processors.\r
\r
  @retval  1  The CPU is in virtual mode.\r
  @retval  0  The CPU is in physical mode.\r
  @retval -1  The CPU is in mixed mode.\r
\r
**/\r
INT64\r
EFIAPI\r
AsmCpuVirtual (\r
  VOID\r
  );\r
\r
\r
/**\r
  Makes a PAL procedure call.\r
\r
  This is a wrapper function to make a PAL procedure call.  Based on the Index\r
  value this API will make static or stacked PAL call.  The following table\r
  describes the usage of PAL Procedure Index Assignment. Architected procedures\r
  may be designated as required or optional.  If a PAL procedure is specified\r
  as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r
  Status field of the PAL_CALL_RETURN structure.\r
  This indicates that the procedure is not present in this PAL implementation.\r
  It is the caller's responsibility to check for this return code after calling\r
  any optional PAL procedure.\r
  No parameter checking is performed on the 5 input parameters, but there are\r
  some common rules that the caller should follow when making a PAL call.  Any\r
  address passed to PAL as buffers for return parameters must be 8-byte aligned.\r
  Unaligned addresses may cause undefined results.  For those parameters defined\r
  as reserved or some fields defined as reserved must be zero filled or the invalid\r
  argument return value may be returned or undefined result may occur during the\r
  execution of the procedure.  If the PalEntryPoint  does not point to a valid\r
  PAL entry point then the system behavior is undefined.  This function is only\r
  available on Itanium processors.\r
\r
  @param PalEntryPoint  The PAL procedure calls entry point.\r
  @param Index          The PAL procedure Index number.\r
  @param Arg2           The 2nd parameter for PAL procedure calls.\r
  @param Arg3           The 3rd parameter for PAL procedure calls.\r
  @param Arg4           The 4th parameter for PAL procedure calls.\r
\r
  @return structure returned from the PAL Call procedure, including the status and return value.\r
\r
**/\r
PAL_CALL_RETURN\r
EFIAPI\r
AsmPalCall (\r
  IN UINT64  PalEntryPoint,\r
  IN UINT64  Index,\r
  IN UINT64  Arg2,\r
  IN UINT64  Arg3,\r
  IN UINT64  Arg4\r
  );\r
#endif\r
\r
#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
///\r
/// IA32 and x64 Specific Functions\r
/// Byte packed structure for 16-bit Real Mode EFLAGS\r
///\r
typedef union {\r
  struct {\r
    UINT32  CF:1;           ///< Carry Flag\r
    UINT32  Reserved_0:1;   ///< Reserved\r
    UINT32  PF:1;           ///< Parity Flag\r
    UINT32  Reserved_1:1;   ///< Reserved\r
    UINT32  AF:1;           ///< Auxiliary Carry Flag\r
    UINT32  Reserved_2:1;   ///< Reserved\r
    UINT32  ZF:1;           ///< Zero Flag\r
    UINT32  SF:1;           ///< Sign Flag\r
    UINT32  TF:1;           ///< Trap Flag\r
    UINT32  IF:1;           ///< Interrupt Enable Flag\r
    UINT32  DF:1;           ///< Direction Flag\r
    UINT32  OF:1;           ///< Overflow Flag\r
    UINT32  IOPL:2;         ///< I/O Privilege Level\r
    UINT32  NT:1;           ///< Nested Task\r
    UINT32  Reserved_3:1;   ///< Reserved\r
  } Bits;\r
  UINT16    Uint16;\r
} IA32_FLAGS16;\r
\r
///\r
/// Byte packed structure for EFLAGS/RFLAGS\r
/// 32-bits on IA-32\r
/// 64-bits on x64.  The upper 32-bits on x64 are reserved\r
///\r
typedef union {\r
  struct {\r
    UINT32  CF:1;           ///< Carry Flag\r
    UINT32  Reserved_0:1;   ///< Reserved\r
    UINT32  PF:1;           ///< Parity Flag\r
    UINT32  Reserved_1:1;   ///< Reserved\r
    UINT32  AF:1;           ///< Auxiliary Carry Flag\r
    UINT32  Reserved_2:1;   ///< Reserved\r
    UINT32  ZF:1;           ///< Zero Flag\r
    UINT32  SF:1;           ///< Sign Flag\r
    UINT32  TF:1;           ///< Trap Flag\r
    UINT32  IF:1;           ///< Interrupt Enable Flag\r
    UINT32  DF:1;           ///< Direction Flag\r
    UINT32  OF:1;           ///< Overflow Flag\r
    UINT32  IOPL:2;         ///< I/O Privilege Level\r
    UINT32  NT:1;           ///< Nested Task\r
    UINT32  Reserved_3:1;   ///< Reserved\r
    UINT32  RF:1;           ///< Resume Flag\r
    UINT32  VM:1;           ///< Virtual 8086 Mode\r
    UINT32  AC:1;           ///< Alignment Check\r
    UINT32  VIF:1;          ///< Virtual Interrupt Flag\r
    UINT32  VIP:1;          ///< Virtual Interrupt Pending\r
    UINT32  ID:1;           ///< ID Flag\r
    UINT32  Reserved_4:10;  ///< Reserved\r
  } Bits;\r
  UINTN     UintN;\r
} IA32_EFLAGS32;\r
\r
///\r
/// Byte packed structure for Control Register 0 (CR0)\r
/// 32-bits on IA-32\r
/// 64-bits on x64.  The upper 32-bits on x64 are reserved\r
///\r
typedef union {\r
  struct {\r
    UINT32  PE:1;           ///< Protection Enable\r
    UINT32  MP:1;           ///< Monitor Coprocessor\r
    UINT32  EM:1;           ///< Emulation\r
    UINT32  TS:1;           ///< Task Switched\r
    UINT32  ET:1;           ///< Extension Type\r
    UINT32  NE:1;           ///< Numeric Error\r
    UINT32  Reserved_0:10;  ///< Reserved\r
    UINT32  WP:1;           ///< Write Protect\r
    UINT32  Reserved_1:1;   ///< Reserved\r
    UINT32  AM:1;           ///< Alignment Mask\r
    UINT32  Reserved_2:10;  ///< Reserved\r
    UINT32  NW:1;           ///< Mot Write-through\r
    UINT32  CD:1;           ///< Cache Disable\r
    UINT32  PG:1;           ///< Paging\r
  } Bits;\r
  UINTN     UintN;\r
} IA32_CR0;\r
\r
///\r
/// Byte packed structure for Control Register 4 (CR4)\r
/// 32-bits on IA-32\r
/// 64-bits on x64.  The upper 32-bits on x64 are reserved\r
///\r
typedef union {\r
  struct {\r
    UINT32  VME:1;          ///< Virtual-8086 Mode Extensions\r
    UINT32  PVI:1;          ///< Protected-Mode Virtual Interrupts\r
    UINT32  TSD:1;          ///< Time Stamp Disable\r
    UINT32  DE:1;           ///< Debugging Extensions\r
    UINT32  PSE:1;          ///< Page Size Extensions\r
    UINT32  PAE:1;          ///< Physical Address Extension\r
    UINT32  MCE:1;          ///< Machine Check Enable\r
    UINT32  PGE:1;          ///< Page Global Enable\r
    UINT32  PCE:1;          ///< Performance Monitoring Counter\r
                            ///< Enable\r
    UINT32  OSFXSR:1;       ///< Operating System Support for\r
                            ///< FXSAVE and FXRSTOR instructions\r
    UINT32  OSXMMEXCPT:1;   ///< Operating System Support for\r
                            ///< Unmasked SIMD Floating Point\r
                            ///< Exceptions\r
    UINT32  Reserved_0:2;   ///< Reserved\r
    UINT32  VMXE:1;         ///< VMX Enable\r
    UINT32  Reserved_1:18;  ///< Reserved\r
  } Bits;\r
  UINTN     UintN;\r
} IA32_CR4;\r
\r
///\r
/// Byte packed structure for an IDTR, GDTR, LDTR descriptor\r
///\r
#pragma pack (1)\r
typedef struct {\r
  UINT16  Limit;\r
  UINTN   Base;\r
} IA32_DESCRIPTOR;\r
#pragma pack ()\r
\r
#define IA32_IDT_GATE_TYPE_TASK          0x85\r
#define IA32_IDT_GATE_TYPE_INTERRUPT_16  0x86\r
#define IA32_IDT_GATE_TYPE_TRAP_16       0x87\r
#define IA32_IDT_GATE_TYPE_INTERRUPT_32  0x8E\r
#define IA32_IDT_GATE_TYPE_TRAP_32       0x8F\r
\r
\r
#if defined (MDE_CPU_IA32)\r
///\r
/// Byte packed structure for an IA-32 Interrupt Gate Descriptor\r
///\r
typedef union {\r
  struct {\r
    UINT32  OffsetLow:16;   ///< Offset bits 15..0\r
    UINT32  Selector:16;    ///< Selector\r
    UINT32  Reserved_0:8;   ///< Reserved\r
    UINT32  GateType:8;     ///< Gate Type.  See #defines above\r
    UINT32  OffsetHigh:16;  ///< Offset bits 31..16\r
  } Bits;\r
  UINT64  Uint64;\r
} IA32_IDT_GATE_DESCRIPTOR;\r
\r
#endif\r
\r
#if defined (MDE_CPU_X64)\r
///\r
/// Byte packed structure for an x64 Interrupt Gate Descriptor\r
///\r
typedef union {\r
  struct {\r
    UINT32  OffsetLow:16;   ///< Offset bits 15..0\r
    UINT32  Selector:16;    ///< Selector\r
    UINT32  Reserved_0:8;   ///< Reserved\r
    UINT32  GateType:8;     ///< Gate Type.  See #defines above\r
    UINT32  OffsetHigh:16;  ///< Offset bits 31..16\r
    UINT32  OffsetUpper:32; ///< Offset bits 63..32\r
    UINT32  Reserved_1:32;  ///< Reserved\r
  } Bits;\r
  struct {\r
    UINT64  Uint64;\r
    UINT64  Uint64_1;\r
  } Uint128;   \r
} IA32_IDT_GATE_DESCRIPTOR;\r
\r
#endif\r
\r
///\r
/// Byte packed structure for an FP/SSE/SSE2 context\r
///\r
typedef struct {\r
  UINT8  Buffer[512];\r
} IA32_FX_BUFFER;\r
\r
///\r
/// Structures for the 16-bit real mode thunks\r
///\r
typedef struct {\r
  UINT32                            Reserved1;\r
  UINT32                            Reserved2;\r
  UINT32                            Reserved3;\r
  UINT32                            Reserved4;\r
  UINT8                             BL;\r
  UINT8                             BH;\r
  UINT16                            Reserved5;\r
  UINT8                             DL;\r
  UINT8                             DH;\r
  UINT16                            Reserved6;\r
  UINT8                             CL;\r
  UINT8                             CH;\r
  UINT16                            Reserved7;\r
  UINT8                             AL;\r
  UINT8                             AH;\r
  UINT16                            Reserved8;\r
} IA32_BYTE_REGS;\r
\r
typedef struct {\r
  UINT16                            DI;\r
  UINT16                            Reserved1;\r
  UINT16                            SI;\r
  UINT16                            Reserved2;\r
  UINT16                            BP;\r
  UINT16                            Reserved3;\r
  UINT16                            SP;\r
  UINT16                            Reserved4;\r
  UINT16                            BX;\r
  UINT16                            Reserved5;\r
  UINT16                            DX;\r
  UINT16                            Reserved6;\r
  UINT16                            CX;\r
  UINT16                            Reserved7;\r
  UINT16                            AX;\r
  UINT16                            Reserved8;\r
} IA32_WORD_REGS;\r
\r
typedef struct {\r
  UINT32                            EDI;\r
  UINT32                            ESI;\r
  UINT32                            EBP;\r
  UINT32                            ESP;\r
  UINT32                            EBX;\r
  UINT32                            EDX;\r
  UINT32                            ECX;\r
  UINT32                            EAX;\r
  UINT16                            DS;\r
  UINT16                            ES;\r
  UINT16                            FS;\r
  UINT16                            GS;\r
  IA32_EFLAGS32                     EFLAGS;\r
  UINT32                            Eip;\r
  UINT16                            CS;\r
  UINT16                            SS;\r
} IA32_DWORD_REGS;\r
\r
typedef union {\r
  IA32_DWORD_REGS                   E;\r
  IA32_WORD_REGS                    X;\r
  IA32_BYTE_REGS                    H;\r
} IA32_REGISTER_SET;\r
\r
///\r
/// Byte packed structure for an 16-bit real mode thunks\r
///\r
typedef struct {\r
  IA32_REGISTER_SET                 *RealModeState;\r
  VOID                              *RealModeBuffer;\r
  UINT32                            RealModeBufferSize;\r
  UINT32                            ThunkAttributes;\r
} THUNK_CONTEXT;\r
\r
#define THUNK_ATTRIBUTE_BIG_REAL_MODE             0x00000001\r
#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15   0x00000002\r
#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
\r
/**\r
  Retrieves CPUID information.\r
\r
  Executes the CPUID instruction with EAX set to the value specified by Index.\r
  This function always returns Index.\r
  If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
  If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
  If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
  If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
  This function is only available on IA-32 and x64.\r
\r
  @param  Index The 32-bit value to load into EAX prior to invoking the CPUID\r
                instruction.\r
  @param  Eax   Pointer to the 32-bit EAX value returned by the CPUID\r
                instruction. This is an optional parameter that may be NULL.\r
  @param  Ebx   Pointer to the 32-bit EBX value returned by the CPUID\r
                instruction. This is an optional parameter that may be NULL.\r
  @param  Ecx   Pointer to the 32-bit ECX value returned by the CPUID\r
                instruction. This is an optional parameter that may be NULL.\r
  @param  Edx   Pointer to the 32-bit EDX value returned by the CPUID\r
                instruction. This is an optional parameter that may be NULL.\r
\r
  @return Index.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmCpuid (\r
  IN      UINT32                    Index,\r
  OUT     UINT32                    *Eax,  OPTIONAL\r
  OUT     UINT32                    *Ebx,  OPTIONAL\r
  OUT     UINT32                    *Ecx,  OPTIONAL\r
  OUT     UINT32                    *Edx   OPTIONAL\r
  );\r
\r
\r
/**\r
  Retrieves CPUID information using an extended leaf identifier.\r
\r
  Executes the CPUID instruction with EAX set to the value specified by Index\r
  and ECX set to the value specified by SubIndex. This function always returns\r
  Index. This function is only available on IA-32 and x64.\r
\r
  If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
  If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
  If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
  If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
\r
  @param  Index     The 32-bit value to load into EAX prior to invoking the\r
                    CPUID instruction.\r
  @param  SubIndex  The 32-bit value to load into ECX prior to invoking the\r
                    CPUID instruction.\r
  @param  Eax       Pointer to the 32-bit EAX value returned by the CPUID\r
                    instruction. This is an optional parameter that may be\r
                    NULL.\r
  @param  Ebx       Pointer to the 32-bit EBX value returned by the CPUID\r
                    instruction. This is an optional parameter that may be\r
                    NULL.\r
  @param  Ecx       Pointer to the 32-bit ECX value returned by the CPUID\r
                    instruction. This is an optional parameter that may be\r
                    NULL.\r
  @param  Edx       Pointer to the 32-bit EDX value returned by the CPUID\r
                    instruction. This is an optional parameter that may be\r
                    NULL.\r
\r
  @return Index.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmCpuidEx (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    SubIndex,\r
  OUT     UINT32                    *Eax,  OPTIONAL\r
  OUT     UINT32                    *Ebx,  OPTIONAL\r
  OUT     UINT32                    *Ecx,  OPTIONAL\r
  OUT     UINT32                    *Edx   OPTIONAL\r
  );\r
\r
\r
/**\r
  Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
\r
  Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
  and executing a WBINVD instruction.  This function is only available on IA-32 and x64.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmDisableCache (\r
  VOID\r
  );\r
\r
\r
/**\r
  Perform a WBINVD and clear both the CD and NW bits of CR0.\r
\r
  Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r
  bits of CR0 to 0.  This function is only available on IA-32 and x64.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmEnableCache (\r
  VOID\r
  );\r
\r
\r
/**\r
  Returns the lower 32-bits of a Machine Specific Register(MSR).\r
\r
  Reads and returns the lower 32-bits of the MSR specified by Index.\r
  No parameter checking is performed on Index, and some Index values may cause\r
  CPU exceptions. The caller must either guarantee that Index is valid, or the\r
  caller must set up exception handlers to catch the exceptions. This function\r
  is only available on IA-32 and x64.\r
\r
  @param  Index The 32-bit MSR index to read.\r
\r
  @return The lower 32 bits of the MSR identified by Index.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmReadMsr32 (\r
  IN      UINT32                    Index\r
  );\r
\r
\r
/**\r
  Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r
  The upper 32-bits of the MSR are set to zero.\r
\r
  Writes the 32-bit value specified by Value to the MSR specified by Index. The\r
  upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r
  the MSR is returned. No parameter checking is performed on Index or Value,\r
  and some of these may cause CPU exceptions. The caller must either guarantee\r
  that Index and Value are valid, or the caller must establish proper exception\r
  handlers. This function is only available on IA-32 and x64.\r
\r
  @param  Index The 32-bit MSR index to write.\r
  @param  Value The 32-bit value to write to the MSR.\r
\r
  @return Value\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmWriteMsr32 (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    Value\r
  );\r
\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r
  writes the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
  between the lower 32-bits of the read result and the value specified by\r
  OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
  32-bits of the value written to the MSR is returned. No parameter checking is\r
  performed on Index or OrData, and some of these may cause CPU exceptions. The\r
  caller must either guarantee that Index and OrData are valid, or the caller\r
  must establish proper exception handlers. This function is only available on\r
  IA-32 and x64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  OrData  The value to OR with the read value from the MSR.\r
\r
  @return The lower 32-bit value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    OrData\r
  );\r
\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r
  the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  lower 32-bits of the read result and the value specified by AndData, and\r
  writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r
  the value written to the MSR is returned. No parameter checking is performed\r
  on Index or AndData, and some of these may cause CPU exceptions. The caller\r
  must either guarantee that Index and AndData are valid, or the caller must\r
  establish proper exception handlers. This function is only available on IA-32\r
  and x64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
\r
  @return The lower 32-bit value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrAnd32 (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    AndData\r
  );\r
\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r
  on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  lower 32-bits of the read result and the value specified by AndData\r
  preserving the upper 32-bits, performs a bitwise OR between the\r
  result of the AND operation and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
  written to the MSR is returned. No parameter checking is performed on Index,\r
  AndData, or OrData, and some of these may cause CPU exceptions. The caller\r
  must either guarantee that Index, AndData, and OrData are valid, or the\r
  caller must establish proper exception handlers. This function is only\r
  available on IA-32 and x64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
  @param  OrData  The value to OR with the result of the AND operation.\r
\r
  @return The lower 32-bit value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrAndThenOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    AndData,\r
  IN      UINT32                    OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field of an MSR.\r
\r
  Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r
  specified by the StartBit and the EndBit. The value of the bit field is\r
  returned. The caller must either guarantee that Index is valid, or the caller\r
  must set up exception handlers to catch the exceptions. This function is only\r
  available on IA-32 and x64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to read.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
\r
  @return The bit field read from the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldRead32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  );\r
\r
\r
/**\r
  Writes a bit field to an MSR.\r
\r
  Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
  field is specified by the StartBit and the EndBit. All other bits in the\r
  destination MSR are preserved. The lower 32-bits of the MSR written is\r
  returned. The caller must either guarantee that Index and the data written \r
  is valid, or the caller must set up exception handlers to catch the exceptions. \r
  This function is only available on IA-32 and x64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  Value     New value of the bit field.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldWrite32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    Value\r
  );\r
\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
  result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
  between the read result and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
  written to the MSR are returned. Extra left bits in OrData are stripped. The\r
  caller must either guarantee that Index and the data written is valid, or\r
  the caller must set up exception handlers to catch the exceptions. This\r
  function is only available on IA-32 and x64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  OrData    The value to OR with the read value from the MSR.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
  result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  read result and the value specified by AndData, and writes the result to the\r
  64-bit MSR specified by Index. The lower 32-bits of the value written to the\r
  MSR are returned. Extra left bits in AndData are stripped. The caller must\r
  either guarantee that Index and the data written is valid, or the caller must\r
  set up exception handlers to catch the exceptions. This function is only\r
  available on IA-32 and x64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  AndData   The value to AND with the read value from the MSR.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldAnd32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    AndData\r
  );\r
\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
  bitwise OR, and writes the result back to the bit field in the\r
  64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
  bitwise OR between the read result and the value specified by\r
  AndData, and writes the result to the 64-bit MSR specified by Index. The\r
  lower 32-bits of the value written to the MSR are returned. Extra left bits\r
  in both AndData and OrData are stripped. The caller must either guarantee\r
  that Index and the data written is valid, or the caller must set up exception\r
  handlers to catch the exceptions. This function is only available on IA-32\r
  and x64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  AndData   The value to AND with the read value from the MSR.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldAndThenOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    AndData,\r
  IN      UINT32                    OrData\r
  );\r
\r
\r
/**\r
  Returns a 64-bit Machine Specific Register(MSR).\r
\r
  Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r
  performed on Index, and some Index values may cause CPU exceptions. The\r
  caller must either guarantee that Index is valid, or the caller must set up\r
  exception handlers to catch the exceptions. This function is only available\r
  on IA-32 and x64.\r
\r
  @param  Index The 32-bit MSR index to read.\r
\r
  @return The value of the MSR identified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMsr64 (\r
  IN      UINT32                    Index\r
  );\r
\r
\r
/**\r
  Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
  value.\r
\r
  Writes the 64-bit value specified by Value to the MSR specified by Index. The\r
  64-bit value written to the MSR is returned. No parameter checking is\r
  performed on Index or Value, and some of these may cause CPU exceptions. The\r
  caller must either guarantee that Index and Value are valid, or the caller\r
  must establish proper exception handlers. This function is only available on\r
  IA-32 and x64.\r
\r
  @param  Index The 32-bit MSR index to write.\r
  @param  Value The 64-bit value to write to the MSR.\r
\r
  @return Value\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmWriteMsr64 (\r
  IN      UINT32                    Index,\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r
  back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
  between the read result and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Index. The value written to the MSR is\r
  returned. No parameter checking is performed on Index or OrData, and some of\r
  these may cause CPU exceptions. The caller must either guarantee that Index\r
  and OrData are valid, or the caller must establish proper exception handlers.\r
  This function is only available on IA-32 and x64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  OrData  The value to OR with the read value from the MSR.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINT64                    OrData\r
  );\r
\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r
  64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  read result and the value specified by OrData, and writes the result to the\r
  64-bit MSR specified by Index. The value written to the MSR is returned. No\r
  parameter checking is performed on Index or OrData, and some of these may\r
  cause CPU exceptions. The caller must either guarantee that Index and OrData\r
  are valid, or the caller must establish proper exception handlers. This\r
  function is only available on IA-32 and x64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrAnd64 (\r
  IN      UINT32                    Index,\r
  IN      UINT64                    AndData\r
  );\r
\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r
  OR, and writes the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
  result and the value specified by AndData, performs a bitwise OR\r
  between the result of the AND operation and the value specified by OrData,\r
  and writes the result to the 64-bit MSR specified by Index. The value written\r
  to the MSR is returned. No parameter checking is performed on Index, AndData,\r
  or OrData, and some of these may cause CPU exceptions. The caller must either\r
  guarantee that Index, AndData, and OrData are valid, or the caller must\r
  establish proper exception handlers. This function is only available on IA-32\r
  and x64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
  @param  OrData  The value to OR with the result of the AND operation.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrAndThenOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINT64                    AndData,\r
  IN      UINT64                    OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field of an MSR.\r
\r
  Reads the bit field in the 64-bit MSR. The bit field is specified by the\r
  StartBit and the EndBit. The value of the bit field is returned. The caller\r
  must either guarantee that Index is valid, or the caller must set up\r
  exception handlers to catch the exceptions. This function is only available\r
  on IA-32 and x64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to read.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
\r
  @return The value read from the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldRead64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  );\r
\r
\r
/**\r
  Writes a bit field to an MSR.\r
\r
  Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
  the StartBit and the EndBit. All other bits in the destination MSR are\r
  preserved. The MSR written is returned. The caller must either guarantee \r
  that Index and the data written is valid, or the caller must set up exception \r
  handlers to catch the exceptions. This function is only available on IA-32 and x64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  Value     New value of the bit field.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldWrite64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r
  writes the result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
  between the read result and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Index. The value written to the MSR is\r
  returned. Extra left bits in OrData are stripped. The caller must either\r
  guarantee that Index and the data written is valid, or the caller must set up\r
  exception handlers to catch the exceptions. This function is only available\r
  on IA-32 and x64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  OrData    The value to OR with the read value from the bit field.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    OrData\r
  );\r
\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
  result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  read result and the value specified by AndData, and writes the result to the\r
  64-bit MSR specified by Index. The value written to the MSR is returned.\r
  Extra left bits in AndData are stripped. The caller must either guarantee\r
  that Index and the data written is valid, or the caller must set up exception\r
  handlers to catch the exceptions. This function is only available on IA-32\r
  and x64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  AndData   The value to AND with the read value from the bit field.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldAnd64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    AndData\r
  );\r
\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
  bitwise OR, and writes the result back to the bit field in the\r
  64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
  a bitwise OR between the read result and the value specified by\r
  AndData, and writes the result to the 64-bit MSR specified by Index. The\r
  value written to the MSR is returned. Extra left bits in both AndData and\r
  OrData are stripped. The caller must either guarantee that Index and the data\r
  written is valid, or the caller must set up exception handlers to catch the\r
  exceptions. This function is only available on IA-32 and x64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  AndData   The value to AND with the read value from the bit field.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldAndThenOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    AndData,\r
  IN      UINT64                    OrData\r
  );\r
\r
\r
/**\r
  Reads the current value of the EFLAGS register.\r
\r
  Reads and returns the current value of the EFLAGS register. This function is\r
  only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r
  64-bit value on x64.\r
\r
  @return EFLAGS on IA-32 or RFLAGS on x64.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadEflags (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of the Control Register 0 (CR0).\r
\r
  Reads and returns the current value of CR0. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of the Control Register 0 (CR0).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadCr0 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of the Control Register 2 (CR2).\r
\r
  Reads and returns the current value of CR2. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of the Control Register 2 (CR2).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadCr2 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of the Control Register 3 (CR3).\r
\r
  Reads and returns the current value of CR3. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of the Control Register 3 (CR3).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadCr3 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of the Control Register 4 (CR4).\r
\r
  Reads and returns the current value of CR4. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of the Control Register 4 (CR4).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadCr4 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes a value to Control Register 0 (CR0).\r
\r
  Writes and returns a new value to CR0. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Cr0 The value to write to CR0.\r
\r
  @return The value written to CR0.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteCr0 (\r
  UINTN  Cr0\r
  );\r
\r
\r
/**\r
  Writes a value to Control Register 2 (CR2).\r
\r
  Writes and returns a new value to CR2. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Cr2 The value to write to CR2.\r
\r
  @return The value written to CR2.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteCr2 (\r
  UINTN  Cr2\r
  );\r
\r
\r
/**\r
  Writes a value to Control Register 3 (CR3).\r
\r
  Writes and returns a new value to CR3. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Cr3 The value to write to CR3.\r
\r
  @return The value written to CR3.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteCr3 (\r
  UINTN  Cr3\r
  );\r
\r
\r
/**\r
  Writes a value to Control Register 4 (CR4).\r
\r
  Writes and returns a new value to CR4. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Cr4 The value to write to CR4.\r
\r
  @return The value written to CR4.\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteCr4 (\r
  UINTN  Cr4\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 0 (DR0).\r
\r
  Reads and returns the current value of DR0. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 0 (DR0).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr0 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 1 (DR1).\r
\r
  Reads and returns the current value of DR1. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 1 (DR1).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr1 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 2 (DR2).\r
\r
  Reads and returns the current value of DR2. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 2 (DR2).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr2 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 3 (DR3).\r
\r
  Reads and returns the current value of DR3. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 3 (DR3).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr3 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 4 (DR4).\r
\r
  Reads and returns the current value of DR4. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 4 (DR4).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr4 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 5 (DR5).\r
\r
  Reads and returns the current value of DR5. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 5 (DR5).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr5 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 6 (DR6).\r
\r
  Reads and returns the current value of DR6. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 6 (DR6).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr6 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Debug Register 7 (DR7).\r
\r
  Reads and returns the current value of DR7. This function is only available\r
  on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
  x64.\r
\r
  @return The value of Debug Register 7 (DR7).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmReadDr7 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 0 (DR0).\r
\r
  Writes and returns a new value to DR0. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr0 The value to write to Dr0.\r
\r
  @return The value written to Debug Register 0 (DR0).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr0 (\r
  UINTN  Dr0\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 1 (DR1).\r
\r
  Writes and returns a new value to DR1. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr1 The value to write to Dr1.\r
\r
  @return The value written to Debug Register 1 (DR1).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr1 (\r
  UINTN  Dr1\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 2 (DR2).\r
\r
  Writes and returns a new value to DR2. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr2 The value to write to Dr2.\r
\r
  @return The value written to Debug Register 2 (DR2).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr2 (\r
  UINTN  Dr2\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 3 (DR3).\r
\r
  Writes and returns a new value to DR3. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr3 The value to write to Dr3.\r
\r
  @return The value written to Debug Register 3 (DR3).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr3 (\r
  UINTN  Dr3\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 4 (DR4).\r
\r
  Writes and returns a new value to DR4. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr4 The value to write to Dr4.\r
\r
  @return The value written to Debug Register 4 (DR4).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr4 (\r
  UINTN  Dr4\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 5 (DR5).\r
\r
  Writes and returns a new value to DR5. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr5 The value to write to Dr5.\r
\r
  @return The value written to Debug Register 5 (DR5).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr5 (\r
  UINTN  Dr5\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 6 (DR6).\r
\r
  Writes and returns a new value to DR6. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr6 The value to write to Dr6.\r
\r
  @return The value written to Debug Register 6 (DR6).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr6 (\r
  UINTN  Dr6\r
  );\r
\r
\r
/**\r
  Writes a value to Debug Register 7 (DR7).\r
\r
  Writes and returns a new value to DR7. This function is only available on\r
  IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
\r
  @param  Dr7 The value to write to Dr7.\r
\r
  @return The value written to Debug Register 7 (DR7).\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmWriteDr7 (\r
  UINTN  Dr7\r
  );\r
\r
\r
/**\r
  Reads the current value of Code Segment Register (CS).\r
\r
  Reads and returns the current value of CS. This function is only available on\r
  IA-32 and x64.\r
\r
  @return The current value of CS.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadCs (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Data Segment Register (DS).\r
\r
  Reads and returns the current value of DS. This function is only available on\r
  IA-32 and x64.\r
\r
  @return The current value of DS.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadDs (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Extra Segment Register (ES).\r
\r
  Reads and returns the current value of ES. This function is only available on\r
  IA-32 and x64.\r
\r
  @return The current value of ES.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadEs (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of FS Data Segment Register (FS).\r
\r
  Reads and returns the current value of FS. This function is only available on\r
  IA-32 and x64.\r
\r
  @return The current value of FS.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadFs (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of GS Data Segment Register (GS).\r
\r
  Reads and returns the current value of GS. This function is only available on\r
  IA-32 and x64.\r
\r
  @return The current value of GS.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadGs (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Stack Segment Register (SS).\r
\r
  Reads and returns the current value of SS. This function is only available on\r
  IA-32 and x64.\r
\r
  @return The current value of SS.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadSs (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of Task Register (TR).\r
\r
  Reads and returns the current value of TR. This function is only available on\r
  IA-32 and x64.\r
\r
  @return The current value of TR.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadTr (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
\r
  Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
  function is only available on IA-32 and x64.\r
\r
  If Gdtr is NULL, then ASSERT().\r
\r
  @param  Gdtr  Pointer to a GDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmReadGdtr (\r
  OUT     IA32_DESCRIPTOR           *Gdtr\r
  );\r
\r
\r
/**\r
  Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
\r
  Writes and the current GDTR descriptor specified by Gdtr. This function is\r
  only available on IA-32 and x64.\r
\r
  If Gdtr is NULL, then ASSERT().\r
\r
  @param  Gdtr  Pointer to a GDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteGdtr (\r
  IN      CONST IA32_DESCRIPTOR     *Gdtr\r
  );\r
\r
\r
/**\r
  Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
\r
  Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
  function is only available on IA-32 and x64.\r
\r
  If Idtr is NULL, then ASSERT().\r
\r
  @param  Idtr  Pointer to a IDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmReadIdtr (\r
  OUT     IA32_DESCRIPTOR           *Idtr\r
  );\r
\r
\r
/**\r
  Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
\r
  Writes the current IDTR descriptor and returns it in Idtr. This function is\r
  only available on IA-32 and x64.\r
\r
  If Idtr is NULL, then ASSERT().\r
\r
  @param  Idtr  Pointer to a IDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteIdtr (\r
  IN      CONST IA32_DESCRIPTOR     *Idtr\r
  );\r
\r
\r
/**\r
  Reads the current Local Descriptor Table Register(LDTR) selector.\r
\r
  Reads and returns the current 16-bit LDTR descriptor value. This function is\r
  only available on IA-32 and x64.\r
\r
  @return The current selector of LDT.\r
\r
**/\r
UINT16\r
EFIAPI\r
AsmReadLdtr (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes the current Local Descriptor Table Register (LDTR) selector.\r
\r
  Writes and the current LDTR descriptor specified by Ldtr. This function is\r
  only available on IA-32 and x64.\r
\r
  @param  Ldtr  16-bit LDTR selector value.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteLdtr (\r
  IN      UINT16                    Ldtr\r
  );\r
\r
\r
/**\r
  Save the current floating point/SSE/SSE2 context to a buffer.\r
\r
  Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
  Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
  available on IA-32 and x64.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
\r
  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmFxSave (\r
  OUT     IA32_FX_BUFFER            *Buffer\r
  );\r
\r
\r
/**\r
  Restores the current floating point/SSE/SSE2 context from a buffer.\r
\r
  Restores the current floating point/SSE/SSE2 state from the buffer specified\r
  by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
  only available on IA-32 and x64.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
  If Buffer was not saved with AsmFxSave(), then ASSERT().\r
\r
  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmFxRestore (\r
  IN      CONST IA32_FX_BUFFER      *Buffer\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #0 (MM0).\r
\r
  Reads and returns the current value of MM0. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM0.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm0 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #1 (MM1).\r
\r
  Reads and returns the current value of MM1. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM1.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm1 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #2 (MM2).\r
\r
  Reads and returns the current value of MM2. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM2.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm2 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #3 (MM3).\r
\r
  Reads and returns the current value of MM3. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM3.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm3 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #4 (MM4).\r
\r
  Reads and returns the current value of MM4. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM4.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm4 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #5 (MM5).\r
\r
  Reads and returns the current value of MM5. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM5.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm5 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #6 (MM6).\r
\r
  Reads and returns the current value of MM6. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM6.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm6 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of 64-bit MMX Register #7 (MM7).\r
\r
  Reads and returns the current value of MM7. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of MM7.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadMm7 (\r
  VOID\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #0 (MM0).\r
\r
  Writes the current value of MM0. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM0.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm0 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #1 (MM1).\r
\r
  Writes the current value of MM1. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM1.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm1 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #2 (MM2).\r
\r
  Writes the current value of MM2. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM2.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm2 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #3 (MM3).\r
\r
  Writes the current value of MM3. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM3.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm3 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #4 (MM4).\r
\r
  Writes the current value of MM4. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM4.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm4 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #5 (MM5).\r
\r
  Writes the current value of MM5. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM5.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm5 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #6 (MM6).\r
\r
  Writes the current value of MM6. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM6.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm6 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Writes the current value of 64-bit MMX Register #7 (MM7).\r
\r
  Writes the current value of MM7. This function is only available on IA32 and\r
  x64.\r
\r
  @param  Value The 64-bit value to write to MM7.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteMm7 (\r
  IN      UINT64                    Value\r
  );\r
\r
\r
/**\r
  Reads the current value of Time Stamp Counter (TSC).\r
\r
  Reads and returns the current value of TSC. This function is only available\r
  on IA-32 and x64.\r
\r
  @return The current value of TSC\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadTsc (\r
  VOID\r
  );\r
\r
\r
/**\r
  Reads the current value of a Performance Counter (PMC).\r
\r
  Reads and returns the current value of performance counter specified by\r
  Index. This function is only available on IA-32 and x64.\r
\r
  @param  Index The 32-bit Performance Counter index to read.\r
\r
  @return The value of the PMC specified by Index.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmReadPmc (\r
  IN      UINT32                    Index\r
  );\r
\r
\r
/**\r
  Sets up a monitor buffer that is used by AsmMwait().\r
\r
  Executes a MONITOR instruction with the register state specified by Eax, Ecx\r
  and Edx. Returns Eax. This function is only available on IA-32 and x64.\r
\r
  @param  Eax The value to load into EAX or RAX before executing the MONITOR\r
              instruction.\r
  @param  Ecx The value to load into ECX or RCX before executing the MONITOR\r
              instruction.\r
  @param  Edx The value to load into EDX or RDX before executing the MONITOR\r
              instruction.\r
\r
  @return Eax\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmMonitor (\r
  IN      UINTN                     Eax,\r
  IN      UINTN                     Ecx,\r
  IN      UINTN                     Edx\r
  );\r
\r
\r
/**\r
  Executes an MWAIT instruction.\r
\r
  Executes an MWAIT instruction with the register state specified by Eax and\r
  Ecx. Returns Eax. This function is only available on IA-32 and x64.\r
\r
  @param  Eax The value to load into EAX or RAX before executing the MONITOR\r
              instruction.\r
  @param  Ecx The value to load into ECX or RCX before executing the MONITOR\r
              instruction.\r
\r
  @return Eax\r
\r
**/\r
UINTN\r
EFIAPI\r
AsmMwait (\r
  IN      UINTN                     Eax,\r
  IN      UINTN                     Ecx\r
  );\r
\r
\r
/**\r
  Executes a WBINVD instruction.\r
\r
  Executes a WBINVD instruction. This function is only available on IA-32 and\r
  x64.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWbinvd (\r
  VOID\r
  );\r
\r
\r
/**\r
  Executes a INVD instruction.\r
\r
  Executes a INVD instruction. This function is only available on IA-32 and\r
  x64.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmInvd (\r
  VOID\r
  );\r
\r
\r
/**\r
  Flushes a cache line from all the instruction and data caches within the\r
  coherency domain of the CPU.\r
\r
  Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
  This function is only available on IA-32 and x64.\r
\r
  @param  LinearAddress The address of the cache line to flush. If the CPU is\r
                        in a physical addressing mode, then LinearAddress is a\r
                        physical address. If the CPU is in a virtual\r
                        addressing mode, then LinearAddress is a virtual\r
                        address.\r
\r
  @return LinearAddress\r
**/\r
VOID *\r
EFIAPI\r
AsmFlushCacheLine (\r
  IN      VOID                      *LinearAddress\r
  );\r
\r
\r
/**\r
  Enables the 32-bit paging mode on the CPU.\r
\r
  Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
  must be properly initialized prior to calling this service. This function\r
  assumes the current execution mode is 32-bit protected mode. This function is\r
  only available on IA-32. After the 32-bit paging mode is enabled, control is\r
  transferred to the function specified by EntryPoint using the new stack\r
  specified by NewStack and passing in the parameters specified by Context1 and\r
  Context2. Context1 and Context2 are optional and may be NULL. The function\r
  EntryPoint must never return.\r
\r
  If the current execution mode is not 32-bit protected mode, then ASSERT().\r
  If EntryPoint is NULL, then ASSERT().\r
  If NewStack is NULL, then ASSERT().\r
\r
  There are a number of constraints that must be followed before calling this\r
  function:\r
  1)  Interrupts must be disabled.\r
  2)  The caller must be in 32-bit protected mode with flat descriptors. This\r
      means all descriptors must have a base of 0 and a limit of 4GB.\r
  3)  CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
      descriptors.\r
  4)  CR3 must point to valid page tables that will be used once the transition\r
      is complete, and those page tables must guarantee that the pages for this\r
      function and the stack are identity mapped.\r
\r
  @param  EntryPoint  A pointer to function to call with the new stack after\r
                      paging is enabled.\r
  @param  Context1    A pointer to the context to pass into the EntryPoint\r
                      function as the first parameter after paging is enabled.\r
  @param  Context2    A pointer to the context to pass into the EntryPoint\r
                      function as the second parameter after paging is enabled.\r
  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
                      function after paging is enabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmEnablePaging32 (\r
  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
  IN      VOID                      *Context1,  OPTIONAL\r
  IN      VOID                      *Context2,  OPTIONAL\r
  IN      VOID                      *NewStack\r
  );\r
\r
\r
/**\r
  Disables the 32-bit paging mode on the CPU.\r
\r
  Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
  mode. This function assumes the current execution mode is 32-paged protected\r
  mode. This function is only available on IA-32. After the 32-bit paging mode\r
  is disabled, control is transferred to the function specified by EntryPoint\r
  using the new stack specified by NewStack and passing in the parameters\r
  specified by Context1 and Context2. Context1 and Context2 are optional and\r
  may be NULL. The function EntryPoint must never return.\r
\r
  If the current execution mode is not 32-bit paged mode, then ASSERT().\r
  If EntryPoint is NULL, then ASSERT().\r
  If NewStack is NULL, then ASSERT().\r
\r
  There are a number of constraints that must be followed before calling this\r
  function:\r
  1)  Interrupts must be disabled.\r
  2)  The caller must be in 32-bit paged mode.\r
  3)  CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
  4)  CR3 must point to valid page tables that guarantee that the pages for\r
      this function and the stack are identity mapped.\r
\r
  @param  EntryPoint  A pointer to function to call with the new stack after\r
                      paging is disabled.\r
  @param  Context1    A pointer to the context to pass into the EntryPoint\r
                      function as the first parameter after paging is disabled.\r
  @param  Context2    A pointer to the context to pass into the EntryPoint\r
                      function as the second parameter after paging is\r
                      disabled.\r
  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
                      function after paging is disabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmDisablePaging32 (\r
  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
  IN      VOID                      *Context1,  OPTIONAL\r
  IN      VOID                      *Context2,  OPTIONAL\r
  IN      VOID                      *NewStack\r
  );\r
\r
\r
/**\r
  Enables the 64-bit paging mode on the CPU.\r
\r
  Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
  must be properly initialized prior to calling this service. This function\r
  assumes the current execution mode is 32-bit protected mode with flat\r
  descriptors. This function is only available on IA-32. After the 64-bit\r
  paging mode is enabled, control is transferred to the function specified by\r
  EntryPoint using the new stack specified by NewStack and passing in the\r
  parameters specified by Context1 and Context2. Context1 and Context2 are\r
  optional and may be 0. The function EntryPoint must never return.\r
\r
  If the current execution mode is not 32-bit protected mode with flat\r
  descriptors, then ASSERT().\r
  If EntryPoint is 0, then ASSERT().\r
  If NewStack is 0, then ASSERT().\r
\r
  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
                      is called. The descriptor in the GDT that this selector\r
                      references must be setup for long mode.\r
  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
                      the new stack after paging is enabled.\r
  @param  Context1    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the first parameter after\r
                      paging is enabled.\r
  @param  Context2    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the second parameter after\r
                      paging is enabled.\r
  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
                      the EntryPoint function after paging is enabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmEnablePaging64 (\r
  IN      UINT16                    Cs,\r
  IN      UINT64                    EntryPoint,\r
  IN      UINT64                    Context1,  OPTIONAL\r
  IN      UINT64                    Context2,  OPTIONAL\r
  IN      UINT64                    NewStack\r
  );\r
\r
\r
/**\r
  Disables the 64-bit paging mode on the CPU.\r
\r
  Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
  mode. This function assumes the current execution mode is 64-paging mode.\r
  This function is only available on x64. After the 64-bit paging mode is\r
  disabled, control is transferred to the function specified by EntryPoint\r
  using the new stack specified by NewStack and passing in the parameters\r
  specified by Context1 and Context2. Context1 and Context2 are optional and\r
  may be 0. The function EntryPoint must never return.\r
\r
  If the current execution mode is not 64-bit paged mode, then ASSERT().\r
  If EntryPoint is 0, then ASSERT().\r
  If NewStack is 0, then ASSERT().\r
\r
  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
                      is called. The descriptor in the GDT that this selector\r
                      references must be setup for 32-bit protected mode.\r
  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
                      the new stack after paging is disabled.\r
  @param  Context1    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the first parameter after\r
                      paging is disabled.\r
  @param  Context2    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the second parameter after\r
                      paging is disabled.\r
  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
                      the EntryPoint function after paging is disabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmDisablePaging64 (\r
  IN      UINT16                    Cs,\r
  IN      UINT32                    EntryPoint,\r
  IN      UINT32                    Context1,  OPTIONAL\r
  IN      UINT32                    Context2,  OPTIONAL\r
  IN      UINT32                    NewStack\r
  );\r
\r
\r
//\r
// 16-bit thunking services\r
//\r
\r
/**\r
  Retrieves the properties for 16-bit thunk functions.\r
\r
  Computes the size of the buffer and stack below 1MB required to use the\r
  AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r
  buffer size is returned in RealModeBufferSize, and the stack size is returned\r
  in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
  then the actual minimum stack size is ExtraStackSize plus the maximum number\r
  of bytes that need to be passed to the 16-bit real mode code.\r
  \r
  If RealModeBufferSize is NULL, then ASSERT().\r
  If ExtraStackSize is NULL, then ASSERT().\r
\r
  @param  RealModeBufferSize  A pointer to the size of the buffer below 1MB\r
                              required to use the 16-bit thunk functions.\r
  @param  ExtraStackSize      A pointer to the extra size of stack below 1MB\r
                              that the 16-bit thunk functions require for\r
                              temporary storage in the transition to and from\r
                              16-bit real mode.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmGetThunk16Properties (\r
  OUT     UINT32                    *RealModeBufferSize,\r
  OUT     UINT32                    *ExtraStackSize\r
  );\r
\r
\r
/**\r
  Prepares all structures a code required to use AsmThunk16().\r
\r
  Prepares all structures and code required to use AsmThunk16().\r
  \r
  This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
  virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
\r
  If ThunkContext is NULL, then ASSERT().\r
\r
  @param  ThunkContext  A pointer to the context structure that describes the\r
                        16-bit real mode code to call.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmPrepareThunk16 (\r
  OUT     THUNK_CONTEXT             *ThunkContext\r
  );\r
\r
\r
/**\r
  Transfers control to a 16-bit real mode entry point and returns the results.\r
\r
  Transfers control to a 16-bit real mode entry point and returns the results.\r
  AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r
  This function must be called with interrupts disabled.\r
\r
  The register state from the RealModeState field of ThunkContext is restored just prior \r
  to calling the 16-bit real mode entry point.  This includes the EFLAGS field of RealModeState, \r
  which is used to set the interrupt state when a 16-bit real mode entry point is called.\r
  Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r
  The stack is initialized to the SS and ESP fields of RealModeState.  Any parameters passed to \r
  the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function.  \r
  The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r
  so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r
  and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r
  point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r
  after the RETF instruction is executed.\r
  \r
  If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
  or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r
  the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r
  \r
  If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
  then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode.  \r
  This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r
  \r
  If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r
  is invoked in big real mode.  Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r
  \r
  If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
  ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r
  disable the A20 mask.\r
  \r
  If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r
  ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask.  If this INT 15 call fails, \r
  then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
  \r
  If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r
  ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
    \r
  If ThunkContext is NULL, then ASSERT().\r
  If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r
  If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
  ThunkAttributes, then ASSERT().\r
\r
  This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
  virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
\r
  @param  ThunkContext  A pointer to the context structure that describes the\r
                        16-bit real mode code to call.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmThunk16 (\r
  IN OUT  THUNK_CONTEXT             *ThunkContext\r
  );\r
\r
\r
/**\r
  Prepares all structures and code for a 16-bit real mode thunk, transfers\r
  control to a 16-bit real mode entry point, and returns the results.\r
\r
  Prepares all structures and code for a 16-bit real mode thunk, transfers\r
  control to a 16-bit real mode entry point, and returns the results. If the\r
  caller only need to perform a single 16-bit real mode thunk, then this\r
  service should be used. If the caller intends to make more than one 16-bit\r
  real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r
  once and AsmThunk16() can be called for each 16-bit real mode thunk.\r
\r
  This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
  virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
\r
  See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r
\r
  @param  ThunkContext  A pointer to the context structure that describes the\r
                        16-bit real mode code to call.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmPrepareAndThunk16 (\r
  IN OUT  THUNK_CONTEXT             *ThunkContext\r
  );\r
\r
#endif\r
#endif\r
\r
\r