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ac644614 | 1 | /** @file\r |
50a64e5b | 2 | Provides string functions, linked list functions, math functions, synchronization\r |
ae591c14 | 3 | functions, file path functions, and CPU architecture-specific functions.\r |
ac644614 | 4 | \r |
ae591c14 | 5 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
9df063a0 HT |
6 | Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
7 | This program and the accompanying materials\r | |
50a64e5b | 8 | are licensed and made available under the terms and conditions of the BSD License\r |
9 | which accompanies this distribution. The full text of the license may be found at\r | |
af2dc6a7 | 10 | http://opensource.org/licenses/bsd-license.php.\r |
ac644614 | 11 | \r |
50a64e5b | 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
ac644614 | 14 | \r |
15 | **/\r | |
16 | \r | |
17 | #ifndef __BASE_LIB__\r | |
18 | #define __BASE_LIB__\r | |
19 | \r | |
1106ffe1 | 20 | //\r |
1a2f870c | 21 | // Definitions for architecture-specific types\r |
1106ffe1 | 22 | //\r |
ac644614 | 23 | #if defined (MDE_CPU_IA32)\r |
fc30687f | 24 | ///\r |
af2dc6a7 | 25 | /// The IA-32 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 26 | ///\r |
ac644614 | 27 | typedef struct {\r |
28 | UINT32 Ebx;\r | |
29 | UINT32 Esi;\r | |
30 | UINT32 Edi;\r | |
31 | UINT32 Ebp;\r | |
32 | UINT32 Esp;\r | |
33 | UINT32 Eip;\r | |
34 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
35 | \r | |
36 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
37 | \r | |
aa4df547 | 38 | #endif // defined (MDE_CPU_IA32)\r |
39 | \r | |
40 | #if defined (MDE_CPU_IPF)\r | |
ac644614 | 41 | \r |
fc30687f | 42 | ///\r |
af2dc6a7 | 43 | /// The Itanium architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 44 | ///\r |
ac644614 | 45 | typedef struct {\r |
46 | UINT64 F2[2];\r | |
47 | UINT64 F3[2];\r | |
48 | UINT64 F4[2];\r | |
49 | UINT64 F5[2];\r | |
50 | UINT64 F16[2];\r | |
51 | UINT64 F17[2];\r | |
52 | UINT64 F18[2];\r | |
53 | UINT64 F19[2];\r | |
54 | UINT64 F20[2];\r | |
55 | UINT64 F21[2];\r | |
56 | UINT64 F22[2];\r | |
57 | UINT64 F23[2];\r | |
58 | UINT64 F24[2];\r | |
59 | UINT64 F25[2];\r | |
60 | UINT64 F26[2];\r | |
61 | UINT64 F27[2];\r | |
62 | UINT64 F28[2];\r | |
63 | UINT64 F29[2];\r | |
64 | UINT64 F30[2];\r | |
65 | UINT64 F31[2];\r | |
66 | UINT64 R4;\r | |
67 | UINT64 R5;\r | |
68 | UINT64 R6;\r | |
69 | UINT64 R7;\r | |
70 | UINT64 SP;\r | |
71 | UINT64 BR0;\r | |
72 | UINT64 BR1;\r | |
73 | UINT64 BR2;\r | |
74 | UINT64 BR3;\r | |
75 | UINT64 BR4;\r | |
76 | UINT64 BR5;\r | |
77 | UINT64 InitialUNAT;\r | |
78 | UINT64 AfterSpillUNAT;\r | |
79 | UINT64 PFS;\r | |
80 | UINT64 BSP;\r | |
81 | UINT64 Predicates;\r | |
82 | UINT64 LoopCount;\r | |
83 | UINT64 FPSR;\r | |
84 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
85 | \r | |
86 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r | |
87 | \r | |
aa4df547 | 88 | #endif // defined (MDE_CPU_IPF)\r |
89 | \r | |
90 | #if defined (MDE_CPU_X64)\r | |
fc30687f | 91 | ///\r |
af2dc6a7 | 92 | /// The x64 architecture context buffer used by SetJump() and LongJump().\r |
fc30687f | 93 | ///\r |
ac644614 | 94 | typedef struct {\r |
95 | UINT64 Rbx;\r | |
96 | UINT64 Rsp;\r | |
97 | UINT64 Rbp;\r | |
98 | UINT64 Rdi;\r | |
99 | UINT64 Rsi;\r | |
100 | UINT64 R12;\r | |
101 | UINT64 R13;\r | |
102 | UINT64 R14;\r | |
103 | UINT64 R15;\r | |
104 | UINT64 Rip;\r | |
9b9641c6 | 105 | UINT64 MxCsr;\r |
af2dc6a7 | 106 | UINT8 XmmBuffer[160]; ///< XMM6-XMM15.\r |
ac644614 | 107 | } BASE_LIBRARY_JUMP_BUFFER;\r |
108 | \r | |
109 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
110 | \r | |
aa4df547 | 111 | #endif // defined (MDE_CPU_X64)\r |
112 | \r | |
113 | #if defined (MDE_CPU_EBC)\r | |
fc30687f | 114 | ///\r |
af2dc6a7 | 115 | /// The EBC context buffer used by SetJump() and LongJump().\r |
fc30687f | 116 | ///\r |
ac644614 | 117 | typedef struct {\r |
118 | UINT64 R0;\r | |
119 | UINT64 R1;\r | |
120 | UINT64 R2;\r | |
121 | UINT64 R3;\r | |
122 | UINT64 IP;\r | |
123 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
124 | \r | |
125 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
126 | \r | |
aa4df547 | 127 | #endif // defined (MDE_CPU_EBC)\r |
ac644614 | 128 | \r |
ebd04fc2 | 129 | #if defined (MDE_CPU_ARM)\r |
130 | \r | |
131 | typedef struct {\r | |
af2dc6a7 | 132 | UINT32 R3; ///< A copy of R13.\r |
01a54966 | 133 | UINT32 R4;\r |
134 | UINT32 R5;\r | |
135 | UINT32 R6;\r | |
136 | UINT32 R7;\r | |
137 | UINT32 R8;\r | |
138 | UINT32 R9;\r | |
139 | UINT32 R10;\r | |
140 | UINT32 R11;\r | |
141 | UINT32 R12;\r | |
142 | UINT32 R14;\r | |
ebd04fc2 | 143 | } BASE_LIBRARY_JUMP_BUFFER;\r |
144 | \r | |
145 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r | |
146 | \r | |
147 | #endif // defined (MDE_CPU_ARM)\r | |
148 | \r | |
807e2604 HL |
149 | #if defined (MDE_CPU_AARCH64)\r |
150 | typedef struct {\r | |
151 | // GP regs\r | |
152 | UINT64 X19;\r | |
153 | UINT64 X20;\r | |
154 | UINT64 X21;\r | |
155 | UINT64 X22;\r | |
156 | UINT64 X23;\r | |
157 | UINT64 X24;\r | |
158 | UINT64 X25;\r | |
159 | UINT64 X26;\r | |
160 | UINT64 X27;\r | |
161 | UINT64 X28;\r | |
162 | UINT64 FP;\r | |
163 | UINT64 LR;\r | |
164 | UINT64 IP0;\r | |
165 | \r | |
166 | // FP regs\r | |
167 | UINT64 D8;\r | |
168 | UINT64 D9;\r | |
169 | UINT64 D10;\r | |
170 | UINT64 D11;\r | |
171 | UINT64 D12;\r | |
172 | UINT64 D13;\r | |
173 | UINT64 D14;\r | |
174 | UINT64 D15;\r | |
175 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
176 | \r | |
177 | #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r | |
178 | \r | |
179 | #endif // defined (MDE_CPU_AARCH64)\r | |
180 | \r | |
181 | \r | |
ac644614 | 182 | //\r |
183 | // String Services\r | |
184 | //\r | |
185 | \r | |
c058d59f JY |
186 | \r |
187 | /**\r | |
188 | Returns the length of a Null-terminated Unicode string.\r | |
189 | \r | |
190 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
191 | \r | |
192 | @param String A pointer to a Null-terminated Unicode string.\r | |
193 | @param MaxSize The maximum number of Destination Unicode\r | |
194 | char, including terminating null char.\r | |
195 | \r | |
196 | @retval 0 If String is NULL.\r | |
197 | @retval MaxSize If there is no null character in the first MaxSize characters of String.\r | |
198 | @return The number of characters that percede the terminating null character.\r | |
199 | \r | |
200 | **/\r | |
201 | UINTN\r | |
202 | EFIAPI\r | |
203 | StrnLenS (\r | |
204 | IN CONST CHAR16 *String,\r | |
205 | IN UINTN MaxSize\r | |
206 | );\r | |
207 | \r | |
208 | /**\r | |
209 | Copies the string pointed to by Source (including the terminating null char)\r | |
210 | to the array pointed to by Destination.\r | |
211 | \r | |
212 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
213 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
0e93edbb | 214 | If an error would be returned, then the function will also ASSERT().\r |
c058d59f JY |
215 | \r |
216 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
217 | @param DestMax The maximum number of Destination Unicode\r | |
218 | char, including terminating null char.\r | |
219 | @param Source A pointer to a Null-terminated Unicode string.\r | |
220 | \r | |
221 | @retval RETURN_SUCCESS String is copied.\r | |
222 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than StrLen(Source).\r | |
223 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
224 | If Source is NULL.\r | |
225 | If PcdMaximumUnicodeStringLength is not zero,\r | |
226 | and DestMax is greater than \r | |
227 | PcdMaximumUnicodeStringLength.\r | |
228 | If DestMax is 0.\r | |
229 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
230 | **/\r | |
231 | RETURN_STATUS\r | |
232 | EFIAPI\r | |
233 | StrCpyS (\r | |
234 | OUT CHAR16 *Destination,\r | |
235 | IN UINTN DestMax,\r | |
236 | IN CONST CHAR16 *Source\r | |
237 | );\r | |
238 | \r | |
239 | /**\r | |
240 | Copies not more than Length successive char from the string pointed to by\r | |
241 | Source to the array pointed to by Destination. If no null char is copied from\r | |
242 | Source, then Destination[Length] is always set to null.\r | |
243 | \r | |
244 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
245 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
0e93edbb | 246 | If an error would be returned, then the function will also ASSERT().\r |
c058d59f JY |
247 | \r |
248 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
249 | @param DestMax The maximum number of Destination Unicode\r | |
250 | char, including terminating null char.\r | |
251 | @param Source A pointer to a Null-terminated Unicode string.\r | |
252 | @param Length The maximum number of Unicode characters to copy.\r | |
253 | \r | |
254 | @retval RETURN_SUCCESS String is copied.\r | |
255 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r | |
256 | MIN(StrLen(Source), Length).\r | |
257 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
258 | If Source is NULL.\r | |
259 | If PcdMaximumUnicodeStringLength is not zero,\r | |
260 | and DestMax is greater than \r | |
261 | PcdMaximumUnicodeStringLength.\r | |
262 | If DestMax is 0.\r | |
263 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
264 | **/\r | |
265 | RETURN_STATUS\r | |
266 | EFIAPI\r | |
267 | StrnCpyS (\r | |
268 | OUT CHAR16 *Destination,\r | |
269 | IN UINTN DestMax,\r | |
270 | IN CONST CHAR16 *Source,\r | |
271 | IN UINTN Length\r | |
272 | );\r | |
273 | \r | |
274 | /**\r | |
275 | Appends a copy of the string pointed to by Source (including the terminating\r | |
276 | null char) to the end of the string pointed to by Destination.\r | |
277 | \r | |
278 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
279 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
0e93edbb | 280 | If an error would be returned, then the function will also ASSERT().\r |
c058d59f JY |
281 | \r |
282 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
283 | @param DestMax The maximum number of Destination Unicode\r | |
284 | char, including terminating null char.\r | |
285 | @param Source A pointer to a Null-terminated Unicode string.\r | |
286 | \r | |
287 | @retval RETURN_SUCCESS String is appended.\r | |
288 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r | |
289 | StrLen(Destination).\r | |
290 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
291 | greater than StrLen(Source).\r | |
292 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
293 | If Source is NULL.\r | |
294 | If PcdMaximumUnicodeStringLength is not zero,\r | |
295 | and DestMax is greater than \r | |
296 | PcdMaximumUnicodeStringLength.\r | |
297 | If DestMax is 0.\r | |
298 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
299 | **/\r | |
300 | RETURN_STATUS\r | |
301 | EFIAPI\r | |
302 | StrCatS (\r | |
303 | IN OUT CHAR16 *Destination,\r | |
304 | IN UINTN DestMax,\r | |
305 | IN CONST CHAR16 *Source\r | |
306 | );\r | |
307 | \r | |
308 | /**\r | |
309 | Appends not more than Length successive char from the string pointed to by\r | |
310 | Source to the end of the string pointed to by Destination. If no null char is\r | |
311 | copied from Source, then Destination[StrLen(Destination) + Length] is always\r | |
312 | set to null.\r | |
313 | \r | |
314 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
0e93edbb JY |
315 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r |
316 | If an error would be returned, then the function will also ASSERT().\r | |
c058d59f JY |
317 | \r |
318 | @param Destination A pointer to a Null-terminated Unicode string.\r | |
319 | @param DestMax The maximum number of Destination Unicode\r | |
320 | char, including terminating null char.\r | |
321 | @param Source A pointer to a Null-terminated Unicode string.\r | |
322 | @param Length The maximum number of Unicode characters to copy.\r | |
323 | \r | |
324 | @retval RETURN_SUCCESS String is appended.\r | |
325 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r | |
326 | StrLen(Destination).\r | |
327 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
328 | greater than MIN(StrLen(Source), Length).\r | |
329 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
330 | If Source is NULL.\r | |
331 | If PcdMaximumUnicodeStringLength is not zero,\r | |
332 | and DestMax is greater than \r | |
333 | PcdMaximumUnicodeStringLength.\r | |
334 | If DestMax is 0.\r | |
335 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
336 | **/\r | |
337 | RETURN_STATUS\r | |
338 | EFIAPI\r | |
339 | StrnCatS (\r | |
340 | IN OUT CHAR16 *Destination,\r | |
341 | IN UINTN DestMax,\r | |
342 | IN CONST CHAR16 *Source,\r | |
343 | IN UINTN Length\r | |
344 | );\r | |
345 | \r | |
346 | /**\r | |
347 | Returns the length of a Null-terminated Ascii string.\r | |
348 | \r | |
349 | @param String A pointer to a Null-terminated Ascii string.\r | |
350 | @param MaxSize The maximum number of Destination Ascii\r | |
351 | char, including terminating null char.\r | |
352 | \r | |
353 | @retval 0 If String is NULL.\r | |
354 | @retval MaxSize If there is no null character in the first MaxSize characters of String.\r | |
355 | @return The number of characters that percede the terminating null character.\r | |
356 | \r | |
357 | **/\r | |
358 | UINTN\r | |
359 | EFIAPI\r | |
360 | AsciiStrnLenS (\r | |
361 | IN CONST CHAR8 *String,\r | |
362 | IN UINTN MaxSize\r | |
363 | );\r | |
364 | \r | |
365 | /**\r | |
366 | Copies the string pointed to by Source (including the terminating null char)\r | |
367 | to the array pointed to by Destination.\r | |
368 | \r | |
0e93edbb JY |
369 | If an error would be returned, then the function will also ASSERT().\r |
370 | \r | |
c058d59f JY |
371 | @param Destination A pointer to a Null-terminated Ascii string.\r |
372 | @param DestMax The maximum number of Destination Ascii\r | |
373 | char, including terminating null char.\r | |
374 | @param Source A pointer to a Null-terminated Ascii string.\r | |
375 | \r | |
376 | @retval RETURN_SUCCESS String is copied.\r | |
377 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than StrLen(Source).\r | |
378 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
379 | If Source is NULL.\r | |
380 | If PcdMaximumAsciiStringLength is not zero,\r | |
381 | and DestMax is greater than \r | |
382 | PcdMaximumAsciiStringLength.\r | |
383 | If DestMax is 0.\r | |
384 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
385 | **/\r | |
386 | RETURN_STATUS\r | |
387 | EFIAPI\r | |
388 | AsciiStrCpyS (\r | |
389 | OUT CHAR8 *Destination,\r | |
390 | IN UINTN DestMax,\r | |
391 | IN CONST CHAR8 *Source\r | |
392 | );\r | |
393 | \r | |
394 | /**\r | |
395 | Copies not more than Length successive char from the string pointed to by\r | |
396 | Source to the array pointed to by Destination. If no null char is copied from\r | |
397 | Source, then Destination[Length] is always set to null.\r | |
398 | \r | |
0e93edbb JY |
399 | If an error would be returned, then the function will also ASSERT().\r |
400 | \r | |
c058d59f JY |
401 | @param Destination A pointer to a Null-terminated Ascii string.\r |
402 | @param DestMax The maximum number of Destination Ascii\r | |
403 | char, including terminating null char.\r | |
404 | @param Source A pointer to a Null-terminated Ascii string.\r | |
405 | @param Length The maximum number of Ascii characters to copy.\r | |
406 | \r | |
407 | @retval RETURN_SUCCESS String is copied.\r | |
408 | @retval RETURN_BUFFER_TOO_SMALL If DestMax is NOT greater than \r | |
409 | MIN(StrLen(Source), Length).\r | |
410 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
411 | If Source is NULL.\r | |
412 | If PcdMaximumAsciiStringLength is not zero,\r | |
413 | and DestMax is greater than \r | |
414 | PcdMaximumAsciiStringLength.\r | |
415 | If DestMax is 0.\r | |
416 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
417 | **/\r | |
418 | RETURN_STATUS\r | |
419 | EFIAPI\r | |
420 | AsciiStrnCpyS (\r | |
421 | OUT CHAR8 *Destination,\r | |
422 | IN UINTN DestMax,\r | |
423 | IN CONST CHAR8 *Source,\r | |
424 | IN UINTN Length\r | |
425 | );\r | |
426 | \r | |
427 | /**\r | |
428 | Appends a copy of the string pointed to by Source (including the terminating\r | |
429 | null char) to the end of the string pointed to by Destination.\r | |
430 | \r | |
0e93edbb JY |
431 | If an error would be returned, then the function will also ASSERT().\r |
432 | \r | |
c058d59f JY |
433 | @param Destination A pointer to a Null-terminated Ascii string.\r |
434 | @param DestMax The maximum number of Destination Ascii\r | |
435 | char, including terminating null char.\r | |
436 | @param Source A pointer to a Null-terminated Ascii string.\r | |
437 | \r | |
438 | @retval RETURN_SUCCESS String is appended.\r | |
439 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than \r | |
440 | StrLen(Destination).\r | |
441 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
442 | greater than StrLen(Source).\r | |
443 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
444 | If Source is NULL.\r | |
445 | If PcdMaximumAsciiStringLength is not zero,\r | |
446 | and DestMax is greater than \r | |
447 | PcdMaximumAsciiStringLength.\r | |
448 | If DestMax is 0.\r | |
449 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
450 | **/\r | |
451 | RETURN_STATUS\r | |
452 | EFIAPI\r | |
453 | AsciiStrCatS (\r | |
454 | IN OUT CHAR8 *Destination,\r | |
455 | IN UINTN DestMax,\r | |
456 | IN CONST CHAR8 *Source\r | |
457 | );\r | |
458 | \r | |
459 | /**\r | |
460 | Appends not more than Length successive char from the string pointed to by\r | |
461 | Source to the end of the string pointed to by Destination. If no null char is\r | |
462 | copied from Source, then Destination[StrLen(Destination) + Length] is always\r | |
463 | set to null.\r | |
464 | \r | |
0e93edbb JY |
465 | If an error would be returned, then the function will also ASSERT().\r |
466 | \r | |
c058d59f JY |
467 | @param Destination A pointer to a Null-terminated Ascii string.\r |
468 | @param DestMax The maximum number of Destination Ascii\r | |
469 | char, including terminating null char.\r | |
470 | @param Source A pointer to a Null-terminated Ascii string.\r | |
471 | @param Length The maximum number of Ascii characters to copy.\r | |
472 | \r | |
473 | @retval RETURN_SUCCESS String is appended.\r | |
474 | @retval RETURN_BAD_BUFFER_SIZE If DestMax is NOT greater than\r | |
475 | StrLen(Destination).\r | |
476 | @retval RETURN_BUFFER_TOO_SMALL If (DestMax - StrLen(Destination)) is NOT\r | |
477 | greater than MIN(StrLen(Source), Length).\r | |
478 | @retval RETURN_INVALID_PARAMETER If Destination is NULL.\r | |
479 | If Source is NULL.\r | |
480 | If PcdMaximumAsciiStringLength is not zero,\r | |
481 | and DestMax is greater than \r | |
482 | PcdMaximumAsciiStringLength.\r | |
483 | If DestMax is 0.\r | |
484 | @retval RETURN_ACCESS_DENIED If Source and Destination overlap.\r | |
485 | **/\r | |
486 | RETURN_STATUS\r | |
487 | EFIAPI\r | |
488 | AsciiStrnCatS (\r | |
489 | IN OUT CHAR8 *Destination,\r | |
490 | IN UINTN DestMax,\r | |
491 | IN CONST CHAR8 *Source,\r | |
492 | IN UINTN Length\r | |
493 | );\r | |
494 | \r | |
495 | \r | |
1bb390f1 ED |
496 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
497 | \r | |
ac644614 | 498 | /**\r |
ae591c14 | 499 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 500 | \r |
ac644614 | 501 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r |
502 | string and returns the new Unicode string.\r | |
503 | \r | |
504 | This function copies the contents of the Unicode string Source to the Unicode\r | |
505 | string Destination, and returns Destination. If Source and Destination\r | |
506 | overlap, then the results are undefined.\r | |
507 | \r | |
508 | If Destination is NULL, then ASSERT().\r | |
509 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
510 | If Source is NULL, then ASSERT().\r | |
511 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
512 | If Source and Destination overlap, then ASSERT().\r | |
513 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
514 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
515 | Null-terminator, then ASSERT().\r | |
516 | \r | |
af2dc6a7 | 517 | @param Destination The pointer to a Null-terminated Unicode string.\r |
518 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 519 | \r |
9aa049d9 | 520 | @return Destination.\r |
ac644614 | 521 | \r |
522 | **/\r | |
523 | CHAR16 *\r | |
524 | EFIAPI\r | |
525 | StrCpy (\r | |
526 | OUT CHAR16 *Destination,\r | |
527 | IN CONST CHAR16 *Source\r | |
528 | );\r | |
529 | \r | |
530 | \r | |
531 | /**\r | |
ae591c14 | 532 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 533 | \r |
af2dc6a7 | 534 | Copies up to a specified length from one Null-terminated Unicode string to \r |
17f695ed | 535 | another Null-terminated Unicode string and returns the new Unicode string.\r |
ac644614 | 536 | \r |
537 | This function copies the contents of the Unicode string Source to the Unicode\r | |
538 | string Destination, and returns Destination. At most, Length Unicode\r | |
539 | characters are copied from Source to Destination. If Length is 0, then\r | |
540 | Destination is returned unmodified. If Length is greater that the number of\r | |
541 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
542 | characters. If Source and Destination overlap, then the results are\r | |
543 | undefined.\r | |
544 | \r | |
545 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
546 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
547 | If Length > 0 and Source is NULL, then ASSERT().\r | |
77f863ee | 548 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 549 | If Source and Destination overlap, then ASSERT().\r |
50c247fd | 550 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
551 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 552 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r |
50c247fd | 553 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r |
554 | then ASSERT().\r | |
ac644614 | 555 | \r |
af2dc6a7 | 556 | @param Destination The pointer to a Null-terminated Unicode string.\r |
557 | @param Source The pointer to a Null-terminated Unicode string.\r | |
558 | @param Length The maximum number of Unicode characters to copy.\r | |
ac644614 | 559 | \r |
9aa049d9 | 560 | @return Destination.\r |
ac644614 | 561 | \r |
562 | **/\r | |
563 | CHAR16 *\r | |
564 | EFIAPI\r | |
565 | StrnCpy (\r | |
566 | OUT CHAR16 *Destination,\r | |
567 | IN CONST CHAR16 *Source,\r | |
568 | IN UINTN Length\r | |
569 | );\r | |
1bb390f1 | 570 | #endif\r |
ac644614 | 571 | \r |
572 | /**\r | |
573 | Returns the length of a Null-terminated Unicode string.\r | |
574 | \r | |
575 | This function returns the number of Unicode characters in the Null-terminated\r | |
576 | Unicode string specified by String.\r | |
577 | \r | |
578 | If String is NULL, then ASSERT().\r | |
579 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
580 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
581 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
582 | Null-terminator, then ASSERT().\r | |
583 | \r | |
584 | @param String Pointer to a Null-terminated Unicode string.\r | |
585 | \r | |
586 | @return The length of String.\r | |
587 | \r | |
588 | **/\r | |
589 | UINTN\r | |
590 | EFIAPI\r | |
591 | StrLen (\r | |
592 | IN CONST CHAR16 *String\r | |
593 | );\r | |
594 | \r | |
595 | \r | |
596 | /**\r | |
597 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
598 | Null terminator.\r | |
599 | \r | |
17f695ed | 600 | This function returns the size, in bytes, of the Null-terminated Unicode string \r |
601 | specified by String.\r | |
ac644614 | 602 | \r |
603 | If String is NULL, then ASSERT().\r | |
604 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
605 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
606 | PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
607 | Null-terminator, then ASSERT().\r | |
608 | \r | |
af2dc6a7 | 609 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 610 | \r |
611 | @return The size of String.\r | |
612 | \r | |
613 | **/\r | |
614 | UINTN\r | |
615 | EFIAPI\r | |
616 | StrSize (\r | |
617 | IN CONST CHAR16 *String\r | |
618 | );\r | |
619 | \r | |
620 | \r | |
621 | /**\r | |
622 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
623 | between the first mismatched Unicode characters.\r | |
624 | \r | |
625 | This function compares the Null-terminated Unicode string FirstString to the\r | |
626 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
627 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
628 | mismatched Unicode character in SecondString subtracted from the first\r | |
629 | mismatched Unicode character in FirstString.\r | |
630 | \r | |
631 | If FirstString is NULL, then ASSERT().\r | |
632 | If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r | |
633 | If SecondString is NULL, then ASSERT().\r | |
634 | If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r | |
635 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
636 | than PcdMaximumUnicodeStringLength Unicode characters not including the\r | |
637 | Null-terminator, then ASSERT().\r | |
638 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
af2dc6a7 | 639 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 640 | Null-terminator, then ASSERT().\r |
641 | \r | |
af2dc6a7 | 642 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
643 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 644 | \r |
1106ffe1 | 645 | @retval 0 FirstString is identical to SecondString.\r |
646 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 647 | \r |
648 | **/\r | |
649 | INTN\r | |
650 | EFIAPI\r | |
651 | StrCmp (\r | |
652 | IN CONST CHAR16 *FirstString,\r | |
653 | IN CONST CHAR16 *SecondString\r | |
654 | );\r | |
655 | \r | |
656 | \r | |
657 | /**\r | |
17f695ed | 658 | Compares up to a specified length the contents of two Null-terminated Unicode strings,\r |
659 | and returns the difference between the first mismatched Unicode characters.\r | |
660 | \r | |
ac644614 | 661 | This function compares the Null-terminated Unicode string FirstString to the\r |
662 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
663 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
664 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
665 | value returned is the first mismatched Unicode character in SecondString\r | |
666 | subtracted from the first mismatched Unicode character in FirstString.\r | |
667 | \r | |
668 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
77f863ee | 669 | If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 670 | If Length > 0 and SecondString is NULL, then ASSERT().\r |
77f863ee | 671 | If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r |
50c247fd | 672 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r |
673 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
674 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r | |
675 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
676 | then ASSERT().\r | |
677 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r | |
678 | PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r | |
679 | then ASSERT().\r | |
ac644614 | 680 | \r |
af2dc6a7 | 681 | @param FirstString The pointer to a Null-terminated Unicode string.\r |
682 | @param SecondString The pointer to a Null-terminated Unicode string.\r | |
683 | @param Length The maximum number of Unicode characters to compare.\r | |
ac644614 | 684 | \r |
1106ffe1 | 685 | @retval 0 FirstString is identical to SecondString.\r |
686 | @return others FirstString is not identical to SecondString.\r | |
ac644614 | 687 | \r |
688 | **/\r | |
689 | INTN\r | |
690 | EFIAPI\r | |
691 | StrnCmp (\r | |
692 | IN CONST CHAR16 *FirstString,\r | |
693 | IN CONST CHAR16 *SecondString,\r | |
694 | IN UINTN Length\r | |
695 | );\r | |
696 | \r | |
697 | \r | |
1bb390f1 ED |
698 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
699 | \r | |
ac644614 | 700 | /**\r |
ae591c14 | 701 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 702 | \r |
ac644614 | 703 | Concatenates one Null-terminated Unicode string to another Null-terminated\r |
704 | Unicode string, and returns the concatenated Unicode string.\r | |
705 | \r | |
706 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
707 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
708 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
709 | Unicode String is returned. If Source and Destination overlap, then the\r | |
710 | results are undefined.\r | |
711 | \r | |
712 | If Destination is NULL, then ASSERT().\r | |
77f863ee | 713 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 714 | If Source is NULL, then ASSERT().\r |
77f863ee | 715 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r |
ac644614 | 716 | If Source and Destination overlap, then ASSERT().\r |
717 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
af2dc6a7 | 718 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 719 | Null-terminator, then ASSERT().\r |
720 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
af2dc6a7 | 721 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 722 | Null-terminator, then ASSERT().\r |
723 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
724 | and Source results in a Unicode string with more than\r | |
af2dc6a7 | 725 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 726 | Null-terminator, then ASSERT().\r |
727 | \r | |
af2dc6a7 | 728 | @param Destination The pointer to a Null-terminated Unicode string.\r |
729 | @param Source The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 730 | \r |
9aa049d9 | 731 | @return Destination.\r |
ac644614 | 732 | \r |
733 | **/\r | |
734 | CHAR16 *\r | |
735 | EFIAPI\r | |
736 | StrCat (\r | |
737 | IN OUT CHAR16 *Destination,\r | |
738 | IN CONST CHAR16 *Source\r | |
739 | );\r | |
740 | \r | |
741 | \r | |
742 | /**\r | |
ae591c14 | 743 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 744 | \r |
17f695ed | 745 | Concatenates up to a specified length one Null-terminated Unicode to the end \r |
746 | of another Null-terminated Unicode string, and returns the concatenated \r | |
ac644614 | 747 | Unicode string.\r |
748 | \r | |
749 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
750 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
751 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
752 | most, Length Unicode characters are concatenated from Source to the end of\r | |
753 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
754 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
755 | the results are undefined.\r | |
756 | \r | |
757 | If Destination is NULL, then ASSERT().\r | |
758 | If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
759 | If Length > 0 and Source is NULL, then ASSERT().\r | |
760 | If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
761 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 762 | If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r |
763 | PcdMaximumUnicodeStringLength, then ASSERT().\r | |
ac644614 | 764 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r |
50c247fd | 765 | than PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 766 | Null-terminator, then ASSERT().\r |
767 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
50c247fd | 768 | PcdMaximumUnicodeStringLength Unicode characters, not including the\r |
ac644614 | 769 | Null-terminator, then ASSERT().\r |
770 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
50c247fd | 771 | and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r |
772 | Unicode characters, not including the Null-terminator, then ASSERT().\r | |
ac644614 | 773 | \r |
af2dc6a7 | 774 | @param Destination The pointer to a Null-terminated Unicode string.\r |
775 | @param Source The pointer to a Null-terminated Unicode string.\r | |
776 | @param Length The maximum number of Unicode characters to concatenate from\r | |
ac644614 | 777 | Source.\r |
778 | \r | |
9aa049d9 | 779 | @return Destination.\r |
ac644614 | 780 | \r |
781 | **/\r | |
782 | CHAR16 *\r | |
783 | EFIAPI\r | |
784 | StrnCat (\r | |
785 | IN OUT CHAR16 *Destination,\r | |
786 | IN CONST CHAR16 *Source,\r | |
787 | IN UINTN Length\r | |
788 | );\r | |
1bb390f1 | 789 | #endif\r |
ac644614 | 790 | \r |
791 | /**\r | |
9aa049d9 | 792 | Returns the first occurrence of a Null-terminated Unicode sub-string\r |
ac644614 | 793 | in a Null-terminated Unicode string.\r |
794 | \r | |
795 | This function scans the contents of the Null-terminated Unicode string\r | |
796 | specified by String and returns the first occurrence of SearchString.\r | |
797 | If SearchString is not found in String, then NULL is returned. If\r | |
af2dc6a7 | 798 | the length of SearchString is zero, then String is returned.\r |
ac644614 | 799 | \r |
800 | If String is NULL, then ASSERT().\r | |
801 | If String is not aligned on a 16-bit boundary, then ASSERT().\r | |
802 | If SearchString is NULL, then ASSERT().\r | |
803 | If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r | |
804 | \r | |
805 | If PcdMaximumUnicodeStringLength is not zero, and SearchString\r | |
806 | or String contains more than PcdMaximumUnicodeStringLength Unicode\r | |
af2dc6a7 | 807 | characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 808 | \r |
af2dc6a7 | 809 | @param String The pointer to a Null-terminated Unicode string.\r |
810 | @param SearchString The pointer to a Null-terminated Unicode string to search for.\r | |
ac644614 | 811 | \r |
812 | @retval NULL If the SearchString does not appear in String.\r | |
1106ffe1 | 813 | @return others If there is a match.\r |
ac644614 | 814 | \r |
815 | **/\r | |
816 | CHAR16 *\r | |
817 | EFIAPI\r | |
818 | StrStr (\r | |
17f695ed | 819 | IN CONST CHAR16 *String,\r |
820 | IN CONST CHAR16 *SearchString\r | |
ac644614 | 821 | );\r |
822 | \r | |
823 | /**\r | |
824 | Convert a Null-terminated Unicode decimal string to a value of\r | |
825 | type UINTN.\r | |
826 | \r | |
827 | This function returns a value of type UINTN by interpreting the contents\r | |
828 | of the Unicode string specified by String as a decimal number. The format\r | |
829 | of the input Unicode string String is:\r | |
830 | \r | |
831 | [spaces] [decimal digits].\r | |
832 | \r | |
833 | The valid decimal digit character is in the range [0-9]. The\r | |
834 | function will ignore the pad space, which includes spaces or\r | |
835 | tab characters, before [decimal digits]. The running zero in the\r | |
836 | beginning of [decimal digits] will be ignored. Then, the function\r | |
837 | stops at the first character that is a not a valid decimal character\r | |
838 | or a Null-terminator, whichever one comes first.\r | |
839 | \r | |
840 | If String is NULL, then ASSERT().\r | |
841 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
842 | If String has only pad spaces, then 0 is returned.\r | |
843 | If String has no pad spaces or valid decimal digits,\r | |
844 | then 0 is returned.\r | |
845 | If the number represented by String overflows according\r | |
846 | to the range defined by UINTN, then ASSERT().\r | |
847 | \r | |
848 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
849 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
850 | the Null-terminator, then ASSERT().\r | |
851 | \r | |
af2dc6a7 | 852 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 853 | \r |
38bbd3d9 | 854 | @retval Value translated from String.\r |
ac644614 | 855 | \r |
856 | **/\r | |
857 | UINTN\r | |
858 | EFIAPI\r | |
859 | StrDecimalToUintn (\r | |
17f695ed | 860 | IN CONST CHAR16 *String\r |
ac644614 | 861 | );\r |
862 | \r | |
863 | /**\r | |
864 | Convert a Null-terminated Unicode decimal string to a value of\r | |
865 | type UINT64.\r | |
866 | \r | |
867 | This function returns a value of type UINT64 by interpreting the contents\r | |
868 | of the Unicode string specified by String as a decimal number. The format\r | |
869 | of the input Unicode string String is:\r | |
870 | \r | |
871 | [spaces] [decimal digits].\r | |
872 | \r | |
873 | The valid decimal digit character is in the range [0-9]. The\r | |
874 | function will ignore the pad space, which includes spaces or\r | |
875 | tab characters, before [decimal digits]. The running zero in the\r | |
876 | beginning of [decimal digits] will be ignored. Then, the function\r | |
877 | stops at the first character that is a not a valid decimal character\r | |
878 | or a Null-terminator, whichever one comes first.\r | |
879 | \r | |
880 | If String is NULL, then ASSERT().\r | |
881 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
882 | If String has only pad spaces, then 0 is returned.\r | |
883 | If String has no pad spaces or valid decimal digits,\r | |
884 | then 0 is returned.\r | |
885 | If the number represented by String overflows according\r | |
886 | to the range defined by UINT64, then ASSERT().\r | |
887 | \r | |
888 | If PcdMaximumUnicodeStringLength is not zero, and String contains\r | |
889 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
890 | the Null-terminator, then ASSERT().\r | |
891 | \r | |
af2dc6a7 | 892 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 893 | \r |
38bbd3d9 | 894 | @retval Value translated from String.\r |
ac644614 | 895 | \r |
896 | **/\r | |
897 | UINT64\r | |
898 | EFIAPI\r | |
899 | StrDecimalToUint64 (\r | |
17f695ed | 900 | IN CONST CHAR16 *String\r |
ac644614 | 901 | );\r |
902 | \r | |
903 | \r | |
904 | /**\r | |
905 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r | |
906 | \r | |
907 | This function returns a value of type UINTN by interpreting the contents\r | |
908 | of the Unicode string specified by String as a hexadecimal number.\r | |
909 | The format of the input Unicode string String is:\r | |
910 | \r | |
911 | [spaces][zeros][x][hexadecimal digits].\r | |
912 | \r | |
913 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
914 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
915 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
916 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
917 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
918 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
af2dc6a7 | 919 | first valid hexadecimal digit. Then, the function stops at the first character \r |
920 | that is a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
ac644614 | 921 | \r |
922 | If String is NULL, then ASSERT().\r | |
923 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
924 | If String has only pad spaces, then zero is returned.\r | |
925 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
926 | then zero is returned.\r | |
927 | If the number represented by String overflows according to the range defined by\r | |
928 | UINTN, then ASSERT().\r | |
929 | \r | |
930 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
931 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
932 | then ASSERT().\r | |
933 | \r | |
af2dc6a7 | 934 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 935 | \r |
38bbd3d9 | 936 | @retval Value translated from String.\r |
ac644614 | 937 | \r |
938 | **/\r | |
939 | UINTN\r | |
940 | EFIAPI\r | |
941 | StrHexToUintn (\r | |
17f695ed | 942 | IN CONST CHAR16 *String\r |
ac644614 | 943 | );\r |
944 | \r | |
945 | \r | |
946 | /**\r | |
947 | Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r | |
948 | \r | |
949 | This function returns a value of type UINT64 by interpreting the contents\r | |
950 | of the Unicode string specified by String as a hexadecimal number.\r | |
951 | The format of the input Unicode string String is\r | |
952 | \r | |
953 | [spaces][zeros][x][hexadecimal digits].\r | |
954 | \r | |
955 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
956 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r | |
957 | If "x" appears in the input string, it must be prefixed with at least one 0.\r | |
958 | The function will ignore the pad space, which includes spaces or tab characters,\r | |
959 | before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r | |
960 | [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r | |
961 | first valid hexadecimal digit. Then, the function stops at the first character that is\r | |
962 | a not a valid hexadecimal character or NULL, whichever one comes first.\r | |
963 | \r | |
964 | If String is NULL, then ASSERT().\r | |
965 | If String is not aligned in a 16-bit boundary, then ASSERT().\r | |
966 | If String has only pad spaces, then zero is returned.\r | |
967 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r | |
968 | then zero is returned.\r | |
969 | If the number represented by String overflows according to the range defined by\r | |
970 | UINT64, then ASSERT().\r | |
971 | \r | |
972 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
973 | PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r | |
974 | then ASSERT().\r | |
975 | \r | |
af2dc6a7 | 976 | @param String The pointer to a Null-terminated Unicode string.\r |
ac644614 | 977 | \r |
38bbd3d9 | 978 | @retval Value translated from String.\r |
ac644614 | 979 | \r |
980 | **/\r | |
981 | UINT64\r | |
982 | EFIAPI\r | |
983 | StrHexToUint64 (\r | |
17f695ed | 984 | IN CONST CHAR16 *String\r |
ac644614 | 985 | );\r |
986 | \r | |
ac644614 | 987 | /**\r |
17f695ed | 988 | Convert a Null-terminated Unicode string to a Null-terminated\r |
ac644614 | 989 | ASCII string and returns the ASCII string.\r |
990 | \r | |
991 | This function converts the content of the Unicode string Source\r | |
992 | to the ASCII string Destination by copying the lower 8 bits of\r | |
993 | each Unicode character. It returns Destination.\r | |
994 | \r | |
d3e0289c | 995 | The caller is responsible to make sure Destination points to a buffer with size\r |
996 | equal or greater than ((StrLen (Source) + 1) * sizeof (CHAR8)) in bytes.\r | |
997 | \r | |
ac644614 | 998 | If any Unicode characters in Source contain non-zero value in\r |
999 | the upper 8 bits, then ASSERT().\r | |
1000 | \r | |
1001 | If Destination is NULL, then ASSERT().\r | |
1002 | If Source is NULL, then ASSERT().\r | |
1003 | If Source is not aligned on a 16-bit boundary, then ASSERT().\r | |
1004 | If Source and Destination overlap, then ASSERT().\r | |
1005 | \r | |
1006 | If PcdMaximumUnicodeStringLength is not zero, and Source contains\r | |
1007 | more than PcdMaximumUnicodeStringLength Unicode characters not including\r | |
1008 | the Null-terminator, then ASSERT().\r | |
1009 | \r | |
1010 | If PcdMaximumAsciiStringLength is not zero, and Source contains more\r | |
1011 | than PcdMaximumAsciiStringLength Unicode characters not including the\r | |
1012 | Null-terminator, then ASSERT().\r | |
1013 | \r | |
af2dc6a7 | 1014 | @param Source The pointer to a Null-terminated Unicode string.\r |
1015 | @param Destination The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1016 | \r |
9aa049d9 | 1017 | @return Destination.\r |
ac644614 | 1018 | \r |
1019 | **/\r | |
1020 | CHAR8 *\r | |
1021 | EFIAPI\r | |
1022 | UnicodeStrToAsciiStr (\r | |
17f695ed | 1023 | IN CONST CHAR16 *Source,\r |
1024 | OUT CHAR8 *Destination\r | |
ac644614 | 1025 | );\r |
1026 | \r | |
1027 | \r | |
1bb390f1 ED |
1028 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
1029 | \r | |
ac644614 | 1030 | /**\r |
ae591c14 | 1031 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1032 | \r |
ac644614 | 1033 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r |
1034 | string and returns the new ASCII string.\r | |
1035 | \r | |
1036 | This function copies the contents of the ASCII string Source to the ASCII\r | |
1037 | string Destination, and returns Destination. If Source and Destination\r | |
1038 | overlap, then the results are undefined.\r | |
1039 | \r | |
1040 | If Destination is NULL, then ASSERT().\r | |
1041 | If Source is NULL, then ASSERT().\r | |
1042 | If Source and Destination overlap, then ASSERT().\r | |
1043 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
1044 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1045 | then ASSERT().\r | |
1046 | \r | |
af2dc6a7 | 1047 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1048 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1049 | \r |
1050 | @return Destination\r | |
1051 | \r | |
1052 | **/\r | |
1053 | CHAR8 *\r | |
1054 | EFIAPI\r | |
1055 | AsciiStrCpy (\r | |
1056 | OUT CHAR8 *Destination,\r | |
1057 | IN CONST CHAR8 *Source\r | |
1058 | );\r | |
1059 | \r | |
1060 | \r | |
1061 | /**\r | |
ae591c14 | 1062 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1063 | \r |
17f695ed | 1064 | Copies up to a specified length one Null-terminated ASCII string to another \r |
1065 | Null-terminated ASCII string and returns the new ASCII string.\r | |
ac644614 | 1066 | \r |
1067 | This function copies the contents of the ASCII string Source to the ASCII\r | |
1068 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
1069 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
1070 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
1071 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
1072 | and Destination overlap, then the results are undefined.\r | |
1073 | \r | |
1074 | If Destination is NULL, then ASSERT().\r | |
1075 | If Source is NULL, then ASSERT().\r | |
1076 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 1077 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
1078 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 1079 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r |
50c247fd | 1080 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 1081 | then ASSERT().\r |
1082 | \r | |
af2dc6a7 | 1083 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1084 | @param Source The pointer to a Null-terminated ASCII string.\r | |
1085 | @param Length The maximum number of ASCII characters to copy.\r | |
ac644614 | 1086 | \r |
1087 | @return Destination\r | |
1088 | \r | |
1089 | **/\r | |
1090 | CHAR8 *\r | |
1091 | EFIAPI\r | |
1092 | AsciiStrnCpy (\r | |
1093 | OUT CHAR8 *Destination,\r | |
1094 | IN CONST CHAR8 *Source,\r | |
1095 | IN UINTN Length\r | |
1096 | );\r | |
1bb390f1 | 1097 | #endif\r |
ac644614 | 1098 | \r |
1099 | /**\r | |
1100 | Returns the length of a Null-terminated ASCII string.\r | |
1101 | \r | |
1102 | This function returns the number of ASCII characters in the Null-terminated\r | |
1103 | ASCII string specified by String.\r | |
1104 | \r | |
1105 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
1106 | If Length > 0 and Source is NULL, then ASSERT().\r | |
1107 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
1108 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1109 | then ASSERT().\r | |
1110 | \r | |
af2dc6a7 | 1111 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1112 | \r |
1113 | @return The length of String.\r | |
1114 | \r | |
1115 | **/\r | |
1116 | UINTN\r | |
1117 | EFIAPI\r | |
1118 | AsciiStrLen (\r | |
1119 | IN CONST CHAR8 *String\r | |
1120 | );\r | |
1121 | \r | |
1122 | \r | |
1123 | /**\r | |
1124 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
1125 | Null terminator.\r | |
1126 | \r | |
1127 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
1128 | specified by String.\r | |
1129 | \r | |
1130 | If String is NULL, then ASSERT().\r | |
1131 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
1132 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1133 | then ASSERT().\r | |
1134 | \r | |
af2dc6a7 | 1135 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1136 | \r |
1137 | @return The size of String.\r | |
1138 | \r | |
1139 | **/\r | |
1140 | UINTN\r | |
1141 | EFIAPI\r | |
1142 | AsciiStrSize (\r | |
1143 | IN CONST CHAR8 *String\r | |
1144 | );\r | |
1145 | \r | |
1146 | \r | |
1147 | /**\r | |
1148 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
1149 | between the first mismatched ASCII characters.\r | |
1150 | \r | |
1151 | This function compares the Null-terminated ASCII string FirstString to the\r | |
1152 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
1153 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
1154 | mismatched ASCII character in SecondString subtracted from the first\r | |
1155 | mismatched ASCII character in FirstString.\r | |
1156 | \r | |
1157 | If FirstString is NULL, then ASSERT().\r | |
1158 | If SecondString is NULL, then ASSERT().\r | |
1159 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
1160 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1161 | then ASSERT().\r | |
1162 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
1163 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
1164 | Null-terminator, then ASSERT().\r | |
1165 | \r | |
af2dc6a7 | 1166 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
1167 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1168 | \r |
17f695ed | 1169 | @retval ==0 FirstString is identical to SecondString.\r |
1170 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 1171 | \r |
1172 | **/\r | |
1173 | INTN\r | |
1174 | EFIAPI\r | |
1175 | AsciiStrCmp (\r | |
1176 | IN CONST CHAR8 *FirstString,\r | |
1177 | IN CONST CHAR8 *SecondString\r | |
1178 | );\r | |
1179 | \r | |
1180 | \r | |
1181 | /**\r | |
1182 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
1183 | and returns the difference between the first mismatched ASCII characters.\r | |
1184 | \r | |
1185 | This function performs a case insensitive comparison of the Null-terminated\r | |
1186 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
1187 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
1188 | value returned is the first mismatched lower case ASCII character in\r | |
1189 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
1190 | in FirstString.\r | |
1191 | \r | |
1192 | If FirstString is NULL, then ASSERT().\r | |
1193 | If SecondString is NULL, then ASSERT().\r | |
1194 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
1195 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1196 | then ASSERT().\r | |
1197 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
1198 | than PcdMaximumAsciiStringLength ASCII characters not including the\r | |
1199 | Null-terminator, then ASSERT().\r | |
1200 | \r | |
af2dc6a7 | 1201 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
1202 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1203 | \r |
17f695ed | 1204 | @retval ==0 FirstString is identical to SecondString using case insensitive\r |
1106ffe1 | 1205 | comparisons.\r |
17f695ed | 1206 | @retval !=0 FirstString is not identical to SecondString using case\r |
1106ffe1 | 1207 | insensitive comparisons.\r |
ac644614 | 1208 | \r |
1209 | **/\r | |
1210 | INTN\r | |
1211 | EFIAPI\r | |
1212 | AsciiStriCmp (\r | |
1213 | IN CONST CHAR8 *FirstString,\r | |
1214 | IN CONST CHAR8 *SecondString\r | |
1215 | );\r | |
1216 | \r | |
1217 | \r | |
1218 | /**\r | |
1219 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
1220 | the difference between the first mismatched ASCII characters.\r | |
1221 | \r | |
1222 | This function compares the Null-terminated ASCII string FirstString to the\r | |
1223 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
1224 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
1225 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
1226 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
1227 | first mismatched ASCII character in FirstString.\r | |
1228 | \r | |
1229 | If Length > 0 and FirstString is NULL, then ASSERT().\r | |
1230 | If Length > 0 and SecondString is NULL, then ASSERT().\r | |
50c247fd | 1231 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r |
1232 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
1233 | If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r | |
1234 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 1235 | then ASSERT().\r |
50c247fd | 1236 | If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r |
1237 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r | |
ac644614 | 1238 | then ASSERT().\r |
1239 | \r | |
af2dc6a7 | 1240 | @param FirstString The pointer to a Null-terminated ASCII string.\r |
1241 | @param SecondString The pointer to a Null-terminated ASCII string.\r | |
1242 | @param Length The maximum number of ASCII characters for compare.\r | |
ac644614 | 1243 | \r |
17f695ed | 1244 | @retval ==0 FirstString is identical to SecondString.\r |
1245 | @retval !=0 FirstString is not identical to SecondString.\r | |
ac644614 | 1246 | \r |
1247 | **/\r | |
1248 | INTN\r | |
1249 | EFIAPI\r | |
1250 | AsciiStrnCmp (\r | |
1251 | IN CONST CHAR8 *FirstString,\r | |
1252 | IN CONST CHAR8 *SecondString,\r | |
1253 | IN UINTN Length\r | |
1254 | );\r | |
1255 | \r | |
1256 | \r | |
1bb390f1 ED |
1257 | #ifndef DISABLE_NEW_DEPRECATED_INTERFACES\r |
1258 | \r | |
ac644614 | 1259 | /**\r |
ae591c14 | 1260 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1261 | \r |
ac644614 | 1262 | Concatenates one Null-terminated ASCII string to another Null-terminated\r |
1263 | ASCII string, and returns the concatenated ASCII string.\r | |
1264 | \r | |
1265 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
1266 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
1267 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
1268 | String is returned.\r | |
1269 | \r | |
1270 | If Destination is NULL, then ASSERT().\r | |
1271 | If Source is NULL, then ASSERT().\r | |
1272 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
1273 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1274 | then ASSERT().\r | |
1275 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
1276 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1277 | then ASSERT().\r | |
1278 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
1279 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
1280 | ASCII characters, then ASSERT().\r | |
1281 | \r | |
af2dc6a7 | 1282 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1283 | @param Source The pointer to a Null-terminated ASCII string.\r | |
ac644614 | 1284 | \r |
1285 | @return Destination\r | |
1286 | \r | |
1287 | **/\r | |
1288 | CHAR8 *\r | |
1289 | EFIAPI\r | |
1290 | AsciiStrCat (\r | |
1291 | IN OUT CHAR8 *Destination,\r | |
1292 | IN CONST CHAR8 *Source\r | |
1293 | );\r | |
1294 | \r | |
1295 | \r | |
1296 | /**\r | |
ae591c14 | 1297 | [ATTENTION] This function is deprecated for security reason.\r |
1bb390f1 | 1298 | \r |
17f695ed | 1299 | Concatenates up to a specified length one Null-terminated ASCII string to \r |
1300 | the end of another Null-terminated ASCII string, and returns the \r | |
1301 | concatenated ASCII string.\r | |
ac644614 | 1302 | \r |
1303 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
1304 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
1305 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
1306 | Length ASCII characters are concatenated from Source to the end of\r | |
1307 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
1308 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
1309 | the results are undefined.\r | |
1310 | \r | |
1311 | If Length > 0 and Destination is NULL, then ASSERT().\r | |
1312 | If Length > 0 and Source is NULL, then ASSERT().\r | |
1313 | If Source and Destination overlap, then ASSERT().\r | |
50c247fd | 1314 | If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r |
1315 | PcdMaximumAsciiStringLength, then ASSERT().\r | |
ac644614 | 1316 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r |
50c247fd | 1317 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 1318 | then ASSERT().\r |
1319 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
50c247fd | 1320 | PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r |
ac644614 | 1321 | then ASSERT().\r |
1322 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
1323 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
50c247fd | 1324 | ASCII characters, not including the Null-terminator, then ASSERT().\r |
ac644614 | 1325 | \r |
af2dc6a7 | 1326 | @param Destination The pointer to a Null-terminated ASCII string.\r |
1327 | @param Source The pointer to a Null-terminated ASCII string.\r | |
1328 | @param Length The maximum number of ASCII characters to concatenate from\r | |
ac644614 | 1329 | Source.\r |
1330 | \r | |
1331 | @return Destination\r | |
1332 | \r | |
1333 | **/\r | |
1334 | CHAR8 *\r | |
1335 | EFIAPI\r | |
1336 | AsciiStrnCat (\r | |
1337 | IN OUT CHAR8 *Destination,\r | |
1338 | IN CONST CHAR8 *Source,\r | |
1339 | IN UINTN Length\r | |
1340 | );\r | |
1bb390f1 | 1341 | #endif\r |
ac644614 | 1342 | \r |
1343 | /**\r | |
9aa049d9 | 1344 | Returns the first occurrence of a Null-terminated ASCII sub-string\r |
ac644614 | 1345 | in a Null-terminated ASCII string.\r |
1346 | \r | |
1347 | This function scans the contents of the ASCII string specified by String\r | |
1348 | and returns the first occurrence of SearchString. If SearchString is not\r | |
1349 | found in String, then NULL is returned. If the length of SearchString is zero,\r | |
1350 | then String is returned.\r | |
1351 | \r | |
1352 | If String is NULL, then ASSERT().\r | |
1353 | If SearchString is NULL, then ASSERT().\r | |
1354 | \r | |
1355 | If PcdMaximumAsciiStringLength is not zero, and SearchString or\r | |
1356 | String contains more than PcdMaximumAsciiStringLength Unicode characters\r | |
1357 | not including the Null-terminator, then ASSERT().\r | |
1358 | \r | |
af2dc6a7 | 1359 | @param String The pointer to a Null-terminated ASCII string.\r |
1360 | @param SearchString The pointer to a Null-terminated ASCII string to search for.\r | |
ac644614 | 1361 | \r |
1362 | @retval NULL If the SearchString does not appear in String.\r | |
17f695ed | 1363 | @retval others If there is a match return the first occurrence of SearchingString.\r |
9aa049d9 | 1364 | If the length of SearchString is zero,return String.\r |
ac644614 | 1365 | \r |
1366 | **/\r | |
1367 | CHAR8 *\r | |
1368 | EFIAPI\r | |
1369 | AsciiStrStr (\r | |
17f695ed | 1370 | IN CONST CHAR8 *String,\r |
1371 | IN CONST CHAR8 *SearchString\r | |
ac644614 | 1372 | );\r |
1373 | \r | |
1374 | \r | |
1375 | /**\r | |
1376 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1377 | UINTN.\r | |
1378 | \r | |
1379 | This function returns a value of type UINTN by interpreting the contents\r | |
1380 | of the ASCII string String as a decimal number. The format of the input\r | |
1381 | ASCII string String is:\r | |
1382 | \r | |
1383 | [spaces] [decimal digits].\r | |
1384 | \r | |
1385 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1386 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1387 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1388 | function stops at the first character that is a not a valid decimal character or\r | |
1389 | Null-terminator, whichever on comes first.\r | |
1390 | \r | |
1391 | If String has only pad spaces, then 0 is returned.\r | |
1392 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1393 | If the number represented by String overflows according to the range defined by\r | |
1394 | UINTN, then ASSERT().\r | |
1395 | If String is NULL, then ASSERT().\r | |
1396 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1397 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1398 | then ASSERT().\r | |
1399 | \r | |
af2dc6a7 | 1400 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1401 | \r |
af2dc6a7 | 1402 | @retval The value translated from String.\r |
ac644614 | 1403 | \r |
1404 | **/\r | |
1405 | UINTN\r | |
1406 | EFIAPI\r | |
1407 | AsciiStrDecimalToUintn (\r | |
1408 | IN CONST CHAR8 *String\r | |
1409 | );\r | |
1410 | \r | |
1411 | \r | |
1412 | /**\r | |
1413 | Convert a Null-terminated ASCII decimal string to a value of type\r | |
1414 | UINT64.\r | |
1415 | \r | |
1416 | This function returns a value of type UINT64 by interpreting the contents\r | |
1417 | of the ASCII string String as a decimal number. The format of the input\r | |
1418 | ASCII string String is:\r | |
1419 | \r | |
1420 | [spaces] [decimal digits].\r | |
1421 | \r | |
1422 | The valid decimal digit character is in the range [0-9]. The function will\r | |
1423 | ignore the pad space, which includes spaces or tab characters, before the digits.\r | |
1424 | The running zero in the beginning of [decimal digits] will be ignored. Then, the\r | |
1425 | function stops at the first character that is a not a valid decimal character or\r | |
1426 | Null-terminator, whichever on comes first.\r | |
1427 | \r | |
1428 | If String has only pad spaces, then 0 is returned.\r | |
1429 | If String has no pad spaces or valid decimal digits, then 0 is returned.\r | |
1430 | If the number represented by String overflows according to the range defined by\r | |
1431 | UINT64, then ASSERT().\r | |
1432 | If String is NULL, then ASSERT().\r | |
1433 | If PcdMaximumAsciiStringLength is not zero, and String contains more than\r | |
1434 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1435 | then ASSERT().\r | |
1436 | \r | |
af2dc6a7 | 1437 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1438 | \r |
38bbd3d9 | 1439 | @retval Value translated from String.\r |
ac644614 | 1440 | \r |
1441 | **/\r | |
1442 | UINT64\r | |
1443 | EFIAPI\r | |
1444 | AsciiStrDecimalToUint64 (\r | |
17f695ed | 1445 | IN CONST CHAR8 *String\r |
ac644614 | 1446 | );\r |
1447 | \r | |
1448 | \r | |
1449 | /**\r | |
1450 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r | |
1451 | \r | |
1452 | This function returns a value of type UINTN by interpreting the contents of\r | |
1453 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1454 | string String is:\r | |
1455 | \r | |
1456 | [spaces][zeros][x][hexadecimal digits].\r | |
1457 | \r | |
1458 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1459 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1460 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1461 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1462 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1463 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1464 | digit. Then, the function stops at the first character that is a not a valid\r | |
1465 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1466 | \r | |
1467 | If String has only pad spaces, then 0 is returned.\r | |
1468 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1469 | 0 is returned.\r | |
1470 | \r | |
1471 | If the number represented by String overflows according to the range defined by UINTN,\r | |
1472 | then ASSERT().\r | |
1473 | If String is NULL, then ASSERT().\r | |
1474 | If PcdMaximumAsciiStringLength is not zero,\r | |
1475 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1476 | the Null-terminator, then ASSERT().\r | |
1477 | \r | |
af2dc6a7 | 1478 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1479 | \r |
38bbd3d9 | 1480 | @retval Value translated from String.\r |
ac644614 | 1481 | \r |
1482 | **/\r | |
1483 | UINTN\r | |
1484 | EFIAPI\r | |
1485 | AsciiStrHexToUintn (\r | |
17f695ed | 1486 | IN CONST CHAR8 *String\r |
ac644614 | 1487 | );\r |
1488 | \r | |
1489 | \r | |
1490 | /**\r | |
1491 | Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r | |
1492 | \r | |
1493 | This function returns a value of type UINT64 by interpreting the contents of\r | |
1494 | the ASCII string String as a hexadecimal number. The format of the input ASCII\r | |
1495 | string String is:\r | |
1496 | \r | |
1497 | [spaces][zeros][x][hexadecimal digits].\r | |
1498 | \r | |
1499 | The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r | |
1500 | The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r | |
1501 | appears in the input string, it must be prefixed with at least one 0. The function\r | |
1502 | will ignore the pad space, which includes spaces or tab characters, before [zeros],\r | |
1503 | [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r | |
1504 | will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r | |
1505 | digit. Then, the function stops at the first character that is a not a valid\r | |
1506 | hexadecimal character or Null-terminator, whichever on comes first.\r | |
1507 | \r | |
1508 | If String has only pad spaces, then 0 is returned.\r | |
1509 | If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r | |
1510 | 0 is returned.\r | |
1511 | \r | |
1512 | If the number represented by String overflows according to the range defined by UINT64,\r | |
1513 | then ASSERT().\r | |
1514 | If String is NULL, then ASSERT().\r | |
1515 | If PcdMaximumAsciiStringLength is not zero,\r | |
1516 | and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r | |
1517 | the Null-terminator, then ASSERT().\r | |
1518 | \r | |
af2dc6a7 | 1519 | @param String The pointer to a Null-terminated ASCII string.\r |
ac644614 | 1520 | \r |
38bbd3d9 | 1521 | @retval Value translated from String.\r |
ac644614 | 1522 | \r |
1523 | **/\r | |
1524 | UINT64\r | |
1525 | EFIAPI\r | |
1526 | AsciiStrHexToUint64 (\r | |
17f695ed | 1527 | IN CONST CHAR8 *String\r |
ac644614 | 1528 | );\r |
1529 | \r | |
1530 | \r | |
1531 | /**\r | |
1532 | Convert one Null-terminated ASCII string to a Null-terminated\r | |
1533 | Unicode string and returns the Unicode string.\r | |
1534 | \r | |
1535 | This function converts the contents of the ASCII string Source to the Unicode\r | |
1536 | string Destination, and returns Destination. The function terminates the\r | |
1537 | Unicode string Destination by appending a Null-terminator character at the end.\r | |
1538 | The caller is responsible to make sure Destination points to a buffer with size\r | |
1539 | equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r | |
1540 | \r | |
1541 | If Destination is NULL, then ASSERT().\r | |
1542 | If Destination is not aligned on a 16-bit boundary, then ASSERT().\r | |
1543 | If Source is NULL, then ASSERT().\r | |
1544 | If Source and Destination overlap, then ASSERT().\r | |
1545 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
1546 | PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r | |
1547 | then ASSERT().\r | |
1548 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
1549 | PcdMaximumUnicodeStringLength ASCII characters not including the\r | |
1550 | Null-terminator, then ASSERT().\r | |
1551 | \r | |
af2dc6a7 | 1552 | @param Source The pointer to a Null-terminated ASCII string.\r |
1553 | @param Destination The pointer to a Null-terminated Unicode string.\r | |
ac644614 | 1554 | \r |
9aa049d9 | 1555 | @return Destination.\r |
ac644614 | 1556 | \r |
1557 | **/\r | |
1558 | CHAR16 *\r | |
1559 | EFIAPI\r | |
1560 | AsciiStrToUnicodeStr (\r | |
17f695ed | 1561 | IN CONST CHAR8 *Source,\r |
1562 | OUT CHAR16 *Destination\r | |
ac644614 | 1563 | );\r |
1564 | \r | |
1565 | \r | |
1566 | /**\r | |
1567 | Converts an 8-bit value to an 8-bit BCD value.\r | |
1568 | \r | |
1569 | Converts the 8-bit value specified by Value to BCD. The BCD value is\r | |
1570 | returned.\r | |
1571 | \r | |
1572 | If Value >= 100, then ASSERT().\r | |
1573 | \r | |
1574 | @param Value The 8-bit value to convert to BCD. Range 0..99.\r | |
1575 | \r | |
9aa049d9 | 1576 | @return The BCD value.\r |
ac644614 | 1577 | \r |
1578 | **/\r | |
1579 | UINT8\r | |
1580 | EFIAPI\r | |
1581 | DecimalToBcd8 (\r | |
1582 | IN UINT8 Value\r | |
1583 | );\r | |
1584 | \r | |
1585 | \r | |
1586 | /**\r | |
1587 | Converts an 8-bit BCD value to an 8-bit value.\r | |
1588 | \r | |
1589 | Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r | |
1590 | value is returned.\r | |
1591 | \r | |
1592 | If Value >= 0xA0, then ASSERT().\r | |
1593 | If (Value & 0x0F) >= 0x0A, then ASSERT().\r | |
1594 | \r | |
1595 | @param Value The 8-bit BCD value to convert to an 8-bit value.\r | |
1596 | \r | |
1597 | @return The 8-bit value is returned.\r | |
1598 | \r | |
1599 | **/\r | |
1600 | UINT8\r | |
1601 | EFIAPI\r | |
1602 | BcdToDecimal8 (\r | |
1603 | IN UINT8 Value\r | |
1604 | );\r | |
1605 | \r | |
ae591c14 DM |
1606 | //\r |
1607 | // File Path Manipulation Functions\r | |
1608 | //\r | |
1609 | \r | |
1610 | /**\r | |
1611 | Removes the last directory or file entry in a path by changing the last\r | |
1612 | L'\' to a CHAR_NULL.\r | |
1613 | \r | |
1614 | @param[in, out] Path The pointer to the path to modify.\r | |
1615 | \r | |
1616 | @retval FALSE Nothing was found to remove.\r | |
1617 | @retval TRUE A directory or file was removed.\r | |
1618 | **/\r | |
1619 | BOOLEAN\r | |
1620 | EFIAPI\r | |
1621 | PathRemoveLastItem(\r | |
1622 | IN OUT CHAR16 *Path\r | |
1623 | );\r | |
1624 | \r | |
1625 | /**\r | |
1626 | Function to clean up paths.\r | |
1627 | - Single periods in the path are removed.\r | |
1628 | - Double periods in the path are removed along with a single parent directory.\r | |
1629 | - Forward slashes L'/' are converted to backward slashes L'\'.\r | |
1630 | \r | |
1631 | This will be done inline and the existing buffer may be larger than required\r | |
1632 | upon completion.\r | |
1633 | \r | |
1634 | @param[in] Path The pointer to the string containing the path.\r | |
1635 | \r | |
1636 | @return Returns Path, otherwise returns NULL to indicate that an error has occured.\r | |
1637 | **/\r | |
1638 | CHAR16*\r | |
1639 | EFIAPI\r | |
1640 | PathCleanUpDirectories(\r | |
1641 | IN CHAR16 *Path\r | |
909ac47b | 1642 | );\r |
ac644614 | 1643 | \r |
1644 | //\r | |
1645 | // Linked List Functions and Macros\r | |
1646 | //\r | |
1647 | \r | |
1648 | /**\r | |
1649 | Initializes the head node of a doubly linked list that is declared as a\r | |
1650 | global variable in a module.\r | |
1651 | \r | |
1652 | Initializes the forward and backward links of a new linked list. After\r | |
1653 | initializing a linked list with this macro, the other linked list functions\r | |
1654 | may be used to add and remove nodes from the linked list. This macro results\r | |
1655 | in smaller executables by initializing the linked list in the data section,\r | |
1656 | instead if calling the InitializeListHead() function to perform the\r | |
1657 | equivalent operation.\r | |
1658 | \r | |
77f863ee | 1659 | @param ListHead The head note of a list to initialize.\r |
ac644614 | 1660 | \r |
1661 | **/\r | |
17f695ed | 1662 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r |
ac644614 | 1663 | \r |
1664 | \r | |
1665 | /**\r | |
1666 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
1667 | the head node of the doubly linked list.\r | |
1668 | \r | |
1669 | Initializes the forward and backward links of a new linked list. After\r | |
1670 | initializing a linked list with this function, the other linked list\r | |
1671 | functions may be used to add and remove nodes from the linked list. It is up\r | |
1672 | to the caller of this function to allocate the memory for ListHead.\r | |
1673 | \r | |
1674 | If ListHead is NULL, then ASSERT().\r | |
1675 | \r | |
1676 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
1677 | \r | |
1678 | @return ListHead\r | |
1679 | \r | |
1680 | **/\r | |
1681 | LIST_ENTRY *\r | |
1682 | EFIAPI\r | |
1683 | InitializeListHead (\r | |
aa0583c7 | 1684 | IN OUT LIST_ENTRY *ListHead\r |
ac644614 | 1685 | );\r |
1686 | \r | |
1687 | \r | |
1688 | /**\r | |
1689 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
1690 | to the head node of the doubly linked list.\r | |
1691 | \r | |
1692 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
1693 | ListHead, and returns ListHead.\r | |
1694 | \r | |
1695 | If ListHead is NULL, then ASSERT().\r | |
1696 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1697 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1698 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1699 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
ac644614 | 1700 | of nodes in ListHead, including the ListHead node, is greater than or\r |
1701 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1702 | \r | |
1703 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1704 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
1705 | of a doubly linked list.\r | |
1706 | \r | |
1707 | @return ListHead\r | |
1708 | \r | |
1709 | **/\r | |
1710 | LIST_ENTRY *\r | |
1711 | EFIAPI\r | |
1712 | InsertHeadList (\r | |
aa0583c7 | 1713 | IN OUT LIST_ENTRY *ListHead,\r |
1714 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1715 | );\r |
1716 | \r | |
1717 | \r | |
1718 | /**\r | |
1719 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
1720 | the head node of the doubly linked list.\r | |
1721 | \r | |
1722 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
1723 | and returns ListHead.\r | |
1724 | \r | |
1725 | If ListHead is NULL, then ASSERT().\r | |
1726 | If Entry is NULL, then ASSERT().\r | |
17f695ed | 1727 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1728 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1729 | If PcdMaximumLinkedListLength is not zero, and prior to insertion the number\r |
ac644614 | 1730 | of nodes in ListHead, including the ListHead node, is greater than or\r |
1731 | equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1732 | \r | |
1733 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1734 | @param Entry A pointer to a node that is to be added at the end of the\r | |
1735 | doubly linked list.\r | |
1736 | \r | |
1737 | @return ListHead\r | |
1738 | \r | |
1739 | **/\r | |
1740 | LIST_ENTRY *\r | |
1741 | EFIAPI\r | |
1742 | InsertTailList (\r | |
aa0583c7 | 1743 | IN OUT LIST_ENTRY *ListHead,\r |
1744 | IN OUT LIST_ENTRY *Entry\r | |
ac644614 | 1745 | );\r |
1746 | \r | |
1747 | \r | |
1748 | /**\r | |
1749 | Retrieves the first node of a doubly linked list.\r | |
1750 | \r | |
17f695ed | 1751 | Returns the first node of a doubly linked list. List must have been \r |
1752 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r | |
1753 | If List is empty, then List is returned.\r | |
ac644614 | 1754 | \r |
1755 | If List is NULL, then ASSERT().\r | |
17f695ed | 1756 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1757 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1758 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1759 | in List, including the List node, is greater than or equal to\r |
1760 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1761 | \r | |
1762 | @param List A pointer to the head node of a doubly linked list.\r | |
1763 | \r | |
1764 | @return The first node of a doubly linked list.\r | |
e01a125f | 1765 | @retval List The list is empty.\r |
ac644614 | 1766 | \r |
1767 | **/\r | |
1768 | LIST_ENTRY *\r | |
1769 | EFIAPI\r | |
1770 | GetFirstNode (\r | |
1771 | IN CONST LIST_ENTRY *List\r | |
1772 | );\r | |
1773 | \r | |
1774 | \r | |
1775 | /**\r | |
1776 | Retrieves the next node of a doubly linked list.\r | |
1777 | \r | |
17f695ed | 1778 | Returns the node of a doubly linked list that follows Node. \r |
1779 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1780 | or InitializeListHead(). If List is empty, then List is returned.\r | |
ac644614 | 1781 | \r |
1782 | If List is NULL, then ASSERT().\r | |
1783 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1784 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1785 | InitializeListHead(), then ASSERT().\r | |
a71865b1 LG |
1786 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
1787 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
1081f624 | 1788 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1789 | \r |
1790 | @param List A pointer to the head node of a doubly linked list.\r | |
1791 | @param Node A pointer to a node in the doubly linked list.\r | |
1792 | \r | |
af2dc6a7 | 1793 | @return The pointer to the next node if one exists. Otherwise List is returned.\r |
ac644614 | 1794 | \r |
1795 | **/\r | |
1796 | LIST_ENTRY *\r | |
1797 | EFIAPI\r | |
1798 | GetNextNode (\r | |
1799 | IN CONST LIST_ENTRY *List,\r | |
1800 | IN CONST LIST_ENTRY *Node\r | |
1801 | );\r | |
1802 | \r | |
cbca8de5 | 1803 | \r |
1804 | /**\r | |
1805 | Retrieves the previous node of a doubly linked list.\r | |
1806 | \r | |
1807 | Returns the node of a doubly linked list that precedes Node. \r | |
1808 | List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r | |
1809 | or InitializeListHead(). If List is empty, then List is returned.\r | |
1810 | \r | |
1811 | If List is NULL, then ASSERT().\r | |
1812 | If Node is NULL, then ASSERT().\r | |
1813 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r | |
1814 | InitializeListHead(), then ASSERT().\r | |
a71865b1 LG |
1815 | If PcdMaximumLinkedListLength is not zero, and List contains more than\r |
1816 | PcdMaximumLinkedListLength nodes, then ASSERT().\r | |
cbca8de5 | 1817 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
1818 | \r | |
1819 | @param List A pointer to the head node of a doubly linked list.\r | |
1820 | @param Node A pointer to a node in the doubly linked list.\r | |
1821 | \r | |
af2dc6a7 | 1822 | @return The pointer to the previous node if one exists. Otherwise List is returned.\r |
cbca8de5 | 1823 | \r |
1824 | **/\r | |
1825 | LIST_ENTRY *\r | |
1826 | EFIAPI\r | |
1827 | GetPreviousNode (\r | |
1828 | IN CONST LIST_ENTRY *List,\r | |
1829 | IN CONST LIST_ENTRY *Node\r | |
1830 | );\r | |
ac644614 | 1831 | \r |
cbca8de5 | 1832 | \r |
ac644614 | 1833 | /**\r |
1834 | Checks to see if a doubly linked list is empty or not.\r | |
1835 | \r | |
1836 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
1837 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
1838 | \r | |
1839 | If ListHead is NULL, then ASSERT().\r | |
17f695ed | 1840 | If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r |
1841 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1842 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1843 | in List, including the List node, is greater than or equal to\r |
1844 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1845 | \r | |
1846 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
1847 | \r | |
1848 | @retval TRUE The linked list is empty.\r | |
1849 | @retval FALSE The linked list is not empty.\r | |
1850 | \r | |
1851 | **/\r | |
1852 | BOOLEAN\r | |
1853 | EFIAPI\r | |
1854 | IsListEmpty (\r | |
1855 | IN CONST LIST_ENTRY *ListHead\r | |
1856 | );\r | |
1857 | \r | |
1858 | \r | |
1859 | /**\r | |
aa0583c7 | 1860 | Determines if a node in a doubly linked list is the head node of a the same\r |
1861 | doubly linked list. This function is typically used to terminate a loop that\r | |
1862 | traverses all the nodes in a doubly linked list starting with the head node.\r | |
ac644614 | 1863 | \r |
aa0583c7 | 1864 | Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r |
1865 | nodes in the doubly linked list specified by List. List must have been\r | |
17f695ed | 1866 | initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1867 | \r |
1868 | If List is NULL, then ASSERT().\r | |
1869 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1870 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r |
1871 | then ASSERT().\r | |
a71865b1 | 1872 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1873 | in List, including the List node, is greater than or equal to\r |
1874 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1875 | If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r |
1876 | to List, then ASSERT().\r | |
ac644614 | 1877 | \r |
1878 | @param List A pointer to the head node of a doubly linked list.\r | |
1879 | @param Node A pointer to a node in the doubly linked list.\r | |
1880 | \r | |
1955808d LG |
1881 | @retval TRUE Node is the head of the doubly-linked list pointed by List.\r |
1882 | @retval FALSE Node is not the head of the doubly-linked list pointed by List.\r | |
ac644614 | 1883 | \r |
1884 | **/\r | |
1885 | BOOLEAN\r | |
1886 | EFIAPI\r | |
1887 | IsNull (\r | |
1888 | IN CONST LIST_ENTRY *List,\r | |
1889 | IN CONST LIST_ENTRY *Node\r | |
1890 | );\r | |
1891 | \r | |
1892 | \r | |
1893 | /**\r | |
1894 | Determines if a node the last node in a doubly linked list.\r | |
1895 | \r | |
1896 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
1897 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
17f695ed | 1898 | INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r |
ac644614 | 1899 | \r |
1900 | If List is NULL, then ASSERT().\r | |
1901 | If Node is NULL, then ASSERT().\r | |
17f695ed | 1902 | If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r |
1903 | InitializeListHead(), then ASSERT().\r | |
a71865b1 | 1904 | If PcdMaximumLinkedListLength is not zero, and the number of nodes\r |
ac644614 | 1905 | in List, including the List node, is greater than or equal to\r |
1906 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1081f624 | 1907 | If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r |
ac644614 | 1908 | \r |
1909 | @param List A pointer to the head node of a doubly linked list.\r | |
1910 | @param Node A pointer to a node in the doubly linked list.\r | |
1911 | \r | |
1912 | @retval TRUE Node is the last node in the linked list.\r | |
1913 | @retval FALSE Node is not the last node in the linked list.\r | |
1914 | \r | |
1915 | **/\r | |
1916 | BOOLEAN\r | |
1917 | EFIAPI\r | |
1918 | IsNodeAtEnd (\r | |
1919 | IN CONST LIST_ENTRY *List,\r | |
1920 | IN CONST LIST_ENTRY *Node\r | |
1921 | );\r | |
1922 | \r | |
1923 | \r | |
1924 | /**\r | |
1925 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
1926 | first node after the swap.\r | |
1927 | \r | |
1928 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
1929 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
1930 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
1931 | same double linked list as FirstEntry and that double linked list must have\r | |
17f695ed | 1932 | been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r |
1933 | SecondEntry is returned after the nodes are swapped.\r | |
ac644614 | 1934 | \r |
1935 | If FirstEntry is NULL, then ASSERT().\r | |
1936 | If SecondEntry is NULL, then ASSERT().\r | |
1081f624 | 1937 | If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r |
1938 | same linked list, then ASSERT().\r | |
ac644614 | 1939 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r |
1940 | linked list containing the FirstEntry and SecondEntry nodes, including\r | |
1941 | the FirstEntry and SecondEntry nodes, is greater than or equal to\r | |
1942 | PcdMaximumLinkedListLength, then ASSERT().\r | |
1943 | \r | |
1944 | @param FirstEntry A pointer to a node in a linked list.\r | |
1945 | @param SecondEntry A pointer to another node in the same linked list.\r | |
38bbd3d9 | 1946 | \r |
9aa049d9 | 1947 | @return SecondEntry.\r |
ac644614 | 1948 | \r |
1949 | **/\r | |
1950 | LIST_ENTRY *\r | |
1951 | EFIAPI\r | |
1952 | SwapListEntries (\r | |
aa0583c7 | 1953 | IN OUT LIST_ENTRY *FirstEntry,\r |
1954 | IN OUT LIST_ENTRY *SecondEntry\r | |
ac644614 | 1955 | );\r |
1956 | \r | |
1957 | \r | |
1958 | /**\r | |
1959 | Removes a node from a doubly linked list, and returns the node that follows\r | |
1960 | the removed node.\r | |
1961 | \r | |
1962 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
1963 | this function to release the memory used by this node if that is required. On\r | |
1964 | exit, the node following Entry in the doubly linked list is returned. If\r | |
1965 | Entry is the only node in the linked list, then the head node of the linked\r | |
1966 | list is returned.\r | |
1967 | \r | |
1968 | If Entry is NULL, then ASSERT().\r | |
1969 | If Entry is the head node of an empty list, then ASSERT().\r | |
1970 | If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r | |
1971 | linked list containing Entry, including the Entry node, is greater than\r | |
1972 | or equal to PcdMaximumLinkedListLength, then ASSERT().\r | |
1973 | \r | |
9aa049d9 | 1974 | @param Entry A pointer to a node in a linked list.\r |
ac644614 | 1975 | \r |
9aa049d9 | 1976 | @return Entry.\r |
ac644614 | 1977 | \r |
1978 | **/\r | |
1979 | LIST_ENTRY *\r | |
1980 | EFIAPI\r | |
1981 | RemoveEntryList (\r | |
1982 | IN CONST LIST_ENTRY *Entry\r | |
1983 | );\r | |
1984 | \r | |
1985 | //\r | |
1986 | // Math Services\r | |
1987 | //\r | |
1988 | \r | |
1989 | /**\r | |
1990 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
1991 | with zeros. The shifted value is returned.\r | |
1992 | \r | |
1993 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
1994 | low Count bits are set to zero. The shifted value is returned.\r | |
1995 | \r | |
1996 | If Count is greater than 63, then ASSERT().\r | |
1997 | \r | |
1998 | @param Operand The 64-bit operand to shift left.\r | |
1999 | @param Count The number of bits to shift left.\r | |
2000 | \r | |
9aa049d9 | 2001 | @return Operand << Count.\r |
ac644614 | 2002 | \r |
2003 | **/\r | |
2004 | UINT64\r | |
2005 | EFIAPI\r | |
2006 | LShiftU64 (\r | |
2007 | IN UINT64 Operand,\r | |
2008 | IN UINTN Count\r | |
2009 | );\r | |
2010 | \r | |
2011 | \r | |
2012 | /**\r | |
2013 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
2014 | filled with zeros. The shifted value is returned.\r | |
2015 | \r | |
2016 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
2017 | high Count bits are set to zero. The shifted value is returned.\r | |
2018 | \r | |
2019 | If Count is greater than 63, then ASSERT().\r | |
2020 | \r | |
2021 | @param Operand The 64-bit operand to shift right.\r | |
2022 | @param Count The number of bits to shift right.\r | |
2023 | \r | |
2024 | @return Operand >> Count\r | |
2025 | \r | |
2026 | **/\r | |
2027 | UINT64\r | |
2028 | EFIAPI\r | |
2029 | RShiftU64 (\r | |
2030 | IN UINT64 Operand,\r | |
2031 | IN UINTN Count\r | |
2032 | );\r | |
2033 | \r | |
2034 | \r | |
2035 | /**\r | |
2036 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
2037 | with original integer's bit 63. The shifted value is returned.\r | |
2038 | \r | |
2039 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
2040 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
2041 | \r | |
2042 | If Count is greater than 63, then ASSERT().\r | |
2043 | \r | |
2044 | @param Operand The 64-bit operand to shift right.\r | |
2045 | @param Count The number of bits to shift right.\r | |
2046 | \r | |
2047 | @return Operand >> Count\r | |
2048 | \r | |
2049 | **/\r | |
2050 | UINT64\r | |
2051 | EFIAPI\r | |
2052 | ARShiftU64 (\r | |
2053 | IN UINT64 Operand,\r | |
2054 | IN UINTN Count\r | |
2055 | );\r | |
2056 | \r | |
2057 | \r | |
2058 | /**\r | |
2059 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
2060 | with the high bits that were rotated.\r | |
2061 | \r | |
2062 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
2063 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
2064 | value is returned.\r | |
2065 | \r | |
2066 | If Count is greater than 31, then ASSERT().\r | |
2067 | \r | |
2068 | @param Operand The 32-bit operand to rotate left.\r | |
2069 | @param Count The number of bits to rotate left.\r | |
2070 | \r | |
17f695ed | 2071 | @return Operand << Count\r |
ac644614 | 2072 | \r |
2073 | **/\r | |
2074 | UINT32\r | |
2075 | EFIAPI\r | |
2076 | LRotU32 (\r | |
2077 | IN UINT32 Operand,\r | |
2078 | IN UINTN Count\r | |
2079 | );\r | |
2080 | \r | |
2081 | \r | |
2082 | /**\r | |
2083 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
2084 | with the low bits that were rotated.\r | |
2085 | \r | |
2086 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
2087 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
2088 | value is returned.\r | |
2089 | \r | |
2090 | If Count is greater than 31, then ASSERT().\r | |
2091 | \r | |
2092 | @param Operand The 32-bit operand to rotate right.\r | |
2093 | @param Count The number of bits to rotate right.\r | |
2094 | \r | |
2fe241a2 | 2095 | @return Operand >> Count\r |
ac644614 | 2096 | \r |
2097 | **/\r | |
2098 | UINT32\r | |
2099 | EFIAPI\r | |
2100 | RRotU32 (\r | |
2101 | IN UINT32 Operand,\r | |
2102 | IN UINTN Count\r | |
2103 | );\r | |
2104 | \r | |
2105 | \r | |
2106 | /**\r | |
2107 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
2108 | with the high bits that were rotated.\r | |
2109 | \r | |
2110 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
2111 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
2112 | value is returned.\r | |
2113 | \r | |
2114 | If Count is greater than 63, then ASSERT().\r | |
2115 | \r | |
2116 | @param Operand The 64-bit operand to rotate left.\r | |
2117 | @param Count The number of bits to rotate left.\r | |
2118 | \r | |
17f695ed | 2119 | @return Operand << Count\r |
ac644614 | 2120 | \r |
2121 | **/\r | |
2122 | UINT64\r | |
2123 | EFIAPI\r | |
2124 | LRotU64 (\r | |
2125 | IN UINT64 Operand,\r | |
2126 | IN UINTN Count\r | |
2127 | );\r | |
2128 | \r | |
2129 | \r | |
2130 | /**\r | |
2131 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
2132 | with the high low bits that were rotated.\r | |
2133 | \r | |
2134 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
2135 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
2136 | value is returned.\r | |
2137 | \r | |
2138 | If Count is greater than 63, then ASSERT().\r | |
2139 | \r | |
2140 | @param Operand The 64-bit operand to rotate right.\r | |
2141 | @param Count The number of bits to rotate right.\r | |
2142 | \r | |
17f695ed | 2143 | @return Operand >> Count\r |
ac644614 | 2144 | \r |
2145 | **/\r | |
2146 | UINT64\r | |
2147 | EFIAPI\r | |
2148 | RRotU64 (\r | |
2149 | IN UINT64 Operand,\r | |
2150 | IN UINTN Count\r | |
2151 | );\r | |
2152 | \r | |
2153 | \r | |
2154 | /**\r | |
2155 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
2156 | \r | |
2157 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
2158 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2159 | Otherwise, a value between 0 and 31 is returned.\r | |
2160 | \r | |
2161 | @param Operand The 32-bit operand to evaluate.\r | |
2162 | \r | |
9aa049d9 | 2163 | @retval 0..31 The lowest bit set in Operand was found.\r |
17f695ed | 2164 | @retval -1 Operand is zero.\r |
ac644614 | 2165 | \r |
2166 | **/\r | |
2167 | INTN\r | |
2168 | EFIAPI\r | |
2169 | LowBitSet32 (\r | |
2170 | IN UINT32 Operand\r | |
2171 | );\r | |
2172 | \r | |
2173 | \r | |
2174 | /**\r | |
2175 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
2176 | \r | |
2177 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
2178 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2179 | Otherwise, a value between 0 and 63 is returned.\r | |
2180 | \r | |
2181 | @param Operand The 64-bit operand to evaluate.\r | |
2182 | \r | |
9aa049d9 | 2183 | @retval 0..63 The lowest bit set in Operand was found.\r |
17f695ed | 2184 | @retval -1 Operand is zero.\r |
2185 | \r | |
ac644614 | 2186 | \r |
2187 | **/\r | |
2188 | INTN\r | |
2189 | EFIAPI\r | |
2190 | LowBitSet64 (\r | |
2191 | IN UINT64 Operand\r | |
2192 | );\r | |
2193 | \r | |
2194 | \r | |
2195 | /**\r | |
2196 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
2197 | to log2(x).\r | |
2198 | \r | |
2199 | This function computes the bit position of the highest bit set in the 32-bit\r | |
2200 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2201 | Otherwise, a value between 0 and 31 is returned.\r | |
2202 | \r | |
2203 | @param Operand The 32-bit operand to evaluate.\r | |
2204 | \r | |
9aa049d9 | 2205 | @retval 0..31 Position of the highest bit set in Operand if found.\r |
17f695ed | 2206 | @retval -1 Operand is zero.\r |
ac644614 | 2207 | \r |
2208 | **/\r | |
2209 | INTN\r | |
2210 | EFIAPI\r | |
2211 | HighBitSet32 (\r | |
2212 | IN UINT32 Operand\r | |
2213 | );\r | |
2214 | \r | |
2215 | \r | |
2216 | /**\r | |
2217 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
2218 | to log2(x).\r | |
2219 | \r | |
2220 | This function computes the bit position of the highest bit set in the 64-bit\r | |
2221 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
2222 | Otherwise, a value between 0 and 63 is returned.\r | |
2223 | \r | |
2224 | @param Operand The 64-bit operand to evaluate.\r | |
2225 | \r | |
9aa049d9 | 2226 | @retval 0..63 Position of the highest bit set in Operand if found.\r |
17f695ed | 2227 | @retval -1 Operand is zero.\r |
ac644614 | 2228 | \r |
2229 | **/\r | |
2230 | INTN\r | |
2231 | EFIAPI\r | |
2232 | HighBitSet64 (\r | |
2233 | IN UINT64 Operand\r | |
2234 | );\r | |
2235 | \r | |
2236 | \r | |
2237 | /**\r | |
2238 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
17f695ed | 2239 | 1 << log2(x).\r |
ac644614 | 2240 | \r |
2241 | This function computes the value of the highest bit set in the 32-bit value\r | |
2242 | specified by Operand. If Operand is zero, then zero is returned.\r | |
2243 | \r | |
2244 | @param Operand The 32-bit operand to evaluate.\r | |
2245 | \r | |
2246 | @return 1 << HighBitSet32(Operand)\r | |
2247 | @retval 0 Operand is zero.\r | |
2248 | \r | |
2249 | **/\r | |
2250 | UINT32\r | |
2251 | EFIAPI\r | |
2252 | GetPowerOfTwo32 (\r | |
2253 | IN UINT32 Operand\r | |
2254 | );\r | |
2255 | \r | |
2256 | \r | |
2257 | /**\r | |
2258 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
17f695ed | 2259 | 1 << log2(x).\r |
ac644614 | 2260 | \r |
2261 | This function computes the value of the highest bit set in the 64-bit value\r | |
2262 | specified by Operand. If Operand is zero, then zero is returned.\r | |
2263 | \r | |
2264 | @param Operand The 64-bit operand to evaluate.\r | |
2265 | \r | |
2266 | @return 1 << HighBitSet64(Operand)\r | |
2267 | @retval 0 Operand is zero.\r | |
2268 | \r | |
2269 | **/\r | |
2270 | UINT64\r | |
2271 | EFIAPI\r | |
2272 | GetPowerOfTwo64 (\r | |
2273 | IN UINT64 Operand\r | |
2274 | );\r | |
2275 | \r | |
2276 | \r | |
2277 | /**\r | |
af2dc6a7 | 2278 | Switches the endianness of a 16-bit integer.\r |
ac644614 | 2279 | \r |
2280 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
2281 | from little endian to big endian or vice versa. The byte swapped value is\r | |
2282 | returned.\r | |
2283 | \r | |
2a53dabf | 2284 | @param Value A 16-bit unsigned value.\r |
ac644614 | 2285 | \r |
efb23117 | 2286 | @return The byte swapped Value.\r |
ac644614 | 2287 | \r |
2288 | **/\r | |
2289 | UINT16\r | |
2290 | EFIAPI\r | |
2291 | SwapBytes16 (\r | |
2292 | IN UINT16 Value\r | |
2293 | );\r | |
2294 | \r | |
2295 | \r | |
2296 | /**\r | |
af2dc6a7 | 2297 | Switches the endianness of a 32-bit integer.\r |
ac644614 | 2298 | \r |
2299 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
2300 | from little endian to big endian or vice versa. The byte swapped value is\r | |
2301 | returned.\r | |
2302 | \r | |
2a53dabf | 2303 | @param Value A 32-bit unsigned value.\r |
ac644614 | 2304 | \r |
efb23117 | 2305 | @return The byte swapped Value.\r |
ac644614 | 2306 | \r |
2307 | **/\r | |
2308 | UINT32\r | |
2309 | EFIAPI\r | |
2310 | SwapBytes32 (\r | |
2311 | IN UINT32 Value\r | |
2312 | );\r | |
2313 | \r | |
2314 | \r | |
2315 | /**\r | |
af2dc6a7 | 2316 | Switches the endianness of a 64-bit integer.\r |
ac644614 | 2317 | \r |
2318 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
2319 | from little endian to big endian or vice versa. The byte swapped value is\r | |
2320 | returned.\r | |
2321 | \r | |
2a53dabf | 2322 | @param Value A 64-bit unsigned value.\r |
ac644614 | 2323 | \r |
efb23117 | 2324 | @return The byte swapped Value.\r |
ac644614 | 2325 | \r |
2326 | **/\r | |
2327 | UINT64\r | |
2328 | EFIAPI\r | |
2329 | SwapBytes64 (\r | |
2330 | IN UINT64 Value\r | |
2331 | );\r | |
2332 | \r | |
2333 | \r | |
2334 | /**\r | |
2335 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
2336 | generates a 64-bit unsigned result.\r | |
2337 | \r | |
2338 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
2339 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
2340 | bit unsigned result is returned.\r | |
2341 | \r | |
ac644614 | 2342 | @param Multiplicand A 64-bit unsigned value.\r |
2343 | @param Multiplier A 32-bit unsigned value.\r | |
2344 | \r | |
2345 | @return Multiplicand * Multiplier\r | |
2346 | \r | |
2347 | **/\r | |
2348 | UINT64\r | |
2349 | EFIAPI\r | |
2350 | MultU64x32 (\r | |
2351 | IN UINT64 Multiplicand,\r | |
2352 | IN UINT32 Multiplier\r | |
2353 | );\r | |
2354 | \r | |
2355 | \r | |
2356 | /**\r | |
2357 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
2358 | generates a 64-bit unsigned result.\r | |
2359 | \r | |
2360 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
2361 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
2362 | bit unsigned result is returned.\r | |
2363 | \r | |
ac644614 | 2364 | @param Multiplicand A 64-bit unsigned value.\r |
2365 | @param Multiplier A 64-bit unsigned value.\r | |
2366 | \r | |
af2dc6a7 | 2367 | @return Multiplicand * Multiplier.\r |
ac644614 | 2368 | \r |
2369 | **/\r | |
2370 | UINT64\r | |
2371 | EFIAPI\r | |
2372 | MultU64x64 (\r | |
2373 | IN UINT64 Multiplicand,\r | |
2374 | IN UINT64 Multiplier\r | |
2375 | );\r | |
2376 | \r | |
2377 | \r | |
2378 | /**\r | |
2379 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2380 | 64-bit signed result.\r | |
2381 | \r | |
2382 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
2383 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
2384 | signed result is returned.\r | |
2385 | \r | |
ac644614 | 2386 | @param Multiplicand A 64-bit signed value.\r |
2387 | @param Multiplier A 64-bit signed value.\r | |
2388 | \r | |
2389 | @return Multiplicand * Multiplier\r | |
2390 | \r | |
2391 | **/\r | |
2392 | INT64\r | |
2393 | EFIAPI\r | |
2394 | MultS64x64 (\r | |
2395 | IN INT64 Multiplicand,\r | |
2396 | IN INT64 Multiplier\r | |
2397 | );\r | |
2398 | \r | |
2399 | \r | |
2400 | /**\r | |
2401 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2402 | a 64-bit unsigned result.\r | |
2403 | \r | |
2404 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2405 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
2406 | function returns the 64-bit unsigned quotient.\r | |
2407 | \r | |
2408 | If Divisor is 0, then ASSERT().\r | |
2409 | \r | |
2410 | @param Dividend A 64-bit unsigned value.\r | |
2411 | @param Divisor A 32-bit unsigned value.\r | |
2412 | \r | |
af2dc6a7 | 2413 | @return Dividend / Divisor.\r |
ac644614 | 2414 | \r |
2415 | **/\r | |
2416 | UINT64\r | |
2417 | EFIAPI\r | |
2418 | DivU64x32 (\r | |
2419 | IN UINT64 Dividend,\r | |
2420 | IN UINT32 Divisor\r | |
2421 | );\r | |
2422 | \r | |
2423 | \r | |
2424 | /**\r | |
2425 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2426 | a 32-bit unsigned remainder.\r | |
2427 | \r | |
2428 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2429 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
2430 | returns the 32-bit unsigned remainder.\r | |
2431 | \r | |
2432 | If Divisor is 0, then ASSERT().\r | |
2433 | \r | |
2434 | @param Dividend A 64-bit unsigned value.\r | |
2435 | @param Divisor A 32-bit unsigned value.\r | |
2436 | \r | |
af2dc6a7 | 2437 | @return Dividend % Divisor.\r |
ac644614 | 2438 | \r |
2439 | **/\r | |
2440 | UINT32\r | |
2441 | EFIAPI\r | |
2442 | ModU64x32 (\r | |
2443 | IN UINT64 Dividend,\r | |
2444 | IN UINT32 Divisor\r | |
2445 | );\r | |
2446 | \r | |
2447 | \r | |
2448 | /**\r | |
2449 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
2450 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
2451 | \r | |
2452 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
2453 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2454 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
2455 | This function returns the 64-bit unsigned quotient.\r | |
2456 | \r | |
2457 | If Divisor is 0, then ASSERT().\r | |
2458 | \r | |
2459 | @param Dividend A 64-bit unsigned value.\r | |
2460 | @param Divisor A 32-bit unsigned value.\r | |
2461 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
2462 | optional and may be NULL.\r | |
2463 | \r | |
af2dc6a7 | 2464 | @return Dividend / Divisor.\r |
ac644614 | 2465 | \r |
2466 | **/\r | |
2467 | UINT64\r | |
2468 | EFIAPI\r | |
2469 | DivU64x32Remainder (\r | |
2470 | IN UINT64 Dividend,\r | |
2471 | IN UINT32 Divisor,\r | |
2472 | OUT UINT32 *Remainder OPTIONAL\r | |
2473 | );\r | |
2474 | \r | |
2475 | \r | |
2476 | /**\r | |
2477 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
2478 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
2479 | \r | |
2480 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
2481 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
2482 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
2483 | This function returns the 64-bit unsigned quotient.\r | |
2484 | \r | |
2485 | If Divisor is 0, then ASSERT().\r | |
2486 | \r | |
2487 | @param Dividend A 64-bit unsigned value.\r | |
2488 | @param Divisor A 64-bit unsigned value.\r | |
2489 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
2490 | optional and may be NULL.\r | |
2491 | \r | |
af2dc6a7 | 2492 | @return Dividend / Divisor.\r |
ac644614 | 2493 | \r |
2494 | **/\r | |
2495 | UINT64\r | |
2496 | EFIAPI\r | |
2497 | DivU64x64Remainder (\r | |
2498 | IN UINT64 Dividend,\r | |
2499 | IN UINT64 Divisor,\r | |
2500 | OUT UINT64 *Remainder OPTIONAL\r | |
2501 | );\r | |
2502 | \r | |
2503 | \r | |
2504 | /**\r | |
2505 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
2506 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
2507 | \r | |
2508 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
2509 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
2510 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
2511 | function returns the 64-bit signed quotient.\r | |
2512 | \r | |
9aa049d9 | 2513 | It is the caller's responsibility to not call this function with a Divisor of 0.\r |
17f695ed | 2514 | If Divisor is 0, then the quotient and remainder should be assumed to be \r |
2515 | the largest negative integer.\r | |
2516 | \r | |
ac644614 | 2517 | If Divisor is 0, then ASSERT().\r |
2518 | \r | |
2519 | @param Dividend A 64-bit signed value.\r | |
2520 | @param Divisor A 64-bit signed value.\r | |
2521 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
2522 | optional and may be NULL.\r | |
2523 | \r | |
af2dc6a7 | 2524 | @return Dividend / Divisor.\r |
ac644614 | 2525 | \r |
2526 | **/\r | |
2527 | INT64\r | |
2528 | EFIAPI\r | |
2529 | DivS64x64Remainder (\r | |
2530 | IN INT64 Dividend,\r | |
2531 | IN INT64 Divisor,\r | |
2532 | OUT INT64 *Remainder OPTIONAL\r | |
2533 | );\r | |
2534 | \r | |
2535 | \r | |
2536 | /**\r | |
2537 | Reads a 16-bit value from memory that may be unaligned.\r | |
2538 | \r | |
2539 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
2540 | guarantees that the read operation does not produce an alignment fault.\r | |
2541 | \r | |
2542 | If the Buffer is NULL, then ASSERT().\r | |
2543 | \r | |
af2dc6a7 | 2544 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2545 | \r |
5385a579 | 2546 | @return The 16-bit value read from Buffer.\r |
ac644614 | 2547 | \r |
2548 | **/\r | |
2549 | UINT16\r | |
2550 | EFIAPI\r | |
2551 | ReadUnaligned16 (\r | |
5385a579 | 2552 | IN CONST UINT16 *Buffer\r |
ac644614 | 2553 | );\r |
2554 | \r | |
2555 | \r | |
2556 | /**\r | |
2557 | Writes a 16-bit value to memory that may be unaligned.\r | |
2558 | \r | |
2559 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
2560 | returned. The function guarantees that the write operation does not produce\r | |
2561 | an alignment fault.\r | |
2562 | \r | |
2563 | If the Buffer is NULL, then ASSERT().\r | |
2564 | \r | |
af2dc6a7 | 2565 | @param Buffer The pointer to a 16-bit value that may be unaligned.\r |
ac644614 | 2566 | @param Value 16-bit value to write to Buffer.\r |
2567 | \r | |
5385a579 | 2568 | @return The 16-bit value to write to Buffer.\r |
ac644614 | 2569 | \r |
2570 | **/\r | |
2571 | UINT16\r | |
2572 | EFIAPI\r | |
2573 | WriteUnaligned16 (\r | |
5385a579 | 2574 | OUT UINT16 *Buffer,\r |
2575 | IN UINT16 Value\r | |
ac644614 | 2576 | );\r |
2577 | \r | |
2578 | \r | |
2579 | /**\r | |
2580 | Reads a 24-bit value from memory that may be unaligned.\r | |
2581 | \r | |
2582 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
2583 | guarantees that the read operation does not produce an alignment fault.\r | |
2584 | \r | |
2585 | If the Buffer is NULL, then ASSERT().\r | |
2586 | \r | |
af2dc6a7 | 2587 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2588 | \r |
5385a579 | 2589 | @return The 24-bit value read from Buffer.\r |
ac644614 | 2590 | \r |
2591 | **/\r | |
2592 | UINT32\r | |
2593 | EFIAPI\r | |
2594 | ReadUnaligned24 (\r | |
5385a579 | 2595 | IN CONST UINT32 *Buffer\r |
ac644614 | 2596 | );\r |
2597 | \r | |
2598 | \r | |
2599 | /**\r | |
2600 | Writes a 24-bit value to memory that may be unaligned.\r | |
2601 | \r | |
2602 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
2603 | returned. The function guarantees that the write operation does not produce\r | |
2604 | an alignment fault.\r | |
2605 | \r | |
2606 | If the Buffer is NULL, then ASSERT().\r | |
2607 | \r | |
af2dc6a7 | 2608 | @param Buffer The pointer to a 24-bit value that may be unaligned.\r |
ac644614 | 2609 | @param Value 24-bit value to write to Buffer.\r |
2610 | \r | |
5385a579 | 2611 | @return The 24-bit value to write to Buffer.\r |
ac644614 | 2612 | \r |
2613 | **/\r | |
2614 | UINT32\r | |
2615 | EFIAPI\r | |
2616 | WriteUnaligned24 (\r | |
5385a579 | 2617 | OUT UINT32 *Buffer,\r |
2618 | IN UINT32 Value\r | |
ac644614 | 2619 | );\r |
2620 | \r | |
2621 | \r | |
2622 | /**\r | |
2623 | Reads a 32-bit value from memory that may be unaligned.\r | |
2624 | \r | |
2625 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
2626 | guarantees that the read operation does not produce an alignment fault.\r | |
2627 | \r | |
2628 | If the Buffer is NULL, then ASSERT().\r | |
2629 | \r | |
af2dc6a7 | 2630 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2631 | \r |
5385a579 | 2632 | @return The 32-bit value read from Buffer.\r |
ac644614 | 2633 | \r |
2634 | **/\r | |
2635 | UINT32\r | |
2636 | EFIAPI\r | |
2637 | ReadUnaligned32 (\r | |
5385a579 | 2638 | IN CONST UINT32 *Buffer\r |
ac644614 | 2639 | );\r |
2640 | \r | |
2641 | \r | |
2642 | /**\r | |
2643 | Writes a 32-bit value to memory that may be unaligned.\r | |
2644 | \r | |
2645 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
2646 | returned. The function guarantees that the write operation does not produce\r | |
2647 | an alignment fault.\r | |
2648 | \r | |
2649 | If the Buffer is NULL, then ASSERT().\r | |
2650 | \r | |
af2dc6a7 | 2651 | @param Buffer The pointer to a 32-bit value that may be unaligned.\r |
ac644614 | 2652 | @param Value 32-bit value to write to Buffer.\r |
2653 | \r | |
5385a579 | 2654 | @return The 32-bit value to write to Buffer.\r |
ac644614 | 2655 | \r |
2656 | **/\r | |
2657 | UINT32\r | |
2658 | EFIAPI\r | |
2659 | WriteUnaligned32 (\r | |
5385a579 | 2660 | OUT UINT32 *Buffer,\r |
2661 | IN UINT32 Value\r | |
ac644614 | 2662 | );\r |
2663 | \r | |
2664 | \r | |
2665 | /**\r | |
2666 | Reads a 64-bit value from memory that may be unaligned.\r | |
2667 | \r | |
2668 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
2669 | guarantees that the read operation does not produce an alignment fault.\r | |
2670 | \r | |
2671 | If the Buffer is NULL, then ASSERT().\r | |
2672 | \r | |
af2dc6a7 | 2673 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2674 | \r |
5385a579 | 2675 | @return The 64-bit value read from Buffer.\r |
ac644614 | 2676 | \r |
2677 | **/\r | |
2678 | UINT64\r | |
2679 | EFIAPI\r | |
2680 | ReadUnaligned64 (\r | |
5385a579 | 2681 | IN CONST UINT64 *Buffer\r |
ac644614 | 2682 | );\r |
2683 | \r | |
2684 | \r | |
2685 | /**\r | |
2686 | Writes a 64-bit value to memory that may be unaligned.\r | |
2687 | \r | |
2688 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
2689 | returned. The function guarantees that the write operation does not produce\r | |
2690 | an alignment fault.\r | |
2691 | \r | |
2692 | If the Buffer is NULL, then ASSERT().\r | |
2693 | \r | |
af2dc6a7 | 2694 | @param Buffer The pointer to a 64-bit value that may be unaligned.\r |
ac644614 | 2695 | @param Value 64-bit value to write to Buffer.\r |
2696 | \r | |
5385a579 | 2697 | @return The 64-bit value to write to Buffer.\r |
ac644614 | 2698 | \r |
2699 | **/\r | |
2700 | UINT64\r | |
2701 | EFIAPI\r | |
2702 | WriteUnaligned64 (\r | |
5385a579 | 2703 | OUT UINT64 *Buffer,\r |
2704 | IN UINT64 Value\r | |
ac644614 | 2705 | );\r |
2706 | \r | |
2707 | \r | |
2708 | //\r | |
2709 | // Bit Field Functions\r | |
2710 | //\r | |
2711 | \r | |
2712 | /**\r | |
2713 | Returns a bit field from an 8-bit value.\r | |
2714 | \r | |
2715 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2716 | \r | |
2717 | If 8-bit operations are not supported, then ASSERT().\r | |
2718 | If StartBit is greater than 7, then ASSERT().\r | |
2719 | If EndBit is greater than 7, then ASSERT().\r | |
2720 | If EndBit is less than StartBit, then ASSERT().\r | |
2721 | \r | |
2722 | @param Operand Operand on which to perform the bitfield operation.\r | |
2723 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2724 | Range 0..7.\r | |
2725 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2726 | Range 0..7.\r | |
2727 | \r | |
2728 | @return The bit field read.\r | |
2729 | \r | |
2730 | **/\r | |
2731 | UINT8\r | |
2732 | EFIAPI\r | |
2733 | BitFieldRead8 (\r | |
2734 | IN UINT8 Operand,\r | |
2735 | IN UINTN StartBit,\r | |
2736 | IN UINTN EndBit\r | |
2737 | );\r | |
2738 | \r | |
2739 | \r | |
2740 | /**\r | |
2741 | Writes a bit field to an 8-bit value, and returns the result.\r | |
2742 | \r | |
2743 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2744 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
2745 | returned.\r | |
2746 | \r | |
2747 | If 8-bit operations are not supported, then ASSERT().\r | |
2748 | If StartBit is greater than 7, then ASSERT().\r | |
2749 | If EndBit is greater than 7, then ASSERT().\r | |
2750 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2751 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2752 | \r |
2753 | @param Operand Operand on which to perform the bitfield operation.\r | |
2754 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2755 | Range 0..7.\r | |
2756 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2757 | Range 0..7.\r | |
2758 | @param Value New value of the bit field.\r | |
2759 | \r | |
2760 | @return The new 8-bit value.\r | |
2761 | \r | |
2762 | **/\r | |
2763 | UINT8\r | |
2764 | EFIAPI\r | |
2765 | BitFieldWrite8 (\r | |
2766 | IN UINT8 Operand,\r | |
2767 | IN UINTN StartBit,\r | |
2768 | IN UINTN EndBit,\r | |
2769 | IN UINT8 Value\r | |
2770 | );\r | |
2771 | \r | |
2772 | \r | |
2773 | /**\r | |
2774 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
2775 | result.\r | |
2776 | \r | |
62991af2 | 2777 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2778 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2779 | Operand are preserved. The new 8-bit value is returned.\r | |
2780 | \r | |
2781 | If 8-bit operations are not supported, then ASSERT().\r | |
2782 | If StartBit is greater than 7, then ASSERT().\r | |
2783 | If EndBit is greater than 7, then ASSERT().\r | |
2784 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2785 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2786 | \r |
2787 | @param Operand Operand on which to perform the bitfield operation.\r | |
2788 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2789 | Range 0..7.\r | |
2790 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2791 | Range 0..7.\r | |
2792 | @param OrData The value to OR with the read value from the value\r | |
2793 | \r | |
2794 | @return The new 8-bit value.\r | |
2795 | \r | |
2796 | **/\r | |
2797 | UINT8\r | |
2798 | EFIAPI\r | |
2799 | BitFieldOr8 (\r | |
2800 | IN UINT8 Operand,\r | |
2801 | IN UINTN StartBit,\r | |
2802 | IN UINTN EndBit,\r | |
2803 | IN UINT8 OrData\r | |
2804 | );\r | |
2805 | \r | |
2806 | \r | |
2807 | /**\r | |
2808 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
2809 | the result.\r | |
2810 | \r | |
2811 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2812 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2813 | preserved. The new 8-bit value is returned.\r | |
2814 | \r | |
2815 | If 8-bit operations are not supported, then ASSERT().\r | |
2816 | If StartBit is greater than 7, then ASSERT().\r | |
2817 | If EndBit is greater than 7, then ASSERT().\r | |
2818 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2819 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2820 | \r |
2821 | @param Operand Operand on which to perform the bitfield operation.\r | |
2822 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2823 | Range 0..7.\r | |
2824 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2825 | Range 0..7.\r | |
2826 | @param AndData The value to AND with the read value from the value.\r | |
2827 | \r | |
2828 | @return The new 8-bit value.\r | |
2829 | \r | |
2830 | **/\r | |
2831 | UINT8\r | |
2832 | EFIAPI\r | |
2833 | BitFieldAnd8 (\r | |
2834 | IN UINT8 Operand,\r | |
2835 | IN UINTN StartBit,\r | |
2836 | IN UINTN EndBit,\r | |
2837 | IN UINT8 AndData\r | |
2838 | );\r | |
2839 | \r | |
2840 | \r | |
2841 | /**\r | |
2842 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
2843 | bitwise OR, and returns the result.\r | |
2844 | \r | |
2845 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 2846 | in Operand and the value specified by AndData, followed by a bitwise \r |
2847 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 2848 | preserved. The new 8-bit value is returned.\r |
2849 | \r | |
2850 | If 8-bit operations are not supported, then ASSERT().\r | |
2851 | If StartBit is greater than 7, then ASSERT().\r | |
2852 | If EndBit is greater than 7, then ASSERT().\r | |
2853 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
2854 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
2855 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 2856 | \r |
2857 | @param Operand Operand on which to perform the bitfield operation.\r | |
2858 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2859 | Range 0..7.\r | |
2860 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2861 | Range 0..7.\r | |
2862 | @param AndData The value to AND with the read value from the value.\r | |
2863 | @param OrData The value to OR with the result of the AND operation.\r | |
2864 | \r | |
2865 | @return The new 8-bit value.\r | |
2866 | \r | |
2867 | **/\r | |
2868 | UINT8\r | |
2869 | EFIAPI\r | |
2870 | BitFieldAndThenOr8 (\r | |
2871 | IN UINT8 Operand,\r | |
2872 | IN UINTN StartBit,\r | |
2873 | IN UINTN EndBit,\r | |
2874 | IN UINT8 AndData,\r | |
2875 | IN UINT8 OrData\r | |
2876 | );\r | |
2877 | \r | |
2878 | \r | |
2879 | /**\r | |
2880 | Returns a bit field from a 16-bit value.\r | |
2881 | \r | |
2882 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2883 | \r | |
2884 | If 16-bit operations are not supported, then ASSERT().\r | |
2885 | If StartBit is greater than 15, then ASSERT().\r | |
2886 | If EndBit is greater than 15, then ASSERT().\r | |
2887 | If EndBit is less than StartBit, then ASSERT().\r | |
2888 | \r | |
2889 | @param Operand Operand on which to perform the bitfield operation.\r | |
2890 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2891 | Range 0..15.\r | |
2892 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2893 | Range 0..15.\r | |
2894 | \r | |
2895 | @return The bit field read.\r | |
2896 | \r | |
2897 | **/\r | |
2898 | UINT16\r | |
2899 | EFIAPI\r | |
2900 | BitFieldRead16 (\r | |
2901 | IN UINT16 Operand,\r | |
2902 | IN UINTN StartBit,\r | |
2903 | IN UINTN EndBit\r | |
2904 | );\r | |
2905 | \r | |
2906 | \r | |
2907 | /**\r | |
2908 | Writes a bit field to a 16-bit value, and returns the result.\r | |
2909 | \r | |
2910 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2911 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
2912 | returned.\r | |
2913 | \r | |
2914 | If 16-bit operations are not supported, then ASSERT().\r | |
2915 | If StartBit is greater than 15, then ASSERT().\r | |
2916 | If EndBit is greater than 15, then ASSERT().\r | |
2917 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2918 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2919 | \r |
2920 | @param Operand Operand on which to perform the bitfield operation.\r | |
2921 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2922 | Range 0..15.\r | |
2923 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2924 | Range 0..15.\r | |
2925 | @param Value New value of the bit field.\r | |
2926 | \r | |
2927 | @return The new 16-bit value.\r | |
2928 | \r | |
2929 | **/\r | |
2930 | UINT16\r | |
2931 | EFIAPI\r | |
2932 | BitFieldWrite16 (\r | |
2933 | IN UINT16 Operand,\r | |
2934 | IN UINTN StartBit,\r | |
2935 | IN UINTN EndBit,\r | |
2936 | IN UINT16 Value\r | |
2937 | );\r | |
2938 | \r | |
2939 | \r | |
2940 | /**\r | |
2941 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
2942 | result.\r | |
2943 | \r | |
62991af2 | 2944 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 2945 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
2946 | Operand are preserved. The new 16-bit value is returned.\r | |
2947 | \r | |
2948 | If 16-bit operations are not supported, then ASSERT().\r | |
2949 | If StartBit is greater than 15, then ASSERT().\r | |
2950 | If EndBit is greater than 15, then ASSERT().\r | |
2951 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2952 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2953 | \r |
2954 | @param Operand Operand on which to perform the bitfield operation.\r | |
2955 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2956 | Range 0..15.\r | |
2957 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2958 | Range 0..15.\r | |
2959 | @param OrData The value to OR with the read value from the value\r | |
2960 | \r | |
2961 | @return The new 16-bit value.\r | |
2962 | \r | |
2963 | **/\r | |
2964 | UINT16\r | |
2965 | EFIAPI\r | |
2966 | BitFieldOr16 (\r | |
2967 | IN UINT16 Operand,\r | |
2968 | IN UINTN StartBit,\r | |
2969 | IN UINTN EndBit,\r | |
2970 | IN UINT16 OrData\r | |
2971 | );\r | |
2972 | \r | |
2973 | \r | |
2974 | /**\r | |
2975 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
2976 | the result.\r | |
2977 | \r | |
2978 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2979 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2980 | preserved. The new 16-bit value is returned.\r | |
2981 | \r | |
2982 | If 16-bit operations are not supported, then ASSERT().\r | |
2983 | If StartBit is greater than 15, then ASSERT().\r | |
2984 | If EndBit is greater than 15, then ASSERT().\r | |
2985 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 2986 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 2987 | \r |
2988 | @param Operand Operand on which to perform the bitfield operation.\r | |
2989 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2990 | Range 0..15.\r | |
2991 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2992 | Range 0..15.\r | |
2993 | @param AndData The value to AND with the read value from the value\r | |
2994 | \r | |
2995 | @return The new 16-bit value.\r | |
2996 | \r | |
2997 | **/\r | |
2998 | UINT16\r | |
2999 | EFIAPI\r | |
3000 | BitFieldAnd16 (\r | |
3001 | IN UINT16 Operand,\r | |
3002 | IN UINTN StartBit,\r | |
3003 | IN UINTN EndBit,\r | |
3004 | IN UINT16 AndData\r | |
3005 | );\r | |
3006 | \r | |
3007 | \r | |
3008 | /**\r | |
3009 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
3010 | bitwise OR, and returns the result.\r | |
3011 | \r | |
3012 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 3013 | in Operand and the value specified by AndData, followed by a bitwise \r |
3014 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 3015 | preserved. The new 16-bit value is returned.\r |
3016 | \r | |
3017 | If 16-bit operations are not supported, then ASSERT().\r | |
3018 | If StartBit is greater than 15, then ASSERT().\r | |
3019 | If EndBit is greater than 15, then ASSERT().\r | |
3020 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
3021 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
3022 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 3023 | \r |
3024 | @param Operand Operand on which to perform the bitfield operation.\r | |
3025 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3026 | Range 0..15.\r | |
3027 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3028 | Range 0..15.\r | |
3029 | @param AndData The value to AND with the read value from the value.\r | |
3030 | @param OrData The value to OR with the result of the AND operation.\r | |
3031 | \r | |
3032 | @return The new 16-bit value.\r | |
3033 | \r | |
3034 | **/\r | |
3035 | UINT16\r | |
3036 | EFIAPI\r | |
3037 | BitFieldAndThenOr16 (\r | |
3038 | IN UINT16 Operand,\r | |
3039 | IN UINTN StartBit,\r | |
3040 | IN UINTN EndBit,\r | |
3041 | IN UINT16 AndData,\r | |
3042 | IN UINT16 OrData\r | |
3043 | );\r | |
3044 | \r | |
3045 | \r | |
3046 | /**\r | |
3047 | Returns a bit field from a 32-bit value.\r | |
3048 | \r | |
3049 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
3050 | \r | |
3051 | If 32-bit operations are not supported, then ASSERT().\r | |
3052 | If StartBit is greater than 31, then ASSERT().\r | |
3053 | If EndBit is greater than 31, then ASSERT().\r | |
3054 | If EndBit is less than StartBit, then ASSERT().\r | |
3055 | \r | |
3056 | @param Operand Operand on which to perform the bitfield operation.\r | |
3057 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3058 | Range 0..31.\r | |
3059 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3060 | Range 0..31.\r | |
3061 | \r | |
3062 | @return The bit field read.\r | |
3063 | \r | |
3064 | **/\r | |
3065 | UINT32\r | |
3066 | EFIAPI\r | |
3067 | BitFieldRead32 (\r | |
3068 | IN UINT32 Operand,\r | |
3069 | IN UINTN StartBit,\r | |
3070 | IN UINTN EndBit\r | |
3071 | );\r | |
3072 | \r | |
3073 | \r | |
3074 | /**\r | |
3075 | Writes a bit field to a 32-bit value, and returns the result.\r | |
3076 | \r | |
3077 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
3078 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
3079 | returned.\r | |
3080 | \r | |
3081 | If 32-bit operations are not supported, then ASSERT().\r | |
3082 | If StartBit is greater than 31, then ASSERT().\r | |
3083 | If EndBit is greater than 31, then ASSERT().\r | |
3084 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3085 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3086 | \r |
3087 | @param Operand Operand on which to perform the bitfield operation.\r | |
3088 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3089 | Range 0..31.\r | |
3090 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3091 | Range 0..31.\r | |
3092 | @param Value New value of the bit field.\r | |
3093 | \r | |
3094 | @return The new 32-bit value.\r | |
3095 | \r | |
3096 | **/\r | |
3097 | UINT32\r | |
3098 | EFIAPI\r | |
3099 | BitFieldWrite32 (\r | |
3100 | IN UINT32 Operand,\r | |
3101 | IN UINTN StartBit,\r | |
3102 | IN UINTN EndBit,\r | |
3103 | IN UINT32 Value\r | |
3104 | );\r | |
3105 | \r | |
3106 | \r | |
3107 | /**\r | |
3108 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
3109 | result.\r | |
3110 | \r | |
62991af2 | 3111 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 3112 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
3113 | Operand are preserved. The new 32-bit value is returned.\r | |
3114 | \r | |
3115 | If 32-bit operations are not supported, then ASSERT().\r | |
3116 | If StartBit is greater than 31, then ASSERT().\r | |
3117 | If EndBit is greater than 31, then ASSERT().\r | |
3118 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3119 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3120 | \r |
3121 | @param Operand Operand on which to perform the bitfield operation.\r | |
3122 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3123 | Range 0..31.\r | |
3124 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3125 | Range 0..31.\r | |
af2dc6a7 | 3126 | @param OrData The value to OR with the read value from the value.\r |
ac644614 | 3127 | \r |
3128 | @return The new 32-bit value.\r | |
3129 | \r | |
3130 | **/\r | |
3131 | UINT32\r | |
3132 | EFIAPI\r | |
3133 | BitFieldOr32 (\r | |
3134 | IN UINT32 Operand,\r | |
3135 | IN UINTN StartBit,\r | |
3136 | IN UINTN EndBit,\r | |
3137 | IN UINT32 OrData\r | |
3138 | );\r | |
3139 | \r | |
3140 | \r | |
3141 | /**\r | |
3142 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
3143 | the result.\r | |
3144 | \r | |
3145 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
3146 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
3147 | preserved. The new 32-bit value is returned.\r | |
3148 | \r | |
3149 | If 32-bit operations are not supported, then ASSERT().\r | |
3150 | If StartBit is greater than 31, then ASSERT().\r | |
3151 | If EndBit is greater than 31, then ASSERT().\r | |
3152 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3153 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3154 | \r |
3155 | @param Operand Operand on which to perform the bitfield operation.\r | |
3156 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3157 | Range 0..31.\r | |
3158 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3159 | Range 0..31.\r | |
3160 | @param AndData The value to AND with the read value from the value\r | |
3161 | \r | |
3162 | @return The new 32-bit value.\r | |
3163 | \r | |
3164 | **/\r | |
3165 | UINT32\r | |
3166 | EFIAPI\r | |
3167 | BitFieldAnd32 (\r | |
3168 | IN UINT32 Operand,\r | |
3169 | IN UINTN StartBit,\r | |
3170 | IN UINTN EndBit,\r | |
3171 | IN UINT32 AndData\r | |
3172 | );\r | |
3173 | \r | |
3174 | \r | |
3175 | /**\r | |
3176 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
3177 | bitwise OR, and returns the result.\r | |
3178 | \r | |
3179 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 3180 | in Operand and the value specified by AndData, followed by a bitwise \r |
3181 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 3182 | preserved. The new 32-bit value is returned.\r |
3183 | \r | |
3184 | If 32-bit operations are not supported, then ASSERT().\r | |
3185 | If StartBit is greater than 31, then ASSERT().\r | |
3186 | If EndBit is greater than 31, then ASSERT().\r | |
3187 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
3188 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
3189 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 3190 | \r |
3191 | @param Operand Operand on which to perform the bitfield operation.\r | |
3192 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3193 | Range 0..31.\r | |
3194 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3195 | Range 0..31.\r | |
3196 | @param AndData The value to AND with the read value from the value.\r | |
3197 | @param OrData The value to OR with the result of the AND operation.\r | |
3198 | \r | |
3199 | @return The new 32-bit value.\r | |
3200 | \r | |
3201 | **/\r | |
3202 | UINT32\r | |
3203 | EFIAPI\r | |
3204 | BitFieldAndThenOr32 (\r | |
3205 | IN UINT32 Operand,\r | |
3206 | IN UINTN StartBit,\r | |
3207 | IN UINTN EndBit,\r | |
3208 | IN UINT32 AndData,\r | |
3209 | IN UINT32 OrData\r | |
3210 | );\r | |
3211 | \r | |
3212 | \r | |
3213 | /**\r | |
3214 | Returns a bit field from a 64-bit value.\r | |
3215 | \r | |
3216 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
3217 | \r | |
3218 | If 64-bit operations are not supported, then ASSERT().\r | |
3219 | If StartBit is greater than 63, then ASSERT().\r | |
3220 | If EndBit is greater than 63, then ASSERT().\r | |
3221 | If EndBit is less than StartBit, then ASSERT().\r | |
3222 | \r | |
3223 | @param Operand Operand on which to perform the bitfield operation.\r | |
3224 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3225 | Range 0..63.\r | |
3226 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3227 | Range 0..63.\r | |
3228 | \r | |
3229 | @return The bit field read.\r | |
3230 | \r | |
3231 | **/\r | |
3232 | UINT64\r | |
3233 | EFIAPI\r | |
3234 | BitFieldRead64 (\r | |
3235 | IN UINT64 Operand,\r | |
3236 | IN UINTN StartBit,\r | |
3237 | IN UINTN EndBit\r | |
3238 | );\r | |
3239 | \r | |
3240 | \r | |
3241 | /**\r | |
3242 | Writes a bit field to a 64-bit value, and returns the result.\r | |
3243 | \r | |
3244 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
3245 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
3246 | returned.\r | |
3247 | \r | |
3248 | If 64-bit operations are not supported, then ASSERT().\r | |
3249 | If StartBit is greater than 63, then ASSERT().\r | |
3250 | If EndBit is greater than 63, then ASSERT().\r | |
3251 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3252 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3253 | \r |
3254 | @param Operand Operand on which to perform the bitfield operation.\r | |
3255 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3256 | Range 0..63.\r | |
3257 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3258 | Range 0..63.\r | |
3259 | @param Value New value of the bit field.\r | |
3260 | \r | |
3261 | @return The new 64-bit value.\r | |
3262 | \r | |
3263 | **/\r | |
3264 | UINT64\r | |
3265 | EFIAPI\r | |
3266 | BitFieldWrite64 (\r | |
3267 | IN UINT64 Operand,\r | |
3268 | IN UINTN StartBit,\r | |
3269 | IN UINTN EndBit,\r | |
3270 | IN UINT64 Value\r | |
3271 | );\r | |
3272 | \r | |
3273 | \r | |
3274 | /**\r | |
3275 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
3276 | result.\r | |
3277 | \r | |
62991af2 | 3278 | Performs a bitwise OR between the bit field specified by StartBit\r |
ac644614 | 3279 | and EndBit in Operand and the value specified by OrData. All other bits in\r |
3280 | Operand are preserved. The new 64-bit value is returned.\r | |
3281 | \r | |
3282 | If 64-bit operations are not supported, then ASSERT().\r | |
3283 | If StartBit is greater than 63, then ASSERT().\r | |
3284 | If EndBit is greater than 63, then ASSERT().\r | |
3285 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3286 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3287 | \r |
3288 | @param Operand Operand on which to perform the bitfield operation.\r | |
3289 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3290 | Range 0..63.\r | |
3291 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3292 | Range 0..63.\r | |
3293 | @param OrData The value to OR with the read value from the value\r | |
3294 | \r | |
3295 | @return The new 64-bit value.\r | |
3296 | \r | |
3297 | **/\r | |
3298 | UINT64\r | |
3299 | EFIAPI\r | |
3300 | BitFieldOr64 (\r | |
3301 | IN UINT64 Operand,\r | |
3302 | IN UINTN StartBit,\r | |
3303 | IN UINTN EndBit,\r | |
3304 | IN UINT64 OrData\r | |
3305 | );\r | |
3306 | \r | |
3307 | \r | |
3308 | /**\r | |
3309 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
3310 | the result.\r | |
3311 | \r | |
3312 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
3313 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
3314 | preserved. The new 64-bit value is returned.\r | |
3315 | \r | |
3316 | If 64-bit operations are not supported, then ASSERT().\r | |
3317 | If StartBit is greater than 63, then ASSERT().\r | |
3318 | If EndBit is greater than 63, then ASSERT().\r | |
3319 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 3320 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 3321 | \r |
3322 | @param Operand Operand on which to perform the bitfield operation.\r | |
3323 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3324 | Range 0..63.\r | |
3325 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3326 | Range 0..63.\r | |
3327 | @param AndData The value to AND with the read value from the value\r | |
3328 | \r | |
3329 | @return The new 64-bit value.\r | |
3330 | \r | |
3331 | **/\r | |
3332 | UINT64\r | |
3333 | EFIAPI\r | |
3334 | BitFieldAnd64 (\r | |
3335 | IN UINT64 Operand,\r | |
3336 | IN UINTN StartBit,\r | |
3337 | IN UINTN EndBit,\r | |
3338 | IN UINT64 AndData\r | |
3339 | );\r | |
3340 | \r | |
3341 | \r | |
3342 | /**\r | |
3343 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
3344 | bitwise OR, and returns the result.\r | |
3345 | \r | |
3346 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
62991af2 | 3347 | in Operand and the value specified by AndData, followed by a bitwise \r |
3348 | OR with value specified by OrData. All other bits in Operand are\r | |
ac644614 | 3349 | preserved. The new 64-bit value is returned.\r |
3350 | \r | |
3351 | If 64-bit operations are not supported, then ASSERT().\r | |
3352 | If StartBit is greater than 63, then ASSERT().\r | |
3353 | If EndBit is greater than 63, then ASSERT().\r | |
3354 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
3355 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
3356 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 3357 | \r |
3358 | @param Operand Operand on which to perform the bitfield operation.\r | |
3359 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3360 | Range 0..63.\r | |
3361 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3362 | Range 0..63.\r | |
3363 | @param AndData The value to AND with the read value from the value.\r | |
3364 | @param OrData The value to OR with the result of the AND operation.\r | |
3365 | \r | |
3366 | @return The new 64-bit value.\r | |
3367 | \r | |
3368 | **/\r | |
3369 | UINT64\r | |
3370 | EFIAPI\r | |
3371 | BitFieldAndThenOr64 (\r | |
3372 | IN UINT64 Operand,\r | |
3373 | IN UINTN StartBit,\r | |
3374 | IN UINTN EndBit,\r | |
3375 | IN UINT64 AndData,\r | |
3376 | IN UINT64 OrData\r | |
3377 | );\r | |
3378 | \r | |
ac644614 | 3379 | //\r |
3380 | // Base Library Checksum Functions\r | |
3381 | //\r | |
3382 | \r | |
3383 | /**\r | |
17f695ed | 3384 | Returns the sum of all elements in a buffer in unit of UINT8.\r |
ac644614 | 3385 | During calculation, the carry bits are dropped.\r |
3386 | \r | |
3387 | This function calculates the sum of all elements in a buffer\r | |
3388 | in unit of UINT8. The carry bits in result of addition are dropped.\r | |
3389 | The result is returned as UINT8. If Length is Zero, then Zero is\r | |
3390 | returned.\r | |
3391 | \r | |
3392 | If Buffer is NULL, then ASSERT().\r | |
3393 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3394 | \r | |
af2dc6a7 | 3395 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
17f695ed | 3396 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3397 | \r |
3398 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3399 | \r | |
3400 | **/\r | |
3401 | UINT8\r | |
3402 | EFIAPI\r | |
3403 | CalculateSum8 (\r | |
ee6c452c | 3404 | IN CONST UINT8 *Buffer,\r |
3405 | IN UINTN Length\r | |
ac644614 | 3406 | );\r |
3407 | \r | |
3408 | \r | |
3409 | /**\r | |
3410 | Returns the two's complement checksum of all elements in a buffer\r | |
3411 | of 8-bit values.\r | |
3412 | \r | |
3413 | This function first calculates the sum of the 8-bit values in the\r | |
3414 | buffer specified by Buffer and Length. The carry bits in the result\r | |
3415 | of addition are dropped. Then, the two's complement of the sum is\r | |
3416 | returned. If Length is 0, then 0 is returned.\r | |
3417 | \r | |
3418 | If Buffer is NULL, then ASSERT().\r | |
3419 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3420 | \r | |
af2dc6a7 | 3421 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3422 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3423 | \r |
af2dc6a7 | 3424 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3425 | \r |
3426 | **/\r | |
3427 | UINT8\r | |
3428 | EFIAPI\r | |
3429 | CalculateCheckSum8 (\r | |
ee6c452c | 3430 | IN CONST UINT8 *Buffer,\r |
3431 | IN UINTN Length\r | |
ac644614 | 3432 | );\r |
3433 | \r | |
3434 | \r | |
3435 | /**\r | |
3436 | Returns the sum of all elements in a buffer of 16-bit values. During\r | |
3437 | calculation, the carry bits are dropped.\r | |
3438 | \r | |
3439 | This function calculates the sum of the 16-bit values in the buffer\r | |
3440 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3441 | The 16-bit result is returned. If Length is 0, then 0 is returned.\r | |
3442 | \r | |
3443 | If Buffer is NULL, then ASSERT().\r | |
3444 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3445 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3446 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3447 | \r | |
af2dc6a7 | 3448 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3449 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3450 | \r |
3451 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3452 | \r | |
3453 | **/\r | |
3454 | UINT16\r | |
3455 | EFIAPI\r | |
3456 | CalculateSum16 (\r | |
ee6c452c | 3457 | IN CONST UINT16 *Buffer,\r |
3458 | IN UINTN Length\r | |
ac644614 | 3459 | );\r |
3460 | \r | |
3461 | \r | |
3462 | /**\r | |
3463 | Returns the two's complement checksum of all elements in a buffer of\r | |
3464 | 16-bit values.\r | |
3465 | \r | |
3466 | This function first calculates the sum of the 16-bit values in the buffer\r | |
3467 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3468 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3469 | is 0, then 0 is returned.\r | |
3470 | \r | |
3471 | If Buffer is NULL, then ASSERT().\r | |
3472 | If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r | |
3473 | If Length is not aligned on a 16-bit boundary, then ASSERT().\r | |
3474 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3475 | \r | |
af2dc6a7 | 3476 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3477 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3478 | \r |
af2dc6a7 | 3479 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3480 | \r |
3481 | **/\r | |
3482 | UINT16\r | |
3483 | EFIAPI\r | |
3484 | CalculateCheckSum16 (\r | |
ee6c452c | 3485 | IN CONST UINT16 *Buffer,\r |
3486 | IN UINTN Length\r | |
ac644614 | 3487 | );\r |
3488 | \r | |
3489 | \r | |
3490 | /**\r | |
17f695ed | 3491 | Returns the sum of all elements in a buffer of 32-bit values. During\r |
ac644614 | 3492 | calculation, the carry bits are dropped.\r |
3493 | \r | |
3494 | This function calculates the sum of the 32-bit values in the buffer\r | |
3495 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
17f695ed | 3496 | The 32-bit result is returned. If Length is 0, then 0 is returned.\r |
ac644614 | 3497 | \r |
3498 | If Buffer is NULL, then ASSERT().\r | |
3499 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3500 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3501 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3502 | \r | |
af2dc6a7 | 3503 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3504 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3505 | \r |
3506 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3507 | \r | |
3508 | **/\r | |
3509 | UINT32\r | |
3510 | EFIAPI\r | |
3511 | CalculateSum32 (\r | |
ee6c452c | 3512 | IN CONST UINT32 *Buffer,\r |
3513 | IN UINTN Length\r | |
ac644614 | 3514 | );\r |
3515 | \r | |
3516 | \r | |
3517 | /**\r | |
3518 | Returns the two's complement checksum of all elements in a buffer of\r | |
3519 | 32-bit values.\r | |
3520 | \r | |
3521 | This function first calculates the sum of the 32-bit values in the buffer\r | |
3522 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3523 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3524 | is 0, then 0 is returned.\r | |
3525 | \r | |
3526 | If Buffer is NULL, then ASSERT().\r | |
3527 | If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r | |
3528 | If Length is not aligned on a 32-bit boundary, then ASSERT().\r | |
3529 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3530 | \r | |
af2dc6a7 | 3531 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3532 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3533 | \r |
af2dc6a7 | 3534 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3535 | \r |
3536 | **/\r | |
3537 | UINT32\r | |
3538 | EFIAPI\r | |
3539 | CalculateCheckSum32 (\r | |
ee6c452c | 3540 | IN CONST UINT32 *Buffer,\r |
3541 | IN UINTN Length\r | |
ac644614 | 3542 | );\r |
3543 | \r | |
3544 | \r | |
3545 | /**\r | |
3546 | Returns the sum of all elements in a buffer of 64-bit values. During\r | |
3547 | calculation, the carry bits are dropped.\r | |
3548 | \r | |
3549 | This function calculates the sum of the 64-bit values in the buffer\r | |
3550 | specified by Buffer and Length. The carry bits in result of addition are dropped.\r | |
3551 | The 64-bit result is returned. If Length is 0, then 0 is returned.\r | |
3552 | \r | |
3553 | If Buffer is NULL, then ASSERT().\r | |
3554 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3555 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3556 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3557 | \r | |
af2dc6a7 | 3558 | @param Buffer The pointer to the buffer to carry out the sum operation.\r |
1106ffe1 | 3559 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3560 | \r |
3561 | @return Sum The sum of Buffer with carry bits dropped during additions.\r | |
3562 | \r | |
3563 | **/\r | |
3564 | UINT64\r | |
3565 | EFIAPI\r | |
3566 | CalculateSum64 (\r | |
ee6c452c | 3567 | IN CONST UINT64 *Buffer,\r |
3568 | IN UINTN Length\r | |
ac644614 | 3569 | );\r |
3570 | \r | |
3571 | \r | |
3572 | /**\r | |
3573 | Returns the two's complement checksum of all elements in a buffer of\r | |
3574 | 64-bit values.\r | |
3575 | \r | |
3576 | This function first calculates the sum of the 64-bit values in the buffer\r | |
3577 | specified by Buffer and Length. The carry bits in the result of addition\r | |
3578 | are dropped. Then, the two's complement of the sum is returned. If Length\r | |
3579 | is 0, then 0 is returned.\r | |
3580 | \r | |
3581 | If Buffer is NULL, then ASSERT().\r | |
3582 | If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r | |
3583 | If Length is not aligned on a 64-bit boundary, then ASSERT().\r | |
3584 | If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r | |
3585 | \r | |
af2dc6a7 | 3586 | @param Buffer The pointer to the buffer to carry out the checksum operation.\r |
1106ffe1 | 3587 | @param Length The size, in bytes, of Buffer.\r |
ac644614 | 3588 | \r |
af2dc6a7 | 3589 | @return Checksum The two's complement checksum of Buffer.\r |
ac644614 | 3590 | \r |
3591 | **/\r | |
3592 | UINT64\r | |
3593 | EFIAPI\r | |
3594 | CalculateCheckSum64 (\r | |
ee6c452c | 3595 | IN CONST UINT64 *Buffer,\r |
3596 | IN UINTN Length\r | |
ac644614 | 3597 | );\r |
3598 | \r | |
3599 | \r | |
d75f9fc2 | 3600 | //\r |
3601 | // Base Library CPU Functions\r | |
3602 | //\r | |
3603 | \r | |
3604 | /**\r | |
3605 | Function entry point used when a stack switch is requested with SwitchStack()\r | |
3606 | \r | |
3607 | @param Context1 Context1 parameter passed into SwitchStack().\r | |
3608 | @param Context2 Context2 parameter passed into SwitchStack().\r | |
3609 | \r | |
3610 | **/\r | |
ac644614 | 3611 | typedef\r |
3612 | VOID\r | |
9810cdd8 | 3613 | (EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r |
ac644614 | 3614 | IN VOID *Context1, OPTIONAL\r |
3615 | IN VOID *Context2 OPTIONAL\r | |
3616 | );\r | |
3617 | \r | |
3618 | \r | |
3619 | /**\r | |
3620 | Used to serialize load and store operations.\r | |
3621 | \r | |
3622 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
3623 | globally visible when this function returns.\r | |
3624 | \r | |
3625 | **/\r | |
3626 | VOID\r | |
3627 | EFIAPI\r | |
3628 | MemoryFence (\r | |
3629 | VOID\r | |
3630 | );\r | |
3631 | \r | |
3632 | \r | |
3633 | /**\r | |
3634 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
3635 | and returns 0.\r | |
3636 | \r | |
3637 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
3638 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
3639 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
3640 | \r | |
3641 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3642 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
17f695ed | 3643 | \r |
3644 | NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r | |
3645 | The same structure must never be used for more than one CPU architecture context.\r | |
3646 | For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r | |
3647 | SetJump()/LongJump() is not currently supported for the EBC processor type. \r | |
ac644614 | 3648 | \r |
3649 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3650 | \r | |
3651 | @retval 0 Indicates a return from SetJump().\r | |
3652 | \r | |
3653 | **/\r | |
3654 | UINTN\r | |
3655 | EFIAPI\r | |
3656 | SetJump (\r | |
3657 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
3658 | );\r | |
3659 | \r | |
3660 | \r | |
3661 | /**\r | |
3662 | Restores the CPU context that was saved with SetJump().\r | |
3663 | \r | |
3664 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
3665 | function never returns to the caller. Instead is resumes execution based on\r | |
3666 | the state of JumpBuffer.\r | |
3667 | \r | |
3668 | If JumpBuffer is NULL, then ASSERT().\r | |
1a2f870c | 3669 | For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r |
ac644614 | 3670 | If Value is 0, then ASSERT().\r |
3671 | \r | |
3672 | @param JumpBuffer A pointer to CPU context buffer.\r | |
3673 | @param Value The value to return when the SetJump() context is\r | |
3674 | restored and must be non-zero.\r | |
3675 | \r | |
3676 | **/\r | |
3677 | VOID\r | |
3678 | EFIAPI\r | |
3679 | LongJump (\r | |
3680 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
3681 | IN UINTN Value\r | |
3682 | );\r | |
3683 | \r | |
3684 | \r | |
3685 | /**\r | |
3686 | Enables CPU interrupts.\r | |
3687 | \r | |
ac644614 | 3688 | **/\r |
3689 | VOID\r | |
3690 | EFIAPI\r | |
3691 | EnableInterrupts (\r | |
3692 | VOID\r | |
3693 | );\r | |
3694 | \r | |
3695 | \r | |
3696 | /**\r | |
3697 | Disables CPU interrupts.\r | |
3698 | \r | |
ac644614 | 3699 | **/\r |
3700 | VOID\r | |
3701 | EFIAPI\r | |
3702 | DisableInterrupts (\r | |
3703 | VOID\r | |
3704 | );\r | |
3705 | \r | |
3706 | \r | |
3707 | /**\r | |
3708 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
3709 | operation.\r | |
3710 | \r | |
ac644614 | 3711 | @retval TRUE CPU interrupts were enabled on entry to this call.\r |
3712 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
3713 | \r | |
3714 | **/\r | |
3715 | BOOLEAN\r | |
3716 | EFIAPI\r | |
3717 | SaveAndDisableInterrupts (\r | |
3718 | VOID\r | |
3719 | );\r | |
3720 | \r | |
3721 | \r | |
3722 | /**\r | |
3723 | Enables CPU interrupts for the smallest window required to capture any\r | |
3724 | pending interrupts.\r | |
3725 | \r | |
ac644614 | 3726 | **/\r |
3727 | VOID\r | |
3728 | EFIAPI\r | |
3729 | EnableDisableInterrupts (\r | |
3730 | VOID\r | |
3731 | );\r | |
3732 | \r | |
3733 | \r | |
3734 | /**\r | |
3735 | Retrieves the current CPU interrupt state.\r | |
3736 | \r | |
af2dc6a7 | 3737 | Returns TRUE if interrupts are currently enabled. Otherwise\r |
38bbd3d9 | 3738 | returns FALSE.\r |
ac644614 | 3739 | \r |
3740 | @retval TRUE CPU interrupts are enabled.\r | |
3741 | @retval FALSE CPU interrupts are disabled.\r | |
3742 | \r | |
3743 | **/\r | |
3744 | BOOLEAN\r | |
3745 | EFIAPI\r | |
3746 | GetInterruptState (\r | |
3747 | VOID\r | |
3748 | );\r | |
3749 | \r | |
3750 | \r | |
3751 | /**\r | |
3752 | Set the current CPU interrupt state.\r | |
3753 | \r | |
3754 | Sets the current CPU interrupt state to the state specified by\r | |
3755 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
3756 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
3757 | returned.\r | |
3758 | \r | |
3759 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
3760 | interrupts should be disabled.\r | |
3761 | \r | |
3762 | @return InterruptState\r | |
3763 | \r | |
3764 | **/\r | |
3765 | BOOLEAN\r | |
3766 | EFIAPI\r | |
3767 | SetInterruptState (\r | |
3768 | IN BOOLEAN InterruptState\r | |
3769 | );\r | |
3770 | \r | |
3771 | \r | |
3772 | /**\r | |
3773 | Requests CPU to pause for a short period of time.\r | |
3774 | \r | |
3775 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
3776 | systems to prevent memory starvation while waiting for a spin lock.\r | |
3777 | \r | |
3778 | **/\r | |
3779 | VOID\r | |
3780 | EFIAPI\r | |
3781 | CpuPause (\r | |
3782 | VOID\r | |
3783 | );\r | |
3784 | \r | |
3785 | \r | |
3786 | /**\r | |
3787 | Transfers control to a function starting with a new stack.\r | |
3788 | \r | |
3789 | Transfers control to the function specified by EntryPoint using the\r | |
3790 | new stack specified by NewStack and passing in the parameters specified\r | |
3791 | by Context1 and Context2. Context1 and Context2 are optional and may\r | |
3792 | be NULL. The function EntryPoint must never return. This function\r | |
3793 | supports a variable number of arguments following the NewStack parameter.\r | |
1a2f870c | 3794 | These additional arguments are ignored on IA-32, x64, and EBC architectures.\r |
3795 | Itanium processors expect one additional parameter of type VOID * that specifies\r | |
ac644614 | 3796 | the new backing store pointer.\r |
3797 | \r | |
3798 | If EntryPoint is NULL, then ASSERT().\r | |
3799 | If NewStack is NULL, then ASSERT().\r | |
3800 | \r | |
3801 | @param EntryPoint A pointer to function to call with the new stack.\r | |
3802 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
3803 | function.\r | |
3804 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
3805 | function.\r | |
3806 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
3807 | function.\r | |
af2dc6a7 | 3808 | @param ... This variable argument list is ignored for IA-32, x64, and \r |
3809 | EBC architectures. For Itanium processors, this variable \r | |
3810 | argument list is expected to contain a single parameter of \r | |
3811 | type VOID * that specifies the new backing store pointer.\r | |
42eedea9 | 3812 | \r |
ac644614 | 3813 | \r |
3814 | **/\r | |
3815 | VOID\r | |
3816 | EFIAPI\r | |
3817 | SwitchStack (\r | |
3818 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
3819 | IN VOID *Context1, OPTIONAL\r | |
3820 | IN VOID *Context2, OPTIONAL\r | |
3821 | IN VOID *NewStack,\r | |
3822 | ...\r | |
3823 | );\r | |
3824 | \r | |
3825 | \r | |
3826 | /**\r | |
3827 | Generates a breakpoint on the CPU.\r | |
3828 | \r | |
3829 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
3830 | that code can resume normal execution after the breakpoint.\r | |
3831 | \r | |
3832 | **/\r | |
3833 | VOID\r | |
3834 | EFIAPI\r | |
3835 | CpuBreakpoint (\r | |
3836 | VOID\r | |
3837 | );\r | |
3838 | \r | |
3839 | \r | |
3840 | /**\r | |
3841 | Executes an infinite loop.\r | |
3842 | \r | |
3843 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
3844 | past the loop and the code that follows the loop must execute properly. This\r | |
3845 | implies that the infinite loop must not cause the code that follow it to be\r | |
3846 | optimized away.\r | |
3847 | \r | |
3848 | **/\r | |
3849 | VOID\r | |
3850 | EFIAPI\r | |
3851 | CpuDeadLoop (\r | |
3852 | VOID\r | |
3853 | );\r | |
2fe241a2 | 3854 | \r |
ac644614 | 3855 | #if defined (MDE_CPU_IPF)\r |
3856 | \r | |
3857 | /**\r | |
3858 | Flush a range of cache lines in the cache coherency domain of the calling\r | |
3859 | CPU.\r | |
3860 | \r | |
cc39b88b | 3861 | Flushes the cache lines specified by Address and Length. If Address is not aligned \r |
3862 | on a cache line boundary, then entire cache line containing Address is flushed. \r | |
3863 | If Address + Length is not aligned on a cache line boundary, then the entire cache \r | |
3864 | line containing Address + Length - 1 is flushed. This function may choose to flush \r | |
3865 | the entire cache if that is more efficient than flushing the specified range. If \r | |
3866 | Length is 0, the no cache lines are flushed. Address is returned. \r | |
1a2f870c | 3867 | This function is only available on Itanium processors.\r |
ac644614 | 3868 | \r |
3869 | If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r | |
3870 | \r | |
3871 | @param Address The base address of the instruction lines to invalidate. If\r | |
3872 | the CPU is in a physical addressing mode, then Address is a\r | |
3873 | physical address. If the CPU is in a virtual addressing mode,\r | |
3874 | then Address is a virtual address.\r | |
3875 | \r | |
3876 | @param Length The number of bytes to invalidate from the instruction cache.\r | |
3877 | \r | |
cc39b88b | 3878 | @return Address.\r |
ac644614 | 3879 | \r |
3880 | **/\r | |
3881 | VOID *\r | |
3882 | EFIAPI\r | |
cc39b88b | 3883 | AsmFlushCacheRange (\r |
ac644614 | 3884 | IN VOID *Address,\r |
3885 | IN UINTN Length\r | |
3886 | );\r | |
3887 | \r | |
3888 | \r | |
3889 | /**\r | |
af2dc6a7 | 3890 | Executes an FC instruction.\r |
3891 | Executes an FC instruction on the cache line specified by Address.\r | |
ac644614 | 3892 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3893 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3894 | \r |
ee6c452c | 3895 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3896 | \r |
3897 | @return The address of FC instruction executed.\r | |
3898 | \r | |
3899 | **/\r | |
3900 | UINT64\r | |
3901 | EFIAPI\r | |
3902 | AsmFc (\r | |
3903 | IN UINT64 Address\r | |
3904 | );\r | |
3905 | \r | |
3906 | \r | |
3907 | /**\r | |
af2dc6a7 | 3908 | Executes an FC.I instruction.\r |
3909 | Executes an FC.I instruction on the cache line specified by Address.\r | |
ac644614 | 3910 | The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r |
1a2f870c | 3911 | An implementation may flush a larger region. This function is only available on Itanium processors.\r |
ac644614 | 3912 | \r |
ee6c452c | 3913 | @param Address The Address of cache line to be flushed.\r |
ac644614 | 3914 | \r |
af2dc6a7 | 3915 | @return The address of the FC.I instruction executed.\r |
ac644614 | 3916 | \r |
3917 | **/\r | |
3918 | UINT64\r | |
3919 | EFIAPI\r | |
3920 | AsmFci (\r | |
3921 | IN UINT64 Address\r | |
3922 | );\r | |
3923 | \r | |
3924 | \r | |
3925 | /**\r | |
3926 | Reads the current value of a Processor Identifier Register (CPUID).\r | |
17f695ed | 3927 | \r |
3928 | Reads and returns the current value of Processor Identifier Register specified by Index. \r | |
ac644614 | 3929 | The Index of largest implemented CPUID (One less than the number of implemented CPUID\r |
3930 | registers) is determined by CPUID [3] bits {7:0}.\r | |
3931 | No parameter checking is performed on Index. If the Index value is beyond the\r | |
3932 | implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r | |
3933 | must either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
1a2f870c | 3934 | catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3935 | \r |
ee6c452c | 3936 | @param Index The 8-bit Processor Identifier Register index to read.\r |
ac644614 | 3937 | \r |
3938 | @return The current value of Processor Identifier Register specified by Index.\r | |
3939 | \r | |
3940 | **/\r | |
3941 | UINT64\r | |
3942 | EFIAPI\r | |
3943 | AsmReadCpuid (\r | |
3944 | IN UINT8 Index\r | |
3945 | );\r | |
3946 | \r | |
3947 | \r | |
3948 | /**\r | |
3949 | Reads the current value of 64-bit Processor Status Register (PSR).\r | |
1a2f870c | 3950 | This function is only available on Itanium processors.\r |
ac644614 | 3951 | \r |
3952 | @return The current value of PSR.\r | |
3953 | \r | |
3954 | **/\r | |
3955 | UINT64\r | |
3956 | EFIAPI\r | |
3957 | AsmReadPsr (\r | |
3958 | VOID\r | |
3959 | );\r | |
3960 | \r | |
3961 | \r | |
3962 | /**\r | |
3963 | Writes the current value of 64-bit Processor Status Register (PSR).\r | |
22388319 | 3964 | \r |
ac644614 | 3965 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
22388319 | 3966 | reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r |
3967 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
1a2f870c | 3968 | fault handlers to catch the faults. This function is only available on Itanium processors.\r |
ac644614 | 3969 | \r |
ee6c452c | 3970 | @param Value The 64-bit value to write to PSR.\r |
ac644614 | 3971 | \r |
3972 | @return The 64-bit value written to the PSR.\r | |
3973 | \r | |
3974 | **/\r | |
3975 | UINT64\r | |
3976 | EFIAPI\r | |
3977 | AsmWritePsr (\r | |
3978 | IN UINT64 Value\r | |
3979 | );\r | |
3980 | \r | |
3981 | \r | |
3982 | /**\r | |
3983 | Reads the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 3984 | \r |
3985 | Reads and returns the current value of KR0. \r | |
1a2f870c | 3986 | This function is only available on Itanium processors.\r |
ac644614 | 3987 | \r |
3988 | @return The current value of KR0.\r | |
3989 | \r | |
3990 | **/\r | |
3991 | UINT64\r | |
3992 | EFIAPI\r | |
3993 | AsmReadKr0 (\r | |
3994 | VOID\r | |
3995 | );\r | |
3996 | \r | |
3997 | \r | |
3998 | /**\r | |
3999 | Reads the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 4000 | \r |
4001 | Reads and returns the current value of KR1. \r | |
1a2f870c | 4002 | This function is only available on Itanium processors.\r |
ac644614 | 4003 | \r |
4004 | @return The current value of KR1.\r | |
4005 | \r | |
4006 | **/\r | |
4007 | UINT64\r | |
4008 | EFIAPI\r | |
4009 | AsmReadKr1 (\r | |
4010 | VOID\r | |
4011 | );\r | |
4012 | \r | |
4013 | \r | |
4014 | /**\r | |
4015 | Reads the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 4016 | \r |
4017 | Reads and returns the current value of KR2. \r | |
1a2f870c | 4018 | This function is only available on Itanium processors.\r |
ac644614 | 4019 | \r |
4020 | @return The current value of KR2.\r | |
4021 | \r | |
4022 | **/\r | |
4023 | UINT64\r | |
4024 | EFIAPI\r | |
4025 | AsmReadKr2 (\r | |
4026 | VOID\r | |
4027 | );\r | |
4028 | \r | |
4029 | \r | |
4030 | /**\r | |
4031 | Reads the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 4032 | \r |
4033 | Reads and returns the current value of KR3. \r | |
1a2f870c | 4034 | This function is only available on Itanium processors.\r |
ac644614 | 4035 | \r |
4036 | @return The current value of KR3.\r | |
4037 | \r | |
4038 | **/\r | |
4039 | UINT64\r | |
4040 | EFIAPI\r | |
4041 | AsmReadKr3 (\r | |
4042 | VOID\r | |
4043 | );\r | |
4044 | \r | |
4045 | \r | |
4046 | /**\r | |
4047 | Reads the current value of 64-bit Kernel Register #4 (KR4).\r | |
ac644614 | 4048 | \r |
2fe241a2 | 4049 | Reads and returns the current value of KR4. \r |
1a2f870c | 4050 | This function is only available on Itanium processors.\r |
2fe241a2 | 4051 | \r |
ac644614 | 4052 | @return The current value of KR4.\r |
4053 | \r | |
4054 | **/\r | |
4055 | UINT64\r | |
4056 | EFIAPI\r | |
4057 | AsmReadKr4 (\r | |
4058 | VOID\r | |
4059 | );\r | |
4060 | \r | |
4061 | \r | |
4062 | /**\r | |
4063 | Reads the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 4064 | \r |
4065 | Reads and returns the current value of KR5. \r | |
1a2f870c | 4066 | This function is only available on Itanium processors.\r |
ac644614 | 4067 | \r |
4068 | @return The current value of KR5.\r | |
4069 | \r | |
4070 | **/\r | |
4071 | UINT64\r | |
4072 | EFIAPI\r | |
4073 | AsmReadKr5 (\r | |
4074 | VOID\r | |
4075 | );\r | |
4076 | \r | |
4077 | \r | |
4078 | /**\r | |
4079 | Reads the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 4080 | \r |
4081 | Reads and returns the current value of KR6. \r | |
1a2f870c | 4082 | This function is only available on Itanium processors.\r |
ac644614 | 4083 | \r |
4084 | @return The current value of KR6.\r | |
4085 | \r | |
4086 | **/\r | |
4087 | UINT64\r | |
4088 | EFIAPI\r | |
4089 | AsmReadKr6 (\r | |
4090 | VOID\r | |
4091 | );\r | |
4092 | \r | |
4093 | \r | |
4094 | /**\r | |
4095 | Reads the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 4096 | \r |
4097 | Reads and returns the current value of KR7. \r | |
1a2f870c | 4098 | This function is only available on Itanium processors.\r |
ac644614 | 4099 | \r |
4100 | @return The current value of KR7.\r | |
4101 | \r | |
4102 | **/\r | |
4103 | UINT64\r | |
4104 | EFIAPI\r | |
4105 | AsmReadKr7 (\r | |
4106 | VOID\r | |
4107 | );\r | |
4108 | \r | |
4109 | \r | |
4110 | /**\r | |
4111 | Write the current value of 64-bit Kernel Register #0 (KR0).\r | |
2fe241a2 | 4112 | \r |
4113 | Writes the current value of KR0. The 64-bit value written to \r | |
1a2f870c | 4114 | the KR0 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4115 | \r |
ee6c452c | 4116 | @param Value The 64-bit value to write to KR0.\r |
ac644614 | 4117 | \r |
4118 | @return The 64-bit value written to the KR0.\r | |
4119 | \r | |
4120 | **/\r | |
4121 | UINT64\r | |
4122 | EFIAPI\r | |
4123 | AsmWriteKr0 (\r | |
4124 | IN UINT64 Value\r | |
4125 | );\r | |
4126 | \r | |
4127 | \r | |
4128 | /**\r | |
4129 | Write the current value of 64-bit Kernel Register #1 (KR1).\r | |
2fe241a2 | 4130 | \r |
4131 | Writes the current value of KR1. The 64-bit value written to \r | |
1a2f870c | 4132 | the KR1 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4133 | \r |
ee6c452c | 4134 | @param Value The 64-bit value to write to KR1.\r |
ac644614 | 4135 | \r |
4136 | @return The 64-bit value written to the KR1.\r | |
4137 | \r | |
4138 | **/\r | |
4139 | UINT64\r | |
4140 | EFIAPI\r | |
4141 | AsmWriteKr1 (\r | |
4142 | IN UINT64 Value\r | |
4143 | );\r | |
4144 | \r | |
4145 | \r | |
4146 | /**\r | |
4147 | Write the current value of 64-bit Kernel Register #2 (KR2).\r | |
2fe241a2 | 4148 | \r |
4149 | Writes the current value of KR2. The 64-bit value written to \r | |
1a2f870c | 4150 | the KR2 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4151 | \r |
ee6c452c | 4152 | @param Value The 64-bit value to write to KR2.\r |
ac644614 | 4153 | \r |
4154 | @return The 64-bit value written to the KR2.\r | |
4155 | \r | |
4156 | **/\r | |
4157 | UINT64\r | |
4158 | EFIAPI\r | |
4159 | AsmWriteKr2 (\r | |
4160 | IN UINT64 Value\r | |
4161 | );\r | |
4162 | \r | |
4163 | \r | |
4164 | /**\r | |
4165 | Write the current value of 64-bit Kernel Register #3 (KR3).\r | |
2fe241a2 | 4166 | \r |
4167 | Writes the current value of KR3. The 64-bit value written to \r | |
1a2f870c | 4168 | the KR3 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4169 | \r |
ee6c452c | 4170 | @param Value The 64-bit value to write to KR3.\r |
ac644614 | 4171 | \r |
4172 | @return The 64-bit value written to the KR3.\r | |
4173 | \r | |
4174 | **/\r | |
4175 | UINT64\r | |
4176 | EFIAPI\r | |
4177 | AsmWriteKr3 (\r | |
4178 | IN UINT64 Value\r | |
4179 | );\r | |
4180 | \r | |
4181 | \r | |
4182 | /**\r | |
4183 | Write the current value of 64-bit Kernel Register #4 (KR4).\r | |
2fe241a2 | 4184 | \r |
4185 | Writes the current value of KR4. The 64-bit value written to \r | |
1a2f870c | 4186 | the KR4 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4187 | \r |
ee6c452c | 4188 | @param Value The 64-bit value to write to KR4.\r |
ac644614 | 4189 | \r |
4190 | @return The 64-bit value written to the KR4.\r | |
4191 | \r | |
4192 | **/\r | |
4193 | UINT64\r | |
4194 | EFIAPI\r | |
4195 | AsmWriteKr4 (\r | |
4196 | IN UINT64 Value\r | |
4197 | );\r | |
4198 | \r | |
4199 | \r | |
4200 | /**\r | |
4201 | Write the current value of 64-bit Kernel Register #5 (KR5).\r | |
2fe241a2 | 4202 | \r |
4203 | Writes the current value of KR5. The 64-bit value written to \r | |
1a2f870c | 4204 | the KR5 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4205 | \r |
ee6c452c | 4206 | @param Value The 64-bit value to write to KR5.\r |
ac644614 | 4207 | \r |
4208 | @return The 64-bit value written to the KR5.\r | |
4209 | \r | |
4210 | **/\r | |
4211 | UINT64\r | |
4212 | EFIAPI\r | |
4213 | AsmWriteKr5 (\r | |
4214 | IN UINT64 Value\r | |
4215 | );\r | |
4216 | \r | |
4217 | \r | |
4218 | /**\r | |
4219 | Write the current value of 64-bit Kernel Register #6 (KR6).\r | |
2fe241a2 | 4220 | \r |
4221 | Writes the current value of KR6. The 64-bit value written to \r | |
1a2f870c | 4222 | the KR6 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4223 | \r |
ee6c452c | 4224 | @param Value The 64-bit value to write to KR6.\r |
ac644614 | 4225 | \r |
4226 | @return The 64-bit value written to the KR6.\r | |
4227 | \r | |
4228 | **/\r | |
4229 | UINT64\r | |
4230 | EFIAPI\r | |
4231 | AsmWriteKr6 (\r | |
4232 | IN UINT64 Value\r | |
4233 | );\r | |
4234 | \r | |
4235 | \r | |
4236 | /**\r | |
4237 | Write the current value of 64-bit Kernel Register #7 (KR7).\r | |
2fe241a2 | 4238 | \r |
4239 | Writes the current value of KR7. The 64-bit value written to \r | |
1a2f870c | 4240 | the KR7 is returned. This function is only available on Itanium processors.\r |
ac644614 | 4241 | \r |
ee6c452c | 4242 | @param Value The 64-bit value to write to KR7.\r |
ac644614 | 4243 | \r |
4244 | @return The 64-bit value written to the KR7.\r | |
4245 | \r | |
4246 | **/\r | |
4247 | UINT64\r | |
4248 | EFIAPI\r | |
4249 | AsmWriteKr7 (\r | |
4250 | IN UINT64 Value\r | |
4251 | );\r | |
4252 | \r | |
4253 | \r | |
4254 | /**\r | |
4255 | Reads the current value of Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 4256 | \r |
4257 | Reads and returns the current value of ITC.\r | |
1a2f870c | 4258 | This function is only available on Itanium processors.\r |
ac644614 | 4259 | \r |
4260 | @return The current value of ITC.\r | |
4261 | \r | |
4262 | **/\r | |
4263 | UINT64\r | |
4264 | EFIAPI\r | |
4265 | AsmReadItc (\r | |
4266 | VOID\r | |
4267 | );\r | |
4268 | \r | |
4269 | \r | |
4270 | /**\r | |
4271 | Reads the current value of Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 4272 | \r |
4273 | Reads and returns the current value of ITV. \r | |
1a2f870c | 4274 | This function is only available on Itanium processors.\r |
ac644614 | 4275 | \r |
4276 | @return The current value of ITV.\r | |
4277 | \r | |
4278 | **/\r | |
4279 | UINT64\r | |
4280 | EFIAPI\r | |
4281 | AsmReadItv (\r | |
4282 | VOID\r | |
4283 | );\r | |
4284 | \r | |
4285 | \r | |
4286 | /**\r | |
4287 | Reads the current value of Interval Timer Match Register (ITM).\r | |
2fe241a2 | 4288 | \r |
4289 | Reads and returns the current value of ITM.\r | |
1a2f870c | 4290 | This function is only available on Itanium processors.\r |
ac644614 | 4291 | \r |
4292 | @return The current value of ITM.\r | |
4293 | **/\r | |
4294 | UINT64\r | |
4295 | EFIAPI\r | |
4296 | AsmReadItm (\r | |
4297 | VOID\r | |
4298 | );\r | |
4299 | \r | |
4300 | \r | |
4301 | /**\r | |
4302 | Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r | |
2fe241a2 | 4303 | \r |
4304 | Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r | |
1a2f870c | 4305 | This function is only available on Itanium processors.\r |
ac644614 | 4306 | \r |
ee6c452c | 4307 | @param Value The 64-bit value to write to ITC.\r |
ac644614 | 4308 | \r |
4309 | @return The 64-bit value written to the ITC.\r | |
4310 | \r | |
4311 | **/\r | |
4312 | UINT64\r | |
4313 | EFIAPI\r | |
4314 | AsmWriteItc (\r | |
4315 | IN UINT64 Value\r | |
4316 | );\r | |
4317 | \r | |
4318 | \r | |
4319 | /**\r | |
4320 | Writes the current value of 64-bit Interval Timer Match Register (ITM).\r | |
2fe241a2 | 4321 | \r |
4322 | Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r | |
1a2f870c | 4323 | This function is only available on Itanium processors.\r |
ac644614 | 4324 | \r |
ee6c452c | 4325 | @param Value The 64-bit value to write to ITM.\r |
ac644614 | 4326 | \r |
4327 | @return The 64-bit value written to the ITM.\r | |
4328 | \r | |
4329 | **/\r | |
4330 | UINT64\r | |
4331 | EFIAPI\r | |
4332 | AsmWriteItm (\r | |
4333 | IN UINT64 Value\r | |
4334 | );\r | |
4335 | \r | |
4336 | \r | |
4337 | /**\r | |
4338 | Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r | |
2fe241a2 | 4339 | \r |
4340 | Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r | |
ac644614 | 4341 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4342 | reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r | |
4343 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4344 | fault handlers to catch the faults.\r | |
1a2f870c | 4345 | This function is only available on Itanium processors.\r |
ac644614 | 4346 | \r |
ee6c452c | 4347 | @param Value The 64-bit value to write to ITV.\r |
ac644614 | 4348 | \r |
4349 | @return The 64-bit value written to the ITV.\r | |
4350 | \r | |
4351 | **/\r | |
4352 | UINT64\r | |
4353 | EFIAPI\r | |
4354 | AsmWriteItv (\r | |
4355 | IN UINT64 Value\r | |
4356 | );\r | |
4357 | \r | |
4358 | \r | |
4359 | /**\r | |
4360 | Reads the current value of Default Control Register (DCR).\r | |
2fe241a2 | 4361 | \r |
1a2f870c | 4362 | Reads and returns the current value of DCR. This function is only available on Itanium processors.\r |
ac644614 | 4363 | \r |
4364 | @return The current value of DCR.\r | |
4365 | \r | |
4366 | **/\r | |
4367 | UINT64\r | |
4368 | EFIAPI\r | |
4369 | AsmReadDcr (\r | |
4370 | VOID\r | |
4371 | );\r | |
4372 | \r | |
4373 | \r | |
4374 | /**\r | |
4375 | Reads the current value of Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 4376 | \r |
1a2f870c | 4377 | Reads and returns the current value of IVA. This function is only available on Itanium processors.\r |
ac644614 | 4378 | \r |
4379 | @return The current value of IVA.\r | |
4380 | **/\r | |
4381 | UINT64\r | |
4382 | EFIAPI\r | |
4383 | AsmReadIva (\r | |
4384 | VOID\r | |
4385 | );\r | |
4386 | \r | |
4387 | \r | |
4388 | /**\r | |
4389 | Reads the current value of Page Table Address Register (PTA).\r | |
2fe241a2 | 4390 | \r |
1a2f870c | 4391 | Reads and returns the current value of PTA. This function is only available on Itanium processors.\r |
ac644614 | 4392 | \r |
4393 | @return The current value of PTA.\r | |
4394 | \r | |
4395 | **/\r | |
4396 | UINT64\r | |
4397 | EFIAPI\r | |
4398 | AsmReadPta (\r | |
4399 | VOID\r | |
4400 | );\r | |
4401 | \r | |
4402 | \r | |
4403 | /**\r | |
4404 | Writes the current value of 64-bit Default Control Register (DCR).\r | |
2fe241a2 | 4405 | \r |
4406 | Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r | |
ac644614 | 4407 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4408 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4409 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4410 | fault handlers to catch the faults.\r | |
1a2f870c | 4411 | This function is only available on Itanium processors.\r |
ac644614 | 4412 | \r |
ee6c452c | 4413 | @param Value The 64-bit value to write to DCR.\r |
ac644614 | 4414 | \r |
4415 | @return The 64-bit value written to the DCR.\r | |
4416 | \r | |
4417 | **/\r | |
4418 | UINT64\r | |
4419 | EFIAPI\r | |
4420 | AsmWriteDcr (\r | |
4421 | IN UINT64 Value\r | |
4422 | );\r | |
4423 | \r | |
4424 | \r | |
4425 | /**\r | |
4426 | Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r | |
2fe241a2 | 4427 | \r |
4428 | Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r | |
ac644614 | 4429 | The size of vector table is 32 K bytes and is 32 K bytes aligned\r |
4430 | the low 15 bits of Value is ignored when written.\r | |
1a2f870c | 4431 | This function is only available on Itanium processors.\r |
ac644614 | 4432 | \r |
ee6c452c | 4433 | @param Value The 64-bit value to write to IVA.\r |
ac644614 | 4434 | \r |
4435 | @return The 64-bit value written to the IVA.\r | |
4436 | \r | |
4437 | **/\r | |
4438 | UINT64\r | |
4439 | EFIAPI\r | |
4440 | AsmWriteIva (\r | |
4441 | IN UINT64 Value\r | |
4442 | );\r | |
4443 | \r | |
4444 | \r | |
4445 | /**\r | |
4446 | Writes the current value of 64-bit Page Table Address Register (PTA).\r | |
2fe241a2 | 4447 | \r |
4448 | Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r | |
ac644614 | 4449 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4450 | reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r | |
4451 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4452 | fault handlers to catch the faults.\r | |
1a2f870c | 4453 | This function is only available on Itanium processors.\r |
ac644614 | 4454 | \r |
ee6c452c | 4455 | @param Value The 64-bit value to write to PTA.\r |
ac644614 | 4456 | \r |
4457 | @return The 64-bit value written to the PTA.\r | |
4458 | **/\r | |
4459 | UINT64\r | |
4460 | EFIAPI\r | |
4461 | AsmWritePta (\r | |
4462 | IN UINT64 Value\r | |
4463 | );\r | |
4464 | \r | |
4465 | \r | |
4466 | /**\r | |
4467 | Reads the current value of Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4468 | \r |
1a2f870c | 4469 | Reads and returns the current value of LID. This function is only available on Itanium processors.\r |
ac644614 | 4470 | \r |
4471 | @return The current value of LID.\r | |
4472 | \r | |
4473 | **/\r | |
4474 | UINT64\r | |
4475 | EFIAPI\r | |
4476 | AsmReadLid (\r | |
4477 | VOID\r | |
4478 | );\r | |
4479 | \r | |
4480 | \r | |
4481 | /**\r | |
4482 | Reads the current value of External Interrupt Vector Register (IVR).\r | |
2fe241a2 | 4483 | \r |
1a2f870c | 4484 | Reads and returns the current value of IVR. This function is only available on Itanium processors. \r |
ac644614 | 4485 | \r |
4486 | @return The current value of IVR.\r | |
4487 | \r | |
4488 | **/\r | |
4489 | UINT64\r | |
4490 | EFIAPI\r | |
4491 | AsmReadIvr (\r | |
4492 | VOID\r | |
4493 | );\r | |
4494 | \r | |
4495 | \r | |
4496 | /**\r | |
4497 | Reads the current value of Task Priority Register (TPR).\r | |
2fe241a2 | 4498 | \r |
1a2f870c | 4499 | Reads and returns the current value of TPR. This function is only available on Itanium processors. \r |
ac644614 | 4500 | \r |
4501 | @return The current value of TPR.\r | |
4502 | \r | |
4503 | **/\r | |
4504 | UINT64\r | |
4505 | EFIAPI\r | |
4506 | AsmReadTpr (\r | |
4507 | VOID\r | |
4508 | );\r | |
4509 | \r | |
4510 | \r | |
4511 | /**\r | |
4512 | Reads the current value of External Interrupt Request Register #0 (IRR0).\r | |
2fe241a2 | 4513 | \r |
1a2f870c | 4514 | Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r |
ac644614 | 4515 | \r |
4516 | @return The current value of IRR0.\r | |
4517 | \r | |
4518 | **/\r | |
4519 | UINT64\r | |
4520 | EFIAPI\r | |
4521 | AsmReadIrr0 (\r | |
4522 | VOID\r | |
4523 | );\r | |
4524 | \r | |
4525 | \r | |
4526 | /**\r | |
4527 | Reads the current value of External Interrupt Request Register #1 (IRR1).\r | |
2fe241a2 | 4528 | \r |
1a2f870c | 4529 | Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r |
ac644614 | 4530 | \r |
4531 | @return The current value of IRR1.\r | |
4532 | \r | |
4533 | **/\r | |
4534 | UINT64\r | |
4535 | EFIAPI\r | |
4536 | AsmReadIrr1 (\r | |
4537 | VOID\r | |
4538 | );\r | |
4539 | \r | |
4540 | \r | |
4541 | /**\r | |
4542 | Reads the current value of External Interrupt Request Register #2 (IRR2).\r | |
2fe241a2 | 4543 | \r |
1a2f870c | 4544 | Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r |
ac644614 | 4545 | \r |
4546 | @return The current value of IRR2.\r | |
4547 | \r | |
4548 | **/\r | |
4549 | UINT64\r | |
4550 | EFIAPI\r | |
4551 | AsmReadIrr2 (\r | |
4552 | VOID\r | |
4553 | );\r | |
4554 | \r | |
4555 | \r | |
4556 | /**\r | |
4557 | Reads the current value of External Interrupt Request Register #3 (IRR3).\r | |
2fe241a2 | 4558 | \r |
1a2f870c | 4559 | Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r |
ac644614 | 4560 | \r |
4561 | @return The current value of IRR3.\r | |
4562 | \r | |
4563 | **/\r | |
4564 | UINT64\r | |
4565 | EFIAPI\r | |
4566 | AsmReadIrr3 (\r | |
4567 | VOID\r | |
4568 | );\r | |
4569 | \r | |
4570 | \r | |
4571 | /**\r | |
4572 | Reads the current value of Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4573 | \r |
1a2f870c | 4574 | Reads and returns the current value of PMV. This function is only available on Itanium processors. \r |
ac644614 | 4575 | \r |
4576 | @return The current value of PMV.\r | |
4577 | \r | |
4578 | **/\r | |
4579 | UINT64\r | |
4580 | EFIAPI\r | |
4581 | AsmReadPmv (\r | |
4582 | VOID\r | |
4583 | );\r | |
4584 | \r | |
4585 | \r | |
4586 | /**\r | |
4587 | Reads the current value of Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4588 | \r |
1a2f870c | 4589 | Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r |
ac644614 | 4590 | \r |
4591 | @return The current value of CMCV.\r | |
4592 | \r | |
4593 | **/\r | |
4594 | UINT64\r | |
4595 | EFIAPI\r | |
4596 | AsmReadCmcv (\r | |
4597 | VOID\r | |
4598 | );\r | |
4599 | \r | |
4600 | \r | |
4601 | /**\r | |
4602 | Reads the current value of Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4603 | \r |
1a2f870c | 4604 | Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r |
ac644614 | 4605 | \r |
4606 | @return The current value of LRR0.\r | |
4607 | \r | |
4608 | **/\r | |
4609 | UINT64\r | |
4610 | EFIAPI\r | |
4611 | AsmReadLrr0 (\r | |
4612 | VOID\r | |
4613 | );\r | |
4614 | \r | |
4615 | \r | |
4616 | /**\r | |
4617 | Reads the current value of Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4618 | \r |
1a2f870c | 4619 | Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r |
ac644614 | 4620 | \r |
4621 | @return The current value of LRR1.\r | |
4622 | \r | |
4623 | **/\r | |
4624 | UINT64\r | |
4625 | EFIAPI\r | |
4626 | AsmReadLrr1 (\r | |
4627 | VOID\r | |
4628 | );\r | |
4629 | \r | |
4630 | \r | |
4631 | /**\r | |
4632 | Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r | |
2fe241a2 | 4633 | \r |
4634 | Writes the current value of LID. The 64-bit value written to the LID is returned. \r | |
ac644614 | 4635 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4636 | reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r | |
4637 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4638 | fault handlers to catch the faults.\r | |
1a2f870c | 4639 | This function is only available on Itanium processors.\r |
ac644614 | 4640 | \r |
ee6c452c | 4641 | @param Value The 64-bit value to write to LID.\r |
ac644614 | 4642 | \r |
4643 | @return The 64-bit value written to the LID.\r | |
4644 | \r | |
4645 | **/\r | |
4646 | UINT64\r | |
4647 | EFIAPI\r | |
4648 | AsmWriteLid (\r | |
4649 | IN UINT64 Value\r | |
4650 | );\r | |
4651 | \r | |
4652 | \r | |
4653 | /**\r | |
4654 | Writes the current value of 64-bit Task Priority Register (TPR).\r | |
2fe241a2 | 4655 | \r |
4656 | Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r | |
ac644614 | 4657 | No parameter checking is performed on Value. All bits of Value corresponding to\r |
4658 | reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r | |
4659 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4660 | fault handlers to catch the faults.\r | |
1a2f870c | 4661 | This function is only available on Itanium processors.\r |
ac644614 | 4662 | \r |
ee6c452c | 4663 | @param Value The 64-bit value to write to TPR.\r |
ac644614 | 4664 | \r |
4665 | @return The 64-bit value written to the TPR.\r | |
4666 | \r | |
4667 | **/\r | |
4668 | UINT64\r | |
4669 | EFIAPI\r | |
4670 | AsmWriteTpr (\r | |
4671 | IN UINT64 Value\r | |
4672 | );\r | |
4673 | \r | |
4674 | \r | |
4675 | /**\r | |
4676 | Performs a write operation on End OF External Interrupt Register (EOI).\r | |
2fe241a2 | 4677 | \r |
1a2f870c | 4678 | Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r |
ac644614 | 4679 | \r |
4680 | **/\r | |
4681 | VOID\r | |
4682 | EFIAPI\r | |
4683 | AsmWriteEoi (\r | |
4684 | VOID\r | |
4685 | );\r | |
4686 | \r | |
4687 | \r | |
4688 | /**\r | |
4689 | Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r | |
2fe241a2 | 4690 | \r |
4691 | Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r | |
ac644614 | 4692 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4693 | to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r | |
4694 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4695 | fault handlers to catch the faults.\r | |
1a2f870c | 4696 | This function is only available on Itanium processors.\r |
ac644614 | 4697 | \r |
ee6c452c | 4698 | @param Value The 64-bit value to write to PMV.\r |
ac644614 | 4699 | \r |
4700 | @return The 64-bit value written to the PMV.\r | |
4701 | \r | |
4702 | **/\r | |
4703 | UINT64\r | |
4704 | EFIAPI\r | |
4705 | AsmWritePmv (\r | |
4706 | IN UINT64 Value\r | |
4707 | );\r | |
4708 | \r | |
4709 | \r | |
4710 | /**\r | |
4711 | Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r | |
2fe241a2 | 4712 | \r |
4713 | Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r | |
ac644614 | 4714 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4715 | to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r | |
4716 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4717 | fault handlers to catch the faults.\r | |
1a2f870c | 4718 | This function is only available on Itanium processors.\r |
ac644614 | 4719 | \r |
ee6c452c | 4720 | @param Value The 64-bit value to write to CMCV.\r |
ac644614 | 4721 | \r |
4722 | @return The 64-bit value written to the CMCV.\r | |
4723 | \r | |
4724 | **/\r | |
4725 | UINT64\r | |
4726 | EFIAPI\r | |
4727 | AsmWriteCmcv (\r | |
4728 | IN UINT64 Value\r | |
4729 | );\r | |
4730 | \r | |
4731 | \r | |
4732 | /**\r | |
4733 | Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r | |
2fe241a2 | 4734 | \r |
4735 | Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r | |
ac644614 | 4736 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4737 | to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r | |
4738 | The caller must either guarantee that Value is valid, or the caller must set up\r | |
4739 | fault handlers to catch the faults.\r | |
1a2f870c | 4740 | This function is only available on Itanium processors.\r |
ac644614 | 4741 | \r |
ee6c452c | 4742 | @param Value The 64-bit value to write to LRR0.\r |
ac644614 | 4743 | \r |
4744 | @return The 64-bit value written to the LRR0.\r | |
4745 | \r | |
4746 | **/\r | |
4747 | UINT64\r | |
4748 | EFIAPI\r | |
4749 | AsmWriteLrr0 (\r | |
4750 | IN UINT64 Value\r | |
4751 | );\r | |
4752 | \r | |
4753 | \r | |
4754 | /**\r | |
4755 | Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r | |
2fe241a2 | 4756 | \r |
4757 | Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r | |
ac644614 | 4758 | No parameter checking is performed on Value. All bits of Value corresponding\r |
4759 | to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r | |
4760 | The caller must either guarantee that Value is valid, or the caller must\r | |
4761 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4762 | This function is only available on Itanium processors.\r |
ac644614 | 4763 | \r |
ee6c452c | 4764 | @param Value The 64-bit value to write to LRR1.\r |
ac644614 | 4765 | \r |
4766 | @return The 64-bit value written to the LRR1.\r | |
4767 | \r | |
4768 | **/\r | |
4769 | UINT64\r | |
4770 | EFIAPI\r | |
4771 | AsmWriteLrr1 (\r | |
4772 | IN UINT64 Value\r | |
4773 | );\r | |
4774 | \r | |
4775 | \r | |
4776 | /**\r | |
4777 | Reads the current value of Instruction Breakpoint Register (IBR).\r | |
4778 | \r | |
4779 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4780 | registers contain breakpoint addresses, and the odd numbered registers contain\r | |
af2dc6a7 | 4781 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4782 | on all processor models. Implemented registers are contiguous starting with\r |
4783 | register 0. No parameter checking is performed on Index, and if the Index value\r | |
4784 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4785 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4786 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4787 | This function is only available on Itanium processors.\r |
ac644614 | 4788 | \r |
ee6c452c | 4789 | @param Index The 8-bit Instruction Breakpoint Register index to read.\r |
ac644614 | 4790 | \r |
4791 | @return The current value of Instruction Breakpoint Register specified by Index.\r | |
4792 | \r | |
4793 | **/\r | |
4794 | UINT64\r | |
4795 | EFIAPI\r | |
4796 | AsmReadIbr (\r | |
4797 | IN UINT8 Index\r | |
4798 | );\r | |
4799 | \r | |
4800 | \r | |
4801 | /**\r | |
4802 | Reads the current value of Data Breakpoint Register (DBR).\r | |
4803 | \r | |
4804 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4805 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4806 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4807 | models. Implemented registers are contiguous starting with register 0.\r |
4808 | No parameter checking is performed on Index. If the Index value is beyond\r | |
4809 | the implemented DBR register range, a Reserved Register/Field fault may occur.\r | |
4810 | The caller must either guarantee that Index is valid, or the caller must set up\r | |
4811 | fault handlers to catch the faults.\r | |
1a2f870c | 4812 | This function is only available on Itanium processors.\r |
ac644614 | 4813 | \r |
ee6c452c | 4814 | @param Index The 8-bit Data Breakpoint Register index to read.\r |
ac644614 | 4815 | \r |
4816 | @return The current value of Data Breakpoint Register specified by Index.\r | |
4817 | \r | |
4818 | **/\r | |
4819 | UINT64\r | |
4820 | EFIAPI\r | |
4821 | AsmReadDbr (\r | |
4822 | IN UINT8 Index\r | |
4823 | );\r | |
4824 | \r | |
4825 | \r | |
4826 | /**\r | |
4827 | Reads the current value of Performance Monitor Configuration Register (PMC).\r | |
4828 | \r | |
af2dc6a7 | 4829 | All processor implementations provide at least four performance counters\r |
4830 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4831 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4832 | additional implementation-dependent PMC and PMD to increase the number of\r | |
4833 | 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4834 | register set is implementation dependent. No parameter checking is performed\r | |
4835 | on Index. If the Index value is beyond the implemented PMC register range,\r | |
4836 | zero value will be returned.\r | |
1a2f870c | 4837 | This function is only available on Itanium processors.\r |
ac644614 | 4838 | \r |
ee6c452c | 4839 | @param Index The 8-bit Performance Monitor Configuration Register index to read.\r |
ac644614 | 4840 | \r |
2fe241a2 | 4841 | @return The current value of Performance Monitor Configuration Register\r |
4842 | specified by Index.\r | |
ac644614 | 4843 | \r |
4844 | **/\r | |
4845 | UINT64\r | |
4846 | EFIAPI\r | |
4847 | AsmReadPmc (\r | |
4848 | IN UINT8 Index\r | |
4849 | );\r | |
4850 | \r | |
4851 | \r | |
4852 | /**\r | |
4853 | Reads the current value of Performance Monitor Data Register (PMD).\r | |
4854 | \r | |
4855 | All processor implementations provide at least 4 performance counters\r | |
4856 | (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r | |
4857 | overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r | |
4858 | provide additional implementation-dependent PMC and PMD to increase the number\r | |
4859 | of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r | |
4860 | register set is implementation dependent. No parameter checking is performed\r | |
4861 | on Index. If the Index value is beyond the implemented PMD register range,\r | |
4862 | zero value will be returned.\r | |
1a2f870c | 4863 | This function is only available on Itanium processors.\r |
ac644614 | 4864 | \r |
ee6c452c | 4865 | @param Index The 8-bit Performance Monitor Data Register index to read.\r |
ac644614 | 4866 | \r |
4867 | @return The current value of Performance Monitor Data Register specified by Index.\r | |
4868 | \r | |
4869 | **/\r | |
4870 | UINT64\r | |
4871 | EFIAPI\r | |
4872 | AsmReadPmd (\r | |
4873 | IN UINT8 Index\r | |
4874 | );\r | |
4875 | \r | |
4876 | \r | |
4877 | /**\r | |
4878 | Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r | |
4879 | \r | |
4880 | Writes current value of Instruction Breakpoint Register specified by Index.\r | |
4881 | The Instruction Breakpoint Registers are used in pairs. The even numbered\r | |
4882 | registers contain breakpoint addresses, and odd numbered registers contain\r | |
af2dc6a7 | 4883 | breakpoint mask conditions. At least four instruction registers pairs are implemented\r |
ac644614 | 4884 | on all processor models. Implemented registers are contiguous starting with\r |
4885 | register 0. No parameter checking is performed on Index. If the Index value\r | |
4886 | is beyond the implemented IBR register range, a Reserved Register/Field fault may\r | |
4887 | occur. The caller must either guarantee that Index is valid, or the caller must\r | |
4888 | set up fault handlers to catch the faults.\r | |
1a2f870c | 4889 | This function is only available on Itanium processors.\r |
ac644614 | 4890 | \r |
ee6c452c | 4891 | @param Index The 8-bit Instruction Breakpoint Register index to write.\r |
4892 | @param Value The 64-bit value to write to IBR.\r | |
ac644614 | 4893 | \r |
4894 | @return The 64-bit value written to the IBR.\r | |
4895 | \r | |
4896 | **/\r | |
4897 | UINT64\r | |
4898 | EFIAPI\r | |
4899 | AsmWriteIbr (\r | |
4900 | IN UINT8 Index,\r | |
4901 | IN UINT64 Value\r | |
4902 | );\r | |
4903 | \r | |
4904 | \r | |
4905 | /**\r | |
4906 | Writes the current value of 64-bit Data Breakpoint Register (DBR).\r | |
4907 | \r | |
4908 | Writes current value of Data Breakpoint Register specified by Index.\r | |
4909 | The Data Breakpoint Registers are used in pairs. The even numbered registers\r | |
4910 | contain breakpoint addresses, and odd numbered registers contain breakpoint\r | |
af2dc6a7 | 4911 | mask conditions. At least four data registers pairs are implemented on all processor\r |
ac644614 | 4912 | models. Implemented registers are contiguous starting with register 0. No parameter\r |
4913 | checking is performed on Index. If the Index value is beyond the implemented\r | |
4914 | DBR register range, a Reserved Register/Field fault may occur. The caller must\r | |
4915 | either guarantee that Index is valid, or the caller must set up fault handlers to\r | |
4916 | catch the faults.\r | |
1a2f870c | 4917 | This function is only available on Itanium processors.\r |
ac644614 | 4918 | \r |
ee6c452c | 4919 | @param Index The 8-bit Data Breakpoint Register index to write.\r |
4920 | @param Value The 64-bit value to write to DBR.\r | |
ac644614 | 4921 | \r |
4922 | @return The 64-bit value written to the DBR.\r | |
4923 | \r | |
4924 | **/\r | |
4925 | UINT64\r | |
4926 | EFIAPI\r | |
4927 | AsmWriteDbr (\r | |
4928 | IN UINT8 Index,\r | |
4929 | IN UINT64 Value\r | |
4930 | );\r | |
4931 | \r | |
4932 | \r | |
4933 | /**\r | |
4934 | Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r | |
4935 | \r | |
4936 | Writes current value of Performance Monitor Configuration Register specified by Index.\r | |
af2dc6a7 | 4937 | All processor implementations provide at least four performance counters\r |
4938 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow status\r | |
ac644614 | 4939 | registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r |
4940 | implementation-dependent PMC and PMD to increase the number of 'generic' performance\r | |
4941 | counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r | |
4942 | dependent. No parameter checking is performed on Index. If the Index value is\r | |
4943 | beyond the implemented PMC register range, the write is ignored.\r | |
1a2f870c | 4944 | This function is only available on Itanium processors.\r |
ac644614 | 4945 | \r |
ee6c452c | 4946 | @param Index The 8-bit Performance Monitor Configuration Register index to write.\r |
4947 | @param Value The 64-bit value to write to PMC.\r | |
ac644614 | 4948 | \r |
4949 | @return The 64-bit value written to the PMC.\r | |
4950 | \r | |
4951 | **/\r | |
4952 | UINT64\r | |
4953 | EFIAPI\r | |
4954 | AsmWritePmc (\r | |
4955 | IN UINT8 Index,\r | |
4956 | IN UINT64 Value\r | |
4957 | );\r | |
4958 | \r | |
4959 | \r | |
4960 | /**\r | |
4961 | Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r | |
4962 | \r | |
4963 | Writes current value of Performance Monitor Data Register specified by Index.\r | |
af2dc6a7 | 4964 | All processor implementations provide at least four performance counters\r |
4965 | (PMC/PMD [4]...PMC/PMD [7] pairs), and four performance monitor counter overflow\r | |
ac644614 | 4966 | status registers (PMC [0]... PMC [3]). Processor implementations may provide\r |
4967 | additional implementation-dependent PMC and PMD to increase the number of 'generic'\r | |
4968 | performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r | |
4969 | is implementation dependent. No parameter checking is performed on Index. If the\r | |
4970 | Index value is beyond the implemented PMD register range, the write is ignored.\r | |
1a2f870c | 4971 | This function is only available on Itanium processors.\r |
ac644614 | 4972 | \r |
ee6c452c | 4973 | @param Index The 8-bit Performance Monitor Data Register index to write.\r |
4974 | @param Value The 64-bit value to write to PMD.\r | |
ac644614 | 4975 | \r |
4976 | @return The 64-bit value written to the PMD.\r | |
4977 | \r | |
4978 | **/\r | |
4979 | UINT64\r | |
4980 | EFIAPI\r | |
4981 | AsmWritePmd (\r | |
4982 | IN UINT8 Index,\r | |
4983 | IN UINT64 Value\r | |
4984 | );\r | |
4985 | \r | |
4986 | \r | |
4987 | /**\r | |
4988 | Reads the current value of 64-bit Global Pointer (GP).\r | |
4989 | \r | |
4990 | Reads and returns the current value of GP.\r | |
1a2f870c | 4991 | This function is only available on Itanium processors.\r |
ac644614 | 4992 | \r |
4993 | @return The current value of GP.\r | |
4994 | \r | |
4995 | **/\r | |
4996 | UINT64\r | |
4997 | EFIAPI\r | |
4998 | AsmReadGp (\r | |
4999 | VOID\r | |
5000 | );\r | |
5001 | \r | |
5002 | \r | |
5003 | /**\r | |
5004 | Write the current value of 64-bit Global Pointer (GP).\r | |
5005 | \r | |
5006 | Writes the current value of GP. The 64-bit value written to the GP is returned.\r | |
5007 | No parameter checking is performed on Value.\r | |
1a2f870c | 5008 | This function is only available on Itanium processors.\r |
ac644614 | 5009 | \r |
5010 | @param Value The 64-bit value to write to GP.\r | |
5011 | \r | |
5012 | @return The 64-bit value written to the GP.\r | |
5013 | \r | |
5014 | **/\r | |
5015 | UINT64\r | |
5016 | EFIAPI\r | |
5017 | AsmWriteGp (\r | |
5018 | IN UINT64 Value\r | |
5019 | );\r | |
5020 | \r | |
5021 | \r | |
5022 | /**\r | |
5023 | Reads the current value of 64-bit Stack Pointer (SP).\r | |
5024 | \r | |
5025 | Reads and returns the current value of SP.\r | |
1a2f870c | 5026 | This function is only available on Itanium processors.\r |
ac644614 | 5027 | \r |
5028 | @return The current value of SP.\r | |
5029 | \r | |
5030 | **/\r | |
5031 | UINT64\r | |
5032 | EFIAPI\r | |
5033 | AsmReadSp (\r | |
5034 | VOID\r | |
5035 | );\r | |
5036 | \r | |
5037 | \r | |
aad6137d | 5038 | ///\r |
af2dc6a7 | 5039 | /// Valid Index value for AsmReadControlRegister().\r |
aad6137d | 5040 | ///\r |
5041 | #define IPF_CONTROL_REGISTER_DCR 0\r | |
5042 | #define IPF_CONTROL_REGISTER_ITM 1\r | |
5043 | #define IPF_CONTROL_REGISTER_IVA 2\r | |
5044 | #define IPF_CONTROL_REGISTER_PTA 8\r | |
5045 | #define IPF_CONTROL_REGISTER_IPSR 16\r | |
5046 | #define IPF_CONTROL_REGISTER_ISR 17\r | |
5047 | #define IPF_CONTROL_REGISTER_IIP 19\r | |
5048 | #define IPF_CONTROL_REGISTER_IFA 20\r | |
5049 | #define IPF_CONTROL_REGISTER_ITIR 21\r | |
5050 | #define IPF_CONTROL_REGISTER_IIPA 22\r | |
5051 | #define IPF_CONTROL_REGISTER_IFS 23\r | |
5052 | #define IPF_CONTROL_REGISTER_IIM 24\r | |
5053 | #define IPF_CONTROL_REGISTER_IHA 25\r | |
5054 | #define IPF_CONTROL_REGISTER_LID 64\r | |
5055 | #define IPF_CONTROL_REGISTER_IVR 65\r | |
5056 | #define IPF_CONTROL_REGISTER_TPR 66\r | |
5057 | #define IPF_CONTROL_REGISTER_EOI 67\r | |
5058 | #define IPF_CONTROL_REGISTER_IRR0 68\r | |
5059 | #define IPF_CONTROL_REGISTER_IRR1 69\r | |
5060 | #define IPF_CONTROL_REGISTER_IRR2 70\r | |
5061 | #define IPF_CONTROL_REGISTER_IRR3 71\r | |
5062 | #define IPF_CONTROL_REGISTER_ITV 72\r | |
5063 | #define IPF_CONTROL_REGISTER_PMV 73\r | |
5064 | #define IPF_CONTROL_REGISTER_CMCV 74\r | |
5065 | #define IPF_CONTROL_REGISTER_LRR0 80\r | |
5066 | #define IPF_CONTROL_REGISTER_LRR1 81\r | |
5067 | \r | |
5068 | /**\r | |
5069 | Reads a 64-bit control register.\r | |
5070 | \r | |
af2dc6a7 | 5071 | Reads and returns the control register specified by Index. The valid Index valued \r |
5072 | are defined above in "Related Definitions".\r | |
5073 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
5074 | available on Itanium processors.\r | |
aad6137d | 5075 | \r |
5076 | @param Index The index of the control register to read.\r | |
5077 | \r | |
5078 | @return The control register specified by Index.\r | |
5079 | \r | |
5080 | **/\r | |
5081 | UINT64\r | |
5082 | EFIAPI\r | |
5083 | AsmReadControlRegister (\r | |
5084 | IN UINT64 Index\r | |
5085 | );\r | |
5086 | \r | |
5087 | \r | |
5088 | ///\r | |
af2dc6a7 | 5089 | /// Valid Index value for AsmReadApplicationRegister().\r |
aad6137d | 5090 | ///\r |
5091 | #define IPF_APPLICATION_REGISTER_K0 0\r | |
5092 | #define IPF_APPLICATION_REGISTER_K1 1\r | |
5093 | #define IPF_APPLICATION_REGISTER_K2 2\r | |
5094 | #define IPF_APPLICATION_REGISTER_K3 3\r | |
5095 | #define IPF_APPLICATION_REGISTER_K4 4\r | |
5096 | #define IPF_APPLICATION_REGISTER_K5 5\r | |
5097 | #define IPF_APPLICATION_REGISTER_K6 6\r | |
5098 | #define IPF_APPLICATION_REGISTER_K7 7\r | |
5099 | #define IPF_APPLICATION_REGISTER_RSC 16\r | |
5100 | #define IPF_APPLICATION_REGISTER_BSP 17\r | |
5101 | #define IPF_APPLICATION_REGISTER_BSPSTORE 18\r | |
5102 | #define IPF_APPLICATION_REGISTER_RNAT 19\r | |
5103 | #define IPF_APPLICATION_REGISTER_FCR 21\r | |
5104 | #define IPF_APPLICATION_REGISTER_EFLAG 24\r | |
5105 | #define IPF_APPLICATION_REGISTER_CSD 25\r | |
5106 | #define IPF_APPLICATION_REGISTER_SSD 26\r | |
5107 | #define IPF_APPLICATION_REGISTER_CFLG 27\r | |
5108 | #define IPF_APPLICATION_REGISTER_FSR 28\r | |
5109 | #define IPF_APPLICATION_REGISTER_FIR 29\r | |
5110 | #define IPF_APPLICATION_REGISTER_FDR 30\r | |
5111 | #define IPF_APPLICATION_REGISTER_CCV 32\r | |
5112 | #define IPF_APPLICATION_REGISTER_UNAT 36\r | |
5113 | #define IPF_APPLICATION_REGISTER_FPSR 40\r | |
5114 | #define IPF_APPLICATION_REGISTER_ITC 44\r | |
5115 | #define IPF_APPLICATION_REGISTER_PFS 64\r | |
5116 | #define IPF_APPLICATION_REGISTER_LC 65\r | |
5117 | #define IPF_APPLICATION_REGISTER_EC 66\r | |
5118 | \r | |
5119 | /**\r | |
5120 | Reads a 64-bit application register.\r | |
5121 | \r | |
af2dc6a7 | 5122 | Reads and returns the application register specified by Index. The valid Index \r |
5123 | valued are defined above in "Related Definitions".\r | |
5124 | If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only \r | |
5125 | available on Itanium processors.\r | |
aad6137d | 5126 | \r |
5127 | @param Index The index of the application register to read.\r | |
5128 | \r | |
5129 | @return The application register specified by Index.\r | |
5130 | \r | |
5131 | **/\r | |
5132 | UINT64\r | |
5133 | EFIAPI\r | |
5134 | AsmReadApplicationRegister (\r | |
5135 | IN UINT64 Index\r | |
5136 | );\r | |
5137 | \r | |
5138 | \r | |
59e0bb0c | 5139 | /**\r |
5140 | Reads the current value of a Machine Specific Register (MSR).\r | |
5141 | \r | |
5142 | Reads and returns the current value of the Machine Specific Register specified by Index. No\r | |
5143 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
5144 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
5145 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 5146 | only available on Itanium processors.\r |
59e0bb0c | 5147 | \r |
5148 | @param Index The 8-bit Machine Specific Register index to read.\r | |
5149 | \r | |
5150 | @return The current value of the Machine Specific Register specified by Index. \r | |
5151 | \r | |
5152 | **/\r | |
5153 | UINT64\r | |
5154 | EFIAPI\r | |
5155 | AsmReadMsr (\r | |
5156 | IN UINT8 Index \r | |
5157 | );\r | |
5158 | \r | |
5159 | \r | |
5160 | /**\r | |
5161 | Writes the current value of a Machine Specific Register (MSR).\r | |
5162 | \r | |
5163 | Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r | |
5164 | parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r | |
5165 | register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r | |
5166 | Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r | |
1a2f870c | 5167 | only available on Itanium processors.\r |
59e0bb0c | 5168 | \r |
5169 | @param Index The 8-bit Machine Specific Register index to write.\r | |
5170 | @param Value The 64-bit value to write to the Machine Specific Register.\r | |
5171 | \r | |
5172 | @return The 64-bit value to write to the Machine Specific Register. \r | |
5173 | \r | |
5174 | **/\r | |
5175 | UINT64\r | |
5176 | EFIAPI\r | |
5177 | AsmWriteMsr (\r | |
5178 | IN UINT8 Index, \r | |
5179 | IN UINT64 Value \r | |
5180 | );\r | |
5181 | \r | |
5182 | \r | |
ac644614 | 5183 | /**\r |
5184 | Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r | |
5185 | \r | |
5186 | Determines the current execution mode of the CPU.\r | |
5187 | If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r | |
5188 | If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r | |
5189 | If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r | |
5190 | and -1 is returned.\r | |
1a2f870c | 5191 | This function is only available on Itanium processors.\r |
ac644614 | 5192 | \r |
17f695ed | 5193 | @retval 1 The CPU is in virtual mode.\r |
5194 | @retval 0 The CPU is in physical mode.\r | |
5195 | @retval -1 The CPU is in mixed mode.\r | |
ac644614 | 5196 | \r |
5197 | **/\r | |
5198 | INT64\r | |
5199 | EFIAPI\r | |
5200 | AsmCpuVirtual (\r | |
5201 | VOID\r | |
5202 | );\r | |
5203 | \r | |
5204 | \r | |
5205 | /**\r | |
5206 | Makes a PAL procedure call.\r | |
5207 | \r | |
5208 | This is a wrapper function to make a PAL procedure call. Based on the Index\r | |
5209 | value this API will make static or stacked PAL call. The following table\r | |
5210 | describes the usage of PAL Procedure Index Assignment. Architected procedures\r | |
5211 | may be designated as required or optional. If a PAL procedure is specified\r | |
5212 | as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r | |
5213 | Status field of the PAL_CALL_RETURN structure.\r | |
5214 | This indicates that the procedure is not present in this PAL implementation.\r | |
5215 | It is the caller's responsibility to check for this return code after calling\r | |
5216 | any optional PAL procedure.\r | |
5217 | No parameter checking is performed on the 5 input parameters, but there are\r | |
5218 | some common rules that the caller should follow when making a PAL call. Any\r | |
5219 | address passed to PAL as buffers for return parameters must be 8-byte aligned.\r | |
5220 | Unaligned addresses may cause undefined results. For those parameters defined\r | |
5221 | as reserved or some fields defined as reserved must be zero filled or the invalid\r | |
5222 | argument return value may be returned or undefined result may occur during the\r | |
5223 | execution of the procedure. If the PalEntryPoint does not point to a valid\r | |
5224 | PAL entry point then the system behavior is undefined. This function is only\r | |
1a2f870c | 5225 | available on Itanium processors.\r |
ac644614 | 5226 | \r |
ee6c452c | 5227 | @param PalEntryPoint The PAL procedure calls entry point.\r |
5228 | @param Index The PAL procedure Index number.\r | |
5229 | @param Arg2 The 2nd parameter for PAL procedure calls.\r | |
5230 | @param Arg3 The 3rd parameter for PAL procedure calls.\r | |
5231 | @param Arg4 The 4th parameter for PAL procedure calls.\r | |
ac644614 | 5232 | \r |
5233 | @return structure returned from the PAL Call procedure, including the status and return value.\r | |
5234 | \r | |
5235 | **/\r | |
5236 | PAL_CALL_RETURN\r | |
5237 | EFIAPI\r | |
5238 | AsmPalCall (\r | |
5239 | IN UINT64 PalEntryPoint,\r | |
5240 | IN UINT64 Index,\r | |
5241 | IN UINT64 Arg2,\r | |
5242 | IN UINT64 Arg3,\r | |
5243 | IN UINT64 Arg4\r | |
5244 | );\r | |
fd163050 | 5245 | #endif\r |
ac644614 | 5246 | \r |
fd163050 | 5247 | #if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r |
1106ffe1 | 5248 | ///\r |
af2dc6a7 | 5249 | /// IA32 and x64 Specific Functions.\r |
5250 | /// Byte packed structure for 16-bit Real Mode EFLAGS.\r | |
1106ffe1 | 5251 | ///\r |
ac644614 | 5252 | typedef union {\r |
5253 | struct {\r | |
af2dc6a7 | 5254 | UINT32 CF:1; ///< Carry Flag.\r |
5255 | UINT32 Reserved_0:1; ///< Reserved.\r | |
5256 | UINT32 PF:1; ///< Parity Flag.\r | |
5257 | UINT32 Reserved_1:1; ///< Reserved.\r | |
5258 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
5259 | UINT32 Reserved_2:1; ///< Reserved.\r | |
5260 | UINT32 ZF:1; ///< Zero Flag.\r | |
5261 | UINT32 SF:1; ///< Sign Flag.\r | |
5262 | UINT32 TF:1; ///< Trap Flag.\r | |
5263 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
5264 | UINT32 DF:1; ///< Direction Flag.\r | |
5265 | UINT32 OF:1; ///< Overflow Flag.\r | |
5266 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
5267 | UINT32 NT:1; ///< Nested Task.\r | |
5268 | UINT32 Reserved_3:1; ///< Reserved.\r | |
ac644614 | 5269 | } Bits;\r |
5270 | UINT16 Uint16;\r | |
5271 | } IA32_FLAGS16;\r | |
5272 | \r | |
1106ffe1 | 5273 | ///\r |
af2dc6a7 | 5274 | /// Byte packed structure for EFLAGS/RFLAGS.\r |
5275 | /// 32-bits on IA-32.\r | |
5276 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 5277 | ///\r |
ac644614 | 5278 | typedef union {\r |
5279 | struct {\r | |
af2dc6a7 | 5280 | UINT32 CF:1; ///< Carry Flag.\r |
5281 | UINT32 Reserved_0:1; ///< Reserved.\r | |
5282 | UINT32 PF:1; ///< Parity Flag.\r | |
5283 | UINT32 Reserved_1:1; ///< Reserved.\r | |
5284 | UINT32 AF:1; ///< Auxiliary Carry Flag.\r | |
5285 | UINT32 Reserved_2:1; ///< Reserved.\r | |
5286 | UINT32 ZF:1; ///< Zero Flag.\r | |
5287 | UINT32 SF:1; ///< Sign Flag.\r | |
5288 | UINT32 TF:1; ///< Trap Flag.\r | |
5289 | UINT32 IF:1; ///< Interrupt Enable Flag.\r | |
5290 | UINT32 DF:1; ///< Direction Flag.\r | |
5291 | UINT32 OF:1; ///< Overflow Flag.\r | |
5292 | UINT32 IOPL:2; ///< I/O Privilege Level.\r | |
5293 | UINT32 NT:1; ///< Nested Task.\r | |
5294 | UINT32 Reserved_3:1; ///< Reserved.\r | |
5295 | UINT32 RF:1; ///< Resume Flag.\r | |
5296 | UINT32 VM:1; ///< Virtual 8086 Mode.\r | |
5297 | UINT32 AC:1; ///< Alignment Check.\r | |
5298 | UINT32 VIF:1; ///< Virtual Interrupt Flag.\r | |
5299 | UINT32 VIP:1; ///< Virtual Interrupt Pending.\r | |
5300 | UINT32 ID:1; ///< ID Flag.\r | |
5301 | UINT32 Reserved_4:10; ///< Reserved.\r | |
ac644614 | 5302 | } Bits;\r |
5303 | UINTN UintN;\r | |
5304 | } IA32_EFLAGS32;\r | |
5305 | \r | |
1106ffe1 | 5306 | ///\r |
af2dc6a7 | 5307 | /// Byte packed structure for Control Register 0 (CR0).\r |
5308 | /// 32-bits on IA-32.\r | |
5309 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 5310 | ///\r |
ac644614 | 5311 | typedef union {\r |
5312 | struct {\r | |
af2dc6a7 | 5313 | UINT32 PE:1; ///< Protection Enable.\r |
5314 | UINT32 MP:1; ///< Monitor Coprocessor.\r | |
5315 | UINT32 EM:1; ///< Emulation.\r | |
5316 | UINT32 TS:1; ///< Task Switched.\r | |
5317 | UINT32 ET:1; ///< Extension Type.\r | |
5318 | UINT32 NE:1; ///< Numeric Error.\r | |
5319 | UINT32 Reserved_0:10; ///< Reserved.\r | |
5320 | UINT32 WP:1; ///< Write Protect.\r | |
5321 | UINT32 Reserved_1:1; ///< Reserved.\r | |
5322 | UINT32 AM:1; ///< Alignment Mask.\r | |
5323 | UINT32 Reserved_2:10; ///< Reserved.\r | |
5324 | UINT32 NW:1; ///< Mot Write-through.\r | |
5325 | UINT32 CD:1; ///< Cache Disable.\r | |
5326 | UINT32 PG:1; ///< Paging.\r | |
ac644614 | 5327 | } Bits;\r |
5328 | UINTN UintN;\r | |
5329 | } IA32_CR0;\r | |
5330 | \r | |
1106ffe1 | 5331 | ///\r |
af2dc6a7 | 5332 | /// Byte packed structure for Control Register 4 (CR4).\r |
5333 | /// 32-bits on IA-32.\r | |
5334 | /// 64-bits on x64. The upper 32-bits on x64 are reserved.\r | |
1106ffe1 | 5335 | ///\r |
ac644614 | 5336 | typedef union {\r |
5337 | struct {\r | |
af2dc6a7 | 5338 | UINT32 VME:1; ///< Virtual-8086 Mode Extensions.\r |
5339 | UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts.\r | |
5340 | UINT32 TSD:1; ///< Time Stamp Disable.\r | |
5341 | UINT32 DE:1; ///< Debugging Extensions.\r | |
5342 | UINT32 PSE:1; ///< Page Size Extensions.\r | |
5343 | UINT32 PAE:1; ///< Physical Address Extension.\r | |
5344 | UINT32 MCE:1; ///< Machine Check Enable.\r | |
5345 | UINT32 PGE:1; ///< Page Global Enable.\r | |
2a53dabf | 5346 | UINT32 PCE:1; ///< Performance Monitoring Counter\r |
af2dc6a7 | 5347 | ///< Enable.\r |
2a53dabf LG |
5348 | UINT32 OSFXSR:1; ///< Operating System Support for\r |
5349 | ///< FXSAVE and FXRSTOR instructions\r | |
5350 | UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r | |
5351 | ///< Unmasked SIMD Floating Point\r | |
af2dc6a7 | 5352 | ///< Exceptions.\r |
5353 | UINT32 Reserved_0:2; ///< Reserved.\r | |
2a53dabf | 5354 | UINT32 VMXE:1; ///< VMX Enable\r |
af2dc6a7 | 5355 | UINT32 Reserved_1:18; ///< Reserved.\r |
ac644614 | 5356 | } Bits;\r |
5357 | UINTN UintN;\r | |
5358 | } IA32_CR4;\r | |
5359 | \r | |
6088db38 | 5360 | ///\r |
5361 | /// Byte packed structure for a segment descriptor in a GDT/LDT.\r | |
5362 | ///\r | |
5363 | typedef union {\r | |
5364 | struct {\r | |
5365 | UINT32 LimitLow:16;\r | |
5366 | UINT32 BaseLow:16;\r | |
5367 | UINT32 BaseMid:8;\r | |
5368 | UINT32 Type:4;\r | |
5369 | UINT32 S:1;\r | |
5370 | UINT32 DPL:2;\r | |
5371 | UINT32 P:1;\r | |
5372 | UINT32 LimitHigh:4;\r | |
5373 | UINT32 AVL:1;\r | |
5374 | UINT32 L:1;\r | |
5375 | UINT32 DB:1;\r | |
5376 | UINT32 G:1;\r | |
5377 | UINT32 BaseHigh:8;\r | |
5378 | } Bits;\r | |
5379 | UINT64 Uint64;\r | |
5380 | } IA32_SEGMENT_DESCRIPTOR;\r | |
5381 | \r | |
1106ffe1 | 5382 | ///\r |
af2dc6a7 | 5383 | /// Byte packed structure for an IDTR, GDTR, LDTR descriptor.\r |
1106ffe1 | 5384 | ///\r |
ac644614 | 5385 | #pragma pack (1)\r |
5386 | typedef struct {\r | |
5387 | UINT16 Limit;\r | |
5388 | UINTN Base;\r | |
5389 | } IA32_DESCRIPTOR;\r | |
5390 | #pragma pack ()\r | |
5391 | \r | |
5392 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
5393 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
5394 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
5395 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
5396 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
5397 | \r | |
6f4aad3b | 5398 | \r |
5399 | #if defined (MDE_CPU_IA32)\r | |
1106ffe1 | 5400 | ///\r |
af2dc6a7 | 5401 | /// Byte packed structure for an IA-32 Interrupt Gate Descriptor.\r |
1106ffe1 | 5402 | ///\r |
dc317713 | 5403 | typedef union {\r |
5404 | struct {\r | |
af2dc6a7 | 5405 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
5406 | UINT32 Selector:16; ///< Selector.\r | |
5407 | UINT32 Reserved_0:8; ///< Reserved.\r | |
5408 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
5409 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
dc317713 | 5410 | } Bits;\r |
5411 | UINT64 Uint64;\r | |
5412 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
5413 | \r | |
5414 | #endif\r | |
5415 | \r | |
5416 | #if defined (MDE_CPU_X64)\r | |
6f4aad3b | 5417 | ///\r |
af2dc6a7 | 5418 | /// Byte packed structure for an x64 Interrupt Gate Descriptor.\r |
6f4aad3b | 5419 | ///\r |
ac644614 | 5420 | typedef union {\r |
5421 | struct {\r | |
af2dc6a7 | 5422 | UINT32 OffsetLow:16; ///< Offset bits 15..0.\r |
5423 | UINT32 Selector:16; ///< Selector.\r | |
5424 | UINT32 Reserved_0:8; ///< Reserved.\r | |
5425 | UINT32 GateType:8; ///< Gate Type. See #defines above.\r | |
5426 | UINT32 OffsetHigh:16; ///< Offset bits 31..16.\r | |
5427 | UINT32 OffsetUpper:32; ///< Offset bits 63..32.\r | |
5428 | UINT32 Reserved_1:32; ///< Reserved.\r | |
ac644614 | 5429 | } Bits;\r |
6f4aad3b | 5430 | struct {\r |
5431 | UINT64 Uint64;\r | |
5432 | UINT64 Uint64_1;\r | |
5433 | } Uint128; \r | |
ac644614 | 5434 | } IA32_IDT_GATE_DESCRIPTOR;\r |
5435 | \r | |
dc317713 | 5436 | #endif\r |
5437 | \r | |
1106ffe1 | 5438 | ///\r |
af2dc6a7 | 5439 | /// Byte packed structure for an FP/SSE/SSE2 context.\r |
1106ffe1 | 5440 | ///\r |
ac644614 | 5441 | typedef struct {\r |
5442 | UINT8 Buffer[512];\r | |
5443 | } IA32_FX_BUFFER;\r | |
5444 | \r | |
1106ffe1 | 5445 | ///\r |
af2dc6a7 | 5446 | /// Structures for the 16-bit real mode thunks.\r |
1106ffe1 | 5447 | ///\r |
ac644614 | 5448 | typedef struct {\r |
5449 | UINT32 Reserved1;\r | |
5450 | UINT32 Reserved2;\r | |
5451 | UINT32 Reserved3;\r | |
5452 | UINT32 Reserved4;\r | |
5453 | UINT8 BL;\r | |
5454 | UINT8 BH;\r | |
5455 | UINT16 Reserved5;\r | |
5456 | UINT8 DL;\r | |
5457 | UINT8 DH;\r | |
5458 | UINT16 Reserved6;\r | |
5459 | UINT8 CL;\r | |
5460 | UINT8 CH;\r | |
5461 | UINT16 Reserved7;\r | |
5462 | UINT8 AL;\r | |
5463 | UINT8 AH;\r | |
5464 | UINT16 Reserved8;\r | |
5465 | } IA32_BYTE_REGS;\r | |
5466 | \r | |
5467 | typedef struct {\r | |
5468 | UINT16 DI;\r | |
5469 | UINT16 Reserved1;\r | |
5470 | UINT16 SI;\r | |
5471 | UINT16 Reserved2;\r | |
5472 | UINT16 BP;\r | |
5473 | UINT16 Reserved3;\r | |
5474 | UINT16 SP;\r | |
5475 | UINT16 Reserved4;\r | |
5476 | UINT16 BX;\r | |
5477 | UINT16 Reserved5;\r | |
5478 | UINT16 DX;\r | |
5479 | UINT16 Reserved6;\r | |
5480 | UINT16 CX;\r | |
5481 | UINT16 Reserved7;\r | |
5482 | UINT16 AX;\r | |
5483 | UINT16 Reserved8;\r | |
5484 | } IA32_WORD_REGS;\r | |
5485 | \r | |
5486 | typedef struct {\r | |
5487 | UINT32 EDI;\r | |
5488 | UINT32 ESI;\r | |
5489 | UINT32 EBP;\r | |
5490 | UINT32 ESP;\r | |
5491 | UINT32 EBX;\r | |
5492 | UINT32 EDX;\r | |
5493 | UINT32 ECX;\r | |
5494 | UINT32 EAX;\r | |
5495 | UINT16 DS;\r | |
5496 | UINT16 ES;\r | |
5497 | UINT16 FS;\r | |
5498 | UINT16 GS;\r | |
5499 | IA32_EFLAGS32 EFLAGS;\r | |
5500 | UINT32 Eip;\r | |
5501 | UINT16 CS;\r | |
5502 | UINT16 SS;\r | |
5503 | } IA32_DWORD_REGS;\r | |
5504 | \r | |
5505 | typedef union {\r | |
5506 | IA32_DWORD_REGS E;\r | |
5507 | IA32_WORD_REGS X;\r | |
5508 | IA32_BYTE_REGS H;\r | |
5509 | } IA32_REGISTER_SET;\r | |
5510 | \r | |
1106ffe1 | 5511 | ///\r |
af2dc6a7 | 5512 | /// Byte packed structure for an 16-bit real mode thunks.\r |
1106ffe1 | 5513 | ///\r |
ac644614 | 5514 | typedef struct {\r |
5515 | IA32_REGISTER_SET *RealModeState;\r | |
5516 | VOID *RealModeBuffer;\r | |
5517 | UINT32 RealModeBufferSize;\r | |
5518 | UINT32 ThunkAttributes;\r | |
5519 | } THUNK_CONTEXT;\r | |
5520 | \r | |
5521 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
5522 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
5523 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
5524 | \r | |
5525 | /**\r | |
5526 | Retrieves CPUID information.\r | |
5527 | \r | |
5528 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
5529 | This function always returns Index.\r | |
5530 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5531 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5532 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5533 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
030cd1a2 | 5534 | This function is only available on IA-32 and x64.\r |
ac644614 | 5535 | \r |
5536 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
5537 | instruction.\r | |
af2dc6a7 | 5538 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5539 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5540 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5541 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5542 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5543 | instruction. This is an optional parameter that may be NULL.\r |
af2dc6a7 | 5544 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5545 | instruction. This is an optional parameter that may be NULL.\r |
5546 | \r | |
2fe241a2 | 5547 | @return Index.\r |
ac644614 | 5548 | \r |
5549 | **/\r | |
5550 | UINT32\r | |
5551 | EFIAPI\r | |
5552 | AsmCpuid (\r | |
5553 | IN UINT32 Index,\r | |
5554 | OUT UINT32 *Eax, OPTIONAL\r | |
5555 | OUT UINT32 *Ebx, OPTIONAL\r | |
5556 | OUT UINT32 *Ecx, OPTIONAL\r | |
5557 | OUT UINT32 *Edx OPTIONAL\r | |
5558 | );\r | |
5559 | \r | |
5560 | \r | |
5561 | /**\r | |
5562 | Retrieves CPUID information using an extended leaf identifier.\r | |
5563 | \r | |
5564 | Executes the CPUID instruction with EAX set to the value specified by Index\r | |
5565 | and ECX set to the value specified by SubIndex. This function always returns\r | |
5566 | Index. This function is only available on IA-32 and x64.\r | |
5567 | \r | |
5568 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
5569 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
5570 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
5571 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
5572 | \r | |
5573 | @param Index The 32-bit value to load into EAX prior to invoking the\r | |
5574 | CPUID instruction.\r | |
5575 | @param SubIndex The 32-bit value to load into ECX prior to invoking the\r | |
5576 | CPUID instruction.\r | |
af2dc6a7 | 5577 | @param Eax The pointer to the 32-bit EAX value returned by the CPUID\r |
ac644614 | 5578 | instruction. This is an optional parameter that may be\r |
5579 | NULL.\r | |
af2dc6a7 | 5580 | @param Ebx The pointer to the 32-bit EBX value returned by the CPUID\r |
ac644614 | 5581 | instruction. This is an optional parameter that may be\r |
5582 | NULL.\r | |
af2dc6a7 | 5583 | @param Ecx The pointer to the 32-bit ECX value returned by the CPUID\r |
ac644614 | 5584 | instruction. This is an optional parameter that may be\r |
5585 | NULL.\r | |
af2dc6a7 | 5586 | @param Edx The pointer to the 32-bit EDX value returned by the CPUID\r |
ac644614 | 5587 | instruction. This is an optional parameter that may be\r |
5588 | NULL.\r | |
5589 | \r | |
2fe241a2 | 5590 | @return Index.\r |
ac644614 | 5591 | \r |
5592 | **/\r | |
5593 | UINT32\r | |
5594 | EFIAPI\r | |
5595 | AsmCpuidEx (\r | |
5596 | IN UINT32 Index,\r | |
5597 | IN UINT32 SubIndex,\r | |
5598 | OUT UINT32 *Eax, OPTIONAL\r | |
5599 | OUT UINT32 *Ebx, OPTIONAL\r | |
5600 | OUT UINT32 *Ecx, OPTIONAL\r | |
5601 | OUT UINT32 *Edx OPTIONAL\r | |
5602 | );\r | |
5603 | \r | |
5604 | \r | |
be5f1614 | 5605 | /**\r |
5606 | Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r | |
5607 | \r | |
5608 | Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r | |
5609 | and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r | |
5610 | \r | |
5611 | **/\r | |
5612 | VOID\r | |
5613 | EFIAPI\r | |
5614 | AsmDisableCache (\r | |
5615 | VOID\r | |
5616 | );\r | |
5617 | \r | |
5618 | \r | |
5619 | /**\r | |
5620 | Perform a WBINVD and clear both the CD and NW bits of CR0.\r | |
5621 | \r | |
5622 | Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r | |
5623 | bits of CR0 to 0. This function is only available on IA-32 and x64.\r | |
5624 | \r | |
5625 | **/\r | |
5626 | VOID\r | |
5627 | EFIAPI\r | |
5628 | AsmEnableCache (\r | |
5629 | VOID\r | |
5630 | );\r | |
5631 | \r | |
5632 | \r | |
ac644614 | 5633 | /**\r |
5634 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
5635 | \r | |
5636 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
5637 | No parameter checking is performed on Index, and some Index values may cause\r | |
5638 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
5639 | caller must set up exception handlers to catch the exceptions. This function\r | |
030cd1a2 | 5640 | is only available on IA-32 and x64.\r |
ac644614 | 5641 | \r |
5642 | @param Index The 32-bit MSR index to read.\r | |
5643 | \r | |
5644 | @return The lower 32 bits of the MSR identified by Index.\r | |
5645 | \r | |
5646 | **/\r | |
5647 | UINT32\r | |
5648 | EFIAPI\r | |
5649 | AsmReadMsr32 (\r | |
5650 | IN UINT32 Index\r | |
5651 | );\r | |
5652 | \r | |
5653 | \r | |
5654 | /**\r | |
17f695ed | 5655 | Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r |
5656 | The upper 32-bits of the MSR are set to zero.\r | |
ac644614 | 5657 | \r |
5658 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
5659 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
5660 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
5661 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
5662 | that Index and Value are valid, or the caller must establish proper exception\r | |
030cd1a2 | 5663 | handlers. This function is only available on IA-32 and x64.\r |
ac644614 | 5664 | \r |
5665 | @param Index The 32-bit MSR index to write.\r | |
5666 | @param Value The 32-bit value to write to the MSR.\r | |
5667 | \r | |
5668 | @return Value\r | |
5669 | \r | |
5670 | **/\r | |
5671 | UINT32\r | |
5672 | EFIAPI\r | |
5673 | AsmWriteMsr32 (\r | |
5674 | IN UINT32 Index,\r | |
5675 | IN UINT32 Value\r | |
5676 | );\r | |
5677 | \r | |
5678 | \r | |
5679 | /**\r | |
62991af2 | 5680 | Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r |
ac644614 | 5681 | writes the result back to the 64-bit MSR.\r |
5682 | \r | |
62991af2 | 5683 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5684 | between the lower 32-bits of the read result and the value specified by\r |
5685 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
5686 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
5687 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
5688 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
5689 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5690 | IA-32 and x64.\r |
ac644614 | 5691 | \r |
5692 | @param Index The 32-bit MSR index to write.\r | |
5693 | @param OrData The value to OR with the read value from the MSR.\r | |
5694 | \r | |
5695 | @return The lower 32-bit value written to the MSR.\r | |
5696 | \r | |
5697 | **/\r | |
5698 | UINT32\r | |
5699 | EFIAPI\r | |
5700 | AsmMsrOr32 (\r | |
5701 | IN UINT32 Index,\r | |
5702 | IN UINT32 OrData\r | |
5703 | );\r | |
5704 | \r | |
5705 | \r | |
5706 | /**\r | |
5707 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
5708 | the result back to the 64-bit MSR.\r | |
5709 | \r | |
5710 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5711 | lower 32-bits of the read result and the value specified by AndData, and\r | |
5712 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
5713 | the value written to the MSR is returned. No parameter checking is performed\r | |
5714 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
5715 | must either guarantee that Index and AndData are valid, or the caller must\r | |
5716 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 5717 | and x64.\r |
ac644614 | 5718 | \r |
5719 | @param Index The 32-bit MSR index to write.\r | |
5720 | @param AndData The value to AND with the read value from the MSR.\r | |
5721 | \r | |
5722 | @return The lower 32-bit value written to the MSR.\r | |
5723 | \r | |
5724 | **/\r | |
5725 | UINT32\r | |
5726 | EFIAPI\r | |
5727 | AsmMsrAnd32 (\r | |
5728 | IN UINT32 Index,\r | |
5729 | IN UINT32 AndData\r | |
5730 | );\r | |
5731 | \r | |
5732 | \r | |
5733 | /**\r | |
62991af2 | 5734 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r |
ac644614 | 5735 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r |
5736 | \r | |
5737 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5738 | lower 32-bits of the read result and the value specified by AndData\r | |
62991af2 | 5739 | preserving the upper 32-bits, performs a bitwise OR between the\r |
ac644614 | 5740 | result of the AND operation and the value specified by OrData, and writes the\r |
5741 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
5742 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
5743 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
5744 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
5745 | caller must establish proper exception handlers. This function is only\r | |
030cd1a2 | 5746 | available on IA-32 and x64.\r |
ac644614 | 5747 | \r |
5748 | @param Index The 32-bit MSR index to write.\r | |
5749 | @param AndData The value to AND with the read value from the MSR.\r | |
5750 | @param OrData The value to OR with the result of the AND operation.\r | |
5751 | \r | |
5752 | @return The lower 32-bit value written to the MSR.\r | |
5753 | \r | |
5754 | **/\r | |
5755 | UINT32\r | |
5756 | EFIAPI\r | |
5757 | AsmMsrAndThenOr32 (\r | |
5758 | IN UINT32 Index,\r | |
5759 | IN UINT32 AndData,\r | |
5760 | IN UINT32 OrData\r | |
5761 | );\r | |
5762 | \r | |
5763 | \r | |
5764 | /**\r | |
5765 | Reads a bit field of an MSR.\r | |
5766 | \r | |
5767 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
5768 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
5769 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
5770 | must set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5771 | available on IA-32 and x64.\r |
ac644614 | 5772 | \r |
5773 | If StartBit is greater than 31, then ASSERT().\r | |
5774 | If EndBit is greater than 31, then ASSERT().\r | |
5775 | If EndBit is less than StartBit, then ASSERT().\r | |
5776 | \r | |
5777 | @param Index The 32-bit MSR index to read.\r | |
5778 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5779 | Range 0..31.\r | |
5780 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5781 | Range 0..31.\r | |
5782 | \r | |
5783 | @return The bit field read from the MSR.\r | |
5784 | \r | |
5785 | **/\r | |
5786 | UINT32\r | |
5787 | EFIAPI\r | |
5788 | AsmMsrBitFieldRead32 (\r | |
5789 | IN UINT32 Index,\r | |
5790 | IN UINTN StartBit,\r | |
5791 | IN UINTN EndBit\r | |
5792 | );\r | |
5793 | \r | |
5794 | \r | |
5795 | /**\r | |
5796 | Writes a bit field to an MSR.\r | |
5797 | \r | |
2fe241a2 | 5798 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r |
ac644614 | 5799 | field is specified by the StartBit and the EndBit. All other bits in the\r |
5800 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
62991af2 | 5801 | returned. The caller must either guarantee that Index and the data written \r |
5802 | is valid, or the caller must set up exception handlers to catch the exceptions. \r | |
5803 | This function is only available on IA-32 and x64.\r | |
ac644614 | 5804 | \r |
5805 | If StartBit is greater than 31, then ASSERT().\r | |
5806 | If EndBit is greater than 31, then ASSERT().\r | |
5807 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5808 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5809 | \r |
5810 | @param Index The 32-bit MSR index to write.\r | |
5811 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5812 | Range 0..31.\r | |
5813 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5814 | Range 0..31.\r | |
5815 | @param Value New value of the bit field.\r | |
5816 | \r | |
5817 | @return The lower 32-bit of the value written to the MSR.\r | |
5818 | \r | |
5819 | **/\r | |
5820 | UINT32\r | |
5821 | EFIAPI\r | |
5822 | AsmMsrBitFieldWrite32 (\r | |
5823 | IN UINT32 Index,\r | |
5824 | IN UINTN StartBit,\r | |
5825 | IN UINTN EndBit,\r | |
5826 | IN UINT32 Value\r | |
5827 | );\r | |
5828 | \r | |
5829 | \r | |
5830 | /**\r | |
5831 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
5832 | result back to the bit field in the 64-bit MSR.\r | |
5833 | \r | |
62991af2 | 5834 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5835 | between the read result and the value specified by OrData, and writes the\r |
5836 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
5837 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
5838 | caller must either guarantee that Index and the data written is valid, or\r | |
5839 | the caller must set up exception handlers to catch the exceptions. This\r | |
030cd1a2 | 5840 | function is only available on IA-32 and x64.\r |
ac644614 | 5841 | \r |
5842 | If StartBit is greater than 31, then ASSERT().\r | |
5843 | If EndBit is greater than 31, then ASSERT().\r | |
5844 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5845 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5846 | \r |
5847 | @param Index The 32-bit MSR index to write.\r | |
5848 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5849 | Range 0..31.\r | |
5850 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5851 | Range 0..31.\r | |
5852 | @param OrData The value to OR with the read value from the MSR.\r | |
5853 | \r | |
5854 | @return The lower 32-bit of the value written to the MSR.\r | |
5855 | \r | |
5856 | **/\r | |
5857 | UINT32\r | |
5858 | EFIAPI\r | |
5859 | AsmMsrBitFieldOr32 (\r | |
5860 | IN UINT32 Index,\r | |
5861 | IN UINTN StartBit,\r | |
5862 | IN UINTN EndBit,\r | |
5863 | IN UINT32 OrData\r | |
5864 | );\r | |
5865 | \r | |
5866 | \r | |
5867 | /**\r | |
5868 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
5869 | result back to the bit field in the 64-bit MSR.\r | |
5870 | \r | |
5871 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
5872 | read result and the value specified by AndData, and writes the result to the\r | |
5873 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
5874 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
5875 | either guarantee that Index and the data written is valid, or the caller must\r | |
5876 | set up exception handlers to catch the exceptions. This function is only\r | |
030cd1a2 | 5877 | available on IA-32 and x64.\r |
ac644614 | 5878 | \r |
5879 | If StartBit is greater than 31, then ASSERT().\r | |
5880 | If EndBit is greater than 31, then ASSERT().\r | |
5881 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 5882 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 5883 | \r |
5884 | @param Index The 32-bit MSR index to write.\r | |
5885 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5886 | Range 0..31.\r | |
5887 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5888 | Range 0..31.\r | |
5889 | @param AndData The value to AND with the read value from the MSR.\r | |
5890 | \r | |
5891 | @return The lower 32-bit of the value written to the MSR.\r | |
5892 | \r | |
5893 | **/\r | |
5894 | UINT32\r | |
5895 | EFIAPI\r | |
5896 | AsmMsrBitFieldAnd32 (\r | |
5897 | IN UINT32 Index,\r | |
5898 | IN UINTN StartBit,\r | |
5899 | IN UINTN EndBit,\r | |
5900 | IN UINT32 AndData\r | |
5901 | );\r | |
5902 | \r | |
5903 | \r | |
5904 | /**\r | |
5905 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 5906 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 5907 | 64-bit MSR.\r |
5908 | \r | |
5909 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
62991af2 | 5910 | bitwise OR between the read result and the value specified by\r |
ac644614 | 5911 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
5912 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
5913 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
5914 | that Index and the data written is valid, or the caller must set up exception\r | |
5915 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 5916 | and x64.\r |
ac644614 | 5917 | \r |
5918 | If StartBit is greater than 31, then ASSERT().\r | |
5919 | If EndBit is greater than 31, then ASSERT().\r | |
5920 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
5921 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
5922 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 5923 | \r |
5924 | @param Index The 32-bit MSR index to write.\r | |
5925 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
5926 | Range 0..31.\r | |
5927 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
5928 | Range 0..31.\r | |
5929 | @param AndData The value to AND with the read value from the MSR.\r | |
5930 | @param OrData The value to OR with the result of the AND operation.\r | |
5931 | \r | |
5932 | @return The lower 32-bit of the value written to the MSR.\r | |
5933 | \r | |
5934 | **/\r | |
5935 | UINT32\r | |
5936 | EFIAPI\r | |
5937 | AsmMsrBitFieldAndThenOr32 (\r | |
5938 | IN UINT32 Index,\r | |
5939 | IN UINTN StartBit,\r | |
5940 | IN UINTN EndBit,\r | |
5941 | IN UINT32 AndData,\r | |
5942 | IN UINT32 OrData\r | |
5943 | );\r | |
5944 | \r | |
5945 | \r | |
5946 | /**\r | |
5947 | Returns a 64-bit Machine Specific Register(MSR).\r | |
5948 | \r | |
5949 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
5950 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
5951 | caller must either guarantee that Index is valid, or the caller must set up\r | |
5952 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 5953 | on IA-32 and x64.\r |
ac644614 | 5954 | \r |
5955 | @param Index The 32-bit MSR index to read.\r | |
5956 | \r | |
5957 | @return The value of the MSR identified by Index.\r | |
5958 | \r | |
5959 | **/\r | |
5960 | UINT64\r | |
5961 | EFIAPI\r | |
5962 | AsmReadMsr64 (\r | |
5963 | IN UINT32 Index\r | |
5964 | );\r | |
5965 | \r | |
5966 | \r | |
5967 | /**\r | |
5968 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
5969 | value.\r | |
5970 | \r | |
5971 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
5972 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
5973 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
5974 | caller must either guarantee that Index and Value are valid, or the caller\r | |
5975 | must establish proper exception handlers. This function is only available on\r | |
030cd1a2 | 5976 | IA-32 and x64.\r |
ac644614 | 5977 | \r |
5978 | @param Index The 32-bit MSR index to write.\r | |
5979 | @param Value The 64-bit value to write to the MSR.\r | |
5980 | \r | |
5981 | @return Value\r | |
5982 | \r | |
5983 | **/\r | |
5984 | UINT64\r | |
5985 | EFIAPI\r | |
5986 | AsmWriteMsr64 (\r | |
5987 | IN UINT32 Index,\r | |
5988 | IN UINT64 Value\r | |
5989 | );\r | |
5990 | \r | |
5991 | \r | |
5992 | /**\r | |
62991af2 | 5993 | Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r |
ac644614 | 5994 | back to the 64-bit MSR.\r |
5995 | \r | |
62991af2 | 5996 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 5997 | between the read result and the value specified by OrData, and writes the\r |
5998 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
5999 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
6000 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
6001 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
030cd1a2 | 6002 | This function is only available on IA-32 and x64.\r |
ac644614 | 6003 | \r |
6004 | @param Index The 32-bit MSR index to write.\r | |
6005 | @param OrData The value to OR with the read value from the MSR.\r | |
6006 | \r | |
6007 | @return The value written back to the MSR.\r | |
6008 | \r | |
6009 | **/\r | |
6010 | UINT64\r | |
6011 | EFIAPI\r | |
6012 | AsmMsrOr64 (\r | |
6013 | IN UINT32 Index,\r | |
6014 | IN UINT64 OrData\r | |
6015 | );\r | |
6016 | \r | |
6017 | \r | |
6018 | /**\r | |
6019 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
6020 | 64-bit MSR.\r | |
6021 | \r | |
6022 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
6023 | read result and the value specified by OrData, and writes the result to the\r | |
6024 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
6025 | parameter checking is performed on Index or OrData, and some of these may\r | |
6026 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
6027 | are valid, or the caller must establish proper exception handlers. This\r | |
030cd1a2 | 6028 | function is only available on IA-32 and x64.\r |
ac644614 | 6029 | \r |
6030 | @param Index The 32-bit MSR index to write.\r | |
6031 | @param AndData The value to AND with the read value from the MSR.\r | |
6032 | \r | |
6033 | @return The value written back to the MSR.\r | |
6034 | \r | |
6035 | **/\r | |
6036 | UINT64\r | |
6037 | EFIAPI\r | |
6038 | AsmMsrAnd64 (\r | |
6039 | IN UINT32 Index,\r | |
6040 | IN UINT64 AndData\r | |
6041 | );\r | |
6042 | \r | |
6043 | \r | |
6044 | /**\r | |
62991af2 | 6045 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r |
ac644614 | 6046 | OR, and writes the result back to the 64-bit MSR.\r |
6047 | \r | |
6048 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
62991af2 | 6049 | result and the value specified by AndData, performs a bitwise OR\r |
ac644614 | 6050 | between the result of the AND operation and the value specified by OrData,\r |
6051 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
6052 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
6053 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
6054 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
6055 | establish proper exception handlers. This function is only available on IA-32\r | |
030cd1a2 | 6056 | and x64.\r |
ac644614 | 6057 | \r |
6058 | @param Index The 32-bit MSR index to write.\r | |
6059 | @param AndData The value to AND with the read value from the MSR.\r | |
6060 | @param OrData The value to OR with the result of the AND operation.\r | |
6061 | \r | |
6062 | @return The value written back to the MSR.\r | |
6063 | \r | |
6064 | **/\r | |
6065 | UINT64\r | |
6066 | EFIAPI\r | |
6067 | AsmMsrAndThenOr64 (\r | |
6068 | IN UINT32 Index,\r | |
6069 | IN UINT64 AndData,\r | |
6070 | IN UINT64 OrData\r | |
6071 | );\r | |
6072 | \r | |
6073 | \r | |
6074 | /**\r | |
6075 | Reads a bit field of an MSR.\r | |
6076 | \r | |
6077 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
6078 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
6079 | must either guarantee that Index is valid, or the caller must set up\r | |
6080 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 6081 | on IA-32 and x64.\r |
ac644614 | 6082 | \r |
6083 | If StartBit is greater than 63, then ASSERT().\r | |
6084 | If EndBit is greater than 63, then ASSERT().\r | |
6085 | If EndBit is less than StartBit, then ASSERT().\r | |
6086 | \r | |
6087 | @param Index The 32-bit MSR index to read.\r | |
6088 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6089 | Range 0..63.\r | |
6090 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6091 | Range 0..63.\r | |
6092 | \r | |
6093 | @return The value read from the MSR.\r | |
6094 | \r | |
6095 | **/\r | |
6096 | UINT64\r | |
6097 | EFIAPI\r | |
6098 | AsmMsrBitFieldRead64 (\r | |
6099 | IN UINT32 Index,\r | |
6100 | IN UINTN StartBit,\r | |
6101 | IN UINTN EndBit\r | |
6102 | );\r | |
6103 | \r | |
6104 | \r | |
6105 | /**\r | |
6106 | Writes a bit field to an MSR.\r | |
6107 | \r | |
6108 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
6109 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
62991af2 | 6110 | preserved. The MSR written is returned. The caller must either guarantee \r |
6111 | that Index and the data written is valid, or the caller must set up exception \r | |
6112 | handlers to catch the exceptions. This function is only available on IA-32 and x64.\r | |
ac644614 | 6113 | \r |
6114 | If StartBit is greater than 63, then ASSERT().\r | |
6115 | If EndBit is greater than 63, then ASSERT().\r | |
6116 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 6117 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 6118 | \r |
6119 | @param Index The 32-bit MSR index to write.\r | |
6120 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6121 | Range 0..63.\r | |
6122 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6123 | Range 0..63.\r | |
6124 | @param Value New value of the bit field.\r | |
6125 | \r | |
6126 | @return The value written back to the MSR.\r | |
6127 | \r | |
6128 | **/\r | |
6129 | UINT64\r | |
6130 | EFIAPI\r | |
6131 | AsmMsrBitFieldWrite64 (\r | |
6132 | IN UINT32 Index,\r | |
6133 | IN UINTN StartBit,\r | |
6134 | IN UINTN EndBit,\r | |
6135 | IN UINT64 Value\r | |
6136 | );\r | |
6137 | \r | |
6138 | \r | |
6139 | /**\r | |
62991af2 | 6140 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r |
ac644614 | 6141 | writes the result back to the bit field in the 64-bit MSR.\r |
6142 | \r | |
62991af2 | 6143 | Reads the 64-bit MSR specified by Index, performs a bitwise OR\r |
ac644614 | 6144 | between the read result and the value specified by OrData, and writes the\r |
6145 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
6146 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
6147 | guarantee that Index and the data written is valid, or the caller must set up\r | |
6148 | exception handlers to catch the exceptions. This function is only available\r | |
030cd1a2 | 6149 | on IA-32 and x64.\r |
ac644614 | 6150 | \r |
6151 | If StartBit is greater than 63, then ASSERT().\r | |
6152 | If EndBit is greater than 63, then ASSERT().\r | |
6153 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 6154 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 6155 | \r |
6156 | @param Index The 32-bit MSR index to write.\r | |
6157 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6158 | Range 0..63.\r | |
6159 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6160 | Range 0..63.\r | |
6161 | @param OrData The value to OR with the read value from the bit field.\r | |
6162 | \r | |
6163 | @return The value written back to the MSR.\r | |
6164 | \r | |
6165 | **/\r | |
6166 | UINT64\r | |
6167 | EFIAPI\r | |
6168 | AsmMsrBitFieldOr64 (\r | |
6169 | IN UINT32 Index,\r | |
6170 | IN UINTN StartBit,\r | |
6171 | IN UINTN EndBit,\r | |
6172 | IN UINT64 OrData\r | |
6173 | );\r | |
6174 | \r | |
6175 | \r | |
6176 | /**\r | |
6177 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
6178 | result back to the bit field in the 64-bit MSR.\r | |
6179 | \r | |
6180 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
6181 | read result and the value specified by AndData, and writes the result to the\r | |
6182 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
6183 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
6184 | that Index and the data written is valid, or the caller must set up exception\r | |
6185 | handlers to catch the exceptions. This function is only available on IA-32\r | |
030cd1a2 | 6186 | and x64.\r |
ac644614 | 6187 | \r |
6188 | If StartBit is greater than 63, then ASSERT().\r | |
6189 | If EndBit is greater than 63, then ASSERT().\r | |
6190 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 | 6191 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
ac644614 | 6192 | \r |
6193 | @param Index The 32-bit MSR index to write.\r | |
6194 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6195 | Range 0..63.\r | |
6196 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6197 | Range 0..63.\r | |
6198 | @param AndData The value to AND with the read value from the bit field.\r | |
6199 | \r | |
6200 | @return The value written back to the MSR.\r | |
6201 | \r | |
6202 | **/\r | |
6203 | UINT64\r | |
6204 | EFIAPI\r | |
6205 | AsmMsrBitFieldAnd64 (\r | |
6206 | IN UINT32 Index,\r | |
6207 | IN UINTN StartBit,\r | |
6208 | IN UINTN EndBit,\r | |
6209 | IN UINT64 AndData\r | |
6210 | );\r | |
6211 | \r | |
6212 | \r | |
6213 | /**\r | |
6214 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
62991af2 | 6215 | bitwise OR, and writes the result back to the bit field in the\r |
ac644614 | 6216 | 64-bit MSR.\r |
6217 | \r | |
6218 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
62991af2 | 6219 | a bitwise OR between the read result and the value specified by\r |
ac644614 | 6220 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r |
6221 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
6222 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
6223 | written is valid, or the caller must set up exception handlers to catch the\r | |
030cd1a2 | 6224 | exceptions. This function is only available on IA-32 and x64.\r |
ac644614 | 6225 | \r |
6226 | If StartBit is greater than 63, then ASSERT().\r | |
6227 | If EndBit is greater than 63, then ASSERT().\r | |
6228 | If EndBit is less than StartBit, then ASSERT().\r | |
94952554 LG |
6229 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
6230 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
ac644614 | 6231 | \r |
6232 | @param Index The 32-bit MSR index to write.\r | |
6233 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
6234 | Range 0..63.\r | |
6235 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
6236 | Range 0..63.\r | |
6237 | @param AndData The value to AND with the read value from the bit field.\r | |
6238 | @param OrData The value to OR with the result of the AND operation.\r | |
6239 | \r | |
6240 | @return The value written back to the MSR.\r | |
6241 | \r | |
6242 | **/\r | |
6243 | UINT64\r | |
6244 | EFIAPI\r | |
6245 | AsmMsrBitFieldAndThenOr64 (\r | |
6246 | IN UINT32 Index,\r | |
6247 | IN UINTN StartBit,\r | |
6248 | IN UINTN EndBit,\r | |
6249 | IN UINT64 AndData,\r | |
6250 | IN UINT64 OrData\r | |
6251 | );\r | |
6252 | \r | |
6253 | \r | |
6254 | /**\r | |
6255 | Reads the current value of the EFLAGS register.\r | |
6256 | \r | |
6257 | Reads and returns the current value of the EFLAGS register. This function is\r | |
030cd1a2 | 6258 | only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r |
6259 | 64-bit value on x64.\r | |
ac644614 | 6260 | \r |
030cd1a2 | 6261 | @return EFLAGS on IA-32 or RFLAGS on x64.\r |
ac644614 | 6262 | \r |
6263 | **/\r | |
6264 | UINTN\r | |
6265 | EFIAPI\r | |
6266 | AsmReadEflags (\r | |
6267 | VOID\r | |
6268 | );\r | |
6269 | \r | |
6270 | \r | |
6271 | /**\r | |
6272 | Reads the current value of the Control Register 0 (CR0).\r | |
6273 | \r | |
6274 | Reads and returns the current value of CR0. This function is only available\r | |
030cd1a2 | 6275 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6276 | x64.\r | |
ac644614 | 6277 | \r |
6278 | @return The value of the Control Register 0 (CR0).\r | |
6279 | \r | |
6280 | **/\r | |
6281 | UINTN\r | |
6282 | EFIAPI\r | |
6283 | AsmReadCr0 (\r | |
6284 | VOID\r | |
6285 | );\r | |
6286 | \r | |
6287 | \r | |
6288 | /**\r | |
6289 | Reads the current value of the Control Register 2 (CR2).\r | |
6290 | \r | |
6291 | Reads and returns the current value of CR2. This function is only available\r | |
030cd1a2 | 6292 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6293 | x64.\r | |
ac644614 | 6294 | \r |
6295 | @return The value of the Control Register 2 (CR2).\r | |
6296 | \r | |
6297 | **/\r | |
6298 | UINTN\r | |
6299 | EFIAPI\r | |
6300 | AsmReadCr2 (\r | |
6301 | VOID\r | |
6302 | );\r | |
6303 | \r | |
6304 | \r | |
6305 | /**\r | |
6306 | Reads the current value of the Control Register 3 (CR3).\r | |
6307 | \r | |
6308 | Reads and returns the current value of CR3. This function is only available\r | |
030cd1a2 | 6309 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6310 | x64.\r | |
ac644614 | 6311 | \r |
6312 | @return The value of the Control Register 3 (CR3).\r | |
6313 | \r | |
6314 | **/\r | |
6315 | UINTN\r | |
6316 | EFIAPI\r | |
6317 | AsmReadCr3 (\r | |
6318 | VOID\r | |
6319 | );\r | |
6320 | \r | |
6321 | \r | |
6322 | /**\r | |
6323 | Reads the current value of the Control Register 4 (CR4).\r | |
6324 | \r | |
6325 | Reads and returns the current value of CR4. This function is only available\r | |
030cd1a2 | 6326 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6327 | x64.\r | |
ac644614 | 6328 | \r |
6329 | @return The value of the Control Register 4 (CR4).\r | |
6330 | \r | |
6331 | **/\r | |
6332 | UINTN\r | |
6333 | EFIAPI\r | |
6334 | AsmReadCr4 (\r | |
6335 | VOID\r | |
6336 | );\r | |
6337 | \r | |
6338 | \r | |
6339 | /**\r | |
6340 | Writes a value to Control Register 0 (CR0).\r | |
6341 | \r | |
6342 | Writes and returns a new value to CR0. This function is only available on\r | |
030cd1a2 | 6343 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6344 | \r |
6345 | @param Cr0 The value to write to CR0.\r | |
6346 | \r | |
6347 | @return The value written to CR0.\r | |
6348 | \r | |
6349 | **/\r | |
6350 | UINTN\r | |
6351 | EFIAPI\r | |
6352 | AsmWriteCr0 (\r | |
6353 | UINTN Cr0\r | |
6354 | );\r | |
6355 | \r | |
6356 | \r | |
6357 | /**\r | |
6358 | Writes a value to Control Register 2 (CR2).\r | |
6359 | \r | |
6360 | Writes and returns a new value to CR2. This function is only available on\r | |
030cd1a2 | 6361 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6362 | \r |
6363 | @param Cr2 The value to write to CR2.\r | |
6364 | \r | |
6365 | @return The value written to CR2.\r | |
6366 | \r | |
6367 | **/\r | |
6368 | UINTN\r | |
6369 | EFIAPI\r | |
6370 | AsmWriteCr2 (\r | |
6371 | UINTN Cr2\r | |
6372 | );\r | |
6373 | \r | |
6374 | \r | |
6375 | /**\r | |
6376 | Writes a value to Control Register 3 (CR3).\r | |
6377 | \r | |
6378 | Writes and returns a new value to CR3. This function is only available on\r | |
030cd1a2 | 6379 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6380 | \r |
6381 | @param Cr3 The value to write to CR3.\r | |
6382 | \r | |
6383 | @return The value written to CR3.\r | |
6384 | \r | |
6385 | **/\r | |
6386 | UINTN\r | |
6387 | EFIAPI\r | |
6388 | AsmWriteCr3 (\r | |
6389 | UINTN Cr3\r | |
6390 | );\r | |
6391 | \r | |
6392 | \r | |
6393 | /**\r | |
6394 | Writes a value to Control Register 4 (CR4).\r | |
6395 | \r | |
6396 | Writes and returns a new value to CR4. This function is only available on\r | |
030cd1a2 | 6397 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6398 | \r |
6399 | @param Cr4 The value to write to CR4.\r | |
6400 | \r | |
6401 | @return The value written to CR4.\r | |
6402 | \r | |
6403 | **/\r | |
6404 | UINTN\r | |
6405 | EFIAPI\r | |
6406 | AsmWriteCr4 (\r | |
6407 | UINTN Cr4\r | |
6408 | );\r | |
6409 | \r | |
6410 | \r | |
6411 | /**\r | |
6412 | Reads the current value of Debug Register 0 (DR0).\r | |
6413 | \r | |
6414 | Reads and returns the current value of DR0. This function is only available\r | |
030cd1a2 | 6415 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6416 | x64.\r | |
ac644614 | 6417 | \r |
6418 | @return The value of Debug Register 0 (DR0).\r | |
6419 | \r | |
6420 | **/\r | |
6421 | UINTN\r | |
6422 | EFIAPI\r | |
6423 | AsmReadDr0 (\r | |
6424 | VOID\r | |
6425 | );\r | |
6426 | \r | |
6427 | \r | |
6428 | /**\r | |
6429 | Reads the current value of Debug Register 1 (DR1).\r | |
6430 | \r | |
6431 | Reads and returns the current value of DR1. This function is only available\r | |
030cd1a2 | 6432 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6433 | x64.\r | |
ac644614 | 6434 | \r |
6435 | @return The value of Debug Register 1 (DR1).\r | |
6436 | \r | |
6437 | **/\r | |
6438 | UINTN\r | |
6439 | EFIAPI\r | |
6440 | AsmReadDr1 (\r | |
6441 | VOID\r | |
6442 | );\r | |
6443 | \r | |
6444 | \r | |
6445 | /**\r | |
6446 | Reads the current value of Debug Register 2 (DR2).\r | |
6447 | \r | |
6448 | Reads and returns the current value of DR2. This function is only available\r | |
030cd1a2 | 6449 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6450 | x64.\r | |
ac644614 | 6451 | \r |
6452 | @return The value of Debug Register 2 (DR2).\r | |
6453 | \r | |
6454 | **/\r | |
6455 | UINTN\r | |
6456 | EFIAPI\r | |
6457 | AsmReadDr2 (\r | |
6458 | VOID\r | |
6459 | );\r | |
6460 | \r | |
6461 | \r | |
6462 | /**\r | |
6463 | Reads the current value of Debug Register 3 (DR3).\r | |
6464 | \r | |
6465 | Reads and returns the current value of DR3. This function is only available\r | |
030cd1a2 | 6466 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6467 | x64.\r | |
ac644614 | 6468 | \r |
6469 | @return The value of Debug Register 3 (DR3).\r | |
6470 | \r | |
6471 | **/\r | |
6472 | UINTN\r | |
6473 | EFIAPI\r | |
6474 | AsmReadDr3 (\r | |
6475 | VOID\r | |
6476 | );\r | |
6477 | \r | |
6478 | \r | |
6479 | /**\r | |
6480 | Reads the current value of Debug Register 4 (DR4).\r | |
6481 | \r | |
6482 | Reads and returns the current value of DR4. This function is only available\r | |
030cd1a2 | 6483 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6484 | x64.\r | |
ac644614 | 6485 | \r |
6486 | @return The value of Debug Register 4 (DR4).\r | |
6487 | \r | |
6488 | **/\r | |
6489 | UINTN\r | |
6490 | EFIAPI\r | |
6491 | AsmReadDr4 (\r | |
6492 | VOID\r | |
6493 | );\r | |
6494 | \r | |
6495 | \r | |
6496 | /**\r | |
6497 | Reads the current value of Debug Register 5 (DR5).\r | |
6498 | \r | |
6499 | Reads and returns the current value of DR5. This function is only available\r | |
030cd1a2 | 6500 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6501 | x64.\r | |
ac644614 | 6502 | \r |
6503 | @return The value of Debug Register 5 (DR5).\r | |
6504 | \r | |
6505 | **/\r | |
6506 | UINTN\r | |
6507 | EFIAPI\r | |
6508 | AsmReadDr5 (\r | |
6509 | VOID\r | |
6510 | );\r | |
6511 | \r | |
6512 | \r | |
6513 | /**\r | |
6514 | Reads the current value of Debug Register 6 (DR6).\r | |
6515 | \r | |
6516 | Reads and returns the current value of DR6. This function is only available\r | |
030cd1a2 | 6517 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6518 | x64.\r | |
ac644614 | 6519 | \r |
6520 | @return The value of Debug Register 6 (DR6).\r | |
6521 | \r | |
6522 | **/\r | |
6523 | UINTN\r | |
6524 | EFIAPI\r | |
6525 | AsmReadDr6 (\r | |
6526 | VOID\r | |
6527 | );\r | |
6528 | \r | |
6529 | \r | |
6530 | /**\r | |
6531 | Reads the current value of Debug Register 7 (DR7).\r | |
6532 | \r | |
6533 | Reads and returns the current value of DR7. This function is only available\r | |
030cd1a2 | 6534 | on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r |
6535 | x64.\r | |
ac644614 | 6536 | \r |
6537 | @return The value of Debug Register 7 (DR7).\r | |
6538 | \r | |
6539 | **/\r | |
6540 | UINTN\r | |
6541 | EFIAPI\r | |
6542 | AsmReadDr7 (\r | |
6543 | VOID\r | |
6544 | );\r | |
6545 | \r | |
6546 | \r | |
6547 | /**\r | |
6548 | Writes a value to Debug Register 0 (DR0).\r | |
6549 | \r | |
6550 | Writes and returns a new value to DR0. This function is only available on\r | |
030cd1a2 | 6551 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6552 | \r |
6553 | @param Dr0 The value to write to Dr0.\r | |
6554 | \r | |
6555 | @return The value written to Debug Register 0 (DR0).\r | |
6556 | \r | |
6557 | **/\r | |
6558 | UINTN\r | |
6559 | EFIAPI\r | |
6560 | AsmWriteDr0 (\r | |
6561 | UINTN Dr0\r | |
6562 | );\r | |
6563 | \r | |
6564 | \r | |
6565 | /**\r | |
6566 | Writes a value to Debug Register 1 (DR1).\r | |
6567 | \r | |
6568 | Writes and returns a new value to DR1. This function is only available on\r | |
030cd1a2 | 6569 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6570 | \r |
6571 | @param Dr1 The value to write to Dr1.\r | |
6572 | \r | |
6573 | @return The value written to Debug Register 1 (DR1).\r | |
6574 | \r | |
6575 | **/\r | |
6576 | UINTN\r | |
6577 | EFIAPI\r | |
6578 | AsmWriteDr1 (\r | |
6579 | UINTN Dr1\r | |
6580 | );\r | |
6581 | \r | |
6582 | \r | |
6583 | /**\r | |
6584 | Writes a value to Debug Register 2 (DR2).\r | |
6585 | \r | |
6586 | Writes and returns a new value to DR2. This function is only available on\r | |
030cd1a2 | 6587 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6588 | \r |
6589 | @param Dr2 The value to write to Dr2.\r | |
6590 | \r | |
6591 | @return The value written to Debug Register 2 (DR2).\r | |
6592 | \r | |
6593 | **/\r | |
6594 | UINTN\r | |
6595 | EFIAPI\r | |
6596 | AsmWriteDr2 (\r | |
6597 | UINTN Dr2\r | |
6598 | );\r | |
6599 | \r | |
6600 | \r | |
6601 | /**\r | |
6602 | Writes a value to Debug Register 3 (DR3).\r | |
6603 | \r | |
6604 | Writes and returns a new value to DR3. This function is only available on\r | |
030cd1a2 | 6605 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6606 | \r |
6607 | @param Dr3 The value to write to Dr3.\r | |
6608 | \r | |
6609 | @return The value written to Debug Register 3 (DR3).\r | |
6610 | \r | |
6611 | **/\r | |
6612 | UINTN\r | |
6613 | EFIAPI\r | |
6614 | AsmWriteDr3 (\r | |
6615 | UINTN Dr3\r | |
6616 | );\r | |
6617 | \r | |
6618 | \r | |
6619 | /**\r | |
6620 | Writes a value to Debug Register 4 (DR4).\r | |
6621 | \r | |
6622 | Writes and returns a new value to DR4. This function is only available on\r | |
030cd1a2 | 6623 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6624 | \r |
6625 | @param Dr4 The value to write to Dr4.\r | |
6626 | \r | |
6627 | @return The value written to Debug Register 4 (DR4).\r | |
6628 | \r | |
6629 | **/\r | |
6630 | UINTN\r | |
6631 | EFIAPI\r | |
6632 | AsmWriteDr4 (\r | |
6633 | UINTN Dr4\r | |
6634 | );\r | |
6635 | \r | |
6636 | \r | |
6637 | /**\r | |
6638 | Writes a value to Debug Register 5 (DR5).\r | |
6639 | \r | |
6640 | Writes and returns a new value to DR5. This function is only available on\r | |
030cd1a2 | 6641 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6642 | \r |
6643 | @param Dr5 The value to write to Dr5.\r | |
6644 | \r | |
6645 | @return The value written to Debug Register 5 (DR5).\r | |
6646 | \r | |
6647 | **/\r | |
6648 | UINTN\r | |
6649 | EFIAPI\r | |
6650 | AsmWriteDr5 (\r | |
6651 | UINTN Dr5\r | |
6652 | );\r | |
6653 | \r | |
6654 | \r | |
6655 | /**\r | |
6656 | Writes a value to Debug Register 6 (DR6).\r | |
6657 | \r | |
6658 | Writes and returns a new value to DR6. This function is only available on\r | |
030cd1a2 | 6659 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6660 | \r |
6661 | @param Dr6 The value to write to Dr6.\r | |
6662 | \r | |
6663 | @return The value written to Debug Register 6 (DR6).\r | |
6664 | \r | |
6665 | **/\r | |
6666 | UINTN\r | |
6667 | EFIAPI\r | |
6668 | AsmWriteDr6 (\r | |
6669 | UINTN Dr6\r | |
6670 | );\r | |
6671 | \r | |
6672 | \r | |
6673 | /**\r | |
6674 | Writes a value to Debug Register 7 (DR7).\r | |
6675 | \r | |
6676 | Writes and returns a new value to DR7. This function is only available on\r | |
030cd1a2 | 6677 | IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r |
ac644614 | 6678 | \r |
6679 | @param Dr7 The value to write to Dr7.\r | |
6680 | \r | |
6681 | @return The value written to Debug Register 7 (DR7).\r | |
6682 | \r | |
6683 | **/\r | |
6684 | UINTN\r | |
6685 | EFIAPI\r | |
6686 | AsmWriteDr7 (\r | |
6687 | UINTN Dr7\r | |
6688 | );\r | |
6689 | \r | |
6690 | \r | |
6691 | /**\r | |
6692 | Reads the current value of Code Segment Register (CS).\r | |
6693 | \r | |
6694 | Reads and returns the current value of CS. This function is only available on\r | |
030cd1a2 | 6695 | IA-32 and x64.\r |
ac644614 | 6696 | \r |
6697 | @return The current value of CS.\r | |
6698 | \r | |
6699 | **/\r | |
6700 | UINT16\r | |
6701 | EFIAPI\r | |
6702 | AsmReadCs (\r | |
6703 | VOID\r | |
6704 | );\r | |
6705 | \r | |
6706 | \r | |
6707 | /**\r | |
6708 | Reads the current value of Data Segment Register (DS).\r | |
6709 | \r | |
6710 | Reads and returns the current value of DS. This function is only available on\r | |
030cd1a2 | 6711 | IA-32 and x64.\r |
ac644614 | 6712 | \r |
6713 | @return The current value of DS.\r | |
6714 | \r | |
6715 | **/\r | |
6716 | UINT16\r | |
6717 | EFIAPI\r | |
6718 | AsmReadDs (\r | |
6719 | VOID\r | |
6720 | );\r | |
6721 | \r | |
6722 | \r | |
6723 | /**\r | |
6724 | Reads the current value of Extra Segment Register (ES).\r | |
6725 | \r | |
6726 | Reads and returns the current value of ES. This function is only available on\r | |
030cd1a2 | 6727 | IA-32 and x64.\r |
ac644614 | 6728 | \r |
6729 | @return The current value of ES.\r | |
6730 | \r | |
6731 | **/\r | |
6732 | UINT16\r | |
6733 | EFIAPI\r | |
6734 | AsmReadEs (\r | |
6735 | VOID\r | |
6736 | );\r | |
6737 | \r | |
6738 | \r | |
6739 | /**\r | |
6740 | Reads the current value of FS Data Segment Register (FS).\r | |
6741 | \r | |
6742 | Reads and returns the current value of FS. This function is only available on\r | |
030cd1a2 | 6743 | IA-32 and x64.\r |
ac644614 | 6744 | \r |
6745 | @return The current value of FS.\r | |
6746 | \r | |
6747 | **/\r | |
6748 | UINT16\r | |
6749 | EFIAPI\r | |
6750 | AsmReadFs (\r | |
6751 | VOID\r | |
6752 | );\r | |
6753 | \r | |
6754 | \r | |
6755 | /**\r | |
6756 | Reads the current value of GS Data Segment Register (GS).\r | |
6757 | \r | |
6758 | Reads and returns the current value of GS. This function is only available on\r | |
030cd1a2 | 6759 | IA-32 and x64.\r |
ac644614 | 6760 | \r |
6761 | @return The current value of GS.\r | |
6762 | \r | |
6763 | **/\r | |
6764 | UINT16\r | |
6765 | EFIAPI\r | |
6766 | AsmReadGs (\r | |
6767 | VOID\r | |
6768 | );\r | |
6769 | \r | |
6770 | \r | |
6771 | /**\r | |
6772 | Reads the current value of Stack Segment Register (SS).\r | |
6773 | \r | |
6774 | Reads and returns the current value of SS. This function is only available on\r | |
030cd1a2 | 6775 | IA-32 and x64.\r |
ac644614 | 6776 | \r |
6777 | @return The current value of SS.\r | |
6778 | \r | |
6779 | **/\r | |
6780 | UINT16\r | |
6781 | EFIAPI\r | |
6782 | AsmReadSs (\r | |
6783 | VOID\r | |
6784 | );\r | |
6785 | \r | |
6786 | \r | |
6787 | /**\r | |
6788 | Reads the current value of Task Register (TR).\r | |
6789 | \r | |
6790 | Reads and returns the current value of TR. This function is only available on\r | |
030cd1a2 | 6791 | IA-32 and x64.\r |
ac644614 | 6792 | \r |
6793 | @return The current value of TR.\r | |
6794 | \r | |
6795 | **/\r | |
6796 | UINT16\r | |
6797 | EFIAPI\r | |
6798 | AsmReadTr (\r | |
6799 | VOID\r | |
6800 | );\r | |
6801 | \r | |
6802 | \r | |
6803 | /**\r | |
6804 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
6805 | \r | |
6806 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
030cd1a2 | 6807 | function is only available on IA-32 and x64.\r |
ac644614 | 6808 | \r |
6809 | If Gdtr is NULL, then ASSERT().\r | |
6810 | \r | |
af2dc6a7 | 6811 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6812 | \r |
6813 | **/\r | |
6814 | VOID\r | |
6815 | EFIAPI\r | |
6816 | AsmReadGdtr (\r | |
6817 | OUT IA32_DESCRIPTOR *Gdtr\r | |
6818 | );\r | |
6819 | \r | |
6820 | \r | |
6821 | /**\r | |
6822 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
6823 | \r | |
6824 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
030cd1a2 | 6825 | only available on IA-32 and x64.\r |
ac644614 | 6826 | \r |
6827 | If Gdtr is NULL, then ASSERT().\r | |
6828 | \r | |
af2dc6a7 | 6829 | @param Gdtr The pointer to a GDTR descriptor.\r |
ac644614 | 6830 | \r |
6831 | **/\r | |
6832 | VOID\r | |
6833 | EFIAPI\r | |
6834 | AsmWriteGdtr (\r | |
6835 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
6836 | );\r | |
6837 | \r | |
6838 | \r | |
6839 | /**\r | |
17f695ed | 6840 | Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6841 | \r |
6842 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
030cd1a2 | 6843 | function is only available on IA-32 and x64.\r |
ac644614 | 6844 | \r |
6845 | If Idtr is NULL, then ASSERT().\r | |
6846 | \r | |
af2dc6a7 | 6847 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6848 | \r |
6849 | **/\r | |
6850 | VOID\r | |
6851 | EFIAPI\r | |
6852 | AsmReadIdtr (\r | |
6853 | OUT IA32_DESCRIPTOR *Idtr\r | |
6854 | );\r | |
6855 | \r | |
6856 | \r | |
6857 | /**\r | |
17f695ed | 6858 | Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r |
ac644614 | 6859 | \r |
6860 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
030cd1a2 | 6861 | only available on IA-32 and x64.\r |
ac644614 | 6862 | \r |
6863 | If Idtr is NULL, then ASSERT().\r | |
6864 | \r | |
af2dc6a7 | 6865 | @param Idtr The pointer to a IDTR descriptor.\r |
ac644614 | 6866 | \r |
6867 | **/\r | |
6868 | VOID\r | |
6869 | EFIAPI\r | |
6870 | AsmWriteIdtr (\r | |
6871 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
6872 | );\r | |
6873 | \r | |
6874 | \r | |
6875 | /**\r | |
6876 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
6877 | \r | |
6878 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
030cd1a2 | 6879 | only available on IA-32 and x64.\r |
ac644614 | 6880 | \r |
6881 | @return The current selector of LDT.\r | |
6882 | \r | |
6883 | **/\r | |
6884 | UINT16\r | |
6885 | EFIAPI\r | |
6886 | AsmReadLdtr (\r | |
6887 | VOID\r | |
6888 | );\r | |
6889 | \r | |
6890 | \r | |
6891 | /**\r | |
17f695ed | 6892 | Writes the current Local Descriptor Table Register (LDTR) selector.\r |
ac644614 | 6893 | \r |
6894 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
030cd1a2 | 6895 | only available on IA-32 and x64.\r |
ac644614 | 6896 | \r |
6897 | @param Ldtr 16-bit LDTR selector value.\r | |
6898 | \r | |
6899 | **/\r | |
6900 | VOID\r | |
6901 | EFIAPI\r | |
6902 | AsmWriteLdtr (\r | |
6903 | IN UINT16 Ldtr\r | |
6904 | );\r | |
6905 | \r | |
6906 | \r | |
6907 | /**\r | |
6908 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
6909 | \r | |
6910 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
6911 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
030cd1a2 | 6912 | available on IA-32 and x64.\r |
ac644614 | 6913 | \r |
6914 | If Buffer is NULL, then ASSERT().\r | |
6915 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6916 | \r | |
af2dc6a7 | 6917 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6918 | \r |
6919 | **/\r | |
6920 | VOID\r | |
6921 | EFIAPI\r | |
6922 | AsmFxSave (\r | |
6923 | OUT IA32_FX_BUFFER *Buffer\r | |
6924 | );\r | |
6925 | \r | |
6926 | \r | |
6927 | /**\r | |
6928 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
6929 | \r | |
6930 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
6931 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
030cd1a2 | 6932 | only available on IA-32 and x64.\r |
ac644614 | 6933 | \r |
6934 | If Buffer is NULL, then ASSERT().\r | |
6935 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
6936 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
6937 | \r | |
af2dc6a7 | 6938 | @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context.\r |
ac644614 | 6939 | \r |
6940 | **/\r | |
6941 | VOID\r | |
6942 | EFIAPI\r | |
6943 | AsmFxRestore (\r | |
6944 | IN CONST IA32_FX_BUFFER *Buffer\r | |
6945 | );\r | |
6946 | \r | |
6947 | \r | |
6948 | /**\r | |
6949 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
6950 | \r | |
6951 | Reads and returns the current value of MM0. This function is only available\r | |
030cd1a2 | 6952 | on IA-32 and x64.\r |
ac644614 | 6953 | \r |
6954 | @return The current value of MM0.\r | |
6955 | \r | |
6956 | **/\r | |
6957 | UINT64\r | |
6958 | EFIAPI\r | |
6959 | AsmReadMm0 (\r | |
6960 | VOID\r | |
6961 | );\r | |
6962 | \r | |
6963 | \r | |
6964 | /**\r | |
6965 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
6966 | \r | |
6967 | Reads and returns the current value of MM1. This function is only available\r | |
030cd1a2 | 6968 | on IA-32 and x64.\r |
ac644614 | 6969 | \r |
6970 | @return The current value of MM1.\r | |
6971 | \r | |
6972 | **/\r | |
6973 | UINT64\r | |
6974 | EFIAPI\r | |
6975 | AsmReadMm1 (\r | |
6976 | VOID\r | |
6977 | );\r | |
6978 | \r | |
6979 | \r | |
6980 | /**\r | |
6981 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
6982 | \r | |
6983 | Reads and returns the current value of MM2. This function is only available\r | |
030cd1a2 | 6984 | on IA-32 and x64.\r |
ac644614 | 6985 | \r |
6986 | @return The current value of MM2.\r | |
6987 | \r | |
6988 | **/\r | |
6989 | UINT64\r | |
6990 | EFIAPI\r | |
6991 | AsmReadMm2 (\r | |
6992 | VOID\r | |
6993 | );\r | |
6994 | \r | |
6995 | \r | |
6996 | /**\r | |
6997 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
6998 | \r | |
6999 | Reads and returns the current value of MM3. This function is only available\r | |
030cd1a2 | 7000 | on IA-32 and x64.\r |
ac644614 | 7001 | \r |
7002 | @return The current value of MM3.\r | |
7003 | \r | |
7004 | **/\r | |
7005 | UINT64\r | |
7006 | EFIAPI\r | |
7007 | AsmReadMm3 (\r | |
7008 | VOID\r | |
7009 | );\r | |
7010 | \r | |
7011 | \r | |
7012 | /**\r | |
7013 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
7014 | \r | |
7015 | Reads and returns the current value of MM4. This function is only available\r | |
030cd1a2 | 7016 | on IA-32 and x64.\r |
ac644614 | 7017 | \r |
7018 | @return The current value of MM4.\r | |
7019 | \r | |
7020 | **/\r | |
7021 | UINT64\r | |
7022 | EFIAPI\r | |
7023 | AsmReadMm4 (\r | |
7024 | VOID\r | |
7025 | );\r | |
7026 | \r | |
7027 | \r | |
7028 | /**\r | |
7029 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
7030 | \r | |
7031 | Reads and returns the current value of MM5. This function is only available\r | |
030cd1a2 | 7032 | on IA-32 and x64.\r |
ac644614 | 7033 | \r |
7034 | @return The current value of MM5.\r | |
7035 | \r | |
7036 | **/\r | |
7037 | UINT64\r | |
7038 | EFIAPI\r | |
7039 | AsmReadMm5 (\r | |
7040 | VOID\r | |
7041 | );\r | |
7042 | \r | |
7043 | \r | |
7044 | /**\r | |
7045 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
7046 | \r | |
7047 | Reads and returns the current value of MM6. This function is only available\r | |
030cd1a2 | 7048 | on IA-32 and x64.\r |
ac644614 | 7049 | \r |
7050 | @return The current value of MM6.\r | |
7051 | \r | |
7052 | **/\r | |
7053 | UINT64\r | |
7054 | EFIAPI\r | |
7055 | AsmReadMm6 (\r | |
7056 | VOID\r | |
7057 | );\r | |
7058 | \r | |
7059 | \r | |
7060 | /**\r | |
7061 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
7062 | \r | |
7063 | Reads and returns the current value of MM7. This function is only available\r | |
030cd1a2 | 7064 | on IA-32 and x64.\r |
ac644614 | 7065 | \r |
7066 | @return The current value of MM7.\r | |
7067 | \r | |
7068 | **/\r | |
7069 | UINT64\r | |
7070 | EFIAPI\r | |
7071 | AsmReadMm7 (\r | |
7072 | VOID\r | |
7073 | );\r | |
7074 | \r | |
7075 | \r | |
7076 | /**\r | |
7077 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
7078 | \r | |
7079 | Writes the current value of MM0. This function is only available on IA32 and\r | |
030cd1a2 | 7080 | x64.\r |
ac644614 | 7081 | \r |
7082 | @param Value The 64-bit value to write to MM0.\r | |
7083 | \r | |
7084 | **/\r | |
7085 | VOID\r | |
7086 | EFIAPI\r | |
7087 | AsmWriteMm0 (\r | |
7088 | IN UINT64 Value\r | |
7089 | );\r | |
7090 | \r | |
7091 | \r | |
7092 | /**\r | |
7093 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
7094 | \r | |
7095 | Writes the current value of MM1. This function is only available on IA32 and\r | |
030cd1a2 | 7096 | x64.\r |
ac644614 | 7097 | \r |
7098 | @param Value The 64-bit value to write to MM1.\r | |
7099 | \r | |
7100 | **/\r | |
7101 | VOID\r | |
7102 | EFIAPI\r | |
7103 | AsmWriteMm1 (\r | |
7104 | IN UINT64 Value\r | |
7105 | );\r | |
7106 | \r | |
7107 | \r | |
7108 | /**\r | |
7109 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
7110 | \r | |
7111 | Writes the current value of MM2. This function is only available on IA32 and\r | |
030cd1a2 | 7112 | x64.\r |
ac644614 | 7113 | \r |
7114 | @param Value The 64-bit value to write to MM2.\r | |
7115 | \r | |
7116 | **/\r | |
7117 | VOID\r | |
7118 | EFIAPI\r | |
7119 | AsmWriteMm2 (\r | |
7120 | IN UINT64 Value\r | |
7121 | );\r | |
7122 | \r | |
7123 | \r | |
7124 | /**\r | |
7125 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
7126 | \r | |
7127 | Writes the current value of MM3. This function is only available on IA32 and\r | |
030cd1a2 | 7128 | x64.\r |
ac644614 | 7129 | \r |
7130 | @param Value The 64-bit value to write to MM3.\r | |
7131 | \r | |
7132 | **/\r | |
7133 | VOID\r | |
7134 | EFIAPI\r | |
7135 | AsmWriteMm3 (\r | |
7136 | IN UINT64 Value\r | |
7137 | );\r | |
7138 | \r | |
7139 | \r | |
7140 | /**\r | |
7141 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
7142 | \r | |
7143 | Writes the current value of MM4. This function is only available on IA32 and\r | |
030cd1a2 | 7144 | x64.\r |
ac644614 | 7145 | \r |
7146 | @param Value The 64-bit value to write to MM4.\r | |
7147 | \r | |
7148 | **/\r | |
7149 | VOID\r | |
7150 | EFIAPI\r | |
7151 | AsmWriteMm4 (\r | |
7152 | IN UINT64 Value\r | |
7153 | );\r | |
7154 | \r | |
7155 | \r | |
7156 | /**\r | |
7157 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
7158 | \r | |
7159 | Writes the current value of MM5. This function is only available on IA32 and\r | |
030cd1a2 | 7160 | x64.\r |
ac644614 | 7161 | \r |
7162 | @param Value The 64-bit value to write to MM5.\r | |
7163 | \r | |
7164 | **/\r | |
7165 | VOID\r | |
7166 | EFIAPI\r | |
7167 | AsmWriteMm5 (\r | |
7168 | IN UINT64 Value\r | |
7169 | );\r | |
7170 | \r | |
7171 | \r | |
7172 | /**\r | |
7173 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
7174 | \r | |
7175 | Writes the current value of MM6. This function is only available on IA32 and\r | |
030cd1a2 | 7176 | x64.\r |
ac644614 | 7177 | \r |
7178 | @param Value The 64-bit value to write to MM6.\r | |
7179 | \r | |
7180 | **/\r | |
7181 | VOID\r | |
7182 | EFIAPI\r | |
7183 | AsmWriteMm6 (\r | |
7184 | IN UINT64 Value\r | |
7185 | );\r | |
7186 | \r | |
7187 | \r | |
7188 | /**\r | |
7189 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
7190 | \r | |
7191 | Writes the current value of MM7. This function is only available on IA32 and\r | |
030cd1a2 | 7192 | x64.\r |
ac644614 | 7193 | \r |
7194 | @param Value The 64-bit value to write to MM7.\r | |
7195 | \r | |
7196 | **/\r | |
7197 | VOID\r | |
7198 | EFIAPI\r | |
7199 | AsmWriteMm7 (\r | |
7200 | IN UINT64 Value\r | |
7201 | );\r | |
7202 | \r | |
7203 | \r | |
7204 | /**\r | |
7205 | Reads the current value of Time Stamp Counter (TSC).\r | |
7206 | \r | |
7207 | Reads and returns the current value of TSC. This function is only available\r | |
030cd1a2 | 7208 | on IA-32 and x64.\r |
ac644614 | 7209 | \r |
7210 | @return The current value of TSC\r | |
7211 | \r | |
7212 | **/\r | |
7213 | UINT64\r | |
7214 | EFIAPI\r | |
7215 | AsmReadTsc (\r | |
7216 | VOID\r | |
7217 | );\r | |
7218 | \r | |
7219 | \r | |
7220 | /**\r | |
7221 | Reads the current value of a Performance Counter (PMC).\r | |
7222 | \r | |
7223 | Reads and returns the current value of performance counter specified by\r | |
030cd1a2 | 7224 | Index. This function is only available on IA-32 and x64.\r |
ac644614 | 7225 | \r |
7226 | @param Index The 32-bit Performance Counter index to read.\r | |
7227 | \r | |
7228 | @return The value of the PMC specified by Index.\r | |
7229 | \r | |
7230 | **/\r | |
7231 | UINT64\r | |
7232 | EFIAPI\r | |
7233 | AsmReadPmc (\r | |
7234 | IN UINT32 Index\r | |
7235 | );\r | |
7236 | \r | |
7237 | \r | |
7238 | /**\r | |
7239 | Sets up a monitor buffer that is used by AsmMwait().\r | |
7240 | \r | |
7241 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
030cd1a2 | 7242 | and Edx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 7243 | \r |
7244 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
7245 | instruction.\r | |
7246 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
7247 | instruction.\r | |
7248 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
7249 | instruction.\r | |
7250 | \r | |
7251 | @return Eax\r | |
7252 | \r | |
7253 | **/\r | |
7254 | UINTN\r | |
7255 | EFIAPI\r | |
7256 | AsmMonitor (\r | |
7257 | IN UINTN Eax,\r | |
7258 | IN UINTN Ecx,\r | |
7259 | IN UINTN Edx\r | |
7260 | );\r | |
7261 | \r | |
7262 | \r | |
7263 | /**\r | |
7264 | Executes an MWAIT instruction.\r | |
7265 | \r | |
7266 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
030cd1a2 | 7267 | Ecx. Returns Eax. This function is only available on IA-32 and x64.\r |
ac644614 | 7268 | \r |
7269 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
7270 | instruction.\r | |
7271 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
7272 | instruction.\r | |
7273 | \r | |
7274 | @return Eax\r | |
7275 | \r | |
7276 | **/\r | |
7277 | UINTN\r | |
7278 | EFIAPI\r | |
7279 | AsmMwait (\r | |
7280 | IN UINTN Eax,\r | |
7281 | IN UINTN Ecx\r | |
7282 | );\r | |
7283 | \r | |
7284 | \r | |
7285 | /**\r | |
7286 | Executes a WBINVD instruction.\r | |
7287 | \r | |
7288 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 7289 | x64.\r |
ac644614 | 7290 | \r |
7291 | **/\r | |
7292 | VOID\r | |
7293 | EFIAPI\r | |
7294 | AsmWbinvd (\r | |
7295 | VOID\r | |
7296 | );\r | |
7297 | \r | |
7298 | \r | |
7299 | /**\r | |
7300 | Executes a INVD instruction.\r | |
7301 | \r | |
7302 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
030cd1a2 | 7303 | x64.\r |
ac644614 | 7304 | \r |
7305 | **/\r | |
7306 | VOID\r | |
7307 | EFIAPI\r | |
7308 | AsmInvd (\r | |
7309 | VOID\r | |
7310 | );\r | |
7311 | \r | |
7312 | \r | |
7313 | /**\r | |
7314 | Flushes a cache line from all the instruction and data caches within the\r | |
7315 | coherency domain of the CPU.\r | |
7316 | \r | |
7317 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
030cd1a2 | 7318 | This function is only available on IA-32 and x64.\r |
ac644614 | 7319 | \r |
7320 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
7321 | in a physical addressing mode, then LinearAddress is a\r | |
7322 | physical address. If the CPU is in a virtual\r | |
7323 | addressing mode, then LinearAddress is a virtual\r | |
7324 | address.\r | |
7325 | \r | |
af2dc6a7 | 7326 | @return LinearAddress.\r |
ac644614 | 7327 | **/\r |
7328 | VOID *\r | |
7329 | EFIAPI\r | |
7330 | AsmFlushCacheLine (\r | |
7331 | IN VOID *LinearAddress\r | |
7332 | );\r | |
7333 | \r | |
7334 | \r | |
7335 | /**\r | |
7336 | Enables the 32-bit paging mode on the CPU.\r | |
7337 | \r | |
7338 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7339 | must be properly initialized prior to calling this service. This function\r | |
7340 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
7341 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
7342 | transferred to the function specified by EntryPoint using the new stack\r | |
7343 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
7344 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
7345 | EntryPoint must never return.\r | |
7346 | \r | |
7347 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
7348 | If EntryPoint is NULL, then ASSERT().\r | |
7349 | If NewStack is NULL, then ASSERT().\r | |
7350 | \r | |
7351 | There are a number of constraints that must be followed before calling this\r | |
7352 | function:\r | |
7353 | 1) Interrupts must be disabled.\r | |
7354 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
7355 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
7356 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
7357 | descriptors.\r | |
7358 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
7359 | is complete, and those page tables must guarantee that the pages for this\r | |
7360 | function and the stack are identity mapped.\r | |
7361 | \r | |
7362 | @param EntryPoint A pointer to function to call with the new stack after\r | |
7363 | paging is enabled.\r | |
7364 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
7365 | function as the first parameter after paging is enabled.\r | |
7366 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
7367 | function as the second parameter after paging is enabled.\r | |
7368 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
7369 | function after paging is enabled.\r | |
7370 | \r | |
7371 | **/\r | |
7372 | VOID\r | |
7373 | EFIAPI\r | |
7374 | AsmEnablePaging32 (\r | |
7375 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7376 | IN VOID *Context1, OPTIONAL\r | |
7377 | IN VOID *Context2, OPTIONAL\r | |
7378 | IN VOID *NewStack\r | |
7379 | );\r | |
7380 | \r | |
7381 | \r | |
7382 | /**\r | |
7383 | Disables the 32-bit paging mode on the CPU.\r | |
7384 | \r | |
7385 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
7386 | mode. This function assumes the current execution mode is 32-paged protected\r | |
7387 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
7388 | is disabled, control is transferred to the function specified by EntryPoint\r | |
7389 | using the new stack specified by NewStack and passing in the parameters\r | |
7390 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7391 | may be NULL. The function EntryPoint must never return.\r | |
7392 | \r | |
7393 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
7394 | If EntryPoint is NULL, then ASSERT().\r | |
7395 | If NewStack is NULL, then ASSERT().\r | |
7396 | \r | |
7397 | There are a number of constraints that must be followed before calling this\r | |
7398 | function:\r | |
7399 | 1) Interrupts must be disabled.\r | |
7400 | 2) The caller must be in 32-bit paged mode.\r | |
7401 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
7402 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
7403 | this function and the stack are identity mapped.\r | |
7404 | \r | |
7405 | @param EntryPoint A pointer to function to call with the new stack after\r | |
7406 | paging is disabled.\r | |
7407 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
7408 | function as the first parameter after paging is disabled.\r | |
7409 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
7410 | function as the second parameter after paging is\r | |
7411 | disabled.\r | |
7412 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
7413 | function after paging is disabled.\r | |
7414 | \r | |
7415 | **/\r | |
7416 | VOID\r | |
7417 | EFIAPI\r | |
7418 | AsmDisablePaging32 (\r | |
7419 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
7420 | IN VOID *Context1, OPTIONAL\r | |
7421 | IN VOID *Context2, OPTIONAL\r | |
7422 | IN VOID *NewStack\r | |
7423 | );\r | |
7424 | \r | |
7425 | \r | |
7426 | /**\r | |
7427 | Enables the 64-bit paging mode on the CPU.\r | |
7428 | \r | |
7429 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
7430 | must be properly initialized prior to calling this service. This function\r | |
7431 | assumes the current execution mode is 32-bit protected mode with flat\r | |
7432 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
7433 | paging mode is enabled, control is transferred to the function specified by\r | |
7434 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
7435 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
7436 | optional and may be 0. The function EntryPoint must never return.\r | |
7437 | \r | |
7438 | If the current execution mode is not 32-bit protected mode with flat\r | |
7439 | descriptors, then ASSERT().\r | |
7440 | If EntryPoint is 0, then ASSERT().\r | |
7441 | If NewStack is 0, then ASSERT().\r | |
7442 | \r | |
17f695ed | 7443 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7444 | is called. The descriptor in the GDT that this selector\r |
7445 | references must be setup for long mode.\r | |
7446 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7447 | the new stack after paging is enabled.\r | |
7448 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7449 | the EntryPoint function as the first parameter after\r | |
7450 | paging is enabled.\r | |
7451 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7452 | the EntryPoint function as the second parameter after\r | |
7453 | paging is enabled.\r | |
7454 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7455 | the EntryPoint function after paging is enabled.\r | |
7456 | \r | |
7457 | **/\r | |
7458 | VOID\r | |
7459 | EFIAPI\r | |
7460 | AsmEnablePaging64 (\r | |
17f695ed | 7461 | IN UINT16 Cs,\r |
ac644614 | 7462 | IN UINT64 EntryPoint,\r |
7463 | IN UINT64 Context1, OPTIONAL\r | |
7464 | IN UINT64 Context2, OPTIONAL\r | |
7465 | IN UINT64 NewStack\r | |
7466 | );\r | |
7467 | \r | |
7468 | \r | |
7469 | /**\r | |
7470 | Disables the 64-bit paging mode on the CPU.\r | |
7471 | \r | |
7472 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
7473 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
030cd1a2 | 7474 | This function is only available on x64. After the 64-bit paging mode is\r |
ac644614 | 7475 | disabled, control is transferred to the function specified by EntryPoint\r |
7476 | using the new stack specified by NewStack and passing in the parameters\r | |
7477 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
7478 | may be 0. The function EntryPoint must never return.\r | |
7479 | \r | |
7480 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
7481 | If EntryPoint is 0, then ASSERT().\r | |
7482 | If NewStack is 0, then ASSERT().\r | |
7483 | \r | |
17f695ed | 7484 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r |
ac644614 | 7485 | is called. The descriptor in the GDT that this selector\r |
7486 | references must be setup for 32-bit protected mode.\r | |
7487 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
7488 | the new stack after paging is disabled.\r | |
7489 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
7490 | the EntryPoint function as the first parameter after\r | |
7491 | paging is disabled.\r | |
7492 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
7493 | the EntryPoint function as the second parameter after\r | |
7494 | paging is disabled.\r | |
7495 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
7496 | the EntryPoint function after paging is disabled.\r | |
7497 | \r | |
7498 | **/\r | |
7499 | VOID\r | |
7500 | EFIAPI\r | |
7501 | AsmDisablePaging64 (\r | |
17f695ed | 7502 | IN UINT16 Cs,\r |
ac644614 | 7503 | IN UINT32 EntryPoint,\r |
7504 | IN UINT32 Context1, OPTIONAL\r | |
7505 | IN UINT32 Context2, OPTIONAL\r | |
7506 | IN UINT32 NewStack\r | |
7507 | );\r | |
7508 | \r | |
7509 | \r | |
7510 | //\r | |
7511 | // 16-bit thunking services\r | |
7512 | //\r | |
7513 | \r | |
7514 | /**\r | |
7515 | Retrieves the properties for 16-bit thunk functions.\r | |
7516 | \r | |
7517 | Computes the size of the buffer and stack below 1MB required to use the\r | |
7518 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
7519 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
7520 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
7521 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
7522 | of bytes that need to be passed to the 16-bit real mode code.\r | |
52fa075c | 7523 | \r |
ac644614 | 7524 | If RealModeBufferSize is NULL, then ASSERT().\r |
7525 | If ExtraStackSize is NULL, then ASSERT().\r | |
7526 | \r | |
7527 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
7528 | required to use the 16-bit thunk functions.\r | |
7529 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
7530 | that the 16-bit thunk functions require for\r | |
7531 | temporary storage in the transition to and from\r | |
7532 | 16-bit real mode.\r | |
7533 | \r | |
7534 | **/\r | |
7535 | VOID\r | |
7536 | EFIAPI\r | |
7537 | AsmGetThunk16Properties (\r | |
7538 | OUT UINT32 *RealModeBufferSize,\r | |
7539 | OUT UINT32 *ExtraStackSize\r | |
7540 | );\r | |
7541 | \r | |
7542 | \r | |
7543 | /**\r | |
7544 | Prepares all structures a code required to use AsmThunk16().\r | |
7545 | \r | |
7546 | Prepares all structures and code required to use AsmThunk16().\r | |
52fa075c | 7547 | \r |
8243b089 | 7548 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7549 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
ac644614 | 7550 | \r |
7551 | If ThunkContext is NULL, then ASSERT().\r | |
7552 | \r | |
7553 | @param ThunkContext A pointer to the context structure that describes the\r | |
7554 | 16-bit real mode code to call.\r | |
7555 | \r | |
7556 | **/\r | |
7557 | VOID\r | |
7558 | EFIAPI\r | |
7559 | AsmPrepareThunk16 (\r | |
1445300f | 7560 | IN OUT THUNK_CONTEXT *ThunkContext\r |
ac644614 | 7561 | );\r |
7562 | \r | |
7563 | \r | |
7564 | /**\r | |
7565 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
7566 | \r | |
7567 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
17f695ed | 7568 | AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r |
7569 | This function must be called with interrupts disabled.\r | |
7570 | \r | |
7571 | The register state from the RealModeState field of ThunkContext is restored just prior \r | |
7572 | to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r | |
7573 | which is used to set the interrupt state when a 16-bit real mode entry point is called.\r | |
7574 | Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r | |
7575 | The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r | |
7576 | the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r | |
7577 | The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r | |
7578 | so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r | |
7579 | and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r | |
7580 | point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r | |
7581 | after the RETF instruction is executed.\r | |
7582 | \r | |
7583 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7584 | or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r | |
7585 | the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r | |
7586 | \r | |
7587 | If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r | |
7588 | then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r | |
7589 | This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r | |
7590 | \r | |
7591 | If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r | |
7592 | is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r | |
7593 | \r | |
7594 | If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r | |
7595 | ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r | |
7596 | disable the A20 mask.\r | |
7597 | \r | |
7598 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r | |
7599 | ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r | |
7600 | then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7601 | \r | |
7602 | If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r | |
7603 | ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r | |
7604 | \r | |
ac644614 | 7605 | If ThunkContext is NULL, then ASSERT().\r |
7606 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
17f695ed | 7607 | If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r |
7608 | ThunkAttributes, then ASSERT().\r | |
ac644614 | 7609 | \r |
8243b089 | 7610 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
af2dc6a7 | 7611 | virtual to physical mappings for ThunkContext.RealModeBuffer are mapped 1:1.\r |
52fa075c | 7612 | \r |
ac644614 | 7613 | @param ThunkContext A pointer to the context structure that describes the\r |
7614 | 16-bit real mode code to call.\r | |
7615 | \r | |
7616 | **/\r | |
7617 | VOID\r | |
7618 | EFIAPI\r | |
7619 | AsmThunk16 (\r | |
7620 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7621 | );\r | |
7622 | \r | |
7623 | \r | |
7624 | /**\r | |
7625 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7626 | control to a 16-bit real mode entry point, and returns the results.\r | |
7627 | \r | |
7628 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
7629 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
7630 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
7631 | service should be used. If the caller intends to make more than one 16-bit\r | |
7632 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
7633 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
7634 | \r | |
8243b089 | 7635 | This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r |
7636 | virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r | |
52fa075c | 7637 | \r |
17f695ed | 7638 | See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r |
ac644614 | 7639 | \r |
7640 | @param ThunkContext A pointer to the context structure that describes the\r | |
7641 | 16-bit real mode code to call.\r | |
7642 | \r | |
7643 | **/\r | |
7644 | VOID\r | |
7645 | EFIAPI\r | |
7646 | AsmPrepareAndThunk16 (\r | |
7647 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
7648 | );\r | |
7649 | \r | |
3cfc7813 QL |
7650 | /**\r |
7651 | Generates a 16-bit random number through RDRAND instruction.\r | |
7652 | \r | |
7653 | if Rand is NULL, then ASSERT().\r | |
7654 | \r | |
7655 | @param[out] Rand Buffer pointer to store the random result.\r | |
7656 | \r | |
7657 | @retval TRUE RDRAND call was successful.\r | |
7658 | @retval FALSE Failed attempts to call RDRAND.\r | |
7659 | \r | |
7660 | **/\r | |
7661 | BOOLEAN\r | |
7662 | EFIAPI\r | |
7663 | AsmRdRand16 (\r | |
7664 | OUT UINT16 *Rand\r | |
7665 | );\r | |
7666 | \r | |
7667 | /**\r | |
7668 | Generates a 32-bit random number through RDRAND instruction.\r | |
7669 | \r | |
7670 | if Rand is NULL, then ASSERT().\r | |
7671 | \r | |
7672 | @param[out] Rand Buffer pointer to store the random result.\r | |
7673 | \r | |
7674 | @retval TRUE RDRAND call was successful.\r | |
7675 | @retval FALSE Failed attempts to call RDRAND.\r | |
7676 | \r | |
7677 | **/\r | |
7678 | BOOLEAN\r | |
7679 | EFIAPI\r | |
7680 | AsmRdRand32 (\r | |
7681 | OUT UINT32 *Rand\r | |
7682 | );\r | |
7683 | \r | |
7684 | /**\r | |
7685 | Generates a 64-bit random number through RDRAND instruction.\r | |
7686 | \r | |
7687 | if Rand is NULL, then ASSERT().\r | |
7688 | \r | |
7689 | @param[out] Rand Buffer pointer to store the random result.\r | |
7690 | \r | |
7691 | @retval TRUE RDRAND call was successful.\r | |
7692 | @retval FALSE Failed attempts to call RDRAND.\r | |
7693 | \r | |
7694 | **/\r | |
7695 | BOOLEAN\r | |
7696 | EFIAPI\r | |
7697 | AsmRdRand64 (\r | |
7698 | OUT UINT64 *Rand\r | |
7699 | );\r | |
7700 | \r | |
ac644614 | 7701 | #endif\r |
e3a7917f | 7702 | #endif\r |
ac644614 | 7703 | \r |
7704 | \r |