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fb3df220 1/** @file\r
50a64e5b 2 Provides a service to retrieve a pointer to the PEI Services Table.\r
fb3df220 3\r
9095d37b 4Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
9344f092 5SPDX-License-Identifier: BSD-2-Clause-Patent\r
fb3df220 6\r
fb3df220 7**/\r
8\r
9#ifndef __PEI_SERVICES_TABLE_POINTER_LIB_H__\r
10#define __PEI_SERVICES_TABLE_POINTER_LIB_H__\r
11\r
12/**\r
4b8157f9 13 Retrieves the cached value of the PEI Services Table pointer.\r
fb3df220 14\r
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15 Returns the cached value of the PEI Services Table pointer in a CPU specific manner\r
16 as specified in the CPU binding section of the Platform Initialization Pre-EFI\r
4b8157f9 17 Initialization Core Interface Specification.\r
9095d37b 18\r
4b8157f9 19 If the cached PEI Services Table pointer is NULL, then ASSERT().\r
fb3df220 20\r
4ef55dfc 21 @return The pointer to PeiServices.\r
fb3df220 22\r
23**/\r
5240b97c 24CONST EFI_PEI_SERVICES **\r
fb3df220 25EFIAPI\r
26GetPeiServicesTablePointer (\r
27 VOID\r
28 );\r
29\r
81c7803c 30/**\r
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31 Caches a pointer PEI Services Table.\r
32\r
33 Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer\r
34 in a CPU specific manner as specified in the CPU binding section of the Platform Initialization\r
35 Pre-EFI Initialization Core Interface Specification.\r
36\r
4b8157f9 37 If PeiServicesTablePointer is NULL, then ASSERT().\r
9095d37b 38\r
01aef47b 39 @param PeiServicesTablePointer The address of PeiServices pointer.\r
81c7803c 40**/\r
b0d803fe 41VOID\r
42EFIAPI\r
43SetPeiServicesTablePointer (\r
a86fda43 44 IN CONST EFI_PEI_SERVICES ** PeiServicesTablePointer\r
b0d803fe 45 );\r
46\r
ffdb421c 47/**\r
9095d37b 48 Perform CPU specific actions required to migrate the PEI Services Table\r
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49 pointer from temporary RAM to permanent RAM.\r
50\r
9095d37b 51 For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes\r
ffdb421c 52 immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
9095d37b 53 For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes\r
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54 immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
55 For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r
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56 a dedicated CPU register. This means that there is no memory storage\r
57 associated with storing the PEI Services Table pointer, so no additional\r
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58 migration actions are required for Itanium or ARM CPUs.\r
59\r
60**/\r
61VOID\r
62EFIAPI\r
63MigratePeiServicesTablePointer (\r
8a835340 64 VOID\r
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65 );\r
66\r
fb3df220 67#endif\r
68\r