MdePkg: Clean up source files

[mirror_edk2.git] / MdePkg / Include / Ppi / I2cMaster.h

/** @file\r
  This PPI manipulates the I2C host controller to perform transactions as a master\r
  on the I2C bus using the current state of any switches or multiplexers in the I2C bus.\r
\r
  Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  @par Revision Reference:\r
  This PPI is introduced in PI Version 1.3.\r
\r
**/\r
\r
#ifndef __I2C_MASTER_PPI_H__\r
#define __I2C_MASTER_PPI_H__\r
\r
#include <Pi/PiI2c.h>\r
\r
#define EFI_PEI_I2C_MASTER_PPI_GUID \\r
  { 0xb3bfab9b, 0x9f9c, 0x4e8b, { 0xad, 0x37, 0x7f, 0x8c, 0x51, 0xfc, 0x62, 0x80 }}\r
\r
typedef struct _EFI_PEI_I2C_MASTER_PPI EFI_PEI_I2C_MASTER_PPI;\r
\r
/**\r
  Set the frequency for the I2C clock line.\r
\r
  @param This                   Pointer to an EFI_PEI_I2C_MASTER_PPI structure.\r
  @param BusClockHertz          Pointer to the requested I2C bus clock frequency in Hertz.\r
                                Upon return this value contains the actual frequency\r
                                in use by the I2C controller.\r
\r
  @retval EFI_SUCCESS           The bus frequency was set successfully.\r
  @retval EFI_INVALID_PARAMETER BusClockHertz is NULL\r
  @retval EFI_UNSUPPORTED       The controller does not support this frequency.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY) (\r
  IN EFI_PEI_I2C_MASTER_PPI   *This,\r
  IN UINTN                    *BusClockHertz\r
  );\r
\r
/**\r
  Reset the I2C controller and configure it for use.\r
\r
  @param  This                  Pointer to an EFI_PEI_I2C_MASTER_PPI structure.\r
\r
  @retval EFI_SUCCESS           The reset completed successfully.\r
  @retval EFI_DEVICE_ERROR      The reset operation failed.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_I2C_MASTER_PPI_RESET) (\r
  IN CONST EFI_PEI_I2C_MASTER_PPI  *This\r
  );\r
\r
/**\r
  Start an I2C transaction on the host controller.\r
\r
  @param  This                   Pointer to an EFI_PEI_I2C_MASTER_PPI structure.\r
  @param  SlaveAddress           Address of the device on the I2C bus.\r
                                 Set the I2C_ADDRESSING_10_BIT when using 10-bit addresses,\r
                                 clear this bit for 7-bit addressing.\r
                                 Bits 0-6 are used for 7-bit I2C slave addresses and\r
                                 bits 0-9 are used for 10-bit I2C slave addresses.\r
  @param  RequestPacket          Pointer to an EFI_I2C_REQUEST_PACKET structure describing the I2C transaction.\r
\r
  @retval EFI_SUCCESS             The transaction completed successfully.\r
  @retval EFI_BAD_BUFFER_SIZE     The RequestPacket->LengthInBytes value is too large.\r
  @retval EFI_DEVICE_ERROR       There was an I2C error (NACK) during the transaction.\r
  @retval EFI_INVALID_PARAMETER   RequestPacket is NULL\r
  @retval EFI_NO_RESPONSE         The I2C device is not responding to the slave address.\r
                                 EFI_DEVICE_ERROR will be returned if the controller cannot distinguish when the NACK occurred.\r
  @retval EFI_NOT_FOUND           Reserved bit set in the SlaveAddress parameter\r
  @retval EFI_OUT_OF_RESOURCES   Insufficient memory for I2C transaction\r
  @retval EFI_UNSUPPORTED         The controller does not support the requested transaction.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_I2C_MASTER_PPI_START_REQUEST) (\r
  IN CONST EFI_PEI_I2C_MASTER_PPI     *This,\r
  IN UINTN                            SlaveAddress,\r
  IN EFI_I2C_REQUEST_PACKET           *RequestPacket\r
  );\r
\r
///\r
/// This PPI manipulates the I2C host controller to perform transactions as a master on the I2C bus\r
/// using the current state of any switches or multiplexers in the I2C bus.\r
///\r
struct _EFI_PEI_I2C_MASTER_PPI {\r
  EFI_PEI_I2C_MASTER_PPI_SET_BUS_FREQUENCY   SetBusFrequency;\r
  EFI_PEI_I2C_MASTER_PPI_RESET               Reset;\r
  EFI_PEI_I2C_MASTER_PPI_START_REQUEST       StartRequest;\r
  CONST EFI_I2C_CONTROLLER_CAPABILITIES      *I2cControllerCapabilities;\r
  EFI_GUID                                   Identifier;\r
};\r
\r
extern EFI_GUID gEfiPeiI2cMasterPpiGuid;\r
\r
#endif\r