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1 | /** @file\r |
2 | This PPI provides the super I/O register access functionality.\r | |
3 | \r | |
9095d37b | 4 | Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
42c9d9f8 RN |
6 | \r |
7 | @par Revision Reference:\r | |
8 | This PPI is from PI Version 1.2.1.\r | |
9 | \r | |
10 | **/\r | |
11 | \r | |
12 | #ifndef __EFI_SUPER_IO_PPI_H__\r | |
13 | #define __EFI_SUPER_IO_PPI_H__\r | |
14 | \r | |
15 | #include <Protocol/SuperIo.h>\r | |
16 | \r | |
17 | #define EFI_SIO_PPI_GUID \\r | |
18 | { \\r | |
19 | 0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22} \\r | |
20 | }\r | |
21 | \r | |
22 | typedef struct _EFI_SIO_PPI EFI_SIO_PPI;\r | |
23 | typedef struct _EFI_SIO_PPI *PEFI_SIO_PPI;\r | |
24 | \r | |
25 | typedef UINT16 EFI_SIO_REGISTER;\r | |
26 | #define EFI_SIO_REG(ldn,reg) (EFI_SIO_REGISTER) (((ldn) << 8) | reg)\r | |
27 | #define EFI_SIO_LDN_GLOBAL 0xFF\r | |
28 | \r | |
29 | /**\r | |
30 | Read a Super I/O register.\r | |
9095d37b | 31 | \r |
42c9d9f8 RN |
32 | The register is specified as an 8-bit logical device number and an 8-bit\r |
33 | register value. The logical device numbers for specific SIO devices can be\r | |
34 | determined using the Info member of the PPI structure.\r | |
419d9899 RN |
35 | \r |
36 | @param PeiServices A pointer to a pointer to the PEI Services.\r | |
42c9d9f8 RN |
37 | @param This A pointer to this instance of the EFI_SIO_PPI.\r |
38 | @param ExitCfgMode A boolean specifying whether the driver should turn on\r | |
39 | configuration mode (FALSE) or turn off configuration mode\r | |
40 | (TRUE) after completing the read operation. The driver must\r | |
41 | track the current state of the configuration mode (if any)\r | |
42 | and turn on configuration mode (if necessary) prior to\r | |
43 | register access.\r | |
9095d37b LG |
44 | @param Register A value specifying the logical device number (bits 15:8)\r |
45 | and the register to read (bits 7:0). The logical device\r | |
42c9d9f8 RN |
46 | number of EFI_SIO_LDN_GLOBAL indicates that global\r |
47 | registers will be used.\r | |
48 | @param IoData A pointer to the returned register value.\r | |
49 | \r | |
50 | @retval EFI_SUCCESS Success.\r | |
419d9899 | 51 | @retval EFI_TIMEOUT The register could not be read in the a reasonable\r |
42c9d9f8 RN |
52 | amount of time. The exact time is device-specific.\r |
53 | @retval EFI_INVALID_PARAMETERS Register was out of range for this device.\r | |
54 | @retval EFI_INVALID_PARAMETERS IoData was NULL\r | |
55 | @retval EFI_DEVICE_ERROR There was a device fault or the device was not present.\r | |
56 | **/\r | |
57 | typedef\r | |
58 | EFI_STATUS\r | |
59 | (EFIAPI *EFI_PEI_SIO_REGISTER_READ)(\r | |
9a8eb9a2 | 60 | IN EFI_PEI_SERVICES **PeiServices,\r |
42c9d9f8 RN |
61 | IN CONST EFI_SIO_PPI *This,\r |
62 | IN BOOLEAN ExitCfgMode,\r | |
63 | IN EFI_SIO_REGISTER Register,\r | |
64 | OUT UINT8 *IoData\r | |
65 | );\r | |
66 | \r | |
67 | /**\r | |
68 | Write a Super I/O register.\r | |
69 | \r | |
70 | The register is specified as an 8-bit logical device number and an 8-bit register\r | |
71 | value. The logical device numbers for specific SIO devices can be determined\r | |
72 | using the Info member of the PPI structure.\r | |
73 | \r | |
419d9899 | 74 | @param PeiServices A pointer to a pointer to the PEI Services.\r |
42c9d9f8 RN |
75 | @param This A pointer to this instance of the EFI_SIO_PPI.\r |
76 | @param ExitCfgMode A boolean specifying whether the driver should turn on\r | |
77 | configuration mode (FALSE) or turn off configuration mode\r | |
78 | (TRUE) after completing the read operation. The driver must\r | |
79 | track the current state of the configuration mode (if any)\r | |
80 | and turn on configuration mode (if necessary) prior to\r | |
81 | register access.\r | |
9095d37b LG |
82 | @param Register A value specifying the logical device number (bits 15:8)\r |
83 | and the register to read (bits 7:0). The logical device\r | |
42c9d9f8 RN |
84 | number of EFI_SIO_LDN_GLOBAL indicates that global\r |
85 | registers will be used.\r | |
86 | @param IoData A pointer to the returned register value.\r | |
87 | \r | |
88 | @retval EFI_SUCCESS Success.\r | |
419d9899 | 89 | @retval EFI_TIMEOUT The register could not be read in the a reasonable\r |
42c9d9f8 RN |
90 | amount of time. The exact time is device-specific.\r |
91 | @retval EFI_INVALID_PARAMETERS Register was out of range for this device.\r | |
92 | @retval EFI_INVALID_PARAMETERS IoData was NULL\r | |
93 | @retval EFI_DEVICE_ERROR There was a device fault or the device was not present.\r | |
9095d37b | 94 | **/\r |
42c9d9f8 RN |
95 | typedef\r |
96 | EFI_STATUS\r | |
97 | (EFIAPI *EFI_PEI_SIO_REGISTER_WRITE)(\r | |
9a8eb9a2 | 98 | IN EFI_PEI_SERVICES **PeiServices,\r |
42c9d9f8 RN |
99 | IN CONST EFI_SIO_PPI *This,\r |
100 | IN BOOLEAN ExitCfgMode,\r | |
101 | IN EFI_SIO_REGISTER Register,\r | |
102 | IN UINT8 IoData\r | |
103 | );\r | |
104 | \r | |
105 | /**\r | |
106 | Provides an interface for a table based programming of the Super I/O registers.\r | |
107 | \r | |
108 | The Modify() function provides an interface for table based programming of the\r | |
109 | Super I/O registers. This function can be used to perform programming of\r | |
110 | multiple Super I/O registers with a single function call. For each table entry,\r | |
111 | the Register is read, its content is bitwise ANDed with AndMask, and then ORed\r | |
112 | with OrMask before being written back to the Register. The Super I/O driver\r | |
113 | must track the current state of the Super I/O and enable the configuration mode\r | |
114 | of Super I/O if necessary prior to table processing. Once the table is processed,\r | |
115 | the Super I/O device must be returned to the original state.\r | |
419d9899 RN |
116 | \r |
117 | @param PeiServices A pointer to a pointer to the PEI Services.\r | |
42c9d9f8 RN |
118 | @param This A pointer to this instance of the EFI_SIO_PPI.\r |
119 | @param Command A pointer to an array of NumberOfCommands EFI_SIO_REGISTER_MODIFY\r | |
120 | structures. Each structure specifies a single Super I/O register\r | |
121 | modify operation.\r | |
122 | @param NumberOfCommands The number of elements in the Command array.\r | |
123 | \r | |
124 | @retval EFI_SUCCESS The operation completed successfully.\r | |
125 | @retval EFI_INVALID_PARAMETERS Command is NULL.\r | |
9095d37b | 126 | **/\r |
42c9d9f8 RN |
127 | typedef\r |
128 | EFI_STATUS\r | |
129 | (EFIAPI *EFI_PEI_SIO_REGISTER_MODIFY)(\r | |
9a8eb9a2 | 130 | IN EFI_PEI_SERVICES **PeiServices,\r |
42c9d9f8 RN |
131 | IN CONST EFI_SIO_PPI *This,\r |
132 | IN CONST EFI_SIO_REGISTER_MODIFY *Command,\r | |
133 | IN UINTN NumberOfCommands\r | |
134 | );\r | |
135 | \r | |
136 | ///\r | |
137 | /// Specifies the end of the information list.\r | |
138 | ///\r | |
fb01cb53 | 139 | #define EFI_ACPI_PNP_HID_END EFI_PNP_ID (0x0000)\r |
42c9d9f8 RN |
140 | \r |
141 | typedef UINT32 EFI_ACPI_HID;\r | |
142 | typedef UINT32 EFI_ACPI_UID;\r | |
143 | #pragma pack(1)\r | |
144 | typedef struct _EFI_SIO_INFO {\r | |
145 | EFI_ACPI_HID Hid;\r | |
146 | EFI_ACPI_UID Uid;\r | |
147 | UINT8 Ldn;\r | |
148 | } EFI_SIO_INFO, *PEFI_SIO_INFO;\r | |
149 | #pragma pack()\r | |
150 | \r | |
151 | ///\r | |
152 | /// This PPI provides low-level access to Super I/O registers using Read() and\r | |
153 | /// Write(). It also uniquely identifies this Super I/O controller using a GUID\r | |
154 | /// and provides mappings between ACPI style PNP IDs and the logical device numbers.\r | |
155 | /// There is one instance of this PPI per Super I/O device.\r | |
156 | ///\r | |
157 | struct _EFI_SIO_PPI {\r | |
158 | ///\r | |
159 | /// This function reads a register's value from the Super I/O controller.\r | |
160 | ///\r | |
161 | EFI_PEI_SIO_REGISTER_READ Read;\r | |
162 | ///\r | |
163 | /// This function writes a value to a register in the Super I/O controller.\r | |
164 | ///\r | |
165 | EFI_PEI_SIO_REGISTER_WRITE Write;\r | |
166 | ///\r | |
167 | /// This function modifies zero or more registers in the Super I/O controller\r | |
168 | /// using a table.\r | |
169 | ///\r | |
170 | EFI_PEI_SIO_REGISTER_MODIFY Modify;\r | |
171 | ///\r | |
172 | /// This GUID uniquely identifies the Super I/O controller.\r | |
173 | ///\r | |
174 | EFI_GUID SioGuid;\r | |
175 | ///\r | |
176 | /// This pointer is to an array which maps EISA identifiers to logical devices numbers.\r | |
177 | ///\r | |
178 | PEFI_SIO_INFO Info;\r | |
179 | };\r | |
180 | \r | |
181 | extern EFI_GUID gEfiSioPpiGuid;\r | |
182 | \r | |
9095d37b | 183 | #endif\r |