MdePkg/ProcessorBind: add defines for page allocation granularity

[mirror_edk2.git] / MdePkg / Include / Protocol / Cpu.h

/** @file\r
  CPU Architectural Protocol as defined in PI spec Volume 2 DXE\r
\r
  This code abstracts the DXE core from processor implementation details.\r
\r
  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials                          \r
  are licensed and made available under the terms and conditions of the BSD License         \r
  which accompanies this distribution.  The full text of the license may be found at        \r
  http://opensource.org/licenses/bsd-license.php                                            \r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
**/\r
\r
#ifndef __ARCH_PROTOCOL_CPU_H__\r
#define __ARCH_PROTOCOL_CPU_H__\r
\r
#include <Protocol/DebugSupport.h>\r
\r
#define EFI_CPU_ARCH_PROTOCOL_GUID \\r
  { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }\r
\r
typedef struct _EFI_CPU_ARCH_PROTOCOL   EFI_CPU_ARCH_PROTOCOL;\r
\r
///\r
/// The type of flush operation\r
///\r
typedef enum {\r
  EfiCpuFlushTypeWriteBackInvalidate,\r
  EfiCpuFlushTypeWriteBack,\r
  EfiCpuFlushTypeInvalidate,\r
  EfiCpuMaxFlushType\r
} EFI_CPU_FLUSH_TYPE;\r
\r
///\r
/// The type of processor INIT.\r
///\r
typedef enum {\r
  EfiCpuInit,\r
  EfiCpuMaxInitType\r
} EFI_CPU_INIT_TYPE;\r
\r
/**\r
  EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.\r
\r
  @param  InterruptType    Defines the type of interrupt or exception that\r
                           occurred on the processor.This parameter is processor architecture specific.\r
  @param  SystemContext    A pointer to the processor context when\r
                           the interrupt occurred on the processor.\r
\r
  @return None\r
\r
**/\r
typedef\r
VOID\r
(EFIAPI *EFI_CPU_INTERRUPT_HANDLER)(\r
  IN CONST  EFI_EXCEPTION_TYPE  InterruptType,\r
  IN CONST  EFI_SYSTEM_CONTEXT  SystemContext\r
  );\r
\r
/**\r
  This function flushes the range of addresses from Start to Start+Length \r
  from the processor's data cache. If Start is not aligned to a cache line \r
  boundary, then the bytes before Start to the preceding cache line boundary \r
  are also flushed. If Start+Length is not aligned to a cache line boundary, \r
  then the bytes past Start+Length to the end of the next cache line boundary \r
  are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be \r
  supported. If the data cache is fully coherent with all DMA operations, then \r
  this function can just return EFI_SUCCESS. If the processor does not support \r
  flushing a range of the data cache, then the entire data cache can be flushed.\r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
  @param  Start            The beginning physical address to flush from the processor's data\r
                           cache.\r
  @param  Length           The number of bytes to flush from the processor's data cache. This\r
                           function may flush more bytes than Length specifies depending upon\r
                           the granularity of the flush operation that the processor supports.\r
  @param  FlushType        Specifies the type of flush operation to perform.\r
\r
  @retval EFI_SUCCESS           The address range from Start to Start+Length was flushed from\r
                                the processor's data cache.\r
  @retval EFI_UNSUPPORTED       The processor does not support the cache flush type specified\r
                                by FlushType.\r
  @retval EFI_DEVICE_ERROR      The address range from Start to Start+Length could not be flushed\r
                                from the processor's data cache.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_FLUSH_DATA_CACHE)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This,\r
  IN EFI_PHYSICAL_ADDRESS               Start,\r
  IN UINT64                             Length,\r
  IN EFI_CPU_FLUSH_TYPE                 FlushType\r
  );\r
\r
\r
/**\r
  This function enables interrupt processing by the processor. \r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
\r
  @retval EFI_SUCCESS           Interrupts are enabled on the processor.\r
  @retval EFI_DEVICE_ERROR      Interrupts could not be enabled on the processor.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_ENABLE_INTERRUPT)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This\r
  );\r
\r
\r
/**\r
  This function disables interrupt processing by the processor.\r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
\r
  @retval EFI_SUCCESS           Interrupts are disabled on the processor.\r
  @retval EFI_DEVICE_ERROR      Interrupts could not be disabled on the processor.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_DISABLE_INTERRUPT)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This\r
  );\r
\r
\r
/**\r
  This function retrieves the processor's current interrupt state a returns it in \r
  State. If interrupts are currently enabled, then TRUE is returned. If interrupts \r
  are currently disabled, then FALSE is returned.\r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
  @param  State            A pointer to the processor's current interrupt state. Set to TRUE if\r
                           interrupts are enabled and FALSE if interrupts are disabled.\r
\r
  @retval EFI_SUCCESS           The processor's current interrupt state was returned in State.\r
  @retval EFI_INVALID_PARAMETER State is NULL.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_GET_INTERRUPT_STATE)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This,\r
  OUT BOOLEAN                           *State\r
  );\r
\r
\r
/**\r
  This function generates an INIT on the processor. If this function succeeds, then the\r
  processor will be reset, and control will not be returned to the caller. If InitType is \r
  not supported by this processor, or the processor cannot programmatically generate an \r
  INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error \r
  occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.\r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
  @param  InitType         The type of processor INIT to perform.\r
\r
  @retval EFI_SUCCESS           The processor INIT was performed. This return code should never be seen.\r
  @retval EFI_UNSUPPORTED       The processor INIT operation specified by InitType is not supported\r
                                by this processor.\r
  @retval EFI_DEVICE_ERROR      The processor INIT failed.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_INIT)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This,\r
  IN EFI_CPU_INIT_TYPE                  InitType\r
  );\r
\r
\r
/**\r
  This function registers and enables the handler specified by InterruptHandler for a processor \r
  interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the \r
  handler for the processor interrupt or exception type specified by InterruptType is uninstalled. \r
  The installed handler is called once for each processor interrupt or exception.\r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
  @param  InterruptType    A pointer to the processor's current interrupt state. Set to TRUE if interrupts\r
                           are enabled and FALSE if interrupts are disabled.\r
  @param  InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called\r
                           when a processor interrupt occurs. If this parameter is NULL, then the handler\r
                           will be uninstalled.\r
\r
  @retval EFI_SUCCESS           The handler for the processor interrupt was successfully installed or uninstalled.\r
  @retval EFI_ALREADY_STARTED   InterruptHandler is not NULL, and a handler for InterruptType was\r
                                previously installed.\r
  @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not\r
                                previously installed.\r
  @retval EFI_UNSUPPORTED       The interrupt specified by InterruptType is not supported.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This,\r
  IN EFI_EXCEPTION_TYPE                 InterruptType,\r
  IN EFI_CPU_INTERRUPT_HANDLER          InterruptHandler\r
  );\r
\r
\r
/**\r
  This function reads the processor timer specified by TimerIndex and returns it in TimerValue.\r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
  @param  TimerIndex       Specifies which processor timer is to be returned in TimerValue. This parameter\r
                           must be between 0 and NumberOfTimers-1.\r
  @param  TimerValue       Pointer to the returned timer value.\r
  @param  TimerPeriod      A pointer to the amount of time that passes in femtoseconds for each increment\r
                           of TimerValue. If TimerValue does not increment at a predictable rate, then 0 is\r
                           returned. This parameter is optional and may be NULL.\r
\r
  @retval EFI_SUCCESS           The processor timer value specified by TimerIndex was returned in TimerValue.\r
  @retval EFI_DEVICE_ERROR      An error occurred attempting to read one of the processor's timers.\r
  @retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.\r
  @retval EFI_UNSUPPORTED       The processor does not have any readable timers.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_GET_TIMER_VALUE)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This,\r
  IN UINT32                             TimerIndex,\r
  OUT UINT64                            *TimerValue,\r
  OUT UINT64                            *TimerPeriod OPTIONAL\r
  );\r
\r
\r
/**\r
  This function modifies the attributes for the memory region specified by BaseAddress and\r
  Length from their current attributes to the attributes specified by Attributes.\r
\r
  @param  This             The EFI_CPU_ARCH_PROTOCOL instance.\r
  @param  BaseAddress      The physical address that is the start address of a memory region.\r
  @param  Length           The size in bytes of the memory region.\r
  @param  Attributes       The bit mask of attributes to set for the memory region.\r
\r
  @retval EFI_SUCCESS           The attributes were set for the memory region.\r
  @retval EFI_ACCESS_DENIED     The attributes for the memory resource range specified by\r
                                BaseAddress and Length cannot be modified.\r
  @retval EFI_INVALID_PARAMETER Length is zero.\r
                                Attributes specified an illegal combination of attributes that\r
                                cannot be set together.\r
  @retval EFI_OUT_OF_RESOURCES  There are not enough system resources to modify the attributes of\r
                                the memory resource range.\r
  @retval EFI_UNSUPPORTED       The processor does not support one or more bytes of the memory\r
                                resource range specified by BaseAddress and Length.\r
                                The bit mask of attributes is not support for the memory resource\r
                                range specified by BaseAddress and Length.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES)(\r
  IN EFI_CPU_ARCH_PROTOCOL              *This,\r
  IN  EFI_PHYSICAL_ADDRESS              BaseAddress,\r
  IN  UINT64                            Length,\r
  IN  UINT64                            Attributes\r
  );\r
\r
\r
///\r
/// The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE\r
/// Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt\r
/// vectors and exception vectors, reading internal processor timers, resetting the processor, and\r
/// determining the processor frequency.\r
///\r
struct _EFI_CPU_ARCH_PROTOCOL {\r
  EFI_CPU_FLUSH_DATA_CACHE            FlushDataCache;\r
  EFI_CPU_ENABLE_INTERRUPT            EnableInterrupt;\r
  EFI_CPU_DISABLE_INTERRUPT           DisableInterrupt;\r
  EFI_CPU_GET_INTERRUPT_STATE         GetInterruptState;\r
  EFI_CPU_INIT                        Init;\r
  EFI_CPU_REGISTER_INTERRUPT_HANDLER  RegisterInterruptHandler;\r
  EFI_CPU_GET_TIMER_VALUE             GetTimerValue;\r
  EFI_CPU_SET_MEMORY_ATTRIBUTES       SetMemoryAttributes;\r
  ///\r
  /// The number of timers that are available in a processor. The value in this \r
  /// field is a constant that must not be modified after the CPU Architectural \r
  /// Protocol is installed. All consumers must treat this as a read-only field.\r
  ///\r
  UINT32                              NumberOfTimers;\r
  ///\r
  /// The size, in bytes, of the alignment required for DMA buffer allocations. \r
  /// This is typically the size of the largest data cache line in the platform. \r
  /// The value in this field is a constant that must not be modified after the \r
  /// CPU Architectural Protocol is installed. All consumers must treat this as \r
  /// a read-only field.  \r
  ///\r
  UINT32                              DmaBufferAlignment;\r
};\r
\r
extern EFI_GUID gEfiCpuArchProtocolGuid;\r
\r
#endif\r