Add X64 support for DebugSupport driver.
[mirror_edk2.git] / MdePkg / Include / Protocol / DebugSupport.h
CommitLineData
878ddf1f 1/** @file\r
b206d01d 2 DebugSupport protocol and supporting definitions as defined in the UEFI2.0\r
878ddf1f 3 specification.\r
4\r
5 The DebugSupport protocol is used by source level debuggers to abstract the\r
6 processor and handle context save and restore operations.\r
7\r
8 Copyright (c) 2006, Intel Corporation \r
9 All rights reserved. This program and the accompanying materials \r
10 are licensed and made available under the terms and conditions of the BSD License \r
11 which accompanies this distribution. The full text of the license may be found at \r
12 http://opensource.org/licenses/bsd-license.php \r
13\r
14 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
15 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
16\r
17 Module Name: DebugSupport.h\r
18\r
19**/\r
20\r
21#ifndef __DEBUG_SUPPORT_H__\r
22#define __DEBUG_SUPPORT_H__\r
23\r
24typedef struct _EFI_DEBUG_SUPPORT_PROTOCOL EFI_DEBUG_SUPPORT_PROTOCOL;\r
25\r
26//\r
27// Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}\r
28//\r
29#define EFI_DEBUG_SUPPORT_PROTOCOL_GUID \\r
30 { \\r
31 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \\r
32 }\r
33\r
34//\r
35// Debug Support definitions\r
36//\r
37typedef INTN EFI_EXCEPTION_TYPE;\r
38\r
39//\r
40// IA-32 processor exception types\r
41//\r
42#define EXCEPT_IA32_DIVIDE_ERROR 0\r
43#define EXCEPT_IA32_DEBUG 1\r
44#define EXCEPT_IA32_NMI 2\r
45#define EXCEPT_IA32_BREAKPOINT 3\r
46#define EXCEPT_IA32_OVERFLOW 4\r
47#define EXCEPT_IA32_BOUND 5\r
48#define EXCEPT_IA32_INVALID_OPCODE 6\r
49#define EXCEPT_IA32_DOUBLE_FAULT 8\r
50#define EXCEPT_IA32_INVALID_TSS 10\r
51#define EXCEPT_IA32_SEG_NOT_PRESENT 11\r
52#define EXCEPT_IA32_STACK_FAULT 12\r
53#define EXCEPT_IA32_GP_FAULT 13\r
54#define EXCEPT_IA32_PAGE_FAULT 14\r
55#define EXCEPT_IA32_FP_ERROR 16\r
56#define EXCEPT_IA32_ALIGNMENT_CHECK 17\r
57#define EXCEPT_IA32_MACHINE_CHECK 18\r
58#define EXCEPT_IA32_SIMD 19\r
59\r
60//\r
61// IA-32 processor context definition\r
62//\r
63//\r
64// FXSAVE_STATE\r
65// FP / MMX / XMM registers (see fxrstor instruction definition)\r
66//\r
67typedef struct {\r
68 UINT16 Fcw;\r
69 UINT16 Fsw;\r
70 UINT16 Ftw;\r
71 UINT16 Opcode;\r
72 UINT32 Eip;\r
73 UINT16 Cs;\r
74 UINT16 Reserved1;\r
75 UINT32 DataOffset;\r
76 UINT16 Ds;\r
77 UINT8 Reserved2[10];\r
b206d01d
LG
78#if (EFI_SPECIFICATION_VERSION >= 0x00020000)\r
79 UINT8 St0Mm0[10], Reserved3[6];\r
80 UINT8 St1Mm1[10], Reserved4[6];\r
81 UINT8 St2Mm2[10], Reserved5[6];\r
82 UINT8 St3Mm3[10], Reserved6[6];\r
83 UINT8 St4Mm4[10], Reserved7[6];\r
84 UINT8 St5Mm5[10], Reserved8[6];\r
85 UINT8 St6Mm6[10], Reserved9[6];\r
86 UINT8 St7Mm7[10], Reserved10[6];\r
87 UINT8 Xmm0[16];\r
88 UINT8 Xmm1[16];\r
89 UINT8 Xmm2[16];\r
90 UINT8 Xmm3[16];\r
91 UINT8 Xmm4[16];\r
92 UINT8 Xmm5[16];\r
93 UINT8 Xmm6[16];\r
94 UINT8 Xmm7[16];\r
95 UINT8 Reserved11[14 * 16];\r
96} EFI_FX_SAVE_STATE_IA32;\r
97#else\r
878ddf1f 98 UINT8 St0Mm0[10], Reserved3[6];\r
99 UINT8 St0Mm1[10], Reserved4[6];\r
100 UINT8 St0Mm2[10], Reserved5[6];\r
101 UINT8 St0Mm3[10], Reserved6[6];\r
102 UINT8 St0Mm4[10], Reserved7[6];\r
103 UINT8 St0Mm5[10], Reserved8[6];\r
104 UINT8 St0Mm6[10], Reserved9[6];\r
105 UINT8 St0Mm7[10], Reserved10[6];\r
106 UINT8 Reserved11[22 * 16];\r
b206d01d
LG
107} EFI_FX_SAVE_STATE;\r
108#endif\r
878ddf1f 109\r
110typedef struct {\r
111 UINT32 ExceptionData;\r
b206d01d 112#if (EFI_SPECIFICATION_VERSION >= 0x00020000)\r
878ddf1f 113 EFI_FX_SAVE_STATE_IA32 FxSaveState;\r
b206d01d
LG
114#else\r
115 EFI_FX_SAVE_STATE FxSaveState;\r
116#endif\r
878ddf1f 117 UINT32 Dr0;\r
118 UINT32 Dr1;\r
119 UINT32 Dr2;\r
120 UINT32 Dr3;\r
121 UINT32 Dr6;\r
122 UINT32 Dr7;\r
123 UINT32 Cr0;\r
b206d01d 124 UINT32 Cr1; /* Reserved */\r
878ddf1f 125 UINT32 Cr2;\r
126 UINT32 Cr3;\r
127 UINT32 Cr4;\r
128 UINT32 Eflags;\r
129 UINT32 Ldtr;\r
130 UINT32 Tr;\r
131 UINT32 Gdtr[2];\r
132 UINT32 Idtr[2];\r
133 UINT32 Eip;\r
134 UINT32 Gs;\r
135 UINT32 Fs;\r
136 UINT32 Es;\r
137 UINT32 Ds;\r
138 UINT32 Cs;\r
139 UINT32 Ss;\r
140 UINT32 Edi;\r
141 UINT32 Esi;\r
142 UINT32 Ebp;\r
143 UINT32 Esp;\r
144 UINT32 Ebx;\r
145 UINT32 Edx;\r
146 UINT32 Ecx;\r
147 UINT32 Eax;\r
148} EFI_SYSTEM_CONTEXT_IA32;\r
149\r
b206d01d
LG
150//\r
151// X64 processor exception types\r
152//\r
153#define EXCEPT_X64_DIVIDE_ERROR 0\r
154#define EXCEPT_X64_DEBUG 1\r
155#define EXCEPT_X64_NMI 2\r
156#define EXCEPT_X64_BREAKPOINT 3\r
157#define EXCEPT_X64_OVERFLOW 4\r
158#define EXCEPT_X64_BOUND 5\r
159#define EXCEPT_X64_INVALID_OPCODE 6\r
160#define EXCEPT_X64_DOUBLE_FAULT 8\r
161#define EXCEPT_X64_INVALID_TSS 10\r
162#define EXCEPT_X64_SEG_NOT_PRESENT 11\r
163#define EXCEPT_X64_STACK_FAULT 12\r
164#define EXCEPT_X64_GP_FAULT 13\r
165#define EXCEPT_X64_PAGE_FAULT 14\r
166#define EXCEPT_X64_FP_ERROR 16\r
167#define EXCEPT_X64_ALIGNMENT_CHECK 17\r
168#define EXCEPT_X64_MACHINE_CHECK 18\r
169#define EXCEPT_X64_SIMD 19\r
170\r
171//\r
172// X64 processor context definition\r
173//\r
174// FXSAVE_STATE\r
175// FP / MMX / XMM registers (see fxrstor instruction definition)\r
176//\r
177typedef struct {\r
178 UINT16 Fcw;\r
179 UINT16 Fsw;\r
180 UINT16 Ftw;\r
181 UINT16 Opcode;\r
182 UINT64 Rip;\r
183 UINT64 DataOffset;\r
184 UINT8 Reserved1[8];\r
185 UINT8 St0Mm0[10], Reserved2[6];\r
186 UINT8 St1Mm1[10], Reserved3[6];\r
187 UINT8 St2Mm2[10], Reserved4[6];\r
188 UINT8 St3Mm3[10], Reserved5[6];\r
189 UINT8 St4Mm4[10], Reserved6[6];\r
190 UINT8 St5Mm5[10], Reserved7[6];\r
191 UINT8 St6Mm6[10], Reserved8[6];\r
192 UINT8 St7Mm7[10], Reserved9[6];\r
193 UINT8 Xmm0[16];\r
194 UINT8 Xmm1[16];\r
195 UINT8 Xmm2[16];\r
196 UINT8 Xmm3[16];\r
197 UINT8 Xmm4[16];\r
198 UINT8 Xmm5[16];\r
199 UINT8 Xmm6[16];\r
200 UINT8 Xmm7[16];\r
77206d75 201#if (EFI_SPECIFICATION_VERSION >= 0x00020000)\r
202 //\r
203 // NOTE: UEFI 2.0 spec definition as follows. It should be updated \r
204 // after spec update.\r
205 //\r
b206d01d 206 UINT8 Reserved11[14 * 16];\r
77206d75 207#else\r
208 UINT8 Xmm8[16];\r
209 UINT8 Xmm9[16];\r
210 UINT8 Xmm10[16];\r
211 UINT8 Xmm11[16];\r
212 UINT8 Xmm12[16];\r
213 UINT8 Xmm13[16];\r
214 UINT8 Xmm14[16];\r
215 UINT8 Xmm15[16];\r
216 UINT8 Reserved10[6 * 16];\r
217#endif\r
b206d01d
LG
218} EFI_FX_SAVE_STATE_X64;\r
219\r
220typedef struct {\r
221 UINT64 ExceptionData;\r
222 EFI_FX_SAVE_STATE_X64 FxSaveState;\r
223 UINT64 Dr0;\r
224 UINT64 Dr1;\r
225 UINT64 Dr2;\r
226 UINT64 Dr3;\r
227 UINT64 Dr6;\r
228 UINT64 Dr7;\r
229 UINT64 Cr0;\r
230 UINT64 Cr1; /* Reserved */\r
231 UINT64 Cr2;\r
232 UINT64 Cr3;\r
233 UINT64 Cr4;\r
234 UINT64 Cr8;\r
235 UINT64 Rflags;\r
236 UINT64 Ldtr;\r
237 UINT64 Tr;\r
238 UINT64 Gdtr[2];\r
239 UINT64 Idtr[2];\r
240 UINT64 Rip;\r
241 UINT64 Gs;\r
242 UINT64 Fs;\r
243 UINT64 Es;\r
244 UINT64 Ds;\r
245 UINT64 Cs;\r
246 UINT64 Ss;\r
247 UINT64 Rdi;\r
248 UINT64 Rsi;\r
249 UINT64 Rbp;\r
250 UINT64 Rsp;\r
251 UINT64 Rbx;\r
252 UINT64 Rdx;\r
253 UINT64 Rcx;\r
254 UINT64 Rax;\r
255 UINT64 R8;\r
256 UINT64 R9;\r
257 UINT64 R10;\r
258 UINT64 R11;\r
259 UINT64 R12;\r
260 UINT64 R13;\r
261 UINT64 R14;\r
262 UINT64 R15;\r
263} EFI_SYSTEM_CONTEXT_X64;\r
264\r
878ddf1f 265//\r
266// IPF processor exception types\r
267//\r
268#define EXCEPT_IPF_VHTP_TRANSLATION 0\r
269#define EXCEPT_IPF_INSTRUCTION_TLB 1\r
270#define EXCEPT_IPF_DATA_TLB 2\r
271#define EXCEPT_IPF_ALT_INSTRUCTION_TLB 3\r
272#define EXCEPT_IPF_ALT_DATA_TLB 4\r
273#define EXCEPT_IPF_DATA_NESTED_TLB 5\r
274#define EXCEPT_IPF_INSTRUCTION_KEY_MISSED 6\r
275#define EXCEPT_IPF_DATA_KEY_MISSED 7\r
276#define EXCEPT_IPF_DIRTY_BIT 8\r
277#define EXCEPT_IPF_INSTRUCTION_ACCESS_BIT 9\r
278#define EXCEPT_IPF_DATA_ACCESS_BIT 10\r
279#define EXCEPT_IPF_BREAKPOINT 11\r
280#define EXCEPT_IPF_EXTERNAL_INTERRUPT 12\r
281//\r
282// 13 - 19 reserved\r
283//\r
284#define EXCEPT_IPF_PAGE_NOT_PRESENT 20\r
285#define EXCEPT_IPF_KEY_PERMISSION 21\r
286#define EXCEPT_IPF_INSTRUCTION_ACCESS_RIGHTS 22\r
287#define EXCEPT_IPF_DATA_ACCESS_RIGHTS 23\r
288#define EXCEPT_IPF_GENERAL_EXCEPTION 24\r
289#define EXCEPT_IPF_DISABLED_FP_REGISTER 25\r
290#define EXCEPT_IPF_NAT_CONSUMPTION 26\r
291#define EXCEPT_IPF_SPECULATION 27\r
292//\r
293// 28 reserved\r
294//\r
295#define EXCEPT_IPF_DEBUG 29\r
296#define EXCEPT_IPF_UNALIGNED_REFERENCE 30\r
297#define EXCEPT_IPF_UNSUPPORTED_DATA_REFERENCE 31\r
298#define EXCEPT_IPF_FP_FAULT 32\r
299#define EXCEPT_IPF_FP_TRAP 33\r
300#define EXCEPT_IPF_LOWER_PRIVILEGE_TRANSFER_TRAP 34\r
301#define EXCEPT_IPF_TAKEN_BRANCH 35\r
302#define EXCEPT_IPF_SINGLE_STEP 36\r
303//\r
304// 37 - 44 reserved\r
305//\r
306#define EXCEPT_IPF_IA32_EXCEPTION 45\r
307#define EXCEPT_IPF_IA32_INTERCEPT 46\r
308#define EXCEPT_IPF_IA32_INTERRUPT 47\r
309\r
310//\r
311// IPF processor context definition\r
312//\r
313typedef struct {\r
314 //\r
315 // The first reserved field is necessary to preserve alignment for the correct\r
316 // bits in UNAT and to insure F2 is 16 byte aligned..\r
317 //\r
318 UINT64 Reserved;\r
319 UINT64 R1;\r
320 UINT64 R2;\r
321 UINT64 R3;\r
322 UINT64 R4;\r
323 UINT64 R5;\r
324 UINT64 R6;\r
325 UINT64 R7;\r
326 UINT64 R8;\r
327 UINT64 R9;\r
328 UINT64 R10;\r
329 UINT64 R11;\r
330 UINT64 R12;\r
331 UINT64 R13;\r
332 UINT64 R14;\r
333 UINT64 R15;\r
334 UINT64 R16;\r
335 UINT64 R17;\r
336 UINT64 R18;\r
337 UINT64 R19;\r
338 UINT64 R20;\r
339 UINT64 R21;\r
340 UINT64 R22;\r
341 UINT64 R23;\r
342 UINT64 R24;\r
343 UINT64 R25;\r
344 UINT64 R26;\r
345 UINT64 R27;\r
346 UINT64 R28;\r
347 UINT64 R29;\r
348 UINT64 R30;\r
349 UINT64 R31;\r
350\r
351 UINT64 F2[2];\r
352 UINT64 F3[2];\r
353 UINT64 F4[2];\r
354 UINT64 F5[2];\r
355 UINT64 F6[2];\r
356 UINT64 F7[2];\r
357 UINT64 F8[2];\r
358 UINT64 F9[2];\r
359 UINT64 F10[2];\r
360 UINT64 F11[2];\r
361 UINT64 F12[2];\r
362 UINT64 F13[2];\r
363 UINT64 F14[2];\r
364 UINT64 F15[2];\r
365 UINT64 F16[2];\r
366 UINT64 F17[2];\r
367 UINT64 F18[2];\r
368 UINT64 F19[2];\r
369 UINT64 F20[2];\r
370 UINT64 F21[2];\r
371 UINT64 F22[2];\r
372 UINT64 F23[2];\r
373 UINT64 F24[2];\r
374 UINT64 F25[2];\r
375 UINT64 F26[2];\r
376 UINT64 F27[2];\r
377 UINT64 F28[2];\r
378 UINT64 F29[2];\r
379 UINT64 F30[2];\r
380 UINT64 F31[2];\r
381\r
382 UINT64 Pr;\r
383\r
384 UINT64 B0;\r
385 UINT64 B1;\r
386 UINT64 B2;\r
387 UINT64 B3;\r
388 UINT64 B4;\r
389 UINT64 B5;\r
390 UINT64 B6;\r
391 UINT64 B7;\r
392\r
393 //\r
394 // application registers\r
395 //\r
396 UINT64 ArRsc;\r
397 UINT64 ArBsp;\r
398 UINT64 ArBspstore;\r
399 UINT64 ArRnat;\r
400\r
401 UINT64 ArFcr;\r
402\r
403 UINT64 ArEflag;\r
404 UINT64 ArCsd;\r
405 UINT64 ArSsd;\r
406 UINT64 ArCflg;\r
407 UINT64 ArFsr;\r
408 UINT64 ArFir;\r
409 UINT64 ArFdr;\r
410\r
411 UINT64 ArCcv;\r
412\r
413 UINT64 ArUnat;\r
414\r
415 UINT64 ArFpsr;\r
416\r
417 UINT64 ArPfs;\r
418 UINT64 ArLc;\r
419 UINT64 ArEc;\r
420\r
421 //\r
422 // control registers\r
423 //\r
424 UINT64 CrDcr;\r
425 UINT64 CrItm;\r
426 UINT64 CrIva;\r
427 UINT64 CrPta;\r
428 UINT64 CrIpsr;\r
429 UINT64 CrIsr;\r
430 UINT64 CrIip;\r
431 UINT64 CrIfa;\r
432 UINT64 CrItir;\r
433 UINT64 CrIipa;\r
434 UINT64 CrIfs;\r
435 UINT64 CrIim;\r
436 UINT64 CrIha;\r
437\r
438 //\r
439 // debug registers\r
440 //\r
441 UINT64 Dbr0;\r
442 UINT64 Dbr1;\r
443 UINT64 Dbr2;\r
444 UINT64 Dbr3;\r
445 UINT64 Dbr4;\r
446 UINT64 Dbr5;\r
447 UINT64 Dbr6;\r
448 UINT64 Dbr7;\r
449\r
450 UINT64 Ibr0;\r
451 UINT64 Ibr1;\r
452 UINT64 Ibr2;\r
453 UINT64 Ibr3;\r
454 UINT64 Ibr4;\r
455 UINT64 Ibr5;\r
456 UINT64 Ibr6;\r
457 UINT64 Ibr7;\r
458\r
459 //\r
460 // virtual registers - nat bits for R1-R31\r
461 //\r
462 UINT64 IntNat;\r
463\r
464} EFI_SYSTEM_CONTEXT_IPF;\r
465\r
466//\r
467// EBC processor exception types\r
468//\r
469#define EXCEPT_EBC_UNDEFINED 0\r
470#define EXCEPT_EBC_DIVIDE_ERROR 1\r
471#define EXCEPT_EBC_DEBUG 2\r
472#define EXCEPT_EBC_BREAKPOINT 3\r
473#define EXCEPT_EBC_OVERFLOW 4\r
474#define EXCEPT_EBC_INVALID_OPCODE 5 // opcode out of range\r
475#define EXCEPT_EBC_STACK_FAULT 6\r
476#define EXCEPT_EBC_ALIGNMENT_CHECK 7\r
477#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 // malformed instruction\r
478#define EXCEPT_EBC_BAD_BREAK 9 // BREAK 0 or undefined BREAK\r
479#define EXCEPT_EBC_STEP 10 // to support debug stepping\r
480//\r
481// For coding convenience, define the maximum valid EBC exception.\r
482//\r
483#define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP\r
484\r
485//\r
486// EBC processor context definition\r
487//\r
488typedef struct {\r
489 UINT64 R0;\r
490 UINT64 R1;\r
491 UINT64 R2;\r
492 UINT64 R3;\r
493 UINT64 R4;\r
494 UINT64 R5;\r
495 UINT64 R6;\r
496 UINT64 R7;\r
497 UINT64 Flags;\r
498 UINT64 ControlFlags;\r
499 UINT64 Ip;\r
500} EFI_SYSTEM_CONTEXT_EBC;\r
501\r
502//\r
503// Universal EFI_SYSTEM_CONTEXT definition\r
504//\r
505typedef union {\r
506 EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;\r
507 EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;\r
b206d01d 508 EFI_SYSTEM_CONTEXT_X64 *SystemContextX64;\r
878ddf1f 509 EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;\r
510} EFI_SYSTEM_CONTEXT;\r
511\r
512//\r
513// DebugSupport callback function prototypes\r
514//\r
515\r
516/** \r
517 Registers and enables an exception callback function for the specified exception.\r
518 \r
519 @param ExceptionType Exception types in EBC, IA-32, X64, or IPF\r
520 @param SystemContext Exception content.\r
521 \r
522**/\r
523typedef\r
524VOID\r
525(*EFI_EXCEPTION_CALLBACK) (\r
526 IN EFI_EXCEPTION_TYPE ExceptionType,\r
527 IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
528 );\r
529\r
530/** \r
511710d6 531 Registers and enables the on-target debug agent's periodic entry point.\r
878ddf1f 532 \r
533 @param SystemContext Exception content.\r
534 \r
535**/\r
536typedef\r
537VOID\r
538(*EFI_PERIODIC_CALLBACK) (\r
539 IN OUT EFI_SYSTEM_CONTEXT SystemContext\r
540 );\r
541\r
542//\r
543// Machine type definition\r
544//\r
545typedef enum {\r
546 IsaIa32 = IMAGE_FILE_MACHINE_I386, // 0x014C\r
547 IsaX64 = IMAGE_FILE_MACHINE_X64, // 0x8664\r
548 IsaIpf = IMAGE_FILE_MACHINE_IA64, // 0x0200\r
549 IsaEbc = IMAGE_FILE_MACHINE_EBC // 0x0EBC\r
550} EFI_INSTRUCTION_SET_ARCHITECTURE;\r
551\r
552\r
553//\r
554// DebugSupport member function definitions\r
555//\r
556\r
557/** \r
558 Returns the maximum value that may be used for the ProcessorIndex parameter in\r
559 RegisterPeriodicCallback() and RegisterExceptionCallback(). \r
560 \r
561 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
562 @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported\r
563 processor index is returned. \r
564 \r
565 @retval EFI_SUCCESS The function completed successfully. \r
566 \r
567**/\r
568typedef\r
569EFI_STATUS\r
570(EFIAPI *EFI_GET_MAXIMUM_PROCESSOR_INDEX) (\r
571 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
572 OUT UINTN *MaxProcessorIndex\r
573 );\r
574\r
575/** \r
576 Registers a function to be called back periodically in interrupt context.\r
577 \r
578 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
579 @param ProcessorIndex Specifies which processor the callback function applies to.\r
580 @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main\r
581 periodic entry point of the debug agent.\r
582 \r
583 @retval EFI_SUCCESS The function completed successfully. \r
584 @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback\r
585 function was previously registered. \r
586 @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback \r
587 function. \r
588 \r
589**/\r
590typedef\r
591EFI_STATUS\r
592(EFIAPI *EFI_REGISTER_PERIODIC_CALLBACK) (\r
593 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
594 IN UINTN ProcessorIndex,\r
595 IN EFI_PERIODIC_CALLBACK PeriodicCallback\r
596 );\r
597\r
598/** \r
599 Registers a function to be called when a given processor exception occurs.\r
600 \r
601 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
602 @param ProcessorIndex Specifies which processor the callback function applies to.\r
603 @param PeriodicCallback A pointer to a function of type EXCEPTION_CALLBACK that is called\r
604 when the processor exception specified by ExceptionType occurs. \r
605 @param ExceptionType Specifies which processor exception to hook. \r
606 \r
607 @retval EFI_SUCCESS The function completed successfully. \r
608 @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback\r
609 function was previously registered. \r
610 @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback \r
611 function. \r
612 \r
613**/\r
614typedef\r
615EFI_STATUS\r
616(EFIAPI *EFI_REGISTER_EXCEPTION_CALLBACK) (\r
617 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
618 IN UINTN ProcessorIndex,\r
619 IN EFI_EXCEPTION_CALLBACK ExceptionCallback,\r
620 IN EFI_EXCEPTION_TYPE ExceptionType\r
621 );\r
622\r
623/** \r
624 Invalidates processor instruction cache for a memory range. Subsequent execution in this range\r
625 causes a fresh memory fetch to retrieve code to be executed. \r
626 \r
627 @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.\r
511710d6 628 @param ProcessorIndex Specifies which processor's instruction cache is to be invalidated.\r
878ddf1f 629 @param Start Specifies the physical base of the memory range to be invalidated. \r
511710d6 630 @param Length Specifies the minimum number of bytes in the processor's instruction\r
878ddf1f 631 cache to invalidate. \r
632 \r
633 @retval EFI_SUCCESS The function completed successfully. \r
634 \r
635**/\r
636typedef\r
637EFI_STATUS\r
638(EFIAPI *EFI_INVALIDATE_INSTRUCTION_CACHE) (\r
639 IN EFI_DEBUG_SUPPORT_PROTOCOL *This,\r
640 IN UINTN ProcessorIndex,\r
641 IN VOID *Start,\r
642 IN UINT64 Length\r
643 );\r
644\r
645//\r
646// DebugSupport protocol definition\r
647//\r
648struct _EFI_DEBUG_SUPPORT_PROTOCOL {\r
649 EFI_INSTRUCTION_SET_ARCHITECTURE Isa;\r
650 EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex;\r
651 EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback;\r
652 EFI_REGISTER_EXCEPTION_CALLBACK RegisterExceptionCallback;\r
653 EFI_INVALIDATE_INSTRUCTION_CACHE InvalidateInstructionCache;\r
654};\r
655\r
656extern EFI_GUID gEfiDebugSupportProtocolGuid;\r
657\r
658#endif \r