MdePkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / MdePkg / Include / Protocol / PciRootBridgeIo.h

/** @file\r
  PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.\r
\r
  PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,\r
  and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform\r
  defferent types of bus mastering DMA.\r
\r
  Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __PCI_ROOT_BRIDGE_IO_H__\r
#define __PCI_ROOT_BRIDGE_IO_H__\r
\r
#include <Library/BaseLib.h>\r
\r
#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
  { \\r
    0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
  }\r
\r
typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r
\r
///\r
/// *******************************************************\r
/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH\r
/// *******************************************************\r
///\r
typedef enum {\r
  EfiPciWidthUint8,\r
  EfiPciWidthUint16,\r
  EfiPciWidthUint32,\r
  EfiPciWidthUint64,\r
  EfiPciWidthFifoUint8,\r
  EfiPciWidthFifoUint16,\r
  EfiPciWidthFifoUint32,\r
  EfiPciWidthFifoUint64,\r
  EfiPciWidthFillUint8,\r
  EfiPciWidthFillUint16,\r
  EfiPciWidthFillUint32,\r
  EfiPciWidthFillUint64,\r
  EfiPciWidthMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
\r
///\r
/// *******************************************************\r
/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION\r
/// *******************************************************\r
///\r
typedef enum {\r
  ///\r
  /// A read operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterRead,\r
  ///\r
  /// A write operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterWrite,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is not capable of producing PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterCommonBuffer,\r
  ///\r
  /// A read operation from system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterRead64,\r
  ///\r
  /// A write operation to system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterWrite64,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is capable of producing PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterCommonBuffer64,\r
  EfiPciOperationMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
\r
#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO          0x0001\r
#define EFI_PCI_ATTRIBUTE_ISA_IO                      0x0002\r
#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO              0x0004\r
#define EFI_PCI_ATTRIBUTE_VGA_MEMORY                  0x0008\r
#define EFI_PCI_ATTRIBUTE_VGA_IO                      0x0010\r
#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO              0x0020\r
#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO            0x0040\r
#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE        0x0080\r
#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED               0x0800\r
#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE              0x1000\r
#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE          0x8000\r
#define EFI_PCI_ATTRIBUTE_ISA_IO_16                   0x10000\r
#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16           0x20000\r
#define EFI_PCI_ATTRIBUTE_VGA_IO_16                   0x40000\r
\r
#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER   (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
\r
#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
\r
#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
  (UINT64) ( \\r
  (((UINTN) bus) << 24) | \\r
  (((UINTN) dev) << 16) | \\r
  (((UINTN) func) << 8) | \\r
  (((UINTN) (reg)) < 256 ? ((UINTN) (reg)) : (UINT64) (LShiftU64 ((UINT64) (reg), 32))))\r
\r
typedef struct {\r
  UINT8   Register;\r
  UINT8   Function;\r
  UINT8   Device;\r
  UINT8   Bus;\r
  UINT32  ExtendedRegister;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
\r
/**\r
  Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
  satisfied or after a defined duration.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Width                 Signifies the width of the memory or I/O operations.\r
  @param  Address               The base address of the memory or I/O operations.\r
  @param  Mask                  Mask used for the polling criteria.\r
  @param  Value                 The comparison value used for the polling exit criteria.\r
  @param  Delay                 The number of 100 ns units to poll.\r
  @param  Result                Pointer to the last value read from the memory location.\r
\r
  @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.\r
  @retval EFI_TIMEOUT           Delay expired before a match occurred.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN  UINT64                                   Address,\r
  IN  UINT64                                   Mask,\r
  IN  UINT64                                   Value,\r
  IN  UINT64                                   Delay,\r
  OUT UINT64                                   *Result\r
  );\r
\r
/**\r
  Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Width                 Signifies the width of the memory operations.\r
  @param  Address               The base address of the memory operations.\r
  @param  Count                 The number of memory operations to perform.\r
  @param  Buffer                For read operations, the destination buffer to store the results. For write\r
                                operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS           The data was read from or written to the PCI root bridge.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   Address,\r
  IN     UINTN                                    Count,\r
  IN OUT VOID                                     *Buffer\r
  );\r
\r
typedef struct {\r
  ///\r
  /// Read PCI controller registers in the PCI root bridge memory space.\r
  ///\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Read;\r
  ///\r
  /// Write PCI controller registers in the PCI root bridge memory space.\r
  ///\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Write;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
\r
/**\r
  Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
  root bridge memory space.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
  @param  Width                 Signifies the width of the memory operations.\r
  @param  DestAddress           The destination address of the memory operation.\r
  @param  SrcAddress            The source address of the memory operation.\r
  @param  Count                 The number of memory operations to perform.\r
\r
  @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.\r
  @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   DestAddress,\r
  IN     UINT64                                   SrcAddress,\r
  IN     UINTN                                    Count\r
  );\r
\r
/**\r
  Provides the PCI controller-specific addresses required to access system memory from a\r
  DMA bus master.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Operation             Indicates if the bus master is going to read or write to system memory.\r
  @param  HostAddress           The system memory address to map to the PCI controller.\r
  @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes\r
                                that were mapped.\r
  @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to\r
                                access the hosts HostAddress.\r
  @param  Mapping               A resulting value to pass to Unmap().\r
\r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL                *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation,\r
  IN     VOID                                       *HostAddress,\r
  IN OUT UINTN                                      *NumberOfBytes,\r
  OUT    EFI_PHYSICAL_ADDRESS                       *DeviceAddress,\r
  OUT    VOID                                       **Mapping\r
  );\r
\r
/**\r
  Completes the Map() operation and releases any corresponding resources.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Mapping               The mapping value returned from Map().\r
\r
  @retval EFI_SUCCESS           The range was unmapped.\r
  @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
  @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  IN  VOID                                     *Mapping\r
  );\r
\r
/**\r
  Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
  EfiPciOperationBusMasterCommonBuffer64 mapping.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Type                  This parameter is not used and must be ignored.\r
  @param  MemoryType            The type of memory to allocate, EfiBootServicesData or\r
                                EfiRuntimeServicesData.\r
  @param  Pages                 The number of pages to allocate.\r
  @param  HostAddress           A pointer to store the base system memory address of the\r
                                allocated range.\r
  @param  Attributes            The requested bit mask of attributes for the allocated range.\r
\r
  @retval EFI_SUCCESS           The requested memory pages were allocated.\r
  @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are\r
                                MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_ALLOCATE_TYPE                        Type,\r
  IN     EFI_MEMORY_TYPE                          MemoryType,\r
  IN     UINTN                                    Pages,\r
  IN OUT VOID                                     **HostAddress,\r
  IN     UINT64                                   Attributes\r
  );\r
\r
/**\r
  Frees memory that was allocated with AllocateBuffer().\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Pages                 The number of pages to free.\r
  @param  HostAddress           The base system memory address of the allocated range.\r
\r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
                                was not allocated with AllocateBuffer().\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  IN  UINTN                                    Pages,\r
  IN  VOID                                     *HostAddress\r
  );\r
\r
/**\r
  Flushes all PCI posted write transactions from a PCI host bridge to system memory.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
\r
  @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host\r
                                bridge to system memory.\r
  @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI\r
                                host bridge due to a hardware error.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This\r
  );\r
\r
/**\r
  Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
  attributes that a PCI root bridge is currently using.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Supports              A pointer to the mask of attributes that this PCI root bridge supports\r
                                setting with SetAttributes().\r
  @param  Attributes            A pointer to the mask of attributes that this PCI root bridge is currently\r
                                using.\r
\r
  @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI root\r
                                bridge supports is returned in Supports. If Attributes is\r
                                not NULL, then the attributes that the PCI root bridge is currently\r
                                using is returned in Attributes.\r
  @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r
\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  OUT UINT64                                   *Supports,\r
  OUT UINT64                                   *Attributes\r
  );\r
\r
/**\r
  Sets attributes for a resource range on a PCI root bridge.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Attributes            The mask of attributes to set.\r
  @param  ResourceBase          A pointer to the base address of the resource range to be modified by the\r
                                attributes specified by Attributes.\r
  @param  ResourceLength        A pointer to the length of the resource range to be modified by the\r
                                attributes specified by Attributes.\r
\r
  @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource\r
                                range specified by ResourceBase and ResourceLength\r
                                were set on the PCI root bridge, and the actual resource range is\r
                                returned in ResuourceBase and ResourceLength.\r
  @retval EFI_UNSUPPORTED       A bit is set in Attributes that is not supported by the PCI Root\r
                                Bridge.\r
  @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the\r
                                resource range specified by BaseAddress and Length.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     UINT64                                   Attributes,\r
  IN OUT UINT64                                   *ResourceBase,\r
  IN OUT UINT64                                   *ResourceLength\r
  );\r
\r
/**\r
  Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI\r
  resource descriptors.\r
\r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Resources             A pointer to the resource descriptors that describe the current\r
                                configuration of this PCI root bridge.\r
\r
  @retval EFI_SUCCESS           The current configuration of this PCI root bridge was returned in\r
                                Resources.\r
  @retval EFI_UNSUPPORTED       The current configuration of this PCI root bridge could not be\r
                                retrieved.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL          *This,\r
  OUT VOID                                     **Resources\r
  );\r
\r
///\r
/// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are\r
/// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller.\r
///\r
struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {\r
  ///\r
  /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.\r
  ///\r
  EFI_HANDLE                                      ParentHandle;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM     PollMem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM     PollIo;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Mem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Io;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Pci;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM        CopyMem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP             Map;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP           Unmap;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER     FreeBuffer;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH           Flush;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES  GetAttributes;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES  SetAttributes;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION   Configuration;\r
\r
  ///\r
  /// The segment number that this PCI root bridge resides.\r
  ///\r
  UINT32                                          SegmentNumber;\r
};\r
\r
extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;\r
\r
#endif\r