[mirror_edk2.git] / MdePkg / Include / Protocol / PciRootBridgeIo.h

/** @file\r
  PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.\r
\r
  PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, \r
  and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
  defferent types of bus mastering DMA.\r
\r
  Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials                          \r
  are licensed and made available under the terms and conditions of the BSD License         \r
  which accompanies this distribution.  The full text of the license may be found at        \r
  http://opensource.org/licenses/bsd-license.php                                            \r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
**/\r
\r
#ifndef __PCI_ROOT_BRIDGE_IO_H__\r
#define __PCI_ROOT_BRIDGE_IO_H__\r
\r
#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
  { \\r
    0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
  }\r
\r
typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r
\r
///\r
/// *******************************************************\r
/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH\r
/// *******************************************************\r
///\r
typedef enum {\r
  EfiPciWidthUint8,\r
  EfiPciWidthUint16,\r
  EfiPciWidthUint32,\r
  EfiPciWidthUint64,\r
  EfiPciWidthFifoUint8,\r
  EfiPciWidthFifoUint16,\r
  EfiPciWidthFifoUint32,\r
  EfiPciWidthFifoUint64,\r
  EfiPciWidthFillUint8,\r
  EfiPciWidthFillUint16,\r
  EfiPciWidthFillUint32,\r
  EfiPciWidthFillUint64,\r
  EfiPciWidthMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
\r
///\r
/// *******************************************************\r
/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION\r
/// *******************************************************\r
///\r
typedef enum {\r
  ///\r
  /// A read operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterRead,\r
  ///\r
  /// A write operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterWrite,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is not capable of producing PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterCommonBuffer,\r
  ///\r
  /// A read operation from system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterRead64,\r
  ///\r
  /// A write operation to system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterWrite64,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is capable of producing PCI dual address cycles.\r
  ///\r
  EfiPciOperationBusMasterCommonBuffer64,\r
  EfiPciOperationMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
\r
#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO          0x0001\r
#define EFI_PCI_ATTRIBUTE_ISA_IO                      0x0002\r
#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO              0x0004\r
#define EFI_PCI_ATTRIBUTE_VGA_MEMORY                  0x0008\r
#define EFI_PCI_ATTRIBUTE_VGA_IO                      0x0010\r
#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO              0x0020\r
#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO            0x0040\r
#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE        0x0080\r
#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED               0x0800\r
#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE              0x1000\r
#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE          0x8000\r
\r
#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER   (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
\r
#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
\r
#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
    ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
\r
typedef struct {\r
  UINT8   Register;\r
  UINT8   Function;\r
  UINT8   Device;\r
  UINT8   Bus;\r
  UINT32  ExtendedRegister;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
\r
/**                                                                 \r
  Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
  satisfied or after a defined duration.\r
          \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Width                 Signifies the width of the memory or I/O operations.\r
  @param  Address               The base address of the memory or I/O operations.  \r
  @param  Mask                  Mask used for the polling criteria.\r
  @param  Value                 The comparison value used for the polling exit criteria.\r
  @param  Delay                 The number of 100 ns units to poll.\r
  @param  Result                Pointer to the last value read from the memory location.\r
                                \r
  @retval EFI_SUCCESS           The last data returned from the access matched the poll exit criteria.\r
  @retval EFI_TIMEOUT           Delay expired before a match occurred.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN  UINT64                                   Address,\r
  IN  UINT64                                   Mask,\r
  IN  UINT64                                   Value,\r
  IN  UINT64                                   Delay,\r
  OUT UINT64                                   *Result\r
  );\r
\r
/**                                                                 \r
  Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
          \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Width                 Signifies the width of the memory operations.\r
  @param  Address               The base address of the memory operations.                                  \r
  @param  Count                 The number of memory operations to perform.\r
  @param  Buffer                For read operations, the destination buffer to store the results. For write\r
                                operations, the source buffer to write data from.                          \r
  \r
  @retval EFI_SUCCESS           The data was read from or written to the PCI root bridge.  \r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   Address,\r
  IN     UINTN                                    Count,\r
  IN OUT VOID                                     *Buffer\r
  );\r
\r
typedef struct {\r
  ///\r
  /// Read PCI controller registers in the PCI root bridge memory space.\r
  ///\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Read;\r
  ///\r
  /// Write PCI controller registers in the PCI root bridge memory space.\r
  ///\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Write;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
\r
/**                                                                 \r
  Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
  root bridge memory space.                                                                       \r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
  @param  Width                 Signifies the width of the memory operations.\r
  @param  DestAddress           The destination address of the memory operation.                                \r
  @param  SrcAddress            The source address of the memory operation.                                \r
  @param  Count                 The number of memory operations to perform.    \r
                                \r
  @retval EFI_SUCCESS           The data was copied from one memory region to another memory region.  \r
  @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   DestAddress,\r
  IN     UINT64                                   SrcAddress,\r
  IN     UINTN                                    Count\r
  );\r
\r
/**                                                                 \r
  Provides the PCI controller-specific addresses required to access system memory from a\r
  DMA bus master.                                                                        \r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Operation             Indicates if the bus master is going to read or write to system memory.\r
  @param  HostAddress           The system memory address to map to the PCI controller.\r
  @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes\r
                                that were mapped.                                                 \r
  @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to\r
                                access the hosts HostAddress.                                        \r
  @param  Mapping               A resulting value to pass to Unmap().\r
                                  \r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.                                \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL                *This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation,\r
  IN     VOID                                       *HostAddress,\r
  IN OUT UINTN                                      *NumberOfBytes,\r
  OUT    EFI_PHYSICAL_ADDRESS                       *DeviceAddress,\r
  OUT    VOID                                       **Mapping\r
  );\r
\r
/**                                                                 \r
  Completes the Map() operation and releases any corresponding resources.\r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Mapping               The mapping value returned from Map().\r
                                  \r
  @retval EFI_SUCCESS           The range was unmapped.\r
  @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
  @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.\r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  IN  VOID                                     *Mapping\r
  );\r
\r
/**                                                                 \r
  Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
  EfiPciOperationBusMasterCommonBuffer64 mapping.                                 \r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Type                  This parameter is not used and must be ignored.\r
  @param  MemoryType            The type of memory to allocate, EfiBootServicesData or\r
                                EfiRuntimeServicesData.                               \r
  @param  Pages                 The number of pages to allocate.                                \r
  @param  HostAddress           A pointer to store the base system memory address of the\r
                                allocated range.                                        \r
  @param  Attributes            The requested bit mask of attributes for the allocated range.\r
                                  \r
  @retval EFI_SUCCESS           The requested memory pages were allocated.\r
  @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are\r
                                MEMORY_WRITE_COMBINE and MEMORY_CACHED.                     \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.  \r
                                   \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     EFI_ALLOCATE_TYPE                        Type,\r
  IN     EFI_MEMORY_TYPE                          MemoryType,\r
  IN     UINTN                                    Pages,\r
  IN OUT VOID                                     **HostAddress,\r
  IN     UINT64                                   Attributes\r
  );\r
\r
/**                                                                 \r
  Frees memory that was allocated with AllocateBuffer().\r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Pages                 The number of pages to free.                                \r
  @param  HostAddress           The base system memory address of the allocated range.                                    \r
                                  \r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
                                was not allocated with AllocateBuffer().\r
                                     \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  IN  UINTN                                    Pages,\r
  IN  VOID                                     *HostAddress\r
  );\r
\r
/**                                                                 \r
  Flushes all PCI posted write transactions from a PCI host bridge to system memory.\r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
                                  \r
  @retval EFI_SUCCESS           The PCI posted write transactions were flushed from the PCI host\r
                                bridge to system memory.                                        \r
  @retval EFI_DEVICE_ERROR      The PCI posted write transactions were not flushed from the PCI\r
                                host bridge due to a hardware error.                           \r
                                     \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  *This\r
  );\r
\r
/**                                                                 \r
  Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
  attributes that a PCI root bridge is currently using.                                    \r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Supports              A pointer to the mask of attributes that this PCI root bridge supports\r
                                setting with SetAttributes().                                         \r
  @param  Attributes            A pointer to the mask of attributes that this PCI root bridge is currently\r
                                using.                                                                      \r
                                \r
  @retval EFI_SUCCESS           If Supports is not NULL, then the attributes that the PCI root     \r
                                bridge supports is returned in Supports. If Attributes is          \r
                                not NULL, then the attributes that the PCI root bridge is currently\r
                                using is returned in Attributes.                                   \r
  @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r
                                \r
                                     \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *This,\r
  OUT UINT64                                   *Supports,\r
  OUT UINT64                                   *Attributes\r
  );\r
\r
/**                                                                 \r
  Sets attributes for a resource range on a PCI root bridge.\r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Attributes            The mask of attributes to set.\r
  @param  ResourceBase          A pointer to the base address of the resource range to be modified by the\r
                                attributes specified by Attributes.\r
  @param  ResourceLength        A pointer to the length of the resource range to be modified by the\r
                                attributes specified by Attributes.                                                                                                              \r
                                \r
  @retval EFI_SUCCESS           The set of attributes specified by Attributes for the resource   \r
                                range specified by ResourceBase and ResourceLength               \r
                                were set on the PCI root bridge, and the actual resource range is\r
                                returned in ResuourceBase and ResourceLength.                    \r
  @retval EFI_UNSUPPORTED       A bit is set in Attributes that is not supported by the PCI Root\r
                                Bridge.                                                         \r
  @retval EFI_OUT_OF_RESOURCES  There are not enough resources to set the attributes on the                              \r
                                resource range specified by BaseAddress and Length.        \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.                               \r
                                     \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              *This,\r
  IN     UINT64                                   Attributes,\r
  IN OUT UINT64                                   *ResourceBase,\r
  IN OUT UINT64                                   *ResourceLength\r
  );\r
\r
/**                                                                 \r
  Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0\r
  resource descriptors.                                                                           \r
            \r
  @param  This                  A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Resources             A pointer to the ACPI 2.0 resource descriptors that describe the current\r
                                configuration of this PCI root bridge.                                  \r
                                \r
  @retval EFI_SUCCESS           The current configuration of this PCI root bridge was returned in\r
                                Resources.                                                                                                                       \r
  @retval EFI_UNSUPPORTED       The current configuration of this PCI root bridge could not be\r
                                retrieved.                                                                          \r
                                       \r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL          *This,\r
  OUT VOID                                     **Resources\r
  );\r
\r
///\r
/// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are \r
/// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller. \r
///\r
struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {\r
  ///\r
  /// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.\r
  ///\r
  EFI_HANDLE                                      ParentHandle;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM     PollMem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM     PollIo;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Mem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Io;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Pci;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM        CopyMem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP             Map;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP           Unmap;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER     FreeBuffer;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH           Flush;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES  GetAttributes;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES  SetAttributes;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION   Configuration;\r
  \r
  ///\r
  /// The segment number that this PCI root bridge resides.\r
  ///\r
  UINT32                                          SegmentNumber;\r
};\r
\r
extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
d1f95000	1	/** @file\r
8a7d75b0	2	PCI Root Bridge I/O protocol as defined in the UEFI 2.0 specification.\r
d1f95000	3	\r
	4	PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, \r
	5	and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
630b4187	6	defferent types of bus mastering DMA.\r
d1f95000	7	\r
9df063a0 HT	8	Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
9df063a0 HT	9	This program and the accompanying materials \r
d1f95000	10	are licensed and made available under the terms and conditions of the BSD License \r
	11	which accompanies this distribution. The full text of the license may be found at \r
	12	http://opensource.org/licenses/bsd-license.php \r
	13	\r
	14	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	15	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	16	\r
d1f95000	17	**/\r
	18	\r
	19	#ifndef __PCI_ROOT_BRIDGE_IO_H__\r
	20	#define __PCI_ROOT_BRIDGE_IO_H__\r
	21	\r
	22	#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
	23	{ \\r
	24	0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \\r
	25	}\r
	26	\r
	27	typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;\r
	28	\r
9319d2c2 LG	29	///\r
	30	/// *******************************************************\r
	31	/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH\r
	32	/// *******************************************************\r
	33	///\r
d1f95000	34	typedef enum {\r
	35	EfiPciWidthUint8,\r
	36	EfiPciWidthUint16,\r
	37	EfiPciWidthUint32,\r
	38	EfiPciWidthUint64,\r
	39	EfiPciWidthFifoUint8,\r
	40	EfiPciWidthFifoUint16,\r
	41	EfiPciWidthFifoUint32,\r
	42	EfiPciWidthFifoUint64,\r
	43	EfiPciWidthFillUint8,\r
	44	EfiPciWidthFillUint16,\r
	45	EfiPciWidthFillUint32,\r
	46	EfiPciWidthFillUint64,\r
	47	EfiPciWidthMaximum\r
	48	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
	49	\r
9319d2c2 LG	50	///\r
	51	/// *******************************************************\r
	52	/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION\r
	53	/// *******************************************************\r
	54	///\r
d1f95000	55	typedef enum {\r
9319d2c2 LG	56	///\r
	57	/// A read operation from system memory by a bus master that is not capable of producing\r
	58	/// PCI dual address cycles.\r
	59	///\r
d1f95000	60	EfiPciOperationBusMasterRead,\r
9319d2c2 LG	61	///\r
	62	/// A write operation from system memory by a bus master that is not capable of producing\r
	63	/// PCI dual address cycles.\r
	64	///\r
d1f95000	65	EfiPciOperationBusMasterWrite,\r
9319d2c2 LG	66	///\r
	67	/// Provides both read and write access to system memory by both the processor and a bus\r
	68	/// master that is not capable of producing PCI dual address cycles.\r
	69	///\r
d1f95000	70	EfiPciOperationBusMasterCommonBuffer,\r
9319d2c2 LG	71	///\r
	72	/// A read operation from system memory by a bus master that is capable of producing PCI\r
	73	/// dual address cycles.\r
	74	///\r
d1f95000	75	EfiPciOperationBusMasterRead64,\r
9319d2c2 LG	76	///\r
	77	/// A write operation to system memory by a bus master that is capable of producing PCI\r
	78	/// dual address cycles.\r
	79	///\r
d1f95000	80	EfiPciOperationBusMasterWrite64,\r
9319d2c2 LG	81	///\r
	82	/// Provides both read and write access to system memory by both the processor and a bus\r
	83	/// master that is capable of producing PCI dual address cycles.\r
	84	///\r
d1f95000	85	EfiPciOperationBusMasterCommonBuffer64,\r
	86	EfiPciOperationMaximum\r
	87	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
	88	\r
	89	#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001\r
	90	#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002\r
	91	#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004\r
	92	#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008\r
	93	#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010\r
	94	#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020\r
	95	#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040\r
	96	#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080\r
	97	#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800\r
	98	#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000\r
	99	#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000\r
	100	\r
	101	#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EFI_PCI_ATTRIBUTE_MEMORY_CACHED \| EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
	102	\r
	103	#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
	104	\r
	105	#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
	106	((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
	107	\r
	108	typedef struct {\r
	109	UINT8 Register;\r
	110	UINT8 Function;\r
	111	UINT8 Device;\r
	112	UINT8 Bus;\r
	113	UINT32 ExtendedRegister;\r
	114	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
	115	\r
	116	/** \r
	117	Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is\r
	118	satisfied or after a defined duration.\r
	119	\r
	120	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	121	@param Width Signifies the width of the memory or I/O operations.\r
	122	@param Address The base address of the memory or I/O operations. \r
	123	@param Mask Mask used for the polling criteria.\r
	124	@param Value The comparison value used for the polling exit criteria.\r
	125	@param Delay The number of 100 ns units to poll.\r
	126	@param Result Pointer to the last value read from the memory location.\r
	127	\r
	128	@retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.\r
	129	@retval EFI_TIMEOUT Delay expired before a match occurred.\r
	130	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
	131	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	132	\r
	133	**/\r
	134	typedef\r
	135	EFI_STATUS\r
8b13229b	136	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM)(\r
d1f95000	137	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	138	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
	139	IN UINT64 Address,\r
	140	IN UINT64 Mask,\r
	141	IN UINT64 Value,\r
	142	IN UINT64 Delay,\r
	143	OUT UINT64 *Result\r
	144	);\r
	145	\r
	146	/** \r
	147	Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.\r
	148	\r
	149	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	150	@param Width Signifies the width of the memory operations.\r
	151	@param Address The base address of the memory operations. \r
	152	@param Count The number of memory operations to perform.\r
	153	@param Buffer For read operations, the destination buffer to store the results. For write\r
	154	operations, the source buffer to write data from. \r
	155	\r
	156	@retval EFI_SUCCESS The data was read from or written to the PCI root bridge. \r
	157	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
	158	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	159	\r
	160	**/\r
	161	typedef\r
	162	EFI_STATUS\r
8b13229b	163	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM)(\r
d1f95000	164	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	165	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
	166	IN UINT64 Address,\r
	167	IN UINTN Count,\r
	168	IN OUT VOID *Buffer\r
	169	);\r
	170	\r
	171	typedef struct {\r
992f22b9 LG	172	///\r
	173	/// Read PCI controller registers in the PCI root bridge memory space.\r
	174	///\r
d1f95000	175	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;\r
992f22b9 LG	176	///\r
	177	/// Write PCI controller registers in the PCI root bridge memory space.\r
	178	///\r
d1f95000	179	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;\r
	180	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
	181	\r
	182	/** \r
	183	Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI\r
	184	root bridge memory space. \r
	185	\r
	186	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.\r
	187	@param Width Signifies the width of the memory operations.\r
	188	@param DestAddress The destination address of the memory operation. \r
	189	@param SrcAddress The source address of the memory operation. \r
	190	@param Count The number of memory operations to perform. \r
	191	\r
	192	@retval EFI_SUCCESS The data was copied from one memory region to another memory region. \r
	193	@retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.\r
	194	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
	195	\r
	196	**/\r
	197	typedef\r
	198	EFI_STATUS\r
8b13229b	199	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM)(\r
d1f95000	200	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	201	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
	202	IN UINT64 DestAddress,\r
	203	IN UINT64 SrcAddress,\r
	204	IN UINTN Count\r
	205	);\r
	206	\r
	207	/** \r
630b4187	208	Provides the PCI controller-specific addresses required to access system memory from a\r
d1f95000	209	DMA bus master. \r
	210	\r
	211	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	212	@param Operation Indicates if the bus master is going to read or write to system memory.\r
	213	@param HostAddress The system memory address to map to the PCI controller.\r
	214	@param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
	215	that were mapped. \r
	216	@param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
	217	access the hosts HostAddress. \r
	218	@param Mapping A resulting value to pass to Unmap().\r
	219	\r
	220	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
	221	@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. \r
	222	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	223	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
	224	@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
	225	\r
	226	**/\r
	227	typedef\r
	228	EFI_STATUS\r
8b13229b	229	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP)(\r
d1f95000	230	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	231	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,\r
	232	IN VOID *HostAddress,\r
	233	IN OUT UINTN *NumberOfBytes,\r
	234	OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
	235	OUT VOID **Mapping\r
	236	);\r
	237	\r
	238	/** \r
	239	Completes the Map() operation and releases any corresponding resources.\r
	240	\r
	241	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	242	@param Mapping The mapping value returned from Map().\r
	243	\r
	244	@retval EFI_SUCCESS The range was unmapped.\r
	245	@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
	246	@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
	247	\r
	248	**/\r
	249	typedef\r
	250	EFI_STATUS\r
8b13229b	251	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP)(\r
d1f95000	252	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	253	IN VOID *Mapping\r
	254	);\r
	255	\r
	256	/** \r
	257	Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or\r
	258	EfiPciOperationBusMasterCommonBuffer64 mapping. \r
	259	\r
	260	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	261	@param Type This parameter is not used and must be ignored.\r
	262	@param MemoryType The type of memory to allocate, EfiBootServicesData or\r
	263	EfiRuntimeServicesData. \r
	264	@param Pages The number of pages to allocate. \r
	265	@param HostAddress A pointer to store the base system memory address of the\r
	266	allocated range. \r
	267	@param Attributes The requested bit mask of attributes for the allocated range.\r
	268	\r
	269	@retval EFI_SUCCESS The requested memory pages were allocated.\r
	270	@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
	271	MEMORY_WRITE_COMBINE and MEMORY_CACHED. \r
	272	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	273	@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. \r
	274	\r
	275	**/\r
	276	typedef\r
	277	EFI_STATUS\r
8b13229b	278	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER)(\r
d1f95000	279	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	280	IN EFI_ALLOCATE_TYPE Type,\r
	281	IN EFI_MEMORY_TYPE MemoryType,\r
	282	IN UINTN Pages,\r
	283	IN OUT VOID **HostAddress,\r
	284	IN UINT64 Attributes\r
	285	);\r
	286	\r
	287	/** \r
	288	Frees memory that was allocated with AllocateBuffer().\r
	289	\r
	290	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	291	@param Pages The number of pages to free. \r
	292	@param HostAddress The base system memory address of the allocated range. \r
	293	\r
	294	@retval EFI_SUCCESS The requested memory pages were freed.\r
	295	@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
	296	was not allocated with AllocateBuffer().\r
	297	\r
	298	**/\r
	299	typedef\r
	300	EFI_STATUS\r
8b13229b	301	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER)(\r
d1f95000	302	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	303	IN UINTN Pages,\r
	304	IN VOID *HostAddress\r
	305	);\r
	306	\r
	307	/** \r
	308	Flushes all PCI posted write transactions from a PCI host bridge to system memory.\r
	309	\r
	310	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	311	\r
	312	@retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host\r
	313	bridge to system memory. \r
	314	@retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI\r
	315	host bridge due to a hardware error. \r
	316	\r
	317	**/\r
	318	typedef\r
	319	EFI_STATUS\r
8b13229b	320	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH)(\r
d1f95000	321	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This\r
	322	);\r
	323	\r
	324	/** \r
	325	Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the\r
	326	attributes that a PCI root bridge is currently using. \r
	327	\r
	328	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	329	@param Supports A pointer to the mask of attributes that this PCI root bridge supports\r
	330	setting with SetAttributes(). \r
	331	@param Attributes A pointer to the mask of attributes that this PCI root bridge is currently\r
	332	using. \r
	333	\r
	334	@retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root \r
	335	bridge supports is returned in Supports. If Attributes is \r
	336	not NULL, then the attributes that the PCI root bridge is currently\r
	337	using is returned in Attributes. \r
	338	@retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.\r
	339	\r
	340	\r
	341	**/\r
	342	typedef\r
	343	EFI_STATUS\r
8b13229b	344	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES)(\r
d1f95000	345	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	346	OUT UINT64 *Supports,\r
	347	OUT UINT64 *Attributes\r
	348	);\r
	349	\r
	350	/** \r
	351	Sets attributes for a resource range on a PCI root bridge.\r
	352	\r
	353	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	354	@param Attributes The mask of attributes to set.\r
	355	@param ResourceBase A pointer to the base address of the resource range to be modified by the\r
	356	attributes specified by Attributes.\r
	357	@param ResourceLength A pointer to the length of the resource range to be modified by the\r
	358	attributes specified by Attributes. \r
	359	\r
	360	@retval EFI_SUCCESS The set of attributes specified by Attributes for the resource \r
	361	range specified by ResourceBase and ResourceLength \r
	362	were set on the PCI root bridge, and the actual resource range is\r
	363	returned in ResuourceBase and ResourceLength. \r
	364	@retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root\r
	365	Bridge. \r
	366	@retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the \r
	367	resource range specified by BaseAddress and Length. \r
	368	@retval EFI_INVALID_PARAMETER One or more parameters are invalid. \r
	369	\r
	370	**/\r
	371	typedef\r
	372	EFI_STATUS\r
8b13229b	373	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES)(\r
d1f95000	374	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	375	IN UINT64 Attributes,\r
	376	IN OUT UINT64 *ResourceBase,\r
	377	IN OUT UINT64 *ResourceLength\r
	378	);\r
	379	\r
	380	/** \r
	381	Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0\r
	382	resource descriptors. \r
	383	\r
	384	@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
	385	@param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current\r
	386	configuration of this PCI root bridge. \r
	387	\r
	388	@retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in\r
	389	Resources. \r
	390	@retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be\r
	391	retrieved. \r
	392	\r
	393	**/\r
	394	typedef\r
	395	EFI_STATUS\r
8b13229b	396	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION)(\r
d1f95000	397	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r
	398	OUT VOID **Resources\r
	399	);\r
	400	\r
44717a39	401	///\r
	402	/// Provides the basic Memory, I/O, PCI configuration, and DMA interfaces that are \r
	403	/// used to abstract accesses to PCI controllers behind a PCI Root Bridge Controller. \r
	404	///\r
d1f95000	405	struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {\r
cce6f7aa	406	///\r
	407	/// The EFI_HANDLE of the PCI Host Bridge of which this PCI Root Bridge is a member.\r
	408	///\r
d1f95000	409	EFI_HANDLE ParentHandle;\r
	410	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;\r
	411	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;\r
	412	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem;\r
	413	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io;\r
	414	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci;\r
	415	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem;\r
	416	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map;\r
	417	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap;\r
	418	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;\r
	419	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer;\r
	420	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush;\r
	421	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;\r
	422	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;\r
	423	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;\r
cce6f7aa	424	\r
	425	///\r
	426	/// The segment number that this PCI root bridge resides.\r
	427	///\r
d1f95000	428	UINT32 SegmentNumber;\r
	429	};\r
	430	\r
	431	extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;\r
	432	\r
	433	#endif\r