[mirror_edk2.git] / MdePkg / Include / Protocol / SmmCpu.h

/** @file\r
  EFI SMM CPU Protocol as defined in the PI 1.2 specification.\r
\r
  This protocol allows SMM drivers to access architecture-standard registers from any of the CPU \r
  save state areas. In some cases, difference processors provide the same information in the save state, \r
  but not in the same format. These so-called pseudo-registers provide this information in a standard \r
  format.  \r
\r
  Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials                          \r
  are licensed and made available under the terms and conditions of the BSD License         \r
  which accompanies this distribution.  The full text of the license may be found at        \r
  http://opensource.org/licenses/bsd-license.php                                            \r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
**/\r
\r
#ifndef _SMM_CPU_H_\r
#define _SMM_CPU_H_\r
\r
#include <Protocol/MmCpu.h>\r
\r
#define EFI_SMM_CPU_PROTOCOL_GUID  EFI_MM_CPU_PROTOCOL_GUID\r
\r
#define EFI_SMM_SAVE_STATE_REGISTER_GDTBASE       EFI_MM_SAVE_STATE_REGISTER_GDTBASE\r
#define EFI_SMM_SAVE_STATE_REGISTER_IDTBASE       EFI_MM_SAVE_STATE_REGISTER_IDTBASE\r
#define EFI_SMM_SAVE_STATE_REGISTER_LDTBASE       EFI_MM_SAVE_STATE_REGISTER_LDTBASE\r
#define EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT      EFI_MM_SAVE_STATE_REGISTER_GDTLIMIT\r
#define EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT      EFI_MM_SAVE_STATE_REGISTER_IDTLIMIT\r
#define EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT      EFI_MM_SAVE_STATE_REGISTER_LDTLIMIT\r
#define EFI_SMM_SAVE_STATE_REGISTER_LDTINFO       EFI_MM_SAVE_STATE_REGISTER_LDTINFO\r
#define EFI_SMM_SAVE_STATE_REGISTER_ES            EFI_MM_SAVE_STATE_REGISTER_ES\r
#define EFI_SMM_SAVE_STATE_REGISTER_CS            EFI_MM_SAVE_STATE_REGISTER_CS\r
#define EFI_SMM_SAVE_STATE_REGISTER_SS            EFI_MM_SAVE_STATE_REGISTER_SS\r
#define EFI_SMM_SAVE_STATE_REGISTER_DS            EFI_MM_SAVE_STATE_REGISTER_DS\r
#define EFI_SMM_SAVE_STATE_REGISTER_FS            EFI_MM_SAVE_STATE_REGISTER_FS\r
#define EFI_SMM_SAVE_STATE_REGISTER_GS            EFI_MM_SAVE_STATE_REGISTER_GS\r
#define EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL      EFI_MM_SAVE_STATE_REGISTER_LDTR_SEL\r
#define EFI_SMM_SAVE_STATE_REGISTER_TR_SEL        EFI_MM_SAVE_STATE_REGISTER_TR_SEL\r
#define EFI_SMM_SAVE_STATE_REGISTER_DR7           EFI_MM_SAVE_STATE_REGISTER_DR7\r
#define EFI_SMM_SAVE_STATE_REGISTER_DR6           EFI_MM_SAVE_STATE_REGISTER_DR6\r
#define EFI_SMM_SAVE_STATE_REGISTER_R8            EFI_MM_SAVE_STATE_REGISTER_R8\r
#define EFI_SMM_SAVE_STATE_REGISTER_R9            EFI_MM_SAVE_STATE_REGISTER_R9\r
#define EFI_SMM_SAVE_STATE_REGISTER_R10           EFI_MM_SAVE_STATE_REGISTER_R10\r
#define EFI_SMM_SAVE_STATE_REGISTER_R11           EFI_MM_SAVE_STATE_REGISTER_R11\r
#define EFI_SMM_SAVE_STATE_REGISTER_R12           EFI_MM_SAVE_STATE_REGISTER_R12\r
#define EFI_SMM_SAVE_STATE_REGISTER_R13           EFI_MM_SAVE_STATE_REGISTER_R13\r
#define EFI_SMM_SAVE_STATE_REGISTER_R14           EFI_MM_SAVE_STATE_REGISTER_R14\r
#define EFI_SMM_SAVE_STATE_REGISTER_R15           EFI_MM_SAVE_STATE_REGISTER_R15\r
#define EFI_SMM_SAVE_STATE_REGISTER_RAX           EFI_MM_SAVE_STATE_REGISTER_RAX\r
#define EFI_SMM_SAVE_STATE_REGISTER_RBX           EFI_MM_SAVE_STATE_REGISTER_RBX\r
#define EFI_SMM_SAVE_STATE_REGISTER_RCX           EFI_MM_SAVE_STATE_REGISTER_RCX\r
#define EFI_SMM_SAVE_STATE_REGISTER_RDX           EFI_MM_SAVE_STATE_REGISTER_RDX\r
#define EFI_SMM_SAVE_STATE_REGISTER_RSP           EFI_MM_SAVE_STATE_REGISTER_RSP\r
#define EFI_SMM_SAVE_STATE_REGISTER_RBP           EFI_MM_SAVE_STATE_REGISTER_RBP\r
#define EFI_SMM_SAVE_STATE_REGISTER_RSI           EFI_MM_SAVE_STATE_REGISTER_RSI\r
#define EFI_SMM_SAVE_STATE_REGISTER_RDI           EFI_MM_SAVE_STATE_REGISTER_RDI\r
#define EFI_SMM_SAVE_STATE_REGISTER_RIP           EFI_MM_SAVE_STATE_REGISTER_RIP\r
#define EFI_SMM_SAVE_STATE_REGISTER_RFLAGS        EFI_MM_SAVE_STATE_REGISTER_RFLAGS\r
#define EFI_SMM_SAVE_STATE_REGISTER_CR0           EFI_MM_SAVE_STATE_REGISTER_CR0\r
#define EFI_SMM_SAVE_STATE_REGISTER_CR3           EFI_MM_SAVE_STATE_REGISTER_CR3\r
#define EFI_SMM_SAVE_STATE_REGISTER_CR4           EFI_MM_SAVE_STATE_REGISTER_CR4\r
#define EFI_SMM_SAVE_STATE_REGISTER_FCW           EFI_MM_SAVE_STATE_REGISTER_FCW\r
#define EFI_SMM_SAVE_STATE_REGISTER_FSW           EFI_MM_SAVE_STATE_REGISTER_FSW\r
#define EFI_SMM_SAVE_STATE_REGISTER_FTW           EFI_MM_SAVE_STATE_REGISTER_FTW\r
#define EFI_SMM_SAVE_STATE_REGISTER_OPCODE        EFI_MM_SAVE_STATE_REGISTER_OPCODE\r
#define EFI_SMM_SAVE_STATE_REGISTER_FP_EIP        EFI_MM_SAVE_STATE_REGISTER_FP_EIP\r
#define EFI_SMM_SAVE_STATE_REGISTER_FP_CS         EFI_MM_SAVE_STATE_REGISTER_FP_CS\r
#define EFI_SMM_SAVE_STATE_REGISTER_DATAOFFSET    EFI_MM_SAVE_STATE_REGISTER_DATAOFFSET\r
#define EFI_SMM_SAVE_STATE_REGISTER_FP_DS         EFI_MM_SAVE_STATE_REGISTER_FP_DS\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM0           EFI_MM_SAVE_STATE_REGISTER_MM0\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM1           EFI_MM_SAVE_STATE_REGISTER_MM1\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM2           EFI_MM_SAVE_STATE_REGISTER_MM2\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM3           EFI_MM_SAVE_STATE_REGISTER_MM3\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM4           EFI_MM_SAVE_STATE_REGISTER_MM4\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM5           EFI_MM_SAVE_STATE_REGISTER_MM5\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM6           EFI_MM_SAVE_STATE_REGISTER_MM6\r
#define EFI_SMM_SAVE_STATE_REGISTER_MM7           EFI_MM_SAVE_STATE_REGISTER_MM7\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM0          EFI_MM_SAVE_STATE_REGISTER_XMM0\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM1          EFI_MM_SAVE_STATE_REGISTER_XMM1\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM2          EFI_MM_SAVE_STATE_REGISTER_XMM2\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM3          EFI_MM_SAVE_STATE_REGISTER_XMM3\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM4          EFI_MM_SAVE_STATE_REGISTER_XMM4\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM5          EFI_MM_SAVE_STATE_REGISTER_XMM5\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM6          EFI_MM_SAVE_STATE_REGISTER_XMM6\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM7          EFI_MM_SAVE_STATE_REGISTER_XMM7\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM8          EFI_MM_SAVE_STATE_REGISTER_XMM8\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM9          EFI_MM_SAVE_STATE_REGISTER_XMM9\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM10         EFI_MM_SAVE_STATE_REGISTER_XMM10\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM11         EFI_MM_SAVE_STATE_REGISTER_XMM11\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM12         EFI_MM_SAVE_STATE_REGISTER_XMM12\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM13         EFI_MM_SAVE_STATE_REGISTER_XMM13\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM14         EFI_MM_SAVE_STATE_REGISTER_XMM14\r
#define EFI_SMM_SAVE_STATE_REGISTER_XMM15         EFI_MM_SAVE_STATE_REGISTER_XMM15\r
#define EFI_SMM_SAVE_STATE_REGISTER_IO            EFI_MM_SAVE_STATE_REGISTER_IO\r
#define EFI_SMM_SAVE_STATE_REGISTER_LMA           EFI_MM_SAVE_STATE_REGISTER_LMA\r
#define EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID  EFI_MM_SAVE_STATE_REGISTER_PROCESSOR_ID\r
\r
typedef EFI_MM_SAVE_STATE_REGISTER  EFI_SMM_SAVE_STATE_REGISTER;\r
\r
\r
#define EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT\r
#define EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT\r
\r
\r
///\r
/// Size width of I/O instruction\r
///\r
#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT8 EFI_MM_SAVE_STATE_IO_WIDTH_UINT8\r
#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT16 EFI_MM_SAVE_STATE_IO_WIDTH_UINT16\r
#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT32 EFI_MM_SAVE_STATE_IO_WIDTH_UINT32\r
#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT64 EFI_MM_SAVE_STATE_IO_WIDTH_UINT64\r
typedef EFI_MM_SAVE_STATE_IO_WIDTH EFI_SMM_SAVE_STATE_IO_WIDTH;\r
\r
///\r
/// Types of I/O instruction\r
///\r
#define EFI_SMM_SAVE_STATE_IO_TYPE_INPUT EFI_MM_SAVE_STATE_IO_TYPE_INPUT\r
#define EFI_SMM_SAVE_STATE_IO_TYPE_OUTPUT EFI_MM_SAVE_STATE_IO_TYPE_OUTPUT\r
#define EFI_SMM_SAVE_STATE_IO_TYPE_STRING EFI_MM_SAVE_STATE_IO_TYPE_STRING\r
#define EFI_SMM_SAVE_STATE_IO_TYPE_REP_PREFIX EFI_MM_SAVE_STATE_IO_TYPE_REP_PREFIX\r
typedef  EFI_MM_SAVE_STATE_IO_TYPE EFI_SMM_SAVE_STATE_IO_TYPE;\r
\r
typedef  EFI_MM_SAVE_STATE_IO_INFO EFI_SMM_SAVE_STATE_IO_INFO;\r
\r
typedef  EFI_MM_CPU_PROTOCOL EFI_SMM_CPU_PROTOCOL;\r
\r
typedef EFI_MM_READ_SAVE_STATE EFI_SMM_READ_SAVE_STATE;\r
\r
typedef EFI_MM_WRITE_SAVE_STATE EFI_SMM_WRITE_SAVE_STATE;\r
extern EFI_GUID gEfiSmmCpuProtocolGuid;\r
\r
#endif\r
\r
Commit	Line	Data
d0778dd7	1	/** @file\r
	2	EFI SMM CPU Protocol as defined in the PI 1.2 specification.\r
	3	\r
	4	This protocol allows SMM drivers to access architecture-standard registers from any of the CPU \r
	5	save state areas. In some cases, difference processors provide the same information in the save state, \r
	6	but not in the same format. These so-called pseudo-registers provide this information in a standard \r
	7	format. \r
	8	\r
2f208e59	9	Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
9df063a0	10	This program and the accompanying materials \r
d0778dd7	11	are licensed and made available under the terms and conditions of the BSD License \r
	12	which accompanies this distribution. The full text of the license may be found at \r
	13	http://opensource.org/licenses/bsd-license.php \r
	14	\r
	15	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	16	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	17	\r
	18	**/\r
	19	\r
	20	#ifndef _SMM_CPU_H_\r
	21	#define _SMM_CPU_H_\r
	22	\r
2f208e59 ED	23	#include <Protocol/MmCpu.h>\r
	24	\r
	25	#define EFI_SMM_CPU_PROTOCOL_GUID EFI_MM_CPU_PROTOCOL_GUID\r
	26	\r
	27	#define EFI_SMM_SAVE_STATE_REGISTER_GDTBASE EFI_MM_SAVE_STATE_REGISTER_GDTBASE\r
	28	#define EFI_SMM_SAVE_STATE_REGISTER_IDTBASE EFI_MM_SAVE_STATE_REGISTER_IDTBASE\r
	29	#define EFI_SMM_SAVE_STATE_REGISTER_LDTBASE EFI_MM_SAVE_STATE_REGISTER_LDTBASE\r
	30	#define EFI_SMM_SAVE_STATE_REGISTER_GDTLIMIT EFI_MM_SAVE_STATE_REGISTER_GDTLIMIT\r
	31	#define EFI_SMM_SAVE_STATE_REGISTER_IDTLIMIT EFI_MM_SAVE_STATE_REGISTER_IDTLIMIT\r
	32	#define EFI_SMM_SAVE_STATE_REGISTER_LDTLIMIT EFI_MM_SAVE_STATE_REGISTER_LDTLIMIT\r
	33	#define EFI_SMM_SAVE_STATE_REGISTER_LDTINFO EFI_MM_SAVE_STATE_REGISTER_LDTINFO\r
	34	#define EFI_SMM_SAVE_STATE_REGISTER_ES EFI_MM_SAVE_STATE_REGISTER_ES\r
	35	#define EFI_SMM_SAVE_STATE_REGISTER_CS EFI_MM_SAVE_STATE_REGISTER_CS\r
	36	#define EFI_SMM_SAVE_STATE_REGISTER_SS EFI_MM_SAVE_STATE_REGISTER_SS\r
	37	#define EFI_SMM_SAVE_STATE_REGISTER_DS EFI_MM_SAVE_STATE_REGISTER_DS\r
	38	#define EFI_SMM_SAVE_STATE_REGISTER_FS EFI_MM_SAVE_STATE_REGISTER_FS\r
	39	#define EFI_SMM_SAVE_STATE_REGISTER_GS EFI_MM_SAVE_STATE_REGISTER_GS\r
	40	#define EFI_SMM_SAVE_STATE_REGISTER_LDTR_SEL EFI_MM_SAVE_STATE_REGISTER_LDTR_SEL\r
	41	#define EFI_SMM_SAVE_STATE_REGISTER_TR_SEL EFI_MM_SAVE_STATE_REGISTER_TR_SEL\r
	42	#define EFI_SMM_SAVE_STATE_REGISTER_DR7 EFI_MM_SAVE_STATE_REGISTER_DR7\r
	43	#define EFI_SMM_SAVE_STATE_REGISTER_DR6 EFI_MM_SAVE_STATE_REGISTER_DR6\r
	44	#define EFI_SMM_SAVE_STATE_REGISTER_R8 EFI_MM_SAVE_STATE_REGISTER_R8\r
	45	#define EFI_SMM_SAVE_STATE_REGISTER_R9 EFI_MM_SAVE_STATE_REGISTER_R9\r
	46	#define EFI_SMM_SAVE_STATE_REGISTER_R10 EFI_MM_SAVE_STATE_REGISTER_R10\r
	47	#define EFI_SMM_SAVE_STATE_REGISTER_R11 EFI_MM_SAVE_STATE_REGISTER_R11\r
	48	#define EFI_SMM_SAVE_STATE_REGISTER_R12 EFI_MM_SAVE_STATE_REGISTER_R12\r
	49	#define EFI_SMM_SAVE_STATE_REGISTER_R13 EFI_MM_SAVE_STATE_REGISTER_R13\r
	50	#define EFI_SMM_SAVE_STATE_REGISTER_R14 EFI_MM_SAVE_STATE_REGISTER_R14\r
	51	#define EFI_SMM_SAVE_STATE_REGISTER_R15 EFI_MM_SAVE_STATE_REGISTER_R15\r
	52	#define EFI_SMM_SAVE_STATE_REGISTER_RAX EFI_MM_SAVE_STATE_REGISTER_RAX\r
	53	#define EFI_SMM_SAVE_STATE_REGISTER_RBX EFI_MM_SAVE_STATE_REGISTER_RBX\r
	54	#define EFI_SMM_SAVE_STATE_REGISTER_RCX EFI_MM_SAVE_STATE_REGISTER_RCX\r
	55	#define EFI_SMM_SAVE_STATE_REGISTER_RDX EFI_MM_SAVE_STATE_REGISTER_RDX\r
	56	#define EFI_SMM_SAVE_STATE_REGISTER_RSP EFI_MM_SAVE_STATE_REGISTER_RSP\r
	57	#define EFI_SMM_SAVE_STATE_REGISTER_RBP EFI_MM_SAVE_STATE_REGISTER_RBP\r
	58	#define EFI_SMM_SAVE_STATE_REGISTER_RSI EFI_MM_SAVE_STATE_REGISTER_RSI\r
	59	#define EFI_SMM_SAVE_STATE_REGISTER_RDI EFI_MM_SAVE_STATE_REGISTER_RDI\r
	60	#define EFI_SMM_SAVE_STATE_REGISTER_RIP EFI_MM_SAVE_STATE_REGISTER_RIP\r
	61	#define EFI_SMM_SAVE_STATE_REGISTER_RFLAGS EFI_MM_SAVE_STATE_REGISTER_RFLAGS\r
	62	#define EFI_SMM_SAVE_STATE_REGISTER_CR0 EFI_MM_SAVE_STATE_REGISTER_CR0\r
	63	#define EFI_SMM_SAVE_STATE_REGISTER_CR3 EFI_MM_SAVE_STATE_REGISTER_CR3\r
	64	#define EFI_SMM_SAVE_STATE_REGISTER_CR4 EFI_MM_SAVE_STATE_REGISTER_CR4\r
	65	#define EFI_SMM_SAVE_STATE_REGISTER_FCW EFI_MM_SAVE_STATE_REGISTER_FCW\r
	66	#define EFI_SMM_SAVE_STATE_REGISTER_FSW EFI_MM_SAVE_STATE_REGISTER_FSW\r
	67	#define EFI_SMM_SAVE_STATE_REGISTER_FTW EFI_MM_SAVE_STATE_REGISTER_FTW\r
	68	#define EFI_SMM_SAVE_STATE_REGISTER_OPCODE EFI_MM_SAVE_STATE_REGISTER_OPCODE\r
	69	#define EFI_SMM_SAVE_STATE_REGISTER_FP_EIP EFI_MM_SAVE_STATE_REGISTER_FP_EIP\r
	70	#define EFI_SMM_SAVE_STATE_REGISTER_FP_CS EFI_MM_SAVE_STATE_REGISTER_FP_CS\r
	71	#define EFI_SMM_SAVE_STATE_REGISTER_DATAOFFSET EFI_MM_SAVE_STATE_REGISTER_DATAOFFSET\r
	72	#define EFI_SMM_SAVE_STATE_REGISTER_FP_DS EFI_MM_SAVE_STATE_REGISTER_FP_DS\r
	73	#define EFI_SMM_SAVE_STATE_REGISTER_MM0 EFI_MM_SAVE_STATE_REGISTER_MM0\r
	74	#define EFI_SMM_SAVE_STATE_REGISTER_MM1 EFI_MM_SAVE_STATE_REGISTER_MM1\r
	75	#define EFI_SMM_SAVE_STATE_REGISTER_MM2 EFI_MM_SAVE_STATE_REGISTER_MM2\r
	76	#define EFI_SMM_SAVE_STATE_REGISTER_MM3 EFI_MM_SAVE_STATE_REGISTER_MM3\r
	77	#define EFI_SMM_SAVE_STATE_REGISTER_MM4 EFI_MM_SAVE_STATE_REGISTER_MM4\r
	78	#define EFI_SMM_SAVE_STATE_REGISTER_MM5 EFI_MM_SAVE_STATE_REGISTER_MM5\r
	79	#define EFI_SMM_SAVE_STATE_REGISTER_MM6 EFI_MM_SAVE_STATE_REGISTER_MM6\r
	80	#define EFI_SMM_SAVE_STATE_REGISTER_MM7 EFI_MM_SAVE_STATE_REGISTER_MM7\r
	81	#define EFI_SMM_SAVE_STATE_REGISTER_XMM0 EFI_MM_SAVE_STATE_REGISTER_XMM0\r
	82	#define EFI_SMM_SAVE_STATE_REGISTER_XMM1 EFI_MM_SAVE_STATE_REGISTER_XMM1\r
	83	#define EFI_SMM_SAVE_STATE_REGISTER_XMM2 EFI_MM_SAVE_STATE_REGISTER_XMM2\r
	84	#define EFI_SMM_SAVE_STATE_REGISTER_XMM3 EFI_MM_SAVE_STATE_REGISTER_XMM3\r
	85	#define EFI_SMM_SAVE_STATE_REGISTER_XMM4 EFI_MM_SAVE_STATE_REGISTER_XMM4\r
	86	#define EFI_SMM_SAVE_STATE_REGISTER_XMM5 EFI_MM_SAVE_STATE_REGISTER_XMM5\r
87	#define EFI_SMM_SAVE_STATE_REGISTER_XMM6 EFI_MM_SAVE_STATE_REGISTER_XMM6\r
88	#define EFI_SMM_SAVE_STATE_REGISTER_XMM7 EFI_MM_SAVE_STATE_REGISTER_XMM7\r
89	#define EFI_SMM_SAVE_STATE_REGISTER_XMM8 EFI_MM_SAVE_STATE_REGISTER_XMM8\r
90	#define EFI_SMM_SAVE_STATE_REGISTER_XMM9 EFI_MM_SAVE_STATE_REGISTER_XMM9\r
91	#define EFI_SMM_SAVE_STATE_REGISTER_XMM10 EFI_MM_SAVE_STATE_REGISTER_XMM10\r
92	#define EFI_SMM_SAVE_STATE_REGISTER_XMM11 EFI_MM_SAVE_STATE_REGISTER_XMM11\r
93	#define EFI_SMM_SAVE_STATE_REGISTER_XMM12 EFI_MM_SAVE_STATE_REGISTER_XMM12\r
94	#define EFI_SMM_SAVE_STATE_REGISTER_XMM13 EFI_MM_SAVE_STATE_REGISTER_XMM13\r
95	#define EFI_SMM_SAVE_STATE_REGISTER_XMM14 EFI_MM_SAVE_STATE_REGISTER_XMM14\r
96	#define EFI_SMM_SAVE_STATE_REGISTER_XMM15 EFI_MM_SAVE_STATE_REGISTER_XMM15\r
97	#define EFI_SMM_SAVE_STATE_REGISTER_IO EFI_MM_SAVE_STATE_REGISTER_IO\r
98	#define EFI_SMM_SAVE_STATE_REGISTER_LMA EFI_MM_SAVE_STATE_REGISTER_LMA\r
99	#define EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID EFI_MM_SAVE_STATE_REGISTER_PROCESSOR_ID\r
100	\r
101	typedef EFI_MM_SAVE_STATE_REGISTER EFI_SMM_SAVE_STATE_REGISTER;\r
102	\r
103	\r
104	#define EFI_SMM_SAVE_STATE_REGISTER_LMA_32BIT EFI_MM_SAVE_STATE_REGISTER_LMA_32BIT\r
105	#define EFI_SMM_SAVE_STATE_REGISTER_LMA_64BIT EFI_MM_SAVE_STATE_REGISTER_LMA_64BIT\r
d0778dd7	106	\r
d0778dd7	107	\r
	108	///\r
	109	/// Size width of I/O instruction\r
	110	///\r
2f208e59 ED	111	#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT8 EFI_MM_SAVE_STATE_IO_WIDTH_UINT8\r
	112	#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT16 EFI_MM_SAVE_STATE_IO_WIDTH_UINT16\r
	113	#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT32 EFI_MM_SAVE_STATE_IO_WIDTH_UINT32\r
	114	#define EFI_SMM_SAVE_STATE_IO_WIDTH_UINT64 EFI_MM_SAVE_STATE_IO_WIDTH_UINT64\r
	115	typedef EFI_MM_SAVE_STATE_IO_WIDTH EFI_SMM_SAVE_STATE_IO_WIDTH;\r
d0778dd7	116	\r
	117	///\r
	118	/// Types of I/O instruction\r
	119	///\r
2f208e59 ED	120	#define EFI_SMM_SAVE_STATE_IO_TYPE_INPUT EFI_MM_SAVE_STATE_IO_TYPE_INPUT\r
	121	#define EFI_SMM_SAVE_STATE_IO_TYPE_OUTPUT EFI_MM_SAVE_STATE_IO_TYPE_OUTPUT\r
	122	#define EFI_SMM_SAVE_STATE_IO_TYPE_STRING EFI_MM_SAVE_STATE_IO_TYPE_STRING\r
	123	#define EFI_SMM_SAVE_STATE_IO_TYPE_REP_PREFIX EFI_MM_SAVE_STATE_IO_TYPE_REP_PREFIX\r
	124	typedef EFI_MM_SAVE_STATE_IO_TYPE EFI_SMM_SAVE_STATE_IO_TYPE;\r
d0778dd7	125	\r
2f208e59	126	typedef EFI_MM_SAVE_STATE_IO_INFO EFI_SMM_SAVE_STATE_IO_INFO;\r
d0778dd7	127	\r
2f208e59 ED	128	typedef EFI_MM_CPU_PROTOCOL EFI_SMM_CPU_PROTOCOL;\r
	129	\r
	130	typedef EFI_MM_READ_SAVE_STATE EFI_SMM_READ_SAVE_STATE;\r
d0778dd7	131	\r
2f208e59	132	typedef EFI_MM_WRITE_SAVE_STATE EFI_SMM_WRITE_SAVE_STATE;\r
d0778dd7	133	extern EFI_GUID gEfiSmmCpuProtocolGuid;\r
	134	\r
	135	#endif\r
	136	\r