[mirror_edk2.git] / MdePkg / Include / Uefi / UefiPxe.h

/** @file\r
  This header file contains all of the PXE type definitions,\r
  structure prototypes, global variables and constants that\r
  are needed for porting PXE to EFI.\r
\r
Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials are licensed and made available under \r
the terms and conditions of the BSD License that accompanies this distribution.  \r
The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php.                                          \r
    \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  @par Revision Reference:\r
  32/64-bit PXE specification:\r
  alpha-4, 99-Dec-17.\r
\r
**/\r
\r
#ifndef __EFI_PXE_H__\r
#define __EFI_PXE_H__\r
\r
#pragma pack(1)\r
\r
#define PXE_BUSTYPE(a, b, c, d) \\r
    ( \\r
      (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \\r
        ((PXE_UINT32) (a) & 0xFF) \\r
    )\r
\r
///\r
/// UNDI ROM ID and devive ID signature.\r
///\r
#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')\r
\r
///\r
/// BUS ROM ID signatures.\r
///\r
#define PXE_BUSTYPE_PCI     PXE_BUSTYPE ('P', 'C', 'I', 'R')\r
#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')\r
#define PXE_BUSTYPE_USB     PXE_BUSTYPE ('U', 'S', 'B', 'R')\r
#define PXE_BUSTYPE_1394    PXE_BUSTYPE ('1', '3', '9', '4')\r
\r
#define PXE_SWAP_UINT16(n)  ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))\r
\r
#define PXE_SWAP_UINT32(n) \\r
  ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \\r
   (((PXE_UINT32)(n) & 0x0000FF00) << 8)  | \\r
   (((PXE_UINT32)(n) & 0x00FF0000) >> 8)  | \\r
   (((PXE_UINT32)(n) & 0xFF000000) >> 24))\r
\r
#define PXE_SWAP_UINT64(n) \\r
  ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \\r
   (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \\r
   (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \\r
   (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8)  | \\r
   (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8)  | \\r
   (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \\r
   (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \\r
   (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))\r
\r
\r
#define PXE_CPBSIZE_NOT_USED  0               ///< zero\r
#define PXE_DBSIZE_NOT_USED   0               ///< zero\r
#define PXE_CPBADDR_NOT_USED  (PXE_UINT64) 0  ///< zero\r
#define PXE_DBADDR_NOT_USED   (PXE_UINT64) 0  ///< zero\r
#define PXE_CONST             CONST\r
\r
#define PXE_VOLATILE          volatile\r
\r
typedef VOID           PXE_VOID;\r
typedef UINT8          PXE_UINT8;\r
typedef UINT16         PXE_UINT16;\r
typedef UINT32         PXE_UINT32;\r
typedef UINTN          PXE_UINTN;\r
\r
///\r
/// Typedef unsigned long PXE_UINT64.\r
///\r
typedef UINT64      PXE_UINT64;\r
\r
typedef PXE_UINT8 PXE_BOOL;\r
#define PXE_FALSE 0            ///< zero\r
#define PXE_TRUE  (!PXE_FALSE)\r
\r
typedef PXE_UINT16      PXE_OPCODE;\r
\r
///\r
/// Return UNDI operational state.\r
///\r
#define PXE_OPCODE_GET_STATE  0x0000\r
\r
///\r
/// Change UNDI operational state from Stopped to Started.\r
///\r
#define PXE_OPCODE_START  0x0001\r
\r
///\r
/// Change UNDI operational state from Started to Stopped.\r
///\r
#define PXE_OPCODE_STOP 0x0002\r
\r
///\r
/// Get UNDI initialization information.\r
///\r
#define PXE_OPCODE_GET_INIT_INFO  0x0003\r
\r
///\r
/// Get NIC configuration information.\r
///\r
#define PXE_OPCODE_GET_CONFIG_INFO  0x0004\r
\r
///\r
/// Changed UNDI operational state from Started to Initialized.\r
///\r
#define PXE_OPCODE_INITIALIZE 0x0005\r
\r
///\r
/// Re-initialize the NIC H/W.\r
///\r
#define PXE_OPCODE_RESET  0x0006\r
\r
///\r
/// Change the UNDI operational state from Initialized to Started.\r
///\r
#define PXE_OPCODE_SHUTDOWN 0x0007\r
\r
///\r
/// Read & change state of external interrupt enables.\r
///\r
#define PXE_OPCODE_INTERRUPT_ENABLES  0x0008\r
\r
///\r
/// Read & change state of packet receive filters.\r
///\r
#define PXE_OPCODE_RECEIVE_FILTERS  0x0009\r
\r
///\r
/// Read & change station MAC address.\r
///\r
#define PXE_OPCODE_STATION_ADDRESS  0x000A\r
\r
///\r
/// Read traffic statistics.\r
///\r
#define PXE_OPCODE_STATISTICS 0x000B\r
\r
///\r
/// Convert multicast IP address to multicast MAC address.\r
///\r
#define PXE_OPCODE_MCAST_IP_TO_MAC  0x000C\r
\r
///\r
/// Read or change non-volatile storage on the NIC.\r
///\r
#define PXE_OPCODE_NVDATA 0x000D\r
\r
///\r
/// Get & clear interrupt status.\r
///\r
#define PXE_OPCODE_GET_STATUS 0x000E\r
\r
///\r
/// Fill media header in packet for transmit.\r
///\r
#define PXE_OPCODE_FILL_HEADER  0x000F\r
\r
///\r
/// Transmit packet(s).\r
///\r
#define PXE_OPCODE_TRANSMIT 0x0010\r
\r
///\r
/// Receive packet.\r
///\r
#define PXE_OPCODE_RECEIVE  0x0011\r
\r
///\r
/// Last valid PXE UNDI OpCode number.\r
///\r
#define PXE_OPCODE_LAST_VALID 0x0011\r
\r
typedef PXE_UINT16  PXE_OPFLAGS;\r
\r
#define PXE_OPFLAGS_NOT_USED  0x0000\r
\r
//\r
// //////////////////////////////////////\r
// UNDI Get State\r
//\r
// No OpFlags\r
\r
////////////////////////////////////////\r
// UNDI Start\r
//\r
// No OpFlags\r
\r
////////////////////////////////////////\r
// UNDI Stop\r
//\r
// No OpFlags\r
\r
////////////////////////////////////////\r
// UNDI Get Init Info\r
//\r
// No Opflags\r
\r
////////////////////////////////////////\r
// UNDI Get Config Info\r
//\r
// No Opflags\r
\r
///\r
/// UNDI Initialize\r
///\r
#define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK    0x0001\r
#define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE         0x0000\r
#define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE  0x0001\r
\r
///\r
///\r
/// UNDI Reset\r
///\r
#define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS  0x0001\r
#define PXE_OPFLAGS_RESET_DISABLE_FILTERS     0x0002\r
\r
///\r
/// UNDI Shutdown.\r
///\r
/// No OpFlags.\r
\r
///\r
/// UNDI Interrupt Enables.\r
///\r
///\r
/// Select whether to enable or disable external interrupt signals.\r
/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.\r
///\r
#define PXE_OPFLAGS_INTERRUPT_OPMASK  0xC000\r
#define PXE_OPFLAGS_INTERRUPT_ENABLE  0x8000\r
#define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000\r
#define PXE_OPFLAGS_INTERRUPT_READ    0x0000\r
\r
///\r
/// Enable receive interrupts.  An external interrupt will be generated\r
/// after a complete non-error packet has been received.\r
///\r
#define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001\r
\r
///\r
/// Enable transmit interrupts.  An external interrupt will be generated\r
/// after a complete non-error packet has been transmitted.\r
///\r
#define PXE_OPFLAGS_INTERRUPT_TRANSMIT  0x0002\r
\r
///\r
/// Enable command interrupts.  An external interrupt will be generated\r
/// when command execution stops.\r
///\r
#define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004\r
\r
///\r
/// Generate software interrupt.  Setting this bit generates an external\r
/// interrupt, if it is supported by the hardware.\r
///\r
#define PXE_OPFLAGS_INTERRUPT_SOFTWARE  0x0008\r
\r
///\r
/// UNDI Receive Filters.\r
///\r
///\r
/// Select whether to enable or disable receive filters.\r
/// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK   0xC000\r
#define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE   0x8000\r
#define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE  0x4000\r
#define PXE_OPFLAGS_RECEIVE_FILTER_READ     0x0000\r
\r
///\r
/// To reset the contents of the multicast MAC address filter list,\r
/// set this OpFlag:\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000\r
\r
///\r
/// Enable unicast packet receiving.  Packets sent to the current station\r
/// MAC address will be received.\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST  0x0001\r
\r
///\r
/// Enable broadcast packet receiving.  Packets sent to the broadcast\r
/// MAC address will be received.\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST  0x0002\r
\r
///\r
/// Enable filtered multicast packet receiving.  Packets sent to any\r
/// of the multicast MAC addresses in the multicast MAC address filter\r
/// list will be received.  If the filter list is empty, no multicast\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004\r
\r
///\r
/// Enable promiscuous packet receiving.  All packets will be received.\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008\r
\r
///\r
/// Enable promiscuous multicast packet receiving.  All multicast\r
/// packets will be received.\r
///\r
#define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010\r
\r
///\r
/// UNDI Station Address.\r
///\r
#define PXE_OPFLAGS_STATION_ADDRESS_READ   0x0000\r
#define PXE_OPFLAGS_STATION_ADDRESS_WRITE  0x0000\r
#define PXE_OPFLAGS_STATION_ADDRESS_RESET  0x0001\r
\r
///\r
/// UNDI Statistics.\r
///\r
#define PXE_OPFLAGS_STATISTICS_READ   0x0000\r
#define PXE_OPFLAGS_STATISTICS_RESET  0x0001\r
\r
///\r
/// UNDI MCast IP to MAC.\r
///\r
///\r
/// Identify the type of IP address in the CPB.\r
///\r
#define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK  0x0003\r
#define PXE_OPFLAGS_MCAST_IPV4_TO_MAC       0x0000\r
#define PXE_OPFLAGS_MCAST_IPV6_TO_MAC       0x0001\r
\r
///\r
/// UNDI NvData.\r
///\r
///\r
/// Select the type of non-volatile data operation.\r
///\r
#define PXE_OPFLAGS_NVDATA_OPMASK 0x0001\r
#define PXE_OPFLAGS_NVDATA_READ   0x0000\r
#define PXE_OPFLAGS_NVDATA_WRITE  0x0001\r
\r
///\r
/// UNDI Get Status.\r
///\r
///\r
/// Return current interrupt status.  This will also clear any interrupts\r
/// that are currently set.  This can be used in a polling routine.  The\r
/// interrupt flags are still set and cleared even when the interrupts\r
/// are disabled.\r
///\r
#define PXE_OPFLAGS_GET_INTERRUPT_STATUS  0x0001\r
\r
///\r
/// Return list of transmitted buffers for recycling.  Transmit buffers\r
/// must not be changed or unallocated until they have recycled.  After\r
/// issuing a transmit command, wait for a transmit complete interrupt.\r
/// When a transmit complete interrupt is received, read the transmitted\r
/// buffers.  Do not plan on getting one buffer per interrupt.  Some\r
/// NICs and UNDIs may transmit multiple buffers per interrupt.\r
///\r
#define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002\r
\r
///\r
/// Return current media status.\r
///\r
#define PXE_OPFLAGS_GET_MEDIA_STATUS    0x0004\r
\r
///\r
/// UNDI Fill Header.\r
///\r
#define PXE_OPFLAGS_FILL_HEADER_OPMASK      0x0001\r
#define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED  0x0001\r
#define PXE_OPFLAGS_FILL_HEADER_WHOLE       0x0000\r
\r
///\r
/// UNDI Transmit.\r
///\r
///\r
/// S/W UNDI only.  Return after the packet has been transmitted.  A\r
/// transmit complete interrupt will still be generated and the transmit\r
/// buffer will have to be recycled.\r
///\r
#define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK  0x0001\r
#define PXE_OPFLAGS_TRANSMIT_BLOCK          0x0001\r
#define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK     0x0000\r
\r
#define PXE_OPFLAGS_TRANSMIT_OPMASK     0x0002\r
#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002\r
#define PXE_OPFLAGS_TRANSMIT_WHOLE      0x0000\r
\r
///\r
/// UNDI Receive.\r
///\r
/// No OpFlags.\r
///\r
\r
///\r
/// PXE STATFLAGS.\r
///\r
typedef PXE_UINT16  PXE_STATFLAGS;\r
\r
#define PXE_STATFLAGS_INITIALIZE  0x0000\r
\r
///\r
/// Common StatFlags that can be returned by all commands.\r
///\r
///\r
/// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be\r
/// implemented by all UNDIs.  COMMAND_QUEUED is only needed by UNDIs\r
/// that support command queuing.\r
///\r
#define PXE_STATFLAGS_STATUS_MASK       0xC000\r
#define PXE_STATFLAGS_COMMAND_COMPLETE  0xC000\r
#define PXE_STATFLAGS_COMMAND_FAILED    0x8000\r
#define PXE_STATFLAGS_COMMAND_QUEUED    0x4000\r
\r
///\r
/// UNDI Get State.\r
///\r
#define PXE_STATFLAGS_GET_STATE_MASK        0x0003\r
#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002\r
#define PXE_STATFLAGS_GET_STATE_STARTED     0x0001\r
#define PXE_STATFLAGS_GET_STATE_STOPPED     0x0000\r
\r
///\r
/// UNDI Start.\r
///\r
/// No additional StatFlags.\r
///\r
\r
///\r
/// UNDI Get Init Info.\r
///\r
#define PXE_STATFLAGS_CABLE_DETECT_MASK           0x0001\r
#define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED  0x0000\r
#define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED      0x0001\r
\r
#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_MASK           0x0002\r
#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_NOT_SUPPORTED  0x0000\r
#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA_SUPPORTED      0x0002\r
\r
///\r
/// UNDI Initialize.\r
///\r
#define PXE_STATFLAGS_INITIALIZED_NO_MEDIA  0x0001\r
\r
///\r
/// UNDI Reset.\r
///\r
#define PXE_STATFLAGS_RESET_NO_MEDIA  0x0001\r
\r
///\r
/// UNDI Shutdown.\r
///\r
/// No additional StatFlags.\r
\r
///\r
/// UNDI Interrupt Enables.\r
///\r
///\r
/// If set, receive interrupts are enabled.\r
///\r
#define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001\r
\r
///\r
/// If set, transmit interrupts are enabled.\r
///\r
#define PXE_STATFLAGS_INTERRUPT_TRANSMIT  0x0002\r
\r
///\r
/// If set, command interrupts are enabled.\r
///\r
#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004\r
\r
///\r
/// UNDI Receive Filters.\r
///\r
\r
///\r
/// If set, unicast packets will be received.\r
///\r
#define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST  0x0001\r
\r
///\r
/// If set, broadcast packets will be received.\r
///\r
#define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST  0x0002\r
\r
///\r
/// If set, multicast packets that match up with the multicast address\r
/// filter list will be received.\r
///\r
#define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004\r
\r
///\r
/// If set, all packets will be received.\r
///\r
#define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS  0x0008\r
\r
///\r
/// If set, all multicast packets will be received.\r
///\r
#define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST  0x0010\r
\r
///\r
/// UNDI Station Address.\r
///\r
/// No additional StatFlags.\r
///\r
\r
///\r
/// UNDI Statistics.\r
///\r
/// No additional StatFlags.\r
///\r
\r
///\r
//// UNDI MCast IP to MAC.\r
////\r
//// No additional StatFlags.\r
\r
///\r
/// UNDI NvData.\r
///\r
/// No additional StatFlags.\r
///\r
\r
///\r
/// UNDI Get Status.\r
///\r
\r
///\r
/// Use to determine if an interrupt has occurred.\r
///\r
#define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F\r
#define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS  0x0000\r
\r
///\r
/// If set, at least one receive interrupt occurred.\r
///\r
#define PXE_STATFLAGS_GET_STATUS_RECEIVE  0x0001\r
\r
///\r
/// If set, at least one transmit interrupt occurred.\r
///\r
#define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002\r
\r
///\r
/// If set, at least one command interrupt occurred.\r
///\r
#define PXE_STATFLAGS_GET_STATUS_COMMAND  0x0004\r
\r
///\r
/// If set, at least one software interrupt occurred.\r
///\r
#define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008\r
\r
///\r
/// This flag is set if the transmitted buffer queue is empty.  This flag\r
/// will be set if all transmitted buffer addresses get written into the DB.\r
///\r
#define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY  0x0010\r
\r
///\r
/// This flag is set if no transmitted buffer addresses were written\r
/// into the DB.  (This could be because DBsize was too small.)\r
///\r
#define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN  0x0020\r
\r
///\r
/// This flag is set if there is no media detected.\r
///\r
#define PXE_STATFLAGS_GET_STATUS_NO_MEDIA  0x0040\r
\r
///\r
/// UNDI Fill Header.\r
///\r
/// No additional StatFlags.\r
///\r
\r
///\r
/// UNDI Transmit.\r
///\r
/// No additional StatFlags.\r
\r
///\r
/// UNDI Receive\r
///.\r
\r
///\r
/// No additional StatFlags.\r
///\r
typedef PXE_UINT16  PXE_STATCODE;\r
\r
#define PXE_STATCODE_INITIALIZE 0x0000\r
\r
///\r
/// Common StatCodes returned by all UNDI commands, UNDI protocol functions\r
/// and BC protocol functions.\r
///\r
#define PXE_STATCODE_SUCCESS              0x0000\r
\r
#define PXE_STATCODE_INVALID_CDB          0x0001\r
#define PXE_STATCODE_INVALID_CPB          0x0002\r
#define PXE_STATCODE_BUSY                 0x0003\r
#define PXE_STATCODE_QUEUE_FULL           0x0004\r
#define PXE_STATCODE_ALREADY_STARTED      0x0005\r
#define PXE_STATCODE_NOT_STARTED          0x0006\r
#define PXE_STATCODE_NOT_SHUTDOWN         0x0007\r
#define PXE_STATCODE_ALREADY_INITIALIZED  0x0008\r
#define PXE_STATCODE_NOT_INITIALIZED      0x0009\r
#define PXE_STATCODE_DEVICE_FAILURE       0x000A\r
#define PXE_STATCODE_NVDATA_FAILURE       0x000B\r
#define PXE_STATCODE_UNSUPPORTED          0x000C\r
#define PXE_STATCODE_BUFFER_FULL          0x000D\r
#define PXE_STATCODE_INVALID_PARAMETER    0x000E\r
#define PXE_STATCODE_INVALID_UNDI         0x000F\r
#define PXE_STATCODE_IPV4_NOT_SUPPORTED   0x0010\r
#define PXE_STATCODE_IPV6_NOT_SUPPORTED   0x0011\r
#define PXE_STATCODE_NOT_ENOUGH_MEMORY    0x0012\r
#define PXE_STATCODE_NO_DATA              0x0013\r
\r
typedef PXE_UINT16  PXE_IFNUM;\r
\r
///\r
/// This interface number must be passed to the S/W UNDI Start command.\r
///\r
#define PXE_IFNUM_START 0x0000\r
\r
///\r
/// This interface number is returned by the S/W UNDI Get State and\r
/// Start commands if information in the CDB, CPB or DB is invalid.\r
///\r
#define PXE_IFNUM_INVALID 0x0000\r
\r
typedef PXE_UINT16  PXE_CONTROL;\r
\r
///\r
/// Setting this flag directs the UNDI to queue this command for later\r
/// execution if the UNDI is busy and it supports command queuing.\r
/// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error\r
/// is returned.  If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL\r
/// error is returned.\r
///\r
#define PXE_CONTROL_QUEUE_IF_BUSY 0x0002\r
\r
///\r
/// These two bit values are used to determine if there are more UNDI\r
/// CDB structures following this one.  If the link bit is set, there\r
/// must be a CDB structure following this one.  Execution will start\r
/// on the next CDB structure as soon as this one completes successfully.\r
/// If an error is generated by this command, execution will stop.\r
///\r
#define PXE_CONTROL_LINK              0x0001\r
#define PXE_CONTROL_LAST_CDB_IN_LIST  0x0000\r
\r
typedef PXE_UINT8   PXE_FRAME_TYPE;\r
\r
#define PXE_FRAME_TYPE_NONE                     0x00\r
#define PXE_FRAME_TYPE_UNICAST                  0x01\r
#define PXE_FRAME_TYPE_BROADCAST                0x02\r
#define PXE_FRAME_TYPE_FILTERED_MULTICAST       0x03\r
#define PXE_FRAME_TYPE_PROMISCUOUS              0x04\r
#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST    0x05\r
\r
#define PXE_FRAME_TYPE_MULTICAST                PXE_FRAME_TYPE_FILTERED_MULTICAST\r
\r
typedef PXE_UINT32  PXE_IPV4;\r
\r
typedef PXE_UINT32  PXE_IPV6[4];\r
#define PXE_MAC_LENGTH  32\r
\r
typedef PXE_UINT8   PXE_MAC_ADDR[PXE_MAC_LENGTH];\r
\r
typedef PXE_UINT8   PXE_IFTYPE;\r
typedef UINT16      PXE_MEDIA_PROTOCOL;\r
\r
///\r
/// This information is from the ARP section of RFC 1700.\r
///\r
///     1 Ethernet (10Mb)                                    [JBP]\r
///     2 Experimental Ethernet (3Mb)                        [JBP]\r
///     3 Amateur Radio AX.25                                [PXK]\r
///     4 Proteon ProNET Token Ring                          [JBP]\r
///     5 Chaos                                              [GXP]\r
///     6 IEEE 802 Networks                                  [JBP]\r
///     7 ARCNET                                             [JBP]\r
///     8 Hyperchannel                                       [JBP]\r
///     9 Lanstar                                             [TU]\r
///    10 Autonet Short Address                             [MXB1]\r
///    11 LocalTalk                                         [JKR1]\r
///    12 LocalNet (IBM* PCNet or SYTEK* LocalNET)           [JXM]\r
///    13 Ultra link                                        [RXD2]\r
///    14 SMDS                                              [GXC1]\r
///    15 Frame Relay                                        [AGM]\r
///    16 Asynchronous Transmission Mode (ATM)              [JXB2]\r
///    17 HDLC                                               [JBP]\r
///    18 Fibre Channel                            [Yakov Rekhter]\r
///    19 Asynchronous Transmission Mode (ATM)      [Mark Laubach]\r
///    20 Serial Line                                        [JBP]\r
///    21 Asynchronous Transmission Mode (ATM)              [MXB1]\r
///\r
/// * Other names and brands may be claimed as the property of others.\r
///\r
#define PXE_IFTYPE_ETHERNET       0x01\r
#define PXE_IFTYPE_TOKENRING      0x04\r
#define PXE_IFTYPE_FIBRE_CHANNEL  0x12\r
\r
typedef struct s_pxe_hw_undi {\r
  PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE.\r
  PXE_UINT8   Len;            ///< sizeof(PXE_HW_UNDI).\r
  PXE_UINT8   Fudge;          ///< makes 8-bit cksum equal zero.\r
  PXE_UINT8   Rev;            ///< PXE_ROMID_REV.\r
  PXE_UINT8   IFcnt;          ///< physical connector count.\r
  PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER.\r
  PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER.\r
  PXE_UINT16  reserved;       ///< zero, not used.\r
  PXE_UINT32  Implementation; ///< implementation flags.\r
  ///< reserved             ///< vendor use.\r
  ///< UINT32 Status;       ///< status port.\r
  ///< UINT32 Command;      ///< command port.\r
  ///< UINT64 CDBaddr;      ///< CDB address port.\r
  ///<\r
} PXE_HW_UNDI;\r
\r
///\r
/// Status port bit definitions.\r
///\r
\r
///\r
/// UNDI operation state.\r
///\r
#define PXE_HWSTAT_STATE_MASK   0xC0000000\r
#define PXE_HWSTAT_BUSY         0xC0000000\r
#define PXE_HWSTAT_INITIALIZED  0x80000000\r
#define PXE_HWSTAT_STARTED      0x40000000\r
#define PXE_HWSTAT_STOPPED      0x00000000\r
\r
///\r
/// If set, last command failed.\r
///\r
#define PXE_HWSTAT_COMMAND_FAILED 0x20000000\r
\r
///\r
/// If set, identifies enabled receive filters.\r
///\r
#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000\r
#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED           0x00000800\r
#define PXE_HWSTAT_BROADCAST_RX_ENABLED             0x00000400\r
#define PXE_HWSTAT_MULTICAST_RX_ENABLED             0x00000200\r
#define PXE_HWSTAT_UNICAST_RX_ENABLED               0x00000100\r
\r
///\r
/// If set, identifies enabled external interrupts.\r
///\r
#define PXE_HWSTAT_SOFTWARE_INT_ENABLED     0x00000080\r
#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED  0x00000040\r
#define PXE_HWSTAT_PACKET_RX_INT_ENABLED    0x00000020\r
#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010\r
\r
///\r
/// If set, identifies pending interrupts.\r
///\r
#define PXE_HWSTAT_SOFTWARE_INT_PENDING     0x00000008\r
#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING  0x00000004\r
#define PXE_HWSTAT_PACKET_RX_INT_PENDING    0x00000002\r
#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001\r
\r
///\r
/// Command port definitions.\r
///\r
\r
///\r
/// If set, CDB identified in CDBaddr port is given to UNDI.\r
/// If not set, other bits in this word will be processed.\r
///\r
#define PXE_HWCMD_ISSUE_COMMAND   0x80000000\r
#define PXE_HWCMD_INTS_AND_FILTS  0x00000000\r
\r
///\r
/// Use these to enable/disable receive filters.\r
///\r
#define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000\r
#define PXE_HWCMD_PROMISCUOUS_RX_ENABLE           0x00000800\r
#define PXE_HWCMD_BROADCAST_RX_ENABLE             0x00000400\r
#define PXE_HWCMD_MULTICAST_RX_ENABLE             0x00000200\r
#define PXE_HWCMD_UNICAST_RX_ENABLE               0x00000100\r
\r
///\r
/// Use these to enable/disable external interrupts.\r
///\r
#define PXE_HWCMD_SOFTWARE_INT_ENABLE     0x00000080\r
#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE  0x00000040\r
#define PXE_HWCMD_PACKET_RX_INT_ENABLE    0x00000020\r
#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010\r
\r
///\r
/// Use these to clear pending external interrupts.\r
///\r
#define PXE_HWCMD_CLEAR_SOFTWARE_INT      0x00000008\r
#define PXE_HWCMD_CLEAR_TX_COMPLETE_INT   0x00000004\r
#define PXE_HWCMD_CLEAR_PACKET_RX_INT     0x00000002\r
#define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT  0x00000001\r
\r
typedef struct s_pxe_sw_undi {\r
  PXE_UINT32  Signature;      ///< PXE_ROMID_SIGNATURE.\r
  PXE_UINT8   Len;            ///< sizeof(PXE_SW_UNDI).\r
  PXE_UINT8   Fudge;          ///< makes 8-bit cksum zero.\r
  PXE_UINT8   Rev;            ///< PXE_ROMID_REV.\r
  PXE_UINT8   IFcnt;          ///< physical connector count.\r
  PXE_UINT8   MajorVer;       ///< PXE_ROMID_MAJORVER.\r
  PXE_UINT8   MinorVer;       ///< PXE_ROMID_MINORVER.\r
  PXE_UINT16  reserved1;      ///< zero, not used.\r
  PXE_UINT32  Implementation; ///< Implementation flags.\r
  PXE_UINT64  EntryPoint;     ///< API entry point.\r
  PXE_UINT8   reserved2[3];   ///< zero, not used.\r
  PXE_UINT8   BusCnt;         ///< number of bustypes supported.\r
  PXE_UINT32  BusType[1];     ///< list of supported bustypes.\r
} PXE_SW_UNDI;\r
\r
typedef union u_pxe_undi {\r
  PXE_HW_UNDI hw;\r
  PXE_SW_UNDI sw;\r
} PXE_UNDI;\r
\r
///\r
/// Signature of !PXE structure.\r
///\r
#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')\r
\r
///\r
/// !PXE structure format revision\r
///.\r
#define PXE_ROMID_REV 0x02\r
\r
///\r
/// UNDI command interface revision.  These are the values that get sent\r
/// in option 94 (Client Network Interface Identifier) in the DHCP Discover\r
/// and PXE Boot Server Request packets.\r
///\r
#define PXE_ROMID_MAJORVER    0x03\r
#define PXE_ROMID_MINORVER    0x01\r
\r
///\r
/// Implementation flags.\r
///\r
#define PXE_ROMID_IMP_HW_UNDI                             0x80000000\r
#define PXE_ROMID_IMP_SW_VIRT_ADDR                        0x40000000\r
#define PXE_ROMID_IMP_64BIT_DEVICE                        0x00010000\r
#define PXE_ROMID_IMP_FRAG_SUPPORTED                      0x00008000\r
#define PXE_ROMID_IMP_CMD_LINK_SUPPORTED                  0x00004000\r
#define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED                 0x00002000\r
#define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED               0x00001000\r
#define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK                 0x00000C00\r
#define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE                0x00000C00\r
#define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE              0x00000800\r
#define PXE_ROMID_IMP_NVDATA_READ_ONLY                    0x00000400\r
#define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE                0x00000000\r
#define PXE_ROMID_IMP_STATISTICS_SUPPORTED                0x00000200\r
#define PXE_ROMID_IMP_STATION_ADDR_SETTABLE               0x00000100\r
#define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED  0x00000080\r
#define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED            0x00000040\r
#define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED              0x00000020\r
#define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED     0x00000010\r
#define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED              0x00000008\r
#define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED           0x00000004\r
#define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED             0x00000002\r
#define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED          0x00000001\r
\r
typedef struct s_pxe_cdb {\r
  PXE_OPCODE    OpCode;\r
  PXE_OPFLAGS   OpFlags;\r
  PXE_UINT16    CPBsize;\r
  PXE_UINT16    DBsize;\r
  PXE_UINT64    CPBaddr;\r
  PXE_UINT64    DBaddr;\r
  PXE_STATCODE  StatCode;\r
  PXE_STATFLAGS StatFlags;\r
  PXE_UINT16    IFnum;\r
  PXE_CONTROL   Control;\r
} PXE_CDB;\r
\r
typedef union u_pxe_ip_addr {\r
  PXE_IPV6  IPv6;\r
  PXE_IPV4  IPv4;\r
} PXE_IP_ADDR;\r
\r
typedef union pxe_device {\r
  ///\r
  /// PCI and PC Card NICs are both identified using bus, device\r
  /// and function numbers.  For PC Card, this may require PC\r
  /// Card services to be loaded in the BIOS or preboot\r
  /// environment.\r
  ///\r
  struct {\r
    ///\r
    /// See S/W UNDI ROMID structure definition for PCI and\r
    /// PCC BusType definitions.\r
    ///\r
    PXE_UINT32  BusType;\r
\r
    ///\r
    /// Bus, device & function numbers that locate this device.\r
    ///\r
    PXE_UINT16  Bus;\r
    PXE_UINT8   Device;\r
    PXE_UINT8   Function;\r
  }\r
  PCI, PCC;\r
\r
} PXE_DEVICE;\r
\r
///\r
/// cpb and db definitions\r
///\r
#define MAX_PCI_CONFIG_LEN    64  ///< # of dwords.\r
#define MAX_EEPROM_LEN        128 ///< # of dwords.\r
#define MAX_XMIT_BUFFERS      32  ///< recycling Q length for xmit_done.\r
#define MAX_MCAST_ADDRESS_CNT 8\r
\r
typedef struct s_pxe_cpb_start_30 {\r
  ///\r
  /// PXE_VOID Delay(UINTN microseconds);\r
  ///\r
  /// UNDI will never request a delay smaller than 10 microseconds\r
  /// and will always request delays in increments of 10 microseconds.\r
  /// The Delay() CallBack routine must delay between n and n + 10\r
  /// microseconds before returning control to the UNDI.\r
  ///\r
  /// This field cannot be set to zero.\r
  ///\r
  UINT64  Delay;\r
\r
  ///\r
  /// PXE_VOID Block(UINT32 enable);\r
  ///\r
  /// UNDI may need to block multi-threaded/multi-processor access to\r
  /// critical code sections when programming or accessing the network\r
  /// device.  To this end, a blocking service is needed by the UNDI.\r
  /// When UNDI needs a block, it will call Block() passing a non-zero\r
  /// value.  When UNDI no longer needs a block, it will call Block()\r
  /// with a zero value.  When called, if the Block() is already enabled,\r
  /// do not return control to the UNDI until the previous Block() is\r
  /// disabled.\r
  ///\r
  /// This field cannot be set to zero.\r
  ///\r
  UINT64  Block;\r
\r
  ///\r
  /// PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);\r
  ///\r
  /// UNDI will pass the virtual address of a buffer and the virtual\r
  /// address of a 64-bit physical buffer.  Convert the virtual address\r
  /// to a physical address and write the result to the physical address\r
  /// buffer.  If virtual and physical addresses are the same, just\r
  /// copy the virtual address to the physical address buffer.\r
  ///\r
  /// This field can be set to zero if virtual and physical addresses\r
  /// are equal.\r
  ///\r
  UINT64  Virt2Phys;\r
  ///\r
  /// PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,\r
  ///              UINT64 buf_addr);\r
  ///\r
  /// UNDI will read or write the device io space using this call back\r
  /// function. It passes the number of bytes as the len parameter and it\r
  /// will be either 1,2,4 or 8.\r
  ///\r
  /// This field can not be set to zero.\r
  ///\r
  UINT64  Mem_IO;\r
} PXE_CPB_START_30;\r
\r
typedef struct s_pxe_cpb_start_31 {\r
  ///\r
  /// PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);\r
  ///\r
  /// UNDI will never request a delay smaller than 10 microseconds\r
  /// and will always request delays in increments of 10 microseconds.\r
  /// The Delay() CallBack routine must delay between n and n + 10\r
  /// microseconds before returning control to the UNDI.\r
  ///\r
  /// This field cannot be set to zero.\r
  ///\r
  UINT64  Delay;\r
\r
  ///\r
  /// PXE_VOID Block(UINT64 unq_id, UINT32 enable);\r
  ///\r
  /// UNDI may need to block multi-threaded/multi-processor access to\r
  /// critical code sections when programming or accessing the network\r
  /// device.  To this end, a blocking service is needed by the UNDI.\r
  /// When UNDI needs a block, it will call Block() passing a non-zero\r
  /// value.  When UNDI no longer needs a block, it will call Block()\r
  /// with a zero value.  When called, if the Block() is already enabled,\r
  /// do not return control to the UNDI until the previous Block() is\r
  /// disabled.\r
  ///\r
  /// This field cannot be set to zero.\r
  ///\r
  UINT64  Block;\r
\r
  ///\r
  /// PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);\r
  ///\r
  /// UNDI will pass the virtual address of a buffer and the virtual\r
  /// address of a 64-bit physical buffer.  Convert the virtual address\r
  /// to a physical address and write the result to the physical address\r
  /// buffer.  If virtual and physical addresses are the same, just\r
  /// copy the virtual address to the physical address buffer.\r
  ///\r
  /// This field can be set to zero if virtual and physical addresses\r
  /// are equal.\r
  ///\r
  UINT64  Virt2Phys;\r
  ///\r
  /// PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,\r
  ///              UINT64 buf_addr);\r
  ///\r
  /// UNDI will read or write the device io space using this call back\r
  /// function. It passes the number of bytes as the len parameter and it\r
  /// will be either 1,2,4 or 8.\r
  ///\r
  /// This field can not be set to zero.\r
  ///\r
  UINT64  Mem_IO;\r
  ///\r
  /// PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,\r
  ///                 UINT32 Direction, UINT64 mapped_addr);\r
  ///\r
  /// UNDI will pass the virtual address of a buffer, direction of the data\r
  /// flow from/to the mapped buffer (the constants are defined below)\r
  /// and a place holder (pointer) for the mapped address.\r
  /// This call will Map the given address to a physical DMA address and write\r
  /// the result to the mapped_addr pointer.  If there is no need to\r
  /// map the given address to a lower address (i.e. the given address is\r
  /// associated with a physical address that is already compatible to be\r
  /// used with the DMA, it converts the given virtual address to it's\r
  /// physical address and write that in the mapped address pointer.\r
  ///\r
  /// This field can be set to zero if there is no mapping service available.\r
  ///\r
  UINT64  Map_Mem;\r
\r
  ///\r
  /// PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,\r
  ///            UINT32 Direction, UINT64 mapped_addr);\r
  ///\r
  /// UNDI will pass the virtual and mapped addresses of a buffer.\r
  /// This call will un map the given address.\r
  ///\r
  /// This field can be set to zero if there is no unmapping service available.\r
  ///\r
  UINT64  UnMap_Mem;\r
\r
  ///\r
  /// PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,\r
  ///            UINT32 size, UINT32 Direction, UINT64 mapped_addr);\r
  ///\r
  /// UNDI will pass the virtual and mapped addresses of a buffer.\r
  /// This call will synchronize the contents of both the virtual and mapped.\r
  /// buffers for the given Direction.\r
  ///\r
  /// This field can be set to zero if there is no service available.\r
  ///\r
  UINT64  Sync_Mem;\r
\r
  ///\r
  /// protocol driver can provide anything for this Unique_ID, UNDI remembers\r
  /// that as just a 64bit value assocaited to the interface specified by\r
  /// the ifnum and gives it back as a parameter to all the call-back routines\r
  /// when calling for that interface!\r
  ///\r
  UINT64  Unique_ID;\r
} PXE_CPB_START_31;\r
\r
#define TO_AND_FROM_DEVICE    0\r
#define FROM_DEVICE           1\r
#define TO_DEVICE             2\r
\r
#define PXE_DELAY_MILLISECOND 1000\r
#define PXE_DELAY_SECOND      1000000\r
#define PXE_IO_READ           0\r
#define PXE_IO_WRITE          1\r
#define PXE_MEM_READ          2\r
#define PXE_MEM_WRITE         4\r
\r
typedef struct s_pxe_db_get_init_info {\r
  ///\r
  /// Minimum length of locked memory buffer that must be given to\r
  /// the Initialize command. Giving UNDI more memory will generally\r
  /// give better performance.\r
  ///\r
  /// If MemoryRequired is zero, the UNDI does not need and will not\r
  /// use system memory to receive and transmit packets.\r
  ///\r
  PXE_UINT32  MemoryRequired;\r
\r
  ///\r
  /// Maximum frame data length for Tx/Rx excluding the media header.\r
  ///\r
  PXE_UINT32  FrameDataLen;\r
\r
  ///\r
  /// Supported link speeds are in units of mega bits.  Common ethernet\r
  /// values are 10, 100 and 1000.  Unused LinkSpeeds[] entries are zero\r
  /// filled.\r
  ///\r
  PXE_UINT32  LinkSpeeds[4];\r
\r
  ///\r
  /// Number of non-volatile storage items.\r
  ///\r
  PXE_UINT32  NvCount;\r
\r
  ///\r
  /// Width of non-volatile storage item in bytes.  0, 1, 2 or 4\r
  ///\r
  PXE_UINT16  NvWidth;\r
\r
  ///\r
  /// Media header length.  This is the typical media header length for\r
  /// this UNDI.  This information is needed when allocating receive\r
  /// and transmit buffers.\r
  ///\r
  PXE_UINT16  MediaHeaderLen;\r
\r
  ///\r
  /// Number of bytes in the NIC hardware (MAC) address.\r
  ///\r
  PXE_UINT16  HWaddrLen;\r
\r
  ///\r
  /// Maximum number of multicast MAC addresses in the multicast\r
  /// MAC address filter list.\r
  ///\r
  PXE_UINT16  MCastFilterCnt;\r
\r
  ///\r
  /// Default number and size of transmit and receive buffers that will\r
  /// be allocated by the UNDI.  If MemoryRequired is non-zero, this\r
  /// allocation will come out of the memory buffer given to the Initialize\r
  /// command.  If MemoryRequired is zero, this allocation will come out of\r
  /// memory on the NIC.\r
  ///\r
  PXE_UINT16  TxBufCnt;\r
  PXE_UINT16  TxBufSize;\r
  PXE_UINT16  RxBufCnt;\r
  PXE_UINT16  RxBufSize;\r
\r
  ///\r
  /// Hardware interface types defined in the Assigned Numbers RFC\r
  /// and used in DHCP and ARP packets.\r
  /// See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.\r
  ///\r
  PXE_UINT8   IFtype;\r
\r
  ///\r
  /// Supported duplex.  See PXE_DUPLEX_xxxxx #defines below.\r
  ///\r
  PXE_UINT8   SupportedDuplexModes;\r
\r
  ///\r
  /// Supported loopback options.  See PXE_LOOPBACK_xxxxx #defines below.\r
  ///\r
  PXE_UINT8   SupportedLoopBackModes;\r
} PXE_DB_GET_INIT_INFO;\r
\r
#define PXE_MAX_TXRX_UNIT_ETHER           1500\r
\r
#define PXE_HWADDR_LEN_ETHER              0x0006\r
#define PXE_MAC_HEADER_LEN_ETHER          0x000E\r
\r
#define PXE_DUPLEX_ENABLE_FULL_SUPPORTED  1\r
#define PXE_DUPLEX_FORCE_FULL_SUPPORTED   2\r
\r
#define PXE_LOOPBACK_INTERNAL_SUPPORTED   1\r
#define PXE_LOOPBACK_EXTERNAL_SUPPORTED   2\r
\r
typedef struct s_pxe_pci_config_info {\r
  ///\r
  /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.\r
  /// For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.\r
  ///\r
  UINT32  BusType;\r
\r
  ///\r
  /// This identifies the PCI network device that this UNDI interface.\r
  /// is bound to.\r
  ///\r
  UINT16  Bus;\r
  UINT8   Device;\r
  UINT8   Function;\r
\r
  ///\r
  /// This is a copy of the PCI configuration space for this\r
  /// network device.\r
  ///\r
  union {\r
    UINT8   Byte[256];\r
    UINT16  Word[128];\r
    UINT32  Dword[64];\r
  } Config;\r
} PXE_PCI_CONFIG_INFO;\r
\r
typedef struct s_pxe_pcc_config_info {\r
  ///\r
  /// This is the flag field for the PXE_DB_GET_CONFIG_INFO union.\r
  /// For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.\r
  ///\r
  PXE_UINT32  BusType;\r
\r
  ///\r
  /// This identifies the PCC network device that this UNDI interface\r
  /// is bound to.\r
  ///\r
  PXE_UINT16  Bus;\r
  PXE_UINT8   Device;\r
  PXE_UINT8   Function;\r
\r
  ///\r
  /// This is a copy of the PCC configuration space for this\r
  /// network device.\r
  ///\r
  union {\r
    PXE_UINT8   Byte[256];\r
    PXE_UINT16  Word[128];\r
    PXE_UINT32  Dword[64];\r
  } Config;\r
} PXE_PCC_CONFIG_INFO;\r
\r
typedef union u_pxe_db_get_config_info {\r
  PXE_PCI_CONFIG_INFO   pci;\r
  PXE_PCC_CONFIG_INFO   pcc;\r
} PXE_DB_GET_CONFIG_INFO;\r
\r
typedef struct s_pxe_cpb_initialize {\r
  ///\r
  /// Address of first (lowest) byte of the memory buffer.  This buffer must\r
  /// be in contiguous physical memory and cannot be swapped out.  The UNDI\r
  /// will be using this for transmit and receive buffering.\r
  ///\r
  PXE_UINT64  MemoryAddr;\r
\r
  ///\r
  /// MemoryLength must be greater than or equal to MemoryRequired\r
  /// returned by the Get Init Info command.\r
  ///\r
  PXE_UINT32  MemoryLength;\r
\r
  ///\r
  /// Desired link speed in Mbit/sec.  Common ethernet values are 10, 100\r
  /// and 1000.  Setting a value of zero will auto-detect and/or use the\r
  /// default link speed (operation depends on UNDI/NIC functionality).\r
  ///\r
  PXE_UINT32  LinkSpeed;\r
\r
  ///\r
  /// Suggested number and size of receive and transmit buffers to\r
  /// allocate.  If MemoryAddr and MemoryLength are non-zero, this\r
  /// allocation comes out of the supplied memory buffer.  If MemoryAddr\r
  /// and MemoryLength are zero, this allocation comes out of memory\r
  /// on the NIC.\r
  ///\r
  /// If these fields are set to zero, the UNDI will allocate buffer\r
  /// counts and sizes as it sees fit.\r
  ///\r
  PXE_UINT16  TxBufCnt;\r
  PXE_UINT16  TxBufSize;\r
  PXE_UINT16  RxBufCnt;\r
  PXE_UINT16  RxBufSize;\r
\r
  ///\r
  /// The following configuration parameters are optional and must be zero\r
  /// to use the default values.\r
  ///\r
  PXE_UINT8   DuplexMode;\r
\r
  PXE_UINT8   LoopBackMode;\r
} PXE_CPB_INITIALIZE;\r
\r
#define PXE_DUPLEX_DEFAULT      0x00\r
#define PXE_FORCE_FULL_DUPLEX   0x01\r
#define PXE_ENABLE_FULL_DUPLEX  0x02\r
#define PXE_FORCE_HALF_DUPLEX   0x04\r
#define PXE_DISABLE_FULL_DUPLEX 0x08\r
\r
#define LOOPBACK_NORMAL         0\r
#define LOOPBACK_INTERNAL       1\r
#define LOOPBACK_EXTERNAL       2\r
\r
typedef struct s_pxe_db_initialize {\r
  ///\r
  /// Actual amount of memory used from the supplied memory buffer.  This\r
  /// may be less that the amount of memory suppllied and may be zero if\r
  /// the UNDI and network device do not use external memory buffers.\r
  ///\r
  /// Memory used by the UNDI and network device is allocated from the\r
  /// lowest memory buffer address.\r
  ///\r
  PXE_UINT32  MemoryUsed;\r
\r
  ///\r
  /// Actual number and size of receive and transmit buffers that were\r
  /// allocated.\r
  ///\r
  PXE_UINT16  TxBufCnt;\r
  PXE_UINT16  TxBufSize;\r
  PXE_UINT16  RxBufCnt;\r
  PXE_UINT16  RxBufSize;\r
} PXE_DB_INITIALIZE;\r
\r
typedef struct s_pxe_cpb_receive_filters {\r
  ///\r
  /// List of multicast MAC addresses.  This list, if present, will\r
  /// replace the existing multicast MAC address filter list.\r
  ///\r
  PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];\r
} PXE_CPB_RECEIVE_FILTERS;\r
\r
typedef struct s_pxe_db_receive_filters {\r
  ///\r
  /// Filtered multicast MAC address list.\r
  ///\r
  PXE_MAC_ADDR  MCastList[MAX_MCAST_ADDRESS_CNT];\r
} PXE_DB_RECEIVE_FILTERS;\r
\r
typedef struct s_pxe_cpb_station_address {\r
  ///\r
  /// If supplied and supported, the current station MAC address\r
  /// will be changed.\r
  ///\r
  PXE_MAC_ADDR  StationAddr;\r
} PXE_CPB_STATION_ADDRESS;\r
\r
typedef struct s_pxe_dpb_station_address {\r
  ///\r
  /// Current station MAC address.\r
  ///\r
  PXE_MAC_ADDR  StationAddr;\r
\r
  ///\r
  /// Station broadcast MAC address.\r
  ///\r
  PXE_MAC_ADDR  BroadcastAddr;\r
\r
  ///\r
  /// Permanent station MAC address.\r
  ///\r
  PXE_MAC_ADDR  PermanentAddr;\r
} PXE_DB_STATION_ADDRESS;\r
\r
typedef struct s_pxe_db_statistics {\r
  ///\r
  /// Bit field identifying what statistic data is collected by the\r
  /// UNDI/NIC.\r
  /// If bit 0x00 is set, Data[0x00] is collected.\r
  /// If bit 0x01 is set, Data[0x01] is collected.\r
  /// If bit 0x20 is set, Data[0x20] is collected.\r
  /// If bit 0x21 is set, Data[0x21] is collected.\r
  /// Etc.\r
  ///\r
  PXE_UINT64  Supported;\r
\r
  ///\r
  /// Statistic data.\r
  ///\r
  PXE_UINT64  Data[64];\r
} PXE_DB_STATISTICS;\r
\r
///\r
/// Total number of frames received.  Includes frames with errors and\r
/// dropped frames.\r
///\r
#define PXE_STATISTICS_RX_TOTAL_FRAMES  0x00\r
\r
///\r
/// Number of valid frames received and copied into receive buffers.\r
///\r
#define PXE_STATISTICS_RX_GOOD_FRAMES 0x01\r
\r
///\r
/// Number of frames below the minimum length for the media.\r
/// This would be <64 for ethernet.\r
///\r
#define PXE_STATISTICS_RX_UNDERSIZE_FRAMES  0x02\r
\r
///\r
/// Number of frames longer than the maxminum length for the\r
/// media.  This would be >1500 for ethernet.\r
///\r
#define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03\r
\r
///\r
/// Valid frames that were dropped because receive buffers were full.\r
///\r
#define PXE_STATISTICS_RX_DROPPED_FRAMES  0x04\r
\r
///\r
/// Number of valid unicast frames received and not dropped.\r
///\r
#define PXE_STATISTICS_RX_UNICAST_FRAMES  0x05\r
\r
///\r
/// Number of valid broadcast frames received and not dropped.\r
///\r
#define PXE_STATISTICS_RX_BROADCAST_FRAMES  0x06\r
\r
///\r
/// Number of valid mutlicast frames received and not dropped.\r
///\r
#define PXE_STATISTICS_RX_MULTICAST_FRAMES  0x07\r
\r
///\r
/// Number of frames w/ CRC or alignment errors.\r
///\r
#define PXE_STATISTICS_RX_CRC_ERROR_FRAMES  0x08\r
\r
///\r
/// Total number of bytes received.  Includes frames with errors\r
/// and dropped frames.\r
///\r
#define PXE_STATISTICS_RX_TOTAL_BYTES 0x09\r
\r
///\r
/// Transmit statistics.\r
///\r
#define PXE_STATISTICS_TX_TOTAL_FRAMES      0x0A\r
#define PXE_STATISTICS_TX_GOOD_FRAMES       0x0B\r
#define PXE_STATISTICS_TX_UNDERSIZE_FRAMES  0x0C\r
#define PXE_STATISTICS_TX_OVERSIZE_FRAMES   0x0D\r
#define PXE_STATISTICS_TX_DROPPED_FRAMES    0x0E\r
#define PXE_STATISTICS_TX_UNICAST_FRAMES    0x0F\r
#define PXE_STATISTICS_TX_BROADCAST_FRAMES  0x10\r
#define PXE_STATISTICS_TX_MULTICAST_FRAMES  0x11\r
#define PXE_STATISTICS_TX_CRC_ERROR_FRAMES  0x12\r
#define PXE_STATISTICS_TX_TOTAL_BYTES       0x13\r
\r
///\r
/// Number of collisions detection on this subnet.\r
///\r
#define PXE_STATISTICS_COLLISIONS 0x14\r
\r
///\r
/// Number of frames destined for unsupported protocol.\r
///\r
#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15\r
\r
typedef struct s_pxe_cpb_mcast_ip_to_mac {\r
  ///\r
  /// Multicast IP address to be converted to multicast MAC address.\r
  ///\r
  PXE_IP_ADDR IP;\r
} PXE_CPB_MCAST_IP_TO_MAC;\r
\r
typedef struct s_pxe_db_mcast_ip_to_mac {\r
  ///\r
  /// Multicast MAC address.\r
  ///\r
  PXE_MAC_ADDR  MAC;\r
} PXE_DB_MCAST_IP_TO_MAC;\r
\r
typedef struct s_pxe_cpb_nvdata_sparse {\r
  ///\r
  /// NvData item list.  Only items in this list will be updated.\r
  ///\r
  struct {\r
    ///\r
    ///  Non-volatile storage address to be changed.\r
    ///\r
    PXE_UINT32  Addr;\r
\r
    ///\r
    /// Data item to write into above storage address.\r
    ///\r
    union {\r
      PXE_UINT8   Byte;\r
      PXE_UINT16  Word;\r
      PXE_UINT32  Dword;\r
    } Data;\r
  } Item[MAX_EEPROM_LEN];\r
} PXE_CPB_NVDATA_SPARSE;\r
\r
///\r
/// When using bulk update, the size of the CPB structure must be\r
/// the same size as the non-volatile NIC storage.\r
///\r
typedef union u_pxe_cpb_nvdata_bulk {\r
  ///\r
  /// Array of byte-wide data items.\r
  ///\r
  PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];\r
\r
  ///\r
  /// Array of word-wide data items.\r
  ///\r
  PXE_UINT16  Word[MAX_EEPROM_LEN << 1];\r
\r
  ///\r
  /// Array of dword-wide data items.\r
  ///\r
  PXE_UINT32  Dword[MAX_EEPROM_LEN];\r
} PXE_CPB_NVDATA_BULK;\r
\r
typedef struct s_pxe_db_nvdata {\r
  ///\r
  /// Arrays of data items from non-volatile storage.\r
  ///\r
  union {\r
    ///\r
    /// Array of byte-wide data items.\r
    ///\r
    PXE_UINT8   Byte[MAX_EEPROM_LEN << 2];\r
\r
    ///\r
    /// Array of word-wide data items.\r
    ///\r
    PXE_UINT16  Word[MAX_EEPROM_LEN << 1];\r
\r
    ///\r
    /// Array of dword-wide data items.\r
    ///\r
    PXE_UINT32  Dword[MAX_EEPROM_LEN];\r
  } Data;\r
} PXE_DB_NVDATA;\r
\r
typedef struct s_pxe_db_get_status {\r
  ///\r
  /// Length of next receive frame (header + data).  If this is zero,\r
  /// there is no next receive frame available.\r
  ///\r
  PXE_UINT32  RxFrameLen;\r
\r
  ///\r
  /// Reserved, set to zero.\r
  ///\r
  PXE_UINT32  reserved;\r
\r
  ///\r
  ///  Addresses of transmitted buffers that need to be recycled.\r
  ///\r
  PXE_UINT64  TxBuffer[MAX_XMIT_BUFFERS];\r
} PXE_DB_GET_STATUS;\r
\r
typedef struct s_pxe_cpb_fill_header {\r
  ///\r
  /// Source and destination MAC addresses.  These will be copied into\r
  /// the media header without doing byte swapping.\r
  ///\r
  PXE_MAC_ADDR  SrcAddr;\r
  PXE_MAC_ADDR  DestAddr;\r
\r
  ///\r
  /// Address of first byte of media header.  The first byte of packet data\r
  /// follows the last byte of the media header.\r
  ///\r
  PXE_UINT64        MediaHeader;\r
\r
  ///\r
  /// Length of packet data in bytes (not including the media header).\r
  ///\r
  PXE_UINT32        PacketLen;\r
\r
  ///\r
  /// Protocol type.  This will be copied into the media header without\r
  /// doing byte swapping.  Protocol type numbers can be obtained from\r
  /// the Assigned Numbers RFC 1700.\r
  ///\r
  PXE_UINT16        Protocol;\r
\r
  ///\r
  /// Length of the media header in bytes.\r
  ///\r
  PXE_UINT16        MediaHeaderLen;\r
} PXE_CPB_FILL_HEADER;\r
\r
#define PXE_PROTOCOL_ETHERNET_IP  0x0800\r
#define PXE_PROTOCOL_ETHERNET_ARP 0x0806\r
#define MAX_XMIT_FRAGMENTS        16\r
\r
typedef struct s_pxe_cpb_fill_header_fragmented {\r
  ///\r
  /// Source and destination MAC addresses.  These will be copied into\r
  /// the media header without doing byte swapping.\r
  ///\r
  PXE_MAC_ADDR        SrcAddr;\r
  PXE_MAC_ADDR        DestAddr;\r
\r
  ///\r
  /// Length of packet data in bytes (not including the media header).\r
  ///\r
  PXE_UINT32          PacketLen;\r
\r
  ///\r
  /// Protocol type.  This will be copied into the media header without\r
  /// doing byte swapping.  Protocol type numbers can be obtained from\r
  /// the Assigned Numbers RFC 1700.\r
  ///\r
  PXE_MEDIA_PROTOCOL  Protocol;\r
\r
  ///\r
  /// Length of the media header in bytes.\r
  ///\r
  PXE_UINT16          MediaHeaderLen;\r
\r
  ///\r
  /// Number of packet fragment descriptors.\r
  ///\r
  PXE_UINT16          FragCnt;\r
\r
  ///\r
  /// Reserved, must be set to zero.\r
  ///\r
  PXE_UINT16          reserved;\r
\r
  ///\r
  /// Array of packet fragment descriptors.  The first byte of the media\r
  /// header is the first byte of the first fragment.\r
  ///\r
  struct {\r
    ///\r
    /// Address of this packet fragment.\r
    ///\r
    PXE_UINT64  FragAddr;\r
\r
    ///\r
    /// Length of this packet fragment.\r
    ///\r
    PXE_UINT32  FragLen;\r
\r
    ///\r
    /// Reserved, must be set to zero.\r
    ///\r
    PXE_UINT32  reserved;\r
  } FragDesc[MAX_XMIT_FRAGMENTS];\r
}\r
PXE_CPB_FILL_HEADER_FRAGMENTED;\r
\r
typedef struct s_pxe_cpb_transmit {\r
  ///\r
  /// Address of first byte of frame buffer.  This is also the first byte\r
  /// of the media header.\r
  ///\r
  PXE_UINT64  FrameAddr;\r
\r
  ///\r
  /// Length of the data portion of the frame buffer in bytes.  Do not\r
  /// include the length of the media header.\r
  ///\r
  PXE_UINT32  DataLen;\r
\r
  ///\r
  /// Length of the media header in bytes.\r
  ///\r
  PXE_UINT16  MediaheaderLen;\r
\r
  ///\r
  /// Reserved, must be zero.\r
  ///\r
  PXE_UINT16  reserved;\r
} PXE_CPB_TRANSMIT;\r
\r
typedef struct s_pxe_cpb_transmit_fragments {\r
  ///\r
  /// Length of packet data in bytes (not including the media header).\r
  ///\r
  PXE_UINT32  FrameLen;\r
\r
  ///\r
  /// Length of the media header in bytes.\r
  ///\r
  PXE_UINT16  MediaheaderLen;\r
\r
  ///\r
  /// Number of packet fragment descriptors.\r
  ///\r
  PXE_UINT16  FragCnt;\r
\r
  ///\r
  /// Array of frame fragment descriptors.  The first byte of the first\r
  /// fragment is also the first byte of the media header.\r
  ///\r
  struct {\r
    ///\r
    /// Address of this frame fragment.\r
    ///\r
    PXE_UINT64  FragAddr;\r
\r
    ///\r
    /// Length of this frame fragment.\r
    ///\r
    PXE_UINT32  FragLen;\r
\r
    ///\r
    /// Reserved, must be set to zero.\r
    ///\r
    PXE_UINT32  reserved;\r
  } FragDesc[MAX_XMIT_FRAGMENTS];\r
}\r
PXE_CPB_TRANSMIT_FRAGMENTS;\r
\r
typedef struct s_pxe_cpb_receive {\r
  ///\r
  /// Address of first byte of receive buffer.  This is also the first byte\r
  /// of the frame header.\r
  ///\r
  PXE_UINT64  BufferAddr;\r
\r
  ///\r
  /// Length of receive buffer.  This must be large enough to hold the\r
  /// received frame (media header + data).  If the length of smaller than\r
  /// the received frame, data will be lost.\r
  ///\r
  PXE_UINT32  BufferLen;\r
\r
  ///\r
  /// Reserved, must be set to zero.\r
  ///\r
  PXE_UINT32  reserved;\r
} PXE_CPB_RECEIVE;\r
\r
typedef struct s_pxe_db_receive {\r
  ///\r
  /// Source and destination MAC addresses from media header.\r
  ///\r
  PXE_MAC_ADDR        SrcAddr;\r
  PXE_MAC_ADDR        DestAddr;\r
\r
  ///\r
  /// Length of received frame.  May be larger than receive buffer size.\r
  /// The receive buffer will not be overwritten.  This is how to tell\r
  /// if data was lost because the receive buffer was too small.\r
  ///\r
  PXE_UINT32          FrameLen;\r
\r
  ///\r
  /// Protocol type from media header.\r
  ///\r
  PXE_MEDIA_PROTOCOL  Protocol;\r
\r
  ///\r
  /// Length of media header in received frame.\r
  ///\r
  PXE_UINT16          MediaHeaderLen;\r
\r
  ///\r
  /// Type of receive frame.\r
  ///\r
  PXE_FRAME_TYPE      Type;\r
\r
  ///\r
  /// Reserved, must be zero.\r
  ///\r
  PXE_UINT8           reserved[7];\r
\r
} PXE_DB_RECEIVE;\r
\r
#pragma pack()\r
\r
#endif\r