projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 68edd7db JY |
1 | ;------------------------------------------------------------------------------\r |
| 2 | ;\r | |
| e59760f8 | 3 | ; Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>\r |
| 9344f092 | 4 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 68edd7db JY |
5 | ;\r |
| 6 | ; Abstract:\r | |
| 7 | ;\r | |
| 8 | ; This file provides macro definitions for NASM files.\r | |
| 9 | ;\r | |
| 10 | ;------------------------------------------------------------------------------\r | |
| 11 | \r | |
| bdf1df8a SW |
12 | %macro SAVEPREVSSP 0\r |
| 13 | DB 0xF3, 0x0F, 0x01, 0xEA\r | |
| 14 | %endmacro\r | |
| 15 | \r | |
| 16 | %macro CLRSSBSY_RAX 0\r | |
| 17 | DB 0xF3, 0x0F, 0xAE, 0x30\r | |
| 18 | %endmacro\r | |
| 19 | \r | |
| 20 | %macro RSTORSSP_RAX 0\r | |
| 21 | DB 0xF3, 0x0F, 0x01, 0x28\r | |
| 22 | %endmacro\r | |
| 23 | \r | |
| 68edd7db JY |
24 | %macro SETSSBSY 0\r |
| 25 | DB 0xF3, 0x0F, 0x01, 0xE8\r | |
| 26 | %endmacro\r | |
| 27 | \r | |
| 28 | %macro READSSP_RAX 0\r | |
| 29 | DB 0xF3, 0x48, 0x0F, 0x1E, 0xC8\r | |
| 30 | %endmacro\r | |
| 31 | \r | |
| 32 | %macro INCSSP_RAX 0\r | |
| 33 | DB 0xF3, 0x48, 0x0F, 0xAE, 0xE8\r | |
| 34 | %endmacro\r | |
| e59760f8 | 35 | \r |
| 5a7cbd54 BS |
36 | ;\r |
| 37 | ; Macro for the PVALIDATE instruction, defined in AMD APM volume 3.\r | |
| 38 | ; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392753\r | |
| 39 | ;\r | |
| 40 | %macro PVALIDATE 0\r | |
| 41 | DB 0xF2, 0x0F, 0x01, 0xFF\r | |
| 42 | %endmacro\r | |
| 43 | \r | |
| 2b5b2ff0 TL |
44 | ;\r |
| 45 | ; Macro for the RMPADJUST instruction, defined in AMD APM volume 3.\r | |
| 46 | ; NASM feature request URL: https://bugzilla.nasm.us/show_bug.cgi?id=3392754\r | |
| 47 | ;\r | |
| 48 | %macro RMPADJUST 0\r | |
| 49 | DB 0xF3, 0x0F, 0x01, 0xFE\r | |
| 50 | %endmacro\r | |
| 51 | \r | |
| e59760f8 RN |
52 | ; NASM provides built-in macros STRUC and ENDSTRUC for structure definition.\r |
| 53 | ; For example, to define a structure called mytype containing a longword,\r | |
| 54 | ; a word, a byte and a string of bytes, you might code\r | |
| 55 | ;\r | |
| 56 | ; struc mytype\r | |
| 57 | ;\r | |
| 58 | ; mt_long: resd 1\r | |
| 59 | ; mt_word: resw 1\r | |
| 60 | ; mt_byte: resb 1\r | |
| 61 | ; mt_str: resb 32\r | |
| 62 | ;\r | |
| 63 | ; endstruc\r | |
| 64 | ;\r | |
| 65 | ; Below macros are help to map the C types and the RESB family of pseudo-instructions.\r | |
| 66 | ; So that the above structure definition can be coded as\r | |
| 67 | ;\r | |
| 68 | ; struc mytype\r | |
| 69 | ;\r | |
| 70 | ; mt_long: CTYPE_UINT32 1\r | |
| 71 | ; mt_word: CTYPE_UINT16 1\r | |
| 72 | ; mt_byte: CTYPE_UINT8 1\r | |
| 73 | ; mt_str: CTYPE_CHAR8 32\r | |
| 74 | ;\r | |
| 75 | ; endstruc\r | |
| 76 | %define CTYPE_UINT64 resq\r | |
| 77 | %define CTYPE_INT64 resq\r | |
| 78 | %define CTYPE_UINT32 resd\r | |
| 79 | %define CTYPE_INT32 resd\r | |
| 80 | %define CTYPE_UINT16 resw\r | |
| 81 | %define CTYPE_INT16 resw\r | |
| 82 | %define CTYPE_BOOLEAN resb\r | |
| 83 | %define CTYPE_UINT8 resb\r | |
| 84 | %define CTYPE_CHAR8 resb\r | |
| 85 | %define CTYPE_INT8 resb\r | |
| 86 | \r | |
| 87 | %define CTYPE_UINTN resq\r | |
| 88 | %define CTYPE_INTN resq\r |