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Commit | Line | Data |
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9095d37b | 1 | ;------------------------------------------------------------------------------\r |
990e25aa | 2 | ;\r |
f7c8bd9f | 3 | ; CpuSleep() for ARMv7\r |
4 | ;\r | |
5 | ; ARMv6 versions was:\r | |
6 | ; MOV r0,#0\r | |
7 | ; MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction\r | |
8 | ;\r | |
9 | ; But this is a no-op on ARMv7\r | |
990e25aa | 10 | ;\r |
9095d37b | 11 | ; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
f7c8bd9f | 12 | ; Portions copyright (c) 2008 - 2011, Apple Inc. All rights reserved.<BR>\r |
9344f092 | 13 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r |
990e25aa | 14 | ;\r |
15 | ;------------------------------------------------------------------------------\r | |
16 | \r | |
17 | EXPORT CpuSleep\r | |
18 | AREA cpu_sleep, CODE, READONLY\r | |
19 | \r | |
20 | ;/**\r | |
21 | ; Places the CPU in a sleep state until an interrupt is received.\r | |
22 | ;\r | |
23 | ; Places the CPU in a sleep state until an interrupt is received. If interrupts\r | |
24 | ; are disabled prior to calling this function, then the CPU will be placed in a\r | |
25 | ; sleep state indefinitely.\r | |
26 | ;\r | |
27 | ;**/\r | |
28 | ;VOID\r | |
29 | ;EFIAPI\r | |
30 | ;CpuSleep (\r | |
31 | ; VOID\r | |
32 | ; );\r | |
33 | ;\r | |
34 | CpuSleep\r | |
f7c8bd9f | 35 | WFI\r |
990e25aa | 36 | BX LR\r |
37 | \r | |
38 | END\r |